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Change-Id: I4eddcfa9a0513f16c869d9cc63f9f1dae0c39f83
Signed-off-by: Amber Lin <Amber.Lin@amd.com>


[ROCm/ROCR-Runtime commit: d4dbf562a9]
This commit is contained in:
Amber Lin
2017-02-03 09:59:21 -05:00
parent 73c7c197af
commit 67049d7175
3 changed files with 344 additions and 343 deletions
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projects/rocr-runtime/src/perfctr.c
+184 -186
View File
@@ -29,19 +29,19 @@
#include "linux/kfd_ioctl.h"
#include <unistd.h>
#define BITS_PER_BYTE CHAR_BIT
#define BITS_PER_BYTE CHAR_BIT
#define HSA_PERF_MAGIC4CC 0x54415348
#define HSA_PERF_MAGIC4CC 0x54415348
enum perf_trace_state {
PERF_TRACE_STATE__STOPPED = 0,
PERF_TRACE_STATE__STARTED
PERF_TRACE_STATE__STOPPED = 0,
PERF_TRACE_STATE__STARTED
};
struct perf_trace {
uint32_t magic4cc;
uint32_t gpu_id;
enum perf_trace_state state;
uint32_t magic4cc;
uint32_t gpu_id;
enum perf_trace_state state;
};
extern int amd_hsa_thunk_lock_fd;
@@ -77,94 +77,92 @@ void destroy_counter_props(void)
static int blockid2uuid(enum perf_block_id block_id, HSA_UUID *uuid)
{
int rc = 0;
switch (block_id) {
case PERFCOUNTER_BLOCKID__SQ:
*uuid = HSA_PROFILEBLOCK_AMD_SQ;
break;
default:
/* If we reach this point, it's a bug */
rc = -1;
}
int rc = 0;
switch (block_id) {
case PERFCOUNTER_BLOCKID__SQ:
*uuid = HSA_PROFILEBLOCK_AMD_SQ;
break;
default:
/* If we reach this point, it's a bug */
rc = -1;
}
return rc;
return rc;
}
HSAKMT_STATUS
HSAKMTAPI
hsaKmtPmcGetCounterProperties(
HSAuint32 NodeId, //IN
HsaCounterProperties** CounterProperties //OUT
)
HSAuint32 NodeId, //IN
HsaCounterProperties** CounterProperties //OUT
)
{
HSAKMT_STATUS rc = HSAKMT_STATUS_SUCCESS;
uint32_t gpu_id, i, block_id;
uint16_t dev_id;
uint32_t counter_props_size = 0;
uint32_t total_counters = 0;
uint32_t total_concurrent = 0;
struct perf_counter_block block = {0};
HSAKMT_STATUS rc = HSAKMT_STATUS_SUCCESS;
uint32_t gpu_id, i, block_id;
uint16_t dev_id;
uint32_t counter_props_size = 0;
uint32_t total_counters = 0;
uint32_t total_concurrent = 0;
struct perf_counter_block block = {0};
if (counter_props == NULL)
return HSAKMT_STATUS_NO_MEMORY;
if (CounterProperties == NULL)
return HSAKMT_STATUS_INVALID_PARAMETER;
if (CounterProperties == NULL)
return HSAKMT_STATUS_INVALID_PARAMETER;
if (validate_nodeid(NodeId, &gpu_id) != 0)
return HSAKMT_STATUS_INVALID_NODE_UNIT;
if (validate_nodeid(NodeId, &gpu_id) != 0)
return HSAKMT_STATUS_INVALID_NODE_UNIT;
if (counter_props[NodeId] == NULL) {
dev_id = get_device_id_by_node(NodeId);
for (i = 0; i < PERFCOUNTER_BLOCKID__MAX; i++) {
rc = get_block_properties(dev_id, i, &block);
if (rc != HSAKMT_STATUS_SUCCESS)
return rc;
total_concurrent += block.num_of_slots;
total_counters += block.num_of_counters;
}
counter_props_size = sizeof(HsaCounterProperties) +
sizeof(HsaCounterBlockProperties)*(PERFCOUNTER_BLOCKID__MAX-1) +
sizeof(HsaCounter)*(total_counters-1);
if (counter_props[NodeId] == NULL) {
dev_id = get_device_id_by_node(NodeId);
for (i = 0; i < PERFCOUNTER_BLOCKID__MAX; i++) {
rc = get_block_properties(dev_id, i, &block);
if (rc != HSAKMT_STATUS_SUCCESS)
return rc;
total_concurrent += block.num_of_slots;
total_counters += block.num_of_counters;
}
counter_props[NodeId] = malloc(counter_props_size);
counter_props_size = sizeof(HsaCounterProperties) +
sizeof(HsaCounterBlockProperties)*(PERFCOUNTER_BLOCKID__MAX-1) +
sizeof(HsaCounter)*(total_counters-1);
if (counter_props[NodeId] == NULL)
return HSAKMT_STATUS_NO_MEMORY;
counter_props[NodeId] = malloc(counter_props_size);
counter_props[NodeId]->NumBlocks = PERFCOUNTER_BLOCKID__MAX;
counter_props[NodeId]->NumConcurrent = total_concurrent;
if (counter_props[NodeId] == NULL)
return HSAKMT_STATUS_NO_MEMORY;
for (block_id = 0; block_id < PERFCOUNTER_BLOCKID__MAX; block_id++)
{
rc = get_block_properties(dev_id, block_id, &block);
if (rc != HSAKMT_STATUS_SUCCESS) {
free(counter_props[NodeId]);
return rc;
}
counter_props[NodeId]->NumBlocks = PERFCOUNTER_BLOCKID__MAX;
counter_props[NodeId]->NumConcurrent = total_concurrent;
/* Filling the SQ block */
blockid2uuid(block_id, &counter_props[NodeId]->Blocks[block_id].BlockId);
counter_props[NodeId]->Blocks[block_id].NumCounters = block.num_of_counters;
counter_props[NodeId]->Blocks[block_id].NumConcurrent = block.num_of_slots;
for (block_id = 0; block_id < PERFCOUNTER_BLOCKID__MAX; block_id++)
{
rc = get_block_properties(dev_id, block_id, &block);
if (rc != HSAKMT_STATUS_SUCCESS) {
free(counter_props[NodeId]);
return rc;
}
for (i = 0; i < block.num_of_counters; i++) {
counter_props[NodeId]->Blocks[block_id].Counters[i].BlockIndex = block_id;
counter_props[NodeId]->Blocks[block_id].Counters[i].CounterId = block.counter_ids[i];
counter_props[NodeId]->Blocks[block_id].Counters[i].CounterSizeInBits = block.counter_size_in_bits;
counter_props[NodeId]->Blocks[block_id].Counters[i].CounterMask = block.counter_mask;
counter_props[NodeId]->Blocks[block_id].Counters[i].Flags.ui32.Global = 1;
counter_props[NodeId]->Blocks[block_id].Counters[i].Type = HSA_PROFILE_TYPE_NONPRIV_IMMEDIATE;
}
}
}
/* Filling the SQ block */
blockid2uuid(block_id, &counter_props[NodeId]->Blocks[block_id].BlockId);
counter_props[NodeId]->Blocks[block_id].NumCounters = block.num_of_counters;
counter_props[NodeId]->Blocks[block_id].NumConcurrent = block.num_of_slots;
*CounterProperties = counter_props[NodeId];
for (i = 0; i < block.num_of_counters; i++) {
counter_props[NodeId]->Blocks[block_id].Counters[i].BlockIndex = block_id;
counter_props[NodeId]->Blocks[block_id].Counters[i].CounterId = block.counter_ids[i];
counter_props[NodeId]->Blocks[block_id].Counters[i].CounterSizeInBits = block.counter_size_in_bits;
counter_props[NodeId]->Blocks[block_id].Counters[i].CounterMask = block.counter_mask;
counter_props[NodeId]->Blocks[block_id].Counters[i].Flags.ui32.Global = 1;
counter_props[NodeId]->Blocks[block_id].Counters[i].Type = HSA_PROFILE_TYPE_NONPRIV_IMMEDIATE;
}
}
}
*CounterProperties = counter_props[NodeId];
return HSAKMT_STATUS_SUCCESS;
return HSAKMT_STATUS_SUCCESS;
}
/**
@@ -174,51 +172,51 @@ hsaKmtPmcGetCounterProperties(
HSAKMT_STATUS
HSAKMTAPI
hsaKmtPmcRegisterTrace(
HSAuint32 NodeId, //IN
HSAuint32 NumberOfCounters, //IN
HsaCounter* Counters, //IN
HsaPmcTraceRoot* TraceRoot //OUT
)
HSAuint32 NodeId, //IN
HSAuint32 NumberOfCounters, //IN
HsaCounter* Counters, //IN
HsaPmcTraceRoot* TraceRoot //OUT
)
{
uint32_t gpu_id, i;
uint64_t min_buf_size = 0;
uint32_t concurrent_counters[PERFCOUNTER_BLOCKID__MAX] = {0};
struct perf_trace *trace = NULL;
uint32_t gpu_id, i;
uint64_t min_buf_size = 0;
uint32_t concurrent_counters[PERFCOUNTER_BLOCKID__MAX] = {0};
struct perf_trace *trace = NULL;
if (counter_props == NULL)
return HSAKMT_STATUS_NO_MEMORY;
if (Counters == NULL || TraceRoot == NULL || NumberOfCounters == 0)
return HSAKMT_STATUS_INVALID_PARAMETER;
if (Counters == NULL || TraceRoot == NULL || NumberOfCounters == 0)
return HSAKMT_STATUS_INVALID_PARAMETER;
if (validate_nodeid(NodeId, &gpu_id) != 0)
return HSAKMT_STATUS_INVALID_NODE_UNIT;
if (validate_nodeid(NodeId, &gpu_id) != 0)
return HSAKMT_STATUS_INVALID_NODE_UNIT;
/* Calculating the minimum buffer size */
for (i = 0; i < NumberOfCounters; i++) {
if (Counters[i].BlockIndex >= PERFCOUNTER_BLOCKID__MAX)
return HSAKMT_STATUS_INVALID_PARAMETER;
min_buf_size += Counters[i].CounterSizeInBits/BITS_PER_BYTE;
concurrent_counters[Counters[i].BlockIndex]++;
}
/* Calculating the minimum buffer size */
for (i = 0; i < NumberOfCounters; i++) {
if (Counters[i].BlockIndex >= PERFCOUNTER_BLOCKID__MAX)
return HSAKMT_STATUS_INVALID_PARAMETER;
min_buf_size += Counters[i].CounterSizeInBits/BITS_PER_BYTE;
concurrent_counters[Counters[i].BlockIndex]++;
}
/* Verifying that the number of counters per block is not larger than the amount of slots */
if (concurrent_counters[PERFCOUNTER_BLOCKID__SQ] > counter_props[NodeId]->Blocks[PERFCOUNTER_BLOCKID__SQ].NumConcurrent)
return HSAKMT_STATUS_INVALID_PARAMETER;
/* Verifying that the number of counters per block is not larger than the amount of slots */
if (concurrent_counters[PERFCOUNTER_BLOCKID__SQ] > counter_props[NodeId]->Blocks[PERFCOUNTER_BLOCKID__SQ].NumConcurrent)
return HSAKMT_STATUS_INVALID_PARAMETER;
trace = malloc(sizeof(trace));
if (trace == NULL)
return HSAKMT_STATUS_NO_MEMORY;
trace = malloc(sizeof(trace));
if (trace == NULL)
return HSAKMT_STATUS_NO_MEMORY;
trace->magic4cc = HSA_PERF_MAGIC4CC;
trace->gpu_id = gpu_id;
trace->state = PERF_TRACE_STATE__STOPPED;
trace->magic4cc = HSA_PERF_MAGIC4CC;
trace->gpu_id = gpu_id;
trace->state = PERF_TRACE_STATE__STOPPED;
TraceRoot->NumberOfPasses = 1;
TraceRoot->TraceBufferMinSizeBytes = PAGE_ALIGN_UP(min_buf_size);
TraceRoot->TraceId = PORT_VPTR_TO_UINT64(trace);
TraceRoot->NumberOfPasses = 1;
TraceRoot->TraceBufferMinSizeBytes = PAGE_ALIGN_UP(min_buf_size);
TraceRoot->TraceId = PORT_VPTR_TO_UINT64(trace);
return HSAKMT_STATUS_SUCCESS;
return HSAKMT_STATUS_SUCCESS;
}
/**
@@ -228,37 +226,37 @@ hsaKmtPmcRegisterTrace(
HSAKMT_STATUS
HSAKMTAPI
hsaKmtPmcUnregisterTrace(
HSAuint32 NodeId, //IN
HSATraceId TraceId //IN
)
HSAuint32 NodeId, //IN
HSATraceId TraceId //IN
)
{
uint32_t gpu_id;
struct perf_trace *trace;
uint32_t gpu_id;
struct perf_trace *trace;
if (TraceId == 0)
return HSAKMT_STATUS_INVALID_PARAMETER;
if (TraceId == 0)
return HSAKMT_STATUS_INVALID_PARAMETER;
if (validate_nodeid(NodeId, &gpu_id) != 0)
return HSAKMT_STATUS_INVALID_NODE_UNIT;
if (validate_nodeid(NodeId, &gpu_id) != 0)
return HSAKMT_STATUS_INVALID_NODE_UNIT;
trace = (struct perf_trace *)PORT_UINT64_TO_VPTR(TraceId);
trace = (struct perf_trace *)PORT_UINT64_TO_VPTR(TraceId);
if (trace->magic4cc != HSA_PERF_MAGIC4CC)
return HSAKMT_STATUS_INVALID_HANDLE;
if (trace->magic4cc != HSA_PERF_MAGIC4CC)
return HSAKMT_STATUS_INVALID_HANDLE;
if (trace->gpu_id != gpu_id)
return HSAKMT_STATUS_INVALID_NODE_UNIT;
if (trace->gpu_id != gpu_id)
return HSAKMT_STATUS_INVALID_NODE_UNIT;
/* If the trace is in the running state, stop it */
if (trace->state == PERF_TRACE_STATE__STARTED) {
HSAKMT_STATUS status = hsaKmtPmcStopTrace(TraceId);
if (status != HSAKMT_STATUS_SUCCESS)
return status;
}
/* If the trace is in the running state, stop it */
if (trace->state == PERF_TRACE_STATE__STARTED) {
HSAKMT_STATUS status = hsaKmtPmcStopTrace(TraceId);
if (status != HSAKMT_STATUS_SUCCESS)
return status;
}
free(trace);
free(trace);
return HSAKMT_STATUS_SUCCESS;
return HSAKMT_STATUS_SUCCESS;
}
@@ -270,29 +268,29 @@ hsaKmtPmcUnregisterTrace(
HSAKMT_STATUS
HSAKMTAPI
hsaKmtPmcAcquireTraceAccess(
HSAuint32 NodeId, //IN
HSATraceId TraceId //IN
)
HSAuint32 NodeId, //IN
HSATraceId TraceId //IN
)
{
struct perf_trace *trace;
struct perf_trace *trace;
if (TraceId == 0)
return HSAKMT_STATUS_INVALID_PARAMETER;
if (TraceId == 0)
return HSAKMT_STATUS_INVALID_PARAMETER;
trace = (struct perf_trace *)PORT_UINT64_TO_VPTR(TraceId);
trace = (struct perf_trace *)PORT_UINT64_TO_VPTR(TraceId);
if (trace->magic4cc != HSA_PERF_MAGIC4CC)
return HSAKMT_STATUS_INVALID_HANDLE;
if (trace->magic4cc != HSA_PERF_MAGIC4CC)
return HSAKMT_STATUS_INVALID_HANDLE;
if (amd_hsa_thunk_lock_fd > 0) {
if (amd_hsa_thunk_lock_fd > 0) {
if (lockf( amd_hsa_thunk_lock_fd, F_TLOCK, 0 ) != 0)
return HSAKMT_STATUS_ERROR;
return HSAKMT_STATUS_ERROR;
else
return HSAKMT_STATUS_SUCCESS;
}
else {
return HSAKMT_STATUS_ERROR;
}
}
else {
return HSAKMT_STATUS_ERROR;
}
}
@@ -304,29 +302,29 @@ hsaKmtPmcAcquireTraceAccess(
HSAKMT_STATUS
HSAKMTAPI
hsaKmtPmcReleaseTraceAccess(
HSAuint32 NodeId, //IN
HSATraceId TraceId //IN
)
HSAuint32 NodeId, //IN
HSATraceId TraceId //IN
)
{
struct perf_trace *trace;
struct perf_trace *trace;
if (TraceId == 0)
return HSAKMT_STATUS_INVALID_PARAMETER;
if (TraceId == 0)
return HSAKMT_STATUS_INVALID_PARAMETER;
trace = (struct perf_trace *)PORT_UINT64_TO_VPTR(TraceId);
trace = (struct perf_trace *)PORT_UINT64_TO_VPTR(TraceId);
if (trace->magic4cc != HSA_PERF_MAGIC4CC)
return HSAKMT_STATUS_INVALID_HANDLE;
if (trace->magic4cc != HSA_PERF_MAGIC4CC)
return HSAKMT_STATUS_INVALID_HANDLE;
if (amd_hsa_thunk_lock_fd > 0) {
if (amd_hsa_thunk_lock_fd > 0) {
if (lockf( amd_hsa_thunk_lock_fd, F_ULOCK, 0 ) != 0)
return HSAKMT_STATUS_ERROR;
return HSAKMT_STATUS_ERROR;
else
return HSAKMT_STATUS_SUCCESS;
}
else {
return HSAKMT_STATUS_ERROR;
}
}
else {
return HSAKMT_STATUS_ERROR;
}
}
@@ -338,22 +336,22 @@ hsaKmtPmcReleaseTraceAccess(
HSAKMT_STATUS
HSAKMTAPI
hsaKmtPmcStartTrace(
HSATraceId TraceId, //IN
void* TraceBuffer, //IN (page aligned)
HSAuint64 TraceBufferSizeBytes //IN (page aligned)
)
HSATraceId TraceId, //IN
void* TraceBuffer, //IN (page aligned)
HSAuint64 TraceBufferSizeBytes //IN (page aligned)
)
{
struct perf_trace *trace = (struct perf_trace *)PORT_UINT64_TO_VPTR(TraceId);
struct perf_trace *trace = (struct perf_trace *)PORT_UINT64_TO_VPTR(TraceId);
if (TraceId == 0 || TraceBuffer == NULL || TraceBufferSizeBytes == 0)
return HSAKMT_STATUS_INVALID_PARAMETER;
if (TraceId == 0 || TraceBuffer == NULL || TraceBufferSizeBytes == 0)
return HSAKMT_STATUS_INVALID_PARAMETER;
if (trace->magic4cc != HSA_PERF_MAGIC4CC)
return HSAKMT_STATUS_INVALID_HANDLE;
if (trace->magic4cc != HSA_PERF_MAGIC4CC)
return HSAKMT_STATUS_INVALID_HANDLE;
trace->state = PERF_TRACE_STATE__STARTED;
trace->state = PERF_TRACE_STATE__STARTED;
return HSAKMT_STATUS_SUCCESS;
return HSAKMT_STATUS_SUCCESS;
}
@@ -364,18 +362,18 @@ hsaKmtPmcStartTrace(
HSAKMT_STATUS
HSAKMTAPI
hsaKmtPmcQueryTrace(
HSATraceId TraceId //IN
)
HSATraceId TraceId //IN
)
{
struct perf_trace *trace = (struct perf_trace *)PORT_UINT64_TO_VPTR(TraceId);
struct perf_trace *trace = (struct perf_trace *)PORT_UINT64_TO_VPTR(TraceId);
if (TraceId == 0)
return HSAKMT_STATUS_INVALID_PARAMETER;
if (TraceId == 0)
return HSAKMT_STATUS_INVALID_PARAMETER;
if (trace->magic4cc != HSA_PERF_MAGIC4CC)
return HSAKMT_STATUS_INVALID_HANDLE;
if (trace->magic4cc != HSA_PERF_MAGIC4CC)
return HSAKMT_STATUS_INVALID_HANDLE;
return HSAKMT_STATUS_SUCCESS;
return HSAKMT_STATUS_SUCCESS;
}
@@ -386,18 +384,18 @@ hsaKmtPmcQueryTrace(
HSAKMT_STATUS
HSAKMTAPI
hsaKmtPmcStopTrace(
HSATraceId TraceId //IN
)
HSATraceId TraceId //IN
)
{
struct perf_trace *trace = (struct perf_trace *)PORT_UINT64_TO_VPTR(TraceId);
struct perf_trace *trace = (struct perf_trace *)PORT_UINT64_TO_VPTR(TraceId);
if (TraceId == 0)
return HSAKMT_STATUS_INVALID_PARAMETER;
if (TraceId == 0)
return HSAKMT_STATUS_INVALID_PARAMETER;
if (trace->magic4cc != HSA_PERF_MAGIC4CC)
return HSAKMT_STATUS_INVALID_HANDLE;
if (trace->magic4cc != HSA_PERF_MAGIC4CC)
return HSAKMT_STATUS_INVALID_HANDLE;
trace->state = PERF_TRACE_STATE__STOPPED;
trace->state = PERF_TRACE_STATE__STOPPED;
return HSAKMT_STATUS_SUCCESS;
return HSAKMT_STATUS_SUCCESS;
}