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Add TCA block to PMC support

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Add TCA to PMC tables.

Change-Id: Ia4164ab4581ea3f539706f534f672e5c24f5362f
This commit is contained in:
Amber Lin
2017-03-03 14:36:51 -05:00
parent 3738a1b5f2
commit 73eff30d7d
4 changed files with 63 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/perfctr.c
+3
View File
@@ -180,6 +180,9 @@ static int blockid2uuid(enum perf_block_id block_id, HSA_UUID *uuid)
case PERFCOUNTER_BLOCKID__SQ:
*uuid = HSA_PROFILEBLOCK_AMD_SQ;
break;
case PERFCOUNTER_BLOCKID__TCA:
*uuid = HSA_PROFILEBLOCK_AMD_TCA;
break;
case PERFCOUNTER_BLOCKID__IOMMUV2:
*uuid = HSA_PROFILEBLOCK_AMD_IOMMUV2;
break;
src/pmc_table.c
+54
View File
@@ -49,6 +49,11 @@ static uint32_t gfx7_sq_counter_ids[] = {
235, 236, 237, 238, 239, 240, 241, 242, 243, 244, 245, 246, 247, 248, 249, 250
};
static uint32_t gfx7_tca_counter_ids[] = {
1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22,
23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38
};
/* Unused counters - 166, 292 - 297 */
static uint32_t gfx8_sq_counter_ids[] = {
1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22,
@@ -70,6 +75,11 @@ static uint32_t gfx8_sq_counter_ids[] = {
279, 280, 281, 282, 283, 284, 285, 286, 287, 288, 289, 290, 291, 298
};
static uint32_t gfx8_tca_counter_ids[] = {
1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22,
23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34
};
/* Polaris 10/11 have the same SQ cpunter IDs but different from other gfx8's. */
/* Unused counters - 167 and 275 are *_DUMMY_LAST */
static uint32_t gfx8_pl_sq_counter_ids[] = {
@@ -135,6 +145,17 @@ static struct perf_counter_block carrizo_blocks[PERFCOUNTER_BLOCKID__MAX] = {
.counter_size_in_bits = 64,
.counter_mask = BITMASK(64)
},
[PERFCOUNTER_BLOCKID__TCA] = {
/* PMC0: PERF_SEL~PERF_SEL3, PMC1: PERF_SEL~PERF_SEL3, PMC2: PERF_SEL
* PMC3: PERF_SEL. So 10 PERF_SELs in total
*/
.num_of_slots = 10,
.num_of_counters = sizeof(gfx8_tca_counter_ids) /
sizeof(*gfx8_tca_counter_ids),
.counter_ids = gfx8_tca_counter_ids,
.counter_size_in_bits = 64,
.counter_mask = BITMASK(64)
},
};
static struct perf_counter_block fiji_blocks[PERFCOUNTER_BLOCKID__MAX] = {
@@ -146,6 +167,14 @@ static struct perf_counter_block fiji_blocks[PERFCOUNTER_BLOCKID__MAX] = {
.counter_size_in_bits = 64,
.counter_mask = BITMASK(64)
},
[PERFCOUNTER_BLOCKID__TCA] = {
.num_of_slots = 10, /* same as CZ */
.num_of_counters = sizeof(gfx8_tca_counter_ids) /
sizeof(*gfx8_tca_counter_ids),
.counter_ids = gfx8_tca_counter_ids,
.counter_size_in_bits = 64,
.counter_mask = BITMASK(64)
},
};
static struct perf_counter_block hawaii_blocks[PERFCOUNTER_BLOCKID__MAX] = {
@@ -157,6 +186,14 @@ static struct perf_counter_block hawaii_blocks[PERFCOUNTER_BLOCKID__MAX] = {
.counter_size_in_bits = 64,
.counter_mask = BITMASK(64)
},
[PERFCOUNTER_BLOCKID__TCA] = {
.num_of_slots = 10, /* same as CZ */
.num_of_counters = sizeof(gfx7_tca_counter_ids) /
sizeof(*gfx7_tca_counter_ids),
.counter_ids = gfx7_tca_counter_ids,
.counter_size_in_bits = 64,
.counter_mask = BITMASK(64)
},
};
static struct perf_counter_block polaris_blocks[PERFCOUNTER_BLOCKID__MAX] = {
@@ -168,6 +205,14 @@ static struct perf_counter_block polaris_blocks[PERFCOUNTER_BLOCKID__MAX] = {
.counter_size_in_bits = 64,
.counter_mask = BITMASK(64)
},
[PERFCOUNTER_BLOCKID__TCA] = {
.num_of_slots = 10, /* same as CZ */
.num_of_counters = sizeof(gfx8_tca_counter_ids) /
sizeof(*gfx8_tca_counter_ids),
.counter_ids = gfx8_tca_counter_ids,
.counter_size_in_bits = 64,
.counter_mask = BITMASK(64)
},
};
static struct perf_counter_block vega_blocks[PERFCOUNTER_BLOCKID__MAX] = {
@@ -179,6 +224,15 @@ static struct perf_counter_block vega_blocks[PERFCOUNTER_BLOCKID__MAX] = {
.counter_size_in_bits = 64,
.counter_mask = BITMASK(64)
},
[PERFCOUNTER_BLOCKID__TCA] = {
.num_of_slots = 10, /* same as Fiji */
/* Greenland has the same TCA counter IDs with Fiji */
.num_of_counters = sizeof(gfx8_tca_counter_ids) /
sizeof(*gfx8_tca_counter_ids),
.counter_ids = gfx8_tca_counter_ids,
.counter_size_in_bits = 64,
.counter_mask = BITMASK(64)
},
};
/* Current APUs only have one IOMMU. If NUMA is introduced to APUs, we'll need
src/pmc_table.h
+1
View File
@@ -31,6 +31,7 @@
enum perf_block_id {
PERFCOUNTER_BLOCKID__FIRST = 0,
PERFCOUNTER_BLOCKID__SQ = PERFCOUNTER_BLOCKID__FIRST,
PERFCOUNTER_BLOCKID__TCA,
PERFCOUNTER_BLOCKID__IOMMUV2,
PERFCOUNTER_BLOCKID__MAX
};