SWDEV-290685 - Relacing release fence instead of acquire for hipStreamWrite()

Change-Id: Ic2946b68c427d3e058948c0813863a27c21b903d


[ROCm/clr commit: 6408b9b906]

projects/clr/rocclr/device/rocm/rocvirtual.cpp

@@ -2277,7 +2277,7 @@ void VirtualGPU::submitStreamOperation(amd::StreamOperationCommand& cmd) {
     bool entire = amdMemory->isEntirelyCovered(origin, size);
 
     // Ensure memory ordering preceding the write
-    dispatchBarrierPacket(kBarrierPacketAcquireHeader);
+    dispatchBarrierPacket(kBarrierPacketReleaseHeader);
 
     // Use GPU Blit to write
     bool result = blitMgr().fillBuffer(*memory, &value, sizeBytes, origin, size, entire, true);