From 77b3ef3bb40431437175836abbafdb754e3f0ba3 Mon Sep 17 00:00:00 2001 From: foreman Date: Wed, 1 Mar 2017 13:22:43 -0600 Subject: [PATCH] P4 to Git Change 1379762 by rili@rili-opencl-pal-stg on 2017/03/01 14:16:43 SWDEV-95925 - Implement SVM fine grain system. Affected files ... ... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palprogram.cpp#34 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palresource.cpp#25 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palsettings.cpp#19 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palvirtual.cpp#44 edit [ROCm/clr commit: 5c3609ac644c4baba60136d9468b80ad5e0fcbc9] --- .../rocclr/runtime/device/pal/palprogram.cpp | 2 +- .../rocclr/runtime/device/pal/palresource.cpp | 33 ++++++++++++++++--- .../rocclr/runtime/device/pal/palsettings.cpp | 10 ++---- .../rocclr/runtime/device/pal/palvirtual.cpp | 5 ++- 4 files changed, 35 insertions(+), 15 deletions(-) diff --git a/projects/clr/rocclr/runtime/device/pal/palprogram.cpp b/projects/clr/rocclr/runtime/device/pal/palprogram.cpp index 5857a56435..50313dcca3 100644 --- a/projects/clr/rocclr/runtime/device/pal/palprogram.cpp +++ b/projects/clr/rocclr/runtime/device/pal/palprogram.cpp @@ -49,7 +49,7 @@ Segment::alloc( { align = amd::alignUp(align, sizeof(uint32_t)); gpuAccess_ = new pal::Memory(prog.dev(), amd::alignUp(size, align)); - if ((gpuAccess_ == nullptr) || !gpuAccess_->create(pal::Resource::Local)) { + if ((gpuAccess_ == nullptr) || !gpuAccess_->create(pal::Resource::Shader)) { delete gpuAccess_; gpuAccess_ = nullptr; return false; diff --git a/projects/clr/rocclr/runtime/device/pal/palresource.cpp b/projects/clr/rocclr/runtime/device/pal/palresource.cpp index c569c326cc..cbdefc7502 100644 --- a/projects/clr/rocclr/runtime/device/pal/palresource.cpp +++ b/projects/clr/rocclr/runtime/device/pal/palresource.cpp @@ -437,6 +437,10 @@ Resource::create(MemoryType memType, CreateParams* params) amd::ScopedLock lk(dev().lockPAL()); if (memType == Shader) { + if(dev().settings().svmFineGrainSystem_) { + desc_.isAllocExecute_ = true; + desc_.SVMRes_ = true; + } // force to use remote memory for HW DEBUG or use // local memory once we determine if FGS is supported // memType = (!dev().settings().enableHwDebug_) ? Local : RemoteUSWC; @@ -573,6 +577,7 @@ Resource::create(MemoryType memType, CreateParams* params) imgCreateInfo.samples = 1; imgCreateInfo.fragments = 1; imgCreateInfo.tiling = Pal::ImageTiling::Linear; + imgCreateInfo.depthPitch = desc().height_ * imgCreateInfo.rowPitch; switch (misc) { case 1: // NV12 format @@ -635,6 +640,9 @@ Resource::create(MemoryType memType, CreateParams* params) } } result = image_->BindGpuMemory(iMem(), viewOffset); + if (result != Pal::Result::Success) { + return false; + } offset_ = static_cast(viewOffset); hwSrd_ = dev().srds().allocSrdSlot(reinterpret_cast(&hwState_)); if ((0 == hwSrd_) && (memoryType() != ImageView)) { @@ -1010,6 +1018,10 @@ Resource::create(MemoryType memType, CreateParams* params) return false; } + if(dev().settings().svmFineGrainSystem_) { + desc_.SVMRes_ = true; + } + // Ensure page alignment if ((uint64_t)(pinAddress) & (amd::Os::pageSize() - 1)) { return false; @@ -1028,21 +1040,31 @@ Resource::create(MemoryType memType, CreateParams* params) return true; } + Pal::gpusize svmPtr = 0; if ((nullptr != params) && (nullptr != params->owner_) && (nullptr != params->owner_->getSvmPtr())) { - Pal::gpusize svmPtr = reinterpret_cast(params->owner_->getSvmPtr()); + svmPtr = reinterpret_cast(params->owner_->getSvmPtr()); + desc_.SVMRes_ = true; svmPtr = (svmPtr == 1) ? 0 : svmPtr; + } + if (desc_.SVMRes_) { // @todo 64K alignment is too big uint allocSize = amd::alignUp(desc().width_ * elementSize_, MaxGpuAlignment); - if (memoryType() == Remote) { + if ((memoryType() == RemoteUSWC) || + (memoryType() == Remote)) { Pal::SvmGpuMemoryCreateInfo createInfo = {}; + createInfo.isUsedForKernel = desc_.isAllocExecute_; createInfo.size = allocSize; createInfo.alignment = MaxGpuAlignment; if (svmPtr != 0) { createInfo.flags.useReservedGpuVa = true; createInfo.pReservedGpuVaOwner = params->svmBase_->iMem(); } + else { + createInfo.flags.useReservedGpuVa = false; + createInfo.pReservedGpuVaOwner = nullptr; + } memRef_ = GpuMemoryReference::Create(dev(), createInfo); } else { @@ -1063,8 +1085,11 @@ Resource::create(MemoryType memType, CreateParams* params) return false; } desc_.cardMemory_ = false; - desc_.SVMRes_ = true; - params->owner_->setSvmPtr(reinterpret_cast(memRef_->iMem()->Desc().gpuVirtAddr)); + if ((nullptr != params) && + (nullptr != params->owner_) && + (nullptr != params->owner_->getSvmPtr())) { + params->owner_->setSvmPtr(reinterpret_cast(memRef_->iMem()->Desc().gpuVirtAddr)); + } return true; } diff --git a/projects/clr/rocclr/runtime/device/pal/palsettings.cpp b/projects/clr/rocclr/runtime/device/pal/palsettings.cpp index e34eb1c216..b6b1b2dabb 100644 --- a/projects/clr/rocclr/runtime/device/pal/palsettings.cpp +++ b/projects/clr/rocclr/runtime/device/pal/palsettings.cpp @@ -82,9 +82,6 @@ Settings::Settings() // GPU device by default apuSystem_ = false; - // Fine-Grained System is disabled by default - svmFineGrainSystem_ = false; - // Disable 64 bit pointers support by default use64BitPtr_ = false; @@ -361,12 +358,11 @@ Settings::create( // accessing persistent staged buffer may fail if LongIdleDetct is enabled. disablePersistent_ = true; } - - svmFineGrainSystem_ = calAttr.isSVMFineGrainSystem; - - svmAtomics_ = (calAttr.svmAtomics || calAttr.isSVMFineGrainSystem) ? true : false; */ + svmFineGrainSystem_ = palProp.gpuMemoryProperties.flags.iommuv2Support; + svmAtomics_ = svmFineGrainSystem_; + // SVM is not currently supported for DX Interop #if defined(_WIN32) enableExtension(ClKhrD3d9Sharing); diff --git a/projects/clr/rocclr/runtime/device/pal/palvirtual.cpp b/projects/clr/rocclr/runtime/device/pal/palvirtual.cpp index 27b35e9bbf..55b3093c84 100644 --- a/projects/clr/rocclr/runtime/device/pal/palvirtual.cpp +++ b/projects/clr/rocclr/runtime/device/pal/palvirtual.cpp @@ -793,8 +793,7 @@ VirtualGPU::create(bool profiling, uint deviceQueueSize, uint rtCUs, if (dev().numDMAEngines() != 0) { uint sdma; // If only 1 DMA engine is available then use that one - if ((dev().numDMAEngines() < 2) || (idx & 0x1) || - (dev().settings().apuSystem_ && !dev().settings().svmFineGrainSystem_)) { + if ((dev().numDMAEngines() < 2) || ((idx & 0x1) && !dev().settings().svmFineGrainSystem_)) { sdma = 0; } else { @@ -2144,7 +2143,7 @@ VirtualGPU::submitKernelInternal( dispatchParam.pCpuAqlCode = hsaKernel.cpuAqlCode(); dispatchParam.hsaQueueVa = hsaQueueMem_->vmAddress(); dispatchParam.wavesPerSh = hsaKernel.getWavesPerSH(this); - + dispatchParam.useAtc = dev().settings().svmFineGrainSystem_ ? true : false; // Run AQL dispatch in HW eventBegin(MainEngine); iCmd()->CmdDispatchAql(dispatchParam);