From 78221f3e9bf3e1b756e2721d045998e8c2d21ba2 Mon Sep 17 00:00:00 2001 From: David Belanger Date: Mon, 26 Jun 2023 16:55:21 -0400 Subject: [PATCH] Add Blit shaders for GFX12 For GFX12, the workgroup id is passed in ttmp9 (trap temp register) instead of the scalar register. Normal shader code (i.e. not priv, not trap handler) can only read the ttmp registers. Signed-off-by: David Belanger Change-Id: I42404d8c8c0ee9c746e23879fd30b2d16cfa1787 Signed-off-by: Chris Freehill [ROCm/ROCR-Runtime commit: 40cc6559f1ed0d30a733fedcbe1109ab26590daf] --- .../core/runtime/amd_gpu_agent.cpp | 102 ++++++++++-------- .../core/runtime/blit_shaders/CMakeLists.txt | 5 +- .../runtime/blit_shaders/blit_copyAligned.s | 6 +- .../blit_shaders/blit_copyMisaligned.s | 7 +- .../core/runtime/blit_shaders/blit_fill.s | 7 +- 5 files changed, 77 insertions(+), 50 deletions(-) diff --git a/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/amd_gpu_agent.cpp b/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/amd_gpu_agent.cpp index 23d94e754d..463c686e98 100644 --- a/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/amd_gpu_agent.cpp +++ b/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/amd_gpu_agent.cpp @@ -263,68 +263,77 @@ void GpuAgent::AssembleShader(const char* func_name, AssembleTarget assemble_tar ASICShader compute_1010; ASICShader compute_10; ASICShader compute_11; + ASICShader compute_12; }; std::map compiled_shaders = { {"TrapHandler", { - {NULL, 0, 0, 0}, // gfx7 - {kCodeTrapHandler8, sizeof(kCodeTrapHandler8), 2, 4}, // gfx8 - {kCodeTrapHandler9, sizeof(kCodeTrapHandler9), 2, 4}, // gfx9 - {kCodeTrapHandler90a, sizeof(kCodeTrapHandler90a), 2, 4}, // gfx90a - {NULL, 0, 0, 0}, // gfx940 - {NULL, 0, 0, 0}, // gfx942 - {kCodeTrapHandler1010, sizeof(kCodeTrapHandler1010), 2, 4}, // gfx1010 - {kCodeTrapHandler10, sizeof(kCodeTrapHandler10), 2, 4}, // gfx10 - {NULL, 0, 0, 0}, // gfx11 + {NULL, 0, 0, 0}, // gfx7 + {kCodeTrapHandler8, sizeof(kCodeTrapHandler8), 2, 4}, // gfx8 + {kCodeTrapHandler9, sizeof(kCodeTrapHandler9), 2, 4}, // gfx9 + {kCodeTrapHandler90a, sizeof(kCodeTrapHandler90a), 2, 4}, // gfx90a + {NULL, 0, 0, 0}, // gfx940 + {NULL, 0, 0, 0}, // gfx942 + {kCodeTrapHandler1010, sizeof(kCodeTrapHandler1010), 2, 4}, // gfx1010 + {kCodeTrapHandler10, sizeof(kCodeTrapHandler10), 2, 4}, // gfx10 + {NULL, 0, 0, 0}, // gfx11 + // GFX12_TODO: Using one for GFX10 for now. + // If NULL is used (like GFX11), get an assert. + {kCodeTrapHandler10, sizeof(kCodeTrapHandler10), 2, 4}, // gfx12 }}, {"TrapHandlerKfdExceptions", { - {NULL, 0, 0, 0}, // gfx7 - {kCodeTrapHandler8, sizeof(kCodeTrapHandler8), 2, 4}, // gfx8 - {kCodeTrapHandlerV2_9, sizeof(kCodeTrapHandlerV2_9), 2, 4}, // gfx9 - {kCodeTrapHandlerV2_9, sizeof(kCodeTrapHandlerV2_9), 2, 4}, // gfx90a - {kCodeTrapHandlerV2_940, sizeof(kCodeTrapHandlerV2_940), 2, 4}, // gfx940 - {kCodeTrapHandlerV2_940, sizeof(kCodeTrapHandlerV2_940), 2, 4}, // gfx942 - {kCodeTrapHandlerV2_1010, sizeof(kCodeTrapHandlerV2_1010), 2, 4}, // gfx1010 - {kCodeTrapHandlerV2_10, sizeof(kCodeTrapHandlerV2_10), 2, 4}, // gfx10 - {kCodeTrapHandlerV2_11, sizeof(kCodeTrapHandlerV2_11), 2, 4}, // gfx11 + {NULL, 0, 0, 0}, // gfx7 + {kCodeTrapHandler8, sizeof(kCodeTrapHandler8), 2, 4}, // gfx8 + {kCodeTrapHandlerV2_9, sizeof(kCodeTrapHandlerV2_9), 2, 4}, // gfx9 + {kCodeTrapHandlerV2_9, sizeof(kCodeTrapHandlerV2_9), 2, 4}, // gfx90a + {kCodeTrapHandlerV2_940, sizeof(kCodeTrapHandlerV2_940), 2, 4}, // gfx940 + {kCodeTrapHandlerV2_940, sizeof(kCodeTrapHandlerV2_940), 2, 4}, // gfx942 + {kCodeTrapHandlerV2_1010, sizeof(kCodeTrapHandlerV2_1010), 2, 4},// gfx1010 + {kCodeTrapHandlerV2_10, sizeof(kCodeTrapHandlerV2_10), 2, 4}, // gfx10 + {kCodeTrapHandlerV2_11, sizeof(kCodeTrapHandlerV2_11), 2, 4}, // gfx11 + // GFX12_TODO: Using one for GFX11 for now. + {kCodeTrapHandlerV2_11, sizeof(kCodeTrapHandlerV2_11), 2, 4}, // gfx12 }}, {"CopyAligned", { - {kCodeCopyAligned7, sizeof(kCodeCopyAligned7), 32, 12}, // gfx7 - {kCodeCopyAligned8, sizeof(kCodeCopyAligned8), 32, 12}, // gfx8 - {kCodeCopyAligned9, sizeof(kCodeCopyAligned9), 32, 12}, // gfx9 - {kCodeCopyAligned9, sizeof(kCodeCopyAligned9), 32, 12}, // gfx90a - {kCodeCopyAligned940, sizeof(kCodeCopyAligned940), 32, 12}, // gfx940 - {kCodeCopyAligned9, sizeof(kCodeCopyAligned9), 32, 12}, // gfx942 - {kCodeCopyAligned10, sizeof(kCodeCopyAligned10), 32, 12}, // gfx1010 - {kCodeCopyAligned10, sizeof(kCodeCopyAligned10), 32, 12}, // gfx10 - {kCodeCopyAligned11, sizeof(kCodeCopyAligned11), 32, 12}, // gfx11 + {kCodeCopyAligned7, sizeof(kCodeCopyAligned7), 32, 12}, // gfx7 + {kCodeCopyAligned8, sizeof(kCodeCopyAligned8), 32, 12}, // gfx8 + {kCodeCopyAligned9, sizeof(kCodeCopyAligned9), 32, 12}, // gfx9 + {kCodeCopyAligned9, sizeof(kCodeCopyAligned9), 32, 12}, // gfx90a + {kCodeCopyAligned940, sizeof(kCodeCopyAligned940), 32, 12}, // gfx940 + {kCodeCopyAligned9, sizeof(kCodeCopyAligned9), 32, 12}, // gfx942 + {kCodeCopyAligned10, sizeof(kCodeCopyAligned10), 32, 12}, // gfx1010 + {kCodeCopyAligned10, sizeof(kCodeCopyAligned10), 32, 12}, // gfx10 + {kCodeCopyAligned11, sizeof(kCodeCopyAligned11), 32, 12}, // gfx11 + {kCodeCopyAligned12, sizeof(kCodeCopyAligned12), 32, 12}, // gfx12 }}, {"CopyMisaligned", { - {kCodeCopyMisaligned7, sizeof(kCodeCopyMisaligned7), 23, 10}, // gfx7 - {kCodeCopyMisaligned8, sizeof(kCodeCopyMisaligned8), 23, 10}, // gfx8 - {kCodeCopyMisaligned9, sizeof(kCodeCopyMisaligned9), 23, 10}, // gfx9 - {kCodeCopyMisaligned9, sizeof(kCodeCopyMisaligned9), 23, 10}, // gfx90a - {kCodeCopyMisaligned940, sizeof(kCodeCopyMisaligned940), 23, 10}, // gfx940 - {kCodeCopyMisaligned9, sizeof(kCodeCopyMisaligned9), 23, 10}, // gfx942 - {kCodeCopyMisaligned10, sizeof(kCodeCopyMisaligned10), 23, 10}, // gfx1010 - {kCodeCopyMisaligned10, sizeof(kCodeCopyMisaligned10), 23, 10}, // gfx10 - {kCodeCopyMisaligned11, sizeof(kCodeCopyMisaligned11), 23, 10}, // gfx11 + {kCodeCopyMisaligned7, sizeof(kCodeCopyMisaligned7), 23, 10}, // gfx7 + {kCodeCopyMisaligned8, sizeof(kCodeCopyMisaligned8), 23, 10}, // gfx8 + {kCodeCopyMisaligned9, sizeof(kCodeCopyMisaligned9), 23, 10}, // gfx9 + {kCodeCopyMisaligned9, sizeof(kCodeCopyMisaligned9), 23, 10}, // gfx90a + {kCodeCopyMisaligned940, sizeof(kCodeCopyMisaligned940), 23, 10},// gfx940 + {kCodeCopyMisaligned9, sizeof(kCodeCopyMisaligned9), 23, 10}, // gfx942 + {kCodeCopyMisaligned10, sizeof(kCodeCopyMisaligned10), 23, 10}, // gfx1010 + {kCodeCopyMisaligned10, sizeof(kCodeCopyMisaligned10), 23, 10}, // gfx10 + {kCodeCopyMisaligned11, sizeof(kCodeCopyMisaligned11), 23, 10}, // gfx11 + {kCodeCopyMisaligned12, sizeof(kCodeCopyMisaligned12), 23, 10}, // gfx12 }}, {"Fill", { - {kCodeFill7, sizeof(kCodeFill7), 19, 8}, // gfx7 - {kCodeFill8, sizeof(kCodeFill8), 19, 8}, // gfx8 - {kCodeFill9, sizeof(kCodeFill9), 19, 8}, // gfx9 - {kCodeFill9, sizeof(kCodeFill9), 19, 8}, // gfx90a - {kCodeFill940, sizeof(kCodeFill940), 19, 8}, // gfx940 - {kCodeFill9, sizeof(kCodeFill9), 19, 8}, // gfx942 - {kCodeFill10, sizeof(kCodeFill10), 19, 8}, // gfx1010 - {kCodeFill10, sizeof(kCodeFill10), 19, 8}, // gfx10 - {kCodeFill11, sizeof(kCodeFill11), 19, 8}, // gfx11 + {kCodeFill7, sizeof(kCodeFill7), 19, 8}, // gfx7 + {kCodeFill8, sizeof(kCodeFill8), 19, 8}, // gfx8 + {kCodeFill9, sizeof(kCodeFill9), 19, 8}, // gfx9 + {kCodeFill9, sizeof(kCodeFill9), 19, 8}, // gfx90a + {kCodeFill940, sizeof(kCodeFill940), 19, 8}, // gfx940 + {kCodeFill9, sizeof(kCodeFill9), 19, 8}, // gfx942 + {kCodeFill10, sizeof(kCodeFill10), 19, 8}, // gfx1010 + {kCodeFill10, sizeof(kCodeFill10), 19, 8}, // gfx10 + {kCodeFill11, sizeof(kCodeFill11), 19, 8}, // gfx11 + {kCodeFill12, sizeof(kCodeFill12), 19, 8}, // gfx12 }}}; auto compiled_shader_it = compiled_shaders.find(func_name); @@ -367,6 +376,9 @@ void GpuAgent::AssembleShader(const char* func_name, AssembleTarget assemble_tar case 11: asic_shader = &compiled_shader_it->second.compute_11; break; + case 12: + asic_shader = &compiled_shader_it->second.compute_12; + break; default: assert(false && "Precompiled shader unavailable for target"); } diff --git a/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/blit_shaders/CMakeLists.txt b/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/blit_shaders/CMakeLists.txt index dc32b2f2bc..e63d380b8f 100644 --- a/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/blit_shaders/CMakeLists.txt +++ b/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/blit_shaders/CMakeLists.txt @@ -49,9 +49,10 @@ find_package(Clang REQUIRED HINTS ${CMAKE_PREFIX_PATH}/llvm PATHS /opt/rocm/llvm find_package(LLVM REQUIRED HINTS ${CMAKE_PREFIX_PATH}/llvm PATHS /opt/rocm/llvm ) # Set the target devices -set (TARGET_DEVS "gfx900;gfx940;gfx1010;gfx1030;gfx1100") +set (TARGET_DEVS "gfx900;gfx940;gfx1010;gfx1030;gfx1100;gfx1200") + # Set the postfix for each target device -set (POSTFIX "9;940;1010;10;11") +set (POSTFIX "9;940;1010;10;11;12") # If verbose output is enabled, print paths and target devices if(${CMAKE_VERBOSE_MAKEFILE}) diff --git a/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/blit_shaders/blit_copyAligned.s b/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/blit_shaders/blit_copyAligned.s index 750366ff6b..c861147aa0 100644 --- a/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/blit_shaders/blit_copyAligned.s +++ b/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/blit_shaders/blit_copyAligned.s @@ -146,8 +146,12 @@ compute_pgm_rsrc1_vgprs = CopyAlignedRsrc1VGPRs s_load_dword s24, s[0:1], 0x50 s_waitcnt lgkmcnt(0) - + .if (.amdgcn.gfx_generation_number == 12) + s_lshl_b32 s2, ttmp9, 0x6 + .else s_lshl_b32 s2, s2, 0x6 + .endif + V_ADD_CO_U32 v0, s2, v0 v_mov_b32 v3, s5 diff --git a/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/blit_shaders/blit_copyMisaligned.s b/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/blit_shaders/blit_copyMisaligned.s index a63b2ace55..48a5b3ec35 100644 --- a/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/blit_shaders/blit_copyMisaligned.s +++ b/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/blit_shaders/blit_copyMisaligned.s @@ -117,7 +117,12 @@ CopyMisaligned: s_load_dword s16, s[0:1], 0x30 s_waitcnt lgkmcnt(0) - s_lshl_b32 s2, s2, 0x6 + .if (.amdgcn.gfx_generation_number == 12) + s_lshl_b32 s2, ttmp9, 0x6 + .else + s_lshl_b32 s2, s2, 0x6 + .endif + V_ADD_CO_U32 v0, s2, v0 v_mov_b32 v3, s5 diff --git a/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/blit_shaders/blit_fill.s b/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/blit_shaders/blit_fill.s index bdc4fbcc56..752499b4f0 100644 --- a/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/blit_shaders/blit_fill.s +++ b/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/blit_shaders/blit_fill.s @@ -117,7 +117,12 @@ Fill: s_load_dwordx4 s[8:11], s[0:1], 0x10 s_waitcnt lgkmcnt(0) - s_lshl_b32 s2, s2, 0x6 + .if (.amdgcn.gfx_generation_number == 12) + s_lshl_b32 s2, ttmp9, 0x6 + .else + s_lshl_b32 s2, s2, 0x6 + .endif + V_ADD_CO_U32 v0, s2, v0 .macro mFillPattern iter iter_end