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SWDEV-518209: GPU Metrics 1.8 (#177)

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- Updates:
    - Adding the following metrics to allow new calculations for violation status:
        - Per XCP metrics gfx_below_host_limit_ppt_acc
        - Per XCP metrics gfx_below_host_limit_thm_acc
        - Per XCP metrics gfx_low_utilization_acc
        - Per XCP metrics gfx_below_host_limit_total_acc
    - Increasing available JPEG engines to 40. Current ASICs may not support all 40. These will be indicated as UINT16_MAX or N/A in CLI.

Signed-off-by: Juan Castillo <juan.castillo@amd.com>
Co-authored-by: Charis Poag <Charis.Poag@amd.com>
This commit is contained in:
Castillo, Juan
2025-03-19 10:24:02 -05:00
committed by GitHub
parent fba8b3f6e1
commit 7c882b2f69
9 changed files with 857 additions and 690 deletions
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include/amd_smi/amdsmi.h
+21 -4
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@@ -152,6 +152,12 @@ typedef enum {
*/
#define AMDSMI_MAX_NUM_JPEG 32
/**
* @brief new for gpu metrics v1.8, document presents NUM_JPEG_ENG_V1
* but will change to AMDSMI_MAX_NUM_JPEG_ENG_V1 for continuity
*/
#define AMDSMI_MAX_NUM_JPEG_ENG_V1 40
/**
* @brief This should match AMDSMI_MAX_NUM_XCC;
* XCC - Accelerated Compute Core, the collection of compute units,
@@ -1688,9 +1694,9 @@ typedef struct {
* @brief v1.6 additions
* The max uint32_t will be used if that information is N/A
*/
uint32_t gfx_busy_inst[AMDSMI_MAX_NUM_XCC]; //!< Utilization Instantaneous in %
uint16_t jpeg_busy[AMDSMI_MAX_NUM_JPEG]; //!< Utilization Instantaneous in %
uint16_t vcn_busy[AMDSMI_MAX_NUM_VCN]; //!< Utilization Instantaneous in %
uint32_t gfx_busy_inst[AMDSMI_MAX_NUM_XCC]; //!< Utilization Instantaneous in %
uint16_t jpeg_busy[AMDSMI_MAX_NUM_JPEG_ENG_V1]; //!< Utilization Instantaneous in % (UPDATED: to 40 in v1.8)
uint16_t vcn_busy[AMDSMI_MAX_NUM_VCN]; //!< Utilization Instantaneous in %
uint64_t gfx_busy_acc[AMDSMI_MAX_NUM_XCC]; //!< Utilization Accumulated in %
@@ -1699,6 +1705,17 @@ typedef struct {
*/
/* Total App Clock Counter Accumulated */
uint64_t gfx_below_host_limit_acc[AMDSMI_MAX_NUM_XCC]; //!< Total App Clock Counter Accumulated
/**
* @brief v1.8 additions
*/
/* Total App Clock Counter Accumulated */
uint64_t gfx_below_host_limit_ppt_acc[AMDSMI_MAX_NUM_XCC];
uint64_t gfx_below_host_limit_thm_acc[AMDSMI_MAX_NUM_XCC];
uint64_t gfx_low_utilization_acc[AMDSMI_MAX_NUM_XCC];
uint64_t gfx_below_host_limit_total_acc[AMDSMI_MAX_NUM_XCC];
} amdsmi_gpu_xcp_metrics_t;
/**
@@ -1889,7 +1906,7 @@ typedef struct {
uint32_t pcie_lc_perf_other_end_recovery; //!< PCIE other end recovery counter
/*
/**
* @brief v1.7 additions
*/
uint64_t vram_max_bandwidth; //!< VRAM max bandwidth at max memory clock (GB/s)