diff --git a/rocclr/compiler/lib/utils/v0_8/target_mappings_amdil.h b/rocclr/compiler/lib/utils/v0_8/target_mappings_amdil.h
index be37ed9050..6e96c101d3 100644
--- a/rocclr/compiler/lib/utils/v0_8/target_mappings_amdil.h
+++ b/rocclr/compiler/lib/utils/v0_8/target_mappings_amdil.h
@@ -99,7 +99,9 @@ static const TargetMapping AMDILTargetMapping_0_8[] = {
   { "VI", "Fiji",       "fiji",    amd::GPU_Library_CI,        VI_FIJI_P_A0,            F_SI_BASE, true,  true, FAMILY_VI },
   { "CZ", "Stoney",     "stoney",  amd::GPU_Library_CI,        STONEY_A0,               F_SI_BASE, true, true, FAMILY_CZ },
   { "VI", "Baffin",     "baffin",  amd::GPU_Library_CI,        VI_BAFFIN_M_A0,          F_SI_BASE, true,  true, FAMILY_VI },
+  { "VI", "Baffin",     "baffin",  amd::GPU_Library_CI,        VI_BAFFIN_M_A1,          F_SI_BASE, true,  true, FAMILY_VI },
   { "VI", "Ellesmere",  "ellesmere", amd::GPU_Library_CI,      VI_ELLESMERE_P_A0,       F_SI_BASE, true,  true, FAMILY_VI },
+  { "VI", "Ellesmere",  "ellesmere", amd::GPU_Library_CI,      VI_ELLESMERE_P_A1,       F_SI_BASE, true,  true, FAMILY_VI },
 #ifndef BRAHMA
   { "VI", "gfx804",     "gfx804",    amd::GPU_Library_CI,      VI_LEXA_V_A0,            F_SI_BASE, true,  true, FAMILY_VI },
 #else
diff --git a/rocclr/compiler/lib/utils/v0_8/target_mappings_amdil64.h b/rocclr/compiler/lib/utils/v0_8/target_mappings_amdil64.h
index 037d6527ae..696433868b 100644
--- a/rocclr/compiler/lib/utils/v0_8/target_mappings_amdil64.h
+++ b/rocclr/compiler/lib/utils/v0_8/target_mappings_amdil64.h
@@ -45,7 +45,9 @@ static const TargetMapping AMDIL64TargetMapping_0_8[] = {
   { "VI", "Fiji",      "fiji",      amd::GPU64_Library_CI, VI_FIJI_P_A0,       F_SI_64BIT_PTR, true,  true,  FAMILY_VI },
   { "CZ", "Stoney",    "stoney",    amd::GPU64_Library_CI, STONEY_A0,          F_SI_64BIT_PTR, true,  true,  FAMILY_CZ },
   { "VI", "Baffin",    "baffin",    amd::GPU64_Library_CI, VI_BAFFIN_M_A0,     F_SI_64BIT_PTR, true,  true,  FAMILY_VI },
+  { "VI", "Baffin",    "baffin",    amd::GPU64_Library_CI, VI_BAFFIN_M_A1,     F_SI_64BIT_PTR, true,  true,  FAMILY_VI },
   { "VI", "Ellesmere", "ellesmere", amd::GPU64_Library_CI, VI_ELLESMERE_P_A0,  F_SI_64BIT_PTR, true,  true,  FAMILY_VI },
+  { "VI", "Ellesmere", "ellesmere", amd::GPU64_Library_CI, VI_ELLESMERE_P_A1,  F_SI_64BIT_PTR, true,  true,  FAMILY_VI },
 #ifndef BRAHMA
   { "VI", "gfx804",    "gfx804",    amd::GPU64_Library_CI, VI_LEXA_V_A0,       F_SI_64BIT_PTR, true,  true,  FAMILY_VI },
 #else
diff --git a/rocclr/compiler/lib/utils/v0_8/target_mappings_hsail.h b/rocclr/compiler/lib/utils/v0_8/target_mappings_hsail.h
index bbea482e0d..71267c5e9b 100644
--- a/rocclr/compiler/lib/utils/v0_8/target_mappings_hsail.h
+++ b/rocclr/compiler/lib/utils/v0_8/target_mappings_hsail.h
@@ -30,7 +30,9 @@ static const TargetMapping HSAILTargetMapping_0_8[] = {
   { "VI", "Fiji",      "GFX8", amd::GPU_Library_HSAIL, VI_FIJI_P_A0,    F_VI_BASE, true, true,  FAMILY_VI },
   { "CZ", "Stoney",    "GFX8", amd::GPU_Library_HSAIL, STONEY_A0,       F_VI_BASE, true, true,  FAMILY_CZ },
   { "VI", "Baffin",    "GFX8", amd::GPU_Library_HSAIL, VI_BAFFIN_M_A0,  F_VI_BASE, true, true,  FAMILY_VI },
+  { "VI", "Baffin",    "GFX8", amd::GPU_Library_HSAIL, VI_BAFFIN_M_A1,  F_VI_BASE, true, true,  FAMILY_VI },
   { "VI", "Ellesmere", "GFX8", amd::GPU_Library_HSAIL, VI_ELLESMERE_P_A0, F_VI_BASE, true, true,  FAMILY_VI },
+  { "VI", "Ellesmere", "GFX8", amd::GPU_Library_HSAIL, VI_ELLESMERE_P_A1, F_VI_BASE, true, true,  FAMILY_VI },
 #ifndef BRAHMA
   { "AI", "gfx900",    "GFX9", amd::GPU_Library_HSAIL, AI_GREENLAND_P_A0, F_AI_BASE, true, true,  FAMILY_AI },
   { "VI", "gfx804",    "GFX8", amd::GPU_Library_HSAIL, VI_LEXA_V_A0,    F_VI_BASE, true, true,  FAMILY_VI },
diff --git a/rocclr/compiler/lib/utils/v0_8/target_mappings_hsail64.h b/rocclr/compiler/lib/utils/v0_8/target_mappings_hsail64.h
index 2080140a28..419274ef8c 100644
--- a/rocclr/compiler/lib/utils/v0_8/target_mappings_hsail64.h
+++ b/rocclr/compiler/lib/utils/v0_8/target_mappings_hsail64.h
@@ -29,7 +29,9 @@ static const TargetMapping HSAIL64TargetMapping_0_8[] = {
   { "VI", "Fiji",      "GFX8", amd::GPU_Library_HSAIL, VI_FIJI_P_A0,    F_VI_BASE, true, true,  FAMILY_VI },
   { "CZ", "Stoney",    "GFX8", amd::GPU_Library_HSAIL, STONEY_A0,       F_VI_BASE, true, true,  FAMILY_CZ },
   { "VI", "Baffin",    "GFX8", amd::GPU_Library_HSAIL, VI_BAFFIN_M_A0,  F_VI_BASE, true, true,  FAMILY_VI },
+  { "VI", "Baffin",    "GFX8", amd::GPU_Library_HSAIL, VI_BAFFIN_M_A1,  F_VI_BASE, true, true,  FAMILY_VI },
   { "VI", "Ellesmere", "GFX8", amd::GPU_Library_HSAIL, VI_ELLESMERE_P_A0, F_VI_BASE, true, true,  FAMILY_VI },
+  { "VI", "Ellesmere", "GFX8", amd::GPU_Library_HSAIL, VI_ELLESMERE_P_A1, F_VI_BASE, true, true,  FAMILY_VI },
 #ifndef BRAHMA
   { "AI", "gfx900",    "GFX9", amd::GPU_Library_HSAIL, AI_GREENLAND_P_A0, F_AI_BASE, true, true,  FAMILY_AI },
   { "VI", "gfx804",    "GFX8", amd::GPU_Library_HSAIL, VI_LEXA_V_A0,    F_VI_BASE, true, true,  FAMILY_VI },