SWDEV-329590 - Addresses coherency test failures on Navi21 (#2652)
- Tests using HSA_XNACK=1 restricted to MI200 - Added checks to verify HMM and Pageable memory access attributes to avoid failures Change-Id: Ic0b107264378ce0c4f0aab770c941ae2b57342c2
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ee541eaef1
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2 files changed
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@@ -113,9 +113,8 @@ TEST_CASE("Unit_malloc_CoherentTst") {
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REQUIRE(false);
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}
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/* GpuId[0] for gfx906 exists--> 1 for yes and 0 for no
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GpuId[0] for gfx908 exists--> 1 for yes and 0 for no*/
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int GpuId[2] = {0, 0};
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/* GpuId[0] for gfx90a exists--> 1 for yes and 0 for no*/
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int GpuId[1] = {0};
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p = fork();
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if (p < 0) {
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@@ -128,8 +127,8 @@ TEST_CASE("Unit_malloc_CoherentTst") {
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// Read string from child and close reading end.
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read(fd1[0], GpuId, 2 * sizeof(int));
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close(fd1[0]);
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if ((GpuId[0] == 1) || (GpuId[1] == 1)) {
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WARN("This test is not applicable on MI60 & MI100."
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if (GpuId[0] == 0) {
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WARN("This test is applicable for MI200."
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"Skipping the test!!");
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exit(0);
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}
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@@ -138,16 +137,11 @@ TEST_CASE("Unit_malloc_CoherentTst") {
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hipDeviceProp_t prop;
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HIPCHECK(hipGetDeviceProperties(&prop, 0));
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char *p = NULL;
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p = strstr(prop.gcnArchName, "gfx906");
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p = strstr(prop.gcnArchName, "gfx90a");
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if (p) {
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WARN("gfx906 gpu found on this system!!");
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WARN("gfx90a gpu found on this system!!");
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GpuId[0] = 1;
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}
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p = strstr(prop.gcnArchName, "gfx908");
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if (p) {
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WARN("gfx908 gpu found on this system!!");
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GpuId[1] = 1;
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}
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// Write concatenated string and close writing end
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write(fd1[1], GpuId, 2 * sizeof(int));
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close(fd1[1]);
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@@ -208,9 +202,8 @@ TEST_CASE("Unit_malloc_CoherentTstWthAdvise") {
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REQUIRE(false);
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}
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/* GpuId[0] for gfx906 exists--> 1 for yes and 0 for no
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GpuId[0] for gfx908 exists--> 1 for yes and 0 for no*/
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int GpuId[2] = {0, 0};
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/* GpuId[0] for gfx90a exists--> 1 for yes and 0 for no */
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int GpuId[1] = {0};
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p = fork();
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if (p < 0) {
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@@ -223,8 +216,8 @@ TEST_CASE("Unit_malloc_CoherentTstWthAdvise") {
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// Read string from child and close reading end.
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read(fd1[0], GpuId, 2 * sizeof(int));
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close(fd1[0]);
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if ((GpuId[0] == 1) || (GpuId[1] == 1)) {
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WARN("This test is not applicable on MI60 & MI100."
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if (GpuId[0] == 0) {
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WARN("This test is applicable for MI200."
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"Skipping the test!!");
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exit(0);
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}
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@@ -233,16 +226,11 @@ TEST_CASE("Unit_malloc_CoherentTstWthAdvise") {
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hipDeviceProp_t prop;
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HIPCHECK(hipGetDeviceProperties(&prop, 0));
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char *p = NULL;
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p = strstr(prop.gcnArchName, "gfx906");
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p = strstr(prop.gcnArchName, "gfx90a");
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if (p) {
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WARN("gfx906 gpu found on this system!!");
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WARN("gfx90a gpu found on this system!!");
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GpuId[0] = 1;
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}
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p = strstr(prop.gcnArchName, "gfx908");
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if (p) {
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WARN("gfx908 gpu found on this system!!");
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GpuId[1] = 1;
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}
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// Write concatenated string and close writing end
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write(fd1[1], GpuId, 2 * sizeof(int));
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close(fd1[1]);
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@@ -305,9 +293,8 @@ TEST_CASE("Unit_mmap_CoherentTst") {
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REQUIRE(false);
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}
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/* GpuId[0] for gfx906 exists--> 1 for yes and 0 for no
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GpuId[0] for gfx908 exists--> 1 for yes and 0 for no*/
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int GpuId[2] = {0, 0};
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/* GpuId[0] for gfx90a exists--> 1 for yes and 0 for no */
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int GpuId[1] = {0};
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p = fork();
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if (p < 0) {
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@@ -320,8 +307,8 @@ TEST_CASE("Unit_mmap_CoherentTst") {
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// Read string from child and close reading end.
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read(fd1[0], GpuId, 2 * sizeof(int));
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close(fd1[0]);
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if ((GpuId[0] == 1) || (GpuId[1] == 1)) {
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WARN("This test is not applicable on MI60 & MI100."
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if (GpuId[0] == 0) {
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WARN("This test is not applicable for MI200."
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"Skipping the test!!");
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exit(0);
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}
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@@ -330,16 +317,11 @@ TEST_CASE("Unit_mmap_CoherentTst") {
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hipDeviceProp_t prop;
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HIPCHECK(hipGetDeviceProperties(&prop, 0));
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char *p = NULL;
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p = strstr(prop.gcnArchName, "gfx906");
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p = strstr(prop.gcnArchName, "gfx90a");
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if (p) {
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WARN("gfx906 gpu found on this system!!");
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WARN("gfx90a gpu found on this system!!");
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GpuId[0] = 1;
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}
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p = strstr(prop.gcnArchName, "gfx908");
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if (p) {
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WARN("gfx908 gpu found on this system!!");
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GpuId[1] = 1;
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}
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// Write concatenated string and close writing end
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write(fd1[1], GpuId, 2 * sizeof(int));
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close(fd1[1]);
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@@ -403,9 +385,8 @@ TEST_CASE("Unit_mmap_CoherentTstWthAdvise") {
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REQUIRE(false);
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}
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/* GpuId[0] for gfx906 exists--> 1 for yes and 0 for no
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GpuId[0] for gfx908 exists--> 1 for yes and 0 for no*/
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int GpuId[2] = {0, 0};
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/* GpuId[0] for gfx90a exists--> 1 for yes and 0 for no */
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int GpuId[1] = {0};
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p = fork();
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if (p < 0) {
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@@ -418,8 +399,8 @@ TEST_CASE("Unit_mmap_CoherentTstWthAdvise") {
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// Read string from child and close reading end.
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read(fd1[0], GpuId, 2 * sizeof(int));
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close(fd1[0]);
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if ((GpuId[0] == 1) || (GpuId[1] == 1)) {
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WARN("This test is not applicable on MI60 & MI100."
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if (GpuId[0] == 0) {
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WARN("This test is applicable for MI200."
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"Skipping the test!!");
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exit(0);
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}
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@@ -428,16 +409,11 @@ TEST_CASE("Unit_mmap_CoherentTstWthAdvise") {
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hipDeviceProp_t prop;
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HIPCHECK(hipGetDeviceProperties(&prop, 0));
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char *p = NULL;
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p = strstr(prop.gcnArchName, "gfx906");
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p = strstr(prop.gcnArchName, "gfx90a");
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if (p) {
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WARN("gfx906 gpu found on this system!!");
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WARN("gfx90a gpu found on this system!!");
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GpuId[0] = 1;
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}
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p = strstr(prop.gcnArchName, "gfx908");
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if (p) {
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WARN("gfx908 gpu found on this system!!");
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GpuId[1] = 1;
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}
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// Write concatenated string and close writing end
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write(fd1[1], GpuId, 2 * sizeof(int));
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close(fd1[1]);
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@@ -497,7 +473,7 @@ TEST_CASE("Unit_mmap_CoherentTstWthAdvise") {
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#if HT_AMD
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TEST_CASE("Unit_hipHostMalloc_WthEnv0Flg1") {
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if ((setenv("HIP_HOST_COHERENT", "0", 1)) != 0) {
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WARN("Unable to turn on HSA_XNACK, hence terminating the Test case!");
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WARN("Unable to turn on HIP_HOST_COHERENT, hence terminating the Test case!");
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REQUIRE(false);
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}
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int stat = 0;
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@@ -538,7 +514,7 @@ TEST_CASE("Unit_hipHostMalloc_WthEnv0Flg1") {
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#if HT_AMD
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TEST_CASE("Unit_hipHostMalloc_WthEnv0Flg2") {
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if ((setenv("HIP_HOST_COHERENT", "0", 1)) != 0) {
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WARN("Unable to turn on HSA_XNACK, hence terminating the Test case!");
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WARN("Unable to turn on HIP_HOST_COHERENT, hence terminating the Test case!");
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REQUIRE(false);
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}
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int stat = 0;
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@@ -579,7 +555,7 @@ TEST_CASE("Unit_hipHostMalloc_WthEnv0Flg2") {
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#if HT_AMD
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TEST_CASE("Unit_hipHostMalloc_WthEnv0Flg3") {
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if ((setenv("HIP_HOST_COHERENT", "0", 1)) != 0) {
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WARN("Unable to turn on HSA_XNACK, hence terminating the Test case!");
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WARN("Unable to turn on HIP_HOST_COHERENT, hence terminating the Test case!");
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REQUIRE(false);
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}
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int stat = 0;
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@@ -587,7 +563,7 @@ TEST_CASE("Unit_hipHostMalloc_WthEnv0Flg3") {
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int *Ptr = nullptr, *PtrD = nullptr, SIZE = sizeof(int);
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YES_COHERENT = false;
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// Allocating hipHostMalloc() memory
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HIP_CHECK(hipHostMalloc(&Ptr, SIZE, hipHostMallocNumaUser));
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HIP_CHECK(hipHostMalloc(&Ptr, SIZE, hipHostMallocNumaUser));
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*Ptr = 4;
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hipStream_t strm;
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HIP_CHECK(hipStreamCreate(&strm));
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@@ -620,7 +596,7 @@ TEST_CASE("Unit_hipHostMalloc_WthEnv0Flg3") {
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#if HT_AMD
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TEST_CASE("Unit_hipHostMalloc_WthEnv0Flg4") {
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if ((setenv("HIP_HOST_COHERENT", "0", 1)) != 0) {
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WARN("Unable to turn on HSA_XNACK, hence terminating the Test case!");
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WARN("Unable to turn on HIP_HOST_COHERENT, hence terminating the Test case!");
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REQUIRE(false);
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}
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int stat = 0;
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@@ -662,33 +638,43 @@ TEST_CASE("Unit_hipHostMalloc_WthEnv0Flg4") {
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#if HT_AMD
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TEST_CASE("Unit_hipHostMalloc_WthEnv1") {
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if ((setenv("HIP_HOST_COHERENT", "1", 1)) != 0) {
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WARN("Unable to turn on HSA_XNACK, hence terminating the Test case!");
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WARN("Unable to turn on HIP_HOST_COHERENT, hence terminating the Test case!");
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REQUIRE(false);
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}
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int stat = 0;
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if (fork() == 0) { // child process
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int *Ptr = nullptr, SIZE = sizeof(int);
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bool HmmMem = false;
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YES_COHERENT = false;
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// Allocating hipHostMalloc() memory
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HIP_CHECK(hipHostMalloc(&Ptr, SIZE));
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*Ptr = 4;
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TstCoherency(Ptr, HmmMem);
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if (YES_COHERENT) {
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// exit() with code 10 which indicates pass
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HIP_CHECK(hipHostFree(Ptr));
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exit(10);
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} else {
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// exit() with code 9 which indicates fail
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HIP_CHECK(hipHostFree(Ptr));
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exit(9);
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}
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} else { // parent process
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wait(&stat);
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int Result = WEXITSTATUS(stat);
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if (Result != 10) {
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REQUIRE(false);
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int stat = 0, Pageable = 0;
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HIP_CHECK(hipDeviceGetAttribute(&Pageable,
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hipDeviceAttributePageableMemoryAccess, 0));
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INFO("hipDeviceAttributePageableMemoryAccess: " << Pageable);
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if (Pageable) {
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if (fork() == 0) { // child process
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int *Ptr = nullptr, SIZE = sizeof(int);
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bool HmmMem = false;
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YES_COHERENT = false;
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// Allocating hipHostMalloc() memory
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HIP_CHECK(hipHostMalloc(&Ptr, SIZE));
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*Ptr = 4;
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TstCoherency(Ptr, HmmMem);
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if (YES_COHERENT) {
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// exit() with code 10 which indicates pass
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HIP_CHECK(hipHostFree(Ptr));
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exit(10);
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} else {
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// exit() with code 9 which indicates fail
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HIP_CHECK(hipHostFree(Ptr));
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exit(9);
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}
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} else { // parent process
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wait(&stat);
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int Result = WEXITSTATUS(stat);
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if (Result != 10) {
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REQUIRE(false);
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}
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}
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} else {
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SUCCEED("GPU 0 doesn't support hipDeviceAttributePageableMemoryAccess "
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"attribute. Hence skipping the test with Pass result.\n");
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}
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}
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#endif
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@@ -700,33 +686,43 @@ TEST_CASE("Unit_hipHostMalloc_WthEnv1") {
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#if HT_AMD
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TEST_CASE("Unit_hipHostMalloc_WthEnv1Flg1") {
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if ((setenv("HIP_HOST_COHERENT", "1", 1)) != 0) {
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WARN("Unable to turn on HSA_XNACK, hence terminating the Test case!");
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WARN("Unable to turn on HIP_HOST_COHERENT, hence terminating the Test case!");
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REQUIRE(false);
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}
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int stat = 0;
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if (fork() == 0) { // child process
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int *Ptr = nullptr, SIZE = sizeof(int);
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bool HmmMem = false;
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YES_COHERENT = false;
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// Allocating hipHostMalloc() memory
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HIP_CHECK(hipHostMalloc(&Ptr, SIZE, hipHostMallocPortable));
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*Ptr = 1;
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TstCoherency(Ptr, HmmMem);
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if (YES_COHERENT) {
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// exit() with code 10 which indicates pass
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HIP_CHECK(hipHostFree(Ptr));
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exit(10);
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} else {
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// exit() with code 9 which indicates fail
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HIP_CHECK(hipHostFree(Ptr));
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exit(9);
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}
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} else { // parent process
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wait(&stat);
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int Result = WEXITSTATUS(stat);
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if (Result != 10) {
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REQUIRE(false);
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int stat = 0, Pageable = 0;
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HIP_CHECK(hipDeviceGetAttribute(&Pageable,
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hipDeviceAttributePageableMemoryAccess, 0));
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INFO("hipDeviceAttributePageableMemoryAccess: " << Pageable);
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if (Pageable) {
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if (fork() == 0) { // child process
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int *Ptr = nullptr, SIZE = sizeof(int);
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bool HmmMem = false;
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YES_COHERENT = false;
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// Allocating hipHostMalloc() memory
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HIP_CHECK(hipHostMalloc(&Ptr, SIZE, hipHostMallocPortable));
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*Ptr = 1;
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TstCoherency(Ptr, HmmMem);
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if (YES_COHERENT) {
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// exit() with code 10 which indicates pass
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HIP_CHECK(hipHostFree(Ptr));
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exit(10);
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} else {
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// exit() with code 9 which indicates fail
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HIP_CHECK(hipHostFree(Ptr));
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exit(9);
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}
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} else { // parent process
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wait(&stat);
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int Result = WEXITSTATUS(stat);
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if (Result != 10) {
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REQUIRE(false);
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}
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}
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} else {
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SUCCEED("GPU 0 doesn't support hipDeviceAttributePageableMemoryAccess "
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"attribute. Hence skipping the test with Pass result.\n");
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}
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}
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#endif
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@@ -737,33 +733,43 @@ TEST_CASE("Unit_hipHostMalloc_WthEnv1Flg1") {
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#if HT_AMD
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TEST_CASE("Unit_hipHostMalloc_WthEnv1Flg2") {
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if ((setenv("HIP_HOST_COHERENT", "1", 1)) != 0) {
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WARN("Unable to turn on HSA_XNACK, hence terminating the Test case!");
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WARN("Unable to turn on HIP_HOST_COHERENT, hence terminating the Test case!");
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REQUIRE(false);
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}
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int stat = 0;
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if (fork() == 0) { // child process
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int *Ptr = nullptr, SIZE = sizeof(int);
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bool HmmMem = false;
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YES_COHERENT = false;
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// Allocating hipHostMalloc() memory
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HIP_CHECK(hipHostMalloc(&Ptr, SIZE, hipHostMallocWriteCombined));
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*Ptr = 4;
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TstCoherency(Ptr, HmmMem);
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if (YES_COHERENT) {
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// exit() with code 10 which indicates pass
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HIP_CHECK(hipHostFree(Ptr));
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exit(10);
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} else {
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// exit() with code 9 which indicates fail
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HIP_CHECK(hipHostFree(Ptr));
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exit(9);
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}
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} else { // parent process
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wait(&stat);
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int Result = WEXITSTATUS(stat);
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if (Result != 10) {
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REQUIRE(false);
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int stat = 0, Pageable = 0;
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HIP_CHECK(hipDeviceGetAttribute(&Pageable,
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hipDeviceAttributePageableMemoryAccess, 0));
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INFO("hipDeviceAttributePageableMemoryAccess: " << Pageable);
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if (Pageable) {
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if (fork() == 0) { // child process
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int *Ptr = nullptr, SIZE = sizeof(int);
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bool HmmMem = false;
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YES_COHERENT = false;
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// Allocating hipHostMalloc() memory
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HIP_CHECK(hipHostMalloc(&Ptr, SIZE, hipHostMallocWriteCombined));
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*Ptr = 4;
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TstCoherency(Ptr, HmmMem);
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if (YES_COHERENT) {
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// exit() with code 10 which indicates pass
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HIP_CHECK(hipHostFree(Ptr));
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exit(10);
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} else {
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// exit() with code 9 which indicates fail
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HIP_CHECK(hipHostFree(Ptr));
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exit(9);
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}
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} else { // parent process
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wait(&stat);
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int Result = WEXITSTATUS(stat);
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if (Result != 10) {
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REQUIRE(false);
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}
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}
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} else {
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SUCCEED("GPU 0 doesn't support hipDeviceAttributePageableMemoryAccess "
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"attribute. Hence skipping the test with Pass result.\n");
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}
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}
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#endif
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@@ -775,33 +781,43 @@ TEST_CASE("Unit_hipHostMalloc_WthEnv1Flg2") {
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#if HT_AMD
|
||||
TEST_CASE("Unit_hipHostMalloc_WthEnv1Flg3") {
|
||||
if ((setenv("HIP_HOST_COHERENT", "1", 1)) != 0) {
|
||||
WARN("Unable to turn on HSA_XNACK, hence terminating the Test case!");
|
||||
WARN("Unable to turn on HIP_HOST_COHERENT, hence terminating the Test case!");
|
||||
REQUIRE(false);
|
||||
}
|
||||
int stat = 0;
|
||||
if (fork() == 0) { // child process
|
||||
int *Ptr = nullptr, SIZE = sizeof(int);
|
||||
bool HmmMem = false;
|
||||
YES_COHERENT = false;
|
||||
// Allocating hipHostMalloc() memory
|
||||
HIP_CHECK(hipHostMalloc(&Ptr, SIZE, hipHostMallocNumaUser));
|
||||
*Ptr = 1;
|
||||
TstCoherency(Ptr, HmmMem);
|
||||
if (YES_COHERENT) {
|
||||
// exit() with code 10 which indicates pass
|
||||
HIP_CHECK(hipHostFree(Ptr));
|
||||
exit(10);
|
||||
} else {
|
||||
// exit() with code 9 which indicates fail
|
||||
HIP_CHECK(hipHostFree(Ptr));
|
||||
exit(9);
|
||||
}
|
||||
} else { // parent process
|
||||
wait(&stat);
|
||||
int Result = WEXITSTATUS(stat);
|
||||
if (Result != 10) {
|
||||
REQUIRE(false);
|
||||
int stat = 0, Pageable = 0;
|
||||
|
||||
HIP_CHECK(hipDeviceGetAttribute(&Pageable,
|
||||
hipDeviceAttributePageableMemoryAccess, 0));
|
||||
INFO("hipDeviceAttributePageableMemoryAccess: " << Pageable);
|
||||
|
||||
if (Pageable) {
|
||||
if (fork() == 0) { // child process
|
||||
int *Ptr = nullptr, SIZE = sizeof(int);
|
||||
bool HmmMem = false;
|
||||
YES_COHERENT = false;
|
||||
// Allocating hipHostMalloc() memory
|
||||
HIP_CHECK(hipHostMalloc(&Ptr, SIZE, hipHostMallocNumaUser));
|
||||
*Ptr = 1;
|
||||
TstCoherency(Ptr, HmmMem);
|
||||
if (YES_COHERENT) {
|
||||
// exit() with code 10 which indicates pass
|
||||
HIP_CHECK(hipHostFree(Ptr));
|
||||
exit(10);
|
||||
} else {
|
||||
// exit() with code 9 which indicates fail
|
||||
HIP_CHECK(hipHostFree(Ptr));
|
||||
exit(9);
|
||||
}
|
||||
} else { // parent process
|
||||
wait(&stat);
|
||||
int Result = WEXITSTATUS(stat);
|
||||
if (Result != 10) {
|
||||
REQUIRE(false);
|
||||
}
|
||||
}
|
||||
} else {
|
||||
SUCCEED("GPU 0 doesn't support hipDeviceAttributePageableMemoryAccess "
|
||||
"attribute. Hence skipping the test with Pass result.\n");
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
Reference in new issue
Block a user