NCCL 2.25.1-1
Add Blackwell/SM100 support * Add compilation for sm100 * Add graph search speeds for Blackwell * Optimize graph search to converge on large NVLink domains * Limit NVLS heads to 32 * Increase various limits to fit large NVLink domains * Add extra checks for IMEX setup, needed for MNNVL * Increase MAXCHANNELS to 64 Extend NVTX instrumentation to track NCCL communicators * Add communicator ID to NVTX traces to allow for correlation between ranks. RAS fixes
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@@ -39,14 +39,20 @@ endif
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CUDA9_GENCODE = -gencode=arch=compute_70,code=sm_70
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CUDA11_GENCODE = -gencode=arch=compute_80,code=sm_80
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CUDA12_GENCODE = -gencode=arch=compute_90,code=sm_90
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CUDA13_GENCODE = -gencode=arch=compute_100,code=sm_100 \
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-gencode=arch=compute_120,code=sm_120
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CUDA8_PTX = -gencode=arch=compute_61,code=compute_61
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CUDA9_PTX = -gencode=arch=compute_70,code=compute_70
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CUDA11_PTX = -gencode=arch=compute_80,code=compute_80
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CUDA12_PTX = -gencode=arch=compute_90,code=compute_90
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CUDA13_PTX = -gencode=arch=compute_120,code=compute_120
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ifeq ($(shell test "0$(CUDA_MAJOR)" -eq 11 -a "0$(CUDA_MINOR)" -ge 8 -o "0$(CUDA_MAJOR)" -gt 11; echo $$?),0)
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ifeq ($(shell test "0$(CUDA_MAJOR)" -eq 12 -a "0$(CUDA_MINOR)" -ge 8 -o "0$(CUDA_MAJOR)" -gt 12; echo $$?),0)
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# Include Blackwell support if we're using CUDA12.8 or above
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NVCC_GENCODE ?= $(CUDA8_GENCODE) $(CUDA9_GENCODE) $(CUDA11_GENCODE) $(CUDA12_GENCODE) $(CUDA13_GENCODE) $(CUDA13_PTX)
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else ifeq ($(shell test "0$(CUDA_MAJOR)" -eq 11 -a "0$(CUDA_MINOR)" -ge 8 -o "0$(CUDA_MAJOR)" -gt 11; echo $$?),0)
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# Include Hopper support if we're using CUDA11.8 or above
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NVCC_GENCODE ?= $(CUDA8_GENCODE) $(CUDA9_GENCODE) $(CUDA11_GENCODE) $(CUDA12_GENCODE) $(CUDA12_PTX)
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else ifeq ($(shell test "0$(CUDA_MAJOR)" -ge 11; echo $$?),0)
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@@ -1,6 +1,6 @@
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##### version
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NCCL_MAJOR := 2
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NCCL_MINOR := 24
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NCCL_PATCH := 3
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NCCL_MINOR := 25
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NCCL_PATCH := 1
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NCCL_SUFFIX :=
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PKG_REVISION := 1
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