Add raslib fields to RDC

The new raslib fields are added to RDC for dmon.
* The rdc_field.data, rdc.h and rdc_bootstrap.py are changed
  for new fields.
* The RDC_FI_ECC_CORRECT_TOTAL and RDC_FI_ECC_UNCORRECT_TOTAL are
  removed from RdcSmiLib.cc, and will be gotten from raslib.

Change-Id: I4ee016e3d52e9d38b54406ca129da511f741c6d6

python_binding/rdc_bootstrap.py

@@ -87,6 +87,34 @@ class rdc_field_t(c_int):
      RDC_FI_GPU_MEMORY_TOTAL = 502
      RDC_FI_ECC_CORRECT_TOTAL = 600
      RDC_FI_ECC_UNCORRECT_TOTAL = 601
+     RDC_FI_ECC_SDMA_SEC = 602
+     RDC_FI_ECC_SDMA_DED = 603
+     RDC_FI_ECC_GFX_SEC = 604
+     RDC_FI_ECC_GFX_DED = 605
+     RDC_FI_ECC_MMHUB_SEC = 606
+     RDC_FI_ECC_MMHUB_DED = 607
+     RDC_FI_ECC_ATHUB_SEC = 608
+     RDC_FI_ECC_ATHUB_DED = 609
+     RDC_FI_ECC_BIF_SEC = 610
+     RDC_FI_ECC_BIF_DED = 611
+     RDC_FI_ECC_HDP_SEC = 612
+     RDC_FI_ECC_HDP_DED = 613
+     RDC_FI_ECC_XGMI_WAFL_SEC = 614
+     RDC_FI_ECC_XGMI_WAFL_DED = 615
+     RDC_FI_ECC_DF_SEC = 616
+     RDC_FI_ECC_DF_DED = 617
+     RDC_FI_ECC_SMN_SEC = 618
+     RDC_FI_ECC_SMN_DED = 619
+     RDC_FI_ECC_SEM_SEC = 620
+     RDC_FI_ECC_SEM_DED = 621
+     RDC_FI_ECC_MP0_SEC = 622
+     RDC_FI_ECC_MP0_DED = 623
+     RDC_FI_ECC_MP1_SEC = 624
+     RDC_FI_ECC_MP1_DED = 625
+     RDC_FI_ECC_FUSE_SEC = 626
+     RDC_FI_ECC_FUSE_DED = 627
+     RDC_FI_ECC_UMC_SEC = 628
+     RDC_FI_ECC_UMC_DED = 629
      RDC_EVNT_XGMI_0_NOP_TX = 1000
      RDC_EVNT_XGMI_0_REQ_TX = 1001
      RDC_EVNT_XGMI_0_RESP_TX = 1002