From 85374b6b31dc3ea3edadc5caf2bc7bc40f704643 Mon Sep 17 00:00:00 2001
From: foreman
Date: Wed, 18 Jan 2017 09:59:38 -0500
Subject: [PATCH] P4 to Git Change 1363243 by jatang@jatang-opencl-hsa-stg1 on
2017/01/18 09:49:05
SWDEV-95919 - Fix num-of-waves PerfCounter is 0 on Baffin.
Counters are clockgated on Fiji and above. Need to program the RLC_PERFMON_CLK_CNTL register thru IDeviceSetClockMode(), so that meaningful data is recorded. We leave kmd/pplib to keep track of the OCL process to restore the RLC_PERFMON_CLK_CNTL register when the OCL process is killed.
Affected files ...
... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palvirtual.cpp#41 edit
[ROCm/clr commit: e826e296d40a850a220382159d54bcda961000b1]
---
projects/clr/rocclr/runtime/device/pal/palvirtual.cpp | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/projects/clr/rocclr/runtime/device/pal/palvirtual.cpp b/projects/clr/rocclr/runtime/device/pal/palvirtual.cpp
index 6ee31cfbc5..54bee9dbfa 100644
--- a/projects/clr/rocclr/runtime/device/pal/palvirtual.cpp
+++ b/projects/clr/rocclr/runtime/device/pal/palvirtual.cpp
@@ -2507,7 +2507,15 @@ VirtualGPU::submitPerfCounter(amd::PerfCounterCommand& vcmd)
palPerf = counter->iPerf();
// Find the state and sends the command to PAL
if (vcmd.getState() == amd::PerfCounterCommand::Begin) {
+ Pal::SetClockModeInput input;
+ Pal::SetClockModeOutput output = {};
+ input.clockMode = Pal::DeviceClockMode::Profiling;
+ dev().iDev()->SetClockMode(input, &output);
+ GpuEvent event;
+ eventBegin(MainEngine);
iCmd()->CmdBeginPerfExperiment(palPerf);
+ eventEnd(MainEngine, event);
+ setGpuEvent(event);
}
else if (vcmd.getState() == amd::PerfCounterCommand::End) {
GpuEvent event;