Move inline asm into separate file
This commit is contained in:
Brandon Potter
+236
@@ -0,0 +1,236 @@
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/******************************************************************************
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* Copyright (c) 2024 Advanced Micro Devices, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to
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* deal in the Software without restriction, including without limitation the
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* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*****************************************************************************/
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#ifndef LIBRARY_SRC_ASSEMBLY_HPP_
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#define LIBRARY_SRC_ASSEMBLY_HPP_
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#include <hip/hip_runtime.h>
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#include <hsa/hsa.h>
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#include <hsa/hsa_ext_amd.h>
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namespace rocshmem {
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#define DO_PRAGMA(x) _Pragma(#x)
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#define NOWARN(warnoption, ...) \
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DO_PRAGMA(GCC diagnostic push) \
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DO_PRAGMA(GCC diagnostic ignored #warnoption) \
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__VA_ARGS__ \
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DO_PRAGMA(GCC diagnostic pop)
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#define SFENCE() asm volatile("sfence" ::: "memory")
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__device__ __forceinline__ int uncached_load_ubyte(uint8_t* src) {
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int ret;
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#if __gfx906__
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#endif
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#if __gfx908__
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#endif
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#if __gfx90a__
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asm volatile(
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"global_load_ubyte %0 %1 off glc slc \n"
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"s_waitcnt vmcnt(0)"
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: "=v"(ret)
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: "v"(src));
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#endif
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#if __gfx940__
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#endif
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return ret;
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}
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__device__ __forceinline__ void refresh_volatile_sbyte(volatile int *assigned_value,
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volatile char *read_value) {
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#if __gfx906__
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#endif
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#if __gfx908__
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#endif
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#if __gfx90a__
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asm volatile(
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"global_load_sbyte %0 %1 off glc slc\n "
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"s_waitcnt vmcnt(0)"
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: "=v"(*assigned_value)
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: "v"(read_value));
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#endif
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#if __gfx940__
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#endif
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}
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__device__ __forceinline__ void refresh_volatile_dwordx2(volatile uint64_t *assigned_value,
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volatile uint64_t *read_value) {
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#if __gfx906__
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#endif
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#if __gfx908__
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#endif
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#if __gfx90a__
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asm volatile(
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"global_load_dwordx2 %0 %1 off glc slc\n "
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"s_waitcnt vmcnt(0)"
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: "=v"(*assigned_value)
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: "v"(read_value));
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#endif
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#if __gfx940__
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#endif
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}
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/* Ignore the warning about deprecated volatile.
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* The only usage of volatile is to force the compiler to generate
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* the assembly instruction. If volatile is omitted, the compiler
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* will NOT generate the non-temporal load or the waitcnt.
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*/
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// clang-format off
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NOWARN(-Wdeprecated-volatile,
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template <typename T> __device__ __forceinline__ T uncached_load(T* src) {
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T ret;
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switch (sizeof(T)) {
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case 4:
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#if __gfx906__
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#endif
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#if __gfx908__
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#endif
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#if __gfx90a__
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asm volatile(
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"global_load_dword %0 %1 off glc slc \n"
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"s_waitcnt vmcnt(0)"
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: "=v"(ret)
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: "v"(src));
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#endif
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#if __gfx940__
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#endif
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break;
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case 8:
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#if __gfx906__
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#endif
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#if __gfx908__
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#endif
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#if __gfx90a__
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asm volatile(
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"global_load_dwordx2 %0 %1 off glc slc \n"
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"s_waitcnt vmcnt(0)"
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: "=v"(ret)
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: "v"(src));
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#endif
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#if __gfx940__
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#endif
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break;
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default:
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break;
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}
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return ret;
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}
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)
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// clang-format on
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__device__ __forceinline__ void __roc_inv() {
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#if defined USE_COHERENT_HEAP
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#if __gfx906__
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#endif
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#if __gfx908__
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#endif
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#if __gfx90a__
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asm volatile("buffer_wbinvl1;");
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#endif
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#if __gfx940__
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#endif
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#endif
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}
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__device__ __forceinline__ void __roc_flush() {
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#if defined USE_COHERENT_HEAP
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#if __gfx906__
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#endif
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#if __gfx908__
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#endif
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#if __gfx90a__
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asm volatile("s_dcache_wb;");
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asm volatile("buffer_wbl2;");
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#endif
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#if __gfx940__
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#endif
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#endif
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}
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__device__ __forceinline__ void store_asm(uint8_t* val, uint8_t* dst,
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int size) {
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switch (size) {
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case 2: {
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int16_t val16{*(reinterpret_cast<int16_t*>(val))};
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#if __gfx906__
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#endif
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#if __gfx908__
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#endif
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#if __gfx90a__
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asm volatile("flat_store_short %0 %1 glc slc" : : "v"(dst), "v"(val16));
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#endif
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#if __gfx940__
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#endif
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break;
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}
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case 4: {
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int32_t val32{*(reinterpret_cast<int32_t*>(val))};
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#if __gfx906__
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#endif
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#if __gfx908__
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#endif
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#if __gfx90a__
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asm volatile("flat_store_dword %0 %1 glc slc" : : "v"(dst), "v"(val32));
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#endif
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#if __gfx940__
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#endif
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break;
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}
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case 8: {
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int64_t val64{*(reinterpret_cast<int64_t*>(val))};
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#if __gfx906__
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#endif
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#if __gfx908__
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#endif
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#if __gfx90a__
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asm volatile("flat_store_dwordx2 %0 %1 glc slc" : : "v"(dst), "v"(val64));
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#endif
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#if __gfx940__
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#endif
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break;
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}
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default:
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break;
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}
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}
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__device__ __forceinline__ uint64_t __read_clock() {
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uint64_t clock{};
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#if __gfx906__
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#endif
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#if __gfx908__
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#endif
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#if __gfx90a__
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asm volatile(
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"s_memrealtime %0\n"
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"s_waitcnt lgkmcnt(0)\n"
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: "=s"(clock));
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#endif
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#if __gfx940__
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#endif
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return clock;
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}
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} // namespace rocshmem
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#endif // LIBRARY_SRC_ASSEMBLY_HPP_
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