Fix SPI block counter limit (#780)
* Fix SPI counter collection limit
* Update counter collection limits from aqlprofile
* Remove special handling for MI 350 SPI pipe counters
[ROCm/rocprofiler-compute commit: 6e1bbb5efb]
This commit is contained in:
@@ -50,9 +50,7 @@ from utils.utils import (
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capture_subprocess_output,
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capture_subprocess_output,
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convert_metric_id_to_panel_idx,
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convert_metric_id_to_panel_idx,
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detect_rocprof,
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detect_rocprof,
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get_base_spi_pipe_counter,
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get_submodules,
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get_submodules,
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is_spi_pipe_counter,
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is_tcc_channel_counter,
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is_tcc_channel_counter,
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using_v3,
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using_v3,
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)
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)
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@@ -669,14 +667,6 @@ class OmniSoC_Base:
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if output_file:
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if output_file:
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output_file.add(ctr)
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output_file.add(ctr)
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continue
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continue
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# Store all pipes for SPI pipe counters in the same file
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if is_spi_pipe_counter(ctr):
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output_file = spi_pipe_counter_file_map.get(
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get_base_spi_pipe_counter(ctr)
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)
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if output_file:
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output_file.add(ctr)
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continue
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# Add counter to first file that has room
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# Add counter to first file that has room
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added = False
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added = False
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for i in range(len(output_files)):
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for i in range(len(output_files)):
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@@ -685,11 +675,6 @@ class OmniSoC_Base:
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# Store all channels for a TCC channel counter in the same file
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# Store all channels for a TCC channel counter in the same file
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if is_tcc_channel_counter(ctr):
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if is_tcc_channel_counter(ctr):
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tcc_channel_counter_file_map[ctr.split("[")[0]] = output_files[i]
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tcc_channel_counter_file_map[ctr.split("[")[0]] = output_files[i]
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# Store all pipes for SPI pipe counters in the same file
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if is_spi_pipe_counter(ctr):
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spi_pipe_counter_file_map[get_base_spi_pipe_counter(ctr)] = (
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output_files[i]
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)
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break
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break
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# All files are full, create a new file
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# All files are full, create a new file
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@@ -902,18 +887,8 @@ class LimitedSet:
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if e.split("[")[0] in {element.split("[")[0] for element in self.elements}:
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if e.split("[")[0] in {element.split("[")[0] for element in self.elements}:
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self.elements.append(e)
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self.elements.append(e)
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return True
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return True
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# Store all pipes for SPI pipe counters in the same file
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if is_spi_pipe_counter(e) and get_base_spi_pipe_counter(e) in {
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get_base_spi_pipe_counter(element) for element in self.elements
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}:
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self.elements.append(e)
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return True
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if self.avail > 0:
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if self.avail > 0:
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# SPI pipe counters take space of 2 counters
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self.avail -= 1
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if is_spi_pipe_counter(e):
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self.avail -= 2
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else:
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self.avail -= 1
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self.elements.append(e)
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self.elements.append(e)
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return True
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return True
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return False
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return False
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@@ -9,7 +9,7 @@
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# MI GPUs
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# MI GPUs
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# |-- series: the specific MI series; mi50, mi100, mi200, mi300
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# |-- series: the specific MI series; mi50, mi100, mi200, mi300
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# |-- architecture: currently, only mi300 gpus hold different architectures
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# |-- architecture: currently, only mi300 gpus hold different architectures
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# |-- perfmon_config
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# |-- perfmon_config, copy from ROCm/aqlprofile from gfxip/gfx9/gfx9_block_info.h
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# |-- gpu model
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# |-- gpu model
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# |-- chip_ids: chip id is specific to the environment the gpu is being used on
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# |-- chip_ids: chip id is specific to the environment the gpu is being used on
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# | -- physical
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# | -- physical
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@@ -32,7 +32,7 @@ mi_gpu_spec:
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TCC: 4
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TCC: 4
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CPC: 2
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CPC: 2
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CPF: 2
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CPF: 2
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SPI: 2
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SPI: 6
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GRBM: 2
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GRBM: 2
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GDS: 4
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GDS: 4
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models:
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models:
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@@ -50,7 +50,7 @@ mi_gpu_spec:
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TCC: 4
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TCC: 4
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CPC: 2
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CPC: 2
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CPF: 2
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CPF: 2
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SPI: 2
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SPI: 6
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GRBM: 2
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GRBM: 2
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GDS: 4
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GDS: 4
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models:
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models:
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@@ -69,7 +69,7 @@ mi_gpu_spec:
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TCC: 4
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TCC: 4
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CPC: 2
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CPC: 2
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CPF: 2
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CPF: 2
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SPI: 2
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SPI: 6
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GRBM: 2
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GRBM: 2
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GDS: 4
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GDS: 4
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models:
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models:
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@@ -94,7 +94,7 @@ mi_gpu_spec:
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TCC: 4
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TCC: 4
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CPC: 2
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CPC: 2
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CPF: 2
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CPF: 2
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SPI: 2
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SPI: 6
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GRBM: 2
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GRBM: 2
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GDS: 4
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GDS: 4
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models:
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models:
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@@ -124,7 +124,7 @@ mi_gpu_spec:
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TCC: 4
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TCC: 4
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CPC: 2
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CPC: 2
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CPF: 2
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CPF: 2
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SPI: 2
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SPI: 6
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GRBM: 2
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GRBM: 2
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GDS: 4
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GDS: 4
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models:
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models:
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@@ -159,7 +159,7 @@ mi_gpu_spec:
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TCC: 4
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TCC: 4
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CPC: 2
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CPC: 2
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CPF: 2
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CPF: 2
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SPI: 2
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SPI: 6
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GRBM: 2
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GRBM: 2
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GDS: 4
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GDS: 4
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models:
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models:
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@@ -294,7 +294,7 @@ mi_gpu_spec:
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TCC: 4
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TCC: 4
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CPC: 2
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CPC: 2
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CPF: 2
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CPF: 2
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SPI: 2
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SPI: 6
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GRBM: 2
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GRBM: 2
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GDS: 4
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GDS: 4
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TCC_channels: 16
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TCC_channels: 16
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@@ -157,21 +157,6 @@ def extract_counter_info_extra_config_input_yaml(
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return None
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return None
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def is_spi_pipe_counter(counter):
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for pattern in spi_pipe_counter_regexs:
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if re.match(pattern, counter):
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return True
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return False
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def get_base_spi_pipe_counter(counter):
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for pattern in spi_pipe_counter_regexs:
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match = re.match(pattern, counter)
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if match:
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return match.group(1)
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return ""
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def using_v1():
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def using_v1():
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return "ROCPROF" in os.environ.keys() and os.environ["ROCPROF"].endswith("rocprof")
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return "ROCPROF" in os.environ.keys() and os.environ["ROCPROF"].endswith("rocprof")
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