From 88936eb2033347e14919bab0b487eadc72cf8d7a Mon Sep 17 00:00:00 2001 From: foreman Date: Fri, 24 Nov 2017 17:58:22 -0500 Subject: [PATCH] P4 to Git Change 1486724 by wchau@wchau_OCL_boltzmann on 2017/11/24 17:48:34 SWDEV-139422 - Lexa Linux Support - OCL Affected files ... ... //depot/stg/opencl/drivers/opencl/compiler/legacy-lib/utils/v0_8/target_mappings.h#21 edit ... //depot/stg/opencl/drivers/opencl/compiler/legacy-lib/utils/v0_8/target_mappings_amdil.h#22 edit ... //depot/stg/opencl/drivers/opencl/compiler/legacy-lib/utils/v0_8/target_mappings_amdil64.h#21 edit ... //depot/stg/opencl/drivers/opencl/compiler/legacy-lib/utils/v0_8/target_mappings_hsail.h#25 edit ... //depot/stg/opencl/drivers/opencl/compiler/legacy-lib/utils/v0_8/target_mappings_hsail64.h#25 edit ... //depot/stg/opencl/drivers/opencl/compiler/lib/utils/v0_8/target_mappings.h#53 edit ... //depot/stg/opencl/drivers/opencl/compiler/lib/utils/v0_8/target_mappings_amdil.h#48 edit ... //depot/stg/opencl/drivers/opencl/compiler/lib/utils/v0_8/target_mappings_amdil64.h#44 edit ... //depot/stg/opencl/drivers/opencl/compiler/lib/utils/v0_8/target_mappings_hsail.h#50 edit ... //depot/stg/opencl/drivers/opencl/compiler/lib/utils/v0_8/target_mappings_hsail64.h#45 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gpudefs.hpp#150 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gpudevice.cpp#579 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/pal/paldefs.hpp#25 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/pal/paldevice.cpp#66 edit --- rocclr/compiler/lib/utils/v0_8/target_mappings.h | 2 +- rocclr/compiler/lib/utils/v0_8/target_mappings_amdil.h | 4 ---- .../compiler/lib/utils/v0_8/target_mappings_amdil64.h | 4 ---- rocclr/compiler/lib/utils/v0_8/target_mappings_hsail.h | 10 ++++++---- .../compiler/lib/utils/v0_8/target_mappings_hsail64.h | 10 ++++++---- rocclr/runtime/device/gpu/gpudefs.hpp | 4 ++-- rocclr/runtime/device/gpu/gpudevice.cpp | 4 ++-- rocclr/runtime/device/pal/paldefs.hpp | 1 + rocclr/runtime/device/pal/paldevice.cpp | 2 +- 9 files changed, 19 insertions(+), 22 deletions(-) diff --git a/rocclr/compiler/lib/utils/v0_8/target_mappings.h b/rocclr/compiler/lib/utils/v0_8/target_mappings.h index d86e24508d..3cb3ade577 100644 --- a/rocclr/compiler/lib/utils/v0_8/target_mappings.h +++ b/rocclr/compiler/lib/utils/v0_8/target_mappings.h @@ -209,7 +209,7 @@ static const char* calTargetMapping[] = { "Carrizo", "Ellesmere", "Baffin", IF(IS_BRAHMA,"","gfx900"), "Stoney", - IF(IS_BRAHMA,"","gfx804"), + "gfx804", IF(IS_BRAHMA,"","gfx901"), IF(IS_BRAHMA,"","gfx902"), IF(IS_BRAHMA,"","gfx903"), diff --git a/rocclr/compiler/lib/utils/v0_8/target_mappings_amdil.h b/rocclr/compiler/lib/utils/v0_8/target_mappings_amdil.h index f92add3ac1..04ab1ebe55 100644 --- a/rocclr/compiler/lib/utils/v0_8/target_mappings_amdil.h +++ b/rocclr/compiler/lib/utils/v0_8/target_mappings_amdil.h @@ -102,11 +102,7 @@ static const TargetMapping AMDILTargetMapping_0_8[] = { { "VI", "Baffin", "baffin", amd::GPU_Library_CI, VI_BAFFIN_M_A1, F_SI_BASE, true, true, FAMILY_VI }, { "VI", "Ellesmere", "ellesmere", amd::GPU_Library_CI, VI_ELLESMERE_P_A0, F_SI_BASE, true, false, FAMILY_VI }, { "VI", "Ellesmere", "ellesmere", amd::GPU_Library_CI, VI_ELLESMERE_P_A1, F_SI_BASE, true, true, FAMILY_VI }, -#ifndef BRAHMA { "VI", "gfx804", "gfx804", amd::GPU_Library_CI, VI_LEXA_V_A0, F_SI_BASE, true, true, FAMILY_VI }, -#else - UnknownTarget, -#endif InvalidTarget }; diff --git a/rocclr/compiler/lib/utils/v0_8/target_mappings_amdil64.h b/rocclr/compiler/lib/utils/v0_8/target_mappings_amdil64.h index 7a264b083f..e949e5830a 100644 --- a/rocclr/compiler/lib/utils/v0_8/target_mappings_amdil64.h +++ b/rocclr/compiler/lib/utils/v0_8/target_mappings_amdil64.h @@ -48,11 +48,7 @@ static const TargetMapping AMDIL64TargetMapping_0_8[] = { { "VI", "Baffin", "baffin", amd::GPU64_Library_CI, VI_BAFFIN_M_A1, F_SI_64BIT_PTR, true, true, FAMILY_VI }, { "VI", "Ellesmere", "ellesmere", amd::GPU64_Library_CI, VI_ELLESMERE_P_A0, F_SI_64BIT_PTR, true, false, FAMILY_VI }, { "VI", "Ellesmere", "ellesmere", amd::GPU64_Library_CI, VI_ELLESMERE_P_A1, F_SI_64BIT_PTR, true, true, FAMILY_VI }, -#ifndef BRAHMA { "VI", "gfx804", "gfx804", amd::GPU64_Library_CI, VI_LEXA_V_A0, F_SI_64BIT_PTR, true, true, FAMILY_VI }, -#else - UnknownTarget, -#endif InvalidTarget }; diff --git a/rocclr/compiler/lib/utils/v0_8/target_mappings_hsail.h b/rocclr/compiler/lib/utils/v0_8/target_mappings_hsail.h index 992973ccba..3307c31448 100644 --- a/rocclr/compiler/lib/utils/v0_8/target_mappings_hsail.h +++ b/rocclr/compiler/lib/utils/v0_8/target_mappings_hsail.h @@ -37,7 +37,12 @@ static const TargetMapping HSAILTargetMapping_0_8[] = { #ifndef BRAHMA { "AI", "gfx900", "GFX9", amd::GPU_Library_HSAIL, AI_GREENLAND_P_A0, F_AI_BASE, true, false, FAMILY_AI }, { "AI", "gfx900", "GFX9", amd::GPU_Library_HSAIL, AI_GREENLAND_P_A1, F_AI_BASE, true, true, FAMILY_AI }, - { "VI", "gfx804", "GFX8", amd::GPU_Library_HSAIL, VI_LEXA_V_A0, F_VI_BASE, true, true, FAMILY_VI }, +#else + UnknownTarget, + UnknownTarget, +#endif + { "VI", "gfx804", "GFX8", amd::GPU_Library_HSAIL, VI_LEXA_V_A0, F_VI_BASE, true, true, FAMILY_VI }, +#ifndef BRAHMA { "AI", "gfx901", "GFX9", amd::GPU_Library_HSAIL, AI_GREENLAND_P_A0, F_AI_BASE, true, false, FAMILY_AI ,true }, { "AI", "gfx901", "GFX9", amd::GPU_Library_HSAIL, AI_GREENLAND_P_A1, F_AI_BASE, true, true, FAMILY_AI ,true }, { "RV", "gfx902", "GFX9", amd::GPU_Library_HSAIL, RAVEN_A0, F_AI_BASE, true, true, FAMILY_RV, false }, @@ -59,9 +64,6 @@ static const TargetMapping HSAILTargetMapping_0_8[] = { UnknownTarget, UnknownTarget, UnknownTarget, - UnknownTarget, - UnknownTarget, - UnknownTarget, #endif InvalidTarget }; diff --git a/rocclr/compiler/lib/utils/v0_8/target_mappings_hsail64.h b/rocclr/compiler/lib/utils/v0_8/target_mappings_hsail64.h index 2675a687f0..a28ec5e2aa 100644 --- a/rocclr/compiler/lib/utils/v0_8/target_mappings_hsail64.h +++ b/rocclr/compiler/lib/utils/v0_8/target_mappings_hsail64.h @@ -36,7 +36,12 @@ static const TargetMapping HSAIL64TargetMapping_0_8[] = { #ifndef BRAHMA { "AI", "gfx900", "GFX9", amd::GPU_Library_HSAIL, AI_GREENLAND_P_A0, F_AI_BASE, true, false, FAMILY_AI, false }, { "AI", "gfx900", "GFX9", amd::GPU_Library_HSAIL, AI_GREENLAND_P_A1, F_AI_BASE, true, true, FAMILY_AI, false }, - { "VI", "gfx804", "GFX8", amd::GPU_Library_HSAIL, VI_LEXA_V_A0, F_VI_BASE, true, true, FAMILY_VI, false }, +#else + UnknownTarget, + UnknownTarget, +#endif + { "VI", "gfx804", "GFX8", amd::GPU_Library_HSAIL, VI_LEXA_V_A0, F_VI_BASE, true, true, FAMILY_VI, false }, +#ifndef BRAHMA { "AI", "gfx901", "GFX9", amd::GPU_Library_HSAIL, AI_GREENLAND_P_A0, F_AI_BASE, true, false, FAMILY_AI, true }, { "AI", "gfx901", "GFX9", amd::GPU_Library_HSAIL, AI_GREENLAND_P_A1, F_AI_BASE, true, true, FAMILY_AI, true }, { "RV", "gfx902", "GFX9", amd::GPU_Library_HSAIL, RAVEN_A0, F_AI_BASE, true, true, FAMILY_RV, false }, @@ -58,9 +63,6 @@ static const TargetMapping HSAIL64TargetMapping_0_8[] = { UnknownTarget, UnknownTarget, UnknownTarget, - UnknownTarget, - UnknownTarget, - UnknownTarget, #endif InvalidTarget }; diff --git a/rocclr/runtime/device/gpu/gpudefs.hpp b/rocclr/runtime/device/gpu/gpudefs.hpp index 83dff3629a..925dd327ff 100644 --- a/rocclr/runtime/device/gpu/gpudefs.hpp +++ b/rocclr/runtime/device/gpu/gpudefs.hpp @@ -151,8 +151,8 @@ static const AMDDeviceInfo DeviceInfo[] = { IF(IS_BRAHMA, "", "gfx900"), 4, 16, 1, 256, 64 * Ki, 32, 900}, /* CAL_TARGET_STONEY */ {ED_ATI_CAL_MACHINE_STONEY_ISA, "Stoney", "stoney", 4, 16, 1, 256, 64 * Ki, 32, 800}, - /* CAL_TARGET_LEXA */ {ED_ATI_CAL_MACHINE_LEXA_ISA, IF(IS_BRAHMA, "", "gfx804"), - IF(IS_BRAHMA, "", "gfx804"), 4, 16, 1, 256, 64 * Ki, 32, 800}, + /* CAL_TARGET_LEXA */ {ED_ATI_CAL_MACHINE_LEXA_ISA, "gfx804", "gfx804", 4, 16, 1, 256, 64 * Ki, + 32, 800}, /* CAL_TARGET_RAVEN */ {ED_ATI_CAL_MACHINE_RAVEN_ISA, IF(IS_BRAHMA, "", "gfx901"), IF(IS_BRAHMA, "", "gfx901"), 4, 16, 1, 256, 64 * Ki, 32, 900}, /* CAL_TARGET_POLARIS22 */ {ED_ATI_CAL_MACHINE_POLARIS22_ISA, IF(IS_BRAHMA, "", "gfx804"), diff --git a/rocclr/runtime/device/gpu/gpudevice.cpp b/rocclr/runtime/device/gpu/gpudevice.cpp index 627af8b70b..0126167072 100644 --- a/rocclr/runtime/device/gpu/gpudevice.cpp +++ b/rocclr/runtime/device/gpu/gpudevice.cpp @@ -848,8 +848,8 @@ bool Device::create(CALuint ordinal, CALuint numOfDevices) { } #if defined(BRAHMA) - if (calTarget_ == CAL_TARGET_GREENLAND || calTarget_ == CAL_TARGET_LEXA || - calTarget_ == CAL_TARGET_RAVEN || calTarget_ == CAL_TARGET_POLARIS22) { + if (calTarget_ == CAL_TARGET_GREENLAND || calTarget_ == CAL_TARGET_RAVEN || + calTarget_ == CAL_TARGET_POLARIS22) { return false; } #endif diff --git a/rocclr/runtime/device/pal/paldefs.hpp b/rocclr/runtime/device/pal/paldefs.hpp index c3b5467d62..4a31399e2f 100644 --- a/rocclr/runtime/device/pal/paldefs.hpp +++ b/rocclr/runtime/device/pal/paldefs.hpp @@ -145,6 +145,7 @@ static const AMDDeviceInfo DeviceInfo[] = { /* Fiji */ {"Fiji", "fiji", 4, 16, 1, 256, 64 * Ki, 32, 804}, /* Ellesmere */ {"Ellesmere", "ellesmere", 4, 16, 1, 256, 64 * Ki, 32, 804}, /* Baffin */ {"Baffin", "baffin", 4, 16, 1, 256, 64 * Ki, 32, 804}, + /* Lexa */ {"gfx804", "gfx804", 4, 16, 1, 256, 64 * Ki, 32, 804}, }; // Ordering as per AsicRevision# in //depot/stg/pal/inc/core/palDevice.h and diff --git a/rocclr/runtime/device/pal/paldevice.cpp b/rocclr/runtime/device/pal/paldevice.cpp index 179d0c5771..104f45ae9b 100644 --- a/rocclr/runtime/device/pal/paldevice.cpp +++ b/rocclr/runtime/device/pal/paldevice.cpp @@ -741,7 +741,7 @@ bool Device::create(Pal::IDevice* device) { uint subtarget = isXNACKSupported; // Update HW info for the device - if ((GPU_ENABLE_PAL == 1) && (properties().revision <= Pal::AsicRevision::Polaris11)) { + if ((GPU_ENABLE_PAL == 1) && (properties().revision <= Pal::AsicRevision::Polaris12)) { hwInfo_ = &DeviceInfo[static_cast(properties().revision)]; } else if (ipLevel_ >= Pal::GfxIpLevel::GfxIp9) { // For compiler sub targets