esmi library integration update v1.0
1. new class files for cpu socket and cpu core created 2. wrapper API's for getting energy monitoring, system statistics, power monitoring values implemented 3. modified amdsmi init & cleanup functions for esmi lib support 4. modified amdsmi system class for esmi lib support 5. sample test code created in example dir Change-Id: Ic41f31641c283a681de696bb4346b557265bad42
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cometido por
Galantsev, Dmitrii
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0187de61e2
commit
8a9771b225
@@ -76,6 +76,35 @@ const std::map<rsmi_status_t, amdsmi_status_t> rsmi_status_map = {
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amdsmi_status_t rsmi_to_amdsmi_status(rsmi_status_t status);
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#ifdef ENABLE_ESMI_LIB
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// Define a map of esmi status codes to amdsmi status codes
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const std::map<esmi_status_t, amdsmi_status_t> esmi_status_map = {
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{ESMI_SUCCESS, AMDSMI_STATUS_SUCCESS},
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{ESMI_INITIALIZED, AMDSMI_STATUS_SUCCESS},
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{ESMI_INVALID_INPUT, AMDSMI_STATUS_INVAL},
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{ESMI_NOT_SUPPORTED, AMDSMI_STATUS_NOT_SUPPORTED},
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{ESMI_PERMISSION, AMDSMI_STATUS_NO_PERM},
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{ESMI_INTERRUPTED, AMDSMI_STATUS_INTERRUPT},
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{ESMI_IO_ERROR, AMDSMI_STATUS_IO},
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{ESMI_FILE_ERROR, AMDSMI_STATUS_FILE_ERROR},
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{ESMI_NO_MEMORY, AMDSMI_STATUS_OUT_OF_RESOURCES},
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{ESMI_DEV_BUSY, AMDSMI_STATUS_BUSY},
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{ESMI_NOT_INITIALIZED, AMDSMI_STATUS_NOT_INIT},
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{ESMI_UNEXPECTED_SIZE, AMDSMI_STATUS_UNEXPECTED_SIZE},
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{ESMI_UNKNOWN_ERROR, AMDSMI_STATUS_UNKNOWN_ERROR},
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{ESMI_NO_ENERGY_DRV, AMDSMI_NO_ENERGY_DRV},
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{ESMI_NO_MSR_DRV, AMDSMI_NO_MSR_DRV},
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{ESMI_NO_HSMP_DRV, AMDSMI_NO_HSMP_DRV},
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{ESMI_NO_HSMP_SUP, AMDSMI_NO_HSMP_SUP},
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{ESMI_NO_DRV, AMDSMI_NO_DRV},
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{ESMI_FILE_NOT_FOUND, AMDSMI_FILE_NOT_FOUND},
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{ESMI_ARG_PTR_NULL, AMDSMI_ARG_PTR_NULL},
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{ESMI_HSMP_TIMEOUT, AMDSMI_HSMP_TIMEOUT},
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{ESMI_NO_HSMP_MSG_SUP, AMDSMI_NO_HSMP_MSG_SUP},
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};
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amdsmi_status_t esmi_to_amdsmi_status(esmi_status_t status);
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#endif
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} // namespace smi
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} // namespace amd
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@@ -0,0 +1,77 @@
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/*
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* =============================================================================
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* The University of Illinois/NCSA
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* Open Source License (NCSA)
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*
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* Copyright (c) 2022, Advanced Micro Devices, Inc.
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* All rights reserved.
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*
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* Developed by:
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*
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* AMD Research and AMD ROC Software Development
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*
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* Advanced Micro Devices, Inc.
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*
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* www.amd.com
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to
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* deal with the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* - Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimers.
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* - Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimers in
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* the documentation and/or other materials provided with the distribution.
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* - Neither the names of <Name of Development Group, Name of Institution>,
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* nor the names of its contributors may be used to endorse or promote
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* products derived from this Software without specific prior written
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* permission.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS WITH THE SOFTWARE.
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*
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*/
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#ifndef AMD_SMI_INCLUDE_AMD_SMI_CPU_CORE_H_
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#define AMD_SMI_INCLUDE_AMD_SMI_CPU_CORE_H_
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#include <string>
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#include <algorithm>
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#include <vector>
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#include "amd_smi/amdsmi.h"
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#include "amd_smi/impl/amd_smi_processor.h"
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namespace amd {
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namespace smi {
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/*Subclass CPU Core*/
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class AMDSmiCpuCore : public AMDSmiProcessor {
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public:
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explicit AMDSmiCpuCore(const uint32_t& core_idx):AMDSmiProcessor(AMD_CPU_CORE),core_idx_(core_idx) {}
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virtual ~AMDSmiCpuCore() {}
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void add_processor(AMDSmiProcessor* processor) { processors_.push_back(processor); }
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std::vector<AMDSmiProcessor*>& get_processors() { return processors_;}
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amdsmi_status_t get_processor_count(uint32_t* processor_count) const;
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private:
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uint32_t core_idx_;
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//uint64_t input;
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//uint32_t idx;
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std::vector<AMDSmiProcessor*> processors_;
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};
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} // namespace smi
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} // namespace amd
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#endif // AMD_SMI_INCLUDE_AMD_SMI_CPU_CORE_H_
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@@ -0,0 +1,81 @@
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/*
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* =============================================================================
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* The University of Illinois/NCSA
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* Open Source License (NCSA)
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*
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* Copyright (c) 2022, Advanced Micro Devices, Inc.
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* All rights reserved.
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*
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* Developed by:
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*
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* AMD Research and AMD ROC Software Development
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*
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* Advanced Micro Devices, Inc.
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*
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* www.amd.com
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to
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* deal with the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* - Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimers.
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* - Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimers in
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* the documentation and/or other materials provided with the distribution.
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* - Neither the names of <Name of Development Group, Name of Institution>,
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* nor the names of its contributors may be used to endorse or promote
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* products derived from this Software without specific prior written
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* permission.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS WITH THE SOFTWARE.
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*
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*/
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#ifndef AMD_SMI_INCLUDE_AMD_SMI_CPU_SOCKET_H_
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#define AMD_SMI_INCLUDE_AMD_SMI_CPU_SOCKET_H_
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#include <string>
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#include <algorithm>
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#include <vector>
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#include "amd_smi/amdsmi.h"
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#include "amd_smi/impl/amd_smi_processor.h"
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#include "amd_smi/impl/amd_smi_cpu_core.h"
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namespace amd {
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namespace smi {
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/*Subclass CPU Socket*/
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class AMDSmiCpuSocket : public AMDSmiProcessor {
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public:
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explicit AMDSmiCpuSocket(const uint32_t& id):AMDSmiProcessor(AMD_CPU),socket_identifier_(id) {}
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virtual ~AMDSmiCpuSocket() {}
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amdsmi_status_t get_cpu_vendor() { return AMDSMI_STATUS_SUCCESS; }
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uint32_t get_cpu_id() const { return cpu_id_; }
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const uint32_t& get_socket_id() const { return socket_identifier_; }
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void add_processor(AMDSmiProcessor* processor) { processors_.push_back(processor); }
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std::vector<AMDSmiProcessor*>& get_processors() { return processors_;}
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amdsmi_status_t get_processor_count(uint32_t* processor_count) const;
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private:
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uint32_t cpu_id_;
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uint32_t socket_identifier_;
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std::vector<AMDSmiProcessor*> processors_;
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};
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} // namespace smi
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} // namespace amd
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#endif // AMD_SMI_INCLUDE_AMD_SMI_CPU_SOCKET_H_
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@@ -50,6 +50,9 @@
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#include "amd_smi/impl/amd_smi_socket.h"
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#include "amd_smi/impl/amd_smi_processor.h"
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#include "amd_smi/impl/amd_smi_drm.h"
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#ifdef ENABLE_ESMI_LIB
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#include "amd_smi/impl/amd_smi_cpu_socket.h"
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#endif
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namespace amd {
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namespace smi {
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@@ -75,6 +78,25 @@ class AMDSmiSystem {
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amdsmi_status_t gpu_index_to_handle(uint32_t gpu_index,
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amdsmi_processor_handle* processor_handle);
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#ifdef ENABLE_ESMI_LIB
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std::vector<AMDSmiCpuSocket*>& get_cpu_sockets() {return cpu_sockets_;}
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amdsmi_status_t handle_to_cpusocket(amdsmi_cpusocket_handle cpusock_handle,
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AMDSmiCpuSocket** cpu_socket);
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amdsmi_status_t cpu_index_to_handle(uint32_t cpu_index,
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amdsmi_cpusocket_handle* cpusock_handle);
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amdsmi_status_t get_cpu_sockets(uint32_t socks);
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amdsmi_status_t get_cpu_cores(uint32_t cpus);
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amdsmi_status_t get_threads_per_core(uint32_t threads);
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amdsmi_status_t get_cpu_family(uint32_t family);
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amdsmi_status_t get_cpu_model(uint32_t model);
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#endif
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private:
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AMDSmiSystem() : init_flag_(AMDSMI_INIT_AMD_GPUS) {}
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amdsmi_status_t get_gpu_bdf_by_index(uint32_t index, std::string& bdf);
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@@ -83,6 +105,15 @@ class AMDSmiSystem {
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AMDSmiDrm drm_;
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std::vector<AMDSmiSocket*> sockets_;
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std::set<AMDSmiProcessor*> processors_; // Track valid processors
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#ifdef ENABLE_ESMI_LIB
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amdsmi_status_t populate_amd_cpus();
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std::vector<AMDSmiCpuSocket*> cpu_sockets_;
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static uint32_t sockets;
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static uint32_t cpus;
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static uint32_t threads;
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static uint32_t family;
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static uint32_t model;
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#endif
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};
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