SWDEV-384557 - Fix engine status query
- Maintain a map of SDMA engine# to stream allocated following a greedy
approach
- Anything past that will query SDMA engine status always and go with a
SDMA or Blit copy path
Change-Id: Ibfaed7f951ab84d80cb0430596a4d11b5aec9202
[ROCm/clr commit: 5865c642d4]
This commit is contained in:
zatwierdzone przez
Rahul Garg
rodzic
74405e021d
commit
8ae30e036d
@@ -32,9 +32,7 @@ DmaBlitManager::DmaBlitManager(VirtualGPU& gpu, Setup setup)
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: HostBlitManager(gpu, setup),
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MinSizeForPinnedTransfer(dev().settings().pinnedMinXferSize_),
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completeOperation_(false),
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context_(nullptr),
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lastCopyMask_(0),
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lastUsedCopyEngine_(HwQueueEngine::Unknown) {}
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context_(nullptr) {}
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inline void DmaBlitManager::synchronize() const {
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if (syncOperation_) {
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@@ -118,8 +116,9 @@ bool DmaBlitManager::readBuffer(device::Memory& srcMemory, void* dstHost,
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if (pinned != nullptr) {
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// Get device memory for this virtual device
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Memory* dstMemory = dev().getRocMemory(pinned);
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if (!hsaCopy(gpuMem(srcMemory), *dstMemory, srcPin, dst, copySizePin)) {
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const KernelBlitManager *kb = dynamic_cast<const KernelBlitManager*>(this);
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if (!kb->copyBuffer(gpuMem(srcMemory), *dstMemory, srcPin, dst,
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copySizePin)) {
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LogWarning("DmaBlitManager::readBuffer failed a pinned copy!");
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gpu().addPinnedMem(pinned);
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break;
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@@ -287,8 +286,9 @@ bool DmaBlitManager::writeBuffer(const void* srcHost, device::Memory& dstMemory,
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if (pinned != nullptr) {
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// Get device memory for this virtual device
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Memory* srcMemory = dev().getRocMemory(pinned);
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if (!hsaCopy(*srcMemory, gpuMem(dstMemory), src, dstPin, copySizePin)) {
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const KernelBlitManager *kb = dynamic_cast<const KernelBlitManager*>(this);
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if (!kb->copyBuffer(*srcMemory, gpuMem(dstMemory), src, dstPin,
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copySizePin)) {
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LogWarning("DmaBlitManager::writeBuffer failed a pinned copy!");
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gpu().addPinnedMem(pinned);
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break;
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@@ -677,63 +677,74 @@ bool DmaBlitManager::hsaCopy(const Memory& srcMemory, const Memory& dstMemory,
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srcAgent = dstAgent = dev().getBackendDevice();
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}
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uint32_t copyMask = 0;
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uint32_t freeEngineMask = 0;
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HwQueueEngine engine = HwQueueEngine::Unknown;
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if ((srcAgent.handle == dev().getCpuAgent().handle) &&
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(dstAgent.handle != dev().getCpuAgent().handle)) {
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engine = HwQueueEngine::SdmaWrite;
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copyMask = dev().fetchSDMAMask(this, false);
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} else if ((srcAgent.handle != dev().getCpuAgent().handle) &&
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(dstAgent.handle == dev().getCpuAgent().handle)) {
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engine = HwQueueEngine::SdmaRead;
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copyMask = dev().fetchSDMAMask(this, true);
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}
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auto wait_events = gpu().Barriers().WaitingSignal(engine);
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hsa_signal_t active = gpu().Barriers().ActiveSignal(kInitSignalValueOne, gpu().timestamp());
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uint32_t freeEngineMask = 0;
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uint32_t copyMask = lastCopyMask_;
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if (engine != HwQueueEngine::Unknown) {
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if (copyMask == Device::kSkipQueryStatus) {
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// Do not query engine status or take copy_on_engine path
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status = HSA_STATUS_ERROR_OUT_OF_RESOURCES;
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}
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if ((engine != lastUsedCopyEngine_)) {
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// Check SDMA engine status
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status = hsa_amd_memory_copy_engine_status(dstAgent, srcAgent, &freeEngineMask);
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ClPrint(amd::LOG_DEBUG, amd::LOG_COPY, "Query copy engine status %x, freemask %x",
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status, freeEngineMask);
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// Return a mask with the rightmost bit set
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copyMask = freeEngineMask - (freeEngineMask & (freeEngineMask - 1));
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}
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if (copyMask == 0) {
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// Check SDMA engine status
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status = hsa_amd_memory_copy_engine_status(dstAgent, srcAgent, &freeEngineMask);
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ClPrint(amd::LOG_DEBUG, amd::LOG_COPY, "Query copy engine status %x, free_engine mask %x",
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status, freeEngineMask);
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// Return a mask with the rightmost bit set
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copyMask = freeEngineMask - (freeEngineMask & (freeEngineMask - 1));
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}
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if (copyMask != 0 && engine != HwQueueEngine::Unknown) {
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// Copy on the first available free engine if ROCr returns a valid mask
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hsa_amd_sdma_engine_id_t copyEngine = static_cast<hsa_amd_sdma_engine_id_t>(copyMask);
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if (copyMask != 0 && status == HSA_STATUS_SUCCESS) {
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auto wait_events = gpu().Barriers().WaitingSignal(engine);
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hsa_signal_t active = gpu().Barriers().ActiveSignal(kInitSignalValueOne, gpu().timestamp());
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// Copy on the first available free engine if ROCr returns a valid mask
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hsa_amd_sdma_engine_id_t copyEngine = static_cast<hsa_amd_sdma_engine_id_t>(copyMask);
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ClPrint(amd::LOG_DEBUG, amd::LOG_COPY,
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"HSA Async Copy on copy_engine=%x, dst=0x%zx, src=0x%zx, "
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"size=%ld, wait_event=0x%zx, completion_signal=0x%zx", copyEngine,
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dst, src, size[0], (wait_events.size() != 0) ? wait_events[0].handle : 0,
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active.handle);
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ClPrint(amd::LOG_DEBUG, amd::LOG_COPY,
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"HSA Async Copy on copy_engine=%x, dst=0x%zx, src=0x%zx, "
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"size=%ld, wait_event=0x%zx, completion_signal=0x%zx", copyEngine,
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dst, src, size[0], (wait_events.size() != 0) ? wait_events[0].handle : 0,
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active.handle);
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status = hsa_amd_memory_async_copy_on_engine(dst, dstAgent, src, srcAgent,
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size[0], wait_events.size(),
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wait_events.data(), active, copyEngine, false);
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status = hsa_amd_memory_async_copy_on_engine(dst, dstAgent, src, srcAgent,
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size[0], wait_events.size(),
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wait_events.data(), active, copyEngine, false);
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if (status != HSA_STATUS_SUCCESS) {
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gpu().Barriers().ResetCurrentSignal();
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}
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}
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} else {
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// Force copy with BLIT in ROCr. Forcing agents to the GPU device causes ROCr to take
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// blit path internally
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srcAgent = dstAgent = dev().getBackendDevice();
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auto wait_events = gpu().Barriers().WaitingSignal(engine);
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hsa_signal_t active = gpu().Barriers().ActiveSignal(kInitSignalValueOne, gpu().timestamp());
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ClPrint(amd::LOG_DEBUG, amd::LOG_COPY,
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"HSA Async Blit Copy dst=0x%zx, src=0x%zx, size=%ld, wait_event=0x%zx, "
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"completion_signal=0x%zx",
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dst, src, size[0], (wait_events.size() != 0) ? wait_events[0].handle : 0,
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active.handle);
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"HSA Async Blit Copy dst=0x%zx, src=0x%zx, size=%ld, wait_event=0x%zx, "
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"completion_signal=0x%zx",
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dst, src, size[0], (wait_events.size() != 0) ? wait_events[0].handle : 0,
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active.handle);
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status = hsa_amd_memory_async_copy(dst, dstAgent, src, srcAgent,
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size[0], wait_events.size(), wait_events.data(), active);
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if (status != HSA_STATUS_SUCCESS) {
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gpu().Barriers().ResetCurrentSignal();
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}
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}
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if (status == HSA_STATUS_SUCCESS) {
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lastUsedCopyEngine_ = engine;
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lastCopyMask_ = copyMask;
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gpu().addSystemScope();
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} else {
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gpu().Barriers().ResetCurrentSignal();
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LogPrintfError("HSA copy from host to device failed with code %d", status);
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LogPrintfError("HSA copy failed with code %d, falling to Blit copy", status);
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}
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return (status == HSA_STATUS_SUCCESS);
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@@ -855,6 +866,9 @@ KernelBlitManager::~KernelBlitManager() {
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kernels_[i]->release();
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}
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}
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dev().resetSDMAMask(this);
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if (nullptr != program_) {
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program_->release();
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}
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@@ -2264,9 +2278,26 @@ bool KernelBlitManager::copyBuffer(device::Memory& srcMemory, device::Memory& ds
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#endif
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#endif
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if (setup_.disableHwlCopyBuffer_ ||
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(!srcMemory.isHostMemDirectAccess() && !dstMemory.isHostMemDirectAccess() &&
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!(p2p || asan) && !ipcShared)) {
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bool useShaderCopyPath = setup_.disableHwlCopyBuffer_ ||
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(!srcMemory.isHostMemDirectAccess() &&
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!dstMemory.isHostMemDirectAccess() &&
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!(p2p || asan) && !ipcShared);
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if (!useShaderCopyPath) {
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if (amd::IS_HIP) {
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// Update the command type for ROC profiler
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if (srcMemory.isHostMemDirectAccess()) {
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gpu().SetCopyCommandType(CL_COMMAND_WRITE_BUFFER);
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}
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if (dstMemory.isHostMemDirectAccess()) {
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gpu().SetCopyCommandType(CL_COMMAND_READ_BUFFER);
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}
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}
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result = DmaBlitManager::copyBuffer(srcMemory, dstMemory, srcOrigin, dstOrigin, sizeIn, entire,
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copyMetadata);
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}
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if (!result) {
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uint blitType = BlitCopyBuffer;
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size_t dim = 1;
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size_t globalWorkOffset[3] = {0, 0, 0};
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@@ -2338,18 +2369,6 @@ bool KernelBlitManager::copyBuffer(device::Memory& srcMemory, device::Memory& ds
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address parameters = captureArguments(kernels_[blitType]);
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result = gpu().submitKernelInternal(ndrange, *kernels_[blitType], parameters, nullptr);
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releaseArguments(parameters);
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} else {
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if (amd::IS_HIP) {
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// Update the command type for ROC profiler
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if (srcMemory.isHostMemDirectAccess()) {
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gpu().SetCopyCommandType(CL_COMMAND_WRITE_BUFFER);
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}
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if (dstMemory.isHostMemDirectAccess()) {
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gpu().SetCopyCommandType(CL_COMMAND_READ_BUFFER);
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}
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}
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result = DmaBlitManager::copyBuffer(srcMemory, dstMemory, srcOrigin, dstOrigin, sizeIn, entire,
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copyMetadata);
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}
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synchronize();
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