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P4 to Git Change 1172995 by gandryey@gera-w8 on 2015/07/22 18:43:35

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ECR #304775 - Remove unused headers for the old d3d9 interop in winxp.

Affected files ...

... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gslbe/src/include/extern/udx/d3d/calif.h#2 delete
... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gslbe/src/include/extern/udx/d3d/d3dshaderdefs.h#2 delete
... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gslbe/src/include/extern/udx/d3d/fourcc.h#2 delete
This commit is contained in:
foreman
2015-07-22 18:52:33 -04:00
parent d3f0ddafea
commit 8bc2d4f33c
3 changed files with 0 additions and 493 deletions
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rocclr/runtime/device/gpu/gslbe/src/include/extern/udx/d3d/calif.h
Vendored
-284
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@@ -1,284 +0,0 @@
/*****************************************************************************
*
*
*
* Trade secret of ATI Technologies, Inc.
* Copyright 2006, ATI Technologies, Inc., (unpublished)
*
* All rights reserved. This notice is intended as a precaution against
* inadvertent publication and does not imply publication or any waiver
* of confidentiality. The year included in the foregoing notice is the
* year of creation of the work.
*
*
****************************************************************************
*/
#ifndef __CALIF_H__
#define __CALIF_H__
#define CALIF_VERSION_MAJOR 1
#define CALIF_VERSION_MINOR 1
#define CALIF_HELPER_SURF_WIDTH 256
#define CALIF_HELPER_SURF_HEIGHT 8
#define CALIF_SEMAPHORE_SURF_WIDTH 8
#define CALIF_SEMAPHORE_SURF_HEIGHT 1
// Structure for commuticating with driver through Lock backdoor
typedef struct _CALIF_LOCK_COMM_HEADER
{
UINT uCmd;
UINT *puRes;
PVOID pInputBuffer;
UINT uInputBufferSize;
PVOID pOutputBuffer;
UINT uOutputBufferSize;
} CALIF_LOCK_COMM_HEADER, *PCALIF_LOCK_COMM_HEADER;
// Commands for LOCK backdoor
typedef enum _CALIF_LOCK_CMD
{
CALIF_LOCK_CMD_GET_VERSION = 1,
CALIF_LOCK_CMD_NEXT_SURF_INFO = 2,
CALIF_LOCK_CMD_GET_SURF_INFO = 3,
CALIF_LOCK_CMD_SET_ALIAS_INFO = 4,
CALIF_LOCK_CMD_SET_CAL_TARGET = 5,
CALIF_LOCK_CMD_GET_CAL_STATUS = 6,
CALIF_LOCK_CMD_GET_RENDER_STATUS = 7,
CALIF_LOCK_CMD_INVALID = 0xFFFFFFFF,
} CALIF_LOCK_CMD;
typedef enum _CALIF_LOCK_CMD_RES
{
CALIF_LOCK_CMD_RES_OK = 0,
CALIF_LOCK_CMD_RES_ERROR = 1,
CALIF_LOCK_CMD_RES_INVALID = 0xFFFFFFFF,
} CALIF_LOCK_CMD_RES;
// Input structure
typedef struct _CALIF_CAL_TARGET
{
ULONG ulSize;
ULONG ulFlags;
ULONG ulNumTargets;
ULONG ulTargets[MAX_CAL_TARGETS];
ULONG ulReserved[1]; // 16 byte alignment
} CALIF_CAL_TARGET, *PCALIF_CAL_TARGET;
#define CALIF_DEV_CAP_CAPABLE 0x00000001
#define CALIF_DEV_CAP_ENABLE 0x00000002
#define CALIF_DEV_CAP_PRIMARY 0x80000000
typedef struct _CALIF_DEV_INFO
{
ULONG ulIndex;
ULONG ulCaps; // CALIF_DEV_CAP_XXX
ULONG ulFBSize;
LONGLONG llFBSharedSize;
UCHAR ucDevicePath[MAX_REGISTRY_PATH];
ULONG ulReserved[2];
} CALIF_DEV_INFO, *PCALIF_DEV_INFO;
// Output structure
typedef struct _CALIF_CAL_STATUS
{
ULONG ulSize;
ULONG ulFlags;
ULONG ulCurrentIndex;
ULONG ulAdapterCount;
LONGLONG llSharedCacheableSize;
LONGLONG llSharedUSWCSize;
ULONG ulLinkCount;
ULONG ulLinkAdaper[MAX_CAL_TARGETS];
BOOL bP2PCap[MAX_CAL_DEVICE][MAX_CAL_DEVICE];
CALIF_DEV_INFO devInfo[MAX_CAL_DEVICE];
ULONG ulReserved[3];
} CALIF_CAL_STATUS, *PCALIF_CAL_STATUS;
// Output structure
typedef struct _CALIF_VERSION
{
ULONG ulSize;
ULONG ulFlags;
UINT uMajor; // Major version
UINT uMinor; // Minor version
} CALIF_VERSION, *PCALIF_VERSION;
// Surface heap choice
typedef enum _CALIF_SURF_HEAP
{
CALIF_SURF_HEAP_UNKNOWN = 0, // VCAM real mode or dummy surf
CALIF_SURF_HEAP_LOCAL = 1, // Local Visible + Local Invisible
CALIF_SURF_HEAP_LOCALIF_VISIBLE = 2,
CALIF_SURF_HEAP_USWC = 3,
CALIF_SURF_HEAP_CACHEABLE = 4,
CALIF_SURF_HEAP_SHARED_USWC = 5,
CALIF_SURF_HEAP_SHARED_CACHEABLE = 6,
CALIF_SURF_HEAP_INVALID = 0xFFFFFFFF,
} CALIF_SURF_HEAP;
// Surface flag
#define CALIF_NEXT_SURF_FLAG_DUMMY 0x80000000
#define CALIF_NEXT_SURF_FLAG_LINEAR 0x40000000
#define CALIF_NEXT_SURF_FLAG_ARENA 0x20000000
// Input structure
typedef struct _CALIF_NEXT_SURF_INFO
{
ULONG ulSize;
ULONG ulFlags;
// to match it later at surface creation time
UINT uWidth;
UINT uHeight;
D3DFORMAT d3dFormat;
ULONG_PTR lpProcessID;
// info
CALIF_SURF_HEAP uHeap;
UINT uFlags;
#if _WIN64
ULONG ulReserved[3];
#endif
} CALIF_NEXT_SURF_INFO, *PCALIF_NEXT_SURF_INFO;
// Output structure
typedef struct _CALIF_SURF_INFO
{
ULONG ulSize;
ULONG ulFlags;
ULONG ulDeviceIndex; // current device id
ULONG_PTR lpSurfHandle; // VCAM handle if VCAM is on
LARGE_INTEGER gpuDevAddr; // mc address of the surface
LONGLONG llHeapOffset; // offset from the beginning of the heap
UINT uMemSize; // total memory size
CALIF_SURF_HEAP uHeap; // memory pool
UINT uGranularity; // minimum RT aligment
UINT uBitsPerPixel; // bits per pixel
UINT uActualWidth; // padded width pixel pitch
UINT uActualHeight; // padded height pitch
UINT uPitch; // padded width byte pitch
UINT uTile; // Tiling of surface
UINT uTileSwizzle; // Tile swizzle of surface
#if !_WIN64
ULONG ulReserved[1];
#endif
} CALIF_SURF_INFO, *PCALIF_SURF_INFO;
// Input structure
typedef struct _CALIF_ALIAS_SURF_INFO
{
ULONG ulSize;
ULONG ulFlags;
ULONG ulDeviceIndex; // device id we want to alias to
ULONG_PTR lpSurfHandle;
LONGLONG llHeapOffset; // offset from the beginning of the heap
UINT uMemSize; // total memory size
CALIF_SURF_HEAP uHeap; // memory pool
UINT uGranularity; // minimum RT aligment
UINT uBitsPerPixel; // bits per pixel
UINT uActualWidth; // padded width pixel pitch
UINT uActualHeight; // padded height pitch
UINT uPitch; // padded width byte pitch
#if _WIN64
ULONG ulReserved[3];
#endif
} CALIF_ALIAS_SURF_INFO, *PCALIF_ALIAS_SURF_INFO;
// Output structure
typedef struct _CALIF_RENDER_STATUS
{
ULONG ulSize;
ULONG ulFlags;
BOOL bSurfBusy;
ULONG ulReserved[1];
} CALIF_RENDER_STATUS, *PCALIF_RENDER_STATUS;
// Commands for StretchBlt backdoor
typedef enum _CALIF_SBLT_CMD
{
CALIF_SBLT_CMD_SURF_MARK_HELPER = 0x2200,
CALIF_SBLT_CMD_SURF_GET_SURF_INFO = 0x2400,
CALIF_SBLT_CMD_SURF_ALIAS = 0x2600,
CALIF_SBLT_CMD_SEMAPHORE_WAIT = 0x4200,
CALIF_SBLT_CMD_SEMAPHORE_SIGNAL = 0x4400,
CALIF_SBLT_CMD_OUTPUT_CACHE_FLUSH = 0x4600,
CALIF_SBLT_CMD_INPUT_CACHE_INVALIDATE = 0x6200,
CALIF_SBLT_CMD_GET_RENDER_STATUS = 0x6400,
CALIF_SBLT_CMD_PIN_SURF = 0x6600,
CALIF_SBLT_CMD_INVALID = 0xFFFF,
} CALIF_SBLT_CMD;
#define CALIF_SBLT_CMD_RECT_MASK__LEFT 0x000F
#define CALIF_SBLT_CMD_RECT_MASK__TOP 0x00F0
#define CALIF_SBLT_CMD_RECT_MASK__RIGHT 0x0F00
#define CALIF_SBLT_CMD_RECT_MASK__BOTTOM 0xF000
#define CALIF_SBLT_CMD_RECT_SHIFT__LEFT 0
#define CALIF_SBLT_CMD_RECT_SHIFT__TOP 4
#define CALIF_SBLT_CMD_RECT_SHIFT__RIGHT 8
#define CALIF_SBLT_CMD_RECT_SHIFT__BOTTOM 12
#endif//__CALIF_H__
rocclr/runtime/device/gpu/gslbe/src/include/extern/udx/d3d/d3dshaderdefs.h
Vendored
-99
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@@ -1,99 +0,0 @@
/*****************************************************************************
*
*
*
* Trade secret of ATI Technologies, Inc.
* Copyright 2000, ATI Technologies, Inc., (unpublished)
*
* All rights reserved. This notice is intended as a precaution against
* inadvertent publication and does not imply publication or any waiver
* of confidentiality. The year included in the foregoing notice is the
* year of creation of the work.
*
*
****************************************************************************
*/
#ifndef __D3DSHADERDEFS_H__
#define __D3DSHADERDEFS_H__
#define D3DSI_OPCODE_PARAM (1 << 31)
#define D3DSI_GETCOMMENTSIZE(token) (((token) & D3DSI_COMMENTSIZE_MASK) >> \
D3DSI_COMMENTSIZE_SHIFT)
#define D3DSI_GETDSTSHIFT(token) (((token) & D3DSP_DSTSHIFT_MASK) >> D3DSP_DSTSHIFT_SHIFT)
// D3D uses 2 swizzle bits per component. Define them since they are not
// available in d3d header files.
#define D3DSP_SWIZZLE_BITS_PER_COMP 2
#define D3DSP_SWIZZLE_XYZW_MASK 0x3
// DST related: Parameter definition writemask shifts - missing from D3D header
#define D3DSP_WRITEMASK_SHIFT 16
#define D3DSP_WRITEMASK_ASHIFT 19
// DX9 Ref uses 7. But if only upto _X8 & _D8 are supported, the mask should be 3
#define D3DSP_D3D_DSTSHIFT_MASK 3
#define D3DSP_SHADER_TYPE_MASK 0xFFFF0000
#define D3DSP_PS_TYPE 0xFFFF0000
#define D3DSP_VS_TYPE 0xFFFE0000
// This is necessary to avoid a duplicate definition of these functions
// in C++ source files that use this header. These functions are already
// defined in d3dhal.h inside a "#ifdef __cplusplus" block.
#ifndef __cplusplus
// This gets regtype, and also maps D3DSPR_CONSTn to D3DSPR_CONST
// (for easier parsing)
ATI_INLINE DWORD D3DSI_GETREGTYPE_RESOLVING_CONSTANTS(DWORD token)
{
DWORD RegType = D3DSI_GETREGTYPE(token);
switch (RegType)
{
case D3DSPR_CONST4:
case D3DSPR_CONST3:
case D3DSPR_CONST2:
return D3DSPR_CONST;
default:
return RegType;
}
}
// The inline function below retrieves register number for an opcode,
// taking into account that: if the type is a
// D3DSPR_CONSTn, the register number needs to be remapped.
//
// D3DSPR_CONST is for c0-c2047
// D3DSPR_CONST2 is for c2048-c4095
// D3DSPR_CONST3 is for c4096-c6143
// D3DSPR_CONST4 is for c6144-c8191
//
// For example if the instruction token specifies type D3DSPR_CONST4, reg# 3,
// the register number retrieved is 6147.
// For other register types, the register number is just returned unchanged.
ATI_INLINE DWORD D3DSI_GETREGNUM_RESOLVING_CONSTANTS(DWORD token)
{
DWORD RegType = D3DSI_GETREGTYPE(token);
DWORD RegNum = D3DSI_GETREGNUM(token);
switch(RegType)
{
case D3DSPR_CONST4:
return RegNum + 6144;
case D3DSPR_CONST3:
return RegNum + 4096;
case D3DSPR_CONST2:
return RegNum + 2048;
default:
return RegNum;
}
}
#endif // __cplusplus
#define PSTR_MAX_NUMSRCPARAMS 6
#define PSTR_NUM_COMPONENTS_IN_REGISTER 4
#endif // __D3DSHADERDEFS_H__
rocclr/runtime/device/gpu/gslbe/src/include/extern/udx/d3d/fourcc.h
Vendored
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//
// Workfile: fourcc.h
//
// Description: FourCC definitions
//
// Trade secret of ATI Technologies, Inc.
// Copyright 1999, ATI Technologies, Inc., (unpublished)
//
// All rights reserved. This notice is intended as a precaution against
// inadvertent publication and does not imply publication or any waiver
// of confidentiality. The year included in the foregoing notice is the
// year of creation of the work.
//
//
#ifndef _FOURCC_H_
#define _FOURCC_H_
//#include "atidxinc.h"
#define FOURCC_YUY2 MAKEFOURCC('Y','U','Y','2')
#define FOURCC_UYVY MAKEFOURCC('U','Y','V','Y')
#define FOURCC_YV12 MAKEFOURCC('Y','V','1','2')
#define FOURCC_YUV12 FOURCC_YV12
#define FOURCC_YVU9 MAKEFOURCC('Y','V','U','9')
#define FOURCC_IF09 MAKEFOURCC('I','F','0','9')
#define FOURCC_IMC4 MAKEFOURCC('I','M','C','4')
#define FOURCC_IYUV MAKEFOURCC('I','Y','U','V')
#define FOURCC_NV11 MAKEFOURCC('N','V','1','1')
#define FOURCC_NV12 MAKEFOURCC('N','V','1','2')
#define FOURCC_NV21 MAKEFOURCC('N','V','2','1')
//Microsoft specific format for WebTV
#define FOURCC_VBID MAKEFOURCC('V','B','I','D')
#define FOURCC_MCAM MAKEFOURCC('M','C','A','M')
#define FOURCC_MC12 MAKEFOURCC('M','C','1','2')
#define FOURCC_MCR4 MAKEFOURCC('M','C','R','4')
#define FOURCC_M2IA MAKEFOURCC('M','2','I','A')
#define FOURCC_M2AM MAKEFOURCC('M','2','A','M')
#define FOURCC_M2R4 MAKEFOURCC('M','2','R','4')
#define FOURCC_AYUV MAKEFOURCC('A','Y','U','V')
#define FOURCC_AI44 MAKEFOURCC('A','I','4','4')
#define FOURCC_XENC MAKEFOURCC('X','E','N','C')
// OpenGL Surfaces
#define FOURCC_OGLZ MAKEFOURCC('O','G','L','Z')
#define FOURCC_OGNZ MAKEFOURCC('O','G','N','Z')
#define FOURCC_OGLS MAKEFOURCC('O','G','L','S')
#define FOURCC_OGNS MAKEFOURCC('O','G','N','S')
#define FOURCC_OGLT MAKEFOURCC('O','G','L','T')
#define FOURCC_OGNT MAKEFOURCC('O','G','N','T')
#define FOURCC_OGLB MAKEFOURCC('O','G','L','B')
#define FOURCC_DDES MAKEFOURCC('D','D','E','S')
#define FOURCC_PBSM MAKEFOURCC('P','B','S','M')
#define FOURCC_ATI1 MAKEFOURCC('A','T','I','1')
#define FOURCC_ATI2 MAKEFOURCC('A','T','I','2')
// Alias of ARGB-8888 for special MM app. to store security content
#define FOURCC_SORT MAKEFOURCC('S','O','R','T')
// Alias of YUY2 for special MM app. to store security content
#define FOURCC_SYV2 MAKEFOURCC('S','Y','V','2')
// Communication surface for special MM app. to enable security content playback
#define FOURCC_EAPI MAKEFOURCC('E','A','P','I')
// Communication surface
#define FOURCC_ATIC MAKEFOURCC('A','T','I','C')
// Fake format for exposing DX9c geometry instancing
#define FOURCC_INST MAKEFOURCC('I','N','S','T')
// Fake format for exposing R2VB support
// must match FOURCC_R2VB in d3d/atir2vb.h
#define FOURCC_R2VB MAKEFOURCC('R','2','V','B')
// Depth Stencil Texture formats.
#define FOURCC_DF16 MAKEFOURCC('D','F','1','6')
#define FOURCC_DF24 MAKEFOURCC('D','F','2','4')
// FP_11_11_10 format - used internally for optimization
#define FOURCC_FP11 MAKEFOURCC('F','P','1','1')
// Fetch4:
// GET4 is used both as fake format for exposing Fetch4 and as enable value.
// GET1 is used only as disable value.
#define FOURCC_GET4 MAKEFOURCC('G','E','T','4')
#define FOURCC_GET1 MAKEFOURCC('G','E','T','1')
// ATI Compute Abstraction Layer (CAL)
// U8X1 stands for unsigned 8 bits by 1 component
// S6X4 stands for signed 16 bits by 4 components
#define FOURCC_ATIP MAKEFOURCC('A','T','I','P')
#define FOURCC_U8X1 MAKEFOURCC('U','8','X','1')
#define FOURCC_S8X1 MAKEFOURCC('S','8','X','1')
#define FOURCC_U8X2 MAKEFOURCC('U','8','X','2')
#define FOURCC_S8X2 MAKEFOURCC('S','8','X','2')
#define FOURCC_S8X4 MAKEFOURCC('S','8','X','4')
#define FOURCC_U6X1 MAKEFOURCC('U','6','X','1')
#define FOURCC_S6X1 MAKEFOURCC('S','6','X','1')
#define FOURCC_S6X2 MAKEFOURCC('S','6','X','2')
#define FOURCC_S6X4 MAKEFOURCC('S','6','X','4')
// ATI semaphore, currently used by CAL
#define FOURCC_SEMA MAKEFOURCC('S','E','M','A')
#endif // _FOURCC_H_