From 8cb686fdc58904f96f3cc73dc900f7f07e5dc8de Mon Sep 17 00:00:00 2001
From: Chris Freehill <Chris.Freehill@amd.com>
Date: Tue, 9 Mar 2021 14:18:10 -0600
Subject: [PATCH] Add gfx1034 support

Change-Id: I2d4bfcb9012704daf7de10739c966827bd2a09e2
---
 rocrtst/suites/test_common/CMakeLists.txt          | 2 +-
 runtime/hsa-runtime/core/runtime/isa.cpp           | 1 +
 runtime/hsa-runtime/image/blit_kernel.cpp          | 3 +++
 runtime/hsa-runtime/image/blit_src/CMakeLists.txt  | 2 +-
 runtime/hsa-runtime/inc/amd_hsa_elf.h              | 2 +-
 runtime/hsa-runtime/libamdhsacode/amd_hsa_code.cpp | 1 +
 6 files changed, 8 insertions(+), 3 deletions(-)

diff --git a/rocrtst/suites/test_common/CMakeLists.txt b/rocrtst/suites/test_common/CMakeLists.txt
index ecdbb05581..523d80ab06 100755
--- a/rocrtst/suites/test_common/CMakeLists.txt
+++ b/rocrtst/suites/test_common/CMakeLists.txt
@@ -54,7 +54,7 @@ set ( CPACK_DEBIAN_PACKAGE_HOMEPAGE "https://github.com/RadeonOpenCompute/ROCR-R
 set ( CPACK_PACKAGE_HOMEPAGE_URL "https://github.com/RadeonOpenCompute/ROCR-Runtime" )
 
 
-set(DEFAULT_TARGETS "gfx700;gfx701;gfx702;gfx801;gfx802;gfx803;gfx805;gfx810;gfx900;gfx902;gfx904;gfx906;gfx908;gfx909;gfx90a;gfx90c;gfx1010;gfx1011;gfx1012;gfx1030;gfx1031;gfx1032;gfx1033")
+set(DEFAULT_TARGETS "gfx700;gfx701;gfx702;gfx801;gfx802;gfx803;gfx805;gfx810;gfx900;gfx902;gfx904;gfx906;gfx908;gfx909;gfx90a;gfx90c;gfx1010;gfx1011;gfx1012;gfx1030;gfx1031;gfx1032;gfx1033;gfx1034")
 
 #
 # Currently support for Windows platform is not present
diff --git a/runtime/hsa-runtime/core/runtime/isa.cpp b/runtime/hsa-runtime/core/runtime/isa.cpp
index b49dd65d9d..b7bf885e7f 100755
--- a/runtime/hsa-runtime/core/runtime/isa.cpp
+++ b/runtime/hsa-runtime/core/runtime/isa.cpp
@@ -309,6 +309,7 @@ constexpr size_t hsa_name_size = 63;
   ISAREG_ENTRY_GEN("gfx1031",                10, 3, 1, unsupported, unsupported)
   ISAREG_ENTRY_GEN("gfx1032",                10, 3, 2, unsupported, unsupported)
   ISAREG_ENTRY_GEN("gfx1033",                10, 3, 3, unsupported, unsupported)
+  ISAREG_ENTRY_GEN("gfx1034",                10, 3, 4, unsupported, unsupported)
 #undef ISAREG_ENTRY_GEN
   return supported_isas;
 }
diff --git a/runtime/hsa-runtime/image/blit_kernel.cpp b/runtime/hsa-runtime/image/blit_kernel.cpp
index ffdee38e72..d63a0bc948 100644
--- a/runtime/hsa-runtime/image/blit_kernel.cpp
+++ b/runtime/hsa-runtime/image/blit_kernel.cpp
@@ -92,6 +92,7 @@ extern uint8_t ocl_blit_object_gfx1030[];
 extern uint8_t ocl_blit_object_gfx1031[];
 extern uint8_t ocl_blit_object_gfx1032[];
 extern uint8_t ocl_blit_object_gfx1033[];
+extern uint8_t ocl_blit_object_gfx1034[];
 
 // Arguments inserted by OCL compiler, all zero here.
 struct OCLHiddenArgs {
@@ -1013,6 +1014,8 @@ hsa_status_t BlitKernel::GetPatchedBlitObject(const char* agent_name,
     *blit_code_object = ocl_blit_object_gfx1032;
   } else if (sname == "gfx1033") {
     *blit_code_object = ocl_blit_object_gfx1033;
+  } else if (sname == "gfx1034") {
+    *blit_code_object = ocl_blit_object_gfx1034;
   } else {
     return HSA_STATUS_ERROR_INVALID_ISA_NAME;
   }
diff --git a/runtime/hsa-runtime/image/blit_src/CMakeLists.txt b/runtime/hsa-runtime/image/blit_src/CMakeLists.txt
index 48cd4bb033..c2bee249d1 100644
--- a/runtime/hsa-runtime/image/blit_src/CMakeLists.txt
+++ b/runtime/hsa-runtime/image/blit_src/CMakeLists.txt
@@ -69,7 +69,7 @@ endif()
 
 # Determine the target devices if not specified
 if (NOT DEFINED TARGET_DEVICES)
-  set (TARGET_DEVICES "gfx700;gfx701;gfx702;gfx801;gfx802;gfx803;gfx805;gfx810;gfx900;gfx902;gfx904;gfx906;gfx908;gfx909;gfx90a;gfx90c;gfx1010;gfx1011;gfx1012;gfx1030;gfx1031;gfx1032;gfx1033")
+  set (TARGET_DEVICES "gfx700;gfx701;gfx702;gfx801;gfx802;gfx803;gfx805;gfx810;gfx900;gfx902;gfx904;gfx906;gfx908;gfx909;gfx90a;gfx90c;gfx1010;gfx1011;gfx1012;gfx1030;gfx1031;gfx1032;gfx1033;gfx1034")
 endif()
 set( TARGET_DEVICES ${TARGET_DEVICES} CACHE STRING "Build targets" FORCE )
 
diff --git a/runtime/hsa-runtime/inc/amd_hsa_elf.h b/runtime/hsa-runtime/inc/amd_hsa_elf.h
index 698286979b..9d7f7e14d3 100644
--- a/runtime/hsa-runtime/inc/amd_hsa_elf.h
+++ b/runtime/hsa-runtime/inc/amd_hsa_elf.h
@@ -116,7 +116,7 @@ enum : unsigned {
   EF_AMDGPU_MACH_AMDGCN_GFX705        = 0x03b,
   EF_AMDGPU_MACH_AMDGCN_GFX805        = 0x03c,
   EF_AMDGPU_MACH_AMDGCN_RESERVED_0X3D = 0x03d,
-  EF_AMDGPU_MACH_AMDGCN_RESERVED_0X3E = 0x03e,
+  EF_AMDGPU_MACH_AMDGCN_GFX1034       = 0x03e,
   EF_AMDGPU_MACH_AMDGCN_GFX90A        = 0x03f,
   EF_AMDGPU_MACH_AMDGCN_RESERVED_0X40 = 0x040,
   EF_AMDGPU_MACH_AMDGCN_RESERVED_0X41 = 0x041,
diff --git a/runtime/hsa-runtime/libamdhsacode/amd_hsa_code.cpp b/runtime/hsa-runtime/libamdhsacode/amd_hsa_code.cpp
index 3b21b69c41..ed97ae2484 100644
--- a/runtime/hsa-runtime/libamdhsacode/amd_hsa_code.cpp
+++ b/runtime/hsa-runtime/libamdhsacode/amd_hsa_code.cpp
@@ -577,6 +577,7 @@ namespace code {
       case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1031: name = "gfx1031"; xnack_supported = false; sramecc_supported = false; break;
       case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1032: name = "gfx1032"; xnack_supported = false; sramecc_supported = false; break;
       case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1033: name = "gfx1033"; xnack_supported = false; sramecc_supported = false; break;
+      case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1034: name = "gfx1034"; xnack_supported = false; sramecc_supported = false; break;
       default: return false;
       }
       return true;