2.17.1-1
Add new NVLS algorithm for allreduce using NVLink SHARP (intra-node only).
Add new config options: cgaClusterSize, minCTAs, maxCTAs, netName.
Enable LL128 when we use PXN to close rings.
NVTX3 includes update.
Fix crash when one CollNet (SHARP) rail fails to initialize.
[ROCm/rccl commit: 5d3ab08b69]
Этот коммит содержится в:
@@ -25,6 +25,7 @@ ncclResult_t bootstrapSend(void* commState, int peer, int tag, void* data, int s
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ncclResult_t bootstrapRecv(void* commState, int peer, int tag, void* data, int size);
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ncclResult_t bootstrapBarrier(void* commState, int *ranks, int rank, int nranks, int tag);
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ncclResult_t bootstrapIntraNodeAllGather(void* commState, int *ranks, int rank, int nranks, void* allData, int size);
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ncclResult_t bootstrapIntraNodeBroadcast(void* commState, int *ranks, int rank, int nranks, int root, void* bcastData, int size);
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ncclResult_t bootstrapClose(void* commState);
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ncclResult_t bootstrapAbort(void* commState);
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#endif
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@@ -53,7 +53,8 @@ struct ncclDevRedOpFull {
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DECL4(func, RING, devredop, type, undef) \
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DECL4(func, TREE, devredop, type, undef) \
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DECL4(func, COLLNET_DIRECT, devredop, type, undef) \
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DECL4(func, COLLNET_CHAIN, devredop, type, undef)
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DECL4(func, COLLNET_CHAIN, devredop, type, undef) \
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DECL4(func, NVLS, devredop, type, undef)
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#if defined(__CUDA_BF16_TYPES_EXIST__)
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#define DECL2(func, devredop, undefForFloat) \
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@@ -121,4 +122,13 @@ extern __device__ void NCCL_ONERANK_REDUCE_NAME(PreMulSum, double)();
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#define REDUCE_CHUNKSTEPS 1
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#define NCCL_MAX_SLICE_PER_CHUNK 2 // max value for CHUNKSTEPS/SLICESTEPS, must accord with above
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// We can't use the enum identifiers like ncclSum, ncclFloat, etc since this
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// macro will be used in preprocessor conditionals where enums have no meaning.
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#define NCCL_NVLS_SUPPORTS(/*ncclDataType_t*/ type, /*ncclDevRedOp_t*/ red) \
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(((type==2 || type==3) && (red==0 || red==2 || red==3)) || \
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((type==4 || type==5) && (red==0 || red==2 || red==3)) || \
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((type==6 || type==9) && (red==0 || red==2 || red==3)) || \
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(type==7 && red==0) || \
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(type==8 && red==0))
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#endif
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@@ -104,6 +104,7 @@ struct ncclChannel {
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struct ncclTree tree;
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struct ncclTree collnetChain;
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struct ncclDirect collnetDirect;
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struct ncclNvls nvls;
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int id; // index of this channel
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uint32_t workFifoSent; // last used work index+1
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uint64_t p2pOpCount;
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@@ -177,8 +178,10 @@ struct ncclComm {
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int nRanks; // number of GPUs in communicator
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int cudaDev; // my cuda device index
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int compCap; // compute capability of the GPU
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int minCompCap; // min compute capability in the communicator
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int64_t busId; // my PCI bus ID in int format
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cpu_set_t cpuAffinity; // CPU affinity of the GPU
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int cudaArch; // matches __CUDA_ARCH__ of device
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int node;
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int nNodes;
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@@ -201,6 +204,7 @@ struct ncclComm {
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// Channels for collectives
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int nChannels;
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int nvlsChannels;
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// Channels (per peer) for p2p
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int p2pnChannels;
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int p2pnChannelsPerPeer;
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@@ -257,6 +261,10 @@ struct ncclComm {
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int collNetSupport;
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int intraHighestTransportType;
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// NVLink SHARP (NVLS) support
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int nvlsSupport;
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void* nvlsResources;
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size_t channelSize; // User requested work size (bytes) for channel partitions
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// Internal streams
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@@ -288,6 +296,11 @@ struct ncclComm {
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// communicator mode
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int blocking;
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// CGA cluster size
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int cgaClusterSize;
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int minCTAs, maxCTAs;
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// network interface name
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char *netName;
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// initState is to more conveniently reclaim resources when errors happen.
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ncclResult_t initState;
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// flag to indicate if ncclCommFinalize() is called
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@@ -73,10 +73,32 @@ DECLARE_CUDA_PFN_EXTERN(cuGetErrorName, 6000);
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DECLARE_CUDA_PFN_EXTERN(cuMemGetAddressRange, 3020);
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DECLARE_CUDA_PFN_EXTERN(cuCtxCreate, 3020);
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DECLARE_CUDA_PFN_EXTERN(cuCtxDestroy, 4000);
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DECLARE_CUDA_PFN_EXTERN(cuCtxGetCurrent, 4000);
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DECLARE_CUDA_PFN_EXTERN(cuCtxSetCurrent, 4000);
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DECLARE_CUDA_PFN_EXTERN(cuCtxGetDevice, 2000);
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// cuMem API support
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DECLARE_CUDA_PFN_EXTERN(cuMemAddressReserve, 10020);
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DECLARE_CUDA_PFN_EXTERN(cuMemAddressFree, 10020);
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DECLARE_CUDA_PFN_EXTERN(cuMemCreate, 10020);
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DECLARE_CUDA_PFN_EXTERN(cuMemGetAllocationGranularity, 10020);
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DECLARE_CUDA_PFN_EXTERN(cuMemExportToShareableHandle, 10020);
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DECLARE_CUDA_PFN_EXTERN(cuMemImportFromShareableHandle, 10020);
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DECLARE_CUDA_PFN_EXTERN(cuMemMap, 10020);
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DECLARE_CUDA_PFN_EXTERN(cuMemRelease, 10020);
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DECLARE_CUDA_PFN_EXTERN(cuMemSetAccess, 10020);
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DECLARE_CUDA_PFN_EXTERN(cuMemUnmap, 10020);
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#if CUDA_VERSION >= 11070
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DECLARE_CUDA_PFN_EXTERN(cuMemGetHandleForAddressRange, 11070); // DMA-BUF support
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#endif
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#if CUDA_VERSION >= 12010
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/* NVSwitch Multicast support */
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DECLARE_CUDA_PFN_EXTERN(cuMulticastAddDevice, 12010);
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DECLARE_CUDA_PFN_EXTERN(cuMulticastBindMem, 12010);
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DECLARE_CUDA_PFN_EXTERN(cuMulticastBindAddr, 12010);
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DECLARE_CUDA_PFN_EXTERN(cuMulticastCreate, 12010);
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DECLARE_CUDA_PFN_EXTERN(cuMulticastGetGranularity, 12010);
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DECLARE_CUDA_PFN_EXTERN(cuMulticastUnbind, 12010);
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#endif
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#endif
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/* CUDA Driver functions loaded with dlsym() */
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@@ -88,6 +110,7 @@ DECLARE_CUDA_PFN_EXTERN(cuGetProcAddress, 11030);
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ncclResult_t ncclCudaLibraryInit(void);
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extern int ncclCudaDriverVersionCache;
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extern bool ncclCudaLaunchBlocking; // initialized by ncclCudaLibraryInit()
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inline ncclResult_t ncclCudaDriverVersion(int* driver) {
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int version = __atomic_load_n(&ncclCudaDriverVersionCache, __ATOMIC_RELAXED);
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@@ -98,5 +121,4 @@ inline ncclResult_t ncclCudaDriverVersion(int* driver) {
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*driver = version;
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return ncclSuccess;
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}
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#endif
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@@ -15,11 +15,12 @@
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typedef enum { ncclFuncBroadcast, ncclFuncReduce, ncclFuncAllGather, ncclFuncReduceScatter, ncclFuncAllReduce, ncclFuncSendRecv, ncclFuncSend, ncclFuncRecv, ncclNumFuncs} ncclFunc_t;
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extern const char* ncclFuncStr[NCCL_NUM_FUNCTIONS];
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#define NCCL_NUM_ALGORITHMS 4 // Tree/Ring/CollNet*
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#define NCCL_NUM_ALGORITHMS 5 // Tree/Ring/CollNet*
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#define NCCL_ALGO_TREE 0
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#define NCCL_ALGO_RING 1
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#define NCCL_ALGO_COLLNET_DIRECT 2
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#define NCCL_ALGO_COLLNET_CHAIN 3
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#define NCCL_ALGO_NVLS 4
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extern const char* ncclAlgoStr[NCCL_NUM_ALGORITHMS];
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#define NCCL_NUM_PROTOCOLS 3 // Simple/LL/LL128
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@@ -78,6 +79,7 @@ static_assert(NCCL_LL_CLEAN_MASK % NCCL_STEPS == 0, "Invalid NCCL_LL_CLEAN_MASK
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#define NCCL_DIRECT_NIC 0x04
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#define NCCL_IPC_WRITE 0x08
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#define NCCL_IPC_READ 0x10
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#define NCCL_NVLS_MIN_POLL 0x20
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struct ncclConnInfo {
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// Regular comm mechanism
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@@ -85,7 +87,7 @@ struct ncclConnInfo {
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uint64_t *tail; // Local for recv, remote for send
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uint64_t *head; // Local for send, remote for recv
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int direct; // Direct communication
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int flags; // Direct communication / other flags
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int shared; // Buffers are shared
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void **ptrExchange; // Pointer exchange for direct communication
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uint64_t* redOpArgExchange; // PreOp scaler exchange for direct pull case
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@@ -138,13 +140,22 @@ struct ncclTree {
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struct ncclDirect {
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int depth;
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int out;
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int nHeads;
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int headRank;
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int shift;
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int nHeads; // Number of parallel N<->1<->net operations we'll do in parallel; size of up/down
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int headRank; // Index in 0..nHeads-1 I am the head rank of. -1 if I'm not a head rank (no local NIC)
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int shift; // Shuffling of send/recv for scatter/gather operations, basically localRank%nHeads
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int up[NCCL_MAX_DIRECT_ARITY];
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int down[NCCL_MAX_DIRECT_ARITY];
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};
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#define NCCL_MAX_NVLS_ARITY 8
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struct ncclNvls {
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int out;
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int nHeads; // Number of parallel N<->1<->net operations we'll do in parallel; size of up/down
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int headRank; // Index in 0..nHeads-1 I am the head rank of. -1 if I'm not a head rank (no local NIC)
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int up[NCCL_MAX_NVLS_ARITY];
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int down;
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};
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#define NCCL_MAX_CONNS 2
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struct ncclChannelPeer {
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struct ncclConnector send[NCCL_MAX_CONNS];
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@@ -264,6 +275,7 @@ struct alignas(16) ncclDevChannel {
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struct ncclTree tree;
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struct ncclTree collnetChain;
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struct ncclDirect collnetDirect;
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struct ncclNvls nvls;
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uint32_t* workFifoDone; // Location of done counter, device writes index+1 of last work processed
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};
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@@ -288,4 +300,65 @@ struct alignas(16) ncclDevCommAndChannels {
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struct ncclDevChannel channels[MAXCHANNELS];
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};
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#ifdef __CUDA_ARCH__
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#define NCCL_CUDA_ARCH __CUDA_ARCH__
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#else
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#define NCCL_CUDA_ARCH 0
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#endif
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template<typename T>
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__host__ __device__ constexpr T min_constexpr(T a) { return a; }
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template<typename T, typename ...Ts>
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__host__ __device__ constexpr T min_constexpr(T a, T b, Ts ...c) {
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return min_constexpr<T>((a < b ? a : b), c...);
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}
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template<typename T>
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__host__ __device__ constexpr T max_constexpr(T a) { return a; }
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template<typename T, typename ...Ts>
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__host__ __device__ constexpr T max_constexpr(T a, T b, Ts ...c) {
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return max_constexpr<T>((a > b ? a : b), c...);
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}
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// Calculate the unroll factor given:
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// * bytePerPack: number of bytes accessed per instruction
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// * insns: max permissible unroll value
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// * bytes: desired number of in-flight bytes per iteration ( = unroll*bytePerPack)
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__host__ __device__ constexpr int ncclCalcUnroll(int bytePerPack, int insns, int bytes) {
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return min_constexpr(insns, (bytes + bytePerPack-1)/bytePerPack);
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}
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// Note that all unroll value logic should depend on a given cudaArch argument
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// and not __CUDA_ARCH__ since these need to be host-side executable where the
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// arch value is strictly runtime only. By defaulting to NCCL_CUDA_ARCH, device
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// side code can elide passing the arch for brevity.
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__host__ __device__ constexpr int ncclCollUnroll(int cudaArch = NCCL_CUDA_ARCH) {
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// Our collective unroll should move to the same bytes&insns model as NVLS.
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return cudaArch >= 800 ? 8 : 4;
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}
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__host__ __device__ constexpr int ncclNvlsUnrollBytes(int cudaArch = NCCL_CUDA_ARCH) { return 4*16; }
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__host__ __device__ constexpr int ncclNvlsUnrollInsns(int cudaArch = NCCL_CUDA_ARCH) { return 16; }
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__host__ __device__ constexpr int ncclNvlsUnroll(int bytePerPack, int cudaArch = NCCL_CUDA_ARCH) {
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return ncclCalcUnroll(bytePerPack, ncclNvlsUnrollInsns(cudaArch), ncclNvlsUnrollBytes(cudaArch));
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}
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// The amount of dynamic shmem per warp
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__host__ __device__ constexpr int ncclShmemScratchWarpSize(int cudaArch = NCCL_CUDA_ARCH) {
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return (max_constexpr<int>(
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/*LL */0,
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/*LL128 */(NCCL_LL128_SHMEM_ELEMS_PER_THREAD*WARP_SIZE)*sizeof(uint64_t),
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/*SIMPLE*/(ncclCollUnroll(cudaArch)*WARP_SIZE + 1)*16,
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// NVLS needs an extra 16B to read unaligned data.
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/*NVLS */WARP_SIZE*(cudaArch >= 900 ? ncclNvlsUnrollBytes(cudaArch) : 0) + 16
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) + 15) & -16; // pad to 16 bytes
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}
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// The amount of dynamic shmem per block
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__host__ __device__ constexpr int ncclShmemDynamicSize(int cudaArch = NCCL_CUDA_ARCH) {
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return cudaArch < 700 ? 0 : ncclShmemScratchWarpSize(cudaArch)*(NCCL_MAX_NTHREADS/WARP_SIZE);
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}
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#endif
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@@ -15,8 +15,7 @@
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#define NCCL_MIN_CHANNEL_SIZE (NCCL_LL_THREAD_THRESHOLD*64)
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#define NCCL_AGG_CHANNEL_SIZE (1LL << 21) /* 2 MiB, ideal per-channel size to fully utilize bandwidth */
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size_t ncclKernMaxLocalSize();
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ncclResult_t ncclKernSetSharedMemoryCarveout(int carveOut);
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ncclResult_t ncclInitKernelsForDevice(int cudaArch, size_t* maxStackSize);
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ncclResult_t ncclEnqueueCheck(struct ncclInfo* info);
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ncclResult_t ncclLaunchPrepare(struct ncclComm* comm);
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ncclResult_t ncclLaunchKernelBefore_NoUncapturedCuda(struct ncclComm* comm, struct ncclKernelPlan* plan);
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@@ -24,6 +24,7 @@ typedef enum : uint8_t {
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ncclPatternTreeUpDown,
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ncclPatternCollnetChain,
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ncclPatternCollnetDirect,
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ncclPatternNvls,
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ncclPatternSend,
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ncclPatternRecv
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} ncclPattern_t;
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@@ -0,0 +1,37 @@
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/*
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* Copyright (c) 2016-2023, NVIDIA CORPORATION. All rights reserved.
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*
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* See COPYRIGHT for license information
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*/
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#ifndef NCCL_IPCSOCKET_H
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#define NCCL_IPCSOCKET_H
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#include "nccl.h"
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#include <stdio.h>
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#include <fcntl.h>
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#include <sys/mman.h>
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#include <unistd.h>
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#include <errno.h>
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#include <sys/wait.h>
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#include <sys/types.h>
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#include <sys/socket.h>
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#include <memory.h>
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#include <sys/un.h>
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#include <inttypes.h>
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#define NCCL_IPC_SOCKNAME_LEN 64
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struct ncclIpcSocket {
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int fd;
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char socketName[NCCL_IPC_SOCKNAME_LEN];
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volatile uint32_t* abortFlag;
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};
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ncclResult_t ncclIpcSocketInit(struct ncclIpcSocket *handle, int rank, uint64_t hash, volatile uint32_t* abortFlag);
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ncclResult_t ncclIpcSocketClose(struct ncclIpcSocket *handle);
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ncclResult_t ncclIpcSocketRecvFd(struct ncclIpcSocket *handle, int *fd);
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ncclResult_t ncclIpcSocketSendFd(struct ncclIpcSocket *handle, const int fd, int rank, uint64_t hash);
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#endif /* NCCL_IPCSOCKET_H */
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@@ -20,7 +20,7 @@
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#define NCCL_NET_MAX_REQUESTS 8
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typedef enum {NCCL_LOG_NONE=0, NCCL_LOG_VERSION=1, NCCL_LOG_WARN=2, NCCL_LOG_INFO=3, NCCL_LOG_ABORT=4, NCCL_LOG_TRACE=5} ncclDebugLogLevel;
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typedef enum {NCCL_INIT=1, NCCL_COLL=2, NCCL_P2P=4, NCCL_SHM=8, NCCL_NET=16, NCCL_GRAPH=32, NCCL_TUNING=64, NCCL_ENV=128, NCCL_ALLOC=256, NCCL_CALL=512, NCCL_ALL=~0} ncclDebugLogSubSys;
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typedef enum {NCCL_INIT=1, NCCL_COLL=2, NCCL_P2P=4, NCCL_SHM=8, NCCL_NET=16, NCCL_GRAPH=32, NCCL_TUNING=64, NCCL_ENV=128, NCCL_ALLOC=256, NCCL_CALL=512, NCCL_PROXY=1024, NCCL_NVLS=2048, NCCL_ALL=~0} ncclDebugLogSubSys;
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typedef void (*ncclDebugLogger_t)(ncclDebugLogLevel level, unsigned long flags, const char *file, int line, const char *fmt, ...);
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@@ -7,12 +7,12 @@
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#ifndef NCCL_NVTX_H_
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#define NCCL_NVTX_H_
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#include "nvtx3.hpp"
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#include "nvtx3/nvtx3.hpp"
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#if __cpp_constexpr >= 201304L && !defined(NVTX3_RELAXED_CONSTEXPR)
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#define NVTX3_RELAXED_CONSTEXPR constexpr
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#if __cpp_constexpr >= 201304L && !defined(NVTX3_CONSTEXPR_IF_CPP14)
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#define NVTX3_CONSTEXPR_IF_CPP14 constexpr
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#else
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#define NVTX3_RELAXED_CONSTEXPR
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#define NVTX3_CONSTEXPR_IF_CPP14
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#endif
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// Define all NCCL-provided static schema IDs here (avoid duplicates).
|
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@@ -37,7 +37,7 @@ struct nccl_domain{static constexpr char const* name{"NCCL"};};
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|
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class payload_schema {
|
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public:
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NVTX3_RELAXED_CONSTEXPR explicit payload_schema(const nvtxPayloadSchemaEntry_t entries[], size_t numEntries, const uint64_t schemaId, const char* schemaName = nullptr) noexcept
|
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explicit payload_schema(const nvtxPayloadSchemaEntry_t entries[], size_t numEntries, const uint64_t schemaId, const char* schemaName = nullptr) noexcept
|
||||
{
|
||||
schema_attr.name = schemaName;
|
||||
schema_attr.entries = entries;
|
||||
@@ -74,11 +74,11 @@ class payload_schema {
|
||||
#define NVTX3_FUNC_WITH_PARAMS(ID, S, P) \
|
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static const payload_schema schema{S, std::extent<decltype(S)>::value, \
|
||||
NVTX_PAYLOAD_ENTRY_TYPE_SCHEMA_ID_STATIC_START + NVTX_SID_##ID, #ID}; \
|
||||
static ::nvtx3::v1::registered_string<nccl_domain> const nvtx3_func_name__{__func__}; \
|
||||
static ::nvtx3::v1::registered_string_in<nccl_domain> const nvtx3_func_name__{__func__}; \
|
||||
nvtxPayloadData_t nvtx3_bpl__[] = { \
|
||||
{NVTX_PAYLOAD_ENTRY_TYPE_SCHEMA_ID_STATIC_START + NVTX_SID_##ID, sizeof(P), &(P)}}; \
|
||||
::nvtx3::v1::event_attributes nvtx3_func_attr__{nvtx3_func_name__, nvtx3_bpl__}; \
|
||||
::nvtx3::v1::domain_thread_range<nccl_domain> const nvtx3_range__{nvtx3_func_attr__};
|
||||
::nvtx3::v1::event_attributes const nvtx3_func_attr__{nvtx3_func_name__, nvtx3_bpl__}; \
|
||||
::nvtx3::v1::scoped_range_in<nccl_domain> const nvtx3_range__{nvtx3_func_attr__};
|
||||
|
||||
extern void initNvtxRegisteredEnums();
|
||||
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright 2009-2020 NVIDIA Corporation. All rights reserved.
|
||||
* Copyright 2009-2022 NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Licensed under the Apache License v2.0 with LLVM Exceptions.
|
||||
* See https://llvm.org/LICENSE.txt for license information.
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright 2009-2020 NVIDIA Corporation. All rights reserved.
|
||||
* Copyright 2009-2022 NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Licensed under the Apache License v2.0 with LLVM Exceptions.
|
||||
* See https://llvm.org/LICENSE.txt for license information.
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright 2009-2020 NVIDIA Corporation. All rights reserved.
|
||||
* Copyright 2009-2022 NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Licensed under the Apache License v2.0 with LLVM Exceptions.
|
||||
* See https://llvm.org/LICENSE.txt for license information.
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright 2009-2020 NVIDIA Corporation. All rights reserved.
|
||||
* Copyright 2009-2022 NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Licensed under the Apache License v2.0 with LLVM Exceptions.
|
||||
* See https://llvm.org/LICENSE.txt for license information.
|
||||
|
||||
@@ -1,12 +1,12 @@
|
||||
/*
|
||||
* Copyright 2021 NVIDIA Corporation. All rights reserved.
|
||||
* Copyright 2021-2022 NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Licensed under the Apache License v2.0 with LLVM Exceptions.
|
||||
* See https://llvm.org/LICENSE.txt for license information.
|
||||
* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|
||||
*/
|
||||
|
||||
#include "nvtx3/nvToolsExt.h"
|
||||
#include "nvToolsExt.h"
|
||||
|
||||
#ifndef NVTOOLSEXT_PAYLOAD_H
|
||||
#define NVTOOLSEXT_PAYLOAD_H
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright 2009-2020 NVIDIA Corporation. All rights reserved.
|
||||
* Copyright 2009-2022 NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Licensed under the Apache License v2.0 with LLVM Exceptions.
|
||||
* See https://llvm.org/LICENSE.txt for license information.
|
||||
|
||||
+1233
-613
Разница между файлами не показана из-за своего большого размера
Загрузить разницу
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright 2009-2020 NVIDIA Corporation. All rights reserved.
|
||||
* Copyright 2009-2022 NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Licensed under the Apache License v2.0 with LLVM Exceptions.
|
||||
* See https://llvm.org/LICENSE.txt for license information.
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright 2009-2020 NVIDIA Corporation. All rights reserved.
|
||||
* Copyright 2009-2022 NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Licensed under the Apache License v2.0 with LLVM Exceptions.
|
||||
* See https://llvm.org/LICENSE.txt for license information.
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright 2009-2020 NVIDIA Corporation. All rights reserved.
|
||||
* Copyright 2009-2022 NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Licensed under the Apache License v2.0 with LLVM Exceptions.
|
||||
* See https://llvm.org/LICENSE.txt for license information.
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright 2009-2020 NVIDIA Corporation. All rights reserved.
|
||||
* Copyright 2009-2022 NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Licensed under the Apache License v2.0 with LLVM Exceptions.
|
||||
* See https://llvm.org/LICENSE.txt for license information.
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright 2009-2020 NVIDIA Corporation. All rights reserved.
|
||||
* Copyright 2009-2022 NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Licensed under the Apache License v2.0 with LLVM Exceptions.
|
||||
* See https://llvm.org/LICENSE.txt for license information.
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright 2009-2020 NVIDIA Corporation. All rights reserved.
|
||||
* Copyright 2009-2022 NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Licensed under the Apache License v2.0 with LLVM Exceptions.
|
||||
* See https://llvm.org/LICENSE.txt for license information.
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright 2009-2020 NVIDIA Corporation. All rights reserved.
|
||||
* Copyright 2009-2022 NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Licensed under the Apache License v2.0 with LLVM Exceptions.
|
||||
* See https://llvm.org/LICENSE.txt for license information.
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright 2009-2020 NVIDIA Corporation. All rights reserved.
|
||||
* Copyright 2009-2022 NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Licensed under the Apache License v2.0 with LLVM Exceptions.
|
||||
* See https://llvm.org/LICENSE.txt for license information.
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright 2009-2020 NVIDIA Corporation. All rights reserved.
|
||||
* Copyright 2009-2022 NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Licensed under the Apache License v2.0 with LLVM Exceptions.
|
||||
* See https://llvm.org/LICENSE.txt for license information.
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright 2009-2020 NVIDIA Corporation. All rights reserved.
|
||||
* Copyright 2009-2022 NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Licensed under the Apache License v2.0 with LLVM Exceptions.
|
||||
* See https://llvm.org/LICENSE.txt for license information.
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright 2009-2020 NVIDIA Corporation. All rights reserved.
|
||||
* Copyright 2009-2022 NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Licensed under the Apache License v2.0 with LLVM Exceptions.
|
||||
* See https://llvm.org/LICENSE.txt for license information.
|
||||
|
||||
@@ -35,10 +35,11 @@ NVTX_EXT_PAYLOAD_VERSIONED_ID(nvtxExtPayloadSlots)[NVTX3EXT_CBID_PAYLOAD_FN_NUM
|
||||
|
||||
NVTX_LINKONCE_DEFINE_FUNCTION void NVTX_EXT_PAYLOAD_VERSIONED_ID(nvtxExtPayloadInitOnce)()
|
||||
{
|
||||
intptr_t* fnSlots = NVTX_EXT_PAYLOAD_VERSIONED_ID(nvtxExtPayloadSlots) + 1;
|
||||
nvtxExtModuleSegment_t segment = {
|
||||
0, // unused (only one segment)
|
||||
NVTX3EXT_CBID_PAYLOAD_FN_NUM,
|
||||
NVTX_EXT_PAYLOAD_VERSIONED_ID(nvtxExtPayloadSlots) + 1
|
||||
fnSlots
|
||||
};
|
||||
|
||||
nvtxExtModuleInfo_t module = {
|
||||
|
||||
@@ -10,6 +10,7 @@
|
||||
#include "devcomm.h"
|
||||
#include "info.h"
|
||||
#include "socket.h"
|
||||
#include "ipcsocket.h"
|
||||
#include <pthread.h>
|
||||
#include "shm.h"
|
||||
|
||||
@@ -161,6 +162,31 @@ struct ncclProxyProgressState {
|
||||
int nextOps;
|
||||
};
|
||||
|
||||
// Expected proxy response fifo
|
||||
struct ncclExpectedProxyResponse {
|
||||
void* opId;
|
||||
int respSize;
|
||||
bool done;
|
||||
void* respBuff;
|
||||
struct ncclExpectedProxyResponse* next;
|
||||
};
|
||||
|
||||
struct ncclProxyAsyncOp {
|
||||
int type;
|
||||
struct ncclProxyConnection* connection;
|
||||
int reqSize, respSize;
|
||||
char *reqBuff, *respBuff;
|
||||
void* opId;
|
||||
ncclProxyAsyncOp* next;
|
||||
};
|
||||
|
||||
struct ncclProxyLocalPeer {
|
||||
struct ncclSocket sock;
|
||||
int localRank;
|
||||
ncclProxyAsyncOp* asyncOps;
|
||||
int asyncOpCounter;
|
||||
};
|
||||
|
||||
struct ncclProxyState {
|
||||
// Service thread
|
||||
pthread_t thread;
|
||||
@@ -176,6 +202,9 @@ struct ncclProxyState {
|
||||
|
||||
// Progress thread
|
||||
struct ncclProxyProgressState progressState;
|
||||
|
||||
// Queue of expected responses from the proxy
|
||||
struct ncclExpectedProxyResponse* expectedResponses;
|
||||
};
|
||||
|
||||
enum proxyConnectState {
|
||||
@@ -220,10 +249,19 @@ enum ncclProxyMsgType {
|
||||
ncclProxyMsgStart = 5,
|
||||
ncclProxyMsgClose = 6,
|
||||
ncclProxyMsgAbort = 7,
|
||||
ncclProxyMsgStop = 8
|
||||
ncclProxyMsgStop = 8,
|
||||
ncclProxyMsgConvertFd = 9 // cuMem API support
|
||||
};
|
||||
|
||||
ncclResult_t ncclProxyCall(struct ncclProxyConnector* proxyConn, int type, void* reqBuff, int reqSize, void* respBuff, int respSize);
|
||||
// This function is called by a client of the proxy that needs to invoke any of the non-progress proxyOp types
|
||||
// Call this function on the client, supplying a locally unique opId. Then, poll on the return value of
|
||||
// ncclPollProxyResponse(), supplying the same opId to confirm the operation has completed
|
||||
ncclResult_t ncclProxyCallAsync(struct ncclProxyConnector* proxyConn, int type, void* reqBuff, int reqSize, int respSize, void* opId);
|
||||
|
||||
// This function will internally call ncclProxyCallAsync() and spin until ncclPollProxyResponse() confirms the result is received
|
||||
ncclResult_t ncclProxyCallBlocking(struct ncclProxyConnector* proxyConn, int type, void* reqBuff, int reqSize, void* respBuff, int respSize);
|
||||
ncclResult_t ncclPollProxyResponse(struct ncclProxyConnector* proxyConn, void* respBuff, void* opId);
|
||||
|
||||
ncclResult_t ncclProxyDestroy(struct ncclComm* comm);
|
||||
ncclResult_t ncclProxyShmUnlink(struct ncclComm* comm);
|
||||
#endif
|
||||
|
||||
@@ -92,6 +92,6 @@ ncclResult_t ncclSocketProgress(int op, struct ncclSocket* sock, void* ptr, int
|
||||
ncclResult_t ncclSocketWait(int op, struct ncclSocket* sock, void* ptr, int size, int* offset);
|
||||
ncclResult_t ncclSocketSend(struct ncclSocket* sock, void* ptr, int size);
|
||||
ncclResult_t ncclSocketRecv(struct ncclSocket* sock, void* ptr, int size);
|
||||
ncclResult_t ncclSocketTryRecv(struct ncclSocket* sock, void* ptr, int size, int* closed);
|
||||
ncclResult_t ncclSocketTryRecv(struct ncclSocket* sock, void* ptr, int size, int* closed, bool blocking);
|
||||
ncclResult_t ncclSocketClose(struct ncclSocket* sock);
|
||||
#endif
|
||||
|
||||
@@ -62,7 +62,7 @@ struct ncclTransportComm {
|
||||
};
|
||||
|
||||
struct ncclTransport {
|
||||
const char name[4];
|
||||
const char name[8];
|
||||
ncclResult_t (*canConnect)(int*, struct ncclTopoSystem* topo, struct ncclTopoGraph* graph, struct ncclPeerInfo*, struct ncclPeerInfo*);
|
||||
struct ncclTransportComm send;
|
||||
struct ncclTransportComm recv;
|
||||
@@ -71,6 +71,9 @@ struct ncclTransport {
|
||||
ncclResult_t ncclTransportP2pConnect(struct ncclComm* comm, int channelId, int nrecv, int* peerRecv, int nsend, int* peerSend, int connIndex);
|
||||
ncclResult_t ncclTransportP2pSetup(struct ncclComm* comm, struct ncclTopoGraph* graph, int connIndex, int* highestTransportType=NULL);
|
||||
|
||||
ncclResult_t ncclNvlsSetup(struct ncclComm* comm);
|
||||
ncclResult_t ncclNvlsFree(struct ncclComm* comm);
|
||||
|
||||
enum { collNetRecv=0, collNetSend=1 };
|
||||
int ncclTransportCollNetSetup(struct ncclComm* comm, struct ncclTopoGraph* collNetGraph, struct ncclChannel* channel, int masterRank, int masterPeer, int collNetGraphChannelId, int type);
|
||||
ncclResult_t ncclTransportCollNetCheck(struct ncclComm* comm, int collNetSetupFail);
|
||||
|
||||
Ссылка в новой задаче
Block a user