Add ref counting for rsmi init and shutdown
Also, clean lint from kfd_ioctl.h file. Change-Id: I5a2ae127ab6ab6676a1b075ed10858d0ebfe13c1
This commit is contained in:
Chris Freehill
+351
-354
@@ -28,82 +28,82 @@
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#define KFD_IOCTL_MAJOR_VERSION 1
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#define KFD_IOCTL_MINOR_VERSION 2
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#define KFD_IOCTL_DBG_MAJOR_VERSION 1
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#define KFD_IOCTL_DBG_MINOR_VERSION 0
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#define KFD_IOCTL_DBG_MAJOR_VERSION 1
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#define KFD_IOCTL_DBG_MINOR_VERSION 0
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struct kfd_ioctl_get_version_args {
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__u32 major_version; /* from KFD */
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__u32 minor_version; /* from KFD */
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__u32 major_version; /* from KFD */
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__u32 minor_version; /* from KFD */
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};
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/* For kfd_ioctl_create_queue_args.queue_type. */
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#define KFD_IOC_QUEUE_TYPE_COMPUTE 0x0
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#define KFD_IOC_QUEUE_TYPE_SDMA 0x1
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#define KFD_IOC_QUEUE_TYPE_COMPUTE_AQL 0x2
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#define KFD_IOC_QUEUE_TYPE_SDMA_XGMI 0x3
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#define KFD_IOC_QUEUE_TYPE_COMPUTE 0x0
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#define KFD_IOC_QUEUE_TYPE_SDMA 0x1
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#define KFD_IOC_QUEUE_TYPE_COMPUTE_AQL 0x2
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#define KFD_IOC_QUEUE_TYPE_SDMA_XGMI 0x3
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#define KFD_MAX_QUEUE_PERCENTAGE 100
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#define KFD_MAX_QUEUE_PRIORITY 15
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#define KFD_MAX_QUEUE_PERCENTAGE 100
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#define KFD_MAX_QUEUE_PRIORITY 15
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struct kfd_ioctl_create_queue_args {
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__u64 ring_base_address; /* to KFD */
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__u64 write_pointer_address; /* from KFD */
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__u64 read_pointer_address; /* from KFD */
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__u64 doorbell_offset; /* from KFD */
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__u64 ring_base_address; /* to KFD */
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__u64 write_pointer_address; /* from KFD */
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__u64 read_pointer_address; /* from KFD */
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__u64 doorbell_offset; /* from KFD */
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__u32 ring_size; /* to KFD */
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__u32 gpu_id; /* to KFD */
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__u32 queue_type; /* to KFD */
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__u32 queue_percentage; /* to KFD */
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__u32 queue_priority; /* to KFD */
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__u32 queue_id; /* from KFD */
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__u32 ring_size; /* to KFD */
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__u32 gpu_id; /* to KFD */
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__u32 queue_type; /* to KFD */
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__u32 queue_percentage; /* to KFD */
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__u32 queue_priority; /* to KFD */
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__u32 queue_id; /* from KFD */
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__u64 eop_buffer_address; /* to KFD */
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__u64 eop_buffer_size; /* to KFD */
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__u64 ctx_save_restore_address; /* to KFD */
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__u32 ctx_save_restore_size; /* to KFD */
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__u32 ctl_stack_size; /* to KFD */
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__u64 eop_buffer_address; /* to KFD */
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__u64 eop_buffer_size; /* to KFD */
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__u64 ctx_save_restore_address; /* to KFD */
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__u32 ctx_save_restore_size; /* to KFD */
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__u32 ctl_stack_size; /* to KFD */
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};
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struct kfd_ioctl_destroy_queue_args {
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__u32 queue_id; /* to KFD */
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__u32 pad;
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__u32 queue_id; /* to KFD */
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__u32 pad;
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};
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struct kfd_ioctl_update_queue_args {
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__u64 ring_base_address; /* to KFD */
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__u64 ring_base_address; /* to KFD */
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__u32 queue_id; /* to KFD */
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__u32 ring_size; /* to KFD */
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__u32 queue_percentage; /* to KFD */
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__u32 queue_priority; /* to KFD */
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__u32 queue_id; /* to KFD */
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__u32 ring_size; /* to KFD */
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__u32 queue_percentage; /* to KFD */
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__u32 queue_priority; /* to KFD */
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};
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struct kfd_ioctl_set_cu_mask_args {
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__u32 queue_id; /* to KFD */
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__u32 num_cu_mask; /* to KFD */
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__u64 cu_mask_ptr; /* to KFD */
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__u32 queue_id; /* to KFD */
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__u32 num_cu_mask; /* to KFD */
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__u64 cu_mask_ptr; /* to KFD */
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};
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struct kfd_ioctl_get_queue_wave_state_args {
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__u64 ctl_stack_address; /* to KFD */
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__u32 ctl_stack_used_size; /* from KFD */
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__u32 save_area_used_size; /* from KFD */
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__u32 queue_id; /* to KFD */
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__u32 pad;
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__u64 ctl_stack_address; /* to KFD */
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__u32 ctl_stack_used_size; /* from KFD */
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__u32 save_area_used_size; /* from KFD */
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__u32 queue_id; /* to KFD */
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__u32 pad;
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};
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struct kfd_queue_snapshot_entry {
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__u64 ring_base_address;
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__u64 write_pointer_address;
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__u64 read_pointer_address;
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__u64 ctx_save_restore_address;
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__u32 queue_id;
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__u32 gpu_id;
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__u32 ring_size;
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__u32 queue_type;
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__u32 queue_status;
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__u32 reserved[19];
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__u64 ring_base_address;
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__u64 write_pointer_address;
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__u64 read_pointer_address;
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__u64 ctx_save_restore_address;
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__u32 queue_id;
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__u32 gpu_id;
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__u32 ring_size;
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__u32 queue_type;
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__u32 queue_status;
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__u32 reserved[19];
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};
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/* For kfd_ioctl_set_memory_policy_args.default_policy and alternate_policy */
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@@ -111,13 +111,13 @@ struct kfd_queue_snapshot_entry {
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#define KFD_IOC_CACHE_POLICY_NONCOHERENT 1
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struct kfd_ioctl_set_memory_policy_args {
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__u64 alternate_aperture_base; /* to KFD */
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__u64 alternate_aperture_size; /* to KFD */
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__u64 alternate_aperture_base; /* to KFD */
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__u64 alternate_aperture_size; /* to KFD */
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__u32 gpu_id; /* to KFD */
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__u32 default_policy; /* to KFD */
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__u32 alternate_policy; /* to KFD */
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__u32 pad;
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__u32 gpu_id; /* to KFD */
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__u32 default_policy; /* to KFD */
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__u32 alternate_policy; /* to KFD */
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__u32 pad;
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};
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/*
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@@ -128,24 +128,24 @@ struct kfd_ioctl_set_memory_policy_args {
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*/
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struct kfd_ioctl_get_clock_counters_args {
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__u64 gpu_clock_counter; /* from KFD */
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__u64 cpu_clock_counter; /* from KFD */
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__u64 system_clock_counter; /* from KFD */
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__u64 system_clock_freq; /* from KFD */
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__u64 gpu_clock_counter; /* from KFD */
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__u64 cpu_clock_counter; /* from KFD */
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__u64 system_clock_counter; /* from KFD */
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__u64 system_clock_freq; /* from KFD */
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__u32 gpu_id; /* to KFD */
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__u32 pad;
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__u32 gpu_id; /* to KFD */
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__u32 pad;
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};
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struct kfd_process_device_apertures {
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__u64 lds_base; /* from KFD */
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__u64 lds_limit; /* from KFD */
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__u64 scratch_base; /* from KFD */
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__u64 scratch_limit; /* from KFD */
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__u64 gpuvm_base; /* from KFD */
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__u64 gpuvm_limit; /* from KFD */
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__u32 gpu_id; /* from KFD */
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__u32 pad;
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__u64 lds_base; /* from KFD */
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__u64 lds_limit; /* from KFD */
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__u64 scratch_base; /* from KFD */
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__u64 scratch_limit; /* from KFD */
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__u64 gpuvm_base; /* from KFD */
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__u64 gpuvm_limit; /* from KFD */
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__u32 gpu_id; /* from KFD */
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__u32 pad;
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};
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/*
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@@ -155,25 +155,25 @@ struct kfd_process_device_apertures {
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*/
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#define NUM_OF_SUPPORTED_GPUS 7
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struct kfd_ioctl_get_process_apertures_args {
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struct kfd_process_device_apertures
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process_apertures[NUM_OF_SUPPORTED_GPUS];/* from KFD */
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struct kfd_process_device_apertures
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process_apertures[NUM_OF_SUPPORTED_GPUS];/* from KFD */
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/* from KFD, should be in the range [1 - NUM_OF_SUPPORTED_GPUS] */
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__u32 num_of_nodes;
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__u32 pad;
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/* from KFD, should be in the range [1 - NUM_OF_SUPPORTED_GPUS] */
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__u32 num_of_nodes;
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__u32 pad;
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};
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struct kfd_ioctl_get_process_apertures_new_args {
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/* User allocated. Pointer to struct kfd_process_device_apertures
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* filled in by Kernel
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*/
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__u64 kfd_process_device_apertures_ptr;
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/* to KFD - indicates amount of memory present in
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* kfd_process_device_apertures_ptr
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* from KFD - Number of entries filled by KFD.
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*/
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__u32 num_of_nodes;
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__u32 pad;
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/* User allocated. Pointer to struct kfd_process_device_apertures
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* filled in by Kernel
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*/
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__u64 kfd_process_device_apertures_ptr;
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/* to KFD - indicates amount of memory present in
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* kfd_process_device_apertures_ptr
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* from KFD - Number of entries filled by KFD.
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*/
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__u32 num_of_nodes;
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__u32 pad;
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};
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#define MAX_ALLOWED_NUM_POINTS 100
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@@ -181,35 +181,35 @@ struct kfd_ioctl_get_process_apertures_new_args {
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#define MAX_ALLOWED_WAC_BUFF_SIZE 128
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struct kfd_ioctl_dbg_register_args {
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__u32 gpu_id; /* to KFD */
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__u32 pad;
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__u32 gpu_id; /* to KFD */
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__u32 pad;
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};
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struct kfd_ioctl_dbg_unregister_args {
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__u32 gpu_id; /* to KFD */
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__u32 pad;
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__u32 gpu_id; /* to KFD */
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__u32 pad;
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};
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struct kfd_ioctl_dbg_address_watch_args {
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__u64 content_ptr; /* a pointer to the actual content */
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__u32 gpu_id; /* to KFD */
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__u32 buf_size_in_bytes; /*including gpu_id and buf_size */
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__u64 content_ptr; /* a pointer to the actual content */
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__u32 gpu_id; /* to KFD */
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__u32 buf_size_in_bytes; /*including gpu_id and buf_size */
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};
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struct kfd_ioctl_dbg_wave_control_args {
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__u64 content_ptr; /* a pointer to the actual content */
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__u32 gpu_id; /* to KFD */
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__u32 buf_size_in_bytes; /*including gpu_id and buf_size */
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__u64 content_ptr; /* a pointer to the actual content */
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__u32 gpu_id; /* to KFD */
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__u32 buf_size_in_bytes; /*including gpu_id and buf_size */
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};
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/* mapping event types to API spec */
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#define KFD_DBG_EV_STATUS_TRAP 1
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#define KFD_DBG_EV_STATUS_VMFAULT 2
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#define KFD_DBG_EV_STATUS_SUSPENDED 4
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#define KFD_DBG_EV_STATUS_NEW_QUEUE 8
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#define KFD_DBG_EV_FLAG_CLEAR_STATUS 1
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#define KFD_DBG_EV_STATUS_TRAP 1
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#define KFD_DBG_EV_STATUS_VMFAULT 2
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#define KFD_DBG_EV_STATUS_SUSPENDED 4
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#define KFD_DBG_EV_STATUS_NEW_QUEUE 8
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#define KFD_DBG_EV_FLAG_CLEAR_STATUS 1
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#define KFD_INVALID_QUEUEID 0xffffffff
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#define KFD_INVALID_QUEUEID 0xffffffff
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/* KFD_IOC_DBG_TRAP_ENABLE:
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* ptr: unused
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@@ -273,179 +273,177 @@ struct kfd_ioctl_dbg_wave_control_args {
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* data2: minor version (OUT)
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* data3: unused
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*/
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#define KFD_IOC_DBG_TRAP_GET_VERSION 7
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#define KFD_IOC_DBG_TRAP_GET_VERSION 7
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struct kfd_ioctl_dbg_trap_args {
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__u64 ptr; /* to KFD -- used for pointer arguments: queue arrays */
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__u32 pid; /* to KFD */
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__u32 gpu_id; /* to KFD */
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__u32 op; /* to KFD */
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__u32 data1; /* to KFD */
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__u32 data2; /* to KFD */
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__u32 data3; /* to KFD */
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__u64 ptr; /* to KFD -- used for pointer arguments: queue arrays */
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__u32 pid; /* to KFD */
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__u32 gpu_id; /* to KFD */
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__u32 op; /* to KFD */
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__u32 data1; /* to KFD */
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__u32 data2; /* to KFD */
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__u32 data3; /* to KFD */
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};
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/* Matching HSA_EVENTTYPE */
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#define KFD_IOC_EVENT_SIGNAL 0
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#define KFD_IOC_EVENT_NODECHANGE 1
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#define KFD_IOC_EVENT_DEVICESTATECHANGE 2
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#define KFD_IOC_EVENT_HW_EXCEPTION 3
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#define KFD_IOC_EVENT_SYSTEM_EVENT 4
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#define KFD_IOC_EVENT_DEBUG_EVENT 5
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#define KFD_IOC_EVENT_PROFILE_EVENT 6
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#define KFD_IOC_EVENT_QUEUE_EVENT 7
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#define KFD_IOC_EVENT_MEMORY 8
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#define KFD_IOC_EVENT_SIGNAL 0
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#define KFD_IOC_EVENT_NODECHANGE 1
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#define KFD_IOC_EVENT_DEVICESTATECHANGE 2
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#define KFD_IOC_EVENT_HW_EXCEPTION 3
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#define KFD_IOC_EVENT_SYSTEM_EVENT 4
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#define KFD_IOC_EVENT_DEBUG_EVENT 5
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#define KFD_IOC_EVENT_PROFILE_EVENT 6
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#define KFD_IOC_EVENT_QUEUE_EVENT 7
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#define KFD_IOC_EVENT_MEMORY 8
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#define KFD_IOC_WAIT_RESULT_COMPLETE 0
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#define KFD_IOC_WAIT_RESULT_TIMEOUT 1
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#define KFD_IOC_WAIT_RESULT_FAIL 2
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#define KFD_IOC_WAIT_RESULT_COMPLETE 0
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#define KFD_IOC_WAIT_RESULT_TIMEOUT 1
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#define KFD_IOC_WAIT_RESULT_FAIL 2
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#define KFD_SIGNAL_EVENT_LIMIT 4096
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#define KFD_SIGNAL_EVENT_LIMIT 4096
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/* For kfd_event_data.hw_exception_data.reset_type. */
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#define KFD_HW_EXCEPTION_WHOLE_GPU_RESET 0
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#define KFD_HW_EXCEPTION_PER_ENGINE_RESET 1
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#define KFD_HW_EXCEPTION_WHOLE_GPU_RESET 0
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#define KFD_HW_EXCEPTION_PER_ENGINE_RESET 1
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/* For kfd_event_data.hw_exception_data.reset_cause. */
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#define KFD_HW_EXCEPTION_GPU_HANG 0
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#define KFD_HW_EXCEPTION_ECC 1
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#define KFD_HW_EXCEPTION_GPU_HANG 0
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#define KFD_HW_EXCEPTION_ECC 1
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/* For kfd_hsa_memory_exception_data.ErrorType */
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#define KFD_MEM_ERR_NO_RAS 0
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#define KFD_MEM_ERR_SRAM_ECC 1
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#define KFD_MEM_ERR_POISON_CONSUMED 2
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#define KFD_MEM_ERR_GPU_HANG 3
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#define KFD_MEM_ERR_NO_RAS 0
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#define KFD_MEM_ERR_SRAM_ECC 1
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#define KFD_MEM_ERR_POISON_CONSUMED 2
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#define KFD_MEM_ERR_GPU_HANG 3
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struct kfd_ioctl_create_event_args {
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__u64 event_page_offset; /* from KFD */
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__u32 event_trigger_data; /* from KFD - signal events only */
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__u32 event_type; /* to KFD */
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__u32 auto_reset; /* to KFD */
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__u32 node_id; /* to KFD - only valid for certain
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event types */
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__u32 event_id; /* from KFD */
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__u32 event_slot_index; /* from KFD */
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__u64 event_page_offset; /* from KFD */
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__u32 event_trigger_data; /* from KFD - signal events only */
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__u32 event_type; /* to KFD */
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__u32 auto_reset; /* to KFD */
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__u32 node_id; /* to KFD - only valid for certain event types */
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__u32 event_id; /* from KFD */
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__u32 event_slot_index; /* from KFD */
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};
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struct kfd_ioctl_destroy_event_args {
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__u32 event_id; /* to KFD */
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__u32 pad;
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__u32 event_id; /* to KFD */
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__u32 pad;
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};
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struct kfd_ioctl_set_event_args {
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__u32 event_id; /* to KFD */
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__u32 pad;
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__u32 event_id; /* to KFD */
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__u32 pad;
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};
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struct kfd_ioctl_reset_event_args {
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__u32 event_id; /* to KFD */
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__u32 pad;
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__u32 event_id; /* to KFD */
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__u32 pad;
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};
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struct kfd_memory_exception_failure {
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__u32 NotPresent; /* Page not present or supervisor privilege */
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__u32 ReadOnly; /* Write access to a read-only page */
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__u32 NoExecute; /* Execute access to a page marked NX */
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__u32 imprecise; /* Can't determine the exact fault address */
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__u32 NotPresent; /* Page not present or supervisor privilege */
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__u32 ReadOnly; /* Write access to a read-only page */
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__u32 NoExecute; /* Execute access to a page marked NX */
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__u32 imprecise; /* Can't determine the exact fault address */
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};
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|
||||
/* memory exception data */
|
||||
struct kfd_hsa_memory_exception_data {
|
||||
struct kfd_memory_exception_failure failure;
|
||||
__u64 va;
|
||||
__u32 gpu_id;
|
||||
__u32 ErrorType; /* 0 = no RAS error,
|
||||
* 1 = ECC_SRAM,
|
||||
* 2 = Link_SYNFLOOD (poison),
|
||||
* 3 = GPU hang (not attributable to a specific cause),
|
||||
* other values reserved
|
||||
*/
|
||||
struct kfd_memory_exception_failure failure;
|
||||
__u64 va;
|
||||
__u32 gpu_id;
|
||||
__u32 ErrorType; // 0 = no RAS error,
|
||||
// 1 = ECC_SRAM,
|
||||
// 2 = Link_SYNFLOOD (poison),
|
||||
// 3 = GPU hang (not attributable to a specific cause),
|
||||
// other values reserved
|
||||
};
|
||||
|
||||
/* hw exception data */
|
||||
struct kfd_hsa_hw_exception_data {
|
||||
__u32 reset_type;
|
||||
__u32 reset_cause;
|
||||
__u32 memory_lost;
|
||||
__u32 gpu_id;
|
||||
__u32 reset_type;
|
||||
__u32 reset_cause;
|
||||
__u32 memory_lost;
|
||||
__u32 gpu_id;
|
||||
};
|
||||
|
||||
/* Event data */
|
||||
struct kfd_event_data {
|
||||
union {
|
||||
struct kfd_hsa_memory_exception_data memory_exception_data;
|
||||
struct kfd_hsa_hw_exception_data hw_exception_data;
|
||||
}; /* From KFD */
|
||||
__u64 kfd_event_data_ext; /* pointer to an extension structure
|
||||
for future exception types */
|
||||
__u32 event_id; /* to KFD */
|
||||
__u32 pad;
|
||||
union {
|
||||
struct kfd_hsa_memory_exception_data memory_exception_data;
|
||||
struct kfd_hsa_hw_exception_data hw_exception_data;
|
||||
}; /* From KFD */
|
||||
__u64 kfd_event_data_ext; // pointer to an extension structure
|
||||
// for future exception types
|
||||
__u32 event_id; /* to KFD */
|
||||
__u32 pad;
|
||||
};
|
||||
|
||||
struct kfd_ioctl_wait_events_args {
|
||||
__u64 events_ptr; /* pointed to struct
|
||||
kfd_event_data array, to KFD */
|
||||
__u32 num_events; /* to KFD */
|
||||
__u32 wait_for_all; /* to KFD */
|
||||
__u32 timeout; /* to KFD */
|
||||
__u32 wait_result; /* from KFD */
|
||||
__u64 events_ptr; // pointed to struct
|
||||
// kfd_event_data array, to KFD
|
||||
__u32 num_events; /* to KFD */
|
||||
__u32 wait_for_all; /* to KFD */
|
||||
__u32 timeout; /* to KFD */
|
||||
__u32 wait_result; /* from KFD */
|
||||
};
|
||||
|
||||
struct kfd_ioctl_set_scratch_backing_va_args {
|
||||
__u64 va_addr; /* to KFD */
|
||||
__u32 gpu_id; /* to KFD */
|
||||
__u32 pad;
|
||||
__u64 va_addr; /* to KFD */
|
||||
__u32 gpu_id; /* to KFD */
|
||||
__u32 pad;
|
||||
};
|
||||
|
||||
struct kfd_ioctl_get_tile_config_args {
|
||||
/* to KFD: pointer to tile array */
|
||||
__u64 tile_config_ptr;
|
||||
/* to KFD: pointer to macro tile array */
|
||||
__u64 macro_tile_config_ptr;
|
||||
/* to KFD: array size allocated by user mode
|
||||
* from KFD: array size filled by kernel
|
||||
*/
|
||||
__u32 num_tile_configs;
|
||||
/* to KFD: array size allocated by user mode
|
||||
* from KFD: array size filled by kernel
|
||||
*/
|
||||
__u32 num_macro_tile_configs;
|
||||
/* to KFD: pointer to tile array */
|
||||
__u64 tile_config_ptr;
|
||||
/* to KFD: pointer to macro tile array */
|
||||
__u64 macro_tile_config_ptr;
|
||||
/* to KFD: array size allocated by user mode
|
||||
* from KFD: array size filled by kernel
|
||||
*/
|
||||
__u32 num_tile_configs;
|
||||
/* to KFD: array size allocated by user mode
|
||||
* from KFD: array size filled by kernel
|
||||
*/
|
||||
__u32 num_macro_tile_configs;
|
||||
|
||||
__u32 gpu_id; /* to KFD */
|
||||
__u32 gb_addr_config; /* from KFD */
|
||||
__u32 num_banks; /* from KFD */
|
||||
__u32 num_ranks; /* from KFD */
|
||||
/* struct size can be extended later if needed
|
||||
* without breaking ABI compatibility
|
||||
*/
|
||||
__u32 gpu_id; /* to KFD */
|
||||
__u32 gb_addr_config; /* from KFD */
|
||||
__u32 num_banks; /* from KFD */
|
||||
__u32 num_ranks; /* from KFD */
|
||||
/* struct size can be extended later if needed
|
||||
* without breaking ABI compatibility
|
||||
*/
|
||||
};
|
||||
|
||||
struct kfd_ioctl_set_trap_handler_args {
|
||||
__u64 tba_addr; /* to KFD */
|
||||
__u64 tma_addr; /* to KFD */
|
||||
__u32 gpu_id; /* to KFD */
|
||||
__u32 pad;
|
||||
__u64 tba_addr; /* to KFD */
|
||||
__u64 tma_addr; /* to KFD */
|
||||
__u32 gpu_id; /* to KFD */
|
||||
__u32 pad;
|
||||
};
|
||||
|
||||
struct kfd_ioctl_acquire_vm_args {
|
||||
__u32 drm_fd; /* to KFD */
|
||||
__u32 gpu_id; /* to KFD */
|
||||
__u32 drm_fd; /* to KFD */
|
||||
__u32 gpu_id; /* to KFD */
|
||||
};
|
||||
|
||||
/* Allocation flags: memory types */
|
||||
#define KFD_IOC_ALLOC_MEM_FLAGS_VRAM (1 << 0)
|
||||
#define KFD_IOC_ALLOC_MEM_FLAGS_GTT (1 << 1)
|
||||
#define KFD_IOC_ALLOC_MEM_FLAGS_USERPTR (1 << 2)
|
||||
#define KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL (1 << 3)
|
||||
#define KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP (1 << 4)
|
||||
#define KFD_IOC_ALLOC_MEM_FLAGS_VRAM (1 << 0)
|
||||
#define KFD_IOC_ALLOC_MEM_FLAGS_GTT (1 << 1)
|
||||
#define KFD_IOC_ALLOC_MEM_FLAGS_USERPTR (1 << 2)
|
||||
#define KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL (1 << 3)
|
||||
#define KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP (1 << 4)
|
||||
/* Allocation flags: attributes/access options */
|
||||
#define KFD_IOC_ALLOC_MEM_FLAGS_WRITABLE (1 << 31)
|
||||
#define KFD_IOC_ALLOC_MEM_FLAGS_EXECUTABLE (1 << 30)
|
||||
#define KFD_IOC_ALLOC_MEM_FLAGS_PUBLIC (1 << 29)
|
||||
#define KFD_IOC_ALLOC_MEM_FLAGS_NO_SUBSTITUTE (1 << 28)
|
||||
#define KFD_IOC_ALLOC_MEM_FLAGS_AQL_QUEUE_MEM (1 << 27)
|
||||
#define KFD_IOC_ALLOC_MEM_FLAGS_COHERENT (1 << 26)
|
||||
#define KFD_IOC_ALLOC_MEM_FLAGS_WRITABLE (1 << 31)
|
||||
#define KFD_IOC_ALLOC_MEM_FLAGS_EXECUTABLE (1 << 30)
|
||||
#define KFD_IOC_ALLOC_MEM_FLAGS_PUBLIC (1 << 29)
|
||||
#define KFD_IOC_ALLOC_MEM_FLAGS_NO_SUBSTITUTE (1 << 28)
|
||||
#define KFD_IOC_ALLOC_MEM_FLAGS_AQL_QUEUE_MEM (1 << 27)
|
||||
#define KFD_IOC_ALLOC_MEM_FLAGS_COHERENT (1 << 26)
|
||||
|
||||
/* Allocate memory for later SVM (shared virtual memory) mapping.
|
||||
*
|
||||
@@ -460,12 +458,12 @@ struct kfd_ioctl_acquire_vm_args {
|
||||
* @flags: memory type and attributes. See KFD_IOC_ALLOC_MEM_FLAGS above
|
||||
*/
|
||||
struct kfd_ioctl_alloc_memory_of_gpu_args {
|
||||
__u64 va_addr; /* to KFD */
|
||||
__u64 size; /* to KFD */
|
||||
__u64 handle; /* from KFD */
|
||||
__u64 mmap_offset; /* to KFD (userptr), from KFD (mmap offset) */
|
||||
__u32 gpu_id; /* to KFD */
|
||||
__u32 flags;
|
||||
__u64 va_addr; /* to KFD */
|
||||
__u64 size; /* to KFD */
|
||||
__u64 handle; /* from KFD */
|
||||
__u64 mmap_offset; /* to KFD (userptr), from KFD (mmap offset) */
|
||||
__u32 gpu_id; /* to KFD */
|
||||
__u32 flags;
|
||||
};
|
||||
|
||||
/* Free memory allocated with kfd_ioctl_alloc_memory_of_gpu
|
||||
@@ -473,7 +471,7 @@ struct kfd_ioctl_alloc_memory_of_gpu_args {
|
||||
* @handle: memory handle returned by alloc
|
||||
*/
|
||||
struct kfd_ioctl_free_memory_of_gpu_args {
|
||||
__u64 handle; /* to KFD */
|
||||
__u64 handle; /* to KFD */
|
||||
};
|
||||
|
||||
/* Map memory to one or more GPUs
|
||||
@@ -492,10 +490,10 @@ struct kfd_ioctl_free_memory_of_gpu_args {
|
||||
* n_devices.
|
||||
*/
|
||||
struct kfd_ioctl_map_memory_to_gpu_args {
|
||||
__u64 handle; /* to KFD */
|
||||
__u64 device_ids_array_ptr; /* to KFD */
|
||||
__u32 n_devices; /* to KFD */
|
||||
__u32 n_success; /* to/from KFD */
|
||||
__u64 handle; /* to KFD */
|
||||
__u64 device_ids_array_ptr; /* to KFD */
|
||||
__u32 n_devices; /* to KFD */
|
||||
__u32 n_success; /* to/from KFD */
|
||||
};
|
||||
|
||||
/* Unmap memory from one or more GPUs
|
||||
@@ -503,10 +501,10 @@ struct kfd_ioctl_map_memory_to_gpu_args {
|
||||
* same arguments as for mapping
|
||||
*/
|
||||
struct kfd_ioctl_unmap_memory_from_gpu_args {
|
||||
__u64 handle; /* to KFD */
|
||||
__u64 device_ids_array_ptr; /* to KFD */
|
||||
__u32 n_devices; /* to KFD */
|
||||
__u32 n_success; /* to/from KFD */
|
||||
__u64 handle; /* to KFD */
|
||||
__u64 device_ids_array_ptr; /* to KFD */
|
||||
__u32 n_devices; /* to KFD */
|
||||
__u32 n_success; /* to/from KFD */
|
||||
};
|
||||
|
||||
/* Allocate GWS for specific queue
|
||||
@@ -517,28 +515,27 @@ struct kfd_ioctl_unmap_memory_from_gpu_args {
|
||||
* only support contiguous GWS allocation
|
||||
*/
|
||||
struct kfd_ioctl_alloc_queue_gws_args {
|
||||
__u32 queue_id; /* to KFD */
|
||||
__u32 num_gws; /* to KFD */
|
||||
__u32 first_gws; /* from KFD */
|
||||
__u32 pad; /* to KFD */
|
||||
__u32 queue_id; /* to KFD */
|
||||
__u32 num_gws; /* to KFD */
|
||||
__u32 first_gws; /* from KFD */
|
||||
__u32 pad; /* to KFD */
|
||||
};
|
||||
|
||||
struct kfd_ioctl_get_dmabuf_info_args {
|
||||
__u64 size; /* from KFD */
|
||||
__u64 metadata_ptr; /* to KFD */
|
||||
__u32 metadata_size; /* to KFD (space allocated by user)
|
||||
* from KFD (actual metadata size)
|
||||
*/
|
||||
__u32 gpu_id; /* from KFD */
|
||||
__u32 flags; /* from KFD (KFD_IOC_ALLOC_MEM_FLAGS) */
|
||||
__u32 dmabuf_fd; /* to KFD */
|
||||
__u64 size; /* from KFD */
|
||||
__u64 metadata_ptr; /* to KFD */
|
||||
__u32 metadata_size; // to KFD (space allocated by user)
|
||||
// from KFD (actual metadata size)
|
||||
__u32 gpu_id; /* from KFD */
|
||||
__u32 flags; /* from KFD (KFD_IOC_ALLOC_MEM_FLAGS) */
|
||||
__u32 dmabuf_fd; /* to KFD */
|
||||
};
|
||||
|
||||
struct kfd_ioctl_import_dmabuf_args {
|
||||
__u64 va_addr; /* to KFD */
|
||||
__u64 handle; /* from KFD */
|
||||
__u32 gpu_id; /* to KFD */
|
||||
__u32 dmabuf_fd; /* to KFD */
|
||||
__u64 va_addr; /* to KFD */
|
||||
__u64 handle; /* from KFD */
|
||||
__u32 gpu_id; /* to KFD */
|
||||
__u32 dmabuf_fd; /* to KFD */
|
||||
};
|
||||
|
||||
/*
|
||||
@@ -548,36 +545,36 @@ struct kfd_ioctl_import_dmabuf_args {
|
||||
#define KFD_SMI_EVENT_VMFAULT 0x0000000000000001
|
||||
|
||||
struct kfd_ioctl_smi_events_args {
|
||||
__u32 gpuid; /* to KFD */
|
||||
__u32 anon_fd; /* from KFD */
|
||||
__u32 gpuid; /* to KFD */
|
||||
__u32 anon_fd; /* from KFD */
|
||||
};
|
||||
|
||||
/* Register offset inside the remapped mmio page
|
||||
*/
|
||||
enum kfd_mmio_remap {
|
||||
KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL = 0,
|
||||
KFD_MMIO_REMAP_HDP_REG_FLUSH_CNTL = 4,
|
||||
KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL = 0,
|
||||
KFD_MMIO_REMAP_HDP_REG_FLUSH_CNTL = 4,
|
||||
};
|
||||
|
||||
struct kfd_ioctl_ipc_export_handle_args {
|
||||
__u64 handle; /* to KFD */
|
||||
__u32 share_handle[4]; /* from KFD */
|
||||
__u32 gpu_id; /* to KFD */
|
||||
__u32 pad;
|
||||
__u64 handle; /* to KFD */
|
||||
__u32 share_handle[4]; /* from KFD */
|
||||
__u32 gpu_id; /* to KFD */
|
||||
__u32 pad;
|
||||
};
|
||||
|
||||
struct kfd_ioctl_ipc_import_handle_args {
|
||||
__u64 handle; /* from KFD */
|
||||
__u64 va_addr; /* to KFD */
|
||||
__u64 mmap_offset; /* from KFD */
|
||||
__u32 share_handle[4]; /* to KFD */
|
||||
__u32 gpu_id; /* to KFD */
|
||||
__u32 pad;
|
||||
__u64 handle; /* from KFD */
|
||||
__u64 va_addr; /* to KFD */
|
||||
__u64 mmap_offset; /* from KFD */
|
||||
__u32 share_handle[4]; /* to KFD */
|
||||
__u32 gpu_id; /* to KFD */
|
||||
__u32 pad;
|
||||
};
|
||||
|
||||
struct kfd_memory_range {
|
||||
__u64 va_addr;
|
||||
__u64 size;
|
||||
__u64 va_addr;
|
||||
__u64 size;
|
||||
};
|
||||
|
||||
/* flags definitions
|
||||
@@ -587,143 +584,143 @@ struct kfd_memory_range {
|
||||
#define KFD_CROSS_MEMORY_RW_BIT (1 << 0)
|
||||
#define KFD_SET_CROSS_MEMORY_READ(flags) (flags &= ~KFD_CROSS_MEMORY_RW_BIT)
|
||||
#define KFD_SET_CROSS_MEMORY_WRITE(flags) (flags |= KFD_CROSS_MEMORY_RW_BIT)
|
||||
#define KFD_IS_CROSS_MEMORY_WRITE(flags) (flags & KFD_CROSS_MEMORY_RW_BIT)
|
||||
#define KFD_IS_CROSS_MEMORY_WRITE(flags) (flags & KFD_CROSS_MEMORY_RW_BIT) // NOLINT
|
||||
|
||||
struct kfd_ioctl_cross_memory_copy_args {
|
||||
/* to KFD: Process ID of the remote process */
|
||||
__u32 pid;
|
||||
/* to KFD: See above definition */
|
||||
__u32 flags;
|
||||
/* to KFD: Source GPU VM range */
|
||||
__u64 src_mem_range_array;
|
||||
/* to KFD: Size of above array */
|
||||
__u64 src_mem_array_size;
|
||||
/* to KFD: Destination GPU VM range */
|
||||
__u64 dst_mem_range_array;
|
||||
/* to KFD: Size of above array */
|
||||
__u64 dst_mem_array_size;
|
||||
/* from KFD: Total amount of bytes copied */
|
||||
__u64 bytes_copied;
|
||||
/* to KFD: Process ID of the remote process */
|
||||
__u32 pid;
|
||||
/* to KFD: See above definition */
|
||||
__u32 flags;
|
||||
/* to KFD: Source GPU VM range */
|
||||
__u64 src_mem_range_array;
|
||||
/* to KFD: Size of above array */
|
||||
__u64 src_mem_array_size;
|
||||
/* to KFD: Destination GPU VM range */
|
||||
__u64 dst_mem_range_array;
|
||||
/* to KFD: Size of above array */
|
||||
__u64 dst_mem_array_size;
|
||||
/* from KFD: Total amount of bytes copied */
|
||||
__u64 bytes_copied;
|
||||
};
|
||||
|
||||
#define AMDKFD_IOCTL_BASE 'K'
|
||||
#define AMDKFD_IO(nr) _IO(AMDKFD_IOCTL_BASE, nr)
|
||||
#define AMDKFD_IOR(nr, type) _IOR(AMDKFD_IOCTL_BASE, nr, type)
|
||||
#define AMDKFD_IOW(nr, type) _IOW(AMDKFD_IOCTL_BASE, nr, type)
|
||||
#define AMDKFD_IOWR(nr, type) _IOWR(AMDKFD_IOCTL_BASE, nr, type)
|
||||
#define AMDKFD_IO(nr) _IO(AMDKFD_IOCTL_BASE, nr)
|
||||
#define AMDKFD_IOR(nr, type) _IOR(AMDKFD_IOCTL_BASE, nr, type)
|
||||
#define AMDKFD_IOW(nr, type) _IOW(AMDKFD_IOCTL_BASE, nr, type)
|
||||
#define AMDKFD_IOWR(nr, type) _IOWR(AMDKFD_IOCTL_BASE, nr, type)
|
||||
|
||||
#define AMDKFD_IOC_GET_VERSION \
|
||||
AMDKFD_IOR(0x01, struct kfd_ioctl_get_version_args)
|
||||
#define AMDKFD_IOC_GET_VERSION \
|
||||
AMDKFD_IOR(0x01, struct kfd_ioctl_get_version_args)
|
||||
|
||||
#define AMDKFD_IOC_CREATE_QUEUE \
|
||||
AMDKFD_IOWR(0x02, struct kfd_ioctl_create_queue_args)
|
||||
#define AMDKFD_IOC_CREATE_QUEUE \
|
||||
AMDKFD_IOWR(0x02, struct kfd_ioctl_create_queue_args)
|
||||
|
||||
#define AMDKFD_IOC_DESTROY_QUEUE \
|
||||
AMDKFD_IOWR(0x03, struct kfd_ioctl_destroy_queue_args)
|
||||
#define AMDKFD_IOC_DESTROY_QUEUE \
|
||||
AMDKFD_IOWR(0x03, struct kfd_ioctl_destroy_queue_args)
|
||||
|
||||
#define AMDKFD_IOC_SET_MEMORY_POLICY \
|
||||
AMDKFD_IOW(0x04, struct kfd_ioctl_set_memory_policy_args)
|
||||
#define AMDKFD_IOC_SET_MEMORY_POLICY \
|
||||
AMDKFD_IOW(0x04, struct kfd_ioctl_set_memory_policy_args)
|
||||
|
||||
#define AMDKFD_IOC_GET_CLOCK_COUNTERS \
|
||||
AMDKFD_IOWR(0x05, struct kfd_ioctl_get_clock_counters_args)
|
||||
#define AMDKFD_IOC_GET_CLOCK_COUNTERS \
|
||||
AMDKFD_IOWR(0x05, struct kfd_ioctl_get_clock_counters_args)
|
||||
|
||||
#define AMDKFD_IOC_GET_PROCESS_APERTURES \
|
||||
AMDKFD_IOR(0x06, struct kfd_ioctl_get_process_apertures_args)
|
||||
#define AMDKFD_IOC_GET_PROCESS_APERTURES \
|
||||
AMDKFD_IOR(0x06, struct kfd_ioctl_get_process_apertures_args)
|
||||
|
||||
#define AMDKFD_IOC_UPDATE_QUEUE \
|
||||
AMDKFD_IOW(0x07, struct kfd_ioctl_update_queue_args)
|
||||
#define AMDKFD_IOC_UPDATE_QUEUE \
|
||||
AMDKFD_IOW(0x07, struct kfd_ioctl_update_queue_args)
|
||||
|
||||
#define AMDKFD_IOC_CREATE_EVENT \
|
||||
AMDKFD_IOWR(0x08, struct kfd_ioctl_create_event_args)
|
||||
#define AMDKFD_IOC_CREATE_EVENT \
|
||||
AMDKFD_IOWR(0x08, struct kfd_ioctl_create_event_args)
|
||||
|
||||
#define AMDKFD_IOC_DESTROY_EVENT \
|
||||
AMDKFD_IOW(0x09, struct kfd_ioctl_destroy_event_args)
|
||||
#define AMDKFD_IOC_DESTROY_EVENT \
|
||||
AMDKFD_IOW(0x09, struct kfd_ioctl_destroy_event_args)
|
||||
|
||||
#define AMDKFD_IOC_SET_EVENT \
|
||||
AMDKFD_IOW(0x0A, struct kfd_ioctl_set_event_args)
|
||||
#define AMDKFD_IOC_SET_EVENT \
|
||||
AMDKFD_IOW(0x0A, struct kfd_ioctl_set_event_args)
|
||||
|
||||
#define AMDKFD_IOC_RESET_EVENT \
|
||||
AMDKFD_IOW(0x0B, struct kfd_ioctl_reset_event_args)
|
||||
#define AMDKFD_IOC_RESET_EVENT \
|
||||
AMDKFD_IOW(0x0B, struct kfd_ioctl_reset_event_args)
|
||||
|
||||
#define AMDKFD_IOC_WAIT_EVENTS \
|
||||
AMDKFD_IOWR(0x0C, struct kfd_ioctl_wait_events_args)
|
||||
#define AMDKFD_IOC_WAIT_EVENTS \
|
||||
AMDKFD_IOWR(0x0C, struct kfd_ioctl_wait_events_args)
|
||||
|
||||
#define AMDKFD_IOC_DBG_REGISTER \
|
||||
AMDKFD_IOW(0x0D, struct kfd_ioctl_dbg_register_args)
|
||||
#define AMDKFD_IOC_DBG_REGISTER \
|
||||
AMDKFD_IOW(0x0D, struct kfd_ioctl_dbg_register_args)
|
||||
|
||||
#define AMDKFD_IOC_DBG_UNREGISTER \
|
||||
AMDKFD_IOW(0x0E, struct kfd_ioctl_dbg_unregister_args)
|
||||
#define AMDKFD_IOC_DBG_UNREGISTER \
|
||||
AMDKFD_IOW(0x0E, struct kfd_ioctl_dbg_unregister_args)
|
||||
|
||||
#define AMDKFD_IOC_DBG_ADDRESS_WATCH \
|
||||
AMDKFD_IOW(0x0F, struct kfd_ioctl_dbg_address_watch_args)
|
||||
#define AMDKFD_IOC_DBG_ADDRESS_WATCH \
|
||||
AMDKFD_IOW(0x0F, struct kfd_ioctl_dbg_address_watch_args)
|
||||
|
||||
#define AMDKFD_IOC_DBG_WAVE_CONTROL \
|
||||
AMDKFD_IOW(0x10, struct kfd_ioctl_dbg_wave_control_args)
|
||||
#define AMDKFD_IOC_DBG_WAVE_CONTROL \
|
||||
AMDKFD_IOW(0x10, struct kfd_ioctl_dbg_wave_control_args)
|
||||
|
||||
#define AMDKFD_IOC_SET_SCRATCH_BACKING_VA \
|
||||
AMDKFD_IOWR(0x11, struct kfd_ioctl_set_scratch_backing_va_args)
|
||||
#define AMDKFD_IOC_SET_SCRATCH_BACKING_VA \
|
||||
AMDKFD_IOWR(0x11, struct kfd_ioctl_set_scratch_backing_va_args)
|
||||
|
||||
#define AMDKFD_IOC_GET_TILE_CONFIG \
|
||||
AMDKFD_IOWR(0x12, struct kfd_ioctl_get_tile_config_args)
|
||||
#define AMDKFD_IOC_GET_TILE_CONFIG \
|
||||
AMDKFD_IOWR(0x12, struct kfd_ioctl_get_tile_config_args)
|
||||
|
||||
#define AMDKFD_IOC_SET_TRAP_HANDLER \
|
||||
AMDKFD_IOW(0x13, struct kfd_ioctl_set_trap_handler_args)
|
||||
#define AMDKFD_IOC_SET_TRAP_HANDLER \
|
||||
AMDKFD_IOW(0x13, struct kfd_ioctl_set_trap_handler_args)
|
||||
|
||||
#define AMDKFD_IOC_GET_PROCESS_APERTURES_NEW \
|
||||
AMDKFD_IOWR(0x14, \
|
||||
struct kfd_ioctl_get_process_apertures_new_args)
|
||||
#define AMDKFD_IOC_GET_PROCESS_APERTURES_NEW \
|
||||
AMDKFD_IOWR(0x14, \
|
||||
struct kfd_ioctl_get_process_apertures_new_args)
|
||||
|
||||
#define AMDKFD_IOC_ACQUIRE_VM \
|
||||
AMDKFD_IOW(0x15, struct kfd_ioctl_acquire_vm_args)
|
||||
#define AMDKFD_IOC_ACQUIRE_VM \
|
||||
AMDKFD_IOW(0x15, struct kfd_ioctl_acquire_vm_args)
|
||||
|
||||
#define AMDKFD_IOC_ALLOC_MEMORY_OF_GPU \
|
||||
AMDKFD_IOWR(0x16, struct kfd_ioctl_alloc_memory_of_gpu_args)
|
||||
#define AMDKFD_IOC_ALLOC_MEMORY_OF_GPU \
|
||||
AMDKFD_IOWR(0x16, struct kfd_ioctl_alloc_memory_of_gpu_args)
|
||||
|
||||
#define AMDKFD_IOC_FREE_MEMORY_OF_GPU \
|
||||
AMDKFD_IOW(0x17, struct kfd_ioctl_free_memory_of_gpu_args)
|
||||
#define AMDKFD_IOC_FREE_MEMORY_OF_GPU \
|
||||
AMDKFD_IOW(0x17, struct kfd_ioctl_free_memory_of_gpu_args)
|
||||
|
||||
#define AMDKFD_IOC_MAP_MEMORY_TO_GPU \
|
||||
AMDKFD_IOWR(0x18, struct kfd_ioctl_map_memory_to_gpu_args)
|
||||
#define AMDKFD_IOC_MAP_MEMORY_TO_GPU \
|
||||
AMDKFD_IOWR(0x18, struct kfd_ioctl_map_memory_to_gpu_args)
|
||||
|
||||
#define AMDKFD_IOC_UNMAP_MEMORY_FROM_GPU \
|
||||
AMDKFD_IOWR(0x19, struct kfd_ioctl_unmap_memory_from_gpu_args)
|
||||
#define AMDKFD_IOC_UNMAP_MEMORY_FROM_GPU \
|
||||
AMDKFD_IOWR(0x19, struct kfd_ioctl_unmap_memory_from_gpu_args)
|
||||
|
||||
#define AMDKFD_IOC_SET_CU_MASK \
|
||||
AMDKFD_IOW(0x1A, struct kfd_ioctl_set_cu_mask_args)
|
||||
#define AMDKFD_IOC_SET_CU_MASK \
|
||||
AMDKFD_IOW(0x1A, struct kfd_ioctl_set_cu_mask_args)
|
||||
|
||||
#define AMDKFD_IOC_GET_QUEUE_WAVE_STATE \
|
||||
AMDKFD_IOWR(0x1B, struct kfd_ioctl_get_queue_wave_state_args)
|
||||
#define AMDKFD_IOC_GET_QUEUE_WAVE_STATE \
|
||||
AMDKFD_IOWR(0x1B, struct kfd_ioctl_get_queue_wave_state_args)
|
||||
|
||||
#define AMDKFD_IOC_GET_DMABUF_INFO \
|
||||
AMDKFD_IOWR(0x1C, struct kfd_ioctl_get_dmabuf_info_args)
|
||||
#define AMDKFD_IOC_GET_DMABUF_INFO \
|
||||
AMDKFD_IOWR(0x1C, struct kfd_ioctl_get_dmabuf_info_args)
|
||||
|
||||
#define AMDKFD_IOC_IMPORT_DMABUF \
|
||||
AMDKFD_IOWR(0x1D, struct kfd_ioctl_import_dmabuf_args)
|
||||
#define AMDKFD_IOC_IMPORT_DMABUF \
|
||||
AMDKFD_IOWR(0x1D, struct kfd_ioctl_import_dmabuf_args)
|
||||
|
||||
#define AMDKFD_IOC_ALLOC_QUEUE_GWS \
|
||||
AMDKFD_IOWR(0x1E, struct kfd_ioctl_alloc_queue_gws_args)
|
||||
#define AMDKFD_IOC_ALLOC_QUEUE_GWS \
|
||||
AMDKFD_IOWR(0x1E, struct kfd_ioctl_alloc_queue_gws_args)
|
||||
|
||||
#define AMDKFD_IOC_SMI_EVENTS \
|
||||
AMDKFD_IOWR(0x1F, struct kfd_ioctl_smi_events_args)
|
||||
#define AMDKFD_IOC_SMI_EVENTS \
|
||||
AMDKFD_IOWR(0x1F, struct kfd_ioctl_smi_events_args)
|
||||
|
||||
#define AMDKFD_COMMAND_START 0x01
|
||||
#define AMDKFD_COMMAND_END 0x20
|
||||
#define AMDKFD_COMMAND_START 0x01
|
||||
#define AMDKFD_COMMAND_END 0x20
|
||||
|
||||
/* non-upstream ioctls */
|
||||
#define AMDKFD_IOC_IPC_IMPORT_HANDLE \
|
||||
AMDKFD_IOWR(0x1F, struct kfd_ioctl_ipc_import_handle_args)
|
||||
AMDKFD_IOWR(0x1F, struct kfd_ioctl_ipc_import_handle_args)
|
||||
|
||||
#define AMDKFD_IOC_IPC_EXPORT_HANDLE \
|
||||
AMDKFD_IOWR(0x20, struct kfd_ioctl_ipc_export_handle_args)
|
||||
#define AMDKFD_IOC_IPC_EXPORT_HANDLE \
|
||||
AMDKFD_IOWR(0x20, struct kfd_ioctl_ipc_export_handle_args)
|
||||
|
||||
#define AMDKFD_IOC_DBG_TRAP \
|
||||
AMDKFD_IOWR(0x21, struct kfd_ioctl_dbg_trap_args)
|
||||
#define AMDKFD_IOC_DBG_TRAP \
|
||||
AMDKFD_IOWR(0x21, struct kfd_ioctl_dbg_trap_args)
|
||||
|
||||
#define AMDKFD_IOC_CROSS_MEMORY_COPY \
|
||||
AMDKFD_IOWR(0x22, struct kfd_ioctl_cross_memory_copy_args)
|
||||
#define AMDKFD_IOC_CROSS_MEMORY_COPY \
|
||||
AMDKFD_IOWR(0x22, struct kfd_ioctl_cross_memory_copy_args)
|
||||
|
||||
#define AMDKFD_COMMAND_START 0x01
|
||||
#define AMDKFD_COMMAND_START 0x01
|
||||
#undef AMDKFD_COMMAND_END
|
||||
#define AMDKFD_COMMAND_END 0x22
|
||||
#define AMDKFD_COMMAND_END 0x22
|
||||
|
||||
#endif // INCLUDE_ROCM_SMI_KFD_IOCTL_H_
|
||||
|
||||
@@ -123,6 +123,8 @@ typedef enum {
|
||||
RSMI_STATUS_BUSY, //!< A resource or mutex could not be
|
||||
//!< acquired because it is already
|
||||
//!< being used
|
||||
RSMI_STATUS_REFCOUNT_OVERFLOW, //!< An internal reference counter
|
||||
//!< exceeded INT32_MAX
|
||||
|
||||
RSMI_STATUS_UNKNOWN_ERROR = 0xFFFFFFFF, //!< An unknown error occurred
|
||||
} rsmi_status_t;
|
||||
|
||||
@@ -94,8 +94,18 @@ class RocmSMI {
|
||||
int kfd_notif_evt_fh(void) const {return kfd_notif_evt_fh_;}
|
||||
void set_kfd_notif_evt_fh(int fd) {kfd_notif_evt_fh_ = fd;}
|
||||
std::mutex *kfd_notif_evt_fh_mutex(void) {return &kfd_notif_evt_fh_mutex_;}
|
||||
int kfd_notif_evt_fh_refcnt_inc() {return ++kfd_notif_evt_fh_refcnt_;}
|
||||
int kfd_notif_evt_fh_refcnt_dec() {return --kfd_notif_evt_fh_refcnt_;}
|
||||
std::mutex *bootstrap_mutex(void) {return &bootstrap_mutex_;}
|
||||
|
||||
uint32_t ref_count(void) const {return ref_count_;}
|
||||
uint32_t ref_count_inc(void) {return ++ref_count_;}
|
||||
uint32_t ref_count_dec(void) {return --ref_count_;}
|
||||
|
||||
uint32_t kfd_notif_evt_fh_refcnt(void) const {
|
||||
return kfd_notif_evt_fh_refcnt_;}
|
||||
uint32_t kfd_notif_evt_fh_refcnt_inc(void) {
|
||||
return ++kfd_notif_evt_fh_refcnt_;}
|
||||
uint32_t kfd_notif_evt_fh_refcnt_dec(void) {
|
||||
return --kfd_notif_evt_fh_refcnt_;}
|
||||
|
||||
private:
|
||||
std::vector<std::shared_ptr<Device>> devices_;
|
||||
@@ -114,8 +124,12 @@ class RocmSMI {
|
||||
uint32_t euid_;
|
||||
|
||||
int kfd_notif_evt_fh_;
|
||||
int kfd_notif_evt_fh_refcnt_;
|
||||
std::mutex kfd_notif_evt_fh_mutex_;
|
||||
uint32_t kfd_notif_evt_fh_refcnt_; // Access to this should be protected
|
||||
// by kfd_notif_evt_fh_mutex_
|
||||
std::mutex bootstrap_mutex_;
|
||||
uint32_t ref_count_; // Access to this should be protected
|
||||
// by bootstrap_mutex_
|
||||
};
|
||||
|
||||
} // namespace smi
|
||||
|
||||
@@ -105,6 +105,85 @@ struct ScopedPthread {
|
||||
pthread_wrap& pthrd_ref_;
|
||||
bool mutex_not_acquired_; // Use for AcquireNB (not for Aquire())
|
||||
};
|
||||
|
||||
|
||||
#define PASTE2(x, y) x##y
|
||||
#define PASTE(x, y) PASTE2(x, y)
|
||||
|
||||
#define __forceinline __inline__ __attribute__((always_inline))
|
||||
|
||||
template <typename lambda>
|
||||
class ScopeGuard {
|
||||
public:
|
||||
explicit __forceinline ScopeGuard(const lambda& release)
|
||||
: release_(release), dismiss_(false) {}
|
||||
|
||||
ScopeGuard(const ScopeGuard& rhs) {*this = rhs; }
|
||||
|
||||
__forceinline ~ScopeGuard() {
|
||||
if (!dismiss_) release_();
|
||||
}
|
||||
__forceinline ScopeGuard& operator=(const ScopeGuard& rhs) {
|
||||
dismiss_ = rhs.dismiss_;
|
||||
release_ = rhs.release_;
|
||||
rhs.dismiss_ = true;
|
||||
}
|
||||
__forceinline void Dismiss() { dismiss_ = true; }
|
||||
|
||||
private:
|
||||
lambda release_;
|
||||
bool dismiss_;
|
||||
};
|
||||
|
||||
template <typename lambda>
|
||||
static __forceinline ScopeGuard<lambda> MakeScopeGuard(lambda rel) {
|
||||
return ScopeGuard<lambda>(rel);
|
||||
}
|
||||
|
||||
#define MAKE_SCOPE_GUARD_HELPER(lname, sname, ...) \
|
||||
auto lname = __VA_ARGS__; \
|
||||
amd::smi::ScopeGuard<decltype(lname)> sname(lname);
|
||||
#define MAKE_SCOPE_GUARD(...) \
|
||||
MAKE_SCOPE_GUARD_HELPER(PASTE(scopeGuardLambda, __COUNTER__), \
|
||||
PASTE(scopeGuard, __COUNTER__), __VA_ARGS__)
|
||||
#define MAKE_NAMED_SCOPE_GUARD(name, ...) \
|
||||
MAKE_SCOPE_GUARD_HELPER(PASTE(scopeGuardLambda, __COUNTER__), name, \
|
||||
__VA_ARGS__)
|
||||
|
||||
|
||||
// A macro to disallow the copy and move constructor and operator= functions
|
||||
#define DISALLOW_COPY_AND_ASSIGN(TypeName) \
|
||||
TypeName(const TypeName&) = delete; \
|
||||
TypeName(TypeName&&) = delete; \
|
||||
void operator=(const TypeName&) = delete; \
|
||||
void operator=(TypeName&&) = delete;
|
||||
|
||||
template <class LockType>
|
||||
class ScopedAcquire {
|
||||
public:
|
||||
/// @brief: When constructing, acquire the lock.
|
||||
/// @param: lock(Input), pointer to an existing lock.
|
||||
explicit ScopedAcquire(LockType* lock) : lock_(lock), doRelease(true) {
|
||||
lock_->Acquire();}
|
||||
|
||||
/// @brief: when destructing, release the lock.
|
||||
~ScopedAcquire() {
|
||||
if (doRelease) lock_->Release();
|
||||
}
|
||||
|
||||
/// @brief: Release the lock early. Avoid using when possible.
|
||||
void Release() {
|
||||
lock_->Release();
|
||||
doRelease = false;
|
||||
}
|
||||
|
||||
private:
|
||||
LockType* lock_;
|
||||
bool doRelease;
|
||||
/// @brief: Disable copiable and assignable ability.
|
||||
DISALLOW_COPY_AND_ASSIGN(ScopedAcquire);
|
||||
};
|
||||
|
||||
} // namespace smi
|
||||
} // namespace amd
|
||||
|
||||
|
||||
Reference in New Issue
Block a user