From 8e55352cf385207108f819ec73ba43c20829f2c8 Mon Sep 17 00:00:00 2001 From: kjayapra-amd Date: Tue, 13 Sep 2022 14:27:50 -0700 Subject: [PATCH] SWDEV-351338 - Increase AQL Queue depth and reduce ROC_ACTIVE_WAIT_TIME to 0. Change-Id: Iec0005d57933d0df2f55b4f7bdb84ada8a386a0c [ROCm/clr commit: 362e7961d95ad49a03891706c98e2f92d7fa1009] --- projects/clr/rocclr/utils/flags.hpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/projects/clr/rocclr/utils/flags.hpp b/projects/clr/rocclr/utils/flags.hpp index 7c68b61a14..811e6be63b 100644 --- a/projects/clr/rocclr/utils/flags.hpp +++ b/projects/clr/rocclr/utils/flags.hpp @@ -235,7 +235,7 @@ release(uint, HIP_HIDDEN_FREE_MEM, 0, \ "0 = Disable") \ release(size_t, GPU_FORCE_BLIT_COPY_SIZE, 0, \ "Size in KB of the threshold below which to force blit instead for sdma") \ -release(uint, ROC_ACTIVE_WAIT_TIMEOUT, 10, \ +release(uint, ROC_ACTIVE_WAIT_TIMEOUT, 0, \ "Forces active wait of GPU interrup for the timeout(us)") \ release(bool, ROC_ENABLE_LARGE_BAR, true, \ "Enable Large Bar if supported by the device") \ @@ -268,7 +268,7 @@ release(bool, ROC_USE_FGS_KERNARG, true, \ "Use fine grain kernel args segment for supported asics") \ release(uint, ROC_P2P_SDMA_SIZE, 1024, \ "The minimum size in KB for P2P transfer with SDMA") \ -release(uint, ROC_AQL_QUEUE_SIZE, 4096, \ +release(uint, ROC_AQL_QUEUE_SIZE, 16384, \ "AQL queue size in AQL packets") \ release(uint, ROC_SIGNAL_POOL_SIZE, 32, \ "Initial size of HSA signal pool") \