2.3.5-5
Add support for inter-node communication using sockets and InfiniBand/RoCE.
Improve latency.
Add support for aggregation.
Improve LL/regular tuning.
Remove tests as those are now at github.com/nvidia/nccl-tests .
[ROCm/rccl commit: f93fe9bfd9]
This commit is contained in:
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#
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# Copyright (c) 2015-2018, NVIDIA CORPORATION. All rights reserved.
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#
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# See LICENSE.txt for license information
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#
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CUDA_HOME ?= /usr/local/cuda
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PREFIX ?= /usr/local
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VERBOSE ?= 0
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KEEP ?= 0
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DEBUG ?= 0
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TRACE ?= 0
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PROFAPI ?= 0
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NVCC = $(CUDA_HOME)/bin/nvcc
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CUDA_LIB ?= $(CUDA_HOME)/lib64
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CUDA_INC ?= $(CUDA_HOME)/include
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CUDA_VERSION = $(strip $(shell $(NVCC) --version | grep release | sed 's/.*release //' | sed 's/\,.*//'))
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#CUDA_VERSION ?= $(shell ls $(CUDA_LIB)/libcudart.so.* | head -1 | rev | cut -d "." -f -2 | rev)
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CUDA_MAJOR = $(shell echo $(CUDA_VERSION) | cut -d "." -f 1)
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CUDA_MINOR = $(shell echo $(CUDA_VERSION) | cut -d "." -f 2)
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#$(info CUDA_VERSION ${CUDA_MAJOR}.${CUDA_MINOR})
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# Better define NVCC_GENCODE in your environment to the minimal set
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# of archs to reduce compile time.
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CUDA8_GENCODE = -gencode=arch=compute_30,code=sm_30 \
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-gencode=arch=compute_35,code=sm_35 \
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-gencode=arch=compute_50,code=sm_50 \
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-gencode=arch=compute_60,code=sm_60 \
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-gencode=arch=compute_61,code=sm_61
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CUDA9_GENCODE = -gencode=arch=compute_70,code=sm_70
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CUDA8_PTX = -gencode=arch=compute_61,code=compute_61
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CUDA9_PTX = -gencode=arch=compute_70,code=compute_70
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# Include Volta support if we're using CUDA9 or above
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ifeq ($(shell test "$(CUDA_MAJOR)" -gt 8; echo $$?),0)
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NVCC_GENCODE ?= $(CUDA8_GENCODE) $(CUDA9_GENCODE) $(CUDA9_PTX)
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else
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NVCC_GENCODE ?= $(CUDA8_GENCODE) $(CUDA8_PTX)
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endif
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#$(info NVCC_GENCODE is ${NVCC_GENCODE})
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CXXFLAGS := -I$(CUDA_INC) -DCUDA_MAJOR=$(CUDA_MAJOR) -DCUDA_MINOR=$(CUDA_MINOR) -fPIC -fvisibility=hidden
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CXXFLAGS += -Wall -Wno-sign-compare
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NVCUFLAGS := -ccbin $(CXX) $(NVCC_GENCODE) -lineinfo -std=c++11 -Xptxas -maxrregcount=96 -Xfatbin -compress-all
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# Use addprefix so that we can specify more than one path
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NVLDFLAGS := -L${CUDA_LIB} -lcudart -lrt
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########## GCOV ##########
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GCOV ?= 0 # disable by default.
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GCOV_FLAGS := $(if $(filter 0,${GCOV} ${DEBUG}),,--coverage) # only gcov=1 and debug =1
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CXXFLAGS += ${GCOV_FLAGS}
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NVCUFLAGS += ${GCOV_FLAGS:%=-Xcompiler %}
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LDFLAGS += ${GCOV_FLAGS}
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NVLDFLAGS += ${GCOV_FLAGS:%=-Xcompiler %}
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# $(warning GCOV_FLAGS=${GCOV_FLAGS})
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########## GCOV ##########
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ifeq ($(DEBUG), 0)
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NVCUFLAGS += -O3
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CXXFLAGS += -O3 -g
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else
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NVCUFLAGS += -O0 -G -g
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CXXFLAGS += -O0 -g -ggdb3
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endif
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ifneq ($(VERBOSE), 0)
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NVCUFLAGS += -Xptxas -v -Xcompiler -Wall,-Wextra
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CXXFLAGS += -Wall -Wextra
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else
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.SILENT:
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endif
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ifneq ($(TRACE), 0)
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CXXFLAGS += -DENABLE_TRACE
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endif
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ifneq ($(KEEP), 0)
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NVCUFLAGS += -keep
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endif
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ifneq ($(PROFAPI), 0)
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CXXFLAGS += -DPROFAPI
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endif
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@@ -0,0 +1,33 @@
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#
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# Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
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#
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# See LICENSE.txt for license information
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#
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# Prerequisite: $(FILESTOFORMAT) contains the list of files of interest for formatting
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# As this file defines a new target (format), it should be included at least after the definition of the
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# default target.
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ASTYLE_FORMAT_OPTS=-Qv --style=java --indent-after-parens --indent-modifiers --indent-switches --indent-continuation=2 --keep-one-line-blocks --keep-one-line-statements --indent=spaces=2 --lineend=linux --suffix=none
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ASTYLEDIR := $(BUILDDIR)/contrib
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ASTYLETAR := $(ASTYLEDIR)/astyle.tar.gz
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ASTYLEBIN := $(ASTYLEDIR)/astyle/build/gcc/bin/astyle
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ASTYLEBLD := $(ASTYLEDIR)/astyle/build/gcc/
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ASTYLEVER := 3.1
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ASTYLEURL := "https://versaweb.dl.sourceforge.net/project/astyle/astyle/astyle%20$(ASTYLEVER)/astyle_$(ASTYLEVER)_linux.tar.gz"
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$(ASTYLEDIR) :
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@mkdir -p $(ASTYLEDIR)
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$(ASTYLETAR) : $(ASTYLEDIR)
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@wget -q -O $(ASTYLETAR) $(ASTYLEURL)
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$(ASTYLEBLD) : $(ASTYLETAR)
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@cd $(ASTYLEDIR) && tar xzf $(ASTYLETAR)
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$(ASTYLEBIN) : $(ASTYLEBLD)
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${MAKE} -C $(ASTYLEBLD)
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.PHONY : format
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format : $(ASTYLEBIN)
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@$(ASTYLEBIN) $(ASTYLE_FORMAT_OPTS) $(FILESTOFORMAT)
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@@ -0,0 +1,6 @@
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##### version
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NCCL_MAJOR := 2
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NCCL_MINOR := 3
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NCCL_PATCH := 5
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NCCL_SUFFIX :=
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PKG_REVISION := 5
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