From 901336f84604ff1f72adbb25c5b4e7fa671da6cc Mon Sep 17 00:00:00 2001
From: foreman <dl.swbuild@amd.com>
Date: Tue, 16 Jul 2019 12:46:10 -0500
Subject: [PATCH] P4 to Git Change 1968451 by
 vsytchen@vsytchen-remote-ocl-win10 on 2019/07/16 13:33:33

	SWDEV-79445 - OCL generic changes and code clean-up

	1. Remove redundant spillSegmentByteSize_ member

	ReviewBoardURL = http://ocltc.amd.com/reviews/r/17692/diff/

Affected files ...

... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palkernel.cpp#81 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palkernel.hpp#29 edit
---
 rocclr/runtime/device/pal/palkernel.cpp | 6 +-----
 rocclr/runtime/device/pal/palkernel.hpp | 3 +--
 2 files changed, 2 insertions(+), 7 deletions(-)

diff --git a/rocclr/runtime/device/pal/palkernel.cpp b/rocclr/runtime/device/pal/palkernel.cpp
index 34c5c5257f..985a907095 100644
--- a/rocclr/runtime/device/pal/palkernel.cpp
+++ b/rocclr/runtime/device/pal/palkernel.cpp
@@ -90,7 +90,6 @@ bool HSAILKernel::aqlCreateHWInfo(amd::hsa::loader::Symbol* sym) {
 
   workgroupGroupSegmentByteSize_ = workGroupInfo_.usedLDSSize_;
   kernargSegmentByteSize_ = akc->kernarg_segment_byte_size;
-  spillSegmentByteSize_ = amd::alignUp(workGroupInfo_.privateMemSize_, sizeof(uint32_t));
 
   return true;
 }
@@ -102,8 +101,7 @@ HSAILKernel::HSAILKernel(std::string name, HSAILProgram* prog, std::string compi
       code_(0),
       codeSize_(0),
       workgroupGroupSegmentByteSize_(0),
-      kernargSegmentByteSize_(0),
-      spillSegmentByteSize_(0) {
+      kernargSegmentByteSize_(0) {
   flags_.hsa_ = true;
 }
 
@@ -427,8 +425,6 @@ bool LightningKernel::init() {
   symbolName_ = (codeObjectVer() == 2) ? name() : kernelMD.mSymbolName;
 
   workgroupGroupSegmentByteSize_ = kernelMD.mCodeProps.mGroupSegmentFixedSize;
-  spillSegmentByteSize_ =
-      amd::alignUp(kernelMD.mCodeProps.mPrivateSegmentFixedSize, sizeof(uint32_t));
   kernargSegmentByteSize_ = kernelMD.mCodeProps.mKernargSegmentSize;
 
   // Copy codeobject of this kernel from the program CPU segment
diff --git a/rocclr/runtime/device/pal/palkernel.hpp b/rocclr/runtime/device/pal/palkernel.hpp
index 926d2deccc..81004b1485 100644
--- a/rocclr/runtime/device/pal/palkernel.hpp
+++ b/rocclr/runtime/device/pal/palkernel.hpp
@@ -73,7 +73,7 @@ class HSAILKernel : public device::Kernel {
   size_t argsBufferSize() const { return kernargSegmentByteSize_; }
 
   //! Returns spill reg size per workitem
-  uint32_t spillSegSize() const { return spillSegmentByteSize_; }
+  uint32_t spillSegSize() const { return workGroupInfo_.privateMemSize_; }
 
   //! Returns AQL packet in CPU memory
   //! if the kernel arguments were successfully loaded, otherwise NULL
@@ -117,7 +117,6 @@ class HSAILKernel : public device::Kernel {
 
   uint32_t workgroupGroupSegmentByteSize_;  //!< LDS size used in the kernel
   uint32_t kernargSegmentByteSize_;         //!< Size of kernel argument buffer
-  uint32_t spillSegmentByteSize_;           //!< Spill reg size per workitem
 };
 
 class LightningKernel : public HSAILKernel {