From 914d8354940b5996d0174e9252d9cd0ecdb06fa1 Mon Sep 17 00:00:00 2001 From: Ori Messinger Date: Sat, 22 Aug 2020 23:40:33 -0400 Subject: [PATCH] ROCm SMI Python CLI: Implement Valid Clocks The purpose of this patch is to implement the remaining valid clocks. The valid clocks are: dcefclk, fclk, mclk, pcie, sclk, socclk This functionality is needed for the 'setClocks' method. Change-Id: Ie648fb29dbbd61f0f064d4462ac566911f1ca2aa Signed-off-by: Ori Messinger [ROCm/amdsmi commit: 2d59d0877bab1ccca87aeb79f0400099d7f1d2be] --- .../amdsmi/python_smi_tools/rocmSmiLib_cli.py | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/projects/amdsmi/python_smi_tools/rocmSmiLib_cli.py b/projects/amdsmi/python_smi_tools/rocmSmiLib_cli.py index 8ef1c5d2e3..a329e257ed 100755 --- a/projects/amdsmi/python_smi_tools/rocmSmiLib_cli.py +++ b/projects/amdsmi/python_smi_tools/rocmSmiLib_cli.py @@ -47,6 +47,16 @@ deviceList = [] # Enable or disable serialized format OUTPUT_SERIALIZATION = False +# These are the valid clock types that can be returned/modified: +# TODO: "clk_type_names" from rsmiBindings.py should fetch valid clocks from +# the same location asrocm_smi_device.cc instead of hardcoding the values +validClockNames = clk_type_names[1:-2] +# The purpose of the [1:-2] here ^^^^ is to remove the duplicate elements at the +# beginning and end of the clk_type_names list (specifically sclk and mclk) +# Also the "invalid" clock in the list is removed since it isn't a valid clock type +validClockNames.append('pcie') +validClockNames.sort() + # Check for correct initialization value ret_init = rocmsmi.rsmi_init(0) if ret_init != 0: @@ -645,8 +655,6 @@ def setClocks(deviceList, clktype, clk): printLog(None, 'Invalid clock frequency', None) RETCODE = 1 return - validClockNames = ['mclk', 'pcie', 'sclk'] - # TODO: Implement DCEF/SOC/SYS/DF/MEM functionality for validClockNames if clktype not in validClockNames: printErrLog(device, 'Unable to set clock level') logging.error('Invalid clock type %s', clktype) @@ -684,7 +692,7 @@ def setClocks(deviceList, clktype, clk): printErrLog(device, 'Unable to set performance level to manual') RETCODE = 1 return - if clktype == 'mclk' or clktype == 'sclk': + if clktype != 'pcie': ret = rocmsmi.rsmi_dev_gpu_clk_freq_set(device, rsmi_clk_names_dict[clktype], freq_bitmask) if rsmi_ret_ok(ret, device): printLog(device, 'Successfully set %s bitmask to' % (clktype), str(bitmask)) @@ -1980,7 +1988,6 @@ def load(savefilepath, autoRespond): setClockOverDrive([device], 'sclk', values['overdrivesclk'], autoRespond) if values['overdrivemclk']: setClockOverDrive([device], 'mclk', values['overdrivemclk'], autoRespond) - validClockNames = ['mclk', 'pcie', 'sclk'] for clk in validClockNames: if clk in values['clocks']: setClocks([device], clk, values['clocks'][clk])