2.8.3-1
Optimization for Tree allreduce on A100. Improve aggregation performance. Use shared buffers for inter-node send/recv. Add NVTX profiling hooks. Accelerate alltoall connections by merging communication for all channels. Add support for one hop communication through NVLink, for faster send/recv communication on cubemesh topologies like DGX-1. Improve alltoall scheduling to better balance intra/inter node communication. Increase send/recv parallelism by 8x, each warp sending or receiving to a different peer. Net: move to v4. Net: make flush operation asynchronous to accelerate alltoall. Net: define maximum number of requests. Fix hang when using LL128 protocol after 2^31 steps. Fix #379 : topology injection failing when using less GPUs than described in the XML. Fix #394 : protocol mismatch causing hangs or crashes when using one GPU per node.
This commit is contained in:
@@ -1,5 +1,5 @@
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/*************************************************************************
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* Copyright (c) 2015-2019, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2015-2020, NVIDIA CORPORATION. All rights reserved.
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*
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* See LICENSE.txt for license information
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************************************************************************/
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@@ -16,6 +16,12 @@
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// Define min for ssize_t
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static __device__ int min(int a, ssize_t b) { return (a < b) ? a : b; }
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template <typename T>
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inline __device__ void loadPtr(void** ptr, T* &v) {
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asm volatile("ld.volatile.global.u64 %0, [%1];"
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: "=l"(v) : "l"(ptr));
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}
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typedef uint64_t PackType;
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// unpack x and y to elements of type T and apply FUNC to each element
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@@ -245,28 +251,57 @@ inline __device__ void Store128(Pack128* p, Pack128& v) {
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asm volatile("st.volatile.global.v2.u64 [%0], {%1,%2};" :: "l"(p), "l"(v.x), "l"(v.y) : "memory");
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}
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template<class FUNC, typename T, int MINSRCS, int MAXSRCS, int MINDSTS, int MAXDSTS>
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__device__ __forceinline__ void ReduceCopyMulti(const int tid, const int nthreads,
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int nsrcs, const T* srcs[MAXSRCS], int ndsts, T* dsts[MAXDSTS],
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const int offset, const int N) {
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for (int idx = offset+tid; idx < offset+N; idx += nthreads) {
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T val = vFetch(srcs[0]+idx);
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#pragma unroll
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for (int i=1; i<MINSRCS; i++) val = FUNC()(val, vFetch(srcs[i]+idx));
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#pragma unroll 1
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for (int i=MINSRCS; i<MAXSRCS && i<nsrcs; i++) val = FUNC()(val, vFetch(srcs[i]+idx));
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template<class FUNC, typename T, int UNROLL, int MINSRCS, int MAXSRCS, int MINDSTS, int MAXDSTS>
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__device__ __forceinline__ void ReduceCopyMulti(const int w, const int nw, const int t,
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int nsrcs, const T** s, int ndsts, T** d, const int elemOffset, const int Nelem) {
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const int inc = nw * UNROLL * WARP_SIZE;
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int offset = w * UNROLL * WARP_SIZE + t;
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const T* srcs[MAXSRCS];
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for (int i=0; i<MAXSRCS; i++) srcs[i] = s[i]+elemOffset+offset;
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T* dsts[MAXDSTS];
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for (int i=0; i<MAXDSTS; i++) dsts[i] = d[i]+elemOffset+offset;
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while (offset < Nelem) {
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T vals[UNROLL];
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// Load and reduce
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for (int u = 0; u < UNROLL; ++u) vals[u] = vFetch(srcs[0]+u*WARP_SIZE);
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#pragma unroll
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for (int i=0; i<MINDSTS; i++) vStore(dsts[i]+idx, val);
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#pragma unroll 1
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for (int i=MINDSTS; i<MAXDSTS && i<ndsts; i++) vStore(dsts[i]+idx, val);
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for (int i=1; i<MINSRCS; i++) {
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T vals2[UNROLL];
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for (int u = 0; u < UNROLL; ++u) vals2[u] = vFetch(srcs[i]+u*WARP_SIZE);
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for (int u = 0; u < UNROLL; ++u) vals[u] = FUNC()(vals[u], vals2[u]);
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}
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#pragma unroll
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for (int i=MINSRCS; i<MAXSRCS; i++) {
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if (i<nsrcs) {
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T vals2[UNROLL];
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for (int u = 0; u < UNROLL; ++u) vals2[u] = vFetch(srcs[i]+u*WARP_SIZE);
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for (int u = 0; u < UNROLL; ++u) vals[u] = FUNC()(vals[u], vals2[u]);
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}
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}
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// Store
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#pragma unroll
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for (int i = 0; i < MINDSTS; i++) {
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for (int u = 0; u < UNROLL; ++u) vStore(dsts[i]+u*WARP_SIZE, vals[u]);
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}
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#pragma unroll
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for (int i=MINDSTS; i<MAXDSTS; i++) {
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if (i<ndsts) {
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for (int u = 0; u < UNROLL; ++u) vStore(dsts[i]+u*WARP_SIZE, vals[u]);
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}
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}
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for (int i=0; i<MAXSRCS; i++) srcs[i] += inc;
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for (int i=0; i<MAXDSTS; i++) dsts[i] += inc;
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offset += inc;
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}
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}
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template<class FUNC, typename T, int UNROLL, int MINSRCS, int MAXSRCS, int MINDSTS, int MAXDSTS>
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__device__ __forceinline__ void ReduceCopy128bMulti( const int w, const int nw, const int t,
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int nsrcs, const T* s[MAXSRCS], int ndsts, T* d[MAXDSTS],
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const int elemOffset, const int Npack) {
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__device__ __forceinline__ void ReduceCopy128bMulti(const int w, const int nw, const int t,
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int nsrcs, const T** s, int ndsts, T** d, const int elemOffset, const int Npack) {
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const int inc = nw * UNROLL * WARP_SIZE;
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int offset = w * UNROLL * WARP_SIZE + t;
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@@ -280,25 +315,31 @@ __device__ __forceinline__ void ReduceCopy128bMulti( const int w, const int nw,
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// Load and reduce
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for (int u = 0; u < UNROLL; ++u) Fetch128(vals[u], srcs[0]+u*WARP_SIZE);
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#pragma unroll
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for (int i=1; i<MINSRCS; i++) {
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Pack128 vals2[UNROLL];
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for (int u = 0; u < UNROLL; ++u) Fetch128(vals2[u], srcs[i]+u*WARP_SIZE);
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for (int u = 0; u < UNROLL; ++u) MULTI128<FUNC, T>()(vals[u], vals2[u]);
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}
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#pragma unroll 1
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for (int i=MINSRCS; i<MAXSRCS && i<nsrcs; i++) {
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Pack128 vals2[UNROLL];
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for (int u = 0; u < UNROLL; ++u) Fetch128(vals2[u], srcs[i]+u*WARP_SIZE);
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for (int u = 0; u < UNROLL; ++u) MULTI128<FUNC, T>()(vals[u], vals2[u]);
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#pragma unroll
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for (int i=MINSRCS; i<MAXSRCS; i++) {
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if (i<nsrcs) {
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Pack128 vals2[UNROLL];
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for (int u = 0; u < UNROLL; ++u) Fetch128(vals2[u], srcs[i]+u*WARP_SIZE);
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for (int u = 0; u < UNROLL; ++u) MULTI128<FUNC, T>()(vals[u], vals2[u]);
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}
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}
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// Store
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#pragma unroll
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for (int i = 0; i < MINDSTS; i++) {
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for (int u = 0; u < UNROLL; ++u) Store128(dsts[i]+u*WARP_SIZE, vals[u]);
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}
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#pragma unroll 1
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for (int i=MINDSTS; i<MAXDSTS && i<ndsts; i++) {
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for (int u = 0; u < UNROLL; ++u) Store128(dsts[i]+u*WARP_SIZE, vals[u]);
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#pragma unroll
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for (int i=MINDSTS; i<MAXDSTS; i++) {
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if (i<ndsts) {
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for (int u = 0; u < UNROLL; ++u) Store128(dsts[i]+u*WARP_SIZE, vals[u]);
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}
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}
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for (int i=0; i<MAXSRCS; i++) srcs[i] += inc;
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for (int i=0; i<MAXDSTS; i++) dsts[i] += inc;
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@@ -309,72 +350,65 @@ __device__ __forceinline__ void ReduceCopy128bMulti( const int w, const int nw,
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template <typename T>
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__device__ int ptrAlign128(T* ptr) { return (uint64_t)ptr % alignof(Pack128); }
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// Try to limit consecutive load/stores to 8.
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// Use UNROLL 8 when we have a single source and a single destination, 4 otherwise
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#define AUTOUNROLL (UNROLL*(4/(MINDSTS+MINSRCS)))
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#define PACKELEMS (sizeof(Pack128) / sizeof(T))
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template<int UNROLL, class FUNC, typename T, int MINSRCS, int MAXSRCS, int MINDSTS, int MAXDSTS>
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__device__ __forceinline__ void ReduceOrCopyMulti(const int tid, const int nthreads,
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int nsrcs, const T* srcs[MAXSRCS], int ndsts, T* dsts[MAXDSTS],
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int nsrcs, const T** srcs, int ndsts, T** dsts,
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int N) {
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int Nrem = N;
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if (Nrem <= 0) return;
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int alignDiff = 0;
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int align = ptrAlign128(srcs[0]);
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#pragma unroll
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for (int i=1; i<MINSRCS; i++) alignDiff |= (align ^ ptrAlign128(srcs[i]));
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for (int i=MINSRCS; i<MAXSRCS && i<nsrcs; i++) alignDiff |= (align ^ ptrAlign128(srcs[i]));
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#pragma unroll
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for (int i=0; i<MINDSTS; i++) alignDiff |= (align ^ ptrAlign128(dsts[i]));
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for (int i=MINDSTS; i<MAXDSTS && i<ndsts; i++) alignDiff |= (align ^ ptrAlign128(dsts[i]));
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int Npreamble = alignDiff ? Nrem :
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N < alignof(Pack128) ? N :
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(alignof(Pack128) - align) % alignof(Pack128);
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// stage 1: preamble: handle any elements up to the point of everything coming
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// into alignment
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if (Npreamble) {
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ReduceCopyMulti<FUNC, T, MINSRCS, MAXSRCS, MINDSTS, MAXDSTS>(tid, nthreads, nsrcs, srcs, ndsts, dsts, 0, Npreamble);
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Nrem -= Npreamble;
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if (Nrem == 0) return;
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}
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int offset = Npreamble;
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// stage 2: fast path: use 128b loads/stores to do the bulk of the work,
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// assuming the pointers we have are all 128-bit alignable.
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int w = tid / WARP_SIZE; // Warp number
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int nw = nthreads / WARP_SIZE; // Number of warps
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int t = tid % WARP_SIZE; // Thread (inside the warp)
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const int packFactor = sizeof(Pack128) / sizeof(T);
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// Check that all is 16B aligned. If not don't use 16B load/stores.
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int align = 0;
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#pragma unroll
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for (int i=0; i<MINSRCS; i++) align |= ptrAlign128(srcs[i]);
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for (int i=MINSRCS; i<MAXSRCS && i<nsrcs; i++) align |= ptrAlign128(srcs[i]);
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#pragma unroll
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for (int i=0; i<MINDSTS; i++) align |= ptrAlign128(dsts[i]);
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for (int i=MINDSTS; i<MAXDSTS && i<ndsts; i++) align |= ptrAlign128(dsts[i]);
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// stage 2a: main loop
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int Npack2a = (Nrem / (packFactor * AUTOUNROLL * WARP_SIZE))
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* (AUTOUNROLL * WARP_SIZE); // round down
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int Nelem2a = Npack2a * packFactor;
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int offset = 0;
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if (align == 0) {
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// fast path: use 128b loads/stores to do the bulk of the work,
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// assuming the pointers we have are all 128-bit aligned.
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ReduceCopy128bMulti<FUNC, T, AUTOUNROLL, MINSRCS, MAXSRCS, MINDSTS, MAXDSTS>(w, nw, t, nsrcs, srcs, ndsts, dsts, offset, Npack2a);
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// main loop
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int Npack = (Nrem / (PACKELEMS*UNROLL*WARP_SIZE)) * (UNROLL*WARP_SIZE); // round down
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int Nelem = Npack * PACKELEMS;
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Nrem -= Nelem2a;
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ReduceCopy128bMulti<FUNC, T, UNROLL, MINSRCS, MAXSRCS, MINDSTS, MAXDSTS>(w, nw, t, nsrcs, srcs, ndsts, dsts, offset, Npack);
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Nrem -= Nelem;
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if (Nrem == 0) return;
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offset += Nelem;
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// slightly less optimized for section when we don't have full unrolling
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Npack = Nrem / PACKELEMS;
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Nelem = Npack * PACKELEMS;
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ReduceCopy128bMulti<FUNC, T, 1, MINSRCS, MAXSRCS, MINDSTS, MAXDSTS>(w, nw, t, nsrcs, srcs, ndsts, dsts, offset, Npack);
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Nrem -= Nelem;
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if (Nrem == 0) return;
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offset += Nelem;
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}
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// unrolled, by-type (mostly for unaligned buffers)
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int Nelem = (Nrem / (UNROLL*PACKELEMS/2*WARP_SIZE)) * (UNROLL*PACKELEMS/2*WARP_SIZE); // round down
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ReduceCopyMulti<FUNC, T, UNROLL*PACKELEMS/2, MINSRCS, MAXSRCS, MINDSTS, MAXDSTS>(w, nw, t, nsrcs, srcs, ndsts, dsts, offset, Nelem);
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Nrem -= Nelem;
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if (Nrem == 0) return;
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offset += Nelem2a;
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offset += Nelem;
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// stage 2b: slightly less optimized for section when we don't have full
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// unrolling
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int Npack2b = Nrem / packFactor;
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int Nelem2b = Npack2b * packFactor;
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ReduceCopy128bMulti<FUNC, T, 1, MINSRCS, MAXSRCS, MINDSTS, MAXDSTS>(w, nw, t, nsrcs, srcs, ndsts, dsts, offset, Npack2b);
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Nrem -= Nelem2b;
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if (Nrem == 0) return;
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offset += Nelem2b;
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// stage 2c: tail
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ReduceCopyMulti<FUNC, T, MINSRCS, MAXSRCS, MINDSTS, MAXDSTS>(tid, nthreads, nsrcs, srcs, ndsts, dsts, offset, Nrem);
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// no unroll, by type. Should finish what's remaining.
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ReduceCopyMulti<FUNC, T, 1, MINSRCS, MAXSRCS, MINDSTS, MAXDSTS>(w, nw, t, nsrcs, srcs, ndsts, dsts, offset, Nrem);
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}
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#endif // COMMON_KERNEL_H_
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