P4 to Git Change 1594574 by vsytchen@vsytchen-win10 on 2018/08/16 13:43:33

SWDEV-159881 - [OCL][ROCm] Add SVM coarse-grain buffer support with device memory (Part 2)

	1. Implement clEnqueueSvmMap/Unmap using a staging buffer
	2. Enable device memory coarse grain SVM for OCL only with single device contexts.

	ReviewBoardURL = http://ocltc.amd.com/reviews/r/15616/diff/

Affected files ...

... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/rocdevice.cpp#94 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/rocdevice.hpp#30 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/rocmemory.cpp#38 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/rocvirtual.cpp#63 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/rocvirtual.hpp#19 edit
... //depot/stg/opencl/drivers/opencl/runtime/utils/flags.hpp#296 edit


[ROCm/clr commit: 8dcc948d37]

projects/clr/rocclr/runtime/utils/flags.hpp

@@ -145,8 +145,8 @@ release(uint, HSA_SIGNAL_POOL_SIZE, 16,                                       \
         "Signal object pool size")                                            \
 release(bool, HSA_ENABLE_ATOMICS_32B, false,                                  \
         "1 = Enable SVM atomics in 32 bits (HSA backend-only). Any other value keeps then disabled.") \
-release(bool, HSA_ENABLE_COARSE_GRAIN_SVM, IS_HIP,                            \
-        "Enable device memory for coarse grain SVM allocations") \
+release(bool, HSA_ENABLE_COARSE_GRAIN_SVM, true,                              \
+        "Enable device memory for coarse grain SVM allocations")              \
 release(bool, GPU_IFH_MODE, false,                                            \
         "1 = Enable GPU IFH (infinitely fast hardware) mode. Any other value keeps setting disabled.") \
 release(bool, GPU_MIPMAP, true,                                               \