From 9fa2d39f4a05f6d194b5a2d32958d420cedd5801 Mon Sep 17 00:00:00 2001
From: colramos425 <colramos@amd.com>
Date: Mon, 12 Dec 2022 16:03:40 -0600
Subject: [PATCH] Using xml configs from rocprofiler

Signed-off-by: colramos425 <colramos@amd.com>
---
 src/omniperf                          |    2 -
 src/perfmon_pub/gfx906_metrics.xml    | 5248 ----------------------
 src/perfmon_pub/gfx908_metrics.xml    | 5731 -------------------------
 src/perfmon_pub/gfx90a_metrics.xml    | 5587 ------------------------
 src/perfmon_pub/gfx9_metrics.xml      | 5161 ----------------------
 src/perfmon_pub/metrics.xml           |  770 ----
 src/perfmon_pub/mi100/pmc_ta_perf.txt |   18 +-
 src/perfmon_pub/mi200/pmc_ta_perf.txt |   16 +-
 src/perfmon_pub/mi50/pmc_ta_perf.txt  |   18 +-
 9 files changed, 8 insertions(+), 22543 deletions(-)
 delete mode 100644 src/perfmon_pub/gfx906_metrics.xml
 delete mode 100644 src/perfmon_pub/gfx908_metrics.xml
 delete mode 100644 src/perfmon_pub/gfx90a_metrics.xml
 delete mode 100644 src/perfmon_pub/gfx9_metrics.xml
 delete mode 100644 src/perfmon_pub/metrics.xml

diff --git a/src/omniperf b/src/omniperf
index cbff84634b..f32b7abbb5 100755
--- a/src/omniperf
+++ b/src/omniperf
@@ -319,8 +319,6 @@ def run_prof(fname, workload_dir, perfmon_dir, cmd, verbose):
             rocprof_cmd,
             "-i",
             fname,
-            "-m",
-            perfmon_dir + "/" + "metrics.xml",
             "--timestamp",
             "on",
             "-o",
diff --git a/src/perfmon_pub/gfx906_metrics.xml b/src/perfmon_pub/gfx906_metrics.xml
deleted file mode 100644
index d12d950cf4..0000000000
--- a/src/perfmon_pub/gfx906_metrics.xml
+++ /dev/null
@@ -1,5248 +0,0 @@
-<gfx906>
-  # CPC counters
-  <metric
-    name="CPC_ALWAYS_COUNT" block=CPC event=0 descr="Always Count."
-  ></metric>
-  <metric
-    name="CPC_RCIU_STALL_WAIT_ON_FREE" block=CPC event=1 descr="RCIU Stall Waiting on Free."
-  ></metric>
-  <metric
-    name="CPC_RCIU_STALL_PRIV_VIOLATION" block=CPC event=2 descr="RCIU Stall on Priv violation."
-  ></metric>
-  <metric
-    name="CPC_MIU_STALL_ON_RDREQ_FREE" block=CPC event=3 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPC_MIU_STALL_ON_WRREQ_FREE" block=CPC event=4 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPC_TCIU_STALL_WAIT_ON_FREE" block=CPC event=5 descr="TCIU Stall waiting for free."
-  ></metric>
-  <metric
-    name="CPC_ME1_STALL_WAIT_ON_RCIU_READY" block=CPC event=6 descr="Me1 stall waiting on RCIU Ready."
-  ></metric>
-  <metric
-    name="CPC_ME1_STALL_WAIT_ON_RCIU_READY_PERF" block=CPC event=7 descr="Me1 stall waiting on RCIU Ready Perf."
-  ></metric>
-  <metric
-    name="CPC_ME1_STALL_WAIT_ON_RCIU_READ" block=CPC event=8 descr="Me1 stall waiting on RCIU read."
-  ></metric>
-  <metric
-    name="CPC_ME1_STALL_WAIT_ON_MIU_READ" block=CPC event=9 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPC_ME1_STALL_WAIT_ON_MIU_WRITE" block=CPC event=10 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPC_ME1_STALL_ON_DATA_FROM_ROQ" block=CPC event=11 descr="Me1 stall on data from roq."
-  ></metric>
-  <metric
-    name="CPC_ME1_STALL_ON_DATA_FROM_ROQ_PERF" block=CPC event=12 descr="Me1 stall on data from roq Perf."
-  ></metric>
-  <metric
-    name="CPC_ME1_BUSY_FOR_PACKET_DECODE" block=CPC event=13 descr="Me1 busy for packet decode."
-  ></metric>
-  <metric
-    name="CPC_ME2_STALL_WAIT_ON_RCIU_READY" block=CPC event=14 descr="Me2 stall waiting on RCIU Ready. (Valid Only if ME2 is available"
-  ></metric>
-  <metric
-    name="CPC_ME2_STALL_WAIT_ON_RCIU_READY_PERF" block=CPC event=15 descr="Me2 stall waiting on RCIU Ready Perf. (Valid Only if ME2 is available"
-  ></metric>
-  <metric
-    name="CPC_ME2_STALL_WAIT_ON_RCIU_READ" block=CPC event=16 descr="Me2 stall waiting on RCIU read. (Valid Only if ME2 is available"
-  ></metric>
-  <metric
-    name="CPC_ME2_STALL_WAIT_ON_MIU_READ" block=CPC event=17 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPC_ME2_STALL_WAIT_ON_MIU_WRITE" block=CPC event=18 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPC_ME2_STALL_ON_DATA_FROM_ROQ" block=CPC event=19 descr="Me2 stall on data from roq. (Valid Only if ME2 is available"
-  ></metric>
-  <metric
-    name="CPC_ME2_STALL_ON_DATA_FROM_ROQ_PERF" block=CPC event=20 descr="Me2 stall on data from roq Perf. (Valid Only if ME2 is available"
-  ></metric>
-  <metric
-    name="CPC_ME2_BUSY_FOR_PACKET_DECODE" block=CPC event=21 descr="Me2 busy for packet decode. (Valid Only if ME2 is available"
-  ></metric>
-  <metric
-    name="CPC_UTCL2IU_STALL_WAIT_ON_FREE" block=CPC event=22 descr="UTCL2IU is stalled waiting on credits from the UTCL2."
-  ></metric>
-  <metric
-    name="CPC_UTCL2IU_STALL_WAIT_ON_TAGS" block=CPC event=23 descr="UTCL2IU has used all available tags and is waiting on the UTCL2 to return them."
-  ></metric>
-  <metric
-    name="CPC_UTCL1_STALL_ON_TRANSLATION" block=CPC event=24 descr="One of the UTCL1s is stalled waiting on translation, XNACK or PENDING response."
-  ></metric>
-  <metric
-    name="CPC_CPC_STAT_BUSY" block=CPC event=25 descr="CPC Busy."
-  ></metric>
-  <metric
-    name="CPC_CPC_STAT_IDLE" block=CPC event=26 descr="CPC Idle."
-  ></metric>
-  <metric
-    name="CPC_CPC_STAT_STALL" block=CPC event=27 descr="CPC Stalled."
-  ></metric>
-  <metric
-    name="CPC_CPC_TCIU_BUSY" block=CPC event=28 descr="CPC TCIU interface Busy."
-  ></metric>
-  <metric
-    name="CPC_CPC_TCIU_IDLE" block=CPC event=29 descr="CPC TCIU interface Idle."
-  ></metric>
-  <metric
-    name="CPC_CPC_UTCL2IU_BUSY" block=CPC event=30 descr="CPC UTCL2 interface Busy."
-  ></metric>
-  <metric
-    name="CPC_CPC_UTCL2IU_IDLE" block=CPC event=31 descr="CPC UTCL2 interface Idle."
-  ></metric>
-  <metric
-    name="CPC_CPC_UTCL2IU_STALL" block=CPC event=32 descr="CPC UTCL2 interface Stalled waiting on Free, Tags or Translation."
-  ></metric>
-  <metric
-    name="CPC_ME1_DC0_SPI_BUSY" block=CPC event=33 descr="CPC Me1 Processor Busy."
-  ></metric>
-  <metric
-    name="CPC_ME2_DC1_SPI_BUSY" block=CPC event=34 descr="CPC Me2 Processor Busy. (Valid Only if ME2 is available)"
-  ></metric>
-  # CPF counters
-  <metric
-    name="CPF_ALWAYS_COUNT" block=CPF event=0 descr="Always Count."
-  ></metric>
-  <metric
-    name="CPF_MIU_STALLED_WAITING_RDREQ_FREE" block=CPF event=1 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPF_TCIU_STALLED_WAITING_ON_FREE" block=CPF event=2 descr="CPF TCIU stalled waiting on Free."
-  ></metric>
-  <metric
-    name="CPF_TCIU_STALLED_WAITING_ON_TAGS" block=CPF event=3 descr="CPF TCIU stalled waiting on tags."
-  ></metric>
-  <metric
-    name="CPF_CSF_BUSY_FOR_FETCHING_RING" block=CPF event=4 descr="CSF busy for fetching Ring data."
-  ></metric>
-  <metric
-    name="CPF_CSF_BUSY_FOR_FETCHING_IB1" block=CPF event=5 descr="CSF busy for fetching Indirect buffer 1."
-  ></metric>
-  <metric
-    name="CPF_CSF_BUSY_FOR_FETCHING_IB2" block=CPF event=6 descr="CSF busy for fetching Indirect buffer 2."
-  ></metric>
-  <metric
-    name="CPF_CSF_BUSY_FOR_FECTHINC_STATE" block=CPF event=7 descr="CSF busy for fetching state data."
-  ></metric>
-  <metric
-    name="CPF_MIU_BUSY_FOR_OUTSTANDING_TAGS" block=CPF event=8 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPF_CSF_RTS_MIU_NOT_RTR" block=CPF event=9 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPF_CSF_STATE_FIFO_NOT_RTR" block=CPF event=10 descr="CSF state fifo no RTR."
-  ></metric>
-  <metric
-    name="CPF_CSF_FETCHING_CMD_BUFFERS" block=CPF event=11 descr="CSF is fetching command buffers."
-  ></metric>
-  <metric
-    name="CPF_GRBM_DWORDS_SENT" block=CPF event=12 descr="CPF to GRBM 4 Dwords sent."
-  ></metric>
-  <metric
-    name="CPF_DYNAMIC_CLOCK_VALID" block=CPF event=13 descr="CPF Dynamic clock is valid."
-  ></metric>
-  <metric
-    name="CPF_REGISTER_CLOCK_VALID" block=CPF event=14 descr="CPF register clock is valid."
-  ></metric>
-  <metric
-    name="CPF_MIU_WRITE_REQUEST_SEND" block=CPF event=15 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPF_MIU_READ_REQUEST_SEND" block=CPF event=16 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPF_UTCL2IU_STALL_WAIT_ON_FREE" block=CPF event=17 descr="UTCL2IU is stalled waiting on credits from the UTCL2."
-  ></metric>
-  <metric
-    name="CPF_UTCL2IU_STALL_WAIT_ON_TAGS" block=CPF event=18 descr="UTCL2IU has used all available tags and is waiting on the UTCL2 to return them."
-  ></metric>
-  <metric
-    name="CPF_GFX_UTCL1_STALL_ON_TRANSLATION" block=CPF event=19 descr="One of the Graphics UTCL1s is stalled waiting on translation, XNACK or PENDING response."
-  ></metric>
-  <metric
-    name="CPF_CMP_UTCL1_STALL_ON_TRANSLATION" block=CPF event=20 descr="One of the Compute UTCL1s is stalled waiting on translation, XNACK or PENDING response."
-  ></metric>
-  <metric
-    name="CPF_RCIU_STALL_WAIT_ON_FREE" block=CPF event=21 descr="CPF RCIU is stalled waiting on credits from GRBM."
-  ></metric>
-  <metric
-    name="CPF_TCIU_READ_REQUEST_SENT" block=CPF event=22 descr="Count of TC read requests"
-  ></metric>
-  <metric
-    name="CPF_CPF_STAT_BUSY" block=CPF event=23 descr="CPF Busy."
-  ></metric>
-  <metric
-    name="CPF_CPF_STAT_IDLE" block=CPF event=24 descr="CPF Idle."
-  ></metric>
-  <metric
-    name="CPF_CPF_STAT_STALL" block=CPF event=25 descr="CPF Stalled."
-  ></metric>
-  <metric
-    name="CPF_CPF_TCIU_BUSY" block=CPF event=26 descr="CPF TCIU interface Busy."
-  ></metric>
-  <metric
-    name="CPF_CPF_TCIU_IDLE" block=CPF event=27 descr="CPF TCIU interface Idle."
-  ></metric>
-  <metric
-    name="CPF_CPF_TCIU_STALL" block=CPF event=28 descr="CPF TCIU interface Stalled waiting on Free, Tags."
-  ></metric>
-  <metric
-    name="CPF_CPF_UTCL2IU_BUSY" block=CPF event=29 descr="CPF UTCL2 interface Busy."
-  ></metric>
-  <metric
-    name="CPF_CPF_UTCL2IU_IDLE" block=CPF event=30 descr="CPF UTCL2 interface Idle."
-  ></metric>
-  <metric
-    name="CPF_CPF_UTCL2IU_STALL" block=CPF event=31 descr="CPF UTCL2 interface Stalled waiting on Free, Tags."
-  ></metric>
-  # GDS counters
-  <metric
-    name="GDS_DS_ADDR_CONFL" block=GDS event=0 descr="Number of conflicting addresses in DS memory"
-  ></metric>
-  <metric
-    name="GDS_DS_BANK_CONFL" block=GDS event=1 descr="Number of conflicting banks in DS memory"
-  ></metric>
-  <metric
-    name="GDS_WBUF_FLUSH" block=GDS event=2 descr="Number of times the RBIU write buffer is flushed"
-  ></metric>
-  <metric
-    name="GDS_WR_COMP" block=GDS event=3 descr="Number of times a WRITE_COMPLETE is put in write buffer"
-  ></metric>
-  <metric
-    name="GDS_WBUF_WR" block=GDS event=4 descr="Number of times the RBIU writes to buffer"
-  ></metric>
-  <metric
-    name="GDS_RBUF_HIT" block=GDS event=5 descr="Number of times an RBIU read hits in the buffer"
-  ></metric>
-  <metric
-    name="GDS_RBUF_MISS" block=GDS event=6 descr="Number of times an RBIU read misses the buffer"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_NORET" block=GDS event=7 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_RET" block=GDS event=8 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_ORD_CNT" block=GDS event=9 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_2COMP_REQ" block=GDS event=10 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_ORD_WAVE_VALID" block=GDS event=11 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_GDS_DATA_VALID" block=GDS event=12 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_GDS_STALL_BY_ORD" block=GDS event=13 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_GDS_WR_OP" block=GDS event=14 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_GDS_RD_OP" block=GDS event=15 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_GDS_ATOM_OP" block=GDS event=16 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_GDS_REL_OP" block=GDS event=17 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_GDS_CMPXCH_OP" block=GDS event=18 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_GDS_BYTE_OP" block=GDS event=19 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_GDS_SHORT_OP" block=GDS event=20 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_NORET" block=GDS event=21 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_RET" block=GDS event=22 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_ORD_CNT" block=GDS event=23 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_2COMP_REQ" block=GDS event=24 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_ORD_WAVE_VALID" block=GDS event=25 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_GDS_DATA_VALID" block=GDS event=26 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_GDS_STALL_BY_ORD" block=GDS event=27 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_GDS_WR_OP" block=GDS event=28 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_GDS_RD_OP" block=GDS event=29 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_GDS_ATOM_OP" block=GDS event=30 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_GDS_REL_OP" block=GDS event=31 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_GDS_CMPXCH_OP" block=GDS event=32 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_GDS_BYTE_OP" block=GDS event=33 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_GDS_SHORT_OP" block=GDS event=34 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_NORET" block=GDS event=35 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_RET" block=GDS event=36 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_ORD_CNT" block=GDS event=37 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_2COMP_REQ" block=GDS event=38 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_ORD_WAVE_VALID" block=GDS event=39 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_GDS_DATA_VALID" block=GDS event=40 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_GDS_STALL_BY_ORD" block=GDS event=41 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_GDS_WR_OP" block=GDS event=42 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_GDS_RD_OP" block=GDS event=43 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_GDS_ATOM_OP" block=GDS event=44 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_GDS_REL_OP" block=GDS event=45 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_GDS_CMPXCH_OP" block=GDS event=46 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_GDS_BYTE_OP" block=GDS event=47 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_GDS_SHORT_OP" block=GDS event=48 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_NORET" block=GDS event=49 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_RET" block=GDS event=50 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_ORD_CNT" block=GDS event=51 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_2COMP_REQ" block=GDS event=52 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_ORD_WAVE_VALID" block=GDS event=53 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_GDS_DATA_VALID" block=GDS event=54 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_GDS_STALL_BY_ORD" block=GDS event=55 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_GDS_WR_OP" block=GDS event=56 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_GDS_RD_OP" block=GDS event=57 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_GDS_ATOM_OP" block=GDS event=58 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_GDS_REL_OP" block=GDS event=59 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_GDS_CMPXCH_OP" block=GDS event=60 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_GDS_BYTE_OP" block=GDS event=61 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_GDS_SHORT_OP" block=GDS event=62 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_NORET" block=GDS event=63 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_RET" block=GDS event=64 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_ORD_CNT" block=GDS event=65 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_2COMP_REQ" block=GDS event=66 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_ORD_WAVE_VALID" block=GDS event=67 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_GDS_DATA_VALID" block=GDS event=68 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_GDS_STALL_BY_ORD" block=GDS event=69 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_GDS_WR_OP" block=GDS event=70 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_GDS_RD_OP" block=GDS event=71 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_GDS_ATOM_OP" block=GDS event=72 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_GDS_REL_OP" block=GDS event=73 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_GDS_CMPXCH_OP" block=GDS event=74 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_GDS_BYTE_OP" block=GDS event=75 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_GDS_SHORT_OP" block=GDS event=76 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_NORET" block=GDS event=77 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_RET" block=GDS event=78 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_ORD_CNT" block=GDS event=79 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_2COMP_REQ" block=GDS event=80 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_ORD_WAVE_VALID" block=GDS event=81 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_GDS_DATA_VALID" block=GDS event=82 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_GDS_STALL_BY_ORD" block=GDS event=83 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_GDS_WR_OP" block=GDS event=84 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_GDS_RD_OP" block=GDS event=85 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_GDS_ATOM_OP" block=GDS event=86 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_GDS_REL_OP" block=GDS event=87 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_GDS_CMPXCH_OP" block=GDS event=88 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_GDS_BYTE_OP" block=GDS event=89 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_GDS_SHORT_OP" block=GDS event=90 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_NORET" block=GDS event=91 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_RET" block=GDS event=92 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_ORD_CNT" block=GDS event=93 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_2COMP_REQ" block=GDS event=94 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_ORD_WAVE_VALID" block=GDS event=95 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_GDS_DATA_VALID" block=GDS event=96 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_GDS_STALL_BY_ORD" block=GDS event=97 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_GDS_WR_OP" block=GDS event=98 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_GDS_RD_OP" block=GDS event=99 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_GDS_ATOM_OP" block=GDS event=100 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_GDS_REL_OP" block=GDS event=101 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_GDS_CMPXCH_OP" block=GDS event=102 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_GDS_BYTE_OP" block=GDS event=103 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_GDS_SHORT_OP" block=GDS event=104 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_NORET" block=GDS event=105 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_RET" block=GDS event=106 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_ORD_CNT" block=GDS event=107 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_2COMP_REQ" block=GDS event=108 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_ORD_WAVE_VALID" block=GDS event=109 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_GDS_DATA_VALID" block=GDS event=110 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_GDS_STALL_BY_ORD" block=GDS event=111 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_GDS_WR_OP" block=GDS event=112 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_GDS_RD_OP" block=GDS event=113 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_GDS_ATOM_OP" block=GDS event=114 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_GDS_REL_OP" block=GDS event=115 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_GDS_CMPXCH_OP" block=GDS event=116 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_GDS_BYTE_OP" block=GDS event=117 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_GDS_SHORT_OP" block=GDS event=118 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_GWS_RELEASED" block=GDS event=119 descr="Number of waves released by GWS"
-  ></metric>
-  <metric
-    name="GDS_GWS_BYPASS" block=GDS event=120 descr="Number of waves bypassed by GWS"
-  ></metric>
-  # GRBM counters
-  <metric
-    name="GRBM_COUNT" block=GRBM event=0 descr="Tie High - Count Number of Clocks"
-  ></metric>
-  <metric
-    name="GRBM_USER_DEFINED" block=GRBM event=1 descr="User defined performance select."
-  ></metric>
-  <metric
-    name="GRBM_GUI_ACTIVE" block=GRBM event=2 descr="The GUI is Active"
-  ></metric>
-  <metric
-    name="GRBM_CP_BUSY" block=GRBM event=3 descr="Any of the Command Processor (CPG/CPC/CPF) blocks are busy."
-  ></metric>
-  <metric
-    name="GRBM_CP_COHER_BUSY" block=GRBM event=4 descr="The Command Processor Graphics (CPG) Surface Coherency Logic is busy."
-  ></metric>
-  <metric
-    name="GRBM_CP_DMA_BUSY" block=GRBM event=5 descr="The Command Processor Graphics (CPG) DMA Logic is busy."
-  ></metric>
-  <metric
-    name="GRBM_CB_BUSY" block=GRBM event=6 descr="Any of the Color Blocks (CB) are busy in the shader engine(s)."
-  ></metric>
-  <metric
-    name="GRBM_DB_BUSY" block=GRBM event=7 descr="Any of the Depth Blocks (DB) are busy in the shader engine(s)."
-  ></metric>
-  <metric
-    name="GRBM_PA_BUSY" block=GRBM event=8 descr="Any of the Primitive Assembly Blocks (PA) are busy in the shader engine(s)."
-  ></metric>
-  <metric
-    name="GRBM_SC_BUSY" block=GRBM event=9 descr="Any of the Scan Converter Blocks (SC) are busy in the shader engine(s)."
-  ></metric>
-  <metric
-    name="GRBM_RESERVED_6" block=GRBM event=10 descr="Reserved to maintain backwards compatibility."
-  ></metric>
-  <metric
-    name="GRBM_SPI_BUSY" block=GRBM event=11 descr="Any of the Shader Pipe Interpolators (SPI) are busy in the shader engine(s)."
-  ></metric>
-  <metric
-    name="GRBM_SX_BUSY" block=GRBM event=12 descr="Any of the Shader Export Blocks (SX) are busy."
-  ></metric>
-  <metric
-    name="GRBM_TA_BUSY" block=GRBM event=13 descr="Any of the Texture Pipes (TA) are busy in the shader engine(s)."
-  ></metric>
-  <metric
-    name="GRBM_CB_CLEAN" block=GRBM event=14 descr="Any of the Color Blocks (CB) are not clean in all shader engine(s)."
-  ></metric>
-  <metric
-    name="GRBM_DB_CLEAN" block=GRBM event=15 descr="Any of the Depth Blocks (DB) are not clean in all shader engine(s)."
-  ></metric>
-  <metric
-    name="GRBM_RESERVED_5" block=GRBM event=16 descr="Reserved to maintain backwards compatibility."
-  ></metric>
-  <metric
-    name="GRBM_VGT_BUSY" block=GRBM event=17 descr="Any of the Vertex Geometry Tessellator Blocks (VGT) are busy in the shader engine(s)."
-  ></metric>
-  <metric
-    name="GRBM_RESERVED_4" block=GRBM event=18 descr="Reserved to maintain backwards compatibility."
-  ></metric>
-  <metric
-    name="GRBM_RESERVED_3" block=GRBM event=19 descr="Reserved to maintain backwards compatibility."
-  ></metric>
-  <metric
-    name="GRBM_RESERVED_2" block=GRBM event=20 descr="Reserved to maintain backwards compatibility."
-  ></metric>
-  <metric
-    name="GRBM_RESERVED_1" block=GRBM event=21 descr="Reserved to maintain backwards compatibility."
-  ></metric>
-  <metric
-    name="GRBM_RESERVED_0" block=GRBM event=22 descr="Reserved to maintain backwards compatibility."
-  ></metric>
-  <metric
-    name="GRBM_IA_BUSY" block=GRBM event=23 descr="The Input Assembler (IA) is busy."
-  ></metric>
-  <metric
-    name="GRBM_IA_NO_DMA_BUSY" block=GRBM event=24 descr="The Input Assembler (IA) is busy; Does not include the Index DMA engine status."
-  ></metric>
-  <metric
-    name="GRBM_GDS_BUSY" block=GRBM event=25 descr="The Global Data Share (GDS) is busy."
-  ></metric>
-  <metric
-    name="GRBM_BCI_BUSY" block=GRBM event=26 descr="Any of the Barycentric Interpolators (BCI) are busy in the shader engine(s)."
-  ></metric>
-  <metric
-    name="GRBM_RLC_BUSY" block=GRBM event=27 descr="The Ring List Controller (RLC) is busy."
-  ></metric>
-  <metric
-    name="GRBM_TC_BUSY" block=GRBM event=28 descr="Any of the Texture Cache Blocks (TCP/TCI/TCA/TCC) are busy."
-  ></metric>
-  <metric
-    name="GRBM_CPG_BUSY" block=GRBM event=29 descr="The Command Processor Graphics (CPG) is busy."
-  ></metric>
-  <metric
-    name="GRBM_CPC_BUSY" block=GRBM event=30 descr="The Command Processor Compute (CPC) is busy."
-  ></metric>
-  <metric
-    name="GRBM_CPF_BUSY" block=GRBM event=31 descr="The Command Processor Fetchers (CPF) is busy."
-  ></metric>
-  <metric
-    name="GRBM_WD_BUSY" block=GRBM event=32 descr="The Work Distributor (WD) is busy."
-  ></metric>
-  <metric
-    name="GRBM_WD_NO_DMA_BUSY" block=GRBM event=33 descr="The Work Distributor (WD) is busy; Does not include the Index DMA engine status."
-  ></metric>
-  <metric
-    name="GRBM_UTCL2_BUSY" block=GRBM event=34 descr="The Unified Translation Cache Level-2 (UTCL2) block is busy."
-  ></metric>
-  <metric
-    name="GRBM_EA_BUSY" block=GRBM event=35 descr="The Efficiency Arbiter (EA) block is busy."
-  ></metric>
-  <metric
-    name="GRBM_RMI_BUSY" block=GRBM event=36 descr="The Render Backend Memory Interface (RMI) block is busy."
-  ></metric>
-  <metric
-    name="GRBM_CPAXI_BUSY" block=GRBM event=37 descr="The CPAXI block is busy."
-  ></metric>
-  # SPI counters
-  <metric
-    name="SPI_VS_WINDOW_VALID" block=SPI event=0 descr="Clock count enabled by perfcounter_start event."
-  ></metric>
-  <metric
-    name="SPI_VS_BUSY" block=SPI event=1 descr="Number of clocks with outstanding waves (SPI or SH)."
-  ></metric>
-  <metric
-    name="SPI_VS_FIRST_WAVE" block=SPI event=2 descr="Number of VS_IS_DS first waves"
-  ></metric>
-  <metric
-    name="SPI_VS_LAST_WAVE" block=SPI event=3 descr="Number of VS_IS_DS last waves."
-  ></metric>
-  <metric
-    name="SPI_VS_LSHS_DEALLOC" block=SPI event=4 descr="Number of VS_IS_DS lds dealloc waves."
-  ></metric>
-  <metric
-    name="SPI_VS_PC_STALL" block=SPI event=5 descr="Number of clocks stalled due to pc space."
-  ></metric>
-  <metric
-    name="SPI_VS_POS0_STALL" block=SPI event=6 descr="Number of clocks stalled due to pos buf space in SH0."
-  ></metric>
-  <metric
-    name="SPI_VS_POS1_STALL" block=SPI event=7 descr="Number of clocks stalled due to pos buf space in SH1."
-  ></metric>
-  <metric
-    name="SPI_VS_CRAWLER_STALL" block=SPI event=8 descr="Number of clocks event/wave order fifo is full."
-  ></metric>
-  <metric
-    name="SPI_VS_EVENT_WAVE" block=SPI event=9 descr="Number of events and waves."
-  ></metric>
-  <metric
-    name="SPI_VS_WAVE" block=SPI event=10 descr="Number of waves"
-  ></metric>
-  <metric
-    name="SPI_VS_PERS_UPD_FULL0" block=SPI event=11 descr="Number of clks VS persistent state update fifo0 is full."
-  ></metric>
-  <metric
-    name="SPI_VS_PERS_UPD_FULL1" block=SPI event=12 descr="Number of clks VS persistent state update fifo1 is full."
-  ></metric>
-  <metric
-    name="SPI_VS_LATE_ALLOC_FULL" block=SPI event=13 descr="Number of clks VS late alloc fifo is full."
-  ></metric>
-  <metric
-    name="SPI_VS_FIRST_SUBGRP" block=SPI event=14 descr="Number of first of subgroup waves."
-  ></metric>
-  <metric
-    name="SPI_VS_LAST_SUBGRP" block=SPI event=15 descr="Number of last of subgroup waves."
-  ></metric>
-  <metric
-    name="SPI_VS_ALLOC_CNT" block=SPI event=16 descr="Number of launched VS waves that rasterize (alloc export space)"
-  ></metric>
-  <metric
-    name="SPI_VS_PC_ALLOC_CNT" block=SPI event=17 descr="Number of parameter cache lines allocated"
-  ></metric>
-  <metric
-    name="SPI_VS_LATE_ALLOC_ACCUM" block=SPI event=18 descr="Accumulation of number of VS waves pending export allocation"
-  ></metric>
-  <metric
-    name="SPI_GS_WINDOW_VALID" block=SPI event=19 descr="Clock count enabled by perfcounter_start event."
-  ></metric>
-  <metric
-    name="SPI_GS_BUSY" block=SPI event=20 descr="Number of clocks with outstanding waves (SPI or SH)."
-  ></metric>
-  <metric
-    name="SPI_GS_CRAWLER_STALL" block=SPI event=21 descr="Number of clocks event/wave order fifo is full."
-  ></metric>
-  <metric
-    name="SPI_GS_EVENT_WAVE" block=SPI event=22 descr="Number of events and waves"
-  ></metric>
-  <metric
-    name="SPI_GS_WAVE" block=SPI event=23 descr="Number of waves."
-  ></metric>
-  <metric
-    name="SPI_GS_PERS_UPD_FULL0" block=SPI event=24 descr="Number of clks GS persistent state update fifo0 is full."
-  ></metric>
-  <metric
-    name="SPI_GS_PERS_UPD_FULL1" block=SPI event=25 descr="Number of clks GS persistent state update fifo1 is full."
-  ></metric>
-  <metric
-    name="SPI_GS_FIRST_SUBGRP" block=SPI event=26 descr="Number of first of subgroup waves."
-  ></metric>
-  <metric
-    name="SPI_GS_LAST_SUBGRP" block=SPI event=27 descr="Number of last of subgroup waves."
-  ></metric>
-  <metric
-    name="SPI_GS_HS_DEALLOC" block=SPI event=28 descr="Number of offchip hs dealloc events read from crawler."
-  ></metric>
-  <metric
-    name="SPI_GS_NGG_SE_LATE_ALLOC_LIMIT" block=SPI event=29 descr="Number of clks this SE has reached allocation wave limit (can not launch more waves until pending ones allocate)."
-  ></metric>
-  <metric
-    name="SPI_GS_GRP_FIFO_FULL" block=SPI event=30 descr="GS Group FIFO full count"
-  ></metric>
-  <metric
-    name="SPI_HS_WINDOW_VALID" block=SPI event=31 descr="Clock count enabled by perfcounter_start event."
-  ></metric>
-  <metric
-    name="SPI_HS_BUSY" block=SPI event=32 descr="Number of clocks with outstanding waves (SPI or SH)."
-  ></metric>
-  <metric
-    name="SPI_HS_CRAWLER_STALL" block=SPI event=33 descr="Number of clocks event/wave order fifo is full."
-  ></metric>
-  <metric
-    name="SPI_HS_FIRST_WAVE" block=SPI event=34 descr="Number of first waves."
-  ></metric>
-  <metric
-    name="SPI_HS_LAST_WAVE" block=SPI event=35 descr="Number of last waves."
-  ></metric>
-  <metric
-    name="SPI_HS_OFFCHIP_LDS_STALL" block=SPI event=36 descr="Number of clks HS waits to allocate offchip LDS space."
-  ></metric>
-  <metric
-    name="SPI_HS_EVENT_WAVE" block=SPI event=37 descr="Number of events and waves."
-  ></metric>
-  <metric
-    name="SPI_HS_WAVE" block=SPI event=38 descr="Number of waves."
-  ></metric>
-  <metric
-    name="SPI_HS_PERS_UPD_FULL0" block=SPI event=39 descr="Number of clks HS persistent state update fifo0 is full."
-  ></metric>
-  <metric
-    name="SPI_HS_PERS_UPD_FULL1" block=SPI event=40 descr="Number of clks HS persistent state update fifo1 is full."
-  ></metric>
-  <metric
-    name="SPI_CSG_WINDOW_VALID" block=SPI event=41 descr="Clock count enabled by perfcounter_start event."
-  ></metric>
-  <metric
-    name="SPI_CSG_BUSY" block=SPI event=42 descr="Number of clocks with outstanding waves (SPI or SH)."
-  ></metric>
-  <metric
-    name="SPI_CSG_NUM_THREADGROUPS" block=SPI event=43 descr="Number of threadgroups launched"
-  ></metric>
-  <metric
-    name="SPI_CSG_CRAWLER_STALL" block=SPI event=44 descr="Number of clocks event/wave order fifo is full"
-  ></metric>
-  <metric
-    name="SPI_CSG_EVENT_WAVE" block=SPI event=45 descr="Number of events and waves"
-  ></metric>
-  <metric
-    name="SPI_CSG_WAVE" block=SPI event=46 descr="Number of waves"
-  ></metric>
-  <metric
-    name="SPI_CSN_WINDOW_VALID" block=SPI event=47 descr="Clock count enabled by perfcounter_start event. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSN_BUSY" block=SPI event=48 descr="Number of clocks with outstanding waves (SPI or SH). Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSN_NUM_THREADGROUPS" block=SPI event=49 descr="Number of threadgroups launched. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSN_CRAWLER_STALL" block=SPI event=50 descr="Number of clocks event/wave order fifo is full. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSN_EVENT_WAVE" block=SPI event=51 descr="Number of events and waves. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSN_WAVE" block=SPI event=52 descr="Number of waves. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_PS_WINDOW_VALID" block=SPI event=53 descr="Clock count enabled by perfcounter_start event. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_BUSY" block=SPI event=54 descr="Number of clocks with outstanding waves (SPI or SH), Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_ACTIVE" block=SPI event=55 descr="Number of clks ptr_buff is processing waves. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_DEALLOC_BIN0" block=SPI event=56 descr="Count deallocs for SE matching bin0 range. Uses a 17-bit increment so we can only use the 32-bit counters. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_FPOS_BIN1_STALL" block=SPI event=57 descr="Number of clks stalled waiting for a VS done from SE matching bin1. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_EVENT_WAVE" block=SPI event=58 descr="Number of events and waves, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_WAVE" block=SPI event=59 descr="Number of waves, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_OPT_WAVE" block=SPI event=60 descr="Number of waves with center+centroid+bc_optimize, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_PASS_BIN0" block=SPI event=61 descr="Count waves with bin0 pc reads / attr, range is 1-16. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_PASS_BIN1" block=SPI event=62 descr="Count waves with bin1 pc reads / attr, range is 1-16. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_FPOS_BIN2" block=SPI event=63 descr="Count fpos for SE matching bin2 range, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_PRIM_BIN0" block=SPI event=64 descr="Count waves with bin0 prims, range is 1-16. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_PRIM_BIN1" block=SPI event=65 descr="Count waves with bin1 prims, range is 1-16. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_CNF_BIN2" block=SPI event=66 descr="Count waves with bin2 conflicts, range is 0-15 but max is 8. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_CNF_BIN3" block=SPI event=67 descr="Count waves with bin3 conflicts, range is 0-15 but max is 8. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_CRAWLER_STALL" block=SPI event=68 descr="Number of clocks event/wave order fifo is full, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_LDS_RES_FULL" block=SPI event=69 descr="Number of clks PS per-wavefront storage is full, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_PERS_UPD_FULL0" block=SPI event=70 descr="Number of clks PS persistent state update fifo0 is full, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_PERS_UPD_FULL1" block=SPI event=71 descr="Number of clks PS persistent state update fifo1 is full, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_POPS_WAVE_SENT" block=SPI event=72 descr="Number of PS POPS Waves that were issued by the PS wave controller, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_POPS_WAVE_EXIT" block=SPI event=73 descr="Number of POPS Enabled PS waves that exit the PS crawler, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_LDS0_PC_VALID" block=SPI event=74 descr="Number of param cache reads sent to PC from SH0."
-  ></metric>
-  <metric
-    name="SPI_LDS1_PC_VALID" block=SPI event=75 descr="Number of param cache reads sent to PC from SH1."
-  ></metric>
-  <metric
-    name="SPI_RA_PIPE_REQ_BIN2" block=SPI event=76 descr="Arb cycles with bin2 mqcs pipe_arb req =sum(csprobe0, csproben), Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_TASK_REQ_BIN3" block=SPI event=77 descr="Arb cycles with bin3 requests =sum(mqcs0, mqcsn) + dxcs +sum(gfx), Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_WR_CTL_FULL" block=SPI event=78 descr="Arb cycles where RA is stalled due to wave launch fifo_full. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_REQ_NO_ALLOC" block=SPI event=79 descr="Arb cycles with requests but no allocation. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_REQ_NO_ALLOC_PS" block=SPI event=80 descr="Arb cycles with PS req and no PS alloc. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is from RA0 and PS0, DEBUG_SH_SEL =1, source is from RA0 and PS1."
-  ></metric>
-  <metric
-    name="SPI_RA_REQ_NO_ALLOC_VS" block=SPI event=81 descr="Arb cycles with VS req and no VS alloc. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_REQ_NO_ALLOC_GS" block=SPI event=82 descr="Arb cycles with GS req and no GS alloc. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_REQ_NO_ALLOC_HS" block=SPI event=83 descr="Arb cycles with HS req and no HS alloc. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_REQ_NO_ALLOC_CSG" block=SPI event=84 descr="Arb cycles with CSg req and no CSg alloc. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_REQ_NO_ALLOC_CSN" block=SPI event=85 descr="Arb cycles with CSn req and no CSn alloc. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_RES_STALL_PS" block=SPI event=86 descr="Arb cycles with PS req and no PS fits. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is from RA0 and PS0, DEBUG_SH_SEL =1, source is from RA0 and PS1."
-  ></metric>
-  <metric
-    name="SPI_RA_RES_STALL_VS" block=SPI event=87 descr="Arb cycles with VS req and no VS fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_RES_STALL_GS" block=SPI event=88 descr="Arb cycles with GS req and no GS fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_RES_STALL_HS" block=SPI event=89 descr="Arb cycles with HS req and no HS fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_RES_STALL_CSG" block=SPI event=90 descr="Arb cycles with CSg req and no CSg fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_RES_STALL_CSN" block=SPI event=91 descr="Arb cycles with CSn req and no CSn fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_TMP_STALL_PS" block=SPI event=92 descr="Cycles where ps wants to req but does not fit in temp space. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_TMP_STALL_VS" block=SPI event=93 descr="Cycles where vs wants to req but does not fit in temp space."
-  ></metric>
-  <metric
-    name="SPI_RA_TMP_STALL_GS" block=SPI event=94 descr="Cycles where gs wants to req but does not fit in temp space."
-  ></metric>
-  <metric
-    name="SPI_RA_TMP_STALL_HS" block=SPI event=95 descr="Cycles where hs wants to req but does not fit in temp space."
-  ></metric>
-  <metric
-    name="SPI_RA_TMP_STALL_CSG" block=SPI event=96 descr="Cycles where csg wants to req but does not fit in temp space."
-  ></metric>
-  <metric
-    name="SPI_RA_TMP_STALL_CSN" block=SPI event=97 descr="Cycles where csn wants to req but does not fit in temp space."
-  ></metric>
-  <metric
-    name="SPI_RA_WAVE_SIMD_FULL_PS" block=SPI event=98 descr="Sum of SIMD where WAVE resource full when !ps_fits. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is from RA0 and PS0, DEBUG_SH_SEL =1, source is from RA0 and PS1."
-  ></metric>
-  <metric
-    name="SPI_RA_WAVE_SIMD_FULL_VS" block=SPI event=99 descr="Sum of SIMD where WAVE resource full when !vs_fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_WAVE_SIMD_FULL_GS" block=SPI event=100 descr="Sum of SIMD where WAVE resource full when !gs_fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_WAVE_SIMD_FULL_HS" block=SPI event=101 descr="Sum of SIMD where WAVE can't take hs wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_WAVE_SIMD_FULL_CSG" block=SPI event=102 descr="Sum of SIMD where WAVE can't take csg wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_WAVE_SIMD_FULL_CSN" block=SPI event=103 descr="Sum of SIMD where WAVE can't take csn wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_VGPR_SIMD_FULL_PS" block=SPI event=104 descr="Sum of SIMD where VGPR can't take ps wave when !fits. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is from RA0 and PS0, DEBUG_SH_SEL =1, source is from RA0 and PS1."
-  ></metric>
-  <metric
-    name="SPI_RA_VGPR_SIMD_FULL_VS" block=SPI event=105 descr="Sum of SIMD where VGPR can't take vs wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_VGPR_SIMD_FULL_GS" block=SPI event=106 descr="Sum of SIMD where VGPR can't take gs wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_VGPR_SIMD_FULL_HS" block=SPI event=107 descr="Sum of SIMD where VGPR can't take hs wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_VGPR_SIMD_FULL_CSG" block=SPI event=108 descr="Sum of SIMD where VGPR can't take csg wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_VGPR_SIMD_FULL_CSN" block=SPI event=109 descr="Sum of SIMD where VGPR can't take csn wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_SGPR_SIMD_FULL_PS" block=SPI event=110 descr="Sum of SIMD where SGPR can't take ps wave when !fits. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is from RA0 and PS0, DEBUG_SH_SEL =1, source is from RA0 and PS1."
-  ></metric>
-  <metric
-    name="SPI_RA_SGPR_SIMD_FULL_VS" block=SPI event=111 descr="Sum of SIMD where SGPR can't take vs wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_SGPR_SIMD_FULL_GS" block=SPI event=112 descr="Sum of SIMD where SGPR can't take gs wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_SGPR_SIMD_FULL_HS" block=SPI event=113 descr="Sum of SIMD where SGPR can't take hs wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_SGPR_SIMD_FULL_CSG" block=SPI event=114 descr="Sum of SIMD where SGPR can't take csg wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_SGPR_SIMD_FULL_CSN" block=SPI event=115 descr="Sum of SIMD where SGPR can't take csn wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_LDS_CU_FULL_PS" block=SPI event=116 descr="Sum of CU where LDS can't take ps wave when !fits. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is from RA0 and PS0, DEBUG_SH_SEL =1, source is from RA0 and PS1."
-  ></metric>
-  <metric
-    name="SPI_RA_LDS_CU_FULL_LS" block=SPI event=117 descr="Sum of CU where LDS can't take ls wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_LDS_CU_FULL_ES" block=SPI event=118 descr="Sum of CU where LDS can't take es wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_LDS_CU_FULL_CSG" block=SPI event=119 descr="Sum of CU where LDS can't take csg wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_LDS_CU_FULL_CSN" block=SPI event=120 descr="Sum of CU where LDS can't take csn wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_BAR_CU_FULL_HS" block=SPI event=121 descr="Sum of CU where BARRIER can't take hs wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_BAR_CU_FULL_CSG" block=SPI event=122 descr="Sum of CU where BARRIER can't take csg wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_BAR_CU_FULL_CSN" block=SPI event=123 descr="Sum of CU where BARRIER can't take csn wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_BULKY_CU_FULL_CSG" block=SPI event=124 descr="Sum of CU where BULKY can't take csg wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_BULKY_CU_FULL_CSN" block=SPI event=125 descr="Sum of CU where BULKY can't take csn wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_TGLIM_CU_FULL_CSG" block=SPI event=126 descr="Cycles where csg wants to req but all CU are at tg_limit"
-  ></metric>
-  <metric
-    name="SPI_RA_TGLIM_CU_FULL_CSN" block=SPI event=127 descr="Cycles where csn wants to req but all CU are at tg_limit"
-  ></metric>
-  <metric
-    name="SPI_RA_WVLIM_STALL_PS" block=SPI event=128 descr="Number of clocks ps is stalled due to WAVE LIMIT. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_RA_WVLIM_STALL_VS" block=SPI event=129 descr="Number of clocks vs is stalled due to WAVE LIMIT."
-  ></metric>
-  <metric
-    name="SPI_RA_WVLIM_STALL_GS" block=SPI event=130 descr="Number of clocks gs is stalled due to WAVE LIMIT."
-  ></metric>
-  <metric
-    name="SPI_RA_WVLIM_STALL_HS" block=SPI event=131 descr="Number of clocks hs is stalled due to WAVE LIMIT."
-  ></metric>
-  <metric
-    name="SPI_RA_WVLIM_STALL_CSG" block=SPI event=132 descr="Number of clocks csg is stalled due to WAVE LIMIT."
-  ></metric>
-  <metric
-    name="SPI_RA_WVLIM_STALL_CSN" block=SPI event=133 descr="Number of clocks csn is stalled due to WAVE LIMIT."
-  ></metric>
-  <metric
-    name="SPI_RA_VS_LOCK" block=SPI event=134 descr="Arb cycles VS has a CU locked when !fits and active_cnt < threshold. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_GS_LOCK" block=SPI event=135 descr="Arb cycles GS has a CU locked when !fits and active_cnt < threshold. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_HS_LOCK" block=SPI event=136 descr="Arb cycles HS has a CU locked when !fits and active_cnt < threshold. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_CSG_LOCK" block=SPI event=137 descr="Arb cycles CSG has a CU locked when !fits and active_cnt < threshold. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_CSN_LOCK" block=SPI event=138 descr="Arb cycles CSN has a CU locked when !fits and active_cnt < threshold. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_RSV_UPD" block=SPI event=139 descr="Cycles spent doing updates for reservation changes, Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_EXP_ARB_COL_CNT" block=SPI event=140 descr="Sum of number of color exp requests pending each clk, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_EXP_ARB_PAR_CNT" block=SPI event=141 descr="Sum of number of parameter exp requests pending each clk, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_EXP_ARB_POS_CNT" block=SPI event=142 descr="Sum of number of position exp requests pending each clk, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_EXP_ARB_GDS_CNT" block=SPI event=143 descr="Sum of number of gds exp requests pending each clk, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_NUM_PS_COL_R0_EXPORTS" block=SPI event=144 descr="Number of PS color export grants in dwords for read 0, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is from WB0 and COL0 DEBUG_SH_SEL =1, source is from WB0 and COL1."
-  ></metric>
-  <metric
-    name="SPI_NUM_PS_COL_R1_EXPORTS" block=SPI event=145 descr="Number of PS color export grants in dwords for read 1, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is from WB0 and COL0 DEBUG_SH_SEL =1, source is from WB0 and COL1."
-  ></metric>
-  <metric
-    name="SPI_NUM_VS_POS_R0_EXPORTS" block=SPI event=146 descr="Number of VS position export grants in dwords for read 0, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_NUM_VS_POS_R1_EXPORTS" block=SPI event=147 descr="Number of VS position export grants in dwords for read 1, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_NUM_VS_PARAM_R0_EXPORTS" block=SPI event=148 descr="Number of VS parameter export grants in dwords for read 0, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_NUM_VS_PARAM_R1_EXPORTS" block=SPI event=149 descr="Number of VS parameter export grants in dwords for read 1, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_NUM_VS_GDS_R0_EXPORTS" block=SPI event=150 descr="Number of gds export grants in dwords for read 0, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_NUM_VS_GDS_R1_EXPORTS" block=SPI event=151 descr="Number of gds export grants in dwords for read 1, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_NUM_EXPGRANT_EXPORTS" block=SPI event=152 descr="Number of cycles export bus is busy, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_CLKGATE_BUSY_STALL" block=SPI event=153 descr="Number of clocks with spi busy and not all_clocks_on"
-  ></metric>
-  <metric
-    name="SPI_CLKGATE_ACTIVE_STALL" block=SPI event=154 descr="Number of clocks with spim_active and not all_clocks_on."
-  ></metric>
-  <metric
-    name="SPI_CLKGATE_ALL_CLOCKS_ON" block=SPI event=155 descr="Number of clocks with all_clocks_on."
-  ></metric>
-  <metric
-    name="SPI_CLKGATE_CGTT_DYN_ON" block=SPI event=156 descr="Number of clocks with spi cgtt dyn clk on."
-  ></metric>
-  <metric
-    name="SPI_CLKGATE_CGTT_REG_ON" block=SPI event=157 descr="Number of clocks with spi cgtt reg clk on."
-  ></metric>
-  <metric
-    name="SPI_PIX_ALLOC_PEND_CNT" block=SPI event=158 descr="Sum of number of pixel alloc requests pending per clk, Source is WWC0"
-  ></metric>
-  <metric
-    name="SPI_PIX_ALLOC_SCB_STALL" block=SPI event=159 descr="Number of clks pix alloc stalled due to color scoreboard. Source is WWC0"
-  ></metric>
-  <metric
-    name="SPI_PIX_ALLOC_DB0_STALL" block=SPI event=160 descr="Number of clks pix alloc stalled due to db0 color buffer. Source is WWC0"
-  ></metric>
-  <metric
-    name="SPI_PIX_ALLOC_DB1_STALL" block=SPI event=161 descr="Number of clks pix alloc stalled due to db1 color buffer. Source is WWC0"
-  ></metric>
-  <metric
-    name="SPI_PIX_ALLOC_DB2_STALL" block=SPI event=162 descr="Number of clks pix alloc stalled due to db2 color buffer. Source is WWC0"
-  ></metric>
-  <metric
-    name="SPI_PIX_ALLOC_DB3_STALL" block=SPI event=163 descr="Number of clks pix alloc stalled due to db3 color buffer. Source is WWC0"
-  ></metric>
-  <metric
-    name="SPI_PC_ALLOC_ACCUM" block=SPI event=164 descr="Accumulation of PC space allocated during perf window. Divide by PC_ALLOC_CNT to get avg allocation duration of each PC line (VS alloc to PS dealloc). AKA pc_free_ptr-"
-  ></metric>
-  <metric
-    name="SPI_GS_NGG_SE_HAS_BATON" block=SPI event=165 descr="Number of clocks this SE owns the baton"
-  ></metric>
-  <metric
-    name="SPI_GS_NGG_SE_DOES_NOT_HAVE_BATON" block=SPI event=166 descr="Number of clocks this SE does not have the baton"
-  ></metric>
-  <metric
-    name="SPI_GS_NGG_SE_FORWARDED_BATON" block=SPI event=167 descr="This SE has forwarded the baton"
-  ></metric>
-  <metric
-    name="SPI_GS_NGG_SE_AT_SYNC_EVENT" block=SPI event=168 descr="Number of clocks this SE at sync event (enable_legacy, enable_ngg, reset_to_lowest_vgt or set_next_feid"
-  ></metric>
-  <metric
-    name="SPI_GS_NGG_SE_SG_ALLOC_PC_SPACE_CNT" block=SPI event=169 descr="Allocation of PC space per GS subgroup by this SE"
-  ></metric>
-  <metric
-    name="SPI_GS_NGG_SE_DEALLOC_PC_SPACE_CNT" block=SPI event=170 descr="De-Allocation of PC space as received from PS by this SE"
-  ></metric>
-  <metric
-    name="SPI_GS_NGG_PC_FULL" block=SPI event=171 descr="This SE reports parameter cache is full"
-  ></metric>
-  <metric
-    name="SPI_GS_NGG_SE_SEND_GS_ALLOC" block=SPI event=172 descr="GS granting PC allocations per surviving wave on this SE"
-  ></metric>
-  <metric
-    name="SPI_GS_NGG_GS_ALLOC_FIFO_EMPTY" block=SPI event=173 descr="GS allocation fifo is empty - no GS waves pending allocation on this SE"
-  ></metric>
-  <metric
-    name="SPI_GSC_VTX_BUSY" block=SPI event=174 descr="vtx controller busy"
-  ></metric>
-  <metric
-    name="SPI_GSC_VTX_INPUT_STARVED" block=SPI event=175 descr="There are no more prims to process and VSRs are empty"
-  ></metric>
-  <metric
-    name="SPI_GSC_VTX_VSR_STALL" block=SPI event=176 descr="vtx controller stalled"
-  ></metric>
-  <metric
-    name="SPI_GSC_VTX_VSR_FULL" block=SPI event=177 descr="all VSRs are full or being read by VGPR controller"
-  ></metric>
-  <metric
-    name="SPI_GSC_VTX_CAC_BUSY" block=SPI event=178 descr="vtx controller writing to VSRs"
-  ></metric>
-  <metric
-    name="SPI_ESC_VTX_BUSY" block=SPI event=179 descr="vtx controller busy"
-  ></metric>
-  <metric
-    name="SPI_ESC_VTX_INPUT_STARVED" block=SPI event=180 descr="There are no more verts to process and VSRs are empty"
-  ></metric>
-  <metric
-    name="SPI_ESC_VTX_VSR_STALL" block=SPI event=181 descr="vtx controller stalled"
-  ></metric>
-  <metric
-    name="SPI_ESC_VTX_VSR_FULL" block=SPI event=182 descr="all VSRs are full or being read by VGPR controller"
-  ></metric>
-  <metric
-    name="SPI_ESC_VTX_CAC_BUSY" block=SPI event=183 descr="vtx controller writing to VSRs"
-  ></metric>
-  <metric
-    name="SPI_SWC_PS_WR" block=SPI event=184 descr="Number of clocks to write PS waves to SGPRs (need to multiply this value by 4)"
-  ></metric>
-  <metric
-    name="SPI_SWC_VS_WR" block=SPI event=185 descr="Number of clocks to write VS waves to SGPRs (need to multiply this value by 4)"
-  ></metric>
-  <metric
-    name="SPI_SWC_GS_WR" block=SPI event=186 descr="Number of clocks to write GS waves to SGPRs (need to multiply this value by 4)"
-  ></metric>
-  <metric
-    name="SPI_SWC_HS_WR" block=SPI event=187 descr="Number of clocks to write HS waves to SGPRs (need to multiply this value by 4)"
-  ></metric>
-  <metric
-    name="SPI_SWC_CSG_WR" block=SPI event=188 descr="Number of clocks to write CSG waves to SGPRs (need to multiply this value by 4)"
-  ></metric>
-  <metric
-    name="SPI_SWC_CSC_WR" block=SPI event=189 descr="Number of clocks to write CSC waves to SGPRs (need to multiply this value by 4) Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_VWC_PS_WR" block=SPI event=190 descr="Number of clocks to write PS waves to VGPRs (need to multiply this value by 4)"
-  ></metric>
-  <metric
-    name="SPI_VWC_VS_WR" block=SPI event=191 descr="Number of clocks to write VS waves to VGPRs (need to multiply this value by 4)"
-  ></metric>
-  <metric
-    name="SPI_VWC_GS_WR" block=SPI event=192 descr="Number of clocks to write GS waves to VGPRs (need to multiply this value by 4)"
-  ></metric>
-  <metric
-    name="SPI_VWC_HS_WR" block=SPI event=193 descr="Number of clocks to write HS waves to VGPRs (need to multiply this value by 4)"
-  ></metric>
-  <metric
-    name="SPI_VWC_CSG_WR" block=SPI event=194 descr="Number of clocks to write CSG waves to VGPRs (need to multiply this value by 4)"
-  ></metric>
-  <metric
-    name="SPI_VWC_CSC_WR" block=SPI event=195 descr="Number of clocks to write CSC waves to VGPRs (need to multiply this value by 4) Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  # SQ counters
-  <metric
-    name="SQ_NONE" block=SQ event=0 descr="Don't count anything."
-  ></metric>
-  <metric
-    name="SQ_ACCUM_PREV" block=SQ event=1 descr="For counter N, increment by the value of counter N-1. Only accumulates once every 4 cycles."
-  ></metric>
-  <metric
-    name="SQ_CYCLES" block=SQ event=2 descr="Clock cycles. (nondeterministic, per-simd, global)"
-  ></metric>
-  <metric
-    name="SQ_BUSY_CYCLES" block=SQ event=3 descr="Clock cycles while SQ is reporting that it is busy. (nondeterministic, per-simd, global)"
-  ></metric>
-  <metric
-    name="SQ_WAVES" block=SQ event=4 descr="Count number of waves sent to SQs. (per-simd, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_LEVEL_WAVES" block=SQ event=5 descr="Track the number of waves. Set ACCUM_PREV for the next counter to use this. (level, per-simd, global)"
-  ></metric>
-  <metric
-    name="SQ_WAVES_EQ_64" block=SQ event=6 descr="Count number of waves with exactly 64 active threads sent to SQs. (per-simd, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_WAVES_LT_64" block=SQ event=7 descr="Count number of waves with <64 active threads sent to SQs. (per-simd, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_WAVES_LT_48" block=SQ event=8 descr="Count number of waves with <48 active threads sent to SQs. (per-simd, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_WAVES_LT_32" block=SQ event=9 descr="Count number of waves sent <32 active threads sent to SQs. (per-simd, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_WAVES_LT_16" block=SQ event=10 descr="Count number of waves sent <16 active threads sent to SQs. (per-simd, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_WAVES_CU" block=SQ event=11 descr="Count number of waves sent to CUs. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_LEVEL_WAVES_CU" block=SQ event=12 descr="Track the number of waves. Set ACCUM_PREV for the next counter to use this. (level, per-simd)"
-  ></metric>
-  <metric
-    name="SQ_BUSY_CU_CYCLES" block=SQ event=13 descr="Count quad-cycles each CU is busy. (nondeterministic, per-simd)"
-  ></metric>
-  <metric
-    name="SQ_ITEMS" block=SQ event=14 descr="Number of valid items per wave. (per-simd, global)"
-  ></metric>
-  <metric
-    name="SQ_QUADS" block=SQ event=15 descr="Number of completely or partially covered quads per wave. (per-simd, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_EVENTS" block=SQ event=16 descr="Number of events. (unwindowed, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_SURF_SYNCS" block=SQ event=17 descr="Number of surface syncs. (unwindowed, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_TTRACE_REQS" block=SQ event=18 descr="Number of thread trace requests. (unwindowed, global, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_TTRACE_INFLIGHT_REQS" block=SQ event=19 descr="Number of in-flight thread trace requests. (nondeterministic, unwindowed, global)"
-  ></metric>
-  <metric
-    name="SQ_TTRACE_STALL" block=SQ event=20 descr="Number of cycles thread trace stalls stalled execution. (nondeterministic, unwindowed, global)"
-  ></metric>
-  <metric
-    name="SQ_MSG_CNTR" block=SQ event=21 descr="Number of counter messages. (nondeterministic, unwindowed, global)"
-  ></metric>
-  <metric
-    name="SQ_MSG_PERF" block=SQ event=22 descr="Number of perfcounter messages. (nondeterministic, unwindowed), global"
-  ></metric>
-  <metric
-    name="SQ_MSG_GSCNT" block=SQ event=23 descr="Number of geometry messages. (emulated, unwindowed, global)"
-  ></metric>
-  <metric
-    name="SQ_MSG_INTERRUPT" block=SQ event=24 descr="Number of interrupt messages. (emulated, unwindowed, global)"
-  ></metric>
-  <metric
-    name="SQ_INSTS" block=SQ event=25 descr="Number of instructions issued. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VALU" block=SQ event=26 descr="Number of VALU instructions issued. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VMEM_WR" block=SQ event=27 descr="Number of VMEM write instructions issued (including FLAT). (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VMEM_RD" block=SQ event=28 descr="Number of VMEM read instructions issued (including FLAT). (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VMEM" block=SQ event=29 descr="Number of VMEM instructions issued. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_SALU" block=SQ event=30 descr="Number of SALU instructions issued. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_SMEM" block=SQ event=31 descr="Number of SMEM instructions issued. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_FLAT" block=SQ event=32 descr="Number of FLAT instructions issued. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_FLAT_LDS_ONLY" block=SQ event=33 descr="Number of FLAT instructions issued that read/wrote only from/to LDS (only works if EARLY_TA_DONE is enabled). (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_LDS" block=SQ event=34 descr="Number of LDS instructions issued (including FLAT). (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_GDS" block=SQ event=35 descr="Number of GDS instructions issued. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_EXP" block=SQ event=36 descr="Number of EXP instructions issued, excluding skipped export instructions. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_EXP_GDS" block=SQ event=37 descr="Number of EXP and GDS instructions issued, excluding skipped export instructions. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_BRANCH" block=SQ event=38 descr="Number of Branch instructions issued. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_SENDMSG" block=SQ event=39 descr="Number of Sendmsg instructions issued. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VSKIPPED" block=SQ event=40 descr="Number of vector instructions skipped. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INST_LEVEL_VMEM" block=SQ event=41 descr="Number of in-flight VMEM instructions. Set next counter to ACCUM_PREV and divide by INSTS_VMEM for average latency. Includes FLAT instructions. (per-simd, level, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_INST_LEVEL_SMEM" block=SQ event=42 descr="Number of in-flight SMEM instructions (*2 load/store; *2 atomic; *2 memtime; *4 wb/inv). Set next counter to ACCUM_PREV and divide by INSTS_SMEM for average latency per smem request. Falls slightly short of total request latency because some fetches are divided into two requests that may finish at different times and this counter collects the average latency of the two. (per-simd, level, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_INST_LEVEL_LDS" block=SQ event=43 descr="Number of in-flight LDS instructions. Set next counter to ACCUM_PREV and divide by INSTS_LDS for average latency. Includes FLAT instructions. (per-simd, level, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_INST_LEVEL_GDS" block=SQ event=44 descr="Number of in-flight GDS instructions. Set next counter to ACCUM_PREV and divide by INSTS_GDS for average latency. (per-simd, level, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_INST_LEVEL_EXP" block=SQ event=45 descr="Number of in-flight EXP instructions. Set next counter to ACCUM_PREV and divide by INSTS_EXP for average latency. (per-simd, level, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAVE_CYCLES" block=SQ event=46 descr="Number of wave-cycles spent by waves in the CUs (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAVE_READY" block=SQ event=47 descr="Number of wave-cycles waves were ready to execute the next instruction (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_CNT_VM" block=SQ event=48 descr="Number of wave-cycles spent waiting for VM counter. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_CNT_LGKM" block=SQ event=49 descr="Number of wave-cycles spent waiting for LGKM counter. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_CNT_EXP" block=SQ event=50 descr="Number of wave-cycles spent waiting for EXP counter. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_CNT_ANY" block=SQ event=51 descr="Number of wave-cycles spent waiting for any counter. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_BARRIER" block=SQ event=52 descr="Number of wave-cycles spent waiting for a barrier. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_EXP_ALLOC" block=SQ event=53 descr="Number of wave-cycles spent waiting for export allocation (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_SLEEP" block=SQ event=54 descr="Number of wave-cycles spent waiting for sleep to finish (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_SLEEP_XNACK" block=SQ event=55 descr="Number of wave-cycles spent waiting for xnack sleep to finish (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_OTHER" block=SQ event=56 descr="Number of wave-cycles spent waiting for dependency stalls (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_ANY" block=SQ event=57 descr="Number of wave-cycles spent waiting for anything (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_TTRACE" block=SQ event=58 descr="Number of wave-cycles spent waiting for thread trace stalls (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_IFETCH" block=SQ event=59 descr="Number of wave-cycles spent waiting for instructions to arrive (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_INST_ANY" block=SQ event=60 descr="Number of wave-cycles spent waiting for any instruction issue. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_INST_VMEM" block=SQ event=61 descr="Number of wave-cycles spent waiting for VMEM instruction issue. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_INST_SCA" block=SQ event=62 descr="Number of wave-cycles spent waiting for SALU or SMEM instruction issue. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_INST_LDS" block=SQ event=63 descr="Number of wave-cycles spent waiting for LDS instruction issue. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_INST_VALU" block=SQ event=64 descr="Number of wave-cycles spent waiting for VALU instrution issue. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_INST_EXP_GDS" block=SQ event=65 descr="Number of wave-cycles spent waiting for EXPORT or GDS instruction issue. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_INST_MISC" block=SQ event=66 descr="Number of wave-cycles spent waiting for BRANCH or SENDMSG instruction issue. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_INST_FLAT" block=SQ event=67 descr="Number of wave-cycles spent waiting for flat instruction issue. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_ACTIVE_INST_ANY" block=SQ event=68 descr="Number of cycles each wave is working on an instruction. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_ACTIVE_INST_VMEM" block=SQ event=69 descr="Number of cycles the SQ instruction arbiter is working on a VMEM instruction. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_ACTIVE_INST_LDS" block=SQ event=70 descr="Number of cycles the SQ instruction arbiter is working on a LDS instruction. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_ACTIVE_INST_VALU" block=SQ event=71 descr="Number of cycles the SQ instruction arbiter is working on a VALU instruction. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_ACTIVE_INST_SCA" block=SQ event=72 descr="Number of cycles the SQ instruction arbiter is working on a SALU or SMEM instruction. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_ACTIVE_INST_EXP_GDS" block=SQ event=73 descr="Number of cycles the SQ instruction arbiter is working on an EXPORT or GDS instruction. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_ACTIVE_INST_MISC" block=SQ event=74 descr="Number of cycles the SQ instruction aribter is working on a BRANCH or SENDMSG instruction. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_ACTIVE_INST_FLAT" block=SQ event=75 descr="Number of cycles the SQ instruction arbiter is working on a FLAT instruction. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INST_CYCLES_VMEM_WR" block=SQ event=76 descr="Number of cycles needed to send addr and cmd data for VMEM write instructions. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INST_CYCLES_VMEM_RD" block=SQ event=77 descr="Number of cycles needed to send addr and cmd data for VMEM read instructions. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INST_CYCLES_VMEM_ADDR" block=SQ event=78 descr="Number of cycles needed to send VMEM read/write addresses to TA. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INST_CYCLES_VMEM_DATA" block=SQ event=79 descr="Number of cycles needed to send VMEM write data to TA. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INST_CYCLES_VMEM_CMD" block=SQ event=80 descr="Number of cycles needed to send VMEM command to TA. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INST_CYCLES_EXP" block=SQ event=81 descr="Number of cycles needed to export data for EXP instructions. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INST_CYCLES_GDS" block=SQ event=82 descr="Number of cycles needed to export data for GDS instructions. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INST_CYCLES_SMEM" block=SQ event=83 descr="Number of cycles needed to execute scalar memory reads. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INST_CYCLES_SALU" block=SQ event=84 descr="Number of cycles needed to execute non-memory read scalar operations. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_THREAD_CYCLES_VALU" block=SQ event=85 descr="Number of thread-cycles used to execute VALU operations (similar to INST_CYCLES_VALU but multiplied by # of active threads). (per-simd)"
-  ></metric>
-  <metric
-    name="SQ_THREAD_CYCLES_VALU_MAX" block=SQ event=86 descr="Maximum number of thread-cycles VALU operations that could have been executed given the instruction mix (similar to INST_CYCLES_VALU but multiplied by # of active threads). (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_IFETCH" block=SQ event=87 descr="Number of instruction fetch requests from cache. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_IFETCH_LEVEL" block=SQ event=88 descr="Number of instruction fetch requests from cache. (per-simd, level)"
-  ></metric>
-  <metric
-    name="SQ_CBRANCH_FORK" block=SQ event=89 descr="Number of conditional branch instructions. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_CBRANCH_FORK_SPLIT" block=SQ event=90 descr="Number of conditional branch instructions that take both branches. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_VALU_LDS_DIRECT_RD" block=SQ event=91 descr="Number of LDS direct reads issued (excluding interpolation ops). (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_VALU_LDS_INTERP_OP" block=SQ event=92 descr="Number of LDS interpolation ops issued. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_LDS_BANK_CONFLICT" block=SQ event=93 descr="Number of cycles LDS is stalled by bank conflicts. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_LDS_ADDR_CONFLICT" block=SQ event=94 descr="Number of cycles LDS is stalled by address conflicts. (emulated,nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_LDS_UNALIGNED_STALL" block=SQ event=95 descr="Number of cycles LDS is stalled processing flat unaligned load/store ops. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_LDS_MEM_VIOLATIONS" block=SQ event=96 descr="Number of threads that have a memory violation in the LDS.(emulated)"
-  ></metric>
-  <metric
-    name="SQ_LDS_ATOMIC_RETURN" block=SQ event=97 descr="Number of atomic return cycles in LDS. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_LDS_IDX_ACTIVE" block=SQ event=98 descr="Number of cycles LDS is used for indexed (non-direct,non-interpolation) operations. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_VALU_DEP_STALL" block=SQ event=99 descr="Number of cycles VALU is stalled by previous instructions due to dependencies (wait state count). (nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_VALU_STARVE" block=SQ event=100 descr="Number of cycles VALU is starved while waves are present. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_TA_STARVE" block=SQ event=101 descr="Number of cycles SQ_TA_cmd interface is starved while waves are present. (nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_EXP_REQ_FIFO_FULL" block=SQ event=102 descr="Number of cycles export request fifo is full. (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_LDS_DATA_FIFO_FULL" block=SQ event=103 descr="Number of cycles LDS data fifo is full. (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_LDS_CMD_FIFO_FULL" block=SQ event=104 descr="Number of cycles LDS command fifo is full. (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_VMEM_TA_ADDR_FIFO_FULL" block=SQ event=105 descr="Number of cycles texture requests are stalled due to full address fifo in TA. (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_VMEM_TA_CMD_FIFO_FULL" block=SQ event=106 descr="Number of cycles texture requests are stalled due to full cmd fifo in TA. (nondeterministic, unwindowed)."
-  ></metric>
-  <metric
-    name="SQ_VMEM_EX_DATA_REG_BUSY" block=SQ event=107 descr="Number of cycles texture requests are stalled due to full data staging register in EX. (nondeterministic, unwindowed)."
-  ></metric>
-  <metric
-    name="SQ_VMEM_WR_TA_DATA_FIFO_FULL" block=SQ event=108 descr="Number of cycles texture writes are stalled due to full data fifo in TA. (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_VALU_SRC_C_CONFLICT" block=SQ event=109 descr="Number of cycles VALU is stalled by arbitration due to src c conflict. (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_VMEM_RD_SRC_CD_CONFLICT" block=SQ event=110 descr="Number of cycles VMEM_RD instructions are stalled due to VGPR port conflicts. (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_VMEM_WR_SRC_CD_CONFLICT" block=SQ event=111 descr="Number of cycles VMEM_WR instructions are stalled due to VGPR port conflicts. (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_FLAT_SRC_CD_CONFLICT" block=SQ event=112 descr="Number of cycles FLAT instructions are stalled due to VGPR port conflicts. (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_LDS_SRC_CD_CONFLICT" block=SQ event=113 descr="Number of cycles LDS instructions are stalled due to VGPR port conflicts. (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_SRC_CD_BUSY" block=SQ event=114 descr="Number of total accesses of port C and D (up to 2 per cycle). (per-simd)"
-  ></metric>
-  <metric
-    name="SQ_PT_POWER_STALL" block=SQ event=115 descr="Number of cycles the power throttle indicated ALU should stall (ignores whether something actually got stalled). (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_USER0" block=SQ event=116 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 0. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER1" block=SQ event=117 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 1. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER2" block=SQ event=118 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 2. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER3" block=SQ event=119 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 3. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER4" block=SQ event=120 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 4. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER5" block=SQ event=121 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 5. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER6" block=SQ event=122 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 6. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER7" block=SQ event=123 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 7. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER8" block=SQ event=124 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 8. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER9" block=SQ event=125 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 9. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER10" block=SQ event=126 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 10. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER11" block=SQ event=127 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 11. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER12" block=SQ event=128 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 12. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER13" block=SQ event=129 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 13. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER14" block=SQ event=130 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 14. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER15" block=SQ event=131 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 15. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL0" block=SQ event=132 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL when SIMM16[3:0] == 0. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL1" block=SQ event=133 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 1. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL2" block=SQ event=134 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 2. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL3" block=SQ event=135 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 3. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL4" block=SQ event=136 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 4. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL5" block=SQ event=137 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 5. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL6" block=SQ event=138 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 6. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL7" block=SQ event=139 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 7. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL8" block=SQ event=140 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 8. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL9" block=SQ event=141 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 9. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL10" block=SQ event=142 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 10. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL11" block=SQ event=143 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 11. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL12" block=SQ event=144 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 12. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL13" block=SQ event=145 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 13. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL14" block=SQ event=146 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 14. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL15" block=SQ event=147 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 15. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_POWER_VALU" block=SQ event=148 descr="Number of CAC pulses for ALU instructions (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_POWER_VALU0" block=SQ event=149 descr="Number of CAC pulses for ALU instructions in group 0 (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_POWER_VALU1" block=SQ event=150 descr="Number of CAC pulses for ALU instructions in group 1 (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_POWER_VALU2" block=SQ event=151 descr="Number of CAC pulses for ALU instructions in group 2 (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_POWER_GPR_RD" block=SQ event=152 descr="Number of CAC pulses for GPR reads (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_POWER_GPR_WR" block=SQ event=153 descr="Number of CAC pulses for GPR writes (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_POWER_LDS_BUSY" block=SQ event=154 descr="Number of CAC pulses for cycles LDS clocks are active (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_POWER_ALU_BUSY" block=SQ event=155 descr="Number of CAC pulses for cycles ALU clocks are active (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_POWER_TEX_BUSY" block=SQ event=156 descr="Number of CAC pulses for cycles texture clocks are active (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_ACCUM_PREV_HIRES" block=SQ event=157 descr="For counter N, increment by the value of counter N-1."
-  ></metric>
-  <metric
-    name="SQ_WAVES_RESTORED" block=SQ event=158 descr="Count number of context-restored waves sent to SQs. (per-simd, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_WAVES_SAVED" block=SQ event=159 descr="Count number of context-saved waves. (per-simd, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_SMEM_NORM" block=SQ event=160 descr="Number of SMEM instructions issued normalized to match smem_level (*2 load/store; *2 atomic; *2 memtime; *4 wb/inv). (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_XNACK_FIRST" block=SQ event=161 descr="Number of first xnack from TA. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_XNACK_ALL" block=SQ event=162 descr="Number of all xnack from TA. (per-simd)"
-  ></metric>
-  <metric
-    name="SQ_XNACK_FIFO_FULL" block=SQ event=163 descr="Number of cycles XNACK fifo is full. (per-simd, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_IFETCH_XNACK" block=SQ event=164 descr="Number of instruction fetch xnack from SQC. (per-simd)"
-  ></metric>
-  <metric
-    name="SQ_TLB_SHOOTDOWN" block=SQ event=165 descr="Number of TLB shootdowns. (unwindowed, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_TLB_SHOOTDOWN_CYCLES" block=SQ event=166 descr="Number of cycles in which a TLB shootdown is active. (unwindowed, global)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VMEM_WR_REPLAY" block=SQ event=167 descr="Number of VMEM write instructions replayed (including FLAT). (excluding instructions issued). (per-simd, emulated, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VMEM_RD_REPLAY" block=SQ event=168 descr="Number of VMEM read instructions replayed (including FLAT). (excluding instructions issued). (per-simd, emulated, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VMEM_REPLAY" block=SQ event=169 descr="Number of VMEM instructions replayed. (excluding instructions issued). (per-simd, emulated, nondeterministicd)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_SMEM_REPLAY" block=SQ event=170 descr="Number of SMEM instructions replayed. (excluding instructions issued). (per-simd, emulated, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_SMEM_NORM_REPLAY" block=SQ event=171 descr="Number of SMEM instructions replayed normalized to match smem_level (*2 load/store; *2 atomic; *2 memtime; *4 wb/inv). (excluding instructions issued). (per-simd, emulated, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_FLAT_REPLAY" block=SQ event=172 descr="Number of FLAT instructions replayed. (excluding instructions issued). (per-simd, emulated, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_UTCL1_TRANSLATION_MISS" block=SQ event=173 descr="Total UTCL1 translation misses"
-  ></metric>
-  <metric
-    name="SQ_UTCL1_PERMISSION_MISS" block=SQ event=174 descr="Total UTCL1 permission misses"
-  ></metric>
-  <metric
-    name="SQ_UTCL1_TRANSLATION_HIT_EVENT" block=SQ event=175 descr="Total UTCL1 translation hit events"
-  ></metric>
-  <metric
-    name="SQ_UTCL1_REQUEST" block=SQ event=176 descr="Total UTCL1 NORMAL requests"
-  ></metric>
-  <metric
-    name="SQ_UTCL1_STALL_MISSFIFO_FULL" block=SQ event=177 descr="Total UTCL1 stall due to full miss fifo"
-  ></metric>
-  <metric
-    name="SQ_UTCL1_STALL_INFLIGHT_MAX" block=SQ event=178 descr="Total UTCL1 stalls due to inflight counter saturation"
-  ></metric>
-  <metric
-    name="SQ_UTCL1_STALL_LRU_INFLIGHT" block=SQ event=179 descr="Total UTCL1 stalls due to LRU cache line with traffic inflight"
-  ></metric>
-  <metric
-    name="SQ_UTCL1_LFIFO_FULL" block=SQ event=180 descr="Total UTCL1 latency hiding fifo full cycles"
-  ></metric>
-  <metric
-    name="SQ_UTCL1_STALL_LFIFO_NOT_RES" block=SQ event=181 descr="Total UTCL1 stalls due to latency latency hiding fifo output not resident"
-  ></metric>
-  <metric
-    name="SQ_UTCL1_STALL_UTCL2_REQ_OUT_OF_CREDITS" block=SQ event=182 descr="Total UTCL1 stalls due to UTCL2 requests out of credits"
-  ></metric>
-  <metric
-    name="SQ_DUMMY_END" block=SQ event=183 descr="Just a placeholding enum to indicate the end of real SQ performance counter. Not a real performance counter."
-  ></metric>
-  <metric
-    name="SQ_DUMMY_LAST" block=SQ event=255 descr="Just a placeholding enum to separate SQ from SQC counters. Not a real performance counter."
-  ></metric>
-  <metric
-    name="SQC_ICACHE_INPUT_VALID_READY" block=SQ event=256 descr="Successful Transaction (per-SQ, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_INPUT_VALID_READYB" block=SQ event=257 descr="Input stalled by SQC (per-SQ, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_INPUT_VALIDB" block=SQ event=258 descr="SQC starved (per-SQ, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_INPUT_VALID_READY" block=SQ event=259 descr="Successful Transaction (per-SQ, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_INPUT_VALID_READYB" block=SQ event=260 descr="Input stalled by SQC (per-SQ, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_INPUT_VALIDB" block=SQ event=261 descr="SQC starved (per-SQ, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_TC_REQ" block=SQ event=262 descr="Total number of TC requests that were issued by instruction and constant caches. (No-Masking, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_TC_INST_REQ" block=SQ event=263 descr="Number of insruction requests to the TC (No-Masking, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_TC_DATA_READ_REQ" block=SQ event=264 descr="Number of data read requests to the TC (No-Masking, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_TC_DATA_WRITE_REQ" block=SQ event=265 descr="Number of data write requests to the TC (No-Masking, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_TC_DATA_ATOMIC_REQ" block=SQ event=266 descr="Number of data atomic requests to the TC (No-Masking, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_TC_STALL" block=SQ event=267 descr="Valid request stalled TC request interface (no-credits). (No-Masking, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_TC_STARVE" block=SQ event=268 descr="No requests sent to TC while credits available. (No-Masking, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_BUSY_CYCLES" block=SQ event=269 descr="Clock cycles while cache is reporting that it is busy. (No-Masking, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_REQ" block=SQ event=270 descr="Number of requests. (per-SQ, per-Bank)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_HITS" block=SQ event=271 descr="Number of cache hits. (per-SQ, per-Bank, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_MISSES" block=SQ event=272 descr="Number of cache misses, includes uncached requests. (per-SQ, per-Bank, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_MISSES_DUPLICATE" block=SQ event=273 descr="Number of misses that were duplicates (access to a non-resident, miss pending CL). (per-SQ, per-Bank, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_INVAL_INST" block=SQ event=274 descr="Number of cache invalidations caused by instructions (No-Masking)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_INVAL_ASYNC" block=SQ event=275 descr="Number of asynchronous invalidates (surface sync, register write, etc.) (No-Masking, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_INPUT_STALL_ARB_NO_GRANT" block=SQ event=276 descr="Number of arbitration stalls due to lost arbitration to other SQs. (per-SQ, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_INPUT_STALL_BANK_READYB" block=SQ event=277 descr="Number of arbitration stalls due to bank stalling. (per-SQ, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_CACHE_STALLED" block=SQ event=278 descr="Number of cache stalls. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_CACHE_STALL_INFLIGHT_NONZERO" block=SQ event=279 descr="Number of cycles stalled because allocated line has nonzero inflight. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_CACHE_STALL_INFLIGHT_MAX" block=SQ event=280 descr="Number of cycles stalled on a hit CL but inflight counter is maxed out. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_CACHE_STALL_OUTPUT" block=SQ event=281 descr="Number of cycles stalled at cache controller output. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_CACHE_STALL_OUTPUT_MISS_FIFO" block=SQ event=282 descr="Number of cycles stalled because the miss FIFO is full. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_CACHE_STALL_OUTPUT_HIT_FIFO" block=SQ event=283 descr="Number of cycles stalled because a hit FIFO is full. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_CACHE_STALL_OUTPUT_TC_IF" block=SQ event=284 descr="Number of cycles stalled because the TC request interface is stalled. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_STALL_OUTXBAR_ARB_NO_GRANT" block=SQ event=285 descr="Number of arbitration stalls due to lost arbitration for the output port. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_PREFETCH_1" block=SQ event=286 descr="Number of +1 prefetch requests granted. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_PREFETCH_2" block=SQ event=287 descr="Number of +2 prefetch requests granted. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_PREFETCH_FILTERED" block=SQ event=288 descr="Number of prefetch requests filtered out. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_BUSY_CYCLES" block=SQ event=289 descr="Clock cycles while cache is reporting that it is busy. (No-Masking, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ" block=SQ event=290 descr="Number of requests (post-bank-serialization). (per-SQ, per-Bank)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_HITS" block=SQ event=291 descr="Number of cache hits. (per-SQ, per-Bank, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_MISSES" block=SQ event=292 descr="Number of cache misses, includes uncached requests. (per-SQ, per-Bank, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_MISSES_DUPLICATE" block=SQ event=293 descr="Number of misses that were duplicates (access to a non-resident, miss pending CL). (per-SQ, per-Bank, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_HIT_LRU_READ" block=SQ event=294 descr="Number of HIT_LRU read requests. (per-SQ, per-Bank)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_MISS_EVICT_READ" block=SQ event=295 descr="Number of MISS_EVICT read requests. (per-SQ, per-Bank)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_WC_LRU_WRITE" block=SQ event=296 descr="Number of WC_LRU write requests. (per-SQ, per-Bank)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_WT_EVICT_WRITE" block=SQ event=297 descr="Number of WT_EVICT write requests. (per-SQ, per-Bank)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_ATOMIC" block=SQ event=298 descr="Number of atomic requests. (per-SQ, per-Bank)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_VOLATILE" block=SQ event=299 descr="Number of volatile cache requests. (per-SQ, per-Bank)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_INVAL_INST" block=SQ event=300 descr="Number of cache invalidations caused by instructions (No-Masking)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_INVAL_ASYNC" block=SQ event=301 descr="Number of asynchronous invalidates (surface sync, register write, etc.) (No-Masking, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_INVAL_VOLATILE_INST" block=SQ event=302 descr="Number of volatile cache invalidations caused by instructions (No-Masking)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_INVAL_VOLATILE_ASYNC" block=SQ event=303 descr="Number of asynchronous volatile invalidates (surface sync, register write, etc.) (No-Masking, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_WB_INST" block=SQ event=304 descr="Number of cache write-backs caused by instructions (No-Masking)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_WB_ASYNC" block=SQ event=305 descr="Number of asynchronous cache write-backs (surface sync, register write, etc.) (No-Masking, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_WB_VOLATILE_INST" block=SQ event=306 descr="Number of volatile cache write-backs caused by instructions (No-Masking)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_WB_VOLATILE_ASYNC" block=SQ event=307 descr="Number of asynchronous volatile cache write-backs (surface sync, register write, etc.) (No-Masking, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_INPUT_STALL_ARB_NO_GRANT" block=SQ event=308 descr="Number of arbitration stalls due to lost arbitration to other SQs. (per-SQ, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_INPUT_STALL_BANK_READYB" block=SQ event=309 descr="Number of arbitration stalls due to bank stalling. (per-SQ, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALLED" block=SQ event=310 descr="Number of cache stalls. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_INFLIGHT_MAX" block=SQ event=311 descr="Number of cycles stalled on a hit CL but inflight counter is maxed out. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_OUTPUT" block=SQ event=312 descr="Number of cycles stalled at cache controller output. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_EVICT" block=SQ event=313 descr="Number of cycles stalled trying to do an evict. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_UNORDERED" block=SQ event=314 descr="Number of cycles stalled due to an unordered access conflict. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_ALLOC_UNAVAILABLE" block=SQ event=315 descr="Number of cycles stalled due to not being able to allocate a line. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_FORCE_EVICT" block=SQ event=316 descr="Number of cycles stalled due to having to force an eviction. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_MULTI_FLUSH" block=SQ event=317 descr="Number of cycles stalled due to multiple flushes. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_FLUSH_DONE" block=SQ event=318 descr="Number of cycles stalled inserting flush done tokens into pipe. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_OUTPUT_MISS_FIFO" block=SQ event=319 descr="Number of cycles stalled because the miss FIFO is full. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_OUTPUT_HIT_FIFO" block=SQ event=320 descr="Number of cycles stalled because a hit FIFO is full. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_OUTPUT_TC_IF" block=SQ event=321 descr="Number of cycles stalled because the TC request interface is stalled. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_STALL_OUTXBAR_ARB_NO_GRANT" block=SQ event=322 descr="Number of arbitration stalls due to lost arbitration for the output port. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ_READ_1" block=SQ event=323 descr="Number of constant cache 1 dw read requests. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ_READ_2" block=SQ event=324 descr="Number of constant cache 2 dw read requests. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ_READ_4" block=SQ event=325 descr="Number of constant cache 4 dw read requests. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ_READ_8" block=SQ event=326 descr="Number of constant cache 8 dw read requests. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ_READ_16" block=SQ event=327 descr="Number of constant cache 16 dw read requests. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ_TIME" block=SQ event=328 descr="Number of constant cache timestamp requests. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ_WRITE_1" block=SQ event=329 descr="Number of constant cache 1 dw write requests. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ_WRITE_2" block=SQ event=330 descr="Number of constant cache 2 dw write requests. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ_WRITE_4" block=SQ event=331 descr="Number of constant cache 4 dw write requests. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ_ATC_PROBE" block=SQ event=332 descr="Number of constant cache atc probe requests. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_SQ_DCACHE_REQS" block=SQ event=333 descr="Number of constant requests from SQ before any serialization (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_FLAT_REQ" block=SQ event=334 descr="Number of constant flat requests (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_NONFLAT_REQ" block=SQ event=335 descr="Number of constant non-flat requests (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_INFLIGHT_LEVEL" block=SQ event=336 descr="Level Counter: # total outstanding transactions in instruction cache (per-SQ, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_INFLIGHT_LEVEL" block=SQ event=337 descr="Level Counter: # total outstanding transactions in data cache (per-SQ, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_TC_INFLIGHT_LEVEL" block=SQ event=338 descr="Level Counter: total outstanding requests to TC (No-Masking, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_TC_INFLIGHT_LEVEL" block=SQ event=339 descr="Level Counter: # of outstanding instruction requests to TC (No-Masking, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_TC_INFLIGHT_LEVEL" block=SQ event=340 descr="Level Counter: # of outstanding data requests to TC (No-Masking, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_TRANSLATION_MISS" block=SQ event=341 descr="Total ICACHE gatcl1 translation misses"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_PERMISSION_MISS" block=SQ event=342 descr="Total ICACHE gatcl1 permission misses"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_TRANSLATION_HIT" block=SQ event=343 descr="Total ICACHE gatcl1 translation hits"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_REQUEST" block=SQ event=344 descr="Total ICACHE CLIENT_ATCL1 NORMAL requestes"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_STALL_INFLIGHT_MAX" block=SQ event=345 descr="Total ICACHE gatcl1 stalls due to inflight counter saturation"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_STALL_LRU_INFLIGHT" block=SQ event=346 descr="Total ICACHE gatcl1 stalls due to LRU cache line with traffic inflight"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_LFIFO_FULL" block=SQ event=347 descr="Total ICACHE gatcl1 atcl2 latency hiding fifo full cycles"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_STALL_LFIFO_NOT_RES" block=SQ event=348 descr="Total ICACHE gatcl1 stalls due to atcl2 latency hiding fifo output not resident"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_STALL_ATCL2_REQ_OUT_OF_CREDITS" block=SQ event=349 descr="Total ICACHE gatcl1 stalls due to atcl2_req out of credits"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_ATCL2_INFLIGHT" block=SQ event=350 descr="The sum of ICACHE inflight ATCL1_ATCL2 requests per cycle"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_STALL_MISSFIFO_FULL" block=SQ event=351 descr="Total ICACHE gatcl1 stalls due to full miss fifo"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_TRANSLATION_MISS" block=SQ event=352 descr="Total DCACHE gatcl1 translation misses"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_PERMISSION_MISS" block=SQ event=353 descr="Total DCACHE gatcl1 permission misses"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_TRANSLATION_HIT" block=SQ event=354 descr="Total DCACHE gatcl1 translation hits"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_REQUEST" block=SQ event=355 descr="Total DCACHE CLIENT_ATCL1 NORMAL requestes"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_STALL_INFLIGHT_MAX" block=SQ event=356 descr="Total DCACHE gatcl1 stalls due to inflight counter saturation"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_STALL_LRU_INFLIGHT" block=SQ event=357 descr="Total DCACHE gatcl1 stalls due to LRU cache line with traffic inflight"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_LFIFO_FULL" block=SQ event=358 descr="Total DCACHE gatcl1 atcl2 latency hiding fifo full cycles"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_STALL_LFIFO_NOT_RES" block=SQ event=359 descr="Total DCACHE gatcl1 stalls due to atcl2 latency hiding fifo output not resident"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_STALL_ATCL2_REQ_OUT_OF_CREDITS" block=SQ event=360 descr="Total DCACHE gatcl1 stalls due to atcl2_req out of credits"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_ATCL2_INFLIGHT" block=SQ event=361 descr="The sum of DCACHE inflight ATCL1_ATCL2 requests per cycle"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_STALL_MISSFIFO_FULL" block=SQ event=362 descr="Total DCACHE gatcl1 stalls due to full miss fifo"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_STALL_MULTI_MISS" block=SQ event=363 descr="Total DCACHE gatcl1 stalls due to arbitrated multiple misses"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_HIT_FIFO_FULL" block=SQ event=364 descr="Total DCACHE gatcl1 hit fifo full cycles"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_UTCL1_INFLIGHT_LEVEL" block=SQ event=365 descr="Level Counter: # total transactions that are outstanding in UTCL1 of instruction cache (nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_UTCL1_ALL_REQ" block=SQ event=366 descr="Total number of requests (all types) going to UTCL1 of instruction cache"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_UTCL2_INFLIGHT_LEVEL" block=SQ event=367 descr="Level Counter: # total transactions that are outstanding in UTCL2 and originating from instruction cache (nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_UTCL2_ALL_REQ" block=SQ event=368 descr="Total number of requests (all types) going to UTCL2 and originating from instruction cache"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_UTCL1_INFLIGHT_LEVEL" block=SQ event=369 descr="Level Counter: # total transactions that are outstanding in UTCL1 of data cache (per-SQ, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_UTCL1_ALL_REQ" block=SQ event=370 descr="Total number of requests (all types) going to UTCL1 of data cache"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_UTCL2_INFLIGHT_LEVEL" block=SQ event=371 descr="Level Counter: # total transactions that are outstanding in UTCL2 and originating from data cache (per-SQ, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_UTCL2_ALL_REQ" block=SQ event=372 descr="Total number of requests (all types) going to UTCL2 and originating from data cache"
-  ></metric>
-  <metric
-    name="SQC_DUMMY_LAST" block=SQ event=373 descr="Just a placeholding enum to indicate the last SQC performance counter. Not a real performance counter."
-  ></metric>
-  # SX counters
-  <metric
-    name="SX_PA_IDLE_CYCLES" block=SX event=0 descr="Nr of cycles where PA was idle waiting to accept vectors from SX"
-  ></metric>
-  <metric
-    name="SX_PA_REQ" block=SX event=1 descr="Nr of PA requests received"
-  ></metric>
-  <metric
-    name="SX_PA_POS" block=SX event=2 descr="Nr of positions sent to the PA"
-  ></metric>
-  <metric
-    name="SX_CLOCK" block=SX event=3 descr="Nr of clocks where SX was busy in any way shape or form"
-  ></metric>
-  <metric
-    name="SX_GATE_EN1" block=SX event=4 descr="Nr of clocks for register accesses"
-  ></metric>
-  <metric
-    name="SX_GATE_EN2" block=SX event=5 descr="Nr of clocks for bus destination sort module"
-  ></metric>
-  <metric
-    name="SX_GATE_EN3" block=SX event=6 descr="Nr of clocks for color exports"
-  ></metric>
-  <metric
-    name="SX_GATE_EN4" block=SX event=7 descr="Nr of clocks for position exports"
-  ></metric>
-  <metric
-    name="SX_SH_POS_STARVE" block=SX event=8 descr="Nr of clocks SX is starved for Position data"
-  ></metric>
-  <metric
-    name="SX_SH_COLOR_STARVE" block=SX event=9 descr="Nr of clocks SX is starved for Color data"
-  ></metric>
-  <metric
-    name="SX_SH_POS_STALL" block=SX event=10 descr="Nr of clocks SX is being stalled by PA"
-  ></metric>
-  <metric
-    name="SX_SH_COLOR_STALL" block=SX event=11 descr="Nr of clocks SX is being stalled by at least one DB"
-  ></metric>
-  <metric
-    name="SX_DB0_PIXELS" block=SX event=12 descr="Number of pixels sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_HALF_QUADS" block=SX event=13 descr="Number of half quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_PIXEL_STALL" block=SX event=14 descr="Number of cycles where pixel traffic is stalled due to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_PIXEL_IDLE" block=SX event=15 descr="Number of cycles where the pixel traffic was idle to DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_PRED_PIXELS" block=SX event=16 descr="Nr of non predicated pixels sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB1_PIXELS" block=SX event=17 descr="Number of pixels sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_HALF_QUADS" block=SX event=18 descr="Number of half quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_PIXEL_STALL" block=SX event=19 descr="Number of cycles where pixel traffic is stalled due to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_PIXEL_IDLE" block=SX event=20 descr="Number of cycles where the pixel traffic was idle to DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_PRED_PIXELS" block=SX event=21 descr="Nr of non predicated pixels sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB2_PIXELS" block=SX event=22 descr="Number of pixels sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_HALF_QUADS" block=SX event=23 descr="Number of half quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_PIXEL_STALL" block=SX event=24 descr="Number of cycles where pixel traffic is stalled due to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_PIXEL_IDLE" block=SX event=25 descr="Number of cycles where the pixel traffic was idle to DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_PRED_PIXELS" block=SX event=26 descr="Nr of non predicated pixels sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB3_PIXELS" block=SX event=27 descr="Number of pixels sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_HALF_QUADS" block=SX event=28 descr="Number of half quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_PIXEL_STALL" block=SX event=29 descr="Number of cycles where pixel traffic is stalled due to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_PIXEL_IDLE" block=SX event=30 descr="Number of cycles where the pixel traffic was idle to DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_PRED_PIXELS" block=SX event=31 descr="Nr of non predicated pixels sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_COL_BUSY" block=SX event=32 descr="Number of cycles of color module's busy"
-  ></metric>
-  <metric
-    name="SX_POS_BUSY" block=SX event=33 descr="Number of cycles of position module's busy"
-  ></metric>
-  <metric
-    name="SX_DB0_A2M_DISCARD_QUADS" block=SX event=34 descr="Number of a2m_discard quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT0_BLEND_BYPASS" block=SX event=35 descr="Number of mrt0 blend_bypass quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT0_DONT_RD_DEST" block=SX event=36 descr="Number of mrt0 dont_rd_dest quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT0_DISCARD_SRC" block=SX event=37 descr="Number of mrt0 discard_src quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT0_SINGLE_QUADS" block=SX event=38 descr="Number of mrt0 single quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT0_DOUBLE_QUADS" block=SX event=39 descr="Number of mrt0 double quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT1_BLEND_BYPASS" block=SX event=40 descr="Number of mrt1 blend_bypass quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT1_DONT_RD_DEST" block=SX event=41 descr="Number of mrt1 dont_rd_dest quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT1_DISCARD_SRC" block=SX event=42 descr="Number of mrt1 discard_src quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT1_SINGLE_QUADS" block=SX event=43 descr="Number of mrt1 single quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT1_DOUBLE_QUADS" block=SX event=44 descr="Number of mrt1 double quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT2_BLEND_BYPASS" block=SX event=45 descr="Number of mrt2 blend_bypass quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT2_DONT_RD_DEST" block=SX event=46 descr="Number of mrt2 dont_rd_dest quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT2_DISCARD_SRC" block=SX event=47 descr="Number of mrt2 discard_src quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT2_SINGLE_QUADS" block=SX event=48 descr="Number of mrt2 single quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT2_DOUBLE_QUADS" block=SX event=49 descr="Number of mrt2 double quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT3_BLEND_BYPASS" block=SX event=50 descr="Number of mrt3 blend_bypass quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT3_DONT_RD_DEST" block=SX event=51 descr="Number of mrt3 dont_rd_dest quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT3_DISCARD_SRC" block=SX event=52 descr="Number of mrt3 discard_src quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT3_SINGLE_QUADS" block=SX event=53 descr="Number of mrt3 single quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT3_DOUBLE_QUADS" block=SX event=54 descr="Number of mrt3 double quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT4_BLEND_BYPASS" block=SX event=55 descr="Number of mrt4 blend_bypass quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT4_DONT_RD_DEST" block=SX event=56 descr="Number of mrt4 dont_rd_dest quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT4_DISCARD_SRC" block=SX event=57 descr="Number of mrt4 discard_src quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT4_SINGLE_QUADS" block=SX event=58 descr="Number of mrt4 single quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT4_DOUBLE_QUADS" block=SX event=59 descr="Number of mrt4 double quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT5_BLEND_BYPASS" block=SX event=60 descr="Number of mrt5 blend_bypass quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT5_DONT_RD_DEST" block=SX event=61 descr="Number of mrt5 dont_rd_dest quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT5_DISCARD_SRC" block=SX event=62 descr="Number of mrt5 discard_src quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT5_SINGLE_QUADS" block=SX event=63 descr="Number of mr5 single quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT5_DOUBLE_QUADS" block=SX event=64 descr="Number of mrt5 double quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT6_BLEND_BYPASS" block=SX event=65 descr="Number of mrt6 blend_bypass quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT6_DONT_RD_DEST" block=SX event=66 descr="Number of mrt6 dont_rd_dest quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT6_DISCARD_SRC" block=SX event=67 descr="Number of mrt6 discard_src quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT6_SINGLE_QUADS" block=SX event=68 descr="Number of mrt6 single quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT6_DOUBLE_QUADS" block=SX event=69 descr="Number of mrt6 double quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT7_BLEND_BYPASS" block=SX event=70 descr="Number of mrt7 blend_bypass quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT7_DONT_RD_DEST" block=SX event=71 descr="Number of mrt7 dont_rd_dest quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT7_DISCARD_SRC" block=SX event=72 descr="Number of mrt7 discard_src quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT7_SINGLE_QUADS" block=SX event=73 descr="Number of mrt7 single quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT7_DOUBLE_QUADS" block=SX event=74 descr="Number of mrt7 double quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB1_A2M_DISCARD_QUADS" block=SX event=75 descr="Number of a2m_discard quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT0_BLEND_BYPASS" block=SX event=76 descr="Number of mrt0 blend_bypass quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT0_DONT_RD_DEST" block=SX event=77 descr="Number of mrt0 dont_rd_dest quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT0_DISCARD_SRC" block=SX event=78 descr="Number of mrt0 discard_src quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT0_SINGLE_QUADS" block=SX event=79 descr="Number of mrt0 single quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT0_DOUBLE_QUADS" block=SX event=80 descr="Number of mrt0 double quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT1_BLEND_BYPASS" block=SX event=81 descr="Number of mrt1 blend_bypass quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT1_DONT_RD_DEST" block=SX event=82 descr="Number of mrt1 dont_rd_dest quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT1_DISCARD_SRC" block=SX event=83 descr="Number of mrt1 discard_src quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT1_SINGLE_QUADS" block=SX event=84 descr="Number of mrt1 single quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT1_DOUBLE_QUADS" block=SX event=85 descr="Number of mrt1 double quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT2_BLEND_BYPASS" block=SX event=86 descr="Number of mrt2 blend_bypass quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT2_DONT_RD_DEST" block=SX event=87 descr="Number of mrt2 dont_rd_dest quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT2_DISCARD_SRC" block=SX event=88 descr="Number of mrt2 discard_src quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT2_SINGLE_QUADS" block=SX event=89 descr="Number of mrt2 single quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT2_DOUBLE_QUADS" block=SX event=90 descr="Number of mrt2 double quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT3_BLEND_BYPASS" block=SX event=91 descr="Number of mrt3 blend_bypass quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT3_DONT_RD_DEST" block=SX event=92 descr="Number of mrt3 dont_rd_dest quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT3_DISCARD_SRC" block=SX event=93 descr="Number of mrt3 discard_src quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT3_SINGLE_QUADS" block=SX event=94 descr="Number of mrt3 single quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT3_DOUBLE_QUADS" block=SX event=95 descr="Number of mrt3 double quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT4_BLEND_BYPASS" block=SX event=96 descr="Number of mrt4 blend_bypass quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT4_DONT_RD_DEST" block=SX event=97 descr="Number of mrt4 dont_rd_dest quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT4_DISCARD_SRC" block=SX event=98 descr="Number of mrt4 discard_src quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT4_SINGLE_QUADS" block=SX event=99 descr="Number of mrt4 single quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT4_DOUBLE_QUADS" block=SX event=100 descr="Number of mrt4 double quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT5_BLEND_BYPASS" block=SX event=101 descr="Number of mrt5 blend_bypass quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT5_DONT_RD_DEST" block=SX event=102 descr="Number of mrt5 dont_rd_dest quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT5_DISCARD_SRC" block=SX event=103 descr="Number of mrt5 discard_src quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT5_SINGLE_QUADS" block=SX event=104 descr="Number of mr5 single quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT5_DOUBLE_QUADS" block=SX event=105 descr="Number of mrt5 double quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT6_BLEND_BYPASS" block=SX event=106 descr="Number of mrt6 blend_bypass quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT6_DONT_RD_DEST" block=SX event=107 descr="Number of mrt6 dont_rd_dest quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT6_DISCARD_SRC" block=SX event=108 descr="Number of mrt6 discard_src quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT6_SINGLE_QUADS" block=SX event=109 descr="Number of mrt6 single quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT6_DOUBLE_QUADS" block=SX event=110 descr="Number of mrt6 double quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT7_BLEND_BYPASS" block=SX event=111 descr="Number of mrt7 blend_bypass quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT7_DONT_RD_DEST" block=SX event=112 descr="Number of mrt7 dont_rd_dest quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT7_DISCARD_SRC" block=SX event=113 descr="Number of mrt7 discard_src quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT7_SINGLE_QUADS" block=SX event=114 descr="Number of mrt7 single quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT7_DOUBLE_QUADS" block=SX event=115 descr="Number of mrt7 double quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB2_A2M_DISCARD_QUADS" block=SX event=116 descr="Number of a2m_discard quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT0_BLEND_BYPASS" block=SX event=117 descr="Number of mrt0 blend_bypass quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT0_DONT_RD_DEST" block=SX event=118 descr="Number of mrt0 dont_rd_dest quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT0_DISCARD_SRC" block=SX event=119 descr="Number of mrt0 discard_src quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT0_SINGLE_QUADS" block=SX event=120 descr="Number of mrt0 single quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT0_DOUBLE_QUADS" block=SX event=121 descr="Number of mrt0 double quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT1_BLEND_BYPASS" block=SX event=122 descr="Number of mrt1 blend_bypass quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT1_DONT_RD_DEST" block=SX event=123 descr="Number of mrt1 dont_rd_dest quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT1_DISCARD_SRC" block=SX event=124 descr="Number of mrt1 discard_src quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT1_SINGLE_QUADS" block=SX event=125 descr="Number of mrt1 single quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT1_DOUBLE_QUADS" block=SX event=126 descr="Number of mrt1 double quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT2_BLEND_BYPASS" block=SX event=127 descr="Number of mrt2 blend_bypass quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT2_DONT_RD_DEST" block=SX event=128 descr="Number of mrt2 dont_rd_dest quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT2_DISCARD_SRC" block=SX event=129 descr="Number of mrt2 discard_src quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT2_SINGLE_QUADS" block=SX event=130 descr="Number of mrt2 single quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT2_DOUBLE_QUADS" block=SX event=131 descr="Number of mrt2 double quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT3_BLEND_BYPASS" block=SX event=132 descr="Number of mrt3 blend_bypass quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT3_DONT_RD_DEST" block=SX event=133 descr="Number of mrt3 dont_rd_dest quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT3_DISCARD_SRC" block=SX event=134 descr="Number of mrt3 discard_src quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT3_SINGLE_QUADS" block=SX event=135 descr="Number of mrt3 single quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT3_DOUBLE_QUADS" block=SX event=136 descr="Number of mrt3 double quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT4_BLEND_BYPASS" block=SX event=137 descr="Number of mrt4 blend_bypass quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT4_DONT_RD_DEST" block=SX event=138 descr="Number of mrt4 dont_rd_dest quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT4_DISCARD_SRC" block=SX event=139 descr="Number of mrt4 discard_src quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT4_SINGLE_QUADS" block=SX event=140 descr="Number of mrt4 single quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT4_DOUBLE_QUADS" block=SX event=141 descr="Number of mrt4 double quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT5_BLEND_BYPASS" block=SX event=142 descr="Number of mrt5 blend_bypass quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT5_DONT_RD_DEST" block=SX event=143 descr="Number of mrt5 dont_rd_dest quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT5_DISCARD_SRC" block=SX event=144 descr="Number of mrt5 discard_src quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT5_SINGLE_QUADS" block=SX event=145 descr="Number of mr5 single quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT5_DOUBLE_QUADS" block=SX event=146 descr="Number of mrt5 double quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT6_BLEND_BYPASS" block=SX event=147 descr="Number of mrt6 blend_bypass quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT6_DONT_RD_DEST" block=SX event=148 descr="Number of mrt6 dont_rd_dest quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT6_DISCARD_SRC" block=SX event=149 descr="Number of mrt6 discard_src quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT6_SINGLE_QUADS" block=SX event=150 descr="Number of mrt6 single quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT6_DOUBLE_QUADS" block=SX event=151 descr="Number of mrt6 double quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT7_BLEND_BYPASS" block=SX event=152 descr="Number of mrt7 blend_bypass quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT7_DONT_RD_DEST" block=SX event=153 descr="Number of mrt7 dont_rd_dest quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT7_DISCARD_SRC" block=SX event=154 descr="Number of mrt7 discard_src quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT7_SINGLE_QUADS" block=SX event=155 descr="Number of mrt7 single quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT7_DOUBLE_QUADS" block=SX event=156 descr="Number of mrt7 double quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB3_A2M_DISCARD_QUADS" block=SX event=157 descr="Number of a2m_discard quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT0_BLEND_BYPASS" block=SX event=158 descr="Number of mrt0 blend_bypass quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT0_DONT_RD_DEST" block=SX event=159 descr="Number of mrt0 dont_rd_dest quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT0_DISCARD_SRC" block=SX event=160 descr="Number of mrt0 discard_src quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT0_SINGLE_QUADS" block=SX event=161 descr="Number of mrt0 single quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT0_DOUBLE_QUADS" block=SX event=162 descr="Number of mrt0 double quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT1_BLEND_BYPASS" block=SX event=163 descr="Number of mrt1 blend_bypass quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT1_DONT_RD_DEST" block=SX event=164 descr="Number of mrt1 dont_rd_dest quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT1_DISCARD_SRC" block=SX event=165 descr="Number of mrt1 discard_src quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT1_SINGLE_QUADS" block=SX event=166 descr="Number of mrt1 single quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT1_DOUBLE_QUADS" block=SX event=167 descr="Number of mrt1 double quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT2_BLEND_BYPASS" block=SX event=168 descr="Number of mrt2 blend_bypass quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT2_DONT_RD_DEST" block=SX event=169 descr="Number of mrt2 dont_rd_dest quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT2_DISCARD_SRC" block=SX event=170 descr="Number of mrt2 discard_src quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT2_SINGLE_QUADS" block=SX event=171 descr="Number of mrt2 single quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT2_DOUBLE_QUADS" block=SX event=172 descr="Number of mrt2 double quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT3_BLEND_BYPASS" block=SX event=173 descr="Number of mrt3 blend_bypass quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT3_DONT_RD_DEST" block=SX event=174 descr="Number of mrt3 dont_rd_dest quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT3_DISCARD_SRC" block=SX event=175 descr="Number of mrt3 discard_src quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT3_SINGLE_QUADS" block=SX event=176 descr="Number of mrt3 single quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT3_DOUBLE_QUADS" block=SX event=177 descr="Number of mrt3 double quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT4_BLEND_BYPASS" block=SX event=178 descr="Number of mrt4 blend_bypass quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT4_DONT_RD_DEST" block=SX event=179 descr="Number of mrt4 dont_rd_dest quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT4_DISCARD_SRC" block=SX event=180 descr="Number of mrt4 discard_src quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT4_SINGLE_QUADS" block=SX event=181 descr="Number of mrt4 single quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT4_DOUBLE_QUADS" block=SX event=182 descr="Number of mrt4 double quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT5_BLEND_BYPASS" block=SX event=183 descr="Number of mrt5 blend_bypass quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT5_DONT_RD_DEST" block=SX event=184 descr="Number of mrt5 dont_rd_dest quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT5_DISCARD_SRC" block=SX event=185 descr="Number of mrt5 discard_src quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT5_SINGLE_QUADS" block=SX event=186 descr="Number of mr5 single quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT5_DOUBLE_QUADS" block=SX event=187 descr="Number of mrt5 double quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT6_BLEND_BYPASS" block=SX event=188 descr="Number of mrt6 blend_bypass quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT6_DONT_RD_DEST" block=SX event=189 descr="Number of mrt6 dont_rd_dest quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT6_DISCARD_SRC" block=SX event=190 descr="Number of mrt6 discard_src quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT6_SINGLE_QUADS" block=SX event=191 descr="Number of mrt6 single quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT6_DOUBLE_QUADS" block=SX event=192 descr="Number of mrt6 double quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT7_BLEND_BYPASS" block=SX event=193 descr="Number of mrt7 blend_bypass quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT7_DONT_RD_DEST" block=SX event=194 descr="Number of mrt7 dont_rd_dest quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT7_DISCARD_SRC" block=SX event=195 descr="Number of mrt7 discard_src quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT7_SINGLE_QUADS" block=SX event=196 descr="Number of mrt7 single quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT7_DOUBLE_QUADS" block=SX event=197 descr="Number of mrt7 double quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_PA_REQ_LATENCY" block=SX event=198 descr="Number of all pa request latency"
-  ></metric>
-  <metric
-    name="SX_POS_SCBD_STALL" block=SX event=199 descr="Number of cycles SX is being stalled by position scoreboard"
-  ></metric>
-  <metric
-    name="SX_COL_SCBD_STALL" block=SX event=200 descr="Number of cycles SX is being stalled by color scoreboard"
-  ></metric>
-  <metric
-    name="SX_CLOCK_DROP_STALL" block=SX event=201 descr="Number of cycles where SX was busy in any way shape or form excluding stall cycles"
-  ></metric>
-  <metric
-    name="SX_GATE_EN5" block=SX event=202 descr="Number of cycles for color exports excluding stall cycles"
-  ></metric>
-  <metric
-    name="SX_GATE_EN6" block=SX event=203 descr="Number of cycles for position exports excluding stall cycles"
-  ></metric>
-  <metric
-    name="SX_DB0_SIZE" block=SX event=204 descr="Number of dw (current smallest unit) send to DB0"
-  ></metric>
-  <metric
-    name="SX_DB1_SIZE" block=SX event=205 descr="Number of dw (current smallest unit) send to DB1"
-  ></metric>
-  <metric
-    name="SX_DB2_SIZE" block=SX event=206 descr="Number of dw (current smallest unit) send to DB2"
-  ></metric>
-  <metric
-    name="SX_DB3_SIZE" block=SX event=207 descr="Number of dw (current smallest unit) send to DB3"
-  ></metric>
-  # TA counters
-  <metric
-    name="TA_NULL" block=TA event=0 descr="NULL"
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_BUSY" block=TA event=1 descr="sh_fifo subblock is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_CMD_BUSY" block=TA event=2 descr="sh_fifo subblock, cmd fifo section is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_ADDR_BUSY" block=TA event=3 descr="sh_fifo subblock, addr fifo section is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_DATA_BUSY" block=TA event=4 descr="sh_fifo subblock, data fifo section is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_DATA_SFIFO_BUSY" block=TA event=5 descr="sh_fifo subblock, data sfifo section is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_DATA_TFIFO_BUSY" block=TA event=6 descr="sh_fifo subblock, data tfifo section is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_GRADIENT_BUSY" block=TA event=7 descr="Deriv/Dispatch/Input subblocks are busy busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_GRADIENT_FIFO_BUSY" block=TA event=8 descr="Gradient FIFO subblock is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_LOD_BUSY" block=TA event=9 descr="Aniso subblock is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_LOD_FIFO_BUSY" block=TA event=10 descr="LOD FIFO subblock is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_ADDRESSER_BUSY" block=TA event=11 descr="Addresser subblock is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_ADDRESSER_FIFO_BUSY" block=TA event=12 descr="Addresser FIFO subblock is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_ALIGNER_BUSY" block=TA event=13 descr="Aligner subblock is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_WRITE_PATH_BUSY" block=TA event=14 descr="Write Path subblock is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_TA_BUSY" block=TA event=15 descr="TA block is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SQ_TA_CMD_CYCLES" block=TA event=16 descr="Number of input cycles input on SQ_TA_cmd interface. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SP_TA_ADDR_CYCLES" block=TA event=17 descr="Number of input cycles input on SP_TA_addr interface. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SP_TA_DATA_CYCLES" block=TA event=18 descr="Number of input cycles input on SP_TA_data interface. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_TA_FA_DATA_STATE_CYCLES" block=TA event=19 descr="Number of input cycles input on TA_FA wrts interface. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_ADDR_WAITING_ON_CMD_CYCLES" block=TA event=20 descr="Number of cycles addr waiting on cmd in sh_fifo subblock. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_CMD_WAITING_ON_ADDR_CYCLES" block=TA event=21 descr="Number of cycles cmd waiting on addr in sh_fifo subblock. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_ADDR_STARVED_WHILE_BUSY_CYCLES" block=TA event=22 descr="Number of cycles addr starved while busy in sh_fifo subblock. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_CMD_STARVED_WHILE_BUSY_CYCLES" block=TA event=23 descr="Number of cycles cmd starved while busy in sh_fifo subblock. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_DATA_WAITING_ON_DATA_STATE_CYCLES" block=TA event=24 descr="Number of cycles data waiting on data state in sh_fifo subblock. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_DATA_STATE_WAITING_ON_DATA_CYCLES" block=TA event=25 descr="Number of cycles data state waiting on data in sh_fifo subblock. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_DATA_STARVED_WHILE_BUSY_CYCLES" block=TA event=26 descr="Number of cycles data starved while busy in sh_fifo subblock. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_DATA_STATE_STARVED_WHILE_BUSY_CYCLES" block=TA event=27 descr="Number of cycles data state starved while busy in sh_fifo subblock. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_TA_SH_FIFO_STARVED" block=TA event=28 descr="Starved signal for all sub-fifos in TA_SH_FIFO"
-  ></metric>
-  <metric
-    name="TA_RESERVED_29" block=TA event=29 descr="RESERVED 29."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_ADDR_CYCLES" block=TA event=30 descr="Number of address cycles issued by sh_fifo to sh_dispatch subblock."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_DATA_CYCLES" block=TA event=31 descr="Number of data cycles issued by sh_fifo to sh_dispatch subblock."
-  ></metric>
-  <metric
-    name="TA_TOTAL_WAVEFRONTS" block=TA event=32 descr="Total number of wavefronts processed by TA."
-  ></metric>
-  <metric
-    name="TA_GRADIENT_CYCLES" block=TA event=33 descr="Number of cycles issued by the per-pixel-gradient state machine."
-  ></metric>
-  <metric
-    name="TA_WALKER_CYCLES" block=TA event=34 descr="Number of cycles issued by the sampler state machine."
-  ></metric>
-  <metric
-    name="TA_ALIGNER_CYCLES" block=TA event=35 descr="Number of cycles issued by the aligner state machine."
-  ></metric>
-  <metric
-    name="TA_IMAGE_WAVEFRONTS" block=TA event=36 descr="Number of image wavefronts processed by TA."
-  ></metric>
-  <metric
-    name="TA_IMAGE_READ_WAVEFRONTS" block=TA event=37 descr="Number of image read (Sample*, Load*, Gather4*) wavefronts processed by TA."
-  ></metric>
-  <metric
-    name="TA_IMAGE_WRITE_WAVEFRONTS" block=TA event=38 descr="Number of image write wavefronts processed by TA."
-  ></metric>
-  <metric
-    name="TA_IMAGE_ATOMIC_WAVEFRONTS" block=TA event=39 descr="Number of image atomic wavefronts processed by TA."
-  ></metric>
-  <metric
-    name="TA_IMAGE_TOTAL_CYCLES" block=TA event=40 descr="Number of image cycles issued to TC."
-  ></metric>
-  <metric
-    name="TA_RESERVED_41" block=TA event=41 descr="RESERVED 41."
-  ></metric>
-  <metric
-    name="TA_RESERVED_42" block=TA event=42 descr="RESERVED 42."
-  ></metric>
-  <metric
-    name="TA_RESERVED_43" block=TA event=43 descr="RESERVED 43."
-  ></metric>
-  <metric
-    name="TA_BUFFER_WAVEFRONTS" block=TA event=44 descr="Number of buffer wavefronts processed by TA."
-  ></metric>
-  <metric
-    name="TA_BUFFER_READ_WAVEFRONTS" block=TA event=45 descr="Number of buffer read wavefronts processed by TA."
-  ></metric>
-  <metric
-    name="TA_BUFFER_WRITE_WAVEFRONTS" block=TA event=46 descr="Number of buffer write wavefronts processed by TA."
-  ></metric>
-  <metric
-    name="TA_BUFFER_ATOMIC_WAVEFRONTS" block=TA event=47 descr="Number of buffer atomic wavefronts processed by TA."
-  ></metric>
-  <metric
-    name="TA_BUFFER_COALESCABLE_WAVEFRONTS" block=TA event=48 descr="Number of buffer coalesceable wavefronts processed by TA."
-  ></metric>
-  <metric
-    name="TA_BUFFER_TOTAL_CYCLES" block=TA event=49 descr="Number of buffer cycles issued to TC."
-  ></metric>
-  <metric
-    name="TA_BUFFER_COALESCABLE_ADDR_MULTICYCLED_CYCLES" block=TA event=50 descr="Number of buffer coalesceable cycles issued to TC that were not coalesced due to addresser."
-  ></metric>
-  <metric
-    name="TA_BUFFER_COALESCABLE_CLAMP_16KDWORD_MULTICYCLED_CYCLES" block=TA event=51 descr="Number of buffer coalesceable cycles issued to TC that were not coalesced due to clamping or 64KB bounds check."
-  ></metric>
-  <metric
-    name="TA_BUFFER_COALESCED_READ_CYCLES" block=TA event=52 descr="Number of buffer coalesced read cycles issued to TC."
-  ></metric>
-  <metric
-    name="TA_BUFFER_COALESCED_WRITE_CYCLES" block=TA event=53 descr="Number of buffer coalesced write cycles issued to TC."
-  ></metric>
-  <metric
-    name="TA_ADDR_STALLED_BY_TC_CYCLES" block=TA event=54 descr="Number of cycles addr path stalled by TC. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_ADDR_STALLED_BY_TD_CYCLES" block=TA event=55 descr="Number of cycles addr path stalled by TD. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_DATA_STALLED_BY_TC_CYCLES" block=TA event=56 descr="Number of cycles data path stalled by TC. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_ADDRESSER_STALLED_BY_ALIGNER_ONLY_CYCLES" block=TA event=57 descr="Number of cycles Addresser stalled by Aligner and not further down the pipe. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_ADDRESSER_STALLED_CYCLES" block=TA event=58 descr="Number of cycles Addresser stalled. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_ANISO_STALLED_BY_ADDRESSER_ONLY_CYCLES" block=TA event=59 descr="Number of cycles Aniso stalled by Addresser and not further down the pipe. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_ANISO_STALLED_CYCLES" block=TA event=60 descr="Number of cycles Aniso stalled. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_DERIV_STALLED_BY_ANISO_ONLY_CYCLES" block=TA event=61 descr="Number of cycles Deriv stalled by Aniso and not further down the pipe. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_DERIV_STALLED_CYCLES" block=TA event=62 descr="Number of cycles Deriv stalled. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_ANISO_GT1_CYCLE_QUADS" block=TA event=63 descr="Number of quads requiring more than 1 aniso sample."
-  ></metric>
-  <metric
-    name="TA_COLOR_1_CYCLE_PIXELS" block=TA event=64 descr="Number of pixels requiring sampler state machine to take 1 cycle due to format."
-  ></metric>
-  <metric
-    name="TA_COLOR_2_CYCLE_PIXELS" block=TA event=65 descr="Number of pixels requiring sampler state machine to take 2 cycle due to format."
-  ></metric>
-  <metric
-    name="TA_COLOR_3_CYCLE_PIXELS" block=TA event=66 descr="Number of pixels requiring sampler state machine to take 3 cycle due to format."
-  ></metric>
-  <metric
-    name="TA_COLOR_4_CYCLE_PIXELS" block=TA event=67 descr="Number of pixels requiring sampler state machine to take 4 cycle due to format."
-  ></metric>
-  <metric
-    name="TA_MIP_1_CYCLE_PIXELS" block=TA event=68 descr="Number of pixels requiring sampler state machine to take 1 cycle due to mip filter."
-  ></metric>
-  <metric
-    name="TA_MIP_2_CYCLE_PIXELS" block=TA event=69 descr="Number of pixels requiring sampler state machine to take 2 cycle due to mip filter."
-  ></metric>
-  <metric
-    name="TA_VOL_1_CYCLE_PIXELS" block=TA event=70 descr="Number of pixels requiring sampler state machine to take 1 cycle due to z filter."
-  ></metric>
-  <metric
-    name="TA_VOL_2_CYCLE_PIXELS" block=TA event=71 descr="Number of pixels requiring sampler state machine to take 2 cycle due to z filter."
-  ></metric>
-  <metric
-    name="TA_BILIN_POINT_1_CYCLE_PIXELS" block=TA event=72 descr="Number of pixels requiring sampler state machine to take 1 cycle due to xy filter."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_0_SAMPLES" block=TA event=73 descr="Number of samples fetched from mip 0."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_1_SAMPLES" block=TA event=74 descr="Number of samples fetched from mip 1."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_2_SAMPLES" block=TA event=75 descr="Number of samples fetched from mip 2."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_3_SAMPLES" block=TA event=76 descr="Number of samples fetched from mip 3."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_4_SAMPLES" block=TA event=77 descr="Number of samples fetched from mip 4."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_5_SAMPLES" block=TA event=78 descr="Number of samples fetched from mip 5."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_6_SAMPLES" block=TA event=79 descr="Number of samples fetched from mip 6."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_7_SAMPLES" block=TA event=80 descr="Number of samples fetched from mip 7."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_8_SAMPLES" block=TA event=81 descr="Number of samples fetched from mip 8."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_9_SAMPLES" block=TA event=82 descr="Number of samples fetched from mip 9."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_10_SAMPLES" block=TA event=83 descr="Number of samples fetched from mip 10."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_11_SAMPLES" block=TA event=84 descr="Number of samples fetched from mip 11."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_12_SAMPLES" block=TA event=85 descr="Number of samples fetched from mip 12."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_13_SAMPLES" block=TA event=86 descr="Number of samples fetched from mip 13."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_14_SAMPLES" block=TA event=87 descr="Number of samples fetched from mip 14."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_INVALID_SAMPLES" block=TA event=88 descr="Number of samples marked invalid using mip 15 method."
-  ></metric>
-  <metric
-    name="TA_ANISO_1_CYCLE_QUADS" block=TA event=89 descr="Number of quads requiring 1 aniso sample."
-  ></metric>
-  <metric
-    name="TA_ANISO_2_CYCLE_QUADS" block=TA event=90 descr="Number of quads requiring 2 aniso sample."
-  ></metric>
-  <metric
-    name="TA_ANISO_4_CYCLE_QUADS" block=TA event=91 descr="Number of quads requiring 4 aniso sample."
-  ></metric>
-  <metric
-    name="TA_ANISO_6_CYCLE_QUADS" block=TA event=92 descr="Number of quads requiring 6 aniso sample."
-  ></metric>
-  <metric
-    name="TA_ANISO_8_CYCLE_QUADS" block=TA event=93 descr="Number of quads requiring 8 aniso sample."
-  ></metric>
-  <metric
-    name="TA_ANISO_10_CYCLE_QUADS" block=TA event=94 descr="Number of quads requiring 10 aniso sample."
-  ></metric>
-  <metric
-    name="TA_ANISO_12_CYCLE_QUADS" block=TA event=95 descr="Number of quads requiring 12 aniso sample."
-  ></metric>
-  <metric
-    name="TA_ANISO_14_CYCLE_QUADS" block=TA event=96 descr="Number of quads requiring 14 aniso sample."
-  ></metric>
-  <metric
-    name="TA_ANISO_16_CYCLE_QUADS" block=TA event=97 descr="Number of quads requiring 16 aniso sample."
-  ></metric>
-  <metric
-    name="TA_WRITE_PATH_INPUT_CYCLES" block=TA event=98 descr="Number of cycles received from write datapath from sh_dispatct."
-  ></metric>
-  <metric
-    name="TA_WRITE_PATH_OUTPUT_CYCLES" block=TA event=99 descr="Number of cycles sent from write datapath to TC."
-  ></metric>
-  <metric
-    name="TA_FLAT_WAVEFRONTS" block=TA event=100 descr="Number of flat opcode wavfronts processed by the TA."
-  ></metric>
-  <metric
-    name="TA_FLAT_READ_WAVEFRONTS" block=TA event=101 descr="Number of flat opcode reads processed by the TA."
-  ></metric>
-  <metric
-    name="TA_FLAT_WRITE_WAVEFRONTS" block=TA event=102 descr="Number of flat opcode writes processed by the TA."
-  ></metric>
-  <metric
-    name="TA_FLAT_ATOMIC_WAVEFRONTS" block=TA event=103 descr="Number of flat opcode atomics processed by the TA."
-  ></metric>
-  <metric
-    name="TA_FLAT_COALESCEABLE_WAVEFRONTS" block=TA event=104 descr="Number of flat opcode coalesceale ops processed by the TA."
-  ></metric>
-  <metric
-    name="TA_REG_SCLK_VLD" block=TA event=105 descr="Number of cycles reg_sclk is active. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_LOCAL_CG_DYN_SCLK_GRP0_EN" block=TA event=106 descr="Number of cycles grp0 sclk is active. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_LOCAL_CG_DYN_SCLK_GRP1_EN" block=TA event=107 descr="Number of cycles grp1 sclk is active. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_LOCAL_CG_DYN_SCLK_GRP1_MEMS_EN" block=TA event=108 descr="Number of cycles grp1_mems sclk is active. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_LOCAL_CG_DYN_SCLK_GRP4_EN" block=TA event=109 descr="Number of cycles grp4 sclk is active. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_LOCAL_CG_DYN_SCLK_GRP5_EN" block=TA event=110 descr="Number of cycles grp5 sclk is active. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_XNACK_ON_PHASE0" block=TA event=111 descr="None zero Xnack mask returned on phase0. This counter is always 0x0 for configurations that do not support XNACKs. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_XNACK_ON_PHASE1" block=TA event=112 descr="None zero Xnack mask returned on phase1. This counter is always 0x0 for configurations that do not support XNACKs. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_XNACK_ON_PHASE2" block=TA event=113 descr="None zero Xnack mask returned on phase2. This counter is always 0x0 for configurations that do not support XNACKs. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_XNACK_ON_PHASE3" block=TA event=114 descr="None zero Xnack mask returned on phase3. This counter is always 0x0 for configurations that do not support XNACKs. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_FIRST_XNACK_ON_PHASE0" block=TA event=115 descr="First Xnack of an instruction occured on phase0. This counter is always 0x0 for configurations that do not support XNACKs. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_FIRST_XNACK_ON_PHASE1" block=TA event=116 descr="First Xnack of an instruction occured on phase1. This counter is always 0x0 for configurations that do not support XNACKs. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_FIRST_XNACK_ON_PHASE2" block=TA event=117 descr="First Xnack of an instruction occured on phase2. This counter is always 0x0 for configurations that do not support XNACKs. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_FIRST_XNACK_ON_PHASE3" block=TA event=118 descr="First Xnack of an instruction occured on phase3. This counter is always 0x0 for configurations that do not support XNACKs. Perf_Windowing not supported for this counter."
-  ></metric>
-  # TCA counters
-  <metric
-    name="TCA_NONE" block=TCA event=0 descr="Don't count anything."
-  ></metric>
-  <metric
-    name="TCA_CYCLE" block=TCA event=1 descr="Number of cycles. Not windowable."
-  ></metric>
-  <metric
-    name="TCA_BUSY" block=TCA event=2 descr="Number of cycles we have a request pending. Not windowable."
-  ></metric>
-  <metric
-    name="TCA_FORCED_HOLE_TCC0" block=TCA event=3 descr="Number of TCC0 hole requests that waited so long that it was decided that they should be forced rather than opportunistic. The TCC number is based on the TCCs connected to this TCA and not on the global numbering."
-  ></metric>
-  <metric
-    name="TCA_FORCED_HOLE_TCC1" block=TCA event=4 descr=""
-  ></metric>
-  <metric
-    name="TCA_FORCED_HOLE_TCC2" block=TCA event=5 descr=""
-  ></metric>
-  <metric
-    name="TCA_FORCED_HOLE_TCC3" block=TCA event=6 descr=""
-  ></metric>
-  <metric
-    name="TCA_FORCED_HOLE_TCC4" block=TCA event=7 descr=""
-  ></metric>
-  <metric
-    name="TCA_FORCED_HOLE_TCC5" block=TCA event=8 descr=""
-  ></metric>
-  <metric
-    name="TCA_FORCED_HOLE_TCC6" block=TCA event=9 descr=""
-  ></metric>
-  <metric
-    name="TCA_FORCED_HOLE_TCC7" block=TCA event=10 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC0" block=TCA event=11 descr="Number of requests sent to TCC0. This should report the same thing as TCC_PERF_SEL_REQ in the corresponding TCC in the long run. It is only offered to create a deterministic counter in the TCA so that the counters may be sanity tested."
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC1" block=TCA event=12 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC2" block=TCA event=13 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC3" block=TCA event=14 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC4" block=TCA event=15 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC5" block=TCA event=16 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC6" block=TCA event=17 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC7" block=TCA event=18 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_DOUBLE_ARB_TCC0" block=TCA event=19 descr="Number of cycles two requests were sent in one clock to TCC0. The TCC number is based on the TCCs connected to this TCA and not on the global numbering."
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_DOUBLE_ARB_TCC1" block=TCA event=20 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_DOUBLE_ARB_TCC2" block=TCA event=21 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_DOUBLE_ARB_TCC3" block=TCA event=22 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_DOUBLE_ARB_TCC4" block=TCA event=23 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_DOUBLE_ARB_TCC5" block=TCA event=24 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_DOUBLE_ARB_TCC6" block=TCA event=25 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_DOUBLE_ARB_TCC7" block=TCA event=26 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCC0" block=TCA event=27 descr="Number of cycles no requests could be sent to TCC0 because its fifos were expected to be full. The TCC number is based on the TCCs connected to this TCA and not on the global numbering."
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCC1" block=TCA event=28 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCC2" block=TCA event=29 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCC3" block=TCA event=30 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCC4" block=TCA event=31 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCC5" block=TCA event=32 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCC6" block=TCA event=33 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCC7" block=TCA event=34 descr=""
-  ></metric>
-  # TCC counters
-  <metric
-    name="TCC_NONE" block=TCC event=0 descr="Don't count anything."
-  ></metric>
-  <metric
-    name="TCC_CYCLE" block=TCC event=1 descr="Number of cycles. Not windowable."
-  ></metric>
-  <metric
-    name="TCC_BUSY" block=TCC event=2 descr="Number of cycles we have a request pending. Not windowable."
-  ></metric>
-  <metric
-    name="TCC_REQ" block=TCC event=3 descr="Number of requests of all types. This is measured at the tag block. This may be more than the number of requests arriving at the TCC, but it is a good indication of the total amount of work that needs to be performed."
-  ></metric>
-  <metric
-    name="TCC_STREAMING_REQ" block=TCC event=4 descr="Number of streaming requests. This is measured at the tag block."
-  ></metric>
-  <metric
-    name="TCC_COMPRESSED_REQ" block=TCC event=5 descr="Number of compressed requests. This includes requests that read 0 bytes of compressed data. Metadata requests are not included. This is measured at the tag block."
-  ></metric>
-  <metric
-    name="TCC_COMPRESSED_0_REQ" block=TCC event=6 descr="Number of compressed requests that read 0 bytes of compressed data. Metadata requests are not included. This is measured at the tag block."
-  ></metric>
-  <metric
-    name="TCC_COMPRESSED_32_REQ" block=TCC event=7 descr="Number of compressed requests that read 32 bytes of compressed data. Metadata requests are not included. This is measured at the tag block."
-  ></metric>
-  <metric
-    name="TCC_METADATA_REQ" block=TCC event=8 descr="Number of metadata requests. This is measured at the tag block."
-  ></metric>
-  <metric
-    name="TCC_NC_REQ" block=TCC event=9 descr="The number of noncoherently cached requests. This is measured at the tag block."
-  ></metric>
-  <metric
-    name="TCC_UC_REQ" block=TCC event=10 descr="The number of uncached requests. This is measured at the tag block."
-  ></metric>
-  <metric
-    name="TCC_CC_REQ" block=TCC event=11 descr="The number of coherently cached requests. This is measured at the tag block."
-  ></metric>
-  <metric
-    name="TCC_PROBE" block=TCC event=12 descr="Number of probe requests. Not windowable."
-  ></metric>
-  <metric
-    name="TCC_PROBE_ALL" block=TCC event=13 descr="Number of external probe requests with with EA_TCC_preq_all== 1. Not windowable."
-  ></metric>
-  <metric
-    name="TCC_INTERNAL_PROBE" block=TCC event=14 descr="Number of self-probes spawned by TCC for CC writes/atomic operations. Not windowable."
-  ></metric>
-  <metric
-    name="TCC_READ" block=TCC event=15 descr="Number of read requests. Compressed reads are included in this, but metadata reads are not included."
-  ></metric>
-  <metric
-    name="TCC_WRITE" block=TCC event=16 descr="Number of write requests."
-  ></metric>
-  <metric
-    name="TCC_ATOMIC" block=TCC event=17 descr="Number of atomic requests of all types."
-  ></metric>
-  <metric
-    name="TCC_NOP_ACK" block=TCC event=18 descr="Number of NOP_ACK requests."
-  ></metric>
-  <metric
-    name="TCC_NOP_RTN0" block=TCC event=19 descr="Number of NOP_RTN0 requests."
-  ></metric>
-  <metric
-    name="TCC_HIT" block=TCC event=20 descr="Number of cache hits."
-  ></metric>
-  <metric
-    name="TCC_SECTOR_HIT" block=TCC event=21 descr="Number of cache sector hits."
-  ></metric>
-  <metric
-    name="TCC_MISS" block=TCC event=22 descr="Number of cache misses. UC reads count as misses."
-  ></metric>
-  <metric
-    name="TCC_DEWRITE_ALLOCATE_HIT" block=TCC event=23 descr="Number of times a read was performed on a cache line that had only been written into before. This can only occur once for the life of a cache line."
-  ></metric>
-  <metric
-    name="TCC_FULLY_WRITTEN_HIT" block=TCC event=24 descr="Number of times a 32-byte read from the EA was avoided because the cache sector was already fully written with data. This can only occur once for the life of a cache sector."
-  ></metric>
-  <metric
-    name="TCC_WRITEBACK" block=TCC event=25 descr="Number of lines written back to main memory. This includes writebacks of dirty lines and uncached write/atomic requests."
-  ></metric>
-  <metric
-    name="TCC_LATENCY_FIFO_FULL" block=TCC event=26 descr="Number of cycles the latency fifo was full."
-  ></metric>
-  <metric
-    name="TCC_SRC_FIFO_FULL" block=TCC event=27 descr="Number of cycles the src fifo was expected to be full as measured at the IB block."
-  ></metric>
-  <metric
-    name="TCC_HOLE_FIFO_FULL" block=TCC event=28 descr="Number of cycles the hole fifos in the TCAs were expected to be full as measured at the IB block. This is usually an indication that there was insufficient bandwidth available on the data bus for source data."
-  ></metric>
-  <metric
-    name="TCC_EA_WRREQ" block=TCC event=29 descr="Number of transactions (either 32-byte or 64-byte) going over the TC_EA_wrreq interface. Atomics may travel over the same interface and are generally classified as write requests. This does not include probe commands."
-  ></metric>
-  <metric
-    name="TCC_EA_WRREQ_64B" block=TCC event=30 descr="Number of 64-byte transactions going (64-byte write or CMPSWAP) over the TC_EA_wrreq interface."
-  ></metric>
-  <metric
-    name="TCC_EA_WRREQ_PROBE_COMMAND" block=TCC event=31 descr="Number of probe commands going over the TC_EA_wrreq interface."
-  ></metric>
-  <metric
-    name="TCC_EA_WR_UNCACHED_32B" block=TCC event=32 descr="Number of 32-byte write/atomic going over the TC_EA_wrreq interface due to uncached traffic. Note that CC mtypes can produce uncached requests, and those are included in this. A 64-byte request will be counted as 2"
-  ></metric>
-  <metric
-    name="TCC_EA_WRREQ_STALL" block=TCC event=33 descr="Number of cycles a write request was stalled."
-  ></metric>
-  <metric
-    name="TCC_EA_WRREQ_IO_CREDIT_STALL" block=TCC event=34 descr="Number of cycles a EA write request was stalled because the interface was out of IO credits."
-  ></metric>
-  <metric
-    name="TCC_EA_WRREQ_GMI_CREDIT_STALL" block=TCC event=35 descr="Number of cycles a EA write request was stalled because the interface was out of GMI credits."
-  ></metric>
-  <metric
-    name="TCC_EA_WRREQ_DRAM_CREDIT_STALL" block=TCC event=36 descr="Number of cycles a EA write request was stalled because the interface was out of DRAM credits."
-  ></metric>
-  <metric
-    name="TCC_TOO_MANY_EA_WRREQS_STALL" block=TCC event=37 descr="Number of cycles the TCC could not send a EA write request because it already reached its maximum number of pending EA write requests."
-  ></metric>
-  <metric
-    name="TCC_EA_WRREQ_LEVEL" block=TCC event=38 descr="The sum of the number of EA write requests in flight. This is primarily meant for measure average EA write latency. Average write latency = TCC_PERF_SEL_EA_WRREQ_LEVEL/TCC_PERF_SEL_EA_WRREQ."
-  ></metric>
-  <metric
-    name="TCC_EA_ATOMIC" block=TCC event=39 descr="Number of transactions going over the TC_EA_wrreq interface that are actually atomic requests."
-  ></metric>
-  <metric
-    name="TCC_EA_ATOMIC_LEVEL" block=TCC event=40 descr="The sum of the number of EA atomics in flight. This is primarily meant for measure average EA atomic latency. Average atomic latency = TCC_PERF_SEL_EA_WRREQ_ATOMIC_LEVEL/TCC_PERF_SEL_EA_WRREQ_ATOMIC."
-  ></metric>
-  <metric
-    name="TCC_EA_RDREQ" block=TCC event=41 descr="Number of TCC/EA read requests (either 32-byte or 64-byte)"
-  ></metric>
-  <metric
-    name="TCC_EA_RDREQ_32B" block=TCC event=42 descr="Number of 32-byte TCC/EA read requests"
-  ></metric>
-  <metric
-    name="TCC_EA_RD_UNCACHED_32B" block=TCC event=43 descr="Number of 32-byte TCC/EA read due to uncached traffic. A 64-byte request will be counted as 2"
-  ></metric>
-  <metric
-    name="TCC_EA_RD_MDC_32B" block=TCC event=44 descr="Number of 32-byte TCC/EA read due to MDC traffic. A 64-byte request will be counted as 2"
-  ></metric>
-  <metric
-    name="TCC_EA_RD_COMPRESSED_32B" block=TCC event=45 descr="Number of 32-byte TCC/EA read due to compressed data reads. This does not include MDC traffic. A 64-byte request will be counted as 2"
-  ></metric>
-  <metric
-    name="TCC_EA_RDREQ_IO_CREDIT_STALL" block=TCC event=46 descr="Number of cycles there was a stall because the read request interface was out of IO credits. Stalls occur regardless of whether a read needed to be performed or not."
-  ></metric>
-  <metric
-    name="TCC_EA_RDREQ_GMI_CREDIT_STALL" block=TCC event=47 descr="Number of cycles there was a stall because the read request interface was out of GMI credits. Stalls occur regardless of whether a read needed to be performed or not."
-  ></metric>
-  <metric
-    name="TCC_EA_RDREQ_DRAM_CREDIT_STALL" block=TCC event=48 descr="Number of cycles there was a stall because the read request interface was out of DRAM credits. Stalls occur regardless of whether a read needed to be performed or not."
-  ></metric>
-  <metric
-    name="TCC_EA_RDREQ_LEVEL" block=TCC event=49 descr="The sum of the number of TCC/EA read requests in flight. This is primarily meant for measure average EA read latency. Average read latency = TCC_PERF_SEL_EA_RDREQ_LEVEL/TCC_PERF_SEL_EA_RDREQ."
-  ></metric>
-  <metric
-    name="TCC_TAG_STALL" block=TCC event=50 descr="Number of cycles the normal request pipeline in the tag was stalled for any reason. Normally, stalls of this nature are measured exactly from one point the pipeline, but that is not the case for this counter. Probes can stall the pipeline at a variety of places, and there is no single point that can reasonably measure the total stalls accurately."
-  ></metric>
-  <metric
-    name="TCC_TAG_WRITEBACK_FIFO_FULL_STALL" block=TCC event=51 descr="Number of cycles the normal request pipeline in the tag was stalled due to the writeback fifo within the tag block being full."
-  ></metric>
-  <metric
-    name="TCC_TAG_MISS_NOTHING_REPLACEABLE_STALL" block=TCC event=52 descr="Number of cycles the normal request pipeline in the tag was stalled due to a cache miss and unavailabiliyt of a replaceable cache line."
-  ></metric>
-  <metric
-    name="TCC_TAG_UNCACHED_WRITE_ATOMIC_FIFO_FULL_STALL" block=TCC event=53 descr="Number of cycles the normal request pipeline in the tag was stalled due to the uncached write/atomic fifo being full."
-  ></metric>
-  <metric
-    name="TCC_TAG_NO_UNCACHED_WRITE_ATOMIC_ENTRIES_STALL" block=TCC event=54 descr="Number of cycles the normal request pipeline in the tag was stalled due to the lack of unused uncached write/atomic tracking entries."
-  ></metric>
-  <metric
-    name="TCC_TAG_PROBE_STALL" block=TCC event=55 descr="Number of cycles the normal request pipeline in the tag was stalled due to the presence of a probe."
-  ></metric>
-  <metric
-    name="TCC_TAG_PROBE_FILTER_STALL" block=TCC event=56 descr="Number of cycles the normal request pipeline in the tag was stalled due to the probe filter being in an inappropriate state."
-  ></metric>
-  <metric
-    name="TCC_TAG_PROBE_FIFO_FULL_STALL" block=TCC event=57 descr="Number of cycles the normal request pipeline in the tag was stalled due to the probe fifo begin full."
-  ></metric>
-  <metric
-    name="TCC_READ_RETURN_TIMEOUT" block=TCC event=58 descr="Number of bubbles requests sent to the TCA because a EA read return waited so long for a cache ram port that it timed out."
-  ></metric>
-  <metric
-    name="TCC_WRITEBACK_READ_TIMEOUT" block=TCC event=59 descr="Number of bubbles requests sent to the TCA because a writeback waited so long for a cache ram port that it timed out."
-  ></metric>
-  <metric
-    name="TCC_READ_RETURN_FULL_BUBBLE" block=TCC event=60 descr="Number of bubbles requests sent to the TCA to prevent the EA read return fifos from overflowing. Not windowable."
-  ></metric>
-  <metric
-    name="TCC_BUBBLE" block=TCC event=61 descr="Total number of bubble requests sent to the TCA"
-  ></metric>
-  <metric
-    name="TCC_RETURN_ACK" block=TCC event=62 descr="Number of times only an ack was sent on the return bus."
-  ></metric>
-  <metric
-    name="TCC_RETURN_DATA" block=TCC event=63 descr="Number of times only data was sent on the return bus."
-  ></metric>
-  <metric
-    name="TCC_RETURN_HOLE" block=TCC event=64 descr="Number of times only a hole was sent on the return bus."
-  ></metric>
-  <metric
-    name="TCC_RETURN_ACK_HOLE" block=TCC event=65 descr="Number of times an ack and a hole were sent at the same time on the return bus."
-  ></metric>
-  <metric
-    name="TCC_IB_REQ" block=TCC event=66 descr="Number of requests through the IB. This measures the raw request count from graphics clients going to this TCC."
-  ></metric>
-  <metric
-    name="TCC_IB_STALL" block=TCC event=67 descr="Number of cycles the IB output was stalled."
-  ></metric>
-  <metric
-    name="TCC_IB_TAG_STALL" block=TCC event=68 descr="Number of cycles the IB output was stalled on the tag."
-  ></metric>
-  <metric
-    name="TCC_IB_NOT_VALID" block=TCC event=69 descr="Number of cycles the IB output was not valid."
-  ></metric>
-  <metric
-    name="TCC_IB_MDC_STALL" block=TCC event=70 descr="Number of cycles the IB output was stalled on the mdc."
-  ></metric>
-  <metric
-    name="TCC_TCA_LEVEL" block=TCC event=71 descr="The sum of the number of requests sent to the TCA for output arbitration in flight. Average TCA arbitration latency = TCC_PERF_SEL_TCA_LEVEL/TCC_PERF_SEL_REQ."
-  ></metric>
-  <metric
-    name="TCC_HOLE_LEVEL" block=TCC event=72 descr="The sum of the number of hole requests in flight. Average hole latency = TCC_PERF_SEL_HOLE_LEVEL/(TCC_PERF_SEL_WRITE+TCC_PERF_SEL_ATOMIC). Not windowable."
-  ></metric>
-  <metric
-    name="TCC_EA_RDRET_NACK" block=TCC event=73 descr="The number of EA read returns that were nacked."
-  ></metric>
-  <metric
-    name="TCC_EA_WRRET_NACK" block=TCC event=74 descr="The number of EA write returns that were nacked."
-  ></metric>
-  <metric
-    name="TCC_NORMAL_WRITEBACK" block=TCC event=75 descr="Number of writebacks due to requests that are not writeback requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBL2_NC_WRITEBACK" block=TCC event=76 descr="Number of writebacks due to TC_OP_WBL2_NC requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_WRITEBACK" block=TCC event=77 descr="Number of writebacks due to TC_OP_WBINVL2 requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_NC_WRITEBACK" block=TCC event=78 descr="Number of writebacks due to TC_OP_WBINVL2_NC requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_SD_WRITEBACK" block=TCC event=79 descr="Number of writebacks due to TC_OP_WBINVL2_SD requests."
-  ></metric>
-  <metric
-    name="TCC_ALL_TC_OP_WB_WRITEBACK" block=TCC event=80 descr="Number of writebacks due to all TC_OP writeback requests."
-  ></metric>
-  <metric
-    name="TCC_NORMAL_EVICT" block=TCC event=81 descr="Number of evictions due to requests that are not invalidate or probe requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBL2_NC_EVICT" block=TCC event=82 descr="Number of evictions due to TC_OP_WBL2_NC requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_INVL2_NC_EVICT" block=TCC event=83 descr="Number of evictions due to TC_OP_INVL2_NC requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_EVICT" block=TCC event=84 descr="Number of evictions due to TC_OP_WBINVL2 requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_NC_EVICT" block=TCC event=85 descr="Number of evictions due to TC_OP_WBINVL2_NC requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_SD_EVICT" block=TCC event=86 descr="Number of evictions due to TC_OP_WBINVL2_SD requests."
-  ></metric>
-  <metric
-    name="TCC_ALL_TC_OP_INV_EVICT" block=TCC event=87 descr="Number of evictions due to all TC_OP invalidate requests."
-  ></metric>
-  <metric
-    name="TCC_PROBE_EVICT" block=TCC event=88 descr="Number of evictions/invalidations due to probes. Not windowable."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBL2_NC_CYCLE" block=TCC event=89 descr="Number of cycles spent performing TC_OP_WBL2_NC requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_INVL2_NC_CYCLE" block=TCC event=90 descr="Number of cycles spent performing TC_OP_INVL2_NC requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_CYCLE" block=TCC event=91 descr="Number of cycles spent performing TC_OP_WBINVL2 requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_NC_CYCLE" block=TCC event=92 descr="Number of cycles spent performing TC_OP_WBINVL2_NC requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_SD_CYCLE" block=TCC event=93 descr="Number of cycles spent performing TC_OP_WBINVL2_SD requests."
-  ></metric>
-  <metric
-    name="TCC_ALL_TC_OP_WB_OR_INV_CYCLE" block=TCC event=94 descr="Number of cycles spent performing all TC_OP writeback or invalidate requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBL2_NC_START" block=TCC event=95 descr="Number of TC_OP_WBL2_NC requests started."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_INVL2_NC_START" block=TCC event=96 descr="Number of TC_OP_INVL2_NC requests started."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_START" block=TCC event=97 descr="Number of TC_OP_WBINVL2 requests started."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_NC_START" block=TCC event=98 descr="Number of TC_OP_WBINVL2_NC requests started."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_SD_START" block=TCC event=99 descr="Number of TC_OP_WBINVL2_SD requests started."
-  ></metric>
-  <metric
-    name="TCC_ALL_TC_OP_WB_OR_INV_START" block=TCC event=100 descr="Number of TC_OP writeback or invalidate requests started."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBL2_NC_FINISH" block=TCC event=101 descr="Number of TC_OP_WBL2_NC requests finished."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_INVL2_NC_FINISH" block=TCC event=102 descr="Number of TC_OP_INVL2_NC requests finished."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_FINISH" block=TCC event=103 descr="Number of TC_OP_WBINVL2 requests finished."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_NC_FINISH" block=TCC event=104 descr="Number of TC_OP_WBINVL2_NC requests finished."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_SD_FINISH" block=TCC event=105 descr="Number of TC_OP_WBINVL2_SD requests finished."
-  ></metric>
-  <metric
-    name="TCC_ALL_TC_OP_WB_OR_INV_FINISH" block=TCC event=106 descr="Number of TC_OP writeback or invalidate requests finished."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_INV_METADATA" block=TCC event=107 descr="Number of TC_OP_INV_METADATA requests. TC_OP_INV_METADATA is not included in the other WB/INV perf counters since it doesn't affect the L2 cache."
-  ></metric>
-  <metric
-    name="TCC_MDC_REQ" block=TCC event=108 descr="Number of requests passed through the metadata cache."
-  ></metric>
-  <metric
-    name="TCC_MDC_LEVEL" block=TCC event=109 descr="The sum of the number of mdc requests in flight. Average MDC latency=TCC_PERF_SEL_MDC_LEVEL/TCC_PERF_SEL_MDC_REQ."
-  ></metric>
-  <metric
-    name="TCC_MDC_TAG_HIT" block=TCC event=110 descr="Number of MDC tag hits. A tag contains multiple sectors, so many tag hits will be sector misses."
-  ></metric>
-  <metric
-    name="TCC_MDC_SECTOR_HIT" block=TCC event=111 descr="Number of MDC sector hits. A sector hit means that there actually is data in the cache for this request."
-  ></metric>
-  <metric
-    name="TCC_MDC_SECTOR_MISS" block=TCC event=112 descr="Number of MDC sector misses."
-  ></metric>
-  <metric
-    name="TCC_MDC_TAG_STALL" block=TCC event=113 descr="Number of cycles that the mdc tag is stalled."
-  ></metric>
-  <metric
-    name="TCC_MDC_TAG_REPLACEMENT_LINE_IN_USE_STALL" block=TCC event=114 descr="Number of cycles that the mdc tag is stalled because the line to be replaced is stalled."
-  ></metric>
-  <metric
-    name="TCC_MDC_TAG_DESECTORIZATION_FIFO_FULL_STALL" block=TCC event=115 descr="Number of cycles that the mdc tag is stalled because the desctorization fifo is full."
-  ></metric>
-  <metric
-    name="TCC_MDC_TAG_WAITING_FOR_INVALIDATE_COMPLETION_STALL" block=TCC event=116 descr="Number of cycles that the mdc tag is stalled because it is waiting for the previous invalidate to complete."
-  ></metric>
-  <metric
-    name="TCC_PROBE_FILTER_DISABLE_TRANSITION" block=TCC event=117 descr="Number of times the probe filter went from enabled to disabled."
-  ></metric>
-  <metric
-    name="TCC_PROBE_FILTER_DISABLED" block=TCC event=118 descr="Number of cycles the probe filter was disabled. The TCC can get probes during these cycles. Not windowable."
-  ></metric>
-  <metric
-    name="TCC_EA_RDREQ_DRAM" block=TCC event=119 descr="Number of TCC/EA read requests (either 32-byte or 64-byte) destined for DRAM (MC)."
-  ></metric>
-  <metric
-    name="TCC_EA_WRREQ_DRAM" block=TCC event=120 descr="Number of TCC/EA write requests (either 32-byte of 64-byte) destined for DRAM (MC)."
-  ></metric>
-  <metric
-    name="TCC_CLIENT0_REQ" block=TCC event=128 descr="Number of cycles client0 sent a request to this TCC."
-  ></metric>
-  <metric
-    name="TCC_CLIENT1_REQ" block=TCC event=129 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT2_REQ" block=TCC event=130 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT3_REQ" block=TCC event=131 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT4_REQ" block=TCC event=132 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT5_REQ" block=TCC event=133 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT6_REQ" block=TCC event=134 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT7_REQ" block=TCC event=135 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT8_REQ" block=TCC event=136 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT9_REQ" block=TCC event=137 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT10_REQ" block=TCC event=138 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT11_REQ" block=TCC event=139 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT12_REQ" block=TCC event=140 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT13_REQ" block=TCC event=141 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT14_REQ" block=TCC event=142 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT15_REQ" block=TCC event=143 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT16_REQ" block=TCC event=144 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT17_REQ" block=TCC event=145 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT18_REQ" block=TCC event=146 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT19_REQ" block=TCC event=147 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT20_REQ" block=TCC event=148 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT21_REQ" block=TCC event=149 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT22_REQ" block=TCC event=150 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT23_REQ" block=TCC event=151 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT24_REQ" block=TCC event=152 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT25_REQ" block=TCC event=153 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT26_REQ" block=TCC event=154 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT27_REQ" block=TCC event=155 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT28_REQ" block=TCC event=156 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT29_REQ" block=TCC event=157 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT30_REQ" block=TCC event=158 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT31_REQ" block=TCC event=159 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT32_REQ" block=TCC event=160 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT33_REQ" block=TCC event=161 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT34_REQ" block=TCC event=162 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT35_REQ" block=TCC event=163 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT36_REQ" block=TCC event=164 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT37_REQ" block=TCC event=165 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT38_REQ" block=TCC event=166 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT39_REQ" block=TCC event=167 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT40_REQ" block=TCC event=168 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT41_REQ" block=TCC event=169 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT42_REQ" block=TCC event=170 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT43_REQ" block=TCC event=171 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT44_REQ" block=TCC event=172 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT45_REQ" block=TCC event=173 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT46_REQ" block=TCC event=174 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT47_REQ" block=TCC event=175 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT48_REQ" block=TCC event=176 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT49_REQ" block=TCC event=177 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT50_REQ" block=TCC event=178 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT51_REQ" block=TCC event=179 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT52_REQ" block=TCC event=180 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT53_REQ" block=TCC event=181 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT54_REQ" block=TCC event=182 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT55_REQ" block=TCC event=183 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT56_REQ" block=TCC event=184 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT57_REQ" block=TCC event=185 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT58_REQ" block=TCC event=186 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT59_REQ" block=TCC event=187 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT60_REQ" block=TCC event=188 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT61_REQ" block=TCC event=189 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT62_REQ" block=TCC event=190 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT63_REQ" block=TCC event=191 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT64_REQ" block=TCC event=192 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT65_REQ" block=TCC event=193 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT66_REQ" block=TCC event=194 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT67_REQ" block=TCC event=195 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT68_REQ" block=TCC event=196 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT69_REQ" block=TCC event=197 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT70_REQ" block=TCC event=198 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT71_REQ" block=TCC event=199 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT72_REQ" block=TCC event=200 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT73_REQ" block=TCC event=201 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT74_REQ" block=TCC event=202 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT75_REQ" block=TCC event=203 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT76_REQ" block=TCC event=204 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT77_REQ" block=TCC event=205 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT78_REQ" block=TCC event=206 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT79_REQ" block=TCC event=207 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT80_REQ" block=TCC event=208 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT81_REQ" block=TCC event=209 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT82_REQ" block=TCC event=210 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT83_REQ" block=TCC event=211 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT84_REQ" block=TCC event=212 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT85_REQ" block=TCC event=213 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT86_REQ" block=TCC event=214 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT87_REQ" block=TCC event=215 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT88_REQ" block=TCC event=216 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT89_REQ" block=TCC event=217 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT90_REQ" block=TCC event=218 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT91_REQ" block=TCC event=219 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT92_REQ" block=TCC event=220 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT93_REQ" block=TCC event=221 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT94_REQ" block=TCC event=222 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT95_REQ" block=TCC event=223 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT96_REQ" block=TCC event=224 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT97_REQ" block=TCC event=225 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT98_REQ" block=TCC event=226 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT99_REQ" block=TCC event=227 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT100_REQ" block=TCC event=228 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT101_REQ" block=TCC event=229 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT102_REQ" block=TCC event=230 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT103_REQ" block=TCC event=231 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT104_REQ" block=TCC event=232 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT105_REQ" block=TCC event=233 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT106_REQ" block=TCC event=234 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT107_REQ" block=TCC event=235 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT108_REQ" block=TCC event=236 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT109_REQ" block=TCC event=237 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT110_REQ" block=TCC event=238 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT111_REQ" block=TCC event=239 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT112_REQ" block=TCC event=240 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT113_REQ" block=TCC event=241 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT114_REQ" block=TCC event=242 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT115_REQ" block=TCC event=243 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT116_REQ" block=TCC event=244 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT117_REQ" block=TCC event=245 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT118_REQ" block=TCC event=246 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT119_REQ" block=TCC event=247 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT120_REQ" block=TCC event=248 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT121_REQ" block=TCC event=249 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT122_REQ" block=TCC event=250 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT123_REQ" block=TCC event=251 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT124_REQ" block=TCC event=252 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT125_REQ" block=TCC event=253 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT126_REQ" block=TCC event=254 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT127_REQ" block=TCC event=255 descr=""
-  ></metric>
-  <metric
-    name="TCC_EA1_WRREQ" block=TCC event=256 descr="Number of transactions (either 32-byte or 64-byte) going over the TC_EA_wrreq interface. Atomics may travel over the same interface and are generally classified as write requests. This does not include probe commands."
-  ></metric>
-  <metric
-    name="TCC_EA1_WRREQ_64B" block=TCC event=257 descr="Number of 64-byte transactions going (64-byte write or CMPSWAP) over the TC_EA_wrreq interface."
-  ></metric>
-  <metric
-    name="TCC_EA1_WRREQ_PROBE_COMMAND" block=TCC event=258 descr="Number of probe commands going over the TC_EA_wrreq interface."
-  ></metric>
-  <metric
-    name="TCC_EA1_WR_UNCACHED_32B" block=TCC event=259 descr="Number of 32-byte write/atomic going over the TC_EA_wrreq interface due to uncached traffic. Note that CC mtypes can produce uncached requests, and those are included in this. A 64-byte request will be counted as 2"
-  ></metric>
-  <metric
-    name="TCC_EA1_WRREQ_STALL" block=TCC event=260 descr="Number of cycles a write request was stalled."
-  ></metric>
-  <metric
-    name="TCC_EA1_WRREQ_IO_CREDIT_STALL" block=TCC event=261 descr="Number of cycles a EA write request was stalled because the interface was out of IO credits."
-  ></metric>
-  <metric
-    name="TCC_EA1_WRREQ_GMI_CREDIT_STALL" block=TCC event=262 descr="Number of cycles a EA write request was stalled because the interface was out of GMI credits."
-  ></metric>
-  <metric
-    name="TCC_EA1_WRREQ_DRAM_CREDIT_STALL" block=TCC event=263 descr="Number of cycles a EA write request was stalled because the interface was out of DRAM credits."
-  ></metric>
-  <metric
-    name="TCC_EA1_WRREQ_LEVEL" block=TCC event=264 descr="The sum of the number of EA write requests in flight. This is primarily meant for measure average EA write latency. Average write latency = TCC_PERF_SEL_EA_WRREQ_LEVEL/TCC_PERF_SEL_EA_WRREQ."
-  ></metric>
-  <metric
-    name="TCC_EA1_ATOMIC" block=TCC event=265 descr="Number of transactions going over the TC_EA_wrreq interface that are actually atomic requests."
-  ></metric>
-  <metric
-    name="TCC_EA1_ATOMIC_LEVEL" block=TCC event=266 descr="The sum of the number of EA atomics in flight. This is primarily meant for measure average EA atomic latency. Average atomic latency = TCC_PERF_SEL_EA_WRREQ_ATOMIC_LEVEL/TCC_PERF_SEL_EA_WRREQ_ATOMIC."
-  ></metric>
-  <metric
-    name="TCC_EA1_RDREQ" block=TCC event=267 descr="Number of TCC/EA read requests (either 32-byte or 64-byte)"
-  ></metric>
-  <metric
-    name="TCC_EA1_RDREQ_32B" block=TCC event=268 descr="Number of 32-byte TCC/EA read requests"
-  ></metric>
-  <metric
-    name="TCC_EA1_RD_UNCACHED_32B" block=TCC event=269 descr="Number of 32-byte TCC/EA read due to uncached traffic. A 64-byte request will be counted as 2"
-  ></metric>
-  <metric
-    name="TCC_EA1_RD_MDC_32B" block=TCC event=270 descr="Number of 32-byte TCC/EA read due to MDC traffic. A 64-byte request will be counted as 2"
-  ></metric>
-  <metric
-    name="TCC_EA1_RD_COMPRESSED_32B" block=TCC event=271 descr="Number of 32-byte TCC/EA read due to compressed data reads. This does not include MDC traffic. A 64-byte request will be counted as 2"
-  ></metric>
-  <metric
-    name="TCC_EA1_RDREQ_IO_CREDIT_STALL" block=TCC event=272 descr="Number of cycles there was a stall because the read request interface was out of IO credits. Stalls occur regardless of whether a read needed to be performed or not."
-  ></metric>
-  <metric
-    name="TCC_EA1_RDREQ_GMI_CREDIT_STALL" block=TCC event=273 descr="Number of cycles there was a stall because the read request interface was out of GMI credits. Stalls occur regardless of whether a read needed to be performed or not."
-  ></metric>
-  <metric
-    name="TCC_EA1_RDREQ_DRAM_CREDIT_STALL" block=TCC event=274 descr="Number of cycles there was a stall because the read request interface was out of DRAM credits. Stalls occur regardless of whether a read needed to be performed or not."
-  ></metric>
-  <metric
-    name="TCC_EA1_RDREQ_LEVEL" block=TCC event=275 descr="The sum of the number of TCC/EA read requests in flight. This is primarily meant for measure average EA read latency. Average read latency = TCC_PERF_SEL_EA_RDREQ_LEVEL/TCC_PERF_SEL_EA_RDREQ."
-  ></metric>
-  <metric
-    name="TCC_EA1_RDRET_NACK" block=TCC event=276 descr="The number of EA read returns that were nacked."
-  ></metric>
-  <metric
-    name="TCC_EA1_WRRET_NACK" block=TCC event=277 descr="The number of EA write returns that were nacked."
-  ></metric>
-  <metric
-    name="TCC_EA1_RDREQ_DRAM" block=TCC event=278 descr="Number of TCC/EA read requests (either 32-byte or 64-byte) destined for DRAM (MC)."
-  ></metric>
-  <metric
-    name="TCC_EA1_WRREQ_DRAM" block=TCC event=279 descr="Number of TCC/EA write requests (either 32-byte of 64-byte) destined for DRAM (MC)."
-  ></metric>
-  <metric
-    name="TCC_CLIENTX_LEVEL" block=TCC event=280 descr="The sum of the number of TCC/EA all/read/write/atomic requests in flight."
-  ></metric>
-  <metric
-    name="TCC_CLIENT_RETURN_BUBBLE" block=TCC event=281 descr="The number of cycles that TCC has return data/ack but no TCA/TCR read."
-  ></metric>
-  # TCP counters
-  <metric
-    name="TCP_GATE_EN1" block=TCP event=0 descr="TCP interface clocks are turned on. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_GATE_EN2" block=TCP event=1 descr="TCP core clocks are turned on. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_CORE_REG_SCLK_VLD" block=TCP event=2 descr="TCP reg clocks are turned on. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_TA_TCP_ADDR_STARVE_CYCLES" block=TCP event=3 descr="TA starves TCP addr interface. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_TA_TCP_DATA_STARVE_CYCLES" block=TCP event=4 descr="TA starves TCP data interface. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_TCP_TA_ADDR_STALL_CYCLES" block=TCP event=5 descr="TCP stalls TA addr interface."
-  ></metric>
-  <metric
-    name="TCP_TCP_TA_DATA_STALL_CYCLES" block=TCP event=6 descr="TCP stalls TA data interface. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_TD_TCP_STALL_CYCLES" block=TCP event=7 descr="TD stalls TCP"
-  ></metric>
-  <metric
-    name="TCP_TCR_TCP_STALL_CYCLES" block=TCP event=8 descr="TCR stalls TCP_TCR_req interface"
-  ></metric>
-  <metric
-    name="TCP_TCP_TCR_STARVE_CYCLES" block=TCP event=9 descr="TCP starves TCP_TCR_req interface"
-  ></metric>
-  <metric
-    name="TCP_LOD_STALL_CYCLES" block=TCP event=10 descr="Per Pixel LOD stall"
-  ></metric>
-  <metric
-    name="TCP_READ_TAGCONFLICT_STALL_CYCLES" block=TCP event=11 descr="Tagram conflict stall on a read"
-  ></metric>
-  <metric
-    name="TCP_WRITE_TAGCONFLICT_STALL_CYCLES" block=TCP event=12 descr="Tagram conflict stall on a write"
-  ></metric>
-  <metric
-    name="TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES" block=TCP event=13 descr="Tagram conflict stall on an atomic"
-  ></metric>
-  <metric
-    name="TCP_ALLOC_STALL_CYCLES" block=TCP event=14 descr="Alloc on inflight cache line stall"
-  ></metric>
-  <metric
-    name="TCP_UNORDERED_MTYPE_STALL" block=TCP event=15 descr="Total stalls due to UC/CC mtype ordering"
-  ></metric>
-  <metric
-    name="TCP_LFIFO_STALL_CYCLES" block=TCP event=16 descr="Memory Latency fifos full stall"
-  ></metric>
-  <metric
-    name="TCP_RFIFO_STALL_CYCLES" block=TCP event=17 descr="Memory Request fifos full stall"
-  ></metric>
-  <metric
-    name="TCP_TCR_RDRET_STALL" block=TCP event=18 descr="write into cache stalled by read return from tcr"
-  ></metric>
-  <metric
-    name="TCP_WRITE_CONFLICT_STALL" block=TCP event=19 descr="write stall due to cache bank conflict"
-  ></metric>
-  <metric
-    name="TCP_HOLE_READ_STALL" block=TCP event=20 descr="read from cache stalled due to hole fill read"
-  ></metric>
-  <metric
-    name="TCP_READCONFLICT_STALL_CYCLES" block=TCP event=21 descr="Read conflict stall due to cache bank conflict"
-  ></metric>
-  <metric
-    name="TCP_PENDING_STALL_CYCLES" block=TCP event=22 descr="Stall due to data pending from L2"
-  ></metric>
-  <metric
-    name="TCP_READFIFO_STALL_CYCLES" block=TCP event=23 descr="Read fifo stall ("
-  ></metric>
-  <metric
-    name="TCP_POWER_STALL" block=TCP event=24 descr="Count of stalls due to power throttling"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_SERIALIZATION_STALL" block=TCP event=25 descr="Total number of stalls due to serializing translation requests through the UTCL1."
-  ></metric>
-  <metric
-    name="TCP_TC_TA_XNACK_STALL" block=TCP event=26 descr="Total number of cycles TA stalled the TCP xnack interface. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_TA_TCP_STATE_READ" block=TCP event=27 descr="Number of state reads"
-  ></metric>
-  <metric
-    name="TCP_VOLATILE" block=TCP event=28 descr="Total number of L1 volatile pixels/buffers from TA"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_ACCESSES" block=TCP event=29 descr="Total number of pixels/buffers from TA. Equals TCP_PERF_SEL_TOTAL_READ+TCP_PERF_SEL_TOTAL_NONREAD"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_READ" block=TCP event=30 descr="Total number of read pixels/buffers from TA. Equals TCP_PERF_SEL_TOTAL_HIT_LRU_READ + TCP_PERF_SEL_TOTAL_MISS_LRU_READ + TCP_PERF_SEL_TOTAL_MISS_EVICT_READ"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_NON_READ" block=TCP event=31 descr="Total number of non-read pixels/buffers from TA. Equals TCP_PERF_SEL_WRITE + TCP_PERF_SEL_TOTAL_ATOMIC_WITH_RET + TCP_PERF_SEL_TOTAL_ATOMIC_WITHOUT_RET"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_WRITE" block=TCP event=32 descr="Total number of local write pixels/buffers from TA. Equals TCP_PERF_SEL_TOTAL_MISS_LRU_WRITE+ TCP_PERF_SEL_TOTAL_MISS_EVICT_WRITE"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_HIT_LRU_READ" block=TCP event=33 descr="Total number of read pixels/buffers from TA using the HIT_LRU policy"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_MISS_LRU_READ" block=TCP event=34 descr="Total number of read pixels/buffers from TA using the MISS_LRU policy"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_MISS_EVICT_READ" block=TCP event=35 descr="Total number of read pixels/buffers from TA using the MISS_EVICT policy"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_MISS_LRU_WRITE" block=TCP event=36 descr="Total number of local write pixels/buffers from TA using the MISS_LRU policy"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_MISS_EVICT_WRITE" block=TCP event=37 descr="Total number of global write pixels/buffers from TA using the MISS_EVICT policy"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_ATOMIC_WITH_RET" block=TCP event=38 descr="Total number of atomic with return pixels/buffers from TA"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_ATOMIC_WITHOUT_RET" block=TCP event=39 descr="Total number of atomic without return pixels/buffers from TA"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_WBINVL1" block=TCP event=40 descr="Total number of wbinvl1 transactions from TA (from shader WBINVL1 instructions)"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_WBINVL1_VOL" block=TCP event=41 descr="Total number of volatile wbinvl1 transactions from TA (from shader WBINVL1_VOL instructions)"
-  ></metric>
-  <metric
-    name="TCP_SQ_TCP_INVALIDATE_VOL" block=TCP event=42 descr="Number of volatile cache invalidates from the SQ. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_CP_TCP_INVALIDATE" block=TCP event=43 descr="Number of cache invalidates from the CP. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_CP_TCP_INVALIDATE_VOL" block=TCP event=44 descr="Number of volatile cache invalidates from the CP. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_TOTAL_WRITEBACK_INVALIDATES" block=TCP event=45 descr="Total number of cache invalidates. Equals TCP_PERF_SEL_TOTAL_WBINVL1+ TCP_PERF_SEL_TOTAL_WBINVL1_VOL+ TCP_PERF_SEL_CP_TCP_INVALIDATE+ TCP_PERF_SEL_SQ_TCP_INVALIDATE_VOL. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_SHOOTDOWN" block=TCP event=46 descr="Total number of shootdowns executed by TCP. Not windowed."
-  ></metric>
-  <metric
-    name="TCP_UTCL1_REQUEST" block=TCP event=47 descr="Total CLIENT_UTCL1 NORMAL requests"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_TRANSLATION_MISS" block=TCP event=48 descr="Total utcl1 translation misses"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_TRANSLATION_HIT" block=TCP event=49 descr="Total utcl1 translation hits"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_PERMISSION_MISS" block=TCP event=50 descr="Total utcl1 permission misses"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_STALL_INFLIGHT_MAX" block=TCP event=51 descr="Total utcl1 stalls due to inflight counter saturation"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_STALL_LRU_INFLIGHT" block=TCP event=52 descr="Total utcl1 stalls due to LRU cache line with traffic inflight"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_STALL_MULTI_MISS" block=TCP event=53 descr="Total utcl1 stalls due to arbitrated multiple misses"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_LFIFO_FULL" block=TCP event=54 descr="Total utcl1 utcl2 latency hiding fifo full cycles"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_STALL_LFIFO_NOT_RES" block=TCP event=55 descr="Total utcl1 stalls due to utcl2 latency hiding fifo output not resident"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_STALL_UTCL2_REQ_OUT_OF_CREDITS" block=TCP event=56 descr="Total utcl1 stalls due to utcl2_req out of credits"
-  ></metric>
-  <metric
-    name="TCP_CLIENT_UTCL1_INFLIGHT" block=TCP event=57 descr="The sum of inflight client to UTCL1 requests per cycle"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_UTCL2_INFLIGHT" block=TCP event=58 descr="The sum of inflight UTCL1_UTCL2 requests per cycle"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_STALL_MISSFIFO_FULL" block=TCP event=59 descr="Total utcl1 stalls due to full miss fifo"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_CACHE_ACCESSES" block=TCP event=60 descr="Count of total cache line (tag) accesses (includes hits and misses)."
-  ></metric>
-  <metric
-    name="TCP_TAGRAM0_REQ" block=TCP event=61 descr="Total L2 requests that mapped to tagram 0 from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TAGRAM1_REQ" block=TCP event=62 descr="Total L2 requests that mapped to tagram 1 from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TAGRAM2_REQ" block=TCP event=63 descr="Total L2 requests that mapped to tagram 2 from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TAGRAM3_REQ" block=TCP event=64 descr="Total L2 requests that mapped to tagram 3 from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCP_LATENCY" block=TCP event=65 descr="Total TCP wave latency (from first clock of wave entering to first clock of wave leaving), divide by TA_TCP_STATE_READ to avg wave latency"
-  ></metric>
-  <metric
-    name="TCP_TCC_READ_REQ_LATENCY" block=TCP event=66 descr="Total TCP->TCC request latency for reads and atomics with return. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_TCC_WRITE_REQ_LATENCY" block=TCP event=67 descr="Total TCP->TCC request latency for writes and atomics without return. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_TCC_WRITE_REQ_HOLE_LATENCY" block=TCP event=68 descr="Total TCP req ->TCC hole latency for writes and atomics. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_TCC_READ_REQ" block=TCP event=69 descr="Total read requests from TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_WRITE_REQ" block=TCP event=70 descr="Total write requests from TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_ATOMIC_WITH_RET_REQ" block=TCP event=71 descr="Total atomic with return requests from TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_ATOMIC_WITHOUT_RET_REQ" block=TCP event=72 descr="Total atomic without return requests from TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_LRU_REQ" block=TCP event=73 descr="Total requests with LRU L2 policy from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_STREAM_REQ" block=TCP event=74 descr="Total requests with STREAM L2 policy from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_NC_READ_REQ" block=TCP event=75 descr="Total read requests with NC mtype from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_NC_WRITE_REQ" block=TCP event=76 descr="Total write requests with NC mtype from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_NC_ATOMIC_REQ" block=TCP event=77 descr="Total atomic requests with NC mtype from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_UC_READ_REQ" block=TCP event=78 descr="Total read requests with UC mtype from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_UC_WRITE_REQ" block=TCP event=79 descr="Total write requests with UC mtype from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_UC_ATOMIC_REQ" block=TCP event=80 descr="Total atomic requests with UC mtype from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_CC_READ_REQ" block=TCP event=81 descr="Total write requests with CC mtype from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_CC_WRITE_REQ" block=TCP event=82 descr="Total write requests with CC mtype from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_CC_ATOMIC_REQ" block=TCP event=83 descr="Total atomic requests with CC mtype from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_DCC_REQ" block=TCP event=84 descr="Total DCC requests from this TCP to all TCCs"
-  ></metric>
-  # TD counters
-  <metric
-    name="TD_NONE" block=TD event=0 descr="Won't count anything."
-  ></metric>
-  <metric
-    name="TD_TD_BUSY" block=TD event=1 descr="TD is processing or waiting for data. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TD_INPUT_BUSY" block=TD event=2 descr="TD input subblock is busy or waiting for data. This means the instruction, state or TC data fifos may not be empty or the TD is processing a wave. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TD_OUTPUT_BUSY" block=TD event=3 descr="TD output subblock is busy or waiting for data. This means the TD's output pipeline (accumulation, data swizzle, data packing) could be processing pixel data. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TD_LERP_BUSY" block=TD event=4 descr="TD filter block is busy, which means any of the four lerps has pixel data flowing down its pipeline (blend, accumulation, format). Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TD_REG_SCLK_VLD" block=TD event=5 descr="Clock gate enable for GRBM register reads & writes. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TD_LOCAL_CG_DYN_SCLK_GRP0_EN" block=TD event=6 descr="Clock gate enable for group0 - non-harvestable always_on domain. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TD_LOCAL_CG_DYN_SCLK_GRP1_EN" block=TD event=7 descr="Clock gate enable for group1 - harvestable texture logic domain. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TD_LOCAL_CG_DYN_SCLK_GRP4_EN" block=TD event=8 descr="Clock gate enable for group4 - non-harvestable GDS chain domain. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TD_LOCAL_CG_DYN_SCLK_GRP5_EN" block=TD event=9 descr="Clock gate enable for group5 - non-harvestable texture boundary domain. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TD_TC_TD_FIFO_FULL" block=TD event=10 descr="TC_TD input FIFO is full. This counter could denote a stall in the TD pipeline, which could come from data cycling in the lerps or power throttling from the SMU."
-  ></metric>
-  <metric
-    name="TD_OUTPUT_FIFO_FULL" block=TD event=11 descr="TD output FIFO is full. This counter could denote a stall in the TD pipeline, possibly due to the GDS or PC/LDS."
-  ></metric>
-  <metric
-    name="TD_RESERVED_12" block=TD event=12 descr="RESERVED_12"
-  ></metric>
-  <metric
-    name="TD_RESERVED_13" block=TD event=13 descr="RESERVED_13"
-  ></metric>
-  <metric
-    name="TD_RESERVED_14" block=TD event=14 descr="RESERVED_14"
-  ></metric>
-  <metric
-    name="TD_TC_STALL" block=TD event=15 descr="TD is stalled waiting for TC data."
-  ></metric>
-  <metric
-    name="TD_PC_STALL" block=TD event=16 descr="TD is stalled by PC waiting to send LDS data."
-  ></metric>
-  <metric
-    name="TD_GDS_STALL" block=TD event=17 descr="TD is stalled by GDS data."
-  ></metric>
-  <metric
-    name="TD_RESERVED_18" block=TD event=18 descr="RESERVED_18"
-  ></metric>
-  <metric
-    name="TD_RESERVED_19" block=TD event=19 descr="RESERVED_19"
-  ></metric>
-  <metric
-    name="TD_GATHER4_WAVEFRONT" block=TD event=20 descr="Count the wavefronts with opcode = gather4, includes gather4_c."
-  ></metric>
-  <metric
-    name="TD_GATHER4H_WAVEFRONT" block=TD event=21 descr="Count the wavefronts with opcode = gather4h."
-  ></metric>
-  <metric
-    name="TD_GATHER4H_PACKED_WAVEFRONT" block=TD event=22 descr="Count the wavefronts with opcode = gather4h_packed."
-  ></metric>
-  <metric
-    name="TD_GATHER8H_PACKED_WAVEFRONT" block=TD event=23 descr="Count the wavefronts with opcode = gather8h_packed."
-  ></metric>
-  <metric
-    name="TD_SAMPLE_C_WAVEFRONT" block=TD event=24 descr="Count the wavefronts with opcode = sample_c, includes gather4_c."
-  ></metric>
-  <metric
-    name="TD_LOAD_WAVEFRONT" block=TD event=25 descr="Count the wavefronts with opcode = load, include atomics and store."
-  ></metric>
-  <metric
-    name="TD_ATOMIC_WAVEFRONT" block=TD event=26 descr="Count the wavefronts with opcode = atomic."
-  ></metric>
-  <metric
-    name="TD_STORE_WAVEFRONT" block=TD event=27 descr="Count the wavefronts with opcode = store."
-  ></metric>
-  <metric
-    name="TD_LDFPTR_WAVEFRONT" block=TD event=28 descr="Count the wavefronts with LDFPTR formats."
-  ></metric>
-  <metric
-    name="TD_D16_EN_WAVEFRONT" block=TD event=29 descr="Count the wavefronts that use d16 conversion"
-  ></metric>
-  <metric
-    name="TD_BYPASS_FILTER_WAVEFRONT" block=TD event=30 descr="Count the wavefronts that bypass the filter, includes bypass opcode or bypass formats."
-  ></metric>
-  <metric
-    name="TD_MIN_MAX_FILTER_WAVEFRONT" block=TD event=31 descr="Count the wavefronts that use min/max filtering."
-  ></metric>
-  <metric
-    name="TD_COALESCABLE_WAVEFRONT" block=TD event=32 descr="Count wavefronts that TA finds coalescable."
-  ></metric>
-  <metric
-    name="TD_COALESCED_PHASE" block=TD event=33 descr="Count up when each phase is coalesced, if all phases in a wavefront were coalesced the count will be 16."
-  ></metric>
-  <metric
-    name="TD_FOUR_PHASE_WAVEFRONT" block=TD event=34 descr="dmask=1,2,4,8, wavefront was packed into a 4 phase packet for SP."
-  ></metric>
-  <metric
-    name="TD_EIGHT_PHASE_WAVEFRONT" block=TD event=35 descr="dmask=3,5,6,9,a,c, wavefront was packed into an 8 phase packet for SP."
-  ></metric>
-  <metric
-    name="TD_SIXTEEN_PHASE_WAVEFRONT" block=TD event=36 descr="dmask=7,b,d,e,f, wavefront was forwarded to SP in 16 phases."
-  ></metric>
-  <metric
-    name="TD_FOUR_PHASE_FORWARD_WAVEFRONT" block=TD event=37 descr="Count the wavefronts that were forwarded to SP in 4 phases (coalescable)."
-  ></metric>
-  <metric
-    name="TD_WRITE_ACK_WAVEFRONT" block=TD event=38 descr="Count write acknowledgments, sent to SQ and not to SP."
-  ></metric>
-  <metric
-    name="TD_RESERVED_39" block=TD event=39 descr="RESERVED_39"
-  ></metric>
-  <metric
-    name="TD_USER_DEFINED_BORDER" block=TD event=40 descr="Count the wavefronts that user defined border color was used."
-  ></metric>
-  <metric
-    name="TD_WHITE_BORDER" block=TD event=41 descr="Count the wavefronts that white border color was used."
-  ></metric>
-  <metric
-    name="TD_OPAQUE_BLACK_BORDER" block=TD event=42 descr="Count the wavefronts that opaque black border color was used."
-  ></metric>
-  <metric
-    name="TD_RESERVED_43" block=TD event=43 descr="RESERVED_43"
-  ></metric>
-  <metric
-    name="TD_RESERVED_44" block=TD event=44 descr="RESERVED_44"
-  ></metric>
-  <metric
-    name="TD_NACK" block=TD event=45 descr="Count the number of times an nack packet was generated and sent to SP/SQ."
-  ></metric>
-  <metric
-    name="TD_TD_SP_TRAFFIC" block=TD event=46 descr="Count the number of times this TD sends data to the SP."
-  ></metric>
-  <metric
-    name="TD_CONSUME_GDS_TRAFFIC" block=TD event=47 descr="Count the number of times GDS data was consumed by this TD, send to SP."
-  ></metric>
-  <metric
-    name="TD_ADDRESSCMD_POISON" block=TD event=48 descr="Count the wavefronts that had poisoned address or command."
-  ></metric>
-  <metric
-    name="TD_DATA_POISON" block=TD event=49 descr="Count the wavefronts that had poisoned data."
-  ></metric>
-  <metric
-    name="TD_START_CYCLE_0" block=TD event=50 descr="Count the number of times there was a phase change in a wave and the starting cycle was 0. Starting cycle denotes how fast the TD can process the incoming sample (0 is fastest, 3 is slowest)."
-  ></metric>
-  <metric
-    name="TD_START_CYCLE_1" block=TD event=51 descr="Count the number of times there was a phase change in a wave and the starting cycle was 1. Starting cycle denotes how fast the TD can process the incoming sample (0 is fastest, 3 is slowest)."
-  ></metric>
-  <metric
-    name="TD_START_CYCLE_2" block=TD event=52 descr="Count the number of times there was a phase change in a wave and the starting cycle was 2. Starting cycle denotes how fast the TD can process the incoming sample (0 is fastest, 3 is slowest)."
-  ></metric>
-  <metric
-    name="TD_START_CYCLE_3" block=TD event=53 descr="Count the number of times there was a phase change in a wave and the starting cycle was 3. Starting cycle denotes how fast the TD can process the incoming sample (0 is fastest, 3 is slowest)."
-  ></metric>
-  <metric
-    name="TD_NULL_CYCLE_OUTPUT" block=TD event=54 descr="Count the number of times that null cycles had occured at the output stage"
-  ></metric>
-  <metric
-    name="TD_D16_DATA_PACKED" block=TD event=55 descr="Count the number of times the TD packs 2 sets of d16 data into 1 32-bit container"
-  ></metric>
-  <metric
-    name="TD_TEXELS_ZEROED_OUT_BY_BLEND_ZERO_PRT" block=TD event=56 descr="Count the number of times a texel was zeroed out due to the blend zero prt feature"
-  ></metric>
-  # GRBM_SE counters
-  <metric
-    name="GRBM_SE_COUNT" block=GRBM_SE event=0 descr="Tie High - Count Number of Clocks"
-  ></metric>
-  <metric
-    name="GRBM_SE_USER_DEFINED" block=GRBM_SE event=1 descr="User defined performance select."
-  ></metric>
-  <metric
-    name="GRBM_SE_CB_BUSY" block=GRBM_SE event=2 descr="Any of the Color Blocks (CB) are busy in shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_DB_BUSY" block=GRBM_SE event=3 descr="Any of the Depth Blocks (DB) are busy in shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_SC_BUSY" block=GRBM_SE event=4 descr="Any of the Scan Converter Blocks (SC) are busy in shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_RESERVED_1" block=GRBM_SE event=5 descr="Reserved to maintain backwards compatibility."
-  ></metric>
-  <metric
-    name="GRBM_SE_SPI_BUSY" block=GRBM_SE event=6 descr="Any of the Shader Pipe Interpolators (SPI) are busy in shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_SX_BUSY" block=GRBM_SE event=7 descr="Any of the Shader Export Blocks (SX) are busy for shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_TA_BUSY" block=GRBM_SE event=8 descr="Any of the Texture Pipes (TA) are busy in shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_CB_CLEAN" block=GRBM_SE event=9 descr="Any of the Color Blocks (CB) are not clean in shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_DB_CLEAN" block=GRBM_SE event=10 descr="Any of the Depth Blocks (DB) are not clean in shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_RESERVED_0" block=GRBM_SE event=11 descr="Reserved to maintain backwards compatibility."
-  ></metric>
-  <metric
-    name="GRBM_SE_PA_BUSY" block=GRBM_SE event=12 descr="The Primitive Assembly Block (PA) is busy in shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_VGT_BUSY" block=GRBM_SE event=13 descr="The Vertex Geometry Tessellator Block (VGT) is busy in shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_BCI_BUSY" block=GRBM_SE event=14 descr="Any of the Barycentric Interpolators (BCI) are busy in shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_RMI_BUSY" block=GRBM_SE event=15 descr="Any of the Render Backend Memory Interface (RMI) are busy in shader engine 0."
-  ></metric>
-  # SDMA counters
-  <metric
-    name="SDMA_CYCLE" block=SDMA event=0 descr="Cycle count"
-  ></metric>
-  <metric
-    name="SDMA_IDLE" block=SDMA event=1 descr="Cycle count of SDMA idle"
-  ></metric>
-  <metric
-    name="SDMA_REG_IDLE" block=SDMA event=2 descr="Cycle count of register unit idle"
-  ></metric>
-  <metric
-    name="SDMA_RB_EMPTY" block=SDMA event=3 descr="Cycle count of ring buffer empty"
-  ></metric>
-  <metric
-    name="SDMA_RB_FULL" block=SDMA event=4 descr="Cycle count of ring buffer full"
-  ></metric>
-  <metric
-    name="SDMA_RB_WPTR_WRAP" block=SDMA event=5 descr="Number of ring buffer write pointer wraps"
-  ></metric>
-  <metric
-    name="SDMA_RB_RPTR_WRAP" block=SDMA event=6 descr="Number of ring buffer read pointer wraps"
-  ></metric>
-  <metric
-    name="SDMA_RB_WPTR_POLL_READ" block=SDMA event=7 descr="Number of ring buffer write pointer polling memory reads"
-  ></metric>
-  <metric
-    name="SDMA_RB_RPTR_WB" block=SDMA event=8 descr="Number of ring buffer read pointer writebacks"
-  ></metric>
-  <metric
-    name="SDMA_RB_CMD_IDLE" block=SDMA event=9 descr="Cycle count of ring command buffer unit idle"
-  ></metric>
-  <metric
-    name="SDMA_RB_CMD_FULL" block=SDMA event=10 descr="Cycle count of ring command packet buffer full"
-  ></metric>
-  <metric
-    name="SDMA_IB_CMD_IDLE" block=SDMA event=11 descr="Cycle count of indirect command packet buffer unit idle"
-  ></metric>
-  <metric
-    name="SDMA_IB_CMD_FULL" block=SDMA event=12 descr="Cycle count of indirect command packet buffer full"
-  ></metric>
-  <metric
-    name="SDMA_EX_IDLE" block=SDMA event=13 descr="Cycle count of execution unit idle"
-  ></metric>
-  <metric
-    name="SDMA_SRBM_REG_SEND" block=SDMA event=14 descr=""
-  ></metric>
-  <metric
-    name="SDMA_EX_IDLE_POLL_TIMER_EXPIRE" block=SDMA event=15 descr="Cycle count of poll on idle timer expire"
-  ></metric>
-  <metric
-    name="SDMA_MC_WR_IDLE" block=SDMA event=16 descr="Cycle count of memory write unit idle"
-  ></metric>
-  <metric
-    name="SDMA_MC_WR_COUNT" block=SDMA event=17 descr="Number of memory write requests issued"
-  ></metric>
-  <metric
-    name="SDMA_MC_RD_IDLE" block=SDMA event=18 descr="Cycle count of memory read unit idle"
-  ></metric>
-  <metric
-    name="SDMA_MC_RD_COUNT" block=SDMA event=19 descr="Number of memory read requests issued"
-  ></metric>
-  <metric
-    name="SDMA_MC_RD_RET_STALL" block=SDMA event=20 descr="Cycle count of read request stalled by MC pending return data"
-  ></metric>
-  <metric
-    name="SDMA_MC_RD_NO_POLL_IDLE" block=SDMA event=21 descr="Cycle count of memory read unit idle excluding WPTR poll-on-idle activity"
-  ></metric>
-  <metric
-    name="SDMA_DRM_IDLE" block=SDMA event=22 descr="Cycle count of drm interface unit idle"
-  ></metric>
-  <metric
-    name="SDMA_DRM_REQ_STALL" block=SDMA event=23 descr="Cycle count of drm clientport request stalled by DRM"
-  ></metric>
-  <metric
-    name="SDMA_SEM_IDLE" block=SDMA event=24 descr="Cycle count of sem interface unit idle"
-  ></metric>
-  <metric
-    name="SDMA_SEM_REQ_STALL" block=SDMA event=25 descr="Cycle count of sem request stalled by SEM"
-  ></metric>
-  <metric
-    name="SDMA_SEM_REQ_COUNT" block=SDMA event=26 descr="Number of sem requests issued"
-  ></metric>
-  <metric
-    name="SDMA_SEM_RESP_INCOMPLETE" block=SDMA event=27 descr="Number of sem response with status incomplete"
-  ></metric>
-  <metric
-    name="SDMA_SEM_RESP_FAIL" block=SDMA event=28 descr="Number of sem response with status fail"
-  ></metric>
-  <metric
-    name="SDMA_SEM_RESP_PASS" block=SDMA event=29 descr="Number of sem response with status pass"
-  ></metric>
-  <metric
-    name="SDMA_INT_IDLE" block=SDMA event=30 descr="Cycle count of interrupt interface unit idle"
-  ></metric>
-  <metric
-    name="SDMA_INT_REQ_STALL" block=SDMA event=31 descr="Cycle count of interrupt request stalled by IH/RLC"
-  ></metric>
-  <metric
-    name="SDMA_INT_REQ_COUNT" block=SDMA event=32 descr="Number of interrupt requests issued"
-  ></metric>
-  <metric
-    name="SDMA_INT_RESP_ACCEPTED" block=SDMA event=33 descr="Number of interrupt response with status accepted"
-  ></metric>
-  <metric
-    name="SDMA_INT_RESP_RETRY" block=SDMA event=34 descr="Number of interrupt response with status retry"
-  ></metric>
-  <metric
-    name="SDMA_NUM_PACKET" block=SDMA event=35 descr="Number of packets processed in command parser"
-  ></metric>
-  <metric
-    name="SDMA_DRM1_REQ_STALL" block=SDMA event=36 descr="Cycle count of drm1 clientport request stalled by DRM"
-  ></metric>
-  <metric
-    name="SDMA_CE_WREQ_IDLE" block=SDMA event=37 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_WR_IDLE" block=SDMA event=38 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_SPLIT_IDLE" block=SDMA event=39 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_RREQ_IDLE" block=SDMA event=40 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_OUT_IDLE" block=SDMA event=41 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_IN_IDLE" block=SDMA event=42 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_DST_IDLE" block=SDMA event=43 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_DRM_IDLE" block=SDMA event=44 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_DRM1_IDLE" block=SDMA event=45 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_AFIFO_FULL" block=SDMA event=46 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_DRM_FULL" block=SDMA event=47 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_DRM1_FULL" block=SDMA event=48 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_INFO_FULL" block=SDMA event=49 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_INFO1_FULL" block=SDMA event=50 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_RD_STALL" block=SDMA event=51 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_WR_STALL" block=SDMA event=52 descr=""
-  ></metric>
-  <metric
-    name="SDMA_GFX_SELECT" block=SDMA event=53 descr=""
-  ></metric>
-  <metric
-    name="SDMA_RLC0_SELECT" block=SDMA event=54 descr=""
-  ></metric>
-  <metric
-    name="SDMA_RLC1_SELECT" block=SDMA event=55 descr=""
-  ></metric>
-  <metric
-    name="SDMA_PAGE_SELECT" block=SDMA event=56 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CTX_CHANGE" block=SDMA event=57 descr="Time of auto ctx switch"
-  ></metric>
-  <metric
-    name="SDMA_CTX_CHANGE_EXPIRED" block=SDMA event=58 descr="Time of auto ctx switch due to time quantum reached"
-  ></metric>
-  <metric
-    name="SDMA_CTX_CHANGE_EXCEPTION" block=SDMA event=59 descr="Time of auto ctx switch due to exception"
-  ></metric>
-  <metric
-    name="SDMA_DOORBELL" block=SDMA event=60 descr="Time of gfx and rlc0 and rlc1 wptr updated by doorbell"
-  ></metric>
-  <metric
-    name="SDMA_RD_BA_RTR" block=SDMA event=61 descr="read bandwidth agitator indication"
-  ></metric>
-  <metric
-    name="SDMA_WR_BA_RTR" block=SDMA event=62 descr="write bandwidth agitator indication"
-  ></metric>
-  <metric
-    name="SDMA_F32_L1_WR_VLD" block=SDMA event=63 descr="F32 write data valid"
-  ></metric>
-  <metric
-    name="SDMA_CE_L1_WR_VLD" block=SDMA event=64 descr="CE write data valid to L1"
-  ></metric>
-  <metric
-    name="SDMA_CE_L1_STALL" block=SDMA event=65 descr="Read stall from CE to L1"
-  ></metric>
-  <metric
-    name="SDMA_SDMA_INVACK_NFLUSH" block=SDMA event=66 descr="Non-flushtype invalid ack from SDMA to ATCL2"
-  ></metric>
-  <metric
-    name="SDMA_SDMA_INVACK_FLUSH" block=SDMA event=67 descr="Flushtype invalid ack from SDMA to ATCL2"
-  ></metric>
-  <metric
-    name="SDMA_ATCL2_INVREQ_NFLUSH" block=SDMA event=68 descr="Non-flushtype invalid request from ATCL2 to SDMA"
-  ></metric>
-  <metric
-    name="SDMA_ATCL2_INVREQ_FLUSH" block=SDMA event=69 descr="Flushtype invalid request from ATCL2 to SDMA"
-  ></metric>
-  <metric
-    name="SDMA_ATCL2_RET_XNACK" block=SDMA event=70 descr="ATCL2 return non-zero XNACK"
-  ></metric>
-  <metric
-    name="SDMA_ATCL2_RET_ACK" block=SDMA event=71 descr="ATCL2 return zero XNACK"
-  ></metric>
-  <metric
-    name="SDMA_ATCL2_FREE" block=SDMA event=72 descr="ATCL2 return free to SDMA_L1"
-  ></metric>
-  <metric
-    name="SDMA_SDMA_ATCL2_SEND" block=SDMA event=73 descr="SDMA send page request to ATCL2"
-  ></metric>
-  <metric
-    name="SDMA_DMA_L1_WR_SEND" block=SDMA event=74 descr="Internal write request to L1"
-  ></metric>
-  <metric
-    name="SDMA_DMA_L1_RD_SEND" block=SDMA event=75 descr="Internal read request to L1"
-  ></metric>
-  <metric
-    name="SDMA_DMA_MC_WR_SEND" block=SDMA event=76 descr="L1 send write request to MC"
-  ></metric>
-  <metric
-    name="SDMA_DMA_MC_RD_SEND" block=SDMA event=77 descr="L2 send read request to MC"
-  ></metric>
-  <metric
-    name="SDMA_L1_WR_FIFO_IDLE" block=SDMA event=78 descr="L1 internal write FIFO empty"
-  ></metric>
-  <metric
-    name="SDMA_L1_RD_FIFO_IDLE" block=SDMA event=79 descr="L1 internal read FIFO empty"
-  ></metric>
-  <metric
-    name="SDMA_L1_WRL2_IDLE" block=SDMA event=80 descr="All write page requests to L2 are returned"
-  ></metric>
-  <metric
-    name="SDMA_L1_RDL2_IDLE" block=SDMA event=81 descr="All read page requests to L2 are returned"
-  ></metric>
-  <metric
-    name="SDMA_L1_WRMC_IDLE" block=SDMA event=82 descr="All write data requests to MC are returned"
-  ></metric>
-  <metric
-    name="SDMA_L1_RDMC_IDLE" block=SDMA event=83 descr="All read data requests to MC are returned"
-  ></metric>
-  <metric
-    name="SDMA_L1_WR_INV_IDLE" block=SDMA event=84 descr="Write client invalidation idle"
-  ></metric>
-  <metric
-    name="SDMA_L1_RD_INV_IDLE" block=SDMA event=85 descr="Read client invalidation idle"
-  ></metric>
-  <metric
-    name="SDMA_L1_WR_INV_EN" block=SDMA event=86 descr="Write client is in invalidation process"
-  ></metric>
-  <metric
-    name="SDMA_L1_RD_INV_EN" block=SDMA event=87 descr="Read client is in invalidation process"
-  ></metric>
-  <metric
-    name="SDMA_L1_WR_WAIT_INVADR" block=SDMA event=88 descr="Write client is waiting for invalidated page address"
-  ></metric>
-  <metric
-    name="SDMA_L1_RD_WAIT_INVADR" block=SDMA event=89 descr="Read client is waiting for invalidated page address"
-  ></metric>
-  <metric
-    name="SDMA_IS_INVREQ_ADDR_WR" block=SDMA event=90 descr="Write client is using the returned page address which is invalidated"
-  ></metric>
-  <metric
-    name="SDMA_IS_INVREQ_ADDR_RD" block=SDMA event=91 descr="Read client is using the returned page address which is invalidated"
-  ></metric>
-  <metric
-    name="SDMA_L1_WR_XNACK_TIMEOUT" block=SDMA event=92 descr="Write client received continuous xnacks which reaches the limit"
-  ></metric>
-  <metric
-    name="SDMA_L1_RD_XNACK_TIMEOUT" block=SDMA event=93 descr="Read client received continuous xnacks which reaches the limit"
-  ></metric>
-  <metric
-    name="SDMA_L1_INV_MIDDLE" block=SDMA event=94 descr="Invalidation happens for one page when one client is using that page and the other client is waiting for that page"
-  ></metric>
-  <metric
-    name="SDMA_UTCL1_TAG_DELAY_COUNTER" block=SDMA event=95 descr="Counts UTCL1 request latency between request sent and all return back."
-  ></metric>
-  <metric
-    name="SDMA_MMHUB_TAG_DELAY_COUNTER" block=SDMA event=96 descr="Counts MC read/write latency between request sent and all return back. This is the default"
-  ></metric>
-  # ATCL2 counters
-  <metric
-    name="ATCL2_NUMBER_OF_L1_REQUESTS" block=ATCL2 event=1 descr="number of L1 requests"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_BANK0_REQUESTS" block=ATCL2 event=2 descr="number of bank0 requests"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_BANK0_HITS" block=ATCL2 event=3 descr="number of bank0 hits"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_BANK0_MISSES" block=ATCL2 event=4 descr="number of bank0 misses"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_ATS_REQUESTS" block=ATCL2 event=5 descr="number of ATS Requests"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_ATS_RESPONSES" block=ATCL2 event=6 descr="number of ATS Responses"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_INVALIDATE_REQUEST" block=ATCL2 event=7 descr="number of invalidate request"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_FLUSHTYPE_INVALIDATE_REQUEST" block=ATCL2 event=8 descr="number of flushtype invalidate request"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_L1_RT_CACHE_REQUESTS" block=ATCL2 event=9 descr="number of L1 RT cache requests"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_RT_CACHE_BANK0_REQUESTS" block=ATCL2 event=10 descr="number of RT cache bank0 requests"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_RT_CACHE_BANK0_HITS" block=ATCL2 event=11 descr="number of RT cache bank0 hits"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_RT_CACHE_BANK0_MISSES" block=ATCL2 event=12 descr="number of RT cache bank0 misses"
-  ></metric>
-  # MCVML2 counters
-  <metric
-    name="MCVML2_BANK0_PTE_CACHE_BIGK0_REQUEST" block=MCVML2 event=1 descr="bank0 pte cache bigk0 request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_PTE_CACHE_BIGK0_HIT" block=MCVML2 event=2 descr="bank0 pte cache bigk0 hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_PTE_CACHE_BIGK0_MISS" block=MCVML2 event=3 descr="bank0 pte cache bigk0 miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_PTE_CACHE_BIGK0_UPDATE" block=MCVML2 event=4 descr="bank0 pte cache bigk0 update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_PTE_CACHE_4K0_REQUEST" block=MCVML2 event=5 descr="bank0 pte cache 4k0 request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_PTE_CACHE_4K0_HIT" block=MCVML2 event=6 descr="bank0 pte cache 4k0 hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_PTE_CACHE_4K0_MISS" block=MCVML2 event=7 descr="bank0 pte cache 4k0 miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_PTE_CACHE_4K0_UPDATE" block=MCVML2 event=8 descr="bank0 pte cache 4k0 update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_AGGREGATE_REQUEST" block=MCVML2 event=9 descr="bank0 aggregate request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_AGGREGATE_HIT" block=MCVML2 event=10 descr="bank0 aggregate hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_AGGREGATE_MISS" block=MCVML2 event=11 descr="bank0 aggregate miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_AGGREGATE_UPDATE" block=MCVML2 event=12 descr="bank0 aggregate update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_PTE_CACHE_BIGK0_REQUEST" block=MCVML2 event=13 descr="bank1 pte cache bigk0 request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_PTE_CACHE_BIGK0_HIT" block=MCVML2 event=14 descr="bank1 pte cache bigk0 hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_PTE_CACHE_BIGK0_MISS" block=MCVML2 event=15 descr="bank1 pte cache bigk0 miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_PTE_CACHE_BIGK0_UPDATE" block=MCVML2 event=16 descr="bank1 pte cache bigk0 update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_PTE_CACHE_4K0_REQUEST" block=MCVML2 event=17 descr="bank1 pte cache 4k0 request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_PTE_CACHE_4K0_HIT" block=MCVML2 event=18 descr="bank1 pte cache 4k0 hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_PTE_CACHE_4K0_MISS" block=MCVML2 event=19 descr="bank1 pte cache 4k0 miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_PTE_CACHE_4K0_UPDATE" block=MCVML2 event=20 descr="bank1 pte cache 4k0 update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_AGGREGATE_REQUEST" block=MCVML2 event=21 descr="bank1 aggregate request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_AGGREGATE_HIT" block=MCVML2 event=22 descr="bank1 aggregate hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_AGGREGATE_MISS" block=MCVML2 event=23 descr="bank1 aggregate miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_AGGREGATE_UPDATE" block=MCVML2 event=24 descr="bank1 aggregate update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_PTE_CACHE_BIGK0_REQUEST" block=MCVML2 event=25 descr="bank2 pte cache bigk0 request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_PTE_CACHE_BIGK0_HIT" block=MCVML2 event=26 descr="bank2 pte cache bigk0 hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_PTE_CACHE_BIGK0_MISS" block=MCVML2 event=27 descr="bank2 pte cache bigk0 miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_PTE_CACHE_BIGK0_UPDATE" block=MCVML2 event=28 descr="bank2 pte cache bigk0 update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_PTE_CACHE_4K0_REQUEST" block=MCVML2 event=29 descr="bank2 pte cache 4k0 request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_PTE_CACHE_4K0_HIT" block=MCVML2 event=30 descr="bank2 pte cache 4k0 hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_PTE_CACHE_4K0_MISS" block=MCVML2 event=31 descr="bank2 pte cache 4k0 miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_PTE_CACHE_4K0_UPDATE" block=MCVML2 event=32 descr="bank2 pte cache 4k0 update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_AGGREGATE_REQUEST" block=MCVML2 event=33 descr="bank2 aggregate request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_AGGREGATE_HIT" block=MCVML2 event=34 descr="bank2 aggregate hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_AGGREGATE_MISS" block=MCVML2 event=35 descr="bank2 aggregate miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_AGGREGATE_UPDATE" block=MCVML2 event=36 descr="bank2 aggregate update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_PTE_CACHE_BIGK0_REQUEST" block=MCVML2 event=37 descr="bank3 pte cache bigk0 request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_PTE_CACHE_BIGK0_HIT" block=MCVML2 event=38 descr="bank3 pte cache bigk0 hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_PTE_CACHE_BIGK0_MISS" block=MCVML2 event=39 descr="bank3 pte cache bigk0 miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_PTE_CACHE_BIGK0_UPDATE" block=MCVML2 event=40 descr="bank3 pte cache bigk0 update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_PTE_CACHE_4K0_REQUEST" block=MCVML2 event=41 descr="bank3 pte cache 4k0 request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_PTE_CACHE_4K0_HIT" block=MCVML2 event=42 descr="bank3 pte cache 4k0 hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_PTE_CACHE_4K0_MISS" block=MCVML2 event=43 descr="bank3 pte cache 4k0 miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_PTE_CACHE_4K0_UPDATE" block=MCVML2 event=44 descr="bank3 pte cache 4k0 update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_AGGREGATE_REQUEST" block=MCVML2 event=45 descr="bank3 aggregate request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_AGGREGATE_HIT" block=MCVML2 event=46 descr="bank3 aggregate hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_AGGREGATE_MISS" block=MCVML2 event=47 descr="bank3 aggregate miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_AGGREGATE_UPDATE" block=MCVML2 event=48 descr="bank3 aggregate update"
-  ></metric>
-  <metric
-    name="MCVML2_RETRY" block=MCVML2 event=49 descr="retry"
-  ></metric>
-  <metric
-    name="MCVML2_NO_RETRY" block=MCVML2 event=50 descr="no retry"
-  ></metric>
-  <metric
-    name="MCVML2_INTERRUPT" block=MCVML2 event=51 descr="interrupt"
-  ></metric>
-  <metric
-    name="MCVML2_PDE0_CACHE_REQUEST" block=MCVML2 event=52 descr="pde0 cache request"
-  ></metric>
-  <metric
-    name="MCVML2_PDE0_CACHE_HIT" block=MCVML2 event=53 descr="pde0 cache hit"
-  ></metric>
-  <metric
-    name="MCVML2_PDE0_CACHE_MISS" block=MCVML2 event=54 descr="pde0 cache miss"
-  ></metric>
-  <metric
-    name="MCVML2_PDE0_CACHE_UPDATE" block=MCVML2 event=55 descr="pde0 cache update"
-  ></metric>
-  <metric
-    name="MCVML2_PDE0_CACHE_PTE" block=MCVML2 event=56 descr="pde0 cache pte"
-  ></metric>
-  <metric
-    name="MCVML2_PDE1_CACHE_REQUEST" block=MCVML2 event=57 descr="pde1 cache request"
-  ></metric>
-  <metric
-    name="MCVML2_PDE1_CACHE_HIT" block=MCVML2 event=58 descr="pde1 cache hit"
-  ></metric>
-  <metric
-    name="MCVML2_PDE1_CACHE_MISS" block=MCVML2 event=59 descr="pde1 cache miss"
-  ></metric>
-  <metric
-    name="MCVML2_PDE1_CACHE_UPDATE" block=MCVML2 event=60 descr="pde1 cache update"
-  ></metric>
-  <metric
-    name="MCVML2_PDE1_CACHE_PTE" block=MCVML2 event=61 descr="pde1 cache pte"
-  ></metric>
-  <metric
-    name="MCVML2_PDE2_CACHE_REQUEST" block=MCVML2 event=62 descr="pde2 cache request"
-  ></metric>
-  <metric
-    name="MCVML2_PDE2_CACHE_HIT" block=MCVML2 event=63 descr="pde2 cache hit"
-  ></metric>
-  <metric
-    name="MCVML2_PDE2_CACHE_MISS" block=MCVML2 event=64 descr="pde2 cache miss"
-  ></metric>
-  <metric
-    name="MCVML2_PDE2_CACHE_UPDATE" block=MCVML2 event=65 descr="pde2 cache update"
-  ></metric>
-  <metric
-    name="MCVML2_PDE2_CACHE_PTE" block=MCVML2 event=66 descr="pde2 cache pte"
-  ></metric>
-  <metric
-    name="MCVML2_LOG_INVAL" block=MCVML2 event=67 descr="log inval"
-  ></metric>
-  <metric
-    name="MCVML2_LOG_TRANS" block=MCVML2 event=68 descr="log trans"
-  ></metric>
-  <metric
-    name="MCVML2_LOG_TRANS_SKIPPED" block=MCVML2 event=69 descr="log trans skipped"
-  ></metric>
-  <metric
-    name="MCVML2_RDIF_REQUEST_PHYSICAL_SYSTEM" block=MCVML2 event=70 descr="rdif request physical system"
-  ></metric>
-  <metric
-    name="MCVML2_RDIF_REQUEST_PHYSICAL_SYSTEM_START_LATENCY" block=MCVML2 event=71 descr="rdif request physical system start (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_RDIF_REQUEST_PHYSICAL_SYSTEM_STOP_LATENCY" block=MCVML2 event=72 descr="rdif request physical system stop (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_RDIF_REQUEST_OTHER" block=MCVML2 event=73 descr="rdif request other"
-  ></metric>
-  <metric
-    name="MCVML2_RDIF_REQUEST_OTHER_START_LATENCY" block=MCVML2 event=74 descr="rdif request other start (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_RDIF_REQUEST_OTHER_STOP_LATENCY" block=MCVML2 event=75 descr="rdif request other stop (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_QOS_REQUEST" block=MCVML2 event=76 descr="qos request"
-  ></metric>
-  <metric
-    name="MCVML2_QOS_HIT_FETCH_SKIPPED" block=MCVML2 event=77 descr="qos hit (fetch skipped)"
-  ></metric>
-  <metric
-    name="MCVML2_QOS_MISS_FETCH_ISSUED" block=MCVML2 event=78 descr="qos miss (fetch issued)"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL0_REQUEST" block=MCVML2 event=79 descr="level0 request"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL1_REQUEST" block=MCVML2 event=80 descr="level1 request"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL2_REQUEST" block=MCVML2 event=81 descr="level2 request"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL3_REQUEST" block=MCVML2 event=82 descr="level3 request"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL0_REQUEST_START_LATENCY" block=MCVML2 event=83 descr="level0 request start (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL0_REQUEST_STOP_LATENCY" block=MCVML2 event=84 descr="level0 request stop (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL1_REQUEST_START_LATENCY" block=MCVML2 event=85 descr="level1 request start (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL1_REQUEST_STOP_LATENCY" block=MCVML2 event=86 descr="level1 request stop (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL2_REQUEST_START_LATENCY" block=MCVML2 event=87 descr="level2 request start (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL2_REQUEST_STOP_LATENCY" block=MCVML2 event=88 descr="level2 request stop (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL3_REQUEST_START_LATENCY" block=MCVML2 event=89 descr="level3 request start (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL3_REQUEST_STOP_LATENCY" block=MCVML2 event=90 descr="level3 request stop (latency)"
-  ></metric>
-  # ATC counters
-  <metric
-    name="ATC_A_VALUE_OF_0_MEANS_COUNT_CYCLES_OTHERWISE_SELECTS" block=ATC event=0 descr="A value of 0 means count cycles otherwise selects event to count "
-  ></metric>
-  <metric
-    name="ATC_EVENT_START_FOR_STATISTICAL_MIN_SCLKS_FROM_ATC_RPB_REQ_TRANSLATION" block=ATC event=1 descr="event start for statistical min sclks from ATC_RPB_req translation request to RPB_ATC_ret completion"
-  ></metric>
-  <metric
-    name="ATC_EVENT_END_FOR_STATISTICAL_MIN_SCLKS_FROM_ATC_RPB_REQ_TRANSLATION" block=ATC event=2 descr="event end for statistical min sclks from ATC_RPB_req translation request to RPB_ATC_ret completion"
-  ></metric>
-  <metric
-    name="ATC_EVENT_START_FOR_STATISTICAL_MIN_SCLKS_FROM_ATC_RPB_REQ_PAGE" block=ATC event=3 descr="event start for statistical min sclks from ATC_RPB_req page request to RPB_ATC_ret page return"
-  ></metric>
-  <metric
-    name="ATC_EVENT_END_FOR_STATISTICAL_MIN_SCLKS_FROM_ATC_RPB_REQ_PAGE" block=ATC event=4 descr="event end for statistical min sclks from ATC_RPB_req page request to RPB_ATC_ret page return"
-  ></metric>
-  <metric
-    name="ATC_EVENT_START_FOR_STATISTICAL_MAX_SCLKS_FROM_ATC_RPB_REQ_TRANSLATION" block=ATC event=5 descr="event start for statistical max sclks from ATC_RPB_req translation request to RPB_ATC_ret completion"
-  ></metric>
-  <metric
-    name="ATC_EVENT_END_FOR_STATISTICAL_MAX_SCLKS_FROM_ATC_RPB_REQ_TRANSLATION" block=ATC event=6 descr="event end for statistical max sclks from ATC_RPB_req translation request to RPB_ATC_ret completion"
-  ></metric>
-  <metric
-    name="ATC_EVENT_START_FOR_STATISTICAL_MAX_SCLKS_FROM_ATC_RPB_REQ_PAGE" block=ATC event=7 descr="event start for statistical max sclks from ATC_RPB_req page request to RPB_ATC_ret page return"
-  ></metric>
-  <metric
-    name="ATC_EVENT_END_FOR_STATISTICAL_MAX_SCLKS_FROM_ATC_RPB_REQ_PAGE" block=ATC event=8 descr="event end for statistical max sclks from ATC_RPB_req page request to RPB_ATC_ret page return"
-  ></metric>
-  <metric
-    name="ATC_EVENT_START_FOR_MAX_SCLKS_FROM_ATS_L2_INVALIDATE_REQUEST" block=ATC event=9 descr="event start for max sclks from ATS_L2 invalidate request to L2_ATS invalidate ack"
-  ></metric>
-  <metric
-    name="ATC_EVENT_END_FOR_MAX_SCLKS_FROM_ATS_L2_INVALIDATE_REQUEST" block=ATC event=10 descr="event end for max sclks from ATS_L2 invalidate request to L2_ATS invalidate ack"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_REQUESTS_FROM_L2" block=ATC event=11 descr="number of requests from L2"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_FIRST_TIME_TRANS_SUCCESSES" block=ATC event=12 descr="number of first time trans successes"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_PRI_REQUESTS" block=ATC event=13 descr="number of pri requests"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_TRANS_FAILURES" block=ATC event=14 descr="number of trans failures"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_PRI_REQUESTS_NOT_SATISFIED" block=ATC event=15 descr="number of pri requests not satisfied"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_INVALIDATE_REQUESTS_W_PASID_TO_GET_A" block=ATC event=16 descr="number of invalidate requests w PASID to get a correct number"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_INVALIDATE_REQUESTS_W_OUT_PASID" block=ATC event=17 descr="number of invalidate requests w out PASID"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_PASID_CHANGES" block=ATC event=18 descr="number of PASID changes"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_TIMES_1_TRANSLATIONS_RETURNED" block=ATC event=19 descr="number of times 1 translations returned"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_TIMES_2_8_TRANSLATIONS_RETURNED_NOT_BLOCKED" block=ATC event=20 descr="number of times 2 8 translations returned not blocked by invalidations"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_TIMES_5_8_TRANSLATIONS_RETURNED_NOT_BLOCKED" block=ATC event=21 descr="number of times 5 8 translations returned not blocked by invalidations"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_TIMES_SIZE_BIT_WAS_SET_ON_NON" block=ATC event=22 descr="number of times size bit was set on non speculative transactions returned to L2 (>4K translation was returned)"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_INVALIDATE_REQUESTS_THAT_MATCHED_MULTIPLE_VMIDS_EVENT" block=ATC event=23 descr="number of invalidate requests that matched multiple vmids event"
-  ></metric>
-</gfx906>
diff --git a/src/perfmon_pub/gfx908_metrics.xml b/src/perfmon_pub/gfx908_metrics.xml
deleted file mode 100644
index 8db51ecf9c..0000000000
--- a/src/perfmon_pub/gfx908_metrics.xml
+++ /dev/null
@@ -1,5731 +0,0 @@
-<gfx908>
-  # CPC counters
-  <metric
-    name="CPC_ALWAYS_COUNT" block=CPC event=0 descr="Always Count."
-  ></metric>
-  <metric
-    name="CPC_RCIU_STALL_WAIT_ON_FREE" block=CPC event=1 descr="RCIU Stall Waiting on Free."
-  ></metric>
-  <metric
-    name="CPC_RCIU_STALL_PRIV_VIOLATION" block=CPC event=2 descr="RCIU Stall on Priv violation."
-  ></metric>
-  <metric
-    name="CPC_MIU_STALL_ON_RDREQ_FREE" block=CPC event=3 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPC_MIU_STALL_ON_WRREQ_FREE" block=CPC event=4 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPC_TCIU_STALL_WAIT_ON_FREE" block=CPC event=5 descr="TCIU Stall waiting for free."
-  ></metric>
-  <metric
-    name="CPC_ME1_STALL_WAIT_ON_RCIU_READY" block=CPC event=6 descr="Me1 stall waiting on RCIU Ready."
-  ></metric>
-  <metric
-    name="CPC_ME1_STALL_WAIT_ON_RCIU_READY_PERF" block=CPC event=7 descr="Me1 stall waiting on RCIU Ready Perf."
-  ></metric>
-  <metric
-    name="CPC_ME1_STALL_WAIT_ON_RCIU_READ" block=CPC event=8 descr="Me1 stall waiting on RCIU read."
-  ></metric>
-  <metric
-    name="CPC_ME1_STALL_WAIT_ON_MIU_READ" block=CPC event=9 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPC_ME1_STALL_WAIT_ON_MIU_WRITE" block=CPC event=10 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPC_ME1_STALL_ON_DATA_FROM_ROQ" block=CPC event=11 descr="Me1 stall on data from roq."
-  ></metric>
-  <metric
-    name="CPC_ME1_STALL_ON_DATA_FROM_ROQ_PERF" block=CPC event=12 descr="Me1 stall on data from roq Perf."
-  ></metric>
-  <metric
-    name="CPC_ME1_BUSY_FOR_PACKET_DECODE" block=CPC event=13 descr="Me1 busy for packet decode."
-  ></metric>
-  <metric
-    name="CPC_ME2_STALL_WAIT_ON_RCIU_READY" block=CPC event=14 descr="Me2 stall waiting on RCIU Ready. (Valid Only if ME2 is available"
-  ></metric>
-  <metric
-    name="CPC_ME2_STALL_WAIT_ON_RCIU_READY_PERF" block=CPC event=15 descr="Me2 stall waiting on RCIU Ready Perf. (Valid Only if ME2 is available"
-  ></metric>
-  <metric
-    name="CPC_ME2_STALL_WAIT_ON_RCIU_READ" block=CPC event=16 descr="Me2 stall waiting on RCIU read. (Valid Only if ME2 is available"
-  ></metric>
-  <metric
-    name="CPC_ME2_STALL_WAIT_ON_MIU_READ" block=CPC event=17 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPC_ME2_STALL_WAIT_ON_MIU_WRITE" block=CPC event=18 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPC_ME2_STALL_ON_DATA_FROM_ROQ" block=CPC event=19 descr="Me2 stall on data from roq. (Valid Only if ME2 is available"
-  ></metric>
-  <metric
-    name="CPC_ME2_STALL_ON_DATA_FROM_ROQ_PERF" block=CPC event=20 descr="Me2 stall on data from roq Perf. (Valid Only if ME2 is available"
-  ></metric>
-  <metric
-    name="CPC_ME2_BUSY_FOR_PACKET_DECODE" block=CPC event=21 descr="Me2 busy for packet decode. (Valid Only if ME2 is available"
-  ></metric>
-  <metric
-    name="CPC_UTCL2IU_STALL_WAIT_ON_FREE" block=CPC event=22 descr="UTCL2IU is stalled waiting on credits from the UTCL2."
-  ></metric>
-  <metric
-    name="CPC_UTCL2IU_STALL_WAIT_ON_TAGS" block=CPC event=23 descr="UTCL2IU has used all available tags and is waiting on the UTCL2 to return them."
-  ></metric>
-  <metric
-    name="CPC_UTCL1_STALL_ON_TRANSLATION" block=CPC event=24 descr="One of the UTCL1s is stalled waiting on translation, XNACK or PENDING response."
-  ></metric>
-  <metric
-    name="CPC_CPC_STAT_BUSY" block=CPC event=25 descr="CPC Busy."
-  ></metric>
-  <metric
-    name="CPC_CPC_STAT_IDLE" block=CPC event=26 descr="CPC Idle."
-  ></metric>
-  <metric
-    name="CPC_CPC_STAT_STALL" block=CPC event=27 descr="CPC Stalled."
-  ></metric>
-  <metric
-    name="CPC_CPC_TCIU_BUSY" block=CPC event=28 descr="CPC TCIU interface Busy."
-  ></metric>
-  <metric
-    name="CPC_CPC_TCIU_IDLE" block=CPC event=29 descr="CPC TCIU interface Idle."
-  ></metric>
-  <metric
-    name="CPC_CPC_UTCL2IU_BUSY" block=CPC event=30 descr="CPC UTCL2 interface Busy."
-  ></metric>
-  <metric
-    name="CPC_CPC_UTCL2IU_IDLE" block=CPC event=31 descr="CPC UTCL2 interface Idle."
-  ></metric>
-  <metric
-    name="CPC_CPC_UTCL2IU_STALL" block=CPC event=32 descr="CPC UTCL2 interface Stalled waiting on Free, Tags or Translation."
-  ></metric>
-  <metric
-    name="CPC_ME1_DC0_SPI_BUSY" block=CPC event=33 descr="CPC Me1 Processor Busy."
-  ></metric>
-  <metric
-    name="CPC_ME2_DC1_SPI_BUSY" block=CPC event=34 descr="CPC Me2 Processor Busy. (Valid Only if ME2 is available)"
-  ></metric>
-  # CPF counters
-  <metric
-    name="CPF_ALWAYS_COUNT" block=CPF event=0 descr="Always Count."
-  ></metric>
-  <metric
-    name="CPF_MIU_STALLED_WAITING_RDREQ_FREE" block=CPF event=1 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPF_TCIU_STALLED_WAITING_ON_FREE" block=CPF event=2 descr="CPF TCIU stalled waiting on Free."
-  ></metric>
-  <metric
-    name="CPF_TCIU_STALLED_WAITING_ON_TAGS" block=CPF event=3 descr="CPF TCIU stalled waiting on tags."
-  ></metric>
-  <metric
-    name="CPF_CSF_BUSY_FOR_FETCHING_RING" block=CPF event=4 descr="CSF busy for fetching Ring data."
-  ></metric>
-  <metric
-    name="CPF_CSF_BUSY_FOR_FETCHING_IB1" block=CPF event=5 descr="CSF busy for fetching Indirect buffer 1."
-  ></metric>
-  <metric
-    name="CPF_CSF_BUSY_FOR_FETCHING_IB2" block=CPF event=6 descr="CSF busy for fetching Indirect buffer 2."
-  ></metric>
-  <metric
-    name="CPF_CSF_BUSY_FOR_FECTHINC_STATE" block=CPF event=7 descr="CSF busy for fetching state data."
-  ></metric>
-  <metric
-    name="CPF_MIU_BUSY_FOR_OUTSTANDING_TAGS" block=CPF event=8 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPF_CSF_RTS_MIU_NOT_RTR" block=CPF event=9 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPF_CSF_STATE_FIFO_NOT_RTR" block=CPF event=10 descr="CSF state fifo no RTR."
-  ></metric>
-  <metric
-    name="CPF_CSF_FETCHING_CMD_BUFFERS" block=CPF event=11 descr="CSF is fetching command buffers."
-  ></metric>
-  <metric
-    name="CPF_GRBM_DWORDS_SENT" block=CPF event=12 descr="CPF to GRBM 4 Dwords sent."
-  ></metric>
-  <metric
-    name="CPF_DYNAMIC_CLOCK_VALID" block=CPF event=13 descr="CPF Dynamic clock is valid."
-  ></metric>
-  <metric
-    name="CPF_REGISTER_CLOCK_VALID" block=CPF event=14 descr="CPF register clock is valid."
-  ></metric>
-  <metric
-    name="CPF_MIU_WRITE_REQUEST_SEND" block=CPF event=15 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPF_MIU_READ_REQUEST_SEND" block=CPF event=16 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPF_UTCL2IU_STALL_WAIT_ON_FREE" block=CPF event=17 descr="UTCL2IU is stalled waiting on credits from the UTCL2."
-  ></metric>
-  <metric
-    name="CPF_UTCL2IU_STALL_WAIT_ON_TAGS" block=CPF event=18 descr="UTCL2IU has used all available tags and is waiting on the UTCL2 to return them."
-  ></metric>
-  <metric
-    name="CPF_GFX_UTCL1_STALL_ON_TRANSLATION" block=CPF event=19 descr="One of the Graphics UTCL1s is stalled waiting on translation, XNACK or PENDING response."
-  ></metric>
-  <metric
-    name="CPF_CMP_UTCL1_STALL_ON_TRANSLATION" block=CPF event=20 descr="One of the Compute UTCL1s is stalled waiting on translation, XNACK or PENDING response."
-  ></metric>
-  <metric
-    name="CPF_RCIU_STALL_WAIT_ON_FREE" block=CPF event=21 descr="CPF RCIU is stalled waiting on credits from GRBM."
-  ></metric>
-  <metric
-    name="CPF_TCIU_READ_REQUEST_SENT" block=CPF event=22 descr="Count of TC read requests"
-  ></metric>
-  <metric
-    name="CPF_CPF_STAT_BUSY" block=CPF event=23 descr="CPF Busy."
-  ></metric>
-  <metric
-    name="CPF_CPF_STAT_IDLE" block=CPF event=24 descr="CPF Idle."
-  ></metric>
-  <metric
-    name="CPF_CPF_STAT_STALL" block=CPF event=25 descr="CPF Stalled."
-  ></metric>
-  <metric
-    name="CPF_CPF_TCIU_BUSY" block=CPF event=26 descr="CPF TCIU interface Busy."
-  ></metric>
-  <metric
-    name="CPF_CPF_TCIU_IDLE" block=CPF event=27 descr="CPF TCIU interface Idle."
-  ></metric>
-  <metric
-    name="CPF_CPF_TCIU_STALL" block=CPF event=28 descr="CPF TCIU interface Stalled waiting on Free, Tags."
-  ></metric>
-  <metric
-    name="CPF_CPF_UTCL2IU_BUSY" block=CPF event=29 descr="CPF UTCL2 interface Busy."
-  ></metric>
-  <metric
-    name="CPF_CPF_UTCL2IU_IDLE" block=CPF event=30 descr="CPF UTCL2 interface Idle."
-  ></metric>
-  <metric
-    name="CPF_CPF_UTCL2IU_STALL" block=CPF event=31 descr="CPF UTCL2 interface Stalled waiting on Free, Tags."
-  ></metric>
-  # GDS counters
-  <metric
-    name="GDS_DS_ADDR_CONFL" block=GDS event=0 descr="Number of conflicting addresses in DS memory"
-  ></metric>
-  <metric
-    name="GDS_DS_BANK_CONFL" block=GDS event=1 descr="Number of conflicting banks in DS memory"
-  ></metric>
-  <metric
-    name="GDS_WBUF_FLUSH" block=GDS event=2 descr="Number of times the RBIU write buffer is flushed"
-  ></metric>
-  <metric
-    name="GDS_WR_COMP" block=GDS event=3 descr="Number of times a WRITE_COMPLETE is put in write buffer"
-  ></metric>
-  <metric
-    name="GDS_WBUF_WR" block=GDS event=4 descr="Number of times the RBIU writes to buffer"
-  ></metric>
-  <metric
-    name="GDS_RBUF_HIT" block=GDS event=5 descr="Number of times an RBIU read hits in the buffer"
-  ></metric>
-  <metric
-    name="GDS_RBUF_MISS" block=GDS event=6 descr="Number of times an RBIU read misses the buffer"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_NORET" block=GDS event=7 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_RET" block=GDS event=8 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_ORD_CNT" block=GDS event=9 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_2COMP_REQ" block=GDS event=10 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_ORD_WAVE_VALID" block=GDS event=11 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_GDS_DATA_VALID" block=GDS event=12 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_GDS_STALL_BY_ORD" block=GDS event=13 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_GDS_WR_OP" block=GDS event=14 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_GDS_RD_OP" block=GDS event=15 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_GDS_ATOM_OP" block=GDS event=16 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_GDS_REL_OP" block=GDS event=17 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_GDS_CMPXCH_OP" block=GDS event=18 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_GDS_BYTE_OP" block=GDS event=19 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_GDS_SHORT_OP" block=GDS event=20 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_NORET" block=GDS event=21 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_RET" block=GDS event=22 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_ORD_CNT" block=GDS event=23 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_2COMP_REQ" block=GDS event=24 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_ORD_WAVE_VALID" block=GDS event=25 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_GDS_DATA_VALID" block=GDS event=26 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_GDS_STALL_BY_ORD" block=GDS event=27 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_GDS_WR_OP" block=GDS event=28 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_GDS_RD_OP" block=GDS event=29 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_GDS_ATOM_OP" block=GDS event=30 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_GDS_REL_OP" block=GDS event=31 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_GDS_CMPXCH_OP" block=GDS event=32 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_GDS_BYTE_OP" block=GDS event=33 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_GDS_SHORT_OP" block=GDS event=34 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_NORET" block=GDS event=35 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_RET" block=GDS event=36 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_ORD_CNT" block=GDS event=37 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_2COMP_REQ" block=GDS event=38 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_ORD_WAVE_VALID" block=GDS event=39 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_GDS_DATA_VALID" block=GDS event=40 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_GDS_STALL_BY_ORD" block=GDS event=41 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_GDS_WR_OP" block=GDS event=42 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_GDS_RD_OP" block=GDS event=43 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_GDS_ATOM_OP" block=GDS event=44 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_GDS_REL_OP" block=GDS event=45 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_GDS_CMPXCH_OP" block=GDS event=46 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_GDS_BYTE_OP" block=GDS event=47 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_GDS_SHORT_OP" block=GDS event=48 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_NORET" block=GDS event=49 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_RET" block=GDS event=50 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_ORD_CNT" block=GDS event=51 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_2COMP_REQ" block=GDS event=52 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_ORD_WAVE_VALID" block=GDS event=53 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_GDS_DATA_VALID" block=GDS event=54 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_GDS_STALL_BY_ORD" block=GDS event=55 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_GDS_WR_OP" block=GDS event=56 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_GDS_RD_OP" block=GDS event=57 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_GDS_ATOM_OP" block=GDS event=58 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_GDS_REL_OP" block=GDS event=59 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_GDS_CMPXCH_OP" block=GDS event=60 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_GDS_BYTE_OP" block=GDS event=61 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_GDS_SHORT_OP" block=GDS event=62 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_NORET" block=GDS event=63 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_RET" block=GDS event=64 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_ORD_CNT" block=GDS event=65 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_2COMP_REQ" block=GDS event=66 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_ORD_WAVE_VALID" block=GDS event=67 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_GDS_DATA_VALID" block=GDS event=68 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_GDS_STALL_BY_ORD" block=GDS event=69 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_GDS_WR_OP" block=GDS event=70 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_GDS_RD_OP" block=GDS event=71 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_GDS_ATOM_OP" block=GDS event=72 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_GDS_REL_OP" block=GDS event=73 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_GDS_CMPXCH_OP" block=GDS event=74 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_GDS_BYTE_OP" block=GDS event=75 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_GDS_SHORT_OP" block=GDS event=76 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_NORET" block=GDS event=77 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_RET" block=GDS event=78 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_ORD_CNT" block=GDS event=79 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_2COMP_REQ" block=GDS event=80 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_ORD_WAVE_VALID" block=GDS event=81 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_GDS_DATA_VALID" block=GDS event=82 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_GDS_STALL_BY_ORD" block=GDS event=83 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_GDS_WR_OP" block=GDS event=84 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_GDS_RD_OP" block=GDS event=85 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_GDS_ATOM_OP" block=GDS event=86 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_GDS_REL_OP" block=GDS event=87 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_GDS_CMPXCH_OP" block=GDS event=88 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_GDS_BYTE_OP" block=GDS event=89 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_GDS_SHORT_OP" block=GDS event=90 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_NORET" block=GDS event=91 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_RET" block=GDS event=92 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_ORD_CNT" block=GDS event=93 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_2COMP_REQ" block=GDS event=94 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_ORD_WAVE_VALID" block=GDS event=95 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_GDS_DATA_VALID" block=GDS event=96 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_GDS_STALL_BY_ORD" block=GDS event=97 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_GDS_WR_OP" block=GDS event=98 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_GDS_RD_OP" block=GDS event=99 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_GDS_ATOM_OP" block=GDS event=100 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_GDS_REL_OP" block=GDS event=101 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_GDS_CMPXCH_OP" block=GDS event=102 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_GDS_BYTE_OP" block=GDS event=103 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_GDS_SHORT_OP" block=GDS event=104 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_NORET" block=GDS event=105 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_RET" block=GDS event=106 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_ORD_CNT" block=GDS event=107 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_2COMP_REQ" block=GDS event=108 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_ORD_WAVE_VALID" block=GDS event=109 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_GDS_DATA_VALID" block=GDS event=110 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_GDS_STALL_BY_ORD" block=GDS event=111 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_GDS_WR_OP" block=GDS event=112 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_GDS_RD_OP" block=GDS event=113 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_GDS_ATOM_OP" block=GDS event=114 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_GDS_REL_OP" block=GDS event=115 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_GDS_CMPXCH_OP" block=GDS event=116 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_GDS_BYTE_OP" block=GDS event=117 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_GDS_SHORT_OP" block=GDS event=118 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH0_NORET" block=GDS event=119 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH0_RET" block=GDS event=120 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH0_ORD_CNT" block=GDS event=121 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH0_2COMP_REQ" block=GDS event=122 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH0_ORD_WAVE_VALID" block=GDS event=123 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH0_GDS_DATA_VALID" block=GDS event=124 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH0_GDS_STALL_BY_ORD" block=GDS event=125 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH0_GDS_WR_OP" block=GDS event=126 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH0_GDS_RD_OP" block=GDS event=127 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH0_GDS_ATOM_OP" block=GDS event=128 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH0_GDS_REL_OP" block=GDS event=129 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH0_GDS_CMPXCH_OP" block=GDS event=130 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH0_GDS_BYTE_OP" block=GDS event=131 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH0_GDS_SHORT_OP" block=GDS event=132 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH1_NORET" block=GDS event=133 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH1_RET" block=GDS event=134 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH1_ORD_CNT" block=GDS event=135 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH1_2COMP_REQ" block=GDS event=136 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH1_ORD_WAVE_VALID" block=GDS event=137 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH1_GDS_DATA_VALID" block=GDS event=138 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH1_GDS_STALL_BY_ORD" block=GDS event=139 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH1_GDS_WR_OP" block=GDS event=140 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH1_GDS_RD_OP" block=GDS event=141 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH1_GDS_ATOM_OP" block=GDS event=142 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH1_GDS_REL_OP" block=GDS event=143 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH1_GDS_CMPXCH_OP" block=GDS event=144 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH1_GDS_BYTE_OP" block=GDS event=145 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH1_GDS_SHORT_OP" block=GDS event=146 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH0_NORET" block=GDS event=147 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH0_RET" block=GDS event=148 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH0_ORD_CNT" block=GDS event=149 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH0_2COMP_REQ" block=GDS event=150 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH0_ORD_WAVE_VALID" block=GDS event=151 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH0_GDS_DATA_VALID" block=GDS event=152 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH0_GDS_STALL_BY_ORD" block=GDS event=153 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH0_GDS_WR_OP" block=GDS event=154 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH0_GDS_RD_OP" block=GDS event=155 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH0_GDS_ATOM_OP" block=GDS event=156 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH0_GDS_REL_OP" block=GDS event=157 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH0_GDS_CMPXCH_OP" block=GDS event=158 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH0_GDS_BYTE_OP" block=GDS event=159 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH0_GDS_SHORT_OP" block=GDS event=160 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH1_NORET" block=GDS event=161 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH1_RET" block=GDS event=162 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH1_ORD_CNT" block=GDS event=163 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH1_2COMP_REQ" block=GDS event=164 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH1_ORD_WAVE_VALID" block=GDS event=165 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH1_GDS_DATA_VALID" block=GDS event=166 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH1_GDS_STALL_BY_ORD" block=GDS event=167 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH1_GDS_WR_OP" block=GDS event=168 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH1_GDS_RD_OP" block=GDS event=169 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH1_GDS_ATOM_OP" block=GDS event=170 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH1_GDS_REL_OP" block=GDS event=171 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH1_GDS_CMPXCH_OP" block=GDS event=172 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH1_GDS_BYTE_OP" block=GDS event=173 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH1_GDS_SHORT_OP" block=GDS event=174 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH0_NORET" block=GDS event=175 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH0_RET" block=GDS event=176 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH0_ORD_CNT" block=GDS event=177 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH0_2COMP_REQ" block=GDS event=178 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH0_ORD_WAVE_VALID" block=GDS event=179 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH0_GDS_DATA_VALID" block=GDS event=180 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH0_GDS_STALL_BY_ORD" block=GDS event=181 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH0_GDS_WR_OP" block=GDS event=182 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH0_GDS_RD_OP" block=GDS event=183 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH0_GDS_ATOM_OP" block=GDS event=184 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH0_GDS_REL_OP" block=GDS event=185 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH0_GDS_CMPXCH_OP" block=GDS event=186 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH0_GDS_BYTE_OP" block=GDS event=187 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH0_GDS_SHORT_OP" block=GDS event=188 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH1_NORET" block=GDS event=189 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH1_RET" block=GDS event=190 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH1_ORD_CNT" block=GDS event=191 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH1_2COMP_REQ" block=GDS event=192 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH1_ORD_WAVE_VALID" block=GDS event=193 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH1_GDS_DATA_VALID" block=GDS event=194 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH1_GDS_STALL_BY_ORD" block=GDS event=195 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH1_GDS_WR_OP" block=GDS event=196 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH1_GDS_RD_OP" block=GDS event=197 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH1_GDS_ATOM_OP" block=GDS event=198 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH1_GDS_REL_OP" block=GDS event=199 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH1_GDS_CMPXCH_OP" block=GDS event=200 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH1_GDS_BYTE_OP" block=GDS event=201 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH1_GDS_SHORT_OP" block=GDS event=202 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH0_NORET" block=GDS event=203 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH0_RET" block=GDS event=204 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH0_ORD_CNT" block=GDS event=205 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH0_2COMP_REQ" block=GDS event=206 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH0_ORD_WAVE_VALID" block=GDS event=207 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH0_GDS_DATA_VALID" block=GDS event=208 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH0_GDS_STALL_BY_ORD" block=GDS event=209 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH0_GDS_WR_OP" block=GDS event=210 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH0_GDS_RD_OP" block=GDS event=211 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH0_GDS_ATOM_OP" block=GDS event=212 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH0_GDS_REL_OP" block=GDS event=213 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH0_GDS_CMPXCH_OP" block=GDS event=214 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH0_GDS_BYTE_OP" block=GDS event=215 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH0_GDS_SHORT_OP" block=GDS event=216 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH1_NORET" block=GDS event=217 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH1_RET" block=GDS event=218 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH1_ORD_CNT" block=GDS event=219 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH1_2COMP_REQ" block=GDS event=220 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH1_ORD_WAVE_VALID" block=GDS event=221 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH1_GDS_DATA_VALID" block=GDS event=222 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH1_GDS_STALL_BY_ORD" block=GDS event=223 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH1_GDS_WR_OP" block=GDS event=224 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH1_GDS_RD_OP" block=GDS event=225 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH1_GDS_ATOM_OP" block=GDS event=226 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH1_GDS_REL_OP" block=GDS event=227 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH1_GDS_CMPXCH_OP" block=GDS event=228 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH1_GDS_BYTE_OP" block=GDS event=229 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH1_GDS_SHORT_OP" block=GDS event=230 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_GWS_RELEASED" block=GDS event=231 descr="Number of waves released by GWS"
-  ></metric>
-  <metric
-    name="GDS_GWS_BYPASS" block=GDS event=232 descr="Number of waves bypassed by GWS"
-  ></metric>
-  # GRBM counters
-  <metric
-    name="GRBM_COUNT" block=GRBM event=0 descr="Tie High - Count Number of Clocks"
-  ></metric>
-  <metric
-    name="GRBM_USER_DEFINED" block=GRBM event=1 descr="User defined performance select."
-  ></metric>
-  <metric
-    name="GRBM_GUI_ACTIVE" block=GRBM event=2 descr="The GUI is Active"
-  ></metric>
-  <metric
-    name="GRBM_CP_BUSY" block=GRBM event=3 descr="Any of the Command Processor (CPG/CPC/CPF) blocks are busy."
-  ></metric>
-  <metric
-    name="GRBM_CP_COHER_BUSY" block=GRBM event=4 descr="The Command Processor Graphics (CPG) Surface Coherency Logic is busy."
-  ></metric>
-  <metric
-    name="GRBM_CP_DMA_BUSY" block=GRBM event=5 descr="The Command Processor Graphics (CPG) DMA Logic is busy."
-  ></metric>
-  <metric
-    name="GRBM_CB_BUSY" block=GRBM event=6 descr="Any of the Color Blocks (CB) are busy in the shader engine(s)."
-  ></metric>
-  <metric
-    name="GRBM_DB_BUSY" block=GRBM event=7 descr="Any of the Depth Blocks (DB) are busy in the shader engine(s)."
-  ></metric>
-  <metric
-    name="GRBM_PA_BUSY" block=GRBM event=8 descr="Any of the Primitive Assembly Blocks (PA) are busy in the shader engine(s)."
-  ></metric>
-  <metric
-    name="GRBM_SC_BUSY" block=GRBM event=9 descr="Any of the Scan Converter Blocks (SC) are busy in the shader engine(s)."
-  ></metric>
-  <metric
-    name="GRBM_RESERVED_6" block=GRBM event=10 descr="Reserved to maintain backwards compatibility."
-  ></metric>
-  <metric
-    name="GRBM_SPI_BUSY" block=GRBM event=11 descr="Any of the Shader Pipe Interpolators (SPI) are busy in the shader engine(s)."
-  ></metric>
-  <metric
-    name="GRBM_SX_BUSY" block=GRBM event=12 descr="Any of the Shader Export Blocks (SX) are busy."
-  ></metric>
-  <metric
-    name="GRBM_TA_BUSY" block=GRBM event=13 descr="Any of the Texture Pipes (TA) are busy in the shader engine(s)."
-  ></metric>
-  <metric
-    name="GRBM_CB_CLEAN" block=GRBM event=14 descr="Any of the Color Blocks (CB) are not clean in all shader engine(s)."
-  ></metric>
-  <metric
-    name="GRBM_DB_CLEAN" block=GRBM event=15 descr="Any of the Depth Blocks (DB) are not clean in all shader engine(s)."
-  ></metric>
-  <metric
-    name="GRBM_RESERVED_5" block=GRBM event=16 descr="Reserved to maintain backwards compatibility."
-  ></metric>
-  <metric
-    name="GRBM_VGT_BUSY" block=GRBM event=17 descr="Any of the Vertex Geometry Tessellator Blocks (VGT) are busy in the shader engine(s)."
-  ></metric>
-  <metric
-    name="GRBM_RESERVED_4" block=GRBM event=18 descr="Reserved to maintain backwards compatibility."
-  ></metric>
-  <metric
-    name="GRBM_RESERVED_3" block=GRBM event=19 descr="Reserved to maintain backwards compatibility."
-  ></metric>
-  <metric
-    name="GRBM_RESERVED_2" block=GRBM event=20 descr="Reserved to maintain backwards compatibility."
-  ></metric>
-  <metric
-    name="GRBM_RESERVED_1" block=GRBM event=21 descr="Reserved to maintain backwards compatibility."
-  ></metric>
-  <metric
-    name="GRBM_RESERVED_0" block=GRBM event=22 descr="Reserved to maintain backwards compatibility."
-  ></metric>
-  <metric
-    name="GRBM_IA_BUSY" block=GRBM event=23 descr="The Input Assembler (IA) is busy."
-  ></metric>
-  <metric
-    name="GRBM_IA_NO_DMA_BUSY" block=GRBM event=24 descr="The Input Assembler (IA) is busy; Does not include the Index DMA engine status."
-  ></metric>
-  <metric
-    name="GRBM_GDS_BUSY" block=GRBM event=25 descr="The Global Data Share (GDS) is busy."
-  ></metric>
-  <metric
-    name="GRBM_BCI_BUSY" block=GRBM event=26 descr="Any of the Barycentric Interpolators (BCI) are busy in the shader engine(s)."
-  ></metric>
-  <metric
-    name="GRBM_RLC_BUSY" block=GRBM event=27 descr="The Ring List Controller (RLC) is busy."
-  ></metric>
-  <metric
-    name="GRBM_TC_BUSY" block=GRBM event=28 descr="Any of the Texture Cache Blocks (TCP/TCI/TCA/TCC) are busy."
-  ></metric>
-  <metric
-    name="GRBM_CPG_BUSY" block=GRBM event=29 descr="The Command Processor Graphics (CPG) is busy."
-  ></metric>
-  <metric
-    name="GRBM_CPC_BUSY" block=GRBM event=30 descr="The Command Processor Compute (CPC) is busy."
-  ></metric>
-  <metric
-    name="GRBM_CPF_BUSY" block=GRBM event=31 descr="The Command Processor Fetchers (CPF) is busy."
-  ></metric>
-  <metric
-    name="GRBM_WD_BUSY" block=GRBM event=32 descr="The Work Distributor (WD) is busy."
-  ></metric>
-  <metric
-    name="GRBM_WD_NO_DMA_BUSY" block=GRBM event=33 descr="The Work Distributor (WD) is busy; Does not include the Index DMA engine status."
-  ></metric>
-  <metric
-    name="GRBM_UTCL2_BUSY" block=GRBM event=34 descr="The Unified Translation Cache Level-2 (UTCL2) block is busy."
-  ></metric>
-  <metric
-    name="GRBM_EA_BUSY" block=GRBM event=35 descr="The Efficiency Arbiter (EA) block is busy."
-  ></metric>
-  <metric
-    name="GRBM_RMI_BUSY" block=GRBM event=36 descr="The Render Backend Memory Interface (RMI) block is busy."
-  ></metric>
-  <metric
-    name="GRBM_CPAXI_BUSY" block=GRBM event=37 descr="The CPAXI block is busy."
-  ></metric>
-  # SPI counters
-  <metric
-    name="SPI_VS_WINDOW_VALID" block=SPI event=0 descr="Clock count enabled by perfcounter_start event."
-  ></metric>
-  <metric
-    name="SPI_VS_BUSY" block=SPI event=1 descr="Number of clocks with outstanding waves (SPI or SH)."
-  ></metric>
-  <metric
-    name="SPI_VS_FIRST_WAVE" block=SPI event=2 descr="Number of VS_IS_DS first waves"
-  ></metric>
-  <metric
-    name="SPI_VS_LAST_WAVE" block=SPI event=3 descr="Number of VS_IS_DS last waves."
-  ></metric>
-  <metric
-    name="SPI_VS_LSHS_DEALLOC" block=SPI event=4 descr="Number of VS_IS_DS lds dealloc waves."
-  ></metric>
-  <metric
-    name="SPI_VS_PC_STALL" block=SPI event=5 descr="Number of clocks stalled due to pc space."
-  ></metric>
-  <metric
-    name="SPI_VS_POS0_STALL" block=SPI event=6 descr="Number of clocks stalled due to pos buf space in SH0."
-  ></metric>
-  <metric
-    name="SPI_VS_POS1_STALL" block=SPI event=7 descr="Number of clocks stalled due to pos buf space in SH1."
-  ></metric>
-  <metric
-    name="SPI_VS_CRAWLER_STALL" block=SPI event=8 descr="Number of clocks event/wave order fifo is full."
-  ></metric>
-  <metric
-    name="SPI_VS_EVENT_WAVE" block=SPI event=9 descr="Number of events and waves."
-  ></metric>
-  <metric
-    name="SPI_VS_WAVE" block=SPI event=10 descr="Number of waves"
-  ></metric>
-  <metric
-    name="SPI_VS_PERS_UPD_FULL0" block=SPI event=11 descr="Number of clks VS persistent state update fifo0 is full."
-  ></metric>
-  <metric
-    name="SPI_VS_PERS_UPD_FULL1" block=SPI event=12 descr="Number of clks VS persistent state update fifo1 is full."
-  ></metric>
-  <metric
-    name="SPI_VS_LATE_ALLOC_FULL" block=SPI event=13 descr="Number of clks VS late alloc fifo is full."
-  ></metric>
-  <metric
-    name="SPI_VS_FIRST_SUBGRP" block=SPI event=14 descr="Number of first of subgroup waves."
-  ></metric>
-  <metric
-    name="SPI_VS_LAST_SUBGRP" block=SPI event=15 descr="Number of last of subgroup waves."
-  ></metric>
-  <metric
-    name="SPI_VS_ALLOC_CNT" block=SPI event=16 descr="Number of launched VS waves that rasterize (alloc export space)"
-  ></metric>
-  <metric
-    name="SPI_VS_PC_ALLOC_CNT" block=SPI event=17 descr="Number of parameter cache lines allocated"
-  ></metric>
-  <metric
-    name="SPI_VS_LATE_ALLOC_ACCUM" block=SPI event=18 descr="Accumulation of number of VS waves pending export allocation"
-  ></metric>
-  <metric
-    name="SPI_GS_WINDOW_VALID" block=SPI event=19 descr="Clock count enabled by perfcounter_start event."
-  ></metric>
-  <metric
-    name="SPI_GS_BUSY" block=SPI event=20 descr="Number of clocks with outstanding waves (SPI or SH)."
-  ></metric>
-  <metric
-    name="SPI_GS_CRAWLER_STALL" block=SPI event=21 descr="Number of clocks event/wave order fifo is full."
-  ></metric>
-  <metric
-    name="SPI_GS_EVENT_WAVE" block=SPI event=22 descr="Number of events and waves"
-  ></metric>
-  <metric
-    name="SPI_GS_WAVE" block=SPI event=23 descr="Number of waves."
-  ></metric>
-  <metric
-    name="SPI_GS_PERS_UPD_FULL0" block=SPI event=24 descr="Number of clks GS persistent state update fifo0 is full."
-  ></metric>
-  <metric
-    name="SPI_GS_PERS_UPD_FULL1" block=SPI event=25 descr="Number of clks GS persistent state update fifo1 is full."
-  ></metric>
-  <metric
-    name="SPI_GS_FIRST_SUBGRP" block=SPI event=26 descr="Number of first of subgroup waves."
-  ></metric>
-  <metric
-    name="SPI_GS_LAST_SUBGRP" block=SPI event=27 descr="Number of last of subgroup waves."
-  ></metric>
-  <metric
-    name="SPI_GS_HS_DEALLOC" block=SPI event=28 descr="Number of offchip hs dealloc events read from crawler."
-  ></metric>
-  <metric
-    name="SPI_GS_NGG_SE_LATE_ALLOC_LIMIT" block=SPI event=29 descr="Number of clks this SE has reached allocation wave limit (can not launch more waves until pending ones allocate)."
-  ></metric>
-  <metric
-    name="SPI_GS_GRP_FIFO_FULL" block=SPI event=30 descr="GS Group FIFO full count"
-  ></metric>
-  <metric
-    name="SPI_HS_WINDOW_VALID" block=SPI event=31 descr="Clock count enabled by perfcounter_start event."
-  ></metric>
-  <metric
-    name="SPI_HS_BUSY" block=SPI event=32 descr="Number of clocks with outstanding waves (SPI or SH)."
-  ></metric>
-  <metric
-    name="SPI_HS_CRAWLER_STALL" block=SPI event=33 descr="Number of clocks event/wave order fifo is full."
-  ></metric>
-  <metric
-    name="SPI_HS_FIRST_WAVE" block=SPI event=34 descr="Number of first waves."
-  ></metric>
-  <metric
-    name="SPI_HS_LAST_WAVE" block=SPI event=35 descr="Number of last waves."
-  ></metric>
-  <metric
-    name="SPI_HS_OFFCHIP_LDS_STALL" block=SPI event=36 descr="Number of clks HS waits to allocate offchip LDS space."
-  ></metric>
-  <metric
-    name="SPI_HS_EVENT_WAVE" block=SPI event=37 descr="Number of events and waves."
-  ></metric>
-  <metric
-    name="SPI_HS_WAVE" block=SPI event=38 descr="Number of waves."
-  ></metric>
-  <metric
-    name="SPI_HS_PERS_UPD_FULL0" block=SPI event=39 descr="Number of clks HS persistent state update fifo0 is full."
-  ></metric>
-  <metric
-    name="SPI_HS_PERS_UPD_FULL1" block=SPI event=40 descr="Number of clks HS persistent state update fifo1 is full."
-  ></metric>
-  <metric
-    name="SPI_CSG_WINDOW_VALID" block=SPI event=41 descr="Clock count enabled by perfcounter_start event."
-  ></metric>
-  <metric
-    name="SPI_CSG_BUSY" block=SPI event=42 descr="Number of clocks with outstanding waves (SPI or SH)."
-  ></metric>
-  <metric
-    name="SPI_CSG_NUM_THREADGROUPS" block=SPI event=43 descr="Number of threadgroups launched"
-  ></metric>
-  <metric
-    name="SPI_CSG_CRAWLER_STALL" block=SPI event=44 descr="Number of clocks event/wave order fifo is full"
-  ></metric>
-  <metric
-    name="SPI_CSG_EVENT_WAVE" block=SPI event=45 descr="Number of events and waves"
-  ></metric>
-  <metric
-    name="SPI_CSG_WAVE" block=SPI event=46 descr="Number of waves"
-  ></metric>
-  <metric
-    name="SPI_CSN_WINDOW_VALID" block=SPI event=47 descr="Clock count enabled by perfcounter_start event. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSN_BUSY" block=SPI event=48 descr="Number of clocks with outstanding waves (SPI or SH). Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSN_NUM_THREADGROUPS" block=SPI event=49 descr="Number of threadgroups launched. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSN_CRAWLER_STALL" block=SPI event=50 descr="Number of clocks event/wave order fifo is full. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSN_EVENT_WAVE" block=SPI event=51 descr="Number of events and waves. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSN_WAVE" block=SPI event=52 descr="Number of waves. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_PS_WINDOW_VALID" block=SPI event=53 descr="Clock count enabled by perfcounter_start event. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_BUSY" block=SPI event=54 descr="Number of clocks with outstanding waves (SPI or SH), Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_ACTIVE" block=SPI event=55 descr="Number of clks ptr_buff is processing waves. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_DEALLOC_BIN0" block=SPI event=56 descr="Count deallocs for SE matching bin0 range. Uses a 17-bit increment so we can only use the 32-bit counters. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_FPOS_BIN1_STALL" block=SPI event=57 descr="Number of clks stalled waiting for a VS done from SE matching bin1. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_EVENT_WAVE" block=SPI event=58 descr="Number of events and waves, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_WAVE" block=SPI event=59 descr="Number of waves, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_OPT_WAVE" block=SPI event=60 descr="Number of waves with center+centroid+bc_optimize, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_PASS_BIN0" block=SPI event=61 descr="Count waves with bin0 pc reads / attr, range is 1-16. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_PASS_BIN1" block=SPI event=62 descr="Count waves with bin1 pc reads / attr, range is 1-16. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_FPOS_BIN2" block=SPI event=63 descr="Count fpos for SE matching bin2 range, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_PRIM_BIN0" block=SPI event=64 descr="Count waves with bin0 prims, range is 1-16. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_PRIM_BIN1" block=SPI event=65 descr="Count waves with bin1 prims, range is 1-16. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_CNF_BIN2" block=SPI event=66 descr="Count waves with bin2 conflicts, range is 0-15 but max is 8. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_CNF_BIN3" block=SPI event=67 descr="Count waves with bin3 conflicts, range is 0-15 but max is 8. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_CRAWLER_STALL" block=SPI event=68 descr="Number of clocks event/wave order fifo is full, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_LDS_RES_FULL" block=SPI event=69 descr="Number of clks PS per-wavefront storage is full, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_PERS_UPD_FULL0" block=SPI event=70 descr="Number of clks PS persistent state update fifo0 is full, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_PERS_UPD_FULL1" block=SPI event=71 descr="Number of clks PS persistent state update fifo1 is full, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_POPS_WAVE_SENT" block=SPI event=72 descr="Number of PS POPS Waves that were issued by the PS wave controller, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_POPS_WAVE_EXIT" block=SPI event=73 descr="Number of POPS Enabled PS waves that exit the PS crawler, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_LDS0_PC_VALID" block=SPI event=74 descr="Number of param cache reads sent to PC from SH0."
-  ></metric>
-  <metric
-    name="SPI_LDS1_PC_VALID" block=SPI event=75 descr="Number of param cache reads sent to PC from SH1."
-  ></metric>
-  <metric
-    name="SPI_RA_PIPE_REQ_BIN2" block=SPI event=76 descr="Arb cycles with bin2 mqcs pipe_arb req =sum(csprobe0, csproben), Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_TASK_REQ_BIN3" block=SPI event=77 descr="Arb cycles with bin3 requests =sum(mqcs0, mqcsn) + dxcs +sum(gfx), Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_WR_CTL_FULL" block=SPI event=78 descr="Arb cycles where RA is stalled due to wave launch fifo_full. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_REQ_NO_ALLOC" block=SPI event=79 descr="Arb cycles with requests but no allocation. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_REQ_NO_ALLOC_PS" block=SPI event=80 descr="Arb cycles with PS req and no PS alloc. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is from RA0 and PS0, DEBUG_SH_SEL =1, source is from RA0 and PS1."
-  ></metric>
-  <metric
-    name="SPI_RA_REQ_NO_ALLOC_VS" block=SPI event=81 descr="Arb cycles with VS req and no VS alloc. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_REQ_NO_ALLOC_GS" block=SPI event=82 descr="Arb cycles with GS req and no GS alloc. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_REQ_NO_ALLOC_HS" block=SPI event=83 descr="Arb cycles with HS req and no HS alloc. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_REQ_NO_ALLOC_CSG" block=SPI event=84 descr="Arb cycles with CSg req and no CSg alloc. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_REQ_NO_ALLOC_CSN" block=SPI event=85 descr="Arb cycles with CSn req and no CSn alloc. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_RES_STALL_PS" block=SPI event=86 descr="Arb cycles with PS req and no PS fits. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is from RA0 and PS0, DEBUG_SH_SEL =1, source is from RA0 and PS1."
-  ></metric>
-  <metric
-    name="SPI_RA_RES_STALL_VS" block=SPI event=87 descr="Arb cycles with VS req and no VS fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_RES_STALL_GS" block=SPI event=88 descr="Arb cycles with GS req and no GS fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_RES_STALL_HS" block=SPI event=89 descr="Arb cycles with HS req and no HS fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_RES_STALL_CSG" block=SPI event=90 descr="Arb cycles with CSg req and no CSg fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_RES_STALL_CSN" block=SPI event=91 descr="Arb cycles with CSn req and no CSn fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_TMP_STALL_PS" block=SPI event=92 descr="Cycles where ps wants to req but does not fit in temp space. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_TMP_STALL_VS" block=SPI event=93 descr="Cycles where vs wants to req but does not fit in temp space."
-  ></metric>
-  <metric
-    name="SPI_RA_TMP_STALL_GS" block=SPI event=94 descr="Cycles where gs wants to req but does not fit in temp space."
-  ></metric>
-  <metric
-    name="SPI_RA_TMP_STALL_HS" block=SPI event=95 descr="Cycles where hs wants to req but does not fit in temp space."
-  ></metric>
-  <metric
-    name="SPI_RA_TMP_STALL_CSG" block=SPI event=96 descr="Cycles where csg wants to req but does not fit in temp space."
-  ></metric>
-  <metric
-    name="SPI_RA_TMP_STALL_CSN" block=SPI event=97 descr="Cycles where csn wants to req but does not fit in temp space."
-  ></metric>
-  <metric
-    name="SPI_RA_WAVE_SIMD_FULL_PS" block=SPI event=98 descr="Sum of SIMD where WAVE resource full when !ps_fits. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is from RA0 and PS0, DEBUG_SH_SEL =1, source is from RA0 and PS1."
-  ></metric>
-  <metric
-    name="SPI_RA_WAVE_SIMD_FULL_VS" block=SPI event=99 descr="Sum of SIMD where WAVE resource full when !vs_fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_WAVE_SIMD_FULL_GS" block=SPI event=100 descr="Sum of SIMD where WAVE resource full when !gs_fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_WAVE_SIMD_FULL_HS" block=SPI event=101 descr="Sum of SIMD where WAVE can't take hs wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_WAVE_SIMD_FULL_CSG" block=SPI event=102 descr="Sum of SIMD where WAVE can't take csg wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_WAVE_SIMD_FULL_CSN" block=SPI event=103 descr="Sum of SIMD where WAVE can't take csn wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_VGPR_SIMD_FULL_PS" block=SPI event=104 descr="Sum of SIMD where VGPR can't take ps wave when !fits. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is from RA0 and PS0, DEBUG_SH_SEL =1, source is from RA0 and PS1."
-  ></metric>
-  <metric
-    name="SPI_RA_VGPR_SIMD_FULL_VS" block=SPI event=105 descr="Sum of SIMD where VGPR can't take vs wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_VGPR_SIMD_FULL_GS" block=SPI event=106 descr="Sum of SIMD where VGPR can't take gs wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_VGPR_SIMD_FULL_HS" block=SPI event=107 descr="Sum of SIMD where VGPR can't take hs wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_VGPR_SIMD_FULL_CSG" block=SPI event=108 descr="Sum of SIMD where VGPR can't take csg wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_VGPR_SIMD_FULL_CSN" block=SPI event=109 descr="Sum of SIMD where VGPR can't take csn wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_SGPR_SIMD_FULL_PS" block=SPI event=110 descr="Sum of SIMD where SGPR can't take ps wave when !fits. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is from RA0 and PS0, DEBUG_SH_SEL =1, source is from RA0 and PS1."
-  ></metric>
-  <metric
-    name="SPI_RA_SGPR_SIMD_FULL_VS" block=SPI event=111 descr="Sum of SIMD where SGPR can't take vs wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_SGPR_SIMD_FULL_GS" block=SPI event=112 descr="Sum of SIMD where SGPR can't take gs wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_SGPR_SIMD_FULL_HS" block=SPI event=113 descr="Sum of SIMD where SGPR can't take hs wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_SGPR_SIMD_FULL_CSG" block=SPI event=114 descr="Sum of SIMD where SGPR can't take csg wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_SGPR_SIMD_FULL_CSN" block=SPI event=115 descr="Sum of SIMD where SGPR can't take csn wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_LDS_CU_FULL_PS" block=SPI event=116 descr="Sum of CU where LDS can't take ps wave when !fits. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is from RA0 and PS0, DEBUG_SH_SEL =1, source is from RA0 and PS1."
-  ></metric>
-  <metric
-    name="SPI_RA_LDS_CU_FULL_LS" block=SPI event=117 descr="Sum of CU where LDS can't take ls wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_LDS_CU_FULL_ES" block=SPI event=118 descr="Sum of CU where LDS can't take es wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_LDS_CU_FULL_CSG" block=SPI event=119 descr="Sum of CU where LDS can't take csg wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_LDS_CU_FULL_CSN" block=SPI event=120 descr="Sum of CU where LDS can't take csn wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_BAR_CU_FULL_HS" block=SPI event=121 descr="Sum of CU where BARRIER can't take hs wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_BAR_CU_FULL_CSG" block=SPI event=122 descr="Sum of CU where BARRIER can't take csg wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_BAR_CU_FULL_CSN" block=SPI event=123 descr="Sum of CU where BARRIER can't take csn wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_BULKY_CU_FULL_CSG" block=SPI event=124 descr="Sum of CU where BULKY can't take csg wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_BULKY_CU_FULL_CSN" block=SPI event=125 descr="Sum of CU where BULKY can't take csn wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_TGLIM_CU_FULL_CSG" block=SPI event=126 descr="Cycles where csg wants to req but all CU are at tg_limit"
-  ></metric>
-  <metric
-    name="SPI_RA_TGLIM_CU_FULL_CSN" block=SPI event=127 descr="Cycles where csn wants to req but all CU are at tg_limit"
-  ></metric>
-  <metric
-    name="SPI_RA_WVLIM_STALL_PS" block=SPI event=128 descr="Number of clocks ps is stalled due to WAVE LIMIT. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_RA_WVLIM_STALL_VS" block=SPI event=129 descr="Number of clocks vs is stalled due to WAVE LIMIT."
-  ></metric>
-  <metric
-    name="SPI_RA_WVLIM_STALL_GS" block=SPI event=130 descr="Number of clocks gs is stalled due to WAVE LIMIT."
-  ></metric>
-  <metric
-    name="SPI_RA_WVLIM_STALL_HS" block=SPI event=131 descr="Number of clocks hs is stalled due to WAVE LIMIT."
-  ></metric>
-  <metric
-    name="SPI_RA_WVLIM_STALL_CSG" block=SPI event=132 descr="Number of clocks csg is stalled due to WAVE LIMIT."
-  ></metric>
-  <metric
-    name="SPI_RA_WVLIM_STALL_CSN" block=SPI event=133 descr="Number of clocks csn is stalled due to WAVE LIMIT."
-  ></metric>
-  <metric
-    name="SPI_RA_VS_LOCK" block=SPI event=134 descr="Arb cycles VS has a CU locked when !fits and active_cnt < threshold. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_GS_LOCK" block=SPI event=135 descr="Arb cycles GS has a CU locked when !fits and active_cnt < threshold. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_HS_LOCK" block=SPI event=136 descr="Arb cycles HS has a CU locked when !fits and active_cnt < threshold. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_CSG_LOCK" block=SPI event=137 descr="Arb cycles CSG has a CU locked when !fits and active_cnt < threshold. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_CSN_LOCK" block=SPI event=138 descr="Arb cycles CSN has a CU locked when !fits and active_cnt < threshold. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_RSV_UPD" block=SPI event=139 descr="Cycles spent doing updates for reservation changes, Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_EXP_ARB_COL_CNT" block=SPI event=140 descr="Sum of number of color exp requests pending each clk, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_EXP_ARB_PAR_CNT" block=SPI event=141 descr="Sum of number of parameter exp requests pending each clk, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_EXP_ARB_POS_CNT" block=SPI event=142 descr="Sum of number of position exp requests pending each clk, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_EXP_ARB_GDS_CNT" block=SPI event=143 descr="Sum of number of gds exp requests pending each clk, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_NUM_PS_COL_R0_EXPORTS" block=SPI event=144 descr="Number of PS color export grants in dwords for read 0, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is from WB0 and COL0 DEBUG_SH_SEL =1, source is from WB0 and COL1."
-  ></metric>
-  <metric
-    name="SPI_NUM_PS_COL_R1_EXPORTS" block=SPI event=145 descr="Number of PS color export grants in dwords for read 1, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is from WB0 and COL0 DEBUG_SH_SEL =1, source is from WB0 and COL1."
-  ></metric>
-  <metric
-    name="SPI_NUM_VS_POS_R0_EXPORTS" block=SPI event=146 descr="Number of VS position export grants in dwords for read 0, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_NUM_VS_POS_R1_EXPORTS" block=SPI event=147 descr="Number of VS position export grants in dwords for read 1, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_NUM_VS_PARAM_R0_EXPORTS" block=SPI event=148 descr="Number of VS parameter export grants in dwords for read 0, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_NUM_VS_PARAM_R1_EXPORTS" block=SPI event=149 descr="Number of VS parameter export grants in dwords for read 1, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_NUM_VS_GDS_R0_EXPORTS" block=SPI event=150 descr="Number of gds export grants in dwords for read 0, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_NUM_VS_GDS_R1_EXPORTS" block=SPI event=151 descr="Number of gds export grants in dwords for read 1, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_NUM_EXPGRANT_EXPORTS" block=SPI event=152 descr="Number of cycles export bus is busy, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_CLKGATE_BUSY_STALL" block=SPI event=153 descr="Number of clocks with spi busy and not all_clocks_on"
-  ></metric>
-  <metric
-    name="SPI_CLKGATE_ACTIVE_STALL" block=SPI event=154 descr="Number of clocks with spim_active and not all_clocks_on."
-  ></metric>
-  <metric
-    name="SPI_CLKGATE_ALL_CLOCKS_ON" block=SPI event=155 descr="Number of clocks with all_clocks_on."
-  ></metric>
-  <metric
-    name="SPI_CLKGATE_CGTT_DYN_ON" block=SPI event=156 descr="Number of clocks with spi cgtt dyn clk on."
-  ></metric>
-  <metric
-    name="SPI_CLKGATE_CGTT_REG_ON" block=SPI event=157 descr="Number of clocks with spi cgtt reg clk on."
-  ></metric>
-  <metric
-    name="SPI_PIX_ALLOC_PEND_CNT" block=SPI event=158 descr="Sum of number of pixel alloc requests pending per clk, Source is WWC0"
-  ></metric>
-  <metric
-    name="SPI_PIX_ALLOC_SCB_STALL" block=SPI event=159 descr="Number of clks pix alloc stalled due to color scoreboard. Source is WWC0"
-  ></metric>
-  <metric
-    name="SPI_PIX_ALLOC_DB0_STALL" block=SPI event=160 descr="Number of clks pix alloc stalled due to db0 color buffer. Source is WWC0"
-  ></metric>
-  <metric
-    name="SPI_PIX_ALLOC_DB1_STALL" block=SPI event=161 descr="Number of clks pix alloc stalled due to db1 color buffer. Source is WWC0"
-  ></metric>
-  <metric
-    name="SPI_PIX_ALLOC_DB2_STALL" block=SPI event=162 descr="Number of clks pix alloc stalled due to db2 color buffer. Source is WWC0"
-  ></metric>
-  <metric
-    name="SPI_PIX_ALLOC_DB3_STALL" block=SPI event=163 descr="Number of clks pix alloc stalled due to db3 color buffer. Source is WWC0"
-  ></metric>
-  <metric
-    name="SPI_PC_ALLOC_ACCUM" block=SPI event=164 descr="Accumulation of PC space allocated during perf window. Divide by PC_ALLOC_CNT to get avg allocation duration of each PC line (VS alloc to PS dealloc). AKA pc_free_ptr-"
-  ></metric>
-  <metric
-    name="SPI_GS_NGG_SE_HAS_BATON" block=SPI event=165 descr="Number of clocks this SE owns the baton"
-  ></metric>
-  <metric
-    name="SPI_GS_NGG_SE_DOES_NOT_HAVE_BATON" block=SPI event=166 descr="Number of clocks this SE does not have the baton"
-  ></metric>
-  <metric
-    name="SPI_GS_NGG_SE_FORWARDED_BATON" block=SPI event=167 descr="This SE has forwarded the baton"
-  ></metric>
-  <metric
-    name="SPI_GS_NGG_SE_AT_SYNC_EVENT" block=SPI event=168 descr="Number of clocks this SE at sync event (enable_legacy, enable_ngg, reset_to_lowest_vgt or set_next_feid"
-  ></metric>
-  <metric
-    name="SPI_GS_NGG_SE_SG_ALLOC_PC_SPACE_CNT" block=SPI event=169 descr="Allocation of PC space per GS subgroup by this SE"
-  ></metric>
-  <metric
-    name="SPI_GS_NGG_SE_DEALLOC_PC_SPACE_CNT" block=SPI event=170 descr="De-Allocation of PC space as received from PS by this SE"
-  ></metric>
-  <metric
-    name="SPI_GS_NGG_PC_FULL" block=SPI event=171 descr="This SE reports parameter cache is full"
-  ></metric>
-  <metric
-    name="SPI_GS_NGG_SE_SEND_GS_ALLOC" block=SPI event=172 descr="GS granting PC allocations per surviving wave on this SE"
-  ></metric>
-  <metric
-    name="SPI_GS_NGG_GS_ALLOC_FIFO_EMPTY" block=SPI event=173 descr="GS allocation fifo is empty - no GS waves pending allocation on this SE"
-  ></metric>
-  <metric
-    name="SPI_GSC_VTX_BUSY" block=SPI event=174 descr="vtx controller busy"
-  ></metric>
-  <metric
-    name="SPI_GSC_VTX_INPUT_STARVED" block=SPI event=175 descr="There are no more prims to process and VSRs are empty"
-  ></metric>
-  <metric
-    name="SPI_GSC_VTX_VSR_STALL" block=SPI event=176 descr="vtx controller stalled"
-  ></metric>
-  <metric
-    name="SPI_GSC_VTX_VSR_FULL" block=SPI event=177 descr="all VSRs are full or being read by VGPR controller"
-  ></metric>
-  <metric
-    name="SPI_GSC_VTX_CAC_BUSY" block=SPI event=178 descr="vtx controller writing to VSRs"
-  ></metric>
-  <metric
-    name="SPI_ESC_VTX_BUSY" block=SPI event=179 descr="vtx controller busy"
-  ></metric>
-  <metric
-    name="SPI_ESC_VTX_INPUT_STARVED" block=SPI event=180 descr="There are no more verts to process and VSRs are empty"
-  ></metric>
-  <metric
-    name="SPI_ESC_VTX_VSR_STALL" block=SPI event=181 descr="vtx controller stalled"
-  ></metric>
-  <metric
-    name="SPI_ESC_VTX_VSR_FULL" block=SPI event=182 descr="all VSRs are full or being read by VGPR controller"
-  ></metric>
-  <metric
-    name="SPI_ESC_VTX_CAC_BUSY" block=SPI event=183 descr="vtx controller writing to VSRs"
-  ></metric>
-  <metric
-    name="SPI_SWC_PS_WR" block=SPI event=184 descr="Number of clocks to write PS waves to SGPRs (need to multiply this value by 4)"
-  ></metric>
-  <metric
-    name="SPI_SWC_VS_WR" block=SPI event=185 descr="Number of clocks to write VS waves to SGPRs (need to multiply this value by 4)"
-  ></metric>
-  <metric
-    name="SPI_SWC_GS_WR" block=SPI event=186 descr="Number of clocks to write GS waves to SGPRs (need to multiply this value by 4)"
-  ></metric>
-  <metric
-    name="SPI_SWC_HS_WR" block=SPI event=187 descr="Number of clocks to write HS waves to SGPRs (need to multiply this value by 4)"
-  ></metric>
-  <metric
-    name="SPI_SWC_CSG_WR" block=SPI event=188 descr="Number of clocks to write CSG waves to SGPRs (need to multiply this value by 4)"
-  ></metric>
-  <metric
-    name="SPI_SWC_CSC_WR" block=SPI event=189 descr="Number of clocks to write CSC waves to SGPRs (need to multiply this value by 4) Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_VWC_PS_WR" block=SPI event=190 descr="Number of clocks to write PS waves to VGPRs (need to multiply this value by 4)"
-  ></metric>
-  <metric
-    name="SPI_VWC_VS_WR" block=SPI event=191 descr="Number of clocks to write VS waves to VGPRs (need to multiply this value by 4)"
-  ></metric>
-  <metric
-    name="SPI_VWC_GS_WR" block=SPI event=192 descr="Number of clocks to write GS waves to VGPRs (need to multiply this value by 4)"
-  ></metric>
-  <metric
-    name="SPI_VWC_HS_WR" block=SPI event=193 descr="Number of clocks to write HS waves to VGPRs (need to multiply this value by 4)"
-  ></metric>
-  <metric
-    name="SPI_VWC_CSG_WR" block=SPI event=194 descr="Number of clocks to write CSG waves to VGPRs (need to multiply this value by 4)"
-  ></metric>
-  <metric
-    name="SPI_VWC_CSC_WR" block=SPI event=195 descr="Number of clocks to write CSC waves to VGPRs (need to multiply this value by 4) Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  # SQ counters
-  <metric
-    name="SQ_NONE" block=SQ event=0 descr="Don't count anything."
-  ></metric>
-  <metric
-    name="SQ_ACCUM_PREV" block=SQ event=1 descr="For counter N, increment by the value of counter N-1. Only accumulates once every 4 cycles."
-  ></metric>
-  <metric
-    name="SQ_CYCLES" block=SQ event=2 descr="Clock cycles. (nondeterministic, per-simd, global)"
-  ></metric>
-  <metric
-    name="SQ_BUSY_CYCLES" block=SQ event=3 descr="Clock cycles while SQ is reporting that it is busy. (nondeterministic, per-simd, global)"
-  ></metric>
-  <metric
-    name="SQ_WAVES" block=SQ event=4 descr="Count number of waves sent to SQs. (per-simd, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_LEVEL_WAVES" block=SQ event=5 descr="Track the number of waves. Set ACCUM_PREV for the next counter to use this. (level, per-simd, global)"
-  ></metric>
-  <metric
-    name="SQ_WAVES_EQ_64" block=SQ event=6 descr="Count number of waves with exactly 64 active threads sent to SQs. (per-simd, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_WAVES_LT_64" block=SQ event=7 descr="Count number of waves with <64 active threads sent to SQs. (per-simd, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_WAVES_LT_48" block=SQ event=8 descr="Count number of waves with <48 active threads sent to SQs. (per-simd, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_WAVES_LT_32" block=SQ event=9 descr="Count number of waves sent <32 active threads sent to SQs. (per-simd, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_WAVES_LT_16" block=SQ event=10 descr="Count number of waves sent <16 active threads sent to SQs. (per-simd, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_WAVES_CU" block=SQ event=11 descr="Count number of waves sent to CUs. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_LEVEL_WAVES_CU" block=SQ event=12 descr="Track the number of waves. Set ACCUM_PREV for the next counter to use this. (level, per-simd)"
-  ></metric>
-  <metric
-    name="SQ_BUSY_CU_CYCLES" block=SQ event=13 descr="Count quad-cycles each CU is busy. (nondeterministic, per-simd)"
-  ></metric>
-  <metric
-    name="SQ_ITEMS" block=SQ event=14 descr="Number of valid items per wave. (per-simd, global)"
-  ></metric>
-  <metric
-    name="SQ_QUADS" block=SQ event=15 descr="Number of completely or partially covered quads per wave. (per-simd, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_EVENTS" block=SQ event=16 descr="Number of events. (unwindowed, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_SURF_SYNCS" block=SQ event=17 descr="Number of surface syncs. (unwindowed, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_TTRACE_REQS" block=SQ event=18 descr="Number of thread trace requests. (unwindowed, global, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_TTRACE_INFLIGHT_REQS" block=SQ event=19 descr="Number of in-flight thread trace requests. (nondeterministic, unwindowed, global)"
-  ></metric>
-  <metric
-    name="SQ_TTRACE_STALL" block=SQ event=20 descr="Number of cycles thread trace stalls stalled execution. (nondeterministic, unwindowed, global)"
-  ></metric>
-  <metric
-    name="SQ_MSG_CNTR" block=SQ event=21 descr="Number of counter messages. (nondeterministic, unwindowed, global)"
-  ></metric>
-  <metric
-    name="SQ_MSG_PERF" block=SQ event=22 descr="Number of perfcounter messages. (nondeterministic, unwindowed), global"
-  ></metric>
-  <metric
-    name="SQ_MSG_GSCNT" block=SQ event=23 descr="Number of geometry messages. (emulated, unwindowed, global)"
-  ></metric>
-  <metric
-    name="SQ_MSG_INTERRUPT" block=SQ event=24 descr="Number of interrupt messages. (emulated, unwindowed, global)"
-  ></metric>
-  <metric
-    name="SQ_INSTS" block=SQ event=25 descr="Number of instructions issued. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VALU" block=SQ event=26 descr="Number of VALU instructions issued. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_MFMA" block=SQ event=27 descr="Number of MFMA instructions issued. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VMEM_WR" block=SQ event=28 descr="Number of VMEM write instructions issued (including FLAT). (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VMEM_RD" block=SQ event=29 descr="Number of VMEM read instructions issued (including FLAT). (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VMEM" block=SQ event=30 descr="Number of VMEM instructions issued. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_SALU" block=SQ event=31 descr="Number of SALU instructions issued. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_SMEM" block=SQ event=32 descr="Number of SMEM instructions issued. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_FLAT" block=SQ event=33 descr="Number of FLAT instructions issued. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_FLAT_LDS_ONLY" block=SQ event=34 descr="Number of FLAT instructions issued that read/wrote only from/to LDS (only works if EARLY_TA_DONE is enabled). (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_LDS" block=SQ event=35 descr="Number of LDS instructions issued (including FLAT). (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_GDS" block=SQ event=36 descr="Number of GDS instructions issued. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_EXP" block=SQ event=37 descr="Number of EXP instructions issued, excluding skipped export instructions. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_EXP_GDS" block=SQ event=38 descr="Number of EXP and GDS instructions issued, excluding skipped export instructions. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_BRANCH" block=SQ event=39 descr="Number of Branch instructions issued. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_SENDMSG" block=SQ event=40 descr="Number of Sendmsg instructions issued. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VSKIPPED" block=SQ event=41 descr="Number of vector instructions skipped. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INST_LEVEL_VMEM" block=SQ event=42 descr="Number of in-flight VMEM instructions. Set next counter to ACCUM_PREV and divide by INSTS_VMEM for average latency. Includes FLAT instructions. (per-simd, level, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_INST_LEVEL_SMEM" block=SQ event=43 descr="Number of in-flight SMEM instructions (*2 load/store; *2 atomic; *2 memtime; *4 wb/inv). Set next counter to ACCUM_PREV and divide by INSTS_SMEM for average latency per smem request. Falls slightly short of total request latency because some fetches are divided into two requests that may finish at different times and this counter collects the average latency of the two. (per-simd, level, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_INST_LEVEL_LDS" block=SQ event=44 descr="Number of in-flight LDS instructions. Set next counter to ACCUM_PREV and divide by INSTS_LDS for average latency. Includes FLAT instructions. (per-simd, level, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_INST_LEVEL_GDS" block=SQ event=45 descr="Number of in-flight GDS instructions. Set next counter to ACCUM_PREV and divide by INSTS_GDS for average latency. (per-simd, level, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_INST_LEVEL_EXP" block=SQ event=46 descr="Number of in-flight EXP instructions. Set next counter to ACCUM_PREV and divide by INSTS_EXP for average latency. (per-simd, level, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAVE_CYCLES" block=SQ event=47 descr="Number of wave-cycles spent by waves in the CUs (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAVE_READY" block=SQ event=48 descr="Number of wave-cycles waves were ready to execute the next instruction (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_CNT_VM" block=SQ event=49 descr="Number of wave-cycles spent waiting for VM counter. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_CNT_LGKM" block=SQ event=50 descr="Number of wave-cycles spent waiting for LGKM counter. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_CNT_EXP" block=SQ event=51 descr="Number of wave-cycles spent waiting for EXP counter. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_CNT_ANY" block=SQ event=52 descr="Number of wave-cycles spent waiting for any counter. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_BARRIER" block=SQ event=53 descr="Number of wave-cycles spent waiting for a barrier. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_EXP_ALLOC" block=SQ event=54 descr="Number of wave-cycles spent waiting for export allocation (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_SLEEP" block=SQ event=55 descr="Number of wave-cycles spent waiting for sleep to finish (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_SLEEP_XNACK" block=SQ event=56 descr="Number of wave-cycles spent waiting for xnack sleep to finish (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_OTHER" block=SQ event=57 descr="Number of wave-cycles spent waiting for dependency stalls (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_ANY" block=SQ event=58 descr="Number of wave-cycles spent waiting for anything (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_TTRACE" block=SQ event=59 descr="Number of wave-cycles spent waiting for thread trace stalls (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_IFETCH" block=SQ event=60 descr="Number of wave-cycles spent waiting for instructions to arrive (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_INST_ANY" block=SQ event=61 descr="Number of wave-cycles spent waiting for any instruction issue. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_INST_VMEM" block=SQ event=62 descr="Number of wave-cycles spent waiting for VMEM instruction issue. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_INST_SCA" block=SQ event=63 descr="Number of wave-cycles spent waiting for SALU or SMEM instruction issue. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_INST_LDS" block=SQ event=64 descr="Number of wave-cycles spent waiting for LDS instruction issue. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_INST_VALU" block=SQ event=65 descr="Number of wave-cycles spent waiting for VALU instrution issue. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_INST_EXP_GDS" block=SQ event=66 descr="Number of wave-cycles spent waiting for EXPORT or GDS instruction issue. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_INST_MISC" block=SQ event=67 descr="Number of wave-cycles spent waiting for BRANCH or SENDMSG instruction issue. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_INST_FLAT" block=SQ event=68 descr="Number of wave-cycles spent waiting for flat instruction issue. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_ACTIVE_INST_ANY" block=SQ event=69 descr="Number of cycles each wave is working on an instruction. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_ACTIVE_INST_VMEM" block=SQ event=70 descr="Number of cycles the SQ instruction arbiter is working on a VMEM instruction. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_ACTIVE_INST_LDS" block=SQ event=71 descr="Number of cycles the SQ instruction arbiter is working on a LDS instruction. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_ACTIVE_INST_VALU" block=SQ event=72 descr="Number of cycles the SQ instruction arbiter is working on a VALU instruction. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_ACTIVE_INST_SCA" block=SQ event=73 descr="Number of cycles the SQ instruction arbiter is working on a SALU or SMEM instruction. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_ACTIVE_INST_EXP_GDS" block=SQ event=74 descr="Number of cycles the SQ instruction arbiter is working on an EXPORT or GDS instruction. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_ACTIVE_INST_MISC" block=SQ event=75 descr="Number of cycles the SQ instruction aribter is working on a BRANCH or SENDMSG instruction. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_ACTIVE_INST_FLAT" block=SQ event=76 descr="Number of cycles the SQ instruction arbiter is working on a FLAT instruction. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INST_CYCLES_VMEM_WR" block=SQ event=77 descr="Number of cycles needed to send addr and cmd data for VMEM write instructions. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INST_CYCLES_VMEM_RD" block=SQ event=78 descr="Number of cycles needed to send addr and cmd data for VMEM read instructions. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INST_CYCLES_VMEM_ADDR" block=SQ event=79 descr="Number of cycles needed to send VMEM read/write addresses to TA. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INST_CYCLES_VMEM_DATA" block=SQ event=80 descr="Number of cycles needed to send VMEM write data to TA. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INST_CYCLES_VMEM_CMD" block=SQ event=81 descr="Number of cycles needed to send VMEM command to TA. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INST_CYCLES_EXP" block=SQ event=82 descr="Number of cycles needed to export data for EXP instructions. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INST_CYCLES_GDS" block=SQ event=83 descr="Number of cycles needed to export data for GDS instructions. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INST_CYCLES_SMEM" block=SQ event=84 descr="Number of cycles needed to execute scalar memory reads. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INST_CYCLES_SALU" block=SQ event=85 descr="Number of cycles needed to execute non-memory read scalar operations. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_THREAD_CYCLES_VALU" block=SQ event=86 descr="Number of thread-cycles used to execute VALU operations (similar to INST_CYCLES_VALU but multiplied by # of active threads). (per-simd)"
-  ></metric>
-  <metric
-    name="SQ_THREAD_CYCLES_VALU_MAX" block=SQ event=87 descr="Maximum number of thread-cycles VALU operations that could have been executed given the instruction mix (similar to INST_CYCLES_VALU but multiplied by # of active threads). (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_IFETCH" block=SQ event=88 descr="Number of instruction fetch requests from cache. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_IFETCH_LEVEL" block=SQ event=89 descr="Number of instruction fetch requests from cache. (per-simd, level)"
-  ></metric>
-  <metric
-    name="SQ_CBRANCH_FORK" block=SQ event=90 descr="Number of conditional branch instructions. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_CBRANCH_FORK_SPLIT" block=SQ event=91 descr="Number of conditional branch instructions that take both branches. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_VALU_LDS_DIRECT_RD" block=SQ event=92 descr="Number of LDS direct reads issued (excluding interpolation ops). (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_VALU_LDS_INTERP_OP" block=SQ event=93 descr="Number of LDS interpolation ops issued. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_LDS_BANK_CONFLICT" block=SQ event=94 descr="Number of cycles LDS is stalled by bank conflicts. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_LDS_ADDR_CONFLICT" block=SQ event=95 descr="Number of cycles LDS is stalled by address conflicts. (emulated,nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_LDS_UNALIGNED_STALL" block=SQ event=96 descr="Number of cycles LDS is stalled processing flat unaligned load/store ops. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_LDS_MEM_VIOLATIONS" block=SQ event=97 descr="Number of threads that have a memory violation in the LDS.(emulated)"
-  ></metric>
-  <metric
-    name="SQ_LDS_ATOMIC_RETURN" block=SQ event=98 descr="Number of atomic return cycles in LDS. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_LDS_IDX_ACTIVE" block=SQ event=99 descr="Number of cycles LDS is used for indexed (non-direct,non-interpolation) operations. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_VALU_DEP_STALL" block=SQ event=100 descr="Number of cycles VALU is stalled by previous instructions due to dependencies (wait state count). (nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_VALU_STARVE" block=SQ event=101 descr="Number of cycles VALU is starved while waves are present. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_TA_STARVE" block=SQ event=102 descr="Number of cycles SQ_TA_cmd interface is starved while waves are present. (nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_EXP_REQ_FIFO_FULL" block=SQ event=103 descr="Number of cycles export request fifo is full. (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_LDS_DATA_FIFO_FULL" block=SQ event=104 descr="Number of cycles LDS data fifo is full. (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_LDS_CMD_FIFO_FULL" block=SQ event=105 descr="Number of cycles LDS command fifo is full. (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_VMEM_TA_ADDR_FIFO_FULL" block=SQ event=106 descr="Number of cycles texture requests are stalled due to full address fifo in TA. (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_VMEM_TA_CMD_FIFO_FULL" block=SQ event=107 descr="Number of cycles texture requests are stalled due to full cmd fifo in TA. (nondeterministic, unwindowed)."
-  ></metric>
-  <metric
-    name="SQ_VMEM_EX_DATA_REG_BUSY" block=SQ event=108 descr="Number of cycles texture requests are stalled due to full data staging register in EX. (nondeterministic, unwindowed)."
-  ></metric>
-  <metric
-    name="SQ_VMEM_WR_TA_DATA_FIFO_FULL" block=SQ event=109 descr="Number of cycles texture writes are stalled due to full data fifo in TA. (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_VALU_SRC_C_CONFLICT" block=SQ event=110 descr="Number of cycles VALU is stalled by arbitration due to src c conflict. (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_VMEM_RD_SRC_CD_CONFLICT" block=SQ event=111 descr="Number of cycles VMEM_RD instructions are stalled due to VGPR port conflicts. (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_VMEM_WR_SRC_CD_CONFLICT" block=SQ event=112 descr="Number of cycles VMEM_WR instructions are stalled due to VGPR port conflicts. (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_FLAT_SRC_CD_CONFLICT" block=SQ event=113 descr="Number of cycles FLAT instructions are stalled due to VGPR port conflicts. (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_LDS_SRC_CD_CONFLICT" block=SQ event=114 descr="Number of cycles LDS instructions are stalled due to VGPR port conflicts. (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_SRC_CD_BUSY" block=SQ event=115 descr="Number of total accesses of port C and D (up to 2 per cycle). (per-simd)"
-  ></metric>
-  <metric
-    name="SQ_PT_POWER_STALL" block=SQ event=116 descr="Number of cycles the power throttle indicated ALU should stall (ignores whether something actually got stalled). (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_USER0" block=SQ event=117 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 0. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER1" block=SQ event=118 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 1. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER2" block=SQ event=119 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 2. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER3" block=SQ event=120 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 3. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER4" block=SQ event=121 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 4. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER5" block=SQ event=122 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 5. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER6" block=SQ event=123 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 6. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER7" block=SQ event=124 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 7. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER8" block=SQ event=125 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 8. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER9" block=SQ event=126 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 9. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER10" block=SQ event=127 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 10. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER11" block=SQ event=128 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 11. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER12" block=SQ event=129 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 12. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER13" block=SQ event=130 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 13. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER14" block=SQ event=131 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 14. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER15" block=SQ event=132 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 15. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL0" block=SQ event=133 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL when SIMM16[3:0] == 0. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL1" block=SQ event=134 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 1. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL2" block=SQ event=135 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 2. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL3" block=SQ event=136 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 3. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL4" block=SQ event=137 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 4. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL5" block=SQ event=138 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 5. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL6" block=SQ event=139 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 6. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL7" block=SQ event=140 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 7. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL8" block=SQ event=141 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 8. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL9" block=SQ event=142 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 9. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL10" block=SQ event=143 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 10. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL11" block=SQ event=144 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 11. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL12" block=SQ event=145 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 12. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL13" block=SQ event=146 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 13. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL14" block=SQ event=147 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 14. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL15" block=SQ event=148 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 15. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_POWER_VALU" block=SQ event=149 descr="Number of CAC pulses for ALU instructions (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_POWER_VALU0" block=SQ event=150 descr="Number of CAC pulses for ALU instructions in group 0 (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_POWER_VALU1" block=SQ event=151 descr="Number of CAC pulses for ALU instructions in group 1 (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_POWER_VALU2" block=SQ event=152 descr="Number of CAC pulses for ALU instructions in group 2 (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_POWER_GPR_RD" block=SQ event=153 descr="Number of CAC pulses for GPR reads (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_POWER_GPR_WR" block=SQ event=154 descr="Number of CAC pulses for GPR writes (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_POWER_LDS_BUSY" block=SQ event=155 descr="Number of CAC pulses for cycles LDS clocks are active (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_POWER_ALU_BUSY" block=SQ event=156 descr="Number of CAC pulses for cycles ALU clocks are active (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_POWER_TEX_BUSY" block=SQ event=157 descr="Number of CAC pulses for cycles texture clocks are active (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_ACCUM_PREV_HIRES" block=SQ event=158 descr="For counter N, increment by the value of counter N-1."
-  ></metric>
-  <metric
-    name="SQ_WAVES_RESTORED" block=SQ event=159 descr="Count number of context-restored waves sent to SQs. (per-simd, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_WAVES_SAVED" block=SQ event=160 descr="Count number of context-saved waves. (per-simd, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_SMEM_NORM" block=SQ event=161 descr="Number of SMEM instructions issued normalized to match smem_level (*2 load/store; *2 atomic; *2 memtime; *4 wb/inv). (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_XNACK_FIRST" block=SQ event=162 descr="Number of first xnack from TA. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_XNACK_ALL" block=SQ event=163 descr="Number of all xnack from TA. (per-simd)"
-  ></metric>
-  <metric
-    name="SQ_XNACK_FIFO_FULL" block=SQ event=164 descr="Number of cycles XNACK fifo is full. (per-simd, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_IFETCH_XNACK" block=SQ event=165 descr="Number of instruction fetch xnack from SQC. (per-simd)"
-  ></metric>
-  <metric
-    name="SQ_TLB_SHOOTDOWN" block=SQ event=166 descr="Number of TLB shootdowns. (unwindowed, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_TLB_SHOOTDOWN_CYCLES" block=SQ event=167 descr="Number of cycles in which a TLB shootdown is active. (unwindowed, global)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VMEM_WR_REPLAY" block=SQ event=168 descr="Number of VMEM write instructions replayed (including FLAT). (excluding instructions issued). (per-simd, emulated, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VMEM_RD_REPLAY" block=SQ event=169 descr="Number of VMEM read instructions replayed (including FLAT). (excluding instructions issued). (per-simd, emulated, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VMEM_REPLAY" block=SQ event=170 descr="Number of VMEM instructions replayed. (excluding instructions issued). (per-simd, emulated, nondeterministicd)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_SMEM_REPLAY" block=SQ event=171 descr="Number of SMEM instructions replayed. (excluding instructions issued). (per-simd, emulated, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_SMEM_NORM_REPLAY" block=SQ event=172 descr="Number of SMEM instructions replayed normalized to match smem_level (*2 load/store; *2 atomic; *2 memtime; *4 wb/inv). (excluding instructions issued). (per-simd, emulated, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_FLAT_REPLAY" block=SQ event=173 descr="Number of FLAT instructions replayed. (excluding instructions issued). (per-simd, emulated, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_UTCL1_TRANSLATION_MISS" block=SQ event=174 descr="Total UTCL1 translation misses"
-  ></metric>
-  <metric
-    name="SQ_UTCL1_PERMISSION_MISS" block=SQ event=175 descr="Total UTCL1 permission misses"
-  ></metric>
-  <metric
-    name="SQ_UTCL1_TRANSLATION_HIT_EVENT" block=SQ event=176 descr="Total UTCL1 translation hit events"
-  ></metric>
-  <metric
-    name="SQ_UTCL1_REQUEST" block=SQ event=177 descr="Total UTCL1 NORMAL requests"
-  ></metric>
-  <metric
-    name="SQ_UTCL1_STALL_MISSFIFO_FULL" block=SQ event=178 descr="Total UTCL1 stall due to full miss fifo"
-  ></metric>
-  <metric
-    name="SQ_UTCL1_STALL_INFLIGHT_MAX" block=SQ event=179 descr="Total UTCL1 stalls due to inflight counter saturation"
-  ></metric>
-  <metric
-    name="SQ_UTCL1_STALL_LRU_INFLIGHT" block=SQ event=180 descr="Total UTCL1 stalls due to LRU cache line with traffic inflight"
-  ></metric>
-  <metric
-    name="SQ_UTCL1_LFIFO_FULL" block=SQ event=181 descr="Total UTCL1 latency hiding fifo full cycles"
-  ></metric>
-  <metric
-    name="SQ_UTCL1_STALL_LFIFO_NOT_RES" block=SQ event=182 descr="Total UTCL1 stalls due to latency latency hiding fifo output not resident"
-  ></metric>
-  <metric
-    name="SQ_UTCL1_STALL_UTCL2_REQ_OUT_OF_CREDITS" block=SQ event=183 descr="Total UTCL1 stalls due to UTCL2 requests out of credits"
-  ></metric>
-  <metric
-    name="SQ_DUMMY_END" block=SQ event=184 descr="Just a placeholding enum to indicate the end of real SQ performance counter. Not a real performance counter."
-  ></metric>
-  <metric
-    name="SQ_DUMMY_LAST" block=SQ event=255 descr="Just a placeholding enum to separate SQ from SQC counters. Not a real performance counter."
-  ></metric>
-  <metric
-    name="SQC_ICACHE_INPUT_VALID_READY" block=SQ event=256 descr="Successful Transaction (per-SQ, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_INPUT_VALID_READYB" block=SQ event=257 descr="Input stalled by SQC (per-SQ, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_INPUT_VALIDB" block=SQ event=258 descr="SQC starved (per-SQ, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_INPUT_VALID_READY" block=SQ event=259 descr="Successful Transaction (per-SQ, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_INPUT_VALID_READYB" block=SQ event=260 descr="Input stalled by SQC (per-SQ, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_INPUT_VALIDB" block=SQ event=261 descr="SQC starved (per-SQ, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_TC_REQ" block=SQ event=262 descr="Total number of TC requests that were issued by instruction and constant caches. (No-Masking, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_TC_INST_REQ" block=SQ event=263 descr="Number of insruction requests to the TC (No-Masking, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_TC_DATA_READ_REQ" block=SQ event=264 descr="Number of data read requests to the TC (No-Masking, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_TC_DATA_WRITE_REQ" block=SQ event=265 descr="Number of data write requests to the TC (No-Masking, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_TC_DATA_ATOMIC_REQ" block=SQ event=266 descr="Number of data atomic requests to the TC (No-Masking, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_TC_STALL" block=SQ event=267 descr="Valid request stalled TC request interface (no-credits). (No-Masking, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_TC_STARVE" block=SQ event=268 descr="No requests sent to TC while credits available. (No-Masking, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_BUSY_CYCLES" block=SQ event=269 descr="Clock cycles while cache is reporting that it is busy. (No-Masking, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_REQ" block=SQ event=270 descr="Number of requests. (per-SQ, per-Bank)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_HITS" block=SQ event=271 descr="Number of cache hits. (per-SQ, per-Bank, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_MISSES" block=SQ event=272 descr="Number of cache misses, includes uncached requests. (per-SQ, per-Bank, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_MISSES_DUPLICATE" block=SQ event=273 descr="Number of misses that were duplicates (access to a non-resident, miss pending CL). (per-SQ, per-Bank, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_INVAL_INST" block=SQ event=274 descr="Number of cache invalidations caused by instructions (No-Masking)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_INVAL_ASYNC" block=SQ event=275 descr="Number of asynchronous invalidates (surface sync, register write, etc.) (No-Masking, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_INPUT_STALL_ARB_NO_GRANT" block=SQ event=276 descr="Number of arbitration stalls due to lost arbitration to other SQs. (per-SQ, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_INPUT_STALL_BANK_READYB" block=SQ event=277 descr="Number of arbitration stalls due to bank stalling. (per-SQ, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_CACHE_STALLED" block=SQ event=278 descr="Number of cache stalls. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_CACHE_STALL_INFLIGHT_NONZERO" block=SQ event=279 descr="Number of cycles stalled because allocated line has nonzero inflight. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_CACHE_STALL_INFLIGHT_MAX" block=SQ event=280 descr="Number of cycles stalled on a hit CL but inflight counter is maxed out. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_CACHE_STALL_OUTPUT" block=SQ event=281 descr="Number of cycles stalled at cache controller output. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_CACHE_STALL_OUTPUT_MISS_FIFO" block=SQ event=282 descr="Number of cycles stalled because the miss FIFO is full. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_CACHE_STALL_OUTPUT_HIT_FIFO" block=SQ event=283 descr="Number of cycles stalled because a hit FIFO is full. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_CACHE_STALL_OUTPUT_TC_IF" block=SQ event=284 descr="Number of cycles stalled because the TC request interface is stalled. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_STALL_OUTXBAR_ARB_NO_GRANT" block=SQ event=285 descr="Number of arbitration stalls due to lost arbitration for the output port. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_PREFETCH_1" block=SQ event=286 descr="Number of +1 prefetch requests granted. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_PREFETCH_2" block=SQ event=287 descr="Number of +2 prefetch requests granted. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_PREFETCH_FILTERED" block=SQ event=288 descr="Number of prefetch requests filtered out. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_BUSY_CYCLES" block=SQ event=289 descr="Clock cycles while cache is reporting that it is busy. (No-Masking, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ" block=SQ event=290 descr="Number of requests (post-bank-serialization). (per-SQ, per-Bank)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_HITS" block=SQ event=291 descr="Number of cache hits. (per-SQ, per-Bank, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_MISSES" block=SQ event=292 descr="Number of cache misses, includes uncached requests. (per-SQ, per-Bank, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_MISSES_DUPLICATE" block=SQ event=293 descr="Number of misses that were duplicates (access to a non-resident, miss pending CL). (per-SQ, per-Bank, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_HIT_LRU_READ" block=SQ event=294 descr="Number of HIT_LRU read requests. (per-SQ, per-Bank)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_MISS_EVICT_READ" block=SQ event=295 descr="Number of MISS_EVICT read requests. (per-SQ, per-Bank)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_WC_LRU_WRITE" block=SQ event=296 descr="Number of WC_LRU write requests. (per-SQ, per-Bank)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_WT_EVICT_WRITE" block=SQ event=297 descr="Number of WT_EVICT write requests. (per-SQ, per-Bank)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_ATOMIC" block=SQ event=298 descr="Number of atomic requests. (per-SQ, per-Bank)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_VOLATILE" block=SQ event=299 descr="Number of volatile cache requests. (per-SQ, per-Bank)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_INVAL_INST" block=SQ event=300 descr="Number of cache invalidations caused by instructions (No-Masking)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_INVAL_ASYNC" block=SQ event=301 descr="Number of asynchronous invalidates (surface sync, register write, etc.) (No-Masking, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_INVAL_VOLATILE_INST" block=SQ event=302 descr="Number of volatile cache invalidations caused by instructions (No-Masking)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_INVAL_VOLATILE_ASYNC" block=SQ event=303 descr="Number of asynchronous volatile invalidates (surface sync, register write, etc.) (No-Masking, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_WB_INST" block=SQ event=304 descr="Number of cache write-backs caused by instructions (No-Masking)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_WB_ASYNC" block=SQ event=305 descr="Number of asynchronous cache write-backs (surface sync, register write, etc.) (No-Masking, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_WB_VOLATILE_INST" block=SQ event=306 descr="Number of volatile cache write-backs caused by instructions (No-Masking)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_WB_VOLATILE_ASYNC" block=SQ event=307 descr="Number of asynchronous volatile cache write-backs (surface sync, register write, etc.) (No-Masking, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_INPUT_STALL_ARB_NO_GRANT" block=SQ event=308 descr="Number of arbitration stalls due to lost arbitration to other SQs. (per-SQ, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_INPUT_STALL_BANK_READYB" block=SQ event=309 descr="Number of arbitration stalls due to bank stalling. (per-SQ, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALLED" block=SQ event=310 descr="Number of cache stalls. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_INFLIGHT_MAX" block=SQ event=311 descr="Number of cycles stalled on a hit CL but inflight counter is maxed out. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_OUTPUT" block=SQ event=312 descr="Number of cycles stalled at cache controller output. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_EVICT" block=SQ event=313 descr="Number of cycles stalled trying to do an evict. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_UNORDERED" block=SQ event=314 descr="Number of cycles stalled due to an unordered access conflict. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_ALLOC_UNAVAILABLE" block=SQ event=315 descr="Number of cycles stalled due to not being able to allocate a line. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_FORCE_EVICT" block=SQ event=316 descr="Number of cycles stalled due to having to force an eviction. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_MULTI_FLUSH" block=SQ event=317 descr="Number of cycles stalled due to multiple flushes. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_FLUSH_DONE" block=SQ event=318 descr="Number of cycles stalled inserting flush done tokens into pipe. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_OUTPUT_MISS_FIFO" block=SQ event=319 descr="Number of cycles stalled because the miss FIFO is full. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_OUTPUT_HIT_FIFO" block=SQ event=320 descr="Number of cycles stalled because a hit FIFO is full. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_OUTPUT_TC_IF" block=SQ event=321 descr="Number of cycles stalled because the TC request interface is stalled. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_STALL_OUTXBAR_ARB_NO_GRANT" block=SQ event=322 descr="Number of arbitration stalls due to lost arbitration for the output port. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ_READ_1" block=SQ event=323 descr="Number of constant cache 1 dw read requests. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ_READ_2" block=SQ event=324 descr="Number of constant cache 2 dw read requests. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ_READ_4" block=SQ event=325 descr="Number of constant cache 4 dw read requests. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ_READ_8" block=SQ event=326 descr="Number of constant cache 8 dw read requests. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ_READ_16" block=SQ event=327 descr="Number of constant cache 16 dw read requests. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ_TIME" block=SQ event=328 descr="Number of constant cache timestamp requests. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ_WRITE_1" block=SQ event=329 descr="Number of constant cache 1 dw write requests. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ_WRITE_2" block=SQ event=330 descr="Number of constant cache 2 dw write requests. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ_WRITE_4" block=SQ event=331 descr="Number of constant cache 4 dw write requests. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ_ATC_PROBE" block=SQ event=332 descr="Number of constant cache atc probe requests. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_SQ_DCACHE_REQS" block=SQ event=333 descr="Number of constant requests from SQ before any serialization (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_FLAT_REQ" block=SQ event=334 descr="Number of constant flat requests (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_NONFLAT_REQ" block=SQ event=335 descr="Number of constant non-flat requests (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_INFLIGHT_LEVEL" block=SQ event=336 descr="Level Counter: # total outstanding transactions in instruction cache (per-SQ, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_INFLIGHT_LEVEL" block=SQ event=337 descr="Level Counter: # total outstanding transactions in data cache (per-SQ, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_TC_INFLIGHT_LEVEL" block=SQ event=338 descr="Level Counter: total outstanding requests to TC (No-Masking, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_TC_INFLIGHT_LEVEL" block=SQ event=339 descr="Level Counter: # of outstanding instruction requests to TC (No-Masking, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_TC_INFLIGHT_LEVEL" block=SQ event=340 descr="Level Counter: # of outstanding data requests to TC (No-Masking, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_TRANSLATION_MISS" block=SQ event=341 descr="Total ICACHE gatcl1 translation misses"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_PERMISSION_MISS" block=SQ event=342 descr="Total ICACHE gatcl1 permission misses"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_TRANSLATION_HIT" block=SQ event=343 descr="Total ICACHE gatcl1 translation hits"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_REQUEST" block=SQ event=344 descr="Total ICACHE CLIENT_ATCL1 NORMAL requestes"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_STALL_INFLIGHT_MAX" block=SQ event=345 descr="Total ICACHE gatcl1 stalls due to inflight counter saturation"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_STALL_LRU_INFLIGHT" block=SQ event=346 descr="Total ICACHE gatcl1 stalls due to LRU cache line with traffic inflight"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_LFIFO_FULL" block=SQ event=347 descr="Total ICACHE gatcl1 atcl2 latency hiding fifo full cycles"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_STALL_LFIFO_NOT_RES" block=SQ event=348 descr="Total ICACHE gatcl1 stalls due to atcl2 latency hiding fifo output not resident"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_STALL_ATCL2_REQ_OUT_OF_CREDITS" block=SQ event=349 descr="Total ICACHE gatcl1 stalls due to atcl2_req out of credits"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_ATCL2_INFLIGHT" block=SQ event=350 descr="The sum of ICACHE inflight ATCL1_ATCL2 requests per cycle"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_STALL_MISSFIFO_FULL" block=SQ event=351 descr="Total ICACHE gatcl1 stalls due to full miss fifo"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_TRANSLATION_MISS" block=SQ event=352 descr="Total DCACHE gatcl1 translation misses"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_PERMISSION_MISS" block=SQ event=353 descr="Total DCACHE gatcl1 permission misses"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_TRANSLATION_HIT" block=SQ event=354 descr="Total DCACHE gatcl1 translation hits"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_REQUEST" block=SQ event=355 descr="Total DCACHE CLIENT_ATCL1 NORMAL requestes"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_STALL_INFLIGHT_MAX" block=SQ event=356 descr="Total DCACHE gatcl1 stalls due to inflight counter saturation"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_STALL_LRU_INFLIGHT" block=SQ event=357 descr="Total DCACHE gatcl1 stalls due to LRU cache line with traffic inflight"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_LFIFO_FULL" block=SQ event=358 descr="Total DCACHE gatcl1 atcl2 latency hiding fifo full cycles"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_STALL_LFIFO_NOT_RES" block=SQ event=359 descr="Total DCACHE gatcl1 stalls due to atcl2 latency hiding fifo output not resident"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_STALL_ATCL2_REQ_OUT_OF_CREDITS" block=SQ event=360 descr="Total DCACHE gatcl1 stalls due to atcl2_req out of credits"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_ATCL2_INFLIGHT" block=SQ event=361 descr="The sum of DCACHE inflight ATCL1_ATCL2 requests per cycle"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_STALL_MISSFIFO_FULL" block=SQ event=362 descr="Total DCACHE gatcl1 stalls due to full miss fifo"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_STALL_MULTI_MISS" block=SQ event=363 descr="Total DCACHE gatcl1 stalls due to arbitrated multiple misses"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_HIT_FIFO_FULL" block=SQ event=364 descr="Total DCACHE gatcl1 hit fifo full cycles"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_UTCL1_INFLIGHT_LEVEL" block=SQ event=365 descr="Level Counter: # total transactions that are outstanding in UTCL1 of instruction cache (nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_UTCL1_ALL_REQ" block=SQ event=366 descr="Total number of requests (all types) going to UTCL1 of instruction cache"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_UTCL2_INFLIGHT_LEVEL" block=SQ event=367 descr="Level Counter: # total transactions that are outstanding in UTCL2 and originating from instruction cache (nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_UTCL2_ALL_REQ" block=SQ event=368 descr="Total number of requests (all types) going to UTCL2 and originating from instruction cache"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_UTCL1_INFLIGHT_LEVEL" block=SQ event=369 descr="Level Counter: # total transactions that are outstanding in UTCL1 of data cache (per-SQ, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_UTCL1_ALL_REQ" block=SQ event=370 descr="Total number of requests (all types) going to UTCL1 of data cache"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_UTCL2_INFLIGHT_LEVEL" block=SQ event=371 descr="Level Counter: # total transactions that are outstanding in UTCL2 and originating from data cache (per-SQ, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_UTCL2_ALL_REQ" block=SQ event=372 descr="Total number of requests (all types) going to UTCL2 and originating from data cache"
-  ></metric>
-  <metric
-    name="SQC_DUMMY_LAST" block=SQ event=373 descr="Just a placeholding enum to indicate the last SQC performance counter. Not a real performance counter."
-  ></metric>
-  # SX counters
-  <metric
-    name="SX_PA_IDLE_CYCLES" block=SX event=0 descr="Nr of cycles where PA was idle waiting to accept vectors from SX"
-  ></metric>
-  <metric
-    name="SX_PA_REQ" block=SX event=1 descr="Nr of PA requests received"
-  ></metric>
-  <metric
-    name="SX_PA_POS" block=SX event=2 descr="Nr of positions sent to the PA"
-  ></metric>
-  <metric
-    name="SX_CLOCK" block=SX event=3 descr="Nr of clocks where SX was busy in any way shape or form"
-  ></metric>
-  <metric
-    name="SX_GATE_EN1" block=SX event=4 descr="Nr of clocks for register accesses"
-  ></metric>
-  <metric
-    name="SX_GATE_EN2" block=SX event=5 descr="Nr of clocks for bus destination sort module"
-  ></metric>
-  <metric
-    name="SX_GATE_EN3" block=SX event=6 descr="Nr of clocks for color exports"
-  ></metric>
-  <metric
-    name="SX_GATE_EN4" block=SX event=7 descr="Nr of clocks for position exports"
-  ></metric>
-  <metric
-    name="SX_SH_POS_STARVE" block=SX event=8 descr="Nr of clocks SX is starved for Position data"
-  ></metric>
-  <metric
-    name="SX_SH_COLOR_STARVE" block=SX event=9 descr="Nr of clocks SX is starved for Color data"
-  ></metric>
-  <metric
-    name="SX_SH_POS_STALL" block=SX event=10 descr="Nr of clocks SX is being stalled by PA"
-  ></metric>
-  <metric
-    name="SX_SH_COLOR_STALL" block=SX event=11 descr="Nr of clocks SX is being stalled by at least one DB"
-  ></metric>
-  <metric
-    name="SX_DB0_PIXELS" block=SX event=12 descr="Number of pixels sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_HALF_QUADS" block=SX event=13 descr="Number of half quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_PIXEL_STALL" block=SX event=14 descr="Number of cycles where pixel traffic is stalled due to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_PIXEL_IDLE" block=SX event=15 descr="Number of cycles where the pixel traffic was idle to DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_PRED_PIXELS" block=SX event=16 descr="Nr of non predicated pixels sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB1_PIXELS" block=SX event=17 descr="Number of pixels sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_HALF_QUADS" block=SX event=18 descr="Number of half quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_PIXEL_STALL" block=SX event=19 descr="Number of cycles where pixel traffic is stalled due to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_PIXEL_IDLE" block=SX event=20 descr="Number of cycles where the pixel traffic was idle to DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_PRED_PIXELS" block=SX event=21 descr="Nr of non predicated pixels sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB2_PIXELS" block=SX event=22 descr="Number of pixels sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_HALF_QUADS" block=SX event=23 descr="Number of half quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_PIXEL_STALL" block=SX event=24 descr="Number of cycles where pixel traffic is stalled due to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_PIXEL_IDLE" block=SX event=25 descr="Number of cycles where the pixel traffic was idle to DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_PRED_PIXELS" block=SX event=26 descr="Nr of non predicated pixels sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB3_PIXELS" block=SX event=27 descr="Number of pixels sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_HALF_QUADS" block=SX event=28 descr="Number of half quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_PIXEL_STALL" block=SX event=29 descr="Number of cycles where pixel traffic is stalled due to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_PIXEL_IDLE" block=SX event=30 descr="Number of cycles where the pixel traffic was idle to DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_PRED_PIXELS" block=SX event=31 descr="Nr of non predicated pixels sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_COL_BUSY" block=SX event=32 descr="Number of cycles of color module's busy"
-  ></metric>
-  <metric
-    name="SX_POS_BUSY" block=SX event=33 descr="Number of cycles of position module's busy"
-  ></metric>
-  <metric
-    name="SX_DB0_A2M_DISCARD_QUADS" block=SX event=34 descr="Number of a2m_discard quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT0_BLEND_BYPASS" block=SX event=35 descr="Number of mrt0 blend_bypass quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT0_DONT_RD_DEST" block=SX event=36 descr="Number of mrt0 dont_rd_dest quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT0_DISCARD_SRC" block=SX event=37 descr="Number of mrt0 discard_src quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT0_SINGLE_QUADS" block=SX event=38 descr="Number of mrt0 single quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT0_DOUBLE_QUADS" block=SX event=39 descr="Number of mrt0 double quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT1_BLEND_BYPASS" block=SX event=40 descr="Number of mrt1 blend_bypass quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT1_DONT_RD_DEST" block=SX event=41 descr="Number of mrt1 dont_rd_dest quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT1_DISCARD_SRC" block=SX event=42 descr="Number of mrt1 discard_src quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT1_SINGLE_QUADS" block=SX event=43 descr="Number of mrt1 single quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT1_DOUBLE_QUADS" block=SX event=44 descr="Number of mrt1 double quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT2_BLEND_BYPASS" block=SX event=45 descr="Number of mrt2 blend_bypass quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT2_DONT_RD_DEST" block=SX event=46 descr="Number of mrt2 dont_rd_dest quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT2_DISCARD_SRC" block=SX event=47 descr="Number of mrt2 discard_src quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT2_SINGLE_QUADS" block=SX event=48 descr="Number of mrt2 single quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT2_DOUBLE_QUADS" block=SX event=49 descr="Number of mrt2 double quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT3_BLEND_BYPASS" block=SX event=50 descr="Number of mrt3 blend_bypass quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT3_DONT_RD_DEST" block=SX event=51 descr="Number of mrt3 dont_rd_dest quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT3_DISCARD_SRC" block=SX event=52 descr="Number of mrt3 discard_src quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT3_SINGLE_QUADS" block=SX event=53 descr="Number of mrt3 single quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT3_DOUBLE_QUADS" block=SX event=54 descr="Number of mrt3 double quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT4_BLEND_BYPASS" block=SX event=55 descr="Number of mrt4 blend_bypass quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT4_DONT_RD_DEST" block=SX event=56 descr="Number of mrt4 dont_rd_dest quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT4_DISCARD_SRC" block=SX event=57 descr="Number of mrt4 discard_src quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT4_SINGLE_QUADS" block=SX event=58 descr="Number of mrt4 single quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT4_DOUBLE_QUADS" block=SX event=59 descr="Number of mrt4 double quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT5_BLEND_BYPASS" block=SX event=60 descr="Number of mrt5 blend_bypass quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT5_DONT_RD_DEST" block=SX event=61 descr="Number of mrt5 dont_rd_dest quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT5_DISCARD_SRC" block=SX event=62 descr="Number of mrt5 discard_src quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT5_SINGLE_QUADS" block=SX event=63 descr="Number of mr5 single quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT5_DOUBLE_QUADS" block=SX event=64 descr="Number of mrt5 double quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT6_BLEND_BYPASS" block=SX event=65 descr="Number of mrt6 blend_bypass quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT6_DONT_RD_DEST" block=SX event=66 descr="Number of mrt6 dont_rd_dest quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT6_DISCARD_SRC" block=SX event=67 descr="Number of mrt6 discard_src quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT6_SINGLE_QUADS" block=SX event=68 descr="Number of mrt6 single quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT6_DOUBLE_QUADS" block=SX event=69 descr="Number of mrt6 double quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT7_BLEND_BYPASS" block=SX event=70 descr="Number of mrt7 blend_bypass quads sent to the DB0"
-  ></metric>
-  <metric
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-    name="SX_DB1_SIZE" block=SX event=205 descr="Number of dw (current smallest unit) send to DB1"
-  ></metric>
-  <metric
-    name="SX_DB2_SIZE" block=SX event=206 descr="Number of dw (current smallest unit) send to DB2"
-  ></metric>
-  <metric
-    name="SX_DB3_SIZE" block=SX event=207 descr="Number of dw (current smallest unit) send to DB3"
-  ></metric>
-  # TA counters
-  <metric
-    name="TA_NULL" block=TA event=0 descr="NULL"
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_BUSY" block=TA event=1 descr="sh_fifo subblock is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_CMD_BUSY" block=TA event=2 descr="sh_fifo subblock, cmd fifo section is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_ADDR_BUSY" block=TA event=3 descr="sh_fifo subblock, addr fifo section is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_DATA_BUSY" block=TA event=4 descr="sh_fifo subblock, data fifo section is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_DATA_SFIFO_BUSY" block=TA event=5 descr="sh_fifo subblock, data sfifo section is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_DATA_TFIFO_BUSY" block=TA event=6 descr="sh_fifo subblock, data tfifo section is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_GRADIENT_BUSY" block=TA event=7 descr="Deriv/Dispatch/Input subblocks are busy busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_GRADIENT_FIFO_BUSY" block=TA event=8 descr="Gradient FIFO subblock is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_LOD_BUSY" block=TA event=9 descr="Aniso subblock is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_LOD_FIFO_BUSY" block=TA event=10 descr="LOD FIFO subblock is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_ADDRESSER_BUSY" block=TA event=11 descr="Addresser subblock is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_ADDRESSER_FIFO_BUSY" block=TA event=12 descr="Addresser FIFO subblock is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_ALIGNER_BUSY" block=TA event=13 descr="Aligner subblock is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_WRITE_PATH_BUSY" block=TA event=14 descr="Write Path subblock is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_TA_BUSY" block=TA event=15 descr="TA block is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SQ_TA_CMD_CYCLES" block=TA event=16 descr="Number of input cycles input on SQ_TA_cmd interface. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SP_TA_ADDR_CYCLES" block=TA event=17 descr="Number of input cycles input on SP_TA_addr interface. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SP_TA_DATA_CYCLES" block=TA event=18 descr="Number of input cycles input on SP_TA_data interface. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_TA_FA_DATA_STATE_CYCLES" block=TA event=19 descr="Number of input cycles input on TA_FA wrts interface. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_ADDR_WAITING_ON_CMD_CYCLES" block=TA event=20 descr="Number of cycles addr waiting on cmd in sh_fifo subblock. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_CMD_WAITING_ON_ADDR_CYCLES" block=TA event=21 descr="Number of cycles cmd waiting on addr in sh_fifo subblock. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_ADDR_STARVED_WHILE_BUSY_CYCLES" block=TA event=22 descr="Number of cycles addr starved while busy in sh_fifo subblock. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_CMD_STARVED_WHILE_BUSY_CYCLES" block=TA event=23 descr="Number of cycles cmd starved while busy in sh_fifo subblock. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_DATA_WAITING_ON_DATA_STATE_CYCLES" block=TA event=24 descr="Number of cycles data waiting on data state in sh_fifo subblock. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_DATA_STATE_WAITING_ON_DATA_CYCLES" block=TA event=25 descr="Number of cycles data state waiting on data in sh_fifo subblock. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_DATA_STARVED_WHILE_BUSY_CYCLES" block=TA event=26 descr="Number of cycles data starved while busy in sh_fifo subblock. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_DATA_STATE_STARVED_WHILE_BUSY_CYCLES" block=TA event=27 descr="Number of cycles data state starved while busy in sh_fifo subblock. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_TA_SH_FIFO_STARVED" block=TA event=28 descr="Starved signal for all sub-fifos in TA_SH_FIFO"
-  ></metric>
-  <metric
-    name="TA_RESERVED_29" block=TA event=29 descr="RESERVED 29."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_ADDR_CYCLES" block=TA event=30 descr="Number of address cycles issued by sh_fifo to sh_dispatch subblock."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_DATA_CYCLES" block=TA event=31 descr="Number of data cycles issued by sh_fifo to sh_dispatch subblock."
-  ></metric>
-  <metric
-    name="TA_TOTAL_WAVEFRONTS" block=TA event=32 descr="Total number of wavefronts processed by TA."
-  ></metric>
-  <metric
-    name="TA_GRADIENT_CYCLES" block=TA event=33 descr="Number of cycles issued by the per-pixel-gradient state machine."
-  ></metric>
-  <metric
-    name="TA_WALKER_CYCLES" block=TA event=34 descr="Number of cycles issued by the sampler state machine."
-  ></metric>
-  <metric
-    name="TA_ALIGNER_CYCLES" block=TA event=35 descr="Number of cycles issued by the aligner state machine."
-  ></metric>
-  <metric
-    name="TA_IMAGE_WAVEFRONTS" block=TA event=36 descr="Number of image wavefronts processed by TA."
-  ></metric>
-  <metric
-    name="TA_IMAGE_READ_WAVEFRONTS" block=TA event=37 descr="Number of image read (Sample*, Load*, Gather4*) wavefronts processed by TA."
-  ></metric>
-  <metric
-    name="TA_IMAGE_WRITE_WAVEFRONTS" block=TA event=38 descr="Number of image write wavefronts processed by TA."
-  ></metric>
-  <metric
-    name="TA_IMAGE_ATOMIC_WAVEFRONTS" block=TA event=39 descr="Number of image atomic wavefronts processed by TA."
-  ></metric>
-  <metric
-    name="TA_IMAGE_TOTAL_CYCLES" block=TA event=40 descr="Number of image cycles issued to TC."
-  ></metric>
-  <metric
-    name="TA_RESERVED_41" block=TA event=41 descr="RESERVED 41."
-  ></metric>
-  <metric
-    name="TA_RESERVED_42" block=TA event=42 descr="RESERVED 42."
-  ></metric>
-  <metric
-    name="TA_RESERVED_43" block=TA event=43 descr="RESERVED 43."
-  ></metric>
-  <metric
-    name="TA_BUFFER_WAVEFRONTS" block=TA event=44 descr="Number of buffer wavefronts processed by TA."
-  ></metric>
-  <metric
-    name="TA_BUFFER_READ_WAVEFRONTS" block=TA event=45 descr="Number of buffer read wavefronts processed by TA."
-  ></metric>
-  <metric
-    name="TA_BUFFER_WRITE_WAVEFRONTS" block=TA event=46 descr="Number of buffer write wavefronts processed by TA."
-  ></metric>
-  <metric
-    name="TA_BUFFER_ATOMIC_WAVEFRONTS" block=TA event=47 descr="Number of buffer atomic wavefronts processed by TA."
-  ></metric>
-  <metric
-    name="TA_BUFFER_COALESCABLE_WAVEFRONTS" block=TA event=48 descr="Number of buffer coalesceable wavefronts processed by TA."
-  ></metric>
-  <metric
-    name="TA_BUFFER_TOTAL_CYCLES" block=TA event=49 descr="Number of buffer cycles issued to TC."
-  ></metric>
-  <metric
-    name="TA_BUFFER_COALESCABLE_ADDR_MULTICYCLED_CYCLES" block=TA event=50 descr="Number of buffer coalesceable cycles issued to TC that were not coalesced due to addresser."
-  ></metric>
-  <metric
-    name="TA_BUFFER_COALESCABLE_CLAMP_16KDWORD_MULTICYCLED_CYCLES" block=TA event=51 descr="Number of buffer coalesceable cycles issued to TC that were not coalesced due to clamping or 64KB bounds check."
-  ></metric>
-  <metric
-    name="TA_BUFFER_COALESCED_READ_CYCLES" block=TA event=52 descr="Number of buffer coalesced read cycles issued to TC."
-  ></metric>
-  <metric
-    name="TA_BUFFER_COALESCED_WRITE_CYCLES" block=TA event=53 descr="Number of buffer coalesced write cycles issued to TC."
-  ></metric>
-  <metric
-    name="TA_ADDR_STALLED_BY_TC_CYCLES" block=TA event=54 descr="Number of cycles addr path stalled by TC. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_ADDR_STALLED_BY_TD_CYCLES" block=TA event=55 descr="Number of cycles addr path stalled by TD. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_DATA_STALLED_BY_TC_CYCLES" block=TA event=56 descr="Number of cycles data path stalled by TC. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_ADDRESSER_STALLED_BY_ALIGNER_ONLY_CYCLES" block=TA event=57 descr="Number of cycles Addresser stalled by Aligner and not further down the pipe. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_ADDRESSER_STALLED_CYCLES" block=TA event=58 descr="Number of cycles Addresser stalled. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_ANISO_STALLED_BY_ADDRESSER_ONLY_CYCLES" block=TA event=59 descr="Number of cycles Aniso stalled by Addresser and not further down the pipe. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_ANISO_STALLED_CYCLES" block=TA event=60 descr="Number of cycles Aniso stalled. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_DERIV_STALLED_BY_ANISO_ONLY_CYCLES" block=TA event=61 descr="Number of cycles Deriv stalled by Aniso and not further down the pipe. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_DERIV_STALLED_CYCLES" block=TA event=62 descr="Number of cycles Deriv stalled. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_ANISO_GT1_CYCLE_QUADS" block=TA event=63 descr="Number of quads requiring more than 1 aniso sample."
-  ></metric>
-  <metric
-    name="TA_COLOR_1_CYCLE_PIXELS" block=TA event=64 descr="Number of pixels requiring sampler state machine to take 1 cycle due to format."
-  ></metric>
-  <metric
-    name="TA_COLOR_2_CYCLE_PIXELS" block=TA event=65 descr="Number of pixels requiring sampler state machine to take 2 cycle due to format."
-  ></metric>
-  <metric
-    name="TA_COLOR_3_CYCLE_PIXELS" block=TA event=66 descr="Number of pixels requiring sampler state machine to take 3 cycle due to format."
-  ></metric>
-  <metric
-    name="TA_COLOR_4_CYCLE_PIXELS" block=TA event=67 descr="Number of pixels requiring sampler state machine to take 4 cycle due to format."
-  ></metric>
-  <metric
-    name="TA_MIP_1_CYCLE_PIXELS" block=TA event=68 descr="Number of pixels requiring sampler state machine to take 1 cycle due to mip filter."
-  ></metric>
-  <metric
-    name="TA_MIP_2_CYCLE_PIXELS" block=TA event=69 descr="Number of pixels requiring sampler state machine to take 2 cycle due to mip filter."
-  ></metric>
-  <metric
-    name="TA_VOL_1_CYCLE_PIXELS" block=TA event=70 descr="Number of pixels requiring sampler state machine to take 1 cycle due to z filter."
-  ></metric>
-  <metric
-    name="TA_VOL_2_CYCLE_PIXELS" block=TA event=71 descr="Number of pixels requiring sampler state machine to take 2 cycle due to z filter."
-  ></metric>
-  <metric
-    name="TA_BILIN_POINT_1_CYCLE_PIXELS" block=TA event=72 descr="Number of pixels requiring sampler state machine to take 1 cycle due to xy filter."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_0_SAMPLES" block=TA event=73 descr="Number of samples fetched from mip 0."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_1_SAMPLES" block=TA event=74 descr="Number of samples fetched from mip 1."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_2_SAMPLES" block=TA event=75 descr="Number of samples fetched from mip 2."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_3_SAMPLES" block=TA event=76 descr="Number of samples fetched from mip 3."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_4_SAMPLES" block=TA event=77 descr="Number of samples fetched from mip 4."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_5_SAMPLES" block=TA event=78 descr="Number of samples fetched from mip 5."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_6_SAMPLES" block=TA event=79 descr="Number of samples fetched from mip 6."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_7_SAMPLES" block=TA event=80 descr="Number of samples fetched from mip 7."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_8_SAMPLES" block=TA event=81 descr="Number of samples fetched from mip 8."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_9_SAMPLES" block=TA event=82 descr="Number of samples fetched from mip 9."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_10_SAMPLES" block=TA event=83 descr="Number of samples fetched from mip 10."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_11_SAMPLES" block=TA event=84 descr="Number of samples fetched from mip 11."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_12_SAMPLES" block=TA event=85 descr="Number of samples fetched from mip 12."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_13_SAMPLES" block=TA event=86 descr="Number of samples fetched from mip 13."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_14_SAMPLES" block=TA event=87 descr="Number of samples fetched from mip 14."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_INVALID_SAMPLES" block=TA event=88 descr="Number of samples marked invalid using mip 15 method."
-  ></metric>
-  <metric
-    name="TA_ANISO_1_CYCLE_QUADS" block=TA event=89 descr="Number of quads requiring 1 aniso sample."
-  ></metric>
-  <metric
-    name="TA_ANISO_2_CYCLE_QUADS" block=TA event=90 descr="Number of quads requiring 2 aniso sample."
-  ></metric>
-  <metric
-    name="TA_ANISO_4_CYCLE_QUADS" block=TA event=91 descr="Number of quads requiring 4 aniso sample."
-  ></metric>
-  <metric
-    name="TA_ANISO_6_CYCLE_QUADS" block=TA event=92 descr="Number of quads requiring 6 aniso sample."
-  ></metric>
-  <metric
-    name="TA_ANISO_8_CYCLE_QUADS" block=TA event=93 descr="Number of quads requiring 8 aniso sample."
-  ></metric>
-  <metric
-    name="TA_ANISO_10_CYCLE_QUADS" block=TA event=94 descr="Number of quads requiring 10 aniso sample."
-  ></metric>
-  <metric
-    name="TA_ANISO_12_CYCLE_QUADS" block=TA event=95 descr="Number of quads requiring 12 aniso sample."
-  ></metric>
-  <metric
-    name="TA_ANISO_14_CYCLE_QUADS" block=TA event=96 descr="Number of quads requiring 14 aniso sample."
-  ></metric>
-  <metric
-    name="TA_ANISO_16_CYCLE_QUADS" block=TA event=97 descr="Number of quads requiring 16 aniso sample."
-  ></metric>
-  <metric
-    name="TA_WRITE_PATH_INPUT_CYCLES" block=TA event=98 descr="Number of cycles received from write datapath from sh_dispatct."
-  ></metric>
-  <metric
-    name="TA_WRITE_PATH_OUTPUT_CYCLES" block=TA event=99 descr="Number of cycles sent from write datapath to TC."
-  ></metric>
-  <metric
-    name="TA_FLAT_WAVEFRONTS" block=TA event=100 descr="Number of flat opcode wavfronts processed by the TA."
-  ></metric>
-  <metric
-    name="TA_FLAT_READ_WAVEFRONTS" block=TA event=101 descr="Number of flat opcode reads processed by the TA."
-  ></metric>
-  <metric
-    name="TA_FLAT_WRITE_WAVEFRONTS" block=TA event=102 descr="Number of flat opcode writes processed by the TA."
-  ></metric>
-  <metric
-    name="TA_FLAT_ATOMIC_WAVEFRONTS" block=TA event=103 descr="Number of flat opcode atomics processed by the TA."
-  ></metric>
-  <metric
-    name="TA_FLAT_COALESCEABLE_WAVEFRONTS" block=TA event=104 descr="Number of flat opcode coalesceale ops processed by the TA."
-  ></metric>
-  <metric
-    name="TA_REG_SCLK_VLD" block=TA event=105 descr="Number of cycles reg_sclk is active. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_LOCAL_CG_DYN_SCLK_GRP0_EN" block=TA event=106 descr="Number of cycles grp0 sclk is active. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_LOCAL_CG_DYN_SCLK_GRP1_EN" block=TA event=107 descr="Number of cycles grp1 sclk is active. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_LOCAL_CG_DYN_SCLK_GRP1_MEMS_EN" block=TA event=108 descr="Number of cycles grp1_mems sclk is active. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_LOCAL_CG_DYN_SCLK_GRP4_EN" block=TA event=109 descr="Number of cycles grp4 sclk is active. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_LOCAL_CG_DYN_SCLK_GRP5_EN" block=TA event=110 descr="Number of cycles grp5 sclk is active. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_XNACK_ON_PHASE0" block=TA event=111 descr="None zero Xnack mask returned on phase0. This counter is always 0x0 for configurations that do not support XNACKs. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_XNACK_ON_PHASE1" block=TA event=112 descr="None zero Xnack mask returned on phase1. This counter is always 0x0 for configurations that do not support XNACKs. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_XNACK_ON_PHASE2" block=TA event=113 descr="None zero Xnack mask returned on phase2. This counter is always 0x0 for configurations that do not support XNACKs. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_XNACK_ON_PHASE3" block=TA event=114 descr="None zero Xnack mask returned on phase3. This counter is always 0x0 for configurations that do not support XNACKs. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_FIRST_XNACK_ON_PHASE0" block=TA event=115 descr="First Xnack of an instruction occured on phase0. This counter is always 0x0 for configurations that do not support XNACKs. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_FIRST_XNACK_ON_PHASE1" block=TA event=116 descr="First Xnack of an instruction occured on phase1. This counter is always 0x0 for configurations that do not support XNACKs. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_FIRST_XNACK_ON_PHASE2" block=TA event=117 descr="First Xnack of an instruction occured on phase2. This counter is always 0x0 for configurations that do not support XNACKs. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_FIRST_XNACK_ON_PHASE3" block=TA event=118 descr="First Xnack of an instruction occured on phase3. This counter is always 0x0 for configurations that do not support XNACKs. Perf_Windowing not supported for this counter."
-  ></metric>
-  # TCA counters
-  <metric
-    name="TCA_NONE" block=TCA event=0 descr="Don't count anything."
-  ></metric>
-  <metric
-    name="TCA_CYCLE" block=TCA event=1 descr="Number of cycles. Not windowable."
-  ></metric>
-  <metric
-    name="TCA_BUSY" block=TCA event=2 descr="Number of cycles we have a request pending. Not windowable."
-  ></metric>
-  <metric
-    name="TCA_FORCED_HOLE_TCC0" block=TCA event=3 descr="Number of TCC0 hole requests that waited so long that it was decided that they should be forced rather than opportunistic. The TCC number is based on the TCCs connected to this TCA and not on the global numbering."
-  ></metric>
-  <metric
-    name="TCA_FORCED_HOLE_TCC1" block=TCA event=4 descr=""
-  ></metric>
-  <metric
-    name="TCA_FORCED_HOLE_TCC2" block=TCA event=5 descr=""
-  ></metric>
-  <metric
-    name="TCA_FORCED_HOLE_TCC3" block=TCA event=6 descr=""
-  ></metric>
-  <metric
-    name="TCA_FORCED_HOLE_TCC4" block=TCA event=7 descr=""
-  ></metric>
-  <metric
-    name="TCA_FORCED_HOLE_TCC5" block=TCA event=8 descr=""
-  ></metric>
-  <metric
-    name="TCA_FORCED_HOLE_TCC6" block=TCA event=9 descr=""
-  ></metric>
-  <metric
-    name="TCA_FORCED_HOLE_TCC7" block=TCA event=10 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC0" block=TCA event=11 descr="Number of requests sent to TCC0. This should report the same thing as TCC_PERF_SEL_REQ in the corresponding TCC in the long run. It is only offered to create a deterministic counter in the TCA so that the counters may be sanity tested."
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC1" block=TCA event=12 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC2" block=TCA event=13 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC3" block=TCA event=14 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC4" block=TCA event=15 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC5" block=TCA event=16 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC6" block=TCA event=17 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC7" block=TCA event=18 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC8" block=TCA event=19 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC9" block=TCA event=20 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC10" block=TCA event=21 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC11" block=TCA event=22 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC12" block=TCA event=23 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC13" block=TCA event=24 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC14" block=TCA event=25 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC15" block=TCA event=26 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC16" block=TCA event=27 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC17" block=TCA event=28 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC18" block=TCA event=29 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC19" block=TCA event=30 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC20" block=TCA event=31 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC21" block=TCA event=32 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC22" block=TCA event=33 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC23" block=TCA event=34 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC24" block=TCA event=35 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC25" block=TCA event=36 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC26" block=TCA event=37 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC27" block=TCA event=38 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC28" block=TCA event=39 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC29" block=TCA event=40 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC30" block=TCA event=41 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC31" block=TCA event=42 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCC0" block=TCA event=43 descr="Number of cycles no requests could be sent to TCC0 because its fifos were expected to be full. The TCC number is based on the TCCs connected to this TCA and not on the global numbering."
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCC1" block=TCA event=44 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCC2" block=TCA event=45 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCC3" block=TCA event=46 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCA1_TCC0" block=TCA event=47 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCA1_TCC1" block=TCA event=48 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCA1_TCC2" block=TCA event=49 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCA1_TCC3" block=TCA event=50 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCA2_TCC0" block=TCA event=51 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCA2_TCC1" block=TCA event=52 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCA2_TCC2" block=TCA event=53 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCA2_TCC3" block=TCA event=54 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCA3_TCC0" block=TCA event=55 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCA3_TCC1" block=TCA event=56 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCA3_TCC2" block=TCA event=57 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCA3_TCC3" block=TCA event=58 descr=""
-  ></metric>
-  # TCC counters
-  <metric
-    name="TCC_NONE" block=TCC event=0 descr="Don't count anything."
-  ></metric>
-  <metric
-    name="TCC_CYCLE" block=TCC event=1 descr="Number of cycles. Not windowable."
-  ></metric>
-  <metric
-    name="TCC_BUSY" block=TCC event=2 descr="Number of cycles we have a request pending. Not windowable."
-  ></metric>
-  <metric
-    name="TCC_REQ" block=TCC event=3 descr="Number of requests of all types. This is measured at the tag block. This may be more than the number of requests arriving at the TCC, but it is a good indication of the total amount of work that needs to be performed."
-  ></metric>
-  <metric
-    name="TCC_STREAMING_REQ" block=TCC event=4 descr="Number of streaming requests. This is measured at the tag block."
-  ></metric>
-  <metric
-    name="TCC_NC_REQ" block=TCC event=5 descr="The number of noncoherently cached requests. This is measured at the tag block."
-  ></metric>
-  <metric
-    name="TCC_UC_REQ" block=TCC event=6 descr="The number of uncached requests. This is measured at the tag block."
-  ></metric>
-  <metric
-    name="TCC_CC_REQ" block=TCC event=7 descr="The number of coherently cached requests. This is measured at the tag block."
-  ></metric>
-  <metric
-    name="TCC_RW_REQ" block=TCC event=8 descr="The number of RW requests. This is measured at the tag block."
-  ></metric>
-  <metric
-    name="TCC_PROBE" block=TCC event=9 descr="Number of probe requests. Not windowable."
-  ></metric>
-  <metric
-    name="TCC_PROBE_ALL" block=TCC event=10 descr="Number of external probe requests with with EA_TCC_preq_all== 1. Not windowable."
-  ></metric>
-  <metric
-    name="TCC_INTERNAL_PROBE" block=TCC event=11 descr="Number of self-probes spawned by TCC for CC writes/atomic operations. Not windowable."
-  ></metric>
-  <metric
-    name="TCC_READ" block=TCC event=12 descr="Number of read requests. Compressed reads are included in this, but metadata reads are not included."
-  ></metric>
-  <metric
-    name="TCC_WRITE" block=TCC event=13 descr="Number of write requests."
-  ></metric>
-  <metric
-    name="TCC_ATOMIC" block=TCC event=14 descr="Number of atomic requests of all types."
-  ></metric>
-  <metric
-    name="TCC_NOP_ACK" block=TCC event=15 descr="Number of NOP_ACK requests."
-  ></metric>
-  <metric
-    name="TCC_NOP_RTN0" block=TCC event=16 descr="Number of NOP_RTN0 requests."
-  ></metric>
-  <metric
-    name="TCC_HIT" block=TCC event=17 descr="Number of cache hits."
-  ></metric>
-  <metric
-    name="TCC_SECTOR_HIT" block=TCC event=18 descr="Number of cache sector hits."
-  ></metric>
-  <metric
-    name="TCC_MISS" block=TCC event=19 descr="Number of cache misses. UC reads count as misses."
-  ></metric>
-  <metric
-    name="TCC_DEWRITE_ALLOCATE_HIT" block=TCC event=20 descr="Number of times a read was performed on a cache line that had only been written into before. This can only occur once for the life of a cache line."
-  ></metric>
-  <metric
-    name="TCC_FULLY_WRITTEN_HIT" block=TCC event=21 descr="Number of times a 32-byte read from the EA was avoided because the cache sector was already fully written with data. This can only occur once for the life of a cache sector."
-  ></metric>
-  <metric
-    name="TCC_WRITEBACK" block=TCC event=22 descr="Number of lines written back to main memory. This includes writebacks of dirty lines and uncached write/atomic requests."
-  ></metric>
-  <metric
-    name="TCC_LATENCY_FIFO_FULL" block=TCC event=23 descr="Number of cycles the latency fifo was full."
-  ></metric>
-  <metric
-    name="TCC_SRC_FIFO_FULL" block=TCC event=24 descr="Number of cycles the src fifo was expected to be full as measured at the IB block."
-  ></metric>
-  <metric
-    name="TCC_HOLE_FIFO_FULL" block=TCC event=25 descr="Number of cycles the hole fifos in the TCAs were expected to be full as measured at the IB block. This is usually an indication that there was insufficient bandwidth available on the data bus for source data."
-  ></metric>
-  <metric
-    name="TCC_EA_WRREQ" block=TCC event=26 descr="Number of transactions (either 32-byte or 64-byte) going over the TC_EA_wrreq interface. Atomics may travel over the same interface and are generally classified as write requests. This does not include probe commands."
-  ></metric>
-  <metric
-    name="TCC_EA_WRREQ_64B" block=TCC event=27 descr="Number of 64-byte transactions going (64-byte write or CMPSWAP) over the TC_EA_wrreq interface."
-  ></metric>
-  <metric
-    name="TCC_EA_WRREQ_PROBE_COMMAND" block=TCC event=28 descr="Number of probe commands going over the TC_EA_wrreq interface."
-  ></metric>
-  <metric
-    name="TCC_EA_WR_UNCACHED_32B" block=TCC event=29 descr="Number of 32-byte write/atomic going over the TC_EA_wrreq interface due to uncached traffic. Note that CC mtypes can produce uncached requests, and those are included in this. A 64-byte request will be counted as 2"
-  ></metric>
-  <metric
-    name="TCC_EA_WRREQ_STALL" block=TCC event=30 descr="Number of cycles a write request was stalled."
-  ></metric>
-  <metric
-    name="TCC_EA_WRREQ_IO_CREDIT_STALL" block=TCC event=31 descr="Number of cycles a EA write request was stalled because the interface was out of IO credits."
-  ></metric>
-  <metric
-    name="TCC_EA_WRREQ_GMI_CREDIT_STALL" block=TCC event=32 descr="Number of cycles a EA write request was stalled because the interface was out of GMI credits."
-  ></metric>
-  <metric
-    name="TCC_EA_WRREQ_DRAM_CREDIT_STALL" block=TCC event=33 descr="Number of cycles a EA write request was stalled because the interface was out of DRAM credits."
-  ></metric>
-  <metric
-    name="TCC_TOO_MANY_EA_WRREQS_STALL" block=TCC event=34 descr="Number of cycles the TCC could not send a EA write request because it already reached its maximum number of pending EA write requests."
-  ></metric>
-  <metric
-    name="TCC_EA_WRREQ_LEVEL" block=TCC event=35 descr="The sum of the number of EA write requests in flight. This is primarily meant for measure average EA write latency. Average write latency = TCC_PERF_SEL_EA_WRREQ_LEVEL/TCC_PERF_SEL_EA_WRREQ."
-  ></metric>
-  <metric
-    name="TCC_EA_ATOMIC" block=TCC event=36 descr="Number of transactions going over the TC_EA_wrreq interface that are actually atomic requests."
-  ></metric>
-  <metric
-    name="TCC_EA_ATOMIC_LEVEL" block=TCC event=37 descr="The sum of the number of EA atomics in flight. This is primarily meant for measure average EA atomic latency. Average atomic latency = TCC_PERF_SEL_EA_WRREQ_ATOMIC_LEVEL/TCC_PERF_SEL_EA_WRREQ_ATOMIC."
-  ></metric>
-  <metric
-    name="TCC_EA_RDREQ" block=TCC event=38 descr="Number of TCC/EA read requests (either 32-byte or 64-byte)"
-  ></metric>
-  <metric
-    name="TCC_EA_RDREQ_32B" block=TCC event=39 descr="Number of 32-byte TCC/EA read requests"
-  ></metric>
-  <metric
-    name="TCC_EA_RD_UNCACHED_32B" block=TCC event=40 descr="Number of 32-byte TCC/EA read due to uncached traffic. A 64-byte request will be counted as 2"
-  ></metric>
-  <metric
-    name="TCC_EA_RDREQ_IO_CREDIT_STALL" block=TCC event=41 descr="Number of cycles there was a stall because the read request interface was out of IO credits. Stalls occur regardless of whether a read needed to be performed or not."
-  ></metric>
-  <metric
-    name="TCC_EA_RDREQ_GMI_CREDIT_STALL" block=TCC event=42 descr="Number of cycles there was a stall because the read request interface was out of GMI credits. Stalls occur regardless of whether a read needed to be performed or not."
-  ></metric>
-  <metric
-    name="TCC_EA_RDREQ_DRAM_CREDIT_STALL" block=TCC event=43 descr="Number of cycles there was a stall because the read request interface was out of DRAM credits. Stalls occur regardless of whether a read needed to be performed or not."
-  ></metric>
-  <metric
-    name="TCC_EA_RDREQ_LEVEL" block=TCC event=44 descr="The sum of the number of TCC/EA read requests in flight. This is primarily meant for measure average EA read latency. Average read latency = TCC_PERF_SEL_EA_RDREQ_LEVEL/TCC_PERF_SEL_EA_RDREQ."
-  ></metric>
-  <metric
-    name="TCC_TAG_STALL" block=TCC event=45 descr="Number of cycles the normal request pipeline in the tag was stalled for any reason. Normally, stalls of this nature are measured exactly from one point the pipeline, but that is not the case for this counter. Probes can stall the pipeline at a variety of places, and there is no single point that can reasonably measure the total stalls accurately."
-  ></metric>
-  <metric
-    name="TCC_TAG_WRITEBACK_FIFO_FULL_STALL" block=TCC event=46 descr="Number of cycles the normal request pipeline in the tag was stalled due to the writeback fifo within the tag block being full."
-  ></metric>
-  <metric
-    name="TCC_TAG_MISS_NOTHING_REPLACEABLE_STALL" block=TCC event=47 descr="Number of cycles the normal request pipeline in the tag was stalled due to a cache miss and unavailabiliyt of a replaceable cache line."
-  ></metric>
-  <metric
-    name="TCC_TAG_UNCACHED_WRITE_ATOMIC_FIFO_FULL_STALL" block=TCC event=48 descr="Number of cycles the normal request pipeline in the tag was stalled due to the uncached write/atomic fifo being full."
-  ></metric>
-  <metric
-    name="TCC_TAG_NO_UNCACHED_WRITE_ATOMIC_ENTRIES_STALL" block=TCC event=49 descr="Number of cycles the normal request pipeline in the tag was stalled due to the lack of unused uncached write/atomic tracking entries."
-  ></metric>
-  <metric
-    name="TCC_TAG_PROBE_STALL" block=TCC event=50 descr="Number of cycles the normal request pipeline in the tag was stalled due to the presence of a probe."
-  ></metric>
-  <metric
-    name="TCC_TAG_PROBE_FILTER_STALL" block=TCC event=51 descr="Number of cycles the normal request pipeline in the tag was stalled due to the probe filter being in an inappropriate state."
-  ></metric>
-  <metric
-    name="TCC_TAG_PROBE_FIFO_FULL_STALL" block=TCC event=52 descr="Number of cycles the normal request pipeline in the tag was stalled due to the probe fifo begin full."
-  ></metric>
-  <metric
-    name="TCC_READ_RETURN_TIMEOUT" block=TCC event=53 descr="Number of bubbles requests sent to the TCA because a EA read return waited so long for a cache ram port that it timed out."
-  ></metric>
-  <metric
-    name="TCC_WRITEBACK_READ_TIMEOUT" block=TCC event=54 descr="Number of bubbles requests sent to the TCA because a writeback waited so long for a cache ram port that it timed out."
-  ></metric>
-  <metric
-    name="TCC_READ_RETURN_FULL_BUBBLE" block=TCC event=55 descr="Number of bubbles requests sent to the TCA to prevent the EA read return fifos from overflowing. Not windowable."
-  ></metric>
-  <metric
-    name="TCC_BUBBLE" block=TCC event=56 descr="Total number of bubble requests sent to the TCA"
-  ></metric>
-  <metric
-    name="TCC_RETURN_ACK" block=TCC event=57 descr="Number of times only an ack was sent on the return bus."
-  ></metric>
-  <metric
-    name="TCC_RETURN_DATA" block=TCC event=58 descr="Number of times only data was sent on the return bus."
-  ></metric>
-  <metric
-    name="TCC_RETURN_HOLE" block=TCC event=59 descr="Number of times only a hole was sent on the return bus."
-  ></metric>
-  <metric
-    name="TCC_RETURN_ACK_HOLE" block=TCC event=60 descr="Number of times an ack and a hole were sent at the same time on the return bus."
-  ></metric>
-  <metric
-    name="TCC_IB_REQ" block=TCC event=61 descr="Number of requests through the IB. This measures the raw request count from graphics clients going to this TCC."
-  ></metric>
-  <metric
-    name="TCC_IB_STALL" block=TCC event=62 descr="Number of cycles the IB output was stalled."
-  ></metric>
-  <metric
-    name="TCC_IB_TAG_STALL" block=TCC event=63 descr="Number of cycles the IB output was stalled on the tag."
-  ></metric>
-  <metric
-    name="TCC_TCA_LEVEL" block=TCC event=64 descr="The sum of the number of requests sent to the TCA for output arbitration in flight. Average TCA arbitration latency = TCC_PERF_SEL_TCA_LEVEL/TCC_PERF_SEL_REQ."
-  ></metric>
-  <metric
-    name="TCC_HOLE_LEVEL" block=TCC event=65 descr="The sum of the number of hole requests in flight. Average hole latency = TCC_PERF_SEL_HOLE_LEVEL/(TCC_PERF_SEL_WRITE+TCC_PERF_SEL_ATOMIC). Not windowable."
-  ></metric>
-  <metric
-    name="TCC_EA_RDRET_NACK" block=TCC event=66 descr="The number of EA read returns that were nacked."
-  ></metric>
-  <metric
-    name="TCC_EA_WRRET_NACK" block=TCC event=67 descr="The number of EA write returns that were nacked."
-  ></metric>
-  <metric
-    name="TCC_NORMAL_WRITEBACK" block=TCC event=68 descr="Number of writebacks due to requests that are not writeback requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBL2_NC_WRITEBACK" block=TCC event=69 descr="Number of writebacks due to TC_OP_WBL2_NC requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_WRITEBACK" block=TCC event=70 descr="Number of writebacks due to TC_OP_WBINVL2 requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_NC_WRITEBACK" block=TCC event=71 descr="Number of writebacks due to TC_OP_WBINVL2_NC requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_SD_WRITEBACK" block=TCC event=72 descr="Number of writebacks due to TC_OP_WBINVL2_SD requests."
-  ></metric>
-  <metric
-    name="TCC_ALL_TC_OP_WB_WRITEBACK" block=TCC event=73 descr="Number of writebacks due to all TC_OP writeback requests."
-  ></metric>
-  <metric
-    name="TCC_NORMAL_EVICT" block=TCC event=74 descr="Number of evictions due to requests that are not invalidate or probe requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBL2_NC_EVICT" block=TCC event=75 descr="Number of evictions due to TC_OP_WBL2_NC requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_INVL2_NC_EVICT" block=TCC event=76 descr="Number of evictions due to TC_OP_INVL2_NC requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_EVICT" block=TCC event=77 descr="Number of evictions due to TC_OP_WBINVL2 requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_NC_EVICT" block=TCC event=78 descr="Number of evictions due to TC_OP_WBINVL2_NC requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_SD_EVICT" block=TCC event=79 descr="Number of evictions due to TC_OP_WBINVL2_SD requests."
-  ></metric>
-  <metric
-    name="TCC_ALL_TC_OP_INV_EVICT" block=TCC event=80 descr="Number of evictions due to all TC_OP invalidate requests."
-  ></metric>
-  <metric
-    name="TCC_PROBE_EVICT" block=TCC event=81 descr="Number of evictions/invalidations due to probes. Not windowable."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBL2_NC_CYCLE" block=TCC event=82 descr="Number of cycles spent performing TC_OP_WBL2_NC requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_INVL2_NC_CYCLE" block=TCC event=83 descr="Number of cycles spent performing TC_OP_INVL2_NC requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_CYCLE" block=TCC event=84 descr="Number of cycles spent performing TC_OP_WBINVL2 requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_NC_CYCLE" block=TCC event=85 descr="Number of cycles spent performing TC_OP_WBINVL2_NC requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_SD_CYCLE" block=TCC event=86 descr="Number of cycles spent performing TC_OP_WBINVL2_SD requests."
-  ></metric>
-  <metric
-    name="TCC_ALL_TC_OP_WB_OR_INV_CYCLE" block=TCC event=87 descr="Number of cycles spent performing all TC_OP writeback or invalidate requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBL2_NC_START" block=TCC event=88 descr="Number of TC_OP_WBL2_NC requests started."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_INVL2_NC_START" block=TCC event=89 descr="Number of TC_OP_INVL2_NC requests started."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_START" block=TCC event=90 descr="Number of TC_OP_WBINVL2 requests started."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_NC_START" block=TCC event=91 descr="Number of TC_OP_WBINVL2_NC requests started."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_SD_START" block=TCC event=92 descr="Number of TC_OP_WBINVL2_SD requests started."
-  ></metric>
-  <metric
-    name="TCC_ALL_TC_OP_WB_OR_INV_START" block=TCC event=93 descr="Number of TC_OP writeback or invalidate requests started."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBL2_NC_FINISH" block=TCC event=94 descr="Number of TC_OP_WBL2_NC requests finished."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_INVL2_NC_FINISH" block=TCC event=95 descr="Number of TC_OP_INVL2_NC requests finished."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_FINISH" block=TCC event=96 descr="Number of TC_OP_WBINVL2 requests finished."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_NC_FINISH" block=TCC event=97 descr="Number of TC_OP_WBINVL2_NC requests finished."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_SD_FINISH" block=TCC event=98 descr="Number of TC_OP_WBINVL2_SD requests finished."
-  ></metric>
-  <metric
-    name="TCC_ALL_TC_OP_WB_OR_INV_FINISH" block=TCC event=99 descr="Number of TC_OP writeback or invalidate requests finished."
-  ></metric>
-  <metric
-    name="TCC_PROBE_FILTER_DISABLE_TRANSITION" block=TCC event=100 descr="Number of times the probe filter went from enabled to disabled."
-  ></metric>
-  <metric
-    name="TCC_PROBE_FILTER_DISABLED" block=TCC event=101 descr="Number of cycles the probe filter was disabled. The TCC can get probes during these cycles. Not windowable."
-  ></metric>
-  <metric
-    name="TCC_EA_RDREQ_DRAM" block=TCC event=102 descr="Number of TCC/EA read requests (either 32-byte or 64-byte) destined for DRAM (MC)."
-  ></metric>
-  <metric
-    name="TCC_EA_WRREQ_DRAM" block=TCC event=103 descr="Number of TCC/EA write requests (either 32-byte of 64-byte) destined for DRAM (MC)."
-  ></metric>
-  <metric
-    name="TCC_CLIENT0_REQ" block=TCC event=128 descr="Number of cycles client0 sent a request to this TCC."
-  ></metric>
-  <metric
-    name="TCC_CLIENT1_REQ" block=TCC event=129 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT2_REQ" block=TCC event=130 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT3_REQ" block=TCC event=131 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT4_REQ" block=TCC event=132 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT5_REQ" block=TCC event=133 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT6_REQ" block=TCC event=134 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT7_REQ" block=TCC event=135 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT8_REQ" block=TCC event=136 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT9_REQ" block=TCC event=137 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT10_REQ" block=TCC event=138 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT11_REQ" block=TCC event=139 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT12_REQ" block=TCC event=140 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT13_REQ" block=TCC event=141 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT14_REQ" block=TCC event=142 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT15_REQ" block=TCC event=143 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT16_REQ" block=TCC event=144 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT17_REQ" block=TCC event=145 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT18_REQ" block=TCC event=146 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT19_REQ" block=TCC event=147 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT20_REQ" block=TCC event=148 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT21_REQ" block=TCC event=149 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT22_REQ" block=TCC event=150 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT23_REQ" block=TCC event=151 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT24_REQ" block=TCC event=152 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT25_REQ" block=TCC event=153 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT26_REQ" block=TCC event=154 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT27_REQ" block=TCC event=155 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT28_REQ" block=TCC event=156 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT29_REQ" block=TCC event=157 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT30_REQ" block=TCC event=158 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT31_REQ" block=TCC event=159 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT32_REQ" block=TCC event=160 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT33_REQ" block=TCC event=161 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT34_REQ" block=TCC event=162 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT35_REQ" block=TCC event=163 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT36_REQ" block=TCC event=164 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT37_REQ" block=TCC event=165 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT38_REQ" block=TCC event=166 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT39_REQ" block=TCC event=167 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT40_REQ" block=TCC event=168 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT41_REQ" block=TCC event=169 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT42_REQ" block=TCC event=170 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT43_REQ" block=TCC event=171 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT44_REQ" block=TCC event=172 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT45_REQ" block=TCC event=173 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT46_REQ" block=TCC event=174 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT47_REQ" block=TCC event=175 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT48_REQ" block=TCC event=176 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT49_REQ" block=TCC event=177 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT50_REQ" block=TCC event=178 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT51_REQ" block=TCC event=179 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT52_REQ" block=TCC event=180 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT53_REQ" block=TCC event=181 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT54_REQ" block=TCC event=182 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT55_REQ" block=TCC event=183 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT56_REQ" block=TCC event=184 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT57_REQ" block=TCC event=185 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT58_REQ" block=TCC event=186 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT59_REQ" block=TCC event=187 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT60_REQ" block=TCC event=188 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT61_REQ" block=TCC event=189 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT62_REQ" block=TCC event=190 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT63_REQ" block=TCC event=191 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT64_REQ" block=TCC event=192 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT65_REQ" block=TCC event=193 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT66_REQ" block=TCC event=194 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT67_REQ" block=TCC event=195 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT68_REQ" block=TCC event=196 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT69_REQ" block=TCC event=197 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT70_REQ" block=TCC event=198 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT71_REQ" block=TCC event=199 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT72_REQ" block=TCC event=200 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT73_REQ" block=TCC event=201 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT74_REQ" block=TCC event=202 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT75_REQ" block=TCC event=203 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT76_REQ" block=TCC event=204 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT77_REQ" block=TCC event=205 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT78_REQ" block=TCC event=206 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT79_REQ" block=TCC event=207 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT80_REQ" block=TCC event=208 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT81_REQ" block=TCC event=209 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT82_REQ" block=TCC event=210 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT83_REQ" block=TCC event=211 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT84_REQ" block=TCC event=212 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT85_REQ" block=TCC event=213 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT86_REQ" block=TCC event=214 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT87_REQ" block=TCC event=215 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT88_REQ" block=TCC event=216 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT89_REQ" block=TCC event=217 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT90_REQ" block=TCC event=218 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT91_REQ" block=TCC event=219 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT92_REQ" block=TCC event=220 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT93_REQ" block=TCC event=221 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT94_REQ" block=TCC event=222 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT95_REQ" block=TCC event=223 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT96_REQ" block=TCC event=224 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT97_REQ" block=TCC event=225 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT98_REQ" block=TCC event=226 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT99_REQ" block=TCC event=227 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT100_REQ" block=TCC event=228 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT101_REQ" block=TCC event=229 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT102_REQ" block=TCC event=230 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT103_REQ" block=TCC event=231 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT104_REQ" block=TCC event=232 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT105_REQ" block=TCC event=233 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT106_REQ" block=TCC event=234 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT107_REQ" block=TCC event=235 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT108_REQ" block=TCC event=236 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT109_REQ" block=TCC event=237 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT110_REQ" block=TCC event=238 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT111_REQ" block=TCC event=239 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT112_REQ" block=TCC event=240 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT113_REQ" block=TCC event=241 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT114_REQ" block=TCC event=242 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT115_REQ" block=TCC event=243 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT116_REQ" block=TCC event=244 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT117_REQ" block=TCC event=245 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT118_REQ" block=TCC event=246 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT119_REQ" block=TCC event=247 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT120_REQ" block=TCC event=248 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT121_REQ" block=TCC event=249 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT122_REQ" block=TCC event=250 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT123_REQ" block=TCC event=251 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT124_REQ" block=TCC event=252 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT125_REQ" block=TCC event=253 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT126_REQ" block=TCC event=254 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT127_REQ" block=TCC event=255 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT128_REQ" block=TCC event=256 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT129_REQ" block=TCC event=257 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT130_REQ" block=TCC event=258 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT131_REQ" block=TCC event=259 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT132_REQ" block=TCC event=260 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT133_REQ" block=TCC event=261 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT134_REQ" block=TCC event=262 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT135_REQ" block=TCC event=263 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT136_REQ" block=TCC event=264 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT137_REQ" block=TCC event=265 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT138_REQ" block=TCC event=266 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT139_REQ" block=TCC event=267 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT140_REQ" block=TCC event=268 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT141_REQ" block=TCC event=269 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT142_REQ" block=TCC event=270 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT143_REQ" block=TCC event=271 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT144_REQ" block=TCC event=272 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT145_REQ" block=TCC event=273 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT146_REQ" block=TCC event=274 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT147_REQ" block=TCC event=275 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT148_REQ" block=TCC event=276 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT149_REQ" block=TCC event=277 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT150_REQ" block=TCC event=278 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT151_REQ" block=TCC event=279 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT152_REQ" block=TCC event=280 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT153_REQ" block=TCC event=281 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT154_REQ" block=TCC event=282 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT155_REQ" block=TCC event=283 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT156_REQ" block=TCC event=284 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT157_REQ" block=TCC event=285 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT158_REQ" block=TCC event=286 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT159_REQ" block=TCC event=287 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT160_REQ" block=TCC event=288 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT161_REQ" block=TCC event=289 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT162_REQ" block=TCC event=290 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT163_REQ" block=TCC event=291 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT164_REQ" block=TCC event=292 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT165_REQ" block=TCC event=293 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT166_REQ" block=TCC event=294 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT167_REQ" block=TCC event=295 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT168_REQ" block=TCC event=296 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT169_REQ" block=TCC event=297 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT170_REQ" block=TCC event=298 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT171_REQ" block=TCC event=299 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT172_REQ" block=TCC event=300 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT173_REQ" block=TCC event=301 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT174_REQ" block=TCC event=302 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT175_REQ" block=TCC event=303 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT176_REQ" block=TCC event=304 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT177_REQ" block=TCC event=305 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT178_REQ" block=TCC event=306 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT179_REQ" block=TCC event=307 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT180_REQ" block=TCC event=308 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT181_REQ" block=TCC event=309 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT182_REQ" block=TCC event=310 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT183_REQ" block=TCC event=311 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT184_REQ" block=TCC event=312 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT185_REQ" block=TCC event=313 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT186_REQ" block=TCC event=314 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT187_REQ" block=TCC event=315 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT188_REQ" block=TCC event=316 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT189_REQ" block=TCC event=317 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT190_REQ" block=TCC event=318 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT191_REQ" block=TCC event=319 descr=""
-  ></metric>
-  # TCP counters
-  <metric
-    name="TCP_GATE_EN1" block=TCP event=0 descr="TCP interface clocks are turned on. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_GATE_EN2" block=TCP event=1 descr="TCP core clocks are turned on. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_CORE_REG_SCLK_VLD" block=TCP event=2 descr="TCP reg clocks are turned on. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_TA_TCP_ADDR_STARVE_CYCLES" block=TCP event=3 descr="TA starves TCP addr interface. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_TA_TCP_DATA_STARVE_CYCLES" block=TCP event=4 descr="TA starves TCP data interface. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_TCP_TA_ADDR_STALL_CYCLES" block=TCP event=5 descr="TCP stalls TA addr interface."
-  ></metric>
-  <metric
-    name="TCP_TCP_TA_DATA_STALL_CYCLES" block=TCP event=6 descr="TCP stalls TA data interface. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_TD_TCP_STALL_CYCLES" block=TCP event=7 descr="TD stalls TCP"
-  ></metric>
-  <metric
-    name="TCP_TCR_TCP_STALL_CYCLES" block=TCP event=8 descr="TCR stalls TCP_TCR_req interface"
-  ></metric>
-  <metric
-    name="TCP_TCP_TCR_STARVE_CYCLES" block=TCP event=9 descr="TCP starves TCP_TCR_req interface"
-  ></metric>
-  <metric
-    name="TCP_LOD_STALL_CYCLES" block=TCP event=10 descr="Per Pixel LOD stall"
-  ></metric>
-  <metric
-    name="TCP_READ_TAGCONFLICT_STALL_CYCLES" block=TCP event=11 descr="Tagram conflict stall on a read"
-  ></metric>
-  <metric
-    name="TCP_WRITE_TAGCONFLICT_STALL_CYCLES" block=TCP event=12 descr="Tagram conflict stall on a write"
-  ></metric>
-  <metric
-    name="TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES" block=TCP event=13 descr="Tagram conflict stall on an atomic"
-  ></metric>
-  <metric
-    name="TCP_ALLOC_STALL_CYCLES" block=TCP event=14 descr="Alloc on inflight cache line stall"
-  ></metric>
-  <metric
-    name="TCP_UNORDERED_MTYPE_STALL" block=TCP event=15 descr="Total stalls due to UC/CC mtype ordering"
-  ></metric>
-  <metric
-    name="TCP_LFIFO_STALL_CYCLES" block=TCP event=16 descr="Memory Latency fifos full stall"
-  ></metric>
-  <metric
-    name="TCP_RFIFO_STALL_CYCLES" block=TCP event=17 descr="Memory Request fifos full stall"
-  ></metric>
-  <metric
-    name="TCP_TCR_RDRET_STALL" block=TCP event=18 descr="write into cache stalled by read return from tcr"
-  ></metric>
-  <metric
-    name="TCP_WRITE_CONFLICT_STALL" block=TCP event=19 descr="write stall due to cache bank conflict"
-  ></metric>
-  <metric
-    name="TCP_HOLE_READ_STALL" block=TCP event=20 descr="read from cache stalled due to hole fill read"
-  ></metric>
-  <metric
-    name="TCP_READCONFLICT_STALL_CYCLES" block=TCP event=21 descr="Read conflict stall due to cache bank conflict"
-  ></metric>
-  <metric
-    name="TCP_PENDING_STALL_CYCLES" block=TCP event=22 descr="Stall due to data pending from L2"
-  ></metric>
-  <metric
-    name="TCP_READFIFO_STALL_CYCLES" block=TCP event=23 descr="Read fifo stall ("
-  ></metric>
-  <metric
-    name="TCP_POWER_STALL" block=TCP event=24 descr="Count of stalls due to power throttling"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_SERIALIZATION_STALL" block=TCP event=25 descr="Total number of stalls due to serializing translation requests through the UTCL1."
-  ></metric>
-  <metric
-    name="TCP_TC_TA_XNACK_STALL" block=TCP event=26 descr="Total number of cycles TA stalled the TCP xnack interface. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_TA_TCP_STATE_READ" block=TCP event=27 descr="Number of state reads"
-  ></metric>
-  <metric
-    name="TCP_VOLATILE" block=TCP event=28 descr="Total number of L1 volatile pixels/buffers from TA"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_ACCESSES" block=TCP event=29 descr="Total number of pixels/buffers from TA. Equals TCP_PERF_SEL_TOTAL_READ+TCP_PERF_SEL_TOTAL_NONREAD"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_READ" block=TCP event=30 descr="Total number of read pixels/buffers from TA. Equals TCP_PERF_SEL_TOTAL_HIT_LRU_READ + TCP_PERF_SEL_TOTAL_MISS_LRU_READ + TCP_PERF_SEL_TOTAL_MISS_EVICT_READ"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_NON_READ" block=TCP event=31 descr="Total number of non-read pixels/buffers from TA. Equals TCP_PERF_SEL_WRITE + TCP_PERF_SEL_TOTAL_ATOMIC_WITH_RET + TCP_PERF_SEL_TOTAL_ATOMIC_WITHOUT_RET"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_WRITE" block=TCP event=32 descr="Total number of local write pixels/buffers from TA. Equals TCP_PERF_SEL_TOTAL_MISS_LRU_WRITE+ TCP_PERF_SEL_TOTAL_MISS_EVICT_WRITE"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_HIT_LRU_READ" block=TCP event=33 descr="Total number of read pixels/buffers from TA using the HIT_LRU policy"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_MISS_LRU_READ" block=TCP event=34 descr="Total number of read pixels/buffers from TA using the MISS_LRU policy"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_MISS_EVICT_READ" block=TCP event=35 descr="Total number of read pixels/buffers from TA using the MISS_EVICT policy"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_MISS_LRU_WRITE" block=TCP event=36 descr="Total number of local write pixels/buffers from TA using the MISS_LRU policy"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_MISS_EVICT_WRITE" block=TCP event=37 descr="Total number of global write pixels/buffers from TA using the MISS_EVICT policy"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_ATOMIC_WITH_RET" block=TCP event=38 descr="Total number of atomic with return pixels/buffers from TA"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_ATOMIC_WITHOUT_RET" block=TCP event=39 descr="Total number of atomic without return pixels/buffers from TA"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_WBINVL1" block=TCP event=40 descr="Total number of wbinvl1 transactions from TA (from shader WBINVL1 instructions)"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_WBINVL1_VOL" block=TCP event=41 descr="Total number of volatile wbinvl1 transactions from TA (from shader WBINVL1_VOL instructions)"
-  ></metric>
-  <metric
-    name="TCP_SQ_TCP_INVALIDATE_VOL" block=TCP event=42 descr="Number of volatile cache invalidates from the SQ. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_CP_TCP_INVALIDATE" block=TCP event=43 descr="Number of cache invalidates from the CP. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_CP_TCP_INVALIDATE_VOL" block=TCP event=44 descr="Number of volatile cache invalidates from the CP. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_TOTAL_WRITEBACK_INVALIDATES" block=TCP event=45 descr="Total number of cache invalidates. Equals TCP_PERF_SEL_TOTAL_WBINVL1+ TCP_PERF_SEL_TOTAL_WBINVL1_VOL+ TCP_PERF_SEL_CP_TCP_INVALIDATE+ TCP_PERF_SEL_SQ_TCP_INVALIDATE_VOL. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_SHOOTDOWN" block=TCP event=46 descr="Total number of shootdowns executed by TCP. Not windowed."
-  ></metric>
-  <metric
-    name="TCP_UTCL1_REQUEST" block=TCP event=47 descr="Total CLIENT_UTCL1 NORMAL requests"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_TRANSLATION_MISS" block=TCP event=48 descr="Total utcl1 translation misses"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_TRANSLATION_HIT" block=TCP event=49 descr="Total utcl1 translation hits"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_PERMISSION_MISS" block=TCP event=50 descr="Total utcl1 permission misses"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_STALL_INFLIGHT_MAX" block=TCP event=51 descr="Total utcl1 stalls due to inflight counter saturation"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_STALL_LRU_INFLIGHT" block=TCP event=52 descr="Total utcl1 stalls due to LRU cache line with traffic inflight"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_STALL_MULTI_MISS" block=TCP event=53 descr="Total utcl1 stalls due to arbitrated multiple misses"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_LFIFO_FULL" block=TCP event=54 descr="Total utcl1 utcl2 latency hiding fifo full cycles"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_STALL_LFIFO_NOT_RES" block=TCP event=55 descr="Total utcl1 stalls due to utcl2 latency hiding fifo output not resident"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_STALL_UTCL2_REQ_OUT_OF_CREDITS" block=TCP event=56 descr="Total utcl1 stalls due to utcl2_req out of credits"
-  ></metric>
-  <metric
-    name="TCP_CLIENT_UTCL1_INFLIGHT" block=TCP event=57 descr="The sum of inflight client to UTCL1 requests per cycle"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_UTCL2_INFLIGHT" block=TCP event=58 descr="The sum of inflight UTCL1_UTCL2 requests per cycle"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_STALL_MISSFIFO_FULL" block=TCP event=59 descr="Total utcl1 stalls due to full miss fifo"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_CACHE_ACCESSES" block=TCP event=60 descr="Count of total cache line (tag) accesses (includes hits and misses)."
-  ></metric>
-  <metric
-    name="TCP_TAGRAM0_REQ" block=TCP event=61 descr="Total L2 requests that mapped to tagram 0 from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TAGRAM1_REQ" block=TCP event=62 descr="Total L2 requests that mapped to tagram 1 from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TAGRAM2_REQ" block=TCP event=63 descr="Total L2 requests that mapped to tagram 2 from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TAGRAM3_REQ" block=TCP event=64 descr="Total L2 requests that mapped to tagram 3 from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCP_LATENCY" block=TCP event=65 descr="Total TCP wave latency (from first clock of wave entering to first clock of wave leaving), divide by TA_TCP_STATE_READ to avg wave latency"
-  ></metric>
-  <metric
-    name="TCP_TCC_READ_REQ_LATENCY" block=TCP event=66 descr="Total TCP->TCC request latency for reads and atomics with return. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_TCC_WRITE_REQ_LATENCY" block=TCP event=67 descr="Total TCP->TCC request latency for writes and atomics without return. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_TCC_WRITE_REQ_HOLE_LATENCY" block=TCP event=68 descr="Total TCP req ->TCC hole latency for writes and atomics. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_TCC_READ_REQ" block=TCP event=69 descr="Total read requests from TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_WRITE_REQ" block=TCP event=70 descr="Total write requests from TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_ATOMIC_WITH_RET_REQ" block=TCP event=71 descr="Total atomic with return requests from TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_ATOMIC_WITHOUT_RET_REQ" block=TCP event=72 descr="Total atomic without return requests from TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_LRU_REQ" block=TCP event=73 descr="Total requests with LRU L2 policy from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_STREAM_REQ" block=TCP event=74 descr="Total requests with STREAM L2 policy from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_NC_READ_REQ" block=TCP event=75 descr="Total read requests with NC mtype from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_NC_WRITE_REQ" block=TCP event=76 descr="Total write requests with NC mtype from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_NC_ATOMIC_REQ" block=TCP event=77 descr="Total atomic requests with NC mtype from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_UC_READ_REQ" block=TCP event=78 descr="Total read requests with UC mtype from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_UC_WRITE_REQ" block=TCP event=79 descr="Total write requests with UC mtype from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_UC_ATOMIC_REQ" block=TCP event=80 descr="Total atomic requests with UC mtype from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_CC_READ_REQ" block=TCP event=81 descr="Total write requests with CC mtype from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_CC_WRITE_REQ" block=TCP event=82 descr="Total write requests with CC mtype from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_CC_ATOMIC_REQ" block=TCP event=83 descr="Total atomic requests with CC mtype from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_DCC_REQ" block=TCP event=84 descr="Total DCC requests from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_RW_READ_REQ" block=TCP event=85 descr="Total write requests with RW mtype from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_RW_WRITE_REQ" block=TCP event=86 descr="Total write requests with RW mtype from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_RW_ATOMIC_REQ" block=TCP event=87 descr="Total atomic requests with RW mtype from this TCP to all TCCs"
-  ></metric>
-  # TD counters
-  <metric
-    name="TD_NONE" block=TD event=0 descr="Won't count anything."
-  ></metric>
-  <metric
-    name="TD_TD_BUSY" block=TD event=1 descr="TD is processing or waiting for data. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TD_INPUT_BUSY" block=TD event=2 descr="TD input subblock is busy or waiting for data. This means the instruction, state or TC data fifos may not be empty or the TD is processing a wave. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TD_OUTPUT_BUSY" block=TD event=3 descr="TD output subblock is busy or waiting for data. This means the TD's output pipeline (accumulation, data swizzle, data packing) could be processing pixel data. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TD_LERP_BUSY" block=TD event=4 descr="TD filter block is busy, which means any of the four lerps has pixel data flowing down its pipeline (blend, accumulation, format). Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TD_REG_SCLK_VLD" block=TD event=5 descr="Clock gate enable for GRBM register reads & writes. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TD_LOCAL_CG_DYN_SCLK_GRP0_EN" block=TD event=6 descr="Clock gate enable for group0 - non-harvestable always_on domain. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TD_LOCAL_CG_DYN_SCLK_GRP1_EN" block=TD event=7 descr="Clock gate enable for group1 - harvestable texture logic domain. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TD_LOCAL_CG_DYN_SCLK_GRP4_EN" block=TD event=8 descr="Clock gate enable for group4 - non-harvestable GDS chain domain. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TD_LOCAL_CG_DYN_SCLK_GRP5_EN" block=TD event=9 descr="Clock gate enable for group5 - non-harvestable texture boundary domain. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TD_TC_TD_FIFO_FULL" block=TD event=10 descr="TC_TD input FIFO is full. This counter could denote a stall in the TD pipeline, which could come from data cycling in the lerps or power throttling from the SMU."
-  ></metric>
-  <metric
-    name="TD_OUTPUT_FIFO_FULL" block=TD event=11 descr="TD output FIFO is full. This counter could denote a stall in the TD pipeline, possibly due to the GDS or PC/LDS."
-  ></metric>
-  <metric
-    name="TD_RESERVED_12" block=TD event=12 descr="RESERVED_12"
-  ></metric>
-  <metric
-    name="TD_RESERVED_13" block=TD event=13 descr="RESERVED_13"
-  ></metric>
-  <metric
-    name="TD_RESERVED_14" block=TD event=14 descr="RESERVED_14"
-  ></metric>
-  <metric
-    name="TD_TC_STALL" block=TD event=15 descr="TD is stalled waiting for TC data."
-  ></metric>
-  <metric
-    name="TD_PC_STALL" block=TD event=16 descr="TD is stalled by PC waiting to send LDS data."
-  ></metric>
-  <metric
-    name="TD_GDS_STALL" block=TD event=17 descr="TD is stalled by GDS data."
-  ></metric>
-  <metric
-    name="TD_RESERVED_18" block=TD event=18 descr="RESERVED_18"
-  ></metric>
-  <metric
-    name="TD_RESERVED_19" block=TD event=19 descr="RESERVED_19"
-  ></metric>
-  <metric
-    name="TD_GATHER4_WAVEFRONT" block=TD event=20 descr="Count the wavefronts with opcode = gather4, includes gather4_c."
-  ></metric>
-  <metric
-    name="TD_GATHER4H_WAVEFRONT" block=TD event=21 descr="Count the wavefronts with opcode = gather4h."
-  ></metric>
-  <metric
-    name="TD_GATHER4H_PACKED_WAVEFRONT" block=TD event=22 descr="Count the wavefronts with opcode = gather4h_packed."
-  ></metric>
-  <metric
-    name="TD_GATHER8H_PACKED_WAVEFRONT" block=TD event=23 descr="Count the wavefronts with opcode = gather8h_packed."
-  ></metric>
-  <metric
-    name="TD_SAMPLE_C_WAVEFRONT" block=TD event=24 descr="Count the wavefronts with opcode = sample_c, includes gather4_c."
-  ></metric>
-  <metric
-    name="TD_LOAD_WAVEFRONT" block=TD event=25 descr="Count the wavefronts with opcode = load, include atomics and store."
-  ></metric>
-  <metric
-    name="TD_ATOMIC_WAVEFRONT" block=TD event=26 descr="Count the wavefronts with opcode = atomic."
-  ></metric>
-  <metric
-    name="TD_STORE_WAVEFRONT" block=TD event=27 descr="Count the wavefronts with opcode = store."
-  ></metric>
-  <metric
-    name="TD_LDFPTR_WAVEFRONT" block=TD event=28 descr="Count the wavefronts with LDFPTR formats."
-  ></metric>
-  <metric
-    name="TD_D16_EN_WAVEFRONT" block=TD event=29 descr="Count the wavefronts that use d16 conversion"
-  ></metric>
-  <metric
-    name="TD_BYPASS_FILTER_WAVEFRONT" block=TD event=30 descr="Count the wavefronts that bypass the filter, includes bypass opcode or bypass formats."
-  ></metric>
-  <metric
-    name="TD_MIN_MAX_FILTER_WAVEFRONT" block=TD event=31 descr="Count the wavefronts that use min/max filtering."
-  ></metric>
-  <metric
-    name="TD_COALESCABLE_WAVEFRONT" block=TD event=32 descr="Count wavefronts that TA finds coalescable."
-  ></metric>
-  <metric
-    name="TD_COALESCED_PHASE" block=TD event=33 descr="Count up when each phase is coalesced, if all phases in a wavefront were coalesced the count will be 16."
-  ></metric>
-  <metric
-    name="TD_FOUR_PHASE_WAVEFRONT" block=TD event=34 descr="dmask=1,2,4,8, wavefront was packed into a 4 phase packet for SP."
-  ></metric>
-  <metric
-    name="TD_EIGHT_PHASE_WAVEFRONT" block=TD event=35 descr="dmask=3,5,6,9,a,c, wavefront was packed into an 8 phase packet for SP."
-  ></metric>
-  <metric
-    name="TD_SIXTEEN_PHASE_WAVEFRONT" block=TD event=36 descr="dmask=7,b,d,e,f, wavefront was forwarded to SP in 16 phases."
-  ></metric>
-  <metric
-    name="TD_FOUR_PHASE_FORWARD_WAVEFRONT" block=TD event=37 descr="Count the wavefronts that were forwarded to SP in 4 phases (coalescable)."
-  ></metric>
-  <metric
-    name="TD_WRITE_ACK_WAVEFRONT" block=TD event=38 descr="Count write acknowledgments, sent to SQ and not to SP."
-  ></metric>
-  <metric
-    name="TD_RESERVED_39" block=TD event=39 descr="RESERVED_39"
-  ></metric>
-  <metric
-    name="TD_USER_DEFINED_BORDER" block=TD event=40 descr="Count the wavefronts that user defined border color was used."
-  ></metric>
-  <metric
-    name="TD_WHITE_BORDER" block=TD event=41 descr="Count the wavefronts that white border color was used."
-  ></metric>
-  <metric
-    name="TD_OPAQUE_BLACK_BORDER" block=TD event=42 descr="Count the wavefronts that opaque black border color was used."
-  ></metric>
-  <metric
-    name="TD_RESERVED_43" block=TD event=43 descr="RESERVED_43"
-  ></metric>
-  <metric
-    name="TD_RESERVED_44" block=TD event=44 descr="RESERVED_44"
-  ></metric>
-  <metric
-    name="TD_NACK" block=TD event=45 descr="Count the number of times an nack packet was generated and sent to SP/SQ."
-  ></metric>
-  <metric
-    name="TD_TD_SP_TRAFFIC" block=TD event=46 descr="Count the number of times this TD sends data to the SP."
-  ></metric>
-  <metric
-    name="TD_CONSUME_GDS_TRAFFIC" block=TD event=47 descr="Count the number of times GDS data was consumed by this TD, send to SP."
-  ></metric>
-  <metric
-    name="TD_ADDRESSCMD_POISON" block=TD event=48 descr="Count the wavefronts that had poisoned address or command."
-  ></metric>
-  <metric
-    name="TD_DATA_POISON" block=TD event=49 descr="Count the wavefronts that had poisoned data."
-  ></metric>
-  <metric
-    name="TD_START_CYCLE_0" block=TD event=50 descr="Count the number of times there was a phase change in a wave and the starting cycle was 0. Starting cycle denotes how fast the TD can process the incoming sample (0 is fastest, 3 is slowest)."
-  ></metric>
-  <metric
-    name="TD_START_CYCLE_1" block=TD event=51 descr="Count the number of times there was a phase change in a wave and the starting cycle was 1. Starting cycle denotes how fast the TD can process the incoming sample (0 is fastest, 3 is slowest)."
-  ></metric>
-  <metric
-    name="TD_START_CYCLE_2" block=TD event=52 descr="Count the number of times there was a phase change in a wave and the starting cycle was 2. Starting cycle denotes how fast the TD can process the incoming sample (0 is fastest, 3 is slowest)."
-  ></metric>
-  <metric
-    name="TD_START_CYCLE_3" block=TD event=53 descr="Count the number of times there was a phase change in a wave and the starting cycle was 3. Starting cycle denotes how fast the TD can process the incoming sample (0 is fastest, 3 is slowest)."
-  ></metric>
-  <metric
-    name="TD_NULL_CYCLE_OUTPUT" block=TD event=54 descr="Count the number of times that null cycles had occured at the output stage"
-  ></metric>
-  <metric
-    name="TD_D16_DATA_PACKED" block=TD event=55 descr="Count the number of times the TD packs 2 sets of d16 data into 1 32-bit container"
-  ></metric>
-  <metric
-    name="TD_TEXELS_ZEROED_OUT_BY_BLEND_ZERO_PRT" block=TD event=56 descr="Count the number of times a texel was zeroed out due to the blend zero prt feature"
-  ></metric>
-  # GRBM_SE counters
-  <metric
-    name="GRBM_SE_COUNT" block=GRBM_SE event=0 descr="Tie High - Count Number of Clocks"
-  ></metric>
-  <metric
-    name="GRBM_SE_USER_DEFINED" block=GRBM_SE event=1 descr="User defined performance select."
-  ></metric>
-  <metric
-    name="GRBM_SE_CB_BUSY" block=GRBM_SE event=2 descr="Any of the Color Blocks (CB) are busy in shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_DB_BUSY" block=GRBM_SE event=3 descr="Any of the Depth Blocks (DB) are busy in shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_SC_BUSY" block=GRBM_SE event=4 descr="Any of the Scan Converter Blocks (SC) are busy in shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_RESERVED_1" block=GRBM_SE event=5 descr="Reserved to maintain backwards compatibility."
-  ></metric>
-  <metric
-    name="GRBM_SE_SPI_BUSY" block=GRBM_SE event=6 descr="Any of the Shader Pipe Interpolators (SPI) are busy in shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_SX_BUSY" block=GRBM_SE event=7 descr="Any of the Shader Export Blocks (SX) are busy for shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_TA_BUSY" block=GRBM_SE event=8 descr="Any of the Texture Pipes (TA) are busy in shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_CB_CLEAN" block=GRBM_SE event=9 descr="Any of the Color Blocks (CB) are not clean in shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_DB_CLEAN" block=GRBM_SE event=10 descr="Any of the Depth Blocks (DB) are not clean in shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_RESERVED_0" block=GRBM_SE event=11 descr="Reserved to maintain backwards compatibility."
-  ></metric>
-  <metric
-    name="GRBM_SE_PA_BUSY" block=GRBM_SE event=12 descr="The Primitive Assembly Block (PA) is busy in shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_VGT_BUSY" block=GRBM_SE event=13 descr="The Vertex Geometry Tessellator Block (VGT) is busy in shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_BCI_BUSY" block=GRBM_SE event=14 descr="Any of the Barycentric Interpolators (BCI) are busy in shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_RMI_BUSY" block=GRBM_SE event=15 descr="Any of the Render Backend Memory Interface (RMI) are busy in shader engine 0."
-  ></metric>
-  # SDMA counters
-  <metric
-    name="SDMA_CYCLE" block=SDMA event=0 descr="Cycle count"
-  ></metric>
-  <metric
-    name="SDMA_IDLE" block=SDMA event=1 descr="Cycle count of SDMA idle"
-  ></metric>
-  <metric
-    name="SDMA_REG_IDLE" block=SDMA event=2 descr="Cycle count of register unit idle"
-  ></metric>
-  <metric
-    name="SDMA_RB_EMPTY" block=SDMA event=3 descr="Cycle count of ring buffer empty"
-  ></metric>
-  <metric
-    name="SDMA_RB_FULL" block=SDMA event=4 descr="Cycle count of ring buffer full"
-  ></metric>
-  <metric
-    name="SDMA_RB_WPTR_WRAP" block=SDMA event=5 descr="Number of ring buffer write pointer wraps"
-  ></metric>
-  <metric
-    name="SDMA_RB_RPTR_WRAP" block=SDMA event=6 descr="Number of ring buffer read pointer wraps"
-  ></metric>
-  <metric
-    name="SDMA_RB_WPTR_POLL_READ" block=SDMA event=7 descr="Number of ring buffer write pointer polling memory reads"
-  ></metric>
-  <metric
-    name="SDMA_RB_RPTR_WB" block=SDMA event=8 descr="Number of ring buffer read pointer writebacks"
-  ></metric>
-  <metric
-    name="SDMA_RB_CMD_IDLE" block=SDMA event=9 descr="Cycle count of ring command buffer unit idle"
-  ></metric>
-  <metric
-    name="SDMA_RB_CMD_FULL" block=SDMA event=10 descr="Cycle count of ring command packet buffer full"
-  ></metric>
-  <metric
-    name="SDMA_IB_CMD_IDLE" block=SDMA event=11 descr="Cycle count of indirect command packet buffer unit idle"
-  ></metric>
-  <metric
-    name="SDMA_IB_CMD_FULL" block=SDMA event=12 descr="Cycle count of indirect command packet buffer full"
-  ></metric>
-  <metric
-    name="SDMA_EX_IDLE" block=SDMA event=13 descr="Cycle count of execution unit idle"
-  ></metric>
-  <metric
-    name="SDMA_SRBM_REG_SEND" block=SDMA event=14 descr=""
-  ></metric>
-  <metric
-    name="SDMA_EX_IDLE_POLL_TIMER_EXPIRE" block=SDMA event=15 descr="Cycle count of poll on idle timer expire"
-  ></metric>
-  <metric
-    name="SDMA_MC_WR_IDLE" block=SDMA event=16 descr="Cycle count of memory write unit idle"
-  ></metric>
-  <metric
-    name="SDMA_MC_WR_COUNT" block=SDMA event=17 descr="Number of memory write requests issued"
-  ></metric>
-  <metric
-    name="SDMA_MC_RD_IDLE" block=SDMA event=18 descr="Cycle count of memory read unit idle"
-  ></metric>
-  <metric
-    name="SDMA_MC_RD_COUNT" block=SDMA event=19 descr="Number of memory read requests issued"
-  ></metric>
-  <metric
-    name="SDMA_MC_RD_RET_STALL" block=SDMA event=20 descr="Cycle count of read request stalled by MC pending return data"
-  ></metric>
-  <metric
-    name="SDMA_MC_RD_NO_POLL_IDLE" block=SDMA event=21 descr="Cycle count of memory read unit idle excluding WPTR poll-on-idle activity"
-  ></metric>
-  <metric
-    name="SDMA_DRM_IDLE" block=SDMA event=22 descr="Cycle count of drm interface unit idle"
-  ></metric>
-  <metric
-    name="SDMA_DRM_REQ_STALL" block=SDMA event=23 descr="Cycle count of drm clientport request stalled by DRM"
-  ></metric>
-  <metric
-    name="SDMA_SEM_IDLE" block=SDMA event=24 descr="Cycle count of sem interface unit idle"
-  ></metric>
-  <metric
-    name="SDMA_SEM_REQ_STALL" block=SDMA event=25 descr="Cycle count of sem request stalled by SEM"
-  ></metric>
-  <metric
-    name="SDMA_SEM_REQ_COUNT" block=SDMA event=26 descr="Number of sem requests issued"
-  ></metric>
-  <metric
-    name="SDMA_SEM_RESP_INCOMPLETE" block=SDMA event=27 descr="Number of sem response with status incomplete"
-  ></metric>
-  <metric
-    name="SDMA_SEM_RESP_FAIL" block=SDMA event=28 descr="Number of sem response with status fail"
-  ></metric>
-  <metric
-    name="SDMA_SEM_RESP_PASS" block=SDMA event=29 descr="Number of sem response with status pass"
-  ></metric>
-  <metric
-    name="SDMA_INT_IDLE" block=SDMA event=30 descr="Cycle count of interrupt interface unit idle"
-  ></metric>
-  <metric
-    name="SDMA_INT_REQ_STALL" block=SDMA event=31 descr="Cycle count of interrupt request stalled by IH/RLC"
-  ></metric>
-  <metric
-    name="SDMA_INT_REQ_COUNT" block=SDMA event=32 descr="Number of interrupt requests issued"
-  ></metric>
-  <metric
-    name="SDMA_INT_RESP_ACCEPTED" block=SDMA event=33 descr="Number of interrupt response with status accepted"
-  ></metric>
-  <metric
-    name="SDMA_INT_RESP_RETRY" block=SDMA event=34 descr="Number of interrupt response with status retry"
-  ></metric>
-  <metric
-    name="SDMA_NUM_PACKET" block=SDMA event=35 descr="Number of packets processed in command parser"
-  ></metric>
-  <metric
-    name="SDMA_DRM1_REQ_STALL" block=SDMA event=36 descr="Cycle count of drm1 clientport request stalled by DRM"
-  ></metric>
-  <metric
-    name="SDMA_CE_WREQ_IDLE" block=SDMA event=37 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_WR_IDLE" block=SDMA event=38 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_SPLIT_IDLE" block=SDMA event=39 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_RREQ_IDLE" block=SDMA event=40 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_OUT_IDLE" block=SDMA event=41 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_IN_IDLE" block=SDMA event=42 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_DST_IDLE" block=SDMA event=43 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_DRM_IDLE" block=SDMA event=44 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_DRM1_IDLE" block=SDMA event=45 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_AFIFO_FULL" block=SDMA event=46 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_DRM_FULL" block=SDMA event=47 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_DRM1_FULL" block=SDMA event=48 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_INFO_FULL" block=SDMA event=49 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_INFO1_FULL" block=SDMA event=50 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_RD_STALL" block=SDMA event=51 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_WR_STALL" block=SDMA event=52 descr=""
-  ></metric>
-  <metric
-    name="SDMA_GFX_SELECT" block=SDMA event=53 descr=""
-  ></metric>
-  <metric
-    name="SDMA_RLC0_SELECT" block=SDMA event=54 descr=""
-  ></metric>
-  <metric
-    name="SDMA_RLC1_SELECT" block=SDMA event=55 descr=""
-  ></metric>
-  <metric
-    name="SDMA_PAGE_SELECT" block=SDMA event=56 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CTX_CHANGE" block=SDMA event=57 descr="Time of auto ctx switch"
-  ></metric>
-  <metric
-    name="SDMA_CTX_CHANGE_EXPIRED" block=SDMA event=58 descr="Time of auto ctx switch due to time quantum reached"
-  ></metric>
-  <metric
-    name="SDMA_CTX_CHANGE_EXCEPTION" block=SDMA event=59 descr="Time of auto ctx switch due to exception"
-  ></metric>
-  <metric
-    name="SDMA_DOORBELL" block=SDMA event=60 descr="Time of gfx and rlc0 and rlc1 wptr updated by doorbell"
-  ></metric>
-  <metric
-    name="SDMA_RD_BA_RTR" block=SDMA event=61 descr="read bandwidth agitator indication"
-  ></metric>
-  <metric
-    name="SDMA_WR_BA_RTR" block=SDMA event=62 descr="write bandwidth agitator indication"
-  ></metric>
-  <metric
-    name="SDMA_F32_L1_WR_VLD" block=SDMA event=63 descr="F32 write data valid"
-  ></metric>
-  <metric
-    name="SDMA_CE_L1_WR_VLD" block=SDMA event=64 descr="CE write data valid to L1"
-  ></metric>
-  <metric
-    name="SDMA_CE_L1_STALL" block=SDMA event=65 descr="Read stall from CE to L1"
-  ></metric>
-  <metric
-    name="SDMA_SDMA_INVACK_NFLUSH" block=SDMA event=66 descr="Non-flushtype invalid ack from SDMA to ATCL2"
-  ></metric>
-  <metric
-    name="SDMA_SDMA_INVACK_FLUSH" block=SDMA event=67 descr="Flushtype invalid ack from SDMA to ATCL2"
-  ></metric>
-  <metric
-    name="SDMA_ATCL2_INVREQ_NFLUSH" block=SDMA event=68 descr="Non-flushtype invalid request from ATCL2 to SDMA"
-  ></metric>
-  <metric
-    name="SDMA_ATCL2_INVREQ_FLUSH" block=SDMA event=69 descr="Flushtype invalid request from ATCL2 to SDMA"
-  ></metric>
-  <metric
-    name="SDMA_ATCL2_RET_XNACK" block=SDMA event=70 descr="ATCL2 return non-zero XNACK"
-  ></metric>
-  <metric
-    name="SDMA_ATCL2_RET_ACK" block=SDMA event=71 descr="ATCL2 return zero XNACK"
-  ></metric>
-  <metric
-    name="SDMA_ATCL2_FREE" block=SDMA event=72 descr="ATCL2 return free to SDMA_L1"
-  ></metric>
-  <metric
-    name="SDMA_SDMA_ATCL2_SEND" block=SDMA event=73 descr="SDMA send page request to ATCL2"
-  ></metric>
-  <metric
-    name="SDMA_DMA_L1_WR_SEND" block=SDMA event=74 descr="Internal write request to L1"
-  ></metric>
-  <metric
-    name="SDMA_DMA_L1_RD_SEND" block=SDMA event=75 descr="Internal read request to L1"
-  ></metric>
-  <metric
-    name="SDMA_DMA_MC_WR_SEND" block=SDMA event=76 descr="L1 send write request to MC"
-  ></metric>
-  <metric
-    name="SDMA_DMA_MC_RD_SEND" block=SDMA event=77 descr="L2 send read request to MC"
-  ></metric>
-  <metric
-    name="SDMA_L1_WR_FIFO_IDLE" block=SDMA event=78 descr="L1 internal write FIFO empty"
-  ></metric>
-  <metric
-    name="SDMA_L1_RD_FIFO_IDLE" block=SDMA event=79 descr="L1 internal read FIFO empty"
-  ></metric>
-  <metric
-    name="SDMA_L1_WRL2_IDLE" block=SDMA event=80 descr="All write page requests to L2 are returned"
-  ></metric>
-  <metric
-    name="SDMA_L1_RDL2_IDLE" block=SDMA event=81 descr="All read page requests to L2 are returned"
-  ></metric>
-  <metric
-    name="SDMA_L1_WRMC_IDLE" block=SDMA event=82 descr="All write data requests to MC are returned"
-  ></metric>
-  <metric
-    name="SDMA_L1_RDMC_IDLE" block=SDMA event=83 descr="All read data requests to MC are returned"
-  ></metric>
-  <metric
-    name="SDMA_L1_WR_INV_IDLE" block=SDMA event=84 descr="Write client invalidation idle"
-  ></metric>
-  <metric
-    name="SDMA_L1_RD_INV_IDLE" block=SDMA event=85 descr="Read client invalidation idle"
-  ></metric>
-  <metric
-    name="SDMA_L1_WR_INV_EN" block=SDMA event=86 descr="Write client is in invalidation process"
-  ></metric>
-  <metric
-    name="SDMA_L1_RD_INV_EN" block=SDMA event=87 descr="Read client is in invalidation process"
-  ></metric>
-  <metric
-    name="SDMA_L1_WR_WAIT_INVADR" block=SDMA event=88 descr="Write client is waiting for invalidated page address"
-  ></metric>
-  <metric
-    name="SDMA_L1_RD_WAIT_INVADR" block=SDMA event=89 descr="Read client is waiting for invalidated page address"
-  ></metric>
-  <metric
-    name="SDMA_IS_INVREQ_ADDR_WR" block=SDMA event=90 descr="Write client is using the returned page address which is invalidated"
-  ></metric>
-  <metric
-    name="SDMA_IS_INVREQ_ADDR_RD" block=SDMA event=91 descr="Read client is using the returned page address which is invalidated"
-  ></metric>
-  <metric
-    name="SDMA_L1_WR_XNACK_TIMEOUT" block=SDMA event=92 descr="Write client received continuous xnacks which reaches the limit"
-  ></metric>
-  <metric
-    name="SDMA_L1_RD_XNACK_TIMEOUT" block=SDMA event=93 descr="Read client received continuous xnacks which reaches the limit"
-  ></metric>
-  <metric
-    name="SDMA_L1_INV_MIDDLE" block=SDMA event=94 descr="Invalidation happens for one page when one client is using that page and the other client is waiting for that page"
-  ></metric>
-  <metric
-    name="SDMA_UTCL1_TAG_DELAY_COUNTER" block=SDMA event=95 descr="Counts UTCL1 request latency between request sent and all return back."
-  ></metric>
-  <metric
-    name="SDMA_MMHUB_TAG_DELAY_COUNTER" block=SDMA event=96 descr="Counts MC read/write latency between request sent and all return back. This is the default"
-  ></metric>
-  # ATCL2 counters
-  <metric
-    name="ATCL2_NUMBER_OF_L1_REQUESTS" block=ATCL2 event=1 descr="number of L1 requests"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_BANK0_REQUESTS" block=ATCL2 event=2 descr="number of bank0 requests"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_BANK0_HITS" block=ATCL2 event=3 descr="number of bank0 hits"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_BANK0_MISSES" block=ATCL2 event=4 descr="number of bank0 misses"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_ATS_REQUESTS" block=ATCL2 event=5 descr="number of ATS Requests"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_ATS_RESPONSES" block=ATCL2 event=6 descr="number of ATS Responses"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_INVALIDATE_REQUEST" block=ATCL2 event=7 descr="number of invalidate request"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_FLUSHTYPE_INVALIDATE_REQUEST" block=ATCL2 event=8 descr="number of flushtype invalidate request"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_L1_RT_CACHE_REQUESTS" block=ATCL2 event=9 descr="number of L1 RT cache requests"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_RT_CACHE_BANK0_REQUESTS" block=ATCL2 event=10 descr="number of RT cache bank0 requests"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_RT_CACHE_BANK0_HITS" block=ATCL2 event=11 descr="number of RT cache bank0 hits"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_RT_CACHE_BANK0_MISSES" block=ATCL2 event=12 descr="number of RT cache bank0 misses"
-  ></metric>
-  # MCVML2 counters
-  <metric
-    name="MCVML2_BANK0_PTE_CACHE_BIGK0_REQUEST" block=MCVML2 event=1 descr="bank0 pte cache bigk0 request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_PTE_CACHE_BIGK0_HIT" block=MCVML2 event=2 descr="bank0 pte cache bigk0 hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_PTE_CACHE_BIGK0_MISS" block=MCVML2 event=3 descr="bank0 pte cache bigk0 miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_PTE_CACHE_BIGK0_UPDATE" block=MCVML2 event=4 descr="bank0 pte cache bigk0 update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_PTE_CACHE_4K0_REQUEST" block=MCVML2 event=5 descr="bank0 pte cache 4k0 request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_PTE_CACHE_4K0_HIT" block=MCVML2 event=6 descr="bank0 pte cache 4k0 hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_PTE_CACHE_4K0_MISS" block=MCVML2 event=7 descr="bank0 pte cache 4k0 miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_PTE_CACHE_4K0_UPDATE" block=MCVML2 event=8 descr="bank0 pte cache 4k0 update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_AGGREGATE_REQUEST" block=MCVML2 event=9 descr="bank0 aggregate request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_AGGREGATE_HIT" block=MCVML2 event=10 descr="bank0 aggregate hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_AGGREGATE_MISS" block=MCVML2 event=11 descr="bank0 aggregate miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_AGGREGATE_UPDATE" block=MCVML2 event=12 descr="bank0 aggregate update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_PTE_CACHE_BIGK0_REQUEST" block=MCVML2 event=13 descr="bank1 pte cache bigk0 request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_PTE_CACHE_BIGK0_HIT" block=MCVML2 event=14 descr="bank1 pte cache bigk0 hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_PTE_CACHE_BIGK0_MISS" block=MCVML2 event=15 descr="bank1 pte cache bigk0 miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_PTE_CACHE_BIGK0_UPDATE" block=MCVML2 event=16 descr="bank1 pte cache bigk0 update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_PTE_CACHE_4K0_REQUEST" block=MCVML2 event=17 descr="bank1 pte cache 4k0 request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_PTE_CACHE_4K0_HIT" block=MCVML2 event=18 descr="bank1 pte cache 4k0 hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_PTE_CACHE_4K0_MISS" block=MCVML2 event=19 descr="bank1 pte cache 4k0 miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_PTE_CACHE_4K0_UPDATE" block=MCVML2 event=20 descr="bank1 pte cache 4k0 update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_AGGREGATE_REQUEST" block=MCVML2 event=21 descr="bank1 aggregate request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_AGGREGATE_HIT" block=MCVML2 event=22 descr="bank1 aggregate hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_AGGREGATE_MISS" block=MCVML2 event=23 descr="bank1 aggregate miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_AGGREGATE_UPDATE" block=MCVML2 event=24 descr="bank1 aggregate update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_PTE_CACHE_BIGK0_REQUEST" block=MCVML2 event=25 descr="bank2 pte cache bigk0 request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_PTE_CACHE_BIGK0_HIT" block=MCVML2 event=26 descr="bank2 pte cache bigk0 hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_PTE_CACHE_BIGK0_MISS" block=MCVML2 event=27 descr="bank2 pte cache bigk0 miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_PTE_CACHE_BIGK0_UPDATE" block=MCVML2 event=28 descr="bank2 pte cache bigk0 update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_PTE_CACHE_4K0_REQUEST" block=MCVML2 event=29 descr="bank2 pte cache 4k0 request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_PTE_CACHE_4K0_HIT" block=MCVML2 event=30 descr="bank2 pte cache 4k0 hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_PTE_CACHE_4K0_MISS" block=MCVML2 event=31 descr="bank2 pte cache 4k0 miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_PTE_CACHE_4K0_UPDATE" block=MCVML2 event=32 descr="bank2 pte cache 4k0 update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_AGGREGATE_REQUEST" block=MCVML2 event=33 descr="bank2 aggregate request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_AGGREGATE_HIT" block=MCVML2 event=34 descr="bank2 aggregate hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_AGGREGATE_MISS" block=MCVML2 event=35 descr="bank2 aggregate miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_AGGREGATE_UPDATE" block=MCVML2 event=36 descr="bank2 aggregate update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_PTE_CACHE_BIGK0_REQUEST" block=MCVML2 event=37 descr="bank3 pte cache bigk0 request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_PTE_CACHE_BIGK0_HIT" block=MCVML2 event=38 descr="bank3 pte cache bigk0 hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_PTE_CACHE_BIGK0_MISS" block=MCVML2 event=39 descr="bank3 pte cache bigk0 miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_PTE_CACHE_BIGK0_UPDATE" block=MCVML2 event=40 descr="bank3 pte cache bigk0 update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_PTE_CACHE_4K0_REQUEST" block=MCVML2 event=41 descr="bank3 pte cache 4k0 request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_PTE_CACHE_4K0_HIT" block=MCVML2 event=42 descr="bank3 pte cache 4k0 hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_PTE_CACHE_4K0_MISS" block=MCVML2 event=43 descr="bank3 pte cache 4k0 miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_PTE_CACHE_4K0_UPDATE" block=MCVML2 event=44 descr="bank3 pte cache 4k0 update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_AGGREGATE_REQUEST" block=MCVML2 event=45 descr="bank3 aggregate request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_AGGREGATE_HIT" block=MCVML2 event=46 descr="bank3 aggregate hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_AGGREGATE_MISS" block=MCVML2 event=47 descr="bank3 aggregate miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_AGGREGATE_UPDATE" block=MCVML2 event=48 descr="bank3 aggregate update"
-  ></metric>
-  <metric
-    name="MCVML2_RETRY" block=MCVML2 event=49 descr="retry"
-  ></metric>
-  <metric
-    name="MCVML2_NO_RETRY" block=MCVML2 event=50 descr="no retry"
-  ></metric>
-  <metric
-    name="MCVML2_INTERRUPT" block=MCVML2 event=51 descr="interrupt"
-  ></metric>
-  <metric
-    name="MCVML2_PDE0_CACHE_REQUEST" block=MCVML2 event=52 descr="pde0 cache request"
-  ></metric>
-  <metric
-    name="MCVML2_PDE0_CACHE_HIT" block=MCVML2 event=53 descr="pde0 cache hit"
-  ></metric>
-  <metric
-    name="MCVML2_PDE0_CACHE_MISS" block=MCVML2 event=54 descr="pde0 cache miss"
-  ></metric>
-  <metric
-    name="MCVML2_PDE0_CACHE_UPDATE" block=MCVML2 event=55 descr="pde0 cache update"
-  ></metric>
-  <metric
-    name="MCVML2_PDE0_CACHE_PTE" block=MCVML2 event=56 descr="pde0 cache pte"
-  ></metric>
-  <metric
-    name="MCVML2_PDE1_CACHE_REQUEST" block=MCVML2 event=57 descr="pde1 cache request"
-  ></metric>
-  <metric
-    name="MCVML2_PDE1_CACHE_HIT" block=MCVML2 event=58 descr="pde1 cache hit"
-  ></metric>
-  <metric
-    name="MCVML2_PDE1_CACHE_MISS" block=MCVML2 event=59 descr="pde1 cache miss"
-  ></metric>
-  <metric
-    name="MCVML2_PDE1_CACHE_UPDATE" block=MCVML2 event=60 descr="pde1 cache update"
-  ></metric>
-  <metric
-    name="MCVML2_PDE1_CACHE_PTE" block=MCVML2 event=61 descr="pde1 cache pte"
-  ></metric>
-  <metric
-    name="MCVML2_PDE2_CACHE_REQUEST" block=MCVML2 event=62 descr="pde2 cache request"
-  ></metric>
-  <metric
-    name="MCVML2_PDE2_CACHE_HIT" block=MCVML2 event=63 descr="pde2 cache hit"
-  ></metric>
-  <metric
-    name="MCVML2_PDE2_CACHE_MISS" block=MCVML2 event=64 descr="pde2 cache miss"
-  ></metric>
-  <metric
-    name="MCVML2_PDE2_CACHE_UPDATE" block=MCVML2 event=65 descr="pde2 cache update"
-  ></metric>
-  <metric
-    name="MCVML2_PDE2_CACHE_PTE" block=MCVML2 event=66 descr="pde2 cache pte"
-  ></metric>
-  <metric
-    name="MCVML2_LOG_INVAL" block=MCVML2 event=67 descr="log inval"
-  ></metric>
-  <metric
-    name="MCVML2_LOG_TRANS" block=MCVML2 event=68 descr="log trans"
-  ></metric>
-  <metric
-    name="MCVML2_LOG_TRANS_SKIPPED" block=MCVML2 event=69 descr="log trans skipped"
-  ></metric>
-  <metric
-    name="MCVML2_RDIF_REQUEST_PHYSICAL_SYSTEM" block=MCVML2 event=70 descr="rdif request physical system"
-  ></metric>
-  <metric
-    name="MCVML2_RDIF_REQUEST_PHYSICAL_SYSTEM_START_LATENCY" block=MCVML2 event=71 descr="rdif request physical system start (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_RDIF_REQUEST_PHYSICAL_SYSTEM_STOP_LATENCY" block=MCVML2 event=72 descr="rdif request physical system stop (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_RDIF_REQUEST_OTHER" block=MCVML2 event=73 descr="rdif request other"
-  ></metric>
-  <metric
-    name="MCVML2_RDIF_REQUEST_OTHER_START_LATENCY" block=MCVML2 event=74 descr="rdif request other start (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_RDIF_REQUEST_OTHER_STOP_LATENCY" block=MCVML2 event=75 descr="rdif request other stop (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_QOS_REQUEST" block=MCVML2 event=76 descr="qos request"
-  ></metric>
-  <metric
-    name="MCVML2_QOS_HIT_FETCH_SKIPPED" block=MCVML2 event=77 descr="qos hit (fetch skipped)"
-  ></metric>
-  <metric
-    name="MCVML2_QOS_MISS_FETCH_ISSUED" block=MCVML2 event=78 descr="qos miss (fetch issued)"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL0_REQUEST" block=MCVML2 event=79 descr="level0 request"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL1_REQUEST" block=MCVML2 event=80 descr="level1 request"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL2_REQUEST" block=MCVML2 event=81 descr="level2 request"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL3_REQUEST" block=MCVML2 event=82 descr="level3 request"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL0_REQUEST_START_LATENCY" block=MCVML2 event=83 descr="level0 request start (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL0_REQUEST_STOP_LATENCY" block=MCVML2 event=84 descr="level0 request stop (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL1_REQUEST_START_LATENCY" block=MCVML2 event=85 descr="level1 request start (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL1_REQUEST_STOP_LATENCY" block=MCVML2 event=86 descr="level1 request stop (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL2_REQUEST_START_LATENCY" block=MCVML2 event=87 descr="level2 request start (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL2_REQUEST_STOP_LATENCY" block=MCVML2 event=88 descr="level2 request stop (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL3_REQUEST_START_LATENCY" block=MCVML2 event=89 descr="level3 request start (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL3_REQUEST_STOP_LATENCY" block=MCVML2 event=90 descr="level3 request stop (latency)"
-  ></metric>
-  # ATC counters
-  <metric
-    name="ATC_A_VALUE_OF_0_MEANS_COUNT_CYCLES_OTHERWISE_SELECTS" block=ATC event=0 descr="A value of 0 means count cycles otherwise selects event to count "
-  ></metric>
-  <metric
-    name="ATC_EVENT_START_FOR_STATISTICAL_MIN_SCLKS_FROM_ATC_RPB_REQ_TRANSLATION" block=ATC event=1 descr="event start for statistical min sclks from ATC_RPB_req translation request to RPB_ATC_ret completion"
-  ></metric>
-  <metric
-    name="ATC_EVENT_END_FOR_STATISTICAL_MIN_SCLKS_FROM_ATC_RPB_REQ_TRANSLATION" block=ATC event=2 descr="event end for statistical min sclks from ATC_RPB_req translation request to RPB_ATC_ret completion"
-  ></metric>
-  <metric
-    name="ATC_EVENT_START_FOR_STATISTICAL_MIN_SCLKS_FROM_ATC_RPB_REQ_PAGE" block=ATC event=3 descr="event start for statistical min sclks from ATC_RPB_req page request to RPB_ATC_ret page return"
-  ></metric>
-  <metric
-    name="ATC_EVENT_END_FOR_STATISTICAL_MIN_SCLKS_FROM_ATC_RPB_REQ_PAGE" block=ATC event=4 descr="event end for statistical min sclks from ATC_RPB_req page request to RPB_ATC_ret page return"
-  ></metric>
-  <metric
-    name="ATC_EVENT_START_FOR_STATISTICAL_MAX_SCLKS_FROM_ATC_RPB_REQ_TRANSLATION" block=ATC event=5 descr="event start for statistical max sclks from ATC_RPB_req translation request to RPB_ATC_ret completion"
-  ></metric>
-  <metric
-    name="ATC_EVENT_END_FOR_STATISTICAL_MAX_SCLKS_FROM_ATC_RPB_REQ_TRANSLATION" block=ATC event=6 descr="event end for statistical max sclks from ATC_RPB_req translation request to RPB_ATC_ret completion"
-  ></metric>
-  <metric
-    name="ATC_EVENT_START_FOR_STATISTICAL_MAX_SCLKS_FROM_ATC_RPB_REQ_PAGE" block=ATC event=7 descr="event start for statistical max sclks from ATC_RPB_req page request to RPB_ATC_ret page return"
-  ></metric>
-  <metric
-    name="ATC_EVENT_END_FOR_STATISTICAL_MAX_SCLKS_FROM_ATC_RPB_REQ_PAGE" block=ATC event=8 descr="event end for statistical max sclks from ATC_RPB_req page request to RPB_ATC_ret page return"
-  ></metric>
-  <metric
-    name="ATC_EVENT_START_FOR_MAX_SCLKS_FROM_ATS_L2_INVALIDATE_REQUEST" block=ATC event=9 descr="event start for max sclks from ATS_L2 invalidate request to L2_ATS invalidate ack"
-  ></metric>
-  <metric
-    name="ATC_EVENT_END_FOR_MAX_SCLKS_FROM_ATS_L2_INVALIDATE_REQUEST" block=ATC event=10 descr="event end for max sclks from ATS_L2 invalidate request to L2_ATS invalidate ack"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_REQUESTS_FROM_L2" block=ATC event=11 descr="number of requests from L2"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_FIRST_TIME_TRANS_SUCCESSES" block=ATC event=12 descr="number of first time trans successes"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_PRI_REQUESTS" block=ATC event=13 descr="number of pri requests"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_TRANS_FAILURES" block=ATC event=14 descr="number of trans failures"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_PRI_REQUESTS_NOT_SATISFIED" block=ATC event=15 descr="number of pri requests not satisfied"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_INVALIDATE_REQUESTS_W_PASID_TO_GET_A" block=ATC event=16 descr="number of invalidate requests w PASID to get a correct number"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_INVALIDATE_REQUESTS_W_OUT_PASID" block=ATC event=17 descr="number of invalidate requests w out PASID"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_PASID_CHANGES" block=ATC event=18 descr="number of PASID changes"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_TIMES_1_TRANSLATIONS_RETURNED" block=ATC event=19 descr="number of times 1 translations returned"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_TIMES_2_8_TRANSLATIONS_RETURNED_NOT_BLOCKED" block=ATC event=20 descr="number of times 2 8 translations returned not blocked by invalidations"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_TIMES_5_8_TRANSLATIONS_RETURNED_NOT_BLOCKED" block=ATC event=21 descr="number of times 5 8 translations returned not blocked by invalidations"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_TIMES_SIZE_BIT_WAS_SET_ON_NON" block=ATC event=22 descr="number of times size bit was set on non speculative transactions returned to L2 (>4K translation was returned)"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_INVALIDATE_REQUESTS_THAT_MATCHED_MULTIPLE_VMIDS_EVENT" block=ATC event=23 descr="number of invalidate requests that matched multiple vmids event"
-  ></metric>
-</gfx908>
diff --git a/src/perfmon_pub/gfx90a_metrics.xml b/src/perfmon_pub/gfx90a_metrics.xml
deleted file mode 100644
index eb06f2b14d..0000000000
--- a/src/perfmon_pub/gfx90a_metrics.xml
+++ /dev/null
@@ -1,5587 +0,0 @@
-<gfx90a>
-  # CPC counters
-  <metric
-    name="CPC_ALWAYS_COUNT" block=CPC event=0 descr="Always Count."
-  ></metric>
-  <metric
-    name="CPC_RCIU_STALL_WAIT_ON_FREE" block=CPC event=1 descr="RCIU Stall Waiting on Free."
-  ></metric>
-  <metric
-    name="CPC_RCIU_STALL_PRIV_VIOLATION" block=CPC event=2 descr="RCIU Stall on Priv violation."
-  ></metric>
-  <metric
-    name="CPC_MIU_STALL_ON_RDREQ_FREE" block=CPC event=3 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPC_MIU_STALL_ON_WRREQ_FREE" block=CPC event=4 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPC_TCIU_STALL_WAIT_ON_FREE" block=CPC event=5 descr="TCIU Stall waiting for free."
-  ></metric>
-  <metric
-    name="CPC_ME1_STALL_WAIT_ON_RCIU_READY" block=CPC event=6 descr="Me1 stall waiting on RCIU Ready."
-  ></metric>
-  <metric
-    name="CPC_ME1_STALL_WAIT_ON_RCIU_READY_PERF" block=CPC event=7 descr="Me1 stall waiting on RCIU Ready Perf."
-  ></metric>
-  <metric
-    name="CPC_ME1_STALL_WAIT_ON_RCIU_READ" block=CPC event=8 descr="Me1 stall waiting on RCIU read."
-  ></metric>
-  <metric
-    name="CPC_ME1_STALL_WAIT_ON_MIU_READ" block=CPC event=9 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPC_ME1_STALL_WAIT_ON_MIU_WRITE" block=CPC event=10 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPC_ME1_STALL_ON_DATA_FROM_ROQ" block=CPC event=11 descr="Me1 stall on data from roq."
-  ></metric>
-  <metric
-    name="CPC_ME1_STALL_ON_DATA_FROM_ROQ_PERF" block=CPC event=12 descr="Me1 stall on data from roq Perf."
-  ></metric>
-  <metric
-    name="CPC_ME1_BUSY_FOR_PACKET_DECODE" block=CPC event=13 descr="Me1 busy for packet decode."
-  ></metric>
-  <metric
-    name="CPC_ME2_STALL_WAIT_ON_RCIU_READY" block=CPC event=14 descr="Me2 stall waiting on RCIU Ready. (Valid Only if ME2 is available"
-  ></metric>
-  <metric
-    name="CPC_ME2_STALL_WAIT_ON_RCIU_READY_PERF" block=CPC event=15 descr="Me2 stall waiting on RCIU Ready Perf. (Valid Only if ME2 is available"
-  ></metric>
-  <metric
-    name="CPC_ME2_STALL_WAIT_ON_RCIU_READ" block=CPC event=16 descr="Me2 stall waiting on RCIU read. (Valid Only if ME2 is available"
-  ></metric>
-  <metric
-    name="CPC_ME2_STALL_WAIT_ON_MIU_READ" block=CPC event=17 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPC_ME2_STALL_WAIT_ON_MIU_WRITE" block=CPC event=18 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPC_ME2_STALL_ON_DATA_FROM_ROQ" block=CPC event=19 descr="Me2 stall on data from roq. (Valid Only if ME2 is available"
-  ></metric>
-  <metric
-    name="CPC_ME2_STALL_ON_DATA_FROM_ROQ_PERF" block=CPC event=20 descr="Me2 stall on data from roq Perf. (Valid Only if ME2 is available"
-  ></metric>
-  <metric
-    name="CPC_ME2_BUSY_FOR_PACKET_DECODE" block=CPC event=21 descr="Me2 busy for packet decode. (Valid Only if ME2 is available"
-  ></metric>
-  <metric
-    name="CPC_UTCL2IU_STALL_WAIT_ON_FREE" block=CPC event=22 descr="UTCL2IU is stalled waiting on credits from the UTCL2."
-  ></metric>
-  <metric
-    name="CPC_UTCL2IU_STALL_WAIT_ON_TAGS" block=CPC event=23 descr="UTCL2IU has used all available tags and is waiting on the UTCL2 to return them."
-  ></metric>
-  <metric
-    name="CPC_UTCL1_STALL_ON_TRANSLATION" block=CPC event=24 descr="One of the UTCL1s is stalled waiting on translation, XNACK or PENDING response."
-  ></metric>
-  <metric
-    name="CPC_CPC_STAT_BUSY" block=CPC event=25 descr="CPC Busy."
-  ></metric>
-  <metric
-    name="CPC_CPC_STAT_IDLE" block=CPC event=26 descr="CPC Idle."
-  ></metric>
-  <metric
-    name="CPC_CPC_STAT_STALL" block=CPC event=27 descr="CPC Stalled."
-  ></metric>
-  <metric
-    name="CPC_CPC_TCIU_BUSY" block=CPC event=28 descr="CPC TCIU interface Busy."
-  ></metric>
-  <metric
-    name="CPC_CPC_TCIU_IDLE" block=CPC event=29 descr="CPC TCIU interface Idle."
-  ></metric>
-  <metric
-    name="CPC_CPC_UTCL2IU_BUSY" block=CPC event=30 descr="CPC UTCL2 interface Busy."
-  ></metric>
-  <metric
-    name="CPC_CPC_UTCL2IU_IDLE" block=CPC event=31 descr="CPC UTCL2 interface Idle."
-  ></metric>
-  <metric
-    name="CPC_CPC_UTCL2IU_STALL" block=CPC event=32 descr="CPC UTCL2 interface Stalled waiting on Free, Tags or Translation."
-  ></metric>
-  <metric
-    name="CPC_ME1_DC0_SPI_BUSY" block=CPC event=33 descr="CPC Me1 Processor Busy."
-  ></metric>
-  <metric
-    name="CPC_ME2_DC1_SPI_BUSY" block=CPC event=34 descr="CPC Me2 Processor Busy. (Valid Only if ME2 is available)"
-  ></metric>
-  # CPF counters
-  <metric
-    name="CPF_ALWAYS_COUNT" block=CPF event=0 descr="Always Count."
-  ></metric>
-  <metric
-    name="CPF_MIU_STALLED_WAITING_RDREQ_FREE" block=CPF event=1 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPF_TCIU_STALLED_WAITING_ON_FREE" block=CPF event=2 descr="CPF TCIU stalled waiting on Free."
-  ></metric>
-  <metric
-    name="CPF_TCIU_STALLED_WAITING_ON_TAGS" block=CPF event=3 descr="CPF TCIU stalled waiting on tags."
-  ></metric>
-  <metric
-    name="CPF_CSF_BUSY_FOR_FETCHING_RING" block=CPF event=4 descr="CSF busy for fetching Ring data."
-  ></metric>
-  <metric
-    name="CPF_CSF_BUSY_FOR_FETCHING_IB1" block=CPF event=5 descr="CSF busy for fetching Indirect buffer 1."
-  ></metric>
-  <metric
-    name="CPF_CSF_BUSY_FOR_FETCHING_IB2" block=CPF event=6 descr="CSF busy for fetching Indirect buffer 2."
-  ></metric>
-  <metric
-    name="CPF_CSF_BUSY_FOR_FECTHINC_STATE" block=CPF event=7 descr="CSF busy for fetching state data."
-  ></metric>
-  <metric
-    name="CPF_MIU_BUSY_FOR_OUTSTANDING_TAGS" block=CPF event=8 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPF_CSF_RTS_MIU_NOT_RTR" block=CPF event=9 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPF_CSF_STATE_FIFO_NOT_RTR" block=CPF event=10 descr="CSF state fifo no RTR."
-  ></metric>
-  <metric
-    name="CPF_CSF_FETCHING_CMD_BUFFERS" block=CPF event=11 descr="CSF is fetching command buffers."
-  ></metric>
-  <metric
-    name="CPF_GRBM_DWORDS_SENT" block=CPF event=12 descr="CPF to GRBM 4 Dwords sent."
-  ></metric>
-  <metric
-    name="CPF_DYNAMIC_CLOCK_VALID" block=CPF event=13 descr="CPF Dynamic clock is valid."
-  ></metric>
-  <metric
-    name="CPF_REGISTER_CLOCK_VALID" block=CPF event=14 descr="CPF register clock is valid."
-  ></metric>
-  <metric
-    name="CPF_MIU_WRITE_REQUEST_SEND" block=CPF event=15 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPF_MIU_READ_REQUEST_SEND" block=CPF event=16 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPF_UTCL2IU_STALL_WAIT_ON_FREE" block=CPF event=17 descr="UTCL2IU is stalled waiting on credits from the UTCL2."
-  ></metric>
-  <metric
-    name="CPF_UTCL2IU_STALL_WAIT_ON_TAGS" block=CPF event=18 descr="UTCL2IU has used all available tags and is waiting on the UTCL2 to return them."
-  ></metric>
-  <metric
-    name="CPF_GFX_UTCL1_STALL_ON_TRANSLATION" block=CPF event=19 descr="One of the Graphics UTCL1s is stalled waiting on translation, XNACK or PENDING response."
-  ></metric>
-  <metric
-    name="CPF_CMP_UTCL1_STALL_ON_TRANSLATION" block=CPF event=20 descr="One of the Compute UTCL1s is stalled waiting on translation, XNACK or PENDING response."
-  ></metric>
-  <metric
-    name="CPF_RCIU_STALL_WAIT_ON_FREE" block=CPF event=21 descr="CPF RCIU is stalled waiting on credits from GRBM."
-  ></metric>
-  <metric
-    name="CPF_TCIU_READ_REQUEST_SENT" block=CPF event=22 descr="Count of TC read requests"
-  ></metric>
-  <metric
-    name="CPF_CPF_STAT_BUSY" block=CPF event=23 descr="CPF Busy."
-  ></metric>
-  <metric
-    name="CPF_CPF_STAT_IDLE" block=CPF event=24 descr="CPF Idle."
-  ></metric>
-  <metric
-    name="CPF_CPF_STAT_STALL" block=CPF event=25 descr="CPF Stalled."
-  ></metric>
-  <metric
-    name="CPF_CPF_TCIU_BUSY" block=CPF event=26 descr="CPF TCIU interface Busy."
-  ></metric>
-  <metric
-    name="CPF_CPF_TCIU_IDLE" block=CPF event=27 descr="CPF TCIU interface Idle."
-  ></metric>
-  <metric
-    name="CPF_CPF_TCIU_STALL" block=CPF event=28 descr="CPF TCIU interface Stalled waiting on Free, Tags."
-  ></metric>
-  <metric
-    name="CPF_CPF_UTCL2IU_BUSY" block=CPF event=29 descr="CPF UTCL2 interface Busy."
-  ></metric>
-  <metric
-    name="CPF_CPF_UTCL2IU_IDLE" block=CPF event=30 descr="CPF UTCL2 interface Idle."
-  ></metric>
-  <metric
-    name="CPF_CPF_UTCL2IU_STALL" block=CPF event=31 descr="CPF UTCL2 interface Stalled waiting on Free, Tags."
-  ></metric>
-  # GDS counters
-  <metric
-    name="GDS_DS_ADDR_CONFL" block=GDS event=0 descr="Number of conflicting addresses in DS memory"
-  ></metric>
-  <metric
-    name="GDS_DS_BANK_CONFL" block=GDS event=1 descr="Number of conflicting banks in DS memory"
-  ></metric>
-  <metric
-    name="GDS_WBUF_FLUSH" block=GDS event=2 descr="Number of times the RBIU write buffer is flushed"
-  ></metric>
-  <metric
-    name="GDS_WR_COMP" block=GDS event=3 descr="Number of times a WRITE_COMPLETE is put in write buffer"
-  ></metric>
-  <metric
-    name="GDS_WBUF_WR" block=GDS event=4 descr="Number of times the RBIU writes to buffer"
-  ></metric>
-  <metric
-    name="GDS_RBUF_HIT" block=GDS event=5 descr="Number of times an RBIU read hits in the buffer"
-  ></metric>
-  <metric
-    name="GDS_RBUF_MISS" block=GDS event=6 descr="Number of times an RBIU read misses the buffer"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_NORET" block=GDS event=7 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_RET" block=GDS event=8 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_ORD_CNT" block=GDS event=9 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_2COMP_REQ" block=GDS event=10 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_ORD_WAVE_VALID" block=GDS event=11 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_GDS_DATA_VALID" block=GDS event=12 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_GDS_STALL_BY_ORD" block=GDS event=13 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_GDS_WR_OP" block=GDS event=14 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_GDS_RD_OP" block=GDS event=15 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_GDS_ATOM_OP" block=GDS event=16 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_GDS_REL_OP" block=GDS event=17 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_GDS_CMPXCH_OP" block=GDS event=18 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_GDS_BYTE_OP" block=GDS event=19 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_GDS_SHORT_OP" block=GDS event=20 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_NORET" block=GDS event=21 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_RET" block=GDS event=22 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_ORD_CNT" block=GDS event=23 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_2COMP_REQ" block=GDS event=24 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_ORD_WAVE_VALID" block=GDS event=25 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_GDS_DATA_VALID" block=GDS event=26 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_GDS_STALL_BY_ORD" block=GDS event=27 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_GDS_WR_OP" block=GDS event=28 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_GDS_RD_OP" block=GDS event=29 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_GDS_ATOM_OP" block=GDS event=30 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_GDS_REL_OP" block=GDS event=31 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_GDS_CMPXCH_OP" block=GDS event=32 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_GDS_BYTE_OP" block=GDS event=33 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_GDS_SHORT_OP" block=GDS event=34 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_NORET" block=GDS event=35 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_RET" block=GDS event=36 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_ORD_CNT" block=GDS event=37 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_2COMP_REQ" block=GDS event=38 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_ORD_WAVE_VALID" block=GDS event=39 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_GDS_DATA_VALID" block=GDS event=40 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_GDS_STALL_BY_ORD" block=GDS event=41 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_GDS_WR_OP" block=GDS event=42 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_GDS_RD_OP" block=GDS event=43 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_GDS_ATOM_OP" block=GDS event=44 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_GDS_REL_OP" block=GDS event=45 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_GDS_CMPXCH_OP" block=GDS event=46 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_GDS_BYTE_OP" block=GDS event=47 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_GDS_SHORT_OP" block=GDS event=48 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_NORET" block=GDS event=49 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_RET" block=GDS event=50 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_ORD_CNT" block=GDS event=51 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_2COMP_REQ" block=GDS event=52 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_ORD_WAVE_VALID" block=GDS event=53 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_GDS_DATA_VALID" block=GDS event=54 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_GDS_STALL_BY_ORD" block=GDS event=55 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_GDS_WR_OP" block=GDS event=56 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_GDS_RD_OP" block=GDS event=57 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_GDS_ATOM_OP" block=GDS event=58 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_GDS_REL_OP" block=GDS event=59 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_GDS_CMPXCH_OP" block=GDS event=60 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_GDS_BYTE_OP" block=GDS event=61 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_GDS_SHORT_OP" block=GDS event=62 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_NORET" block=GDS event=63 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_RET" block=GDS event=64 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_ORD_CNT" block=GDS event=65 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_2COMP_REQ" block=GDS event=66 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_ORD_WAVE_VALID" block=GDS event=67 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_GDS_DATA_VALID" block=GDS event=68 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_GDS_STALL_BY_ORD" block=GDS event=69 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_GDS_WR_OP" block=GDS event=70 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_GDS_RD_OP" block=GDS event=71 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_GDS_ATOM_OP" block=GDS event=72 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_GDS_REL_OP" block=GDS event=73 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_GDS_CMPXCH_OP" block=GDS event=74 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_GDS_BYTE_OP" block=GDS event=75 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_GDS_SHORT_OP" block=GDS event=76 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_NORET" block=GDS event=77 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_RET" block=GDS event=78 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_ORD_CNT" block=GDS event=79 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_2COMP_REQ" block=GDS event=80 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_ORD_WAVE_VALID" block=GDS event=81 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_GDS_DATA_VALID" block=GDS event=82 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_GDS_STALL_BY_ORD" block=GDS event=83 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_GDS_WR_OP" block=GDS event=84 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_GDS_RD_OP" block=GDS event=85 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_GDS_ATOM_OP" block=GDS event=86 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_GDS_REL_OP" block=GDS event=87 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_GDS_CMPXCH_OP" block=GDS event=88 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_GDS_BYTE_OP" block=GDS event=89 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_GDS_SHORT_OP" block=GDS event=90 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_NORET" block=GDS event=91 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_RET" block=GDS event=92 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_ORD_CNT" block=GDS event=93 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_2COMP_REQ" block=GDS event=94 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_ORD_WAVE_VALID" block=GDS event=95 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_GDS_DATA_VALID" block=GDS event=96 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_GDS_STALL_BY_ORD" block=GDS event=97 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_GDS_WR_OP" block=GDS event=98 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_GDS_RD_OP" block=GDS event=99 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_GDS_ATOM_OP" block=GDS event=100 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_GDS_REL_OP" block=GDS event=101 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_GDS_CMPXCH_OP" block=GDS event=102 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_GDS_BYTE_OP" block=GDS event=103 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_GDS_SHORT_OP" block=GDS event=104 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_NORET" block=GDS event=105 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_RET" block=GDS event=106 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_ORD_CNT" block=GDS event=107 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_2COMP_REQ" block=GDS event=108 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_ORD_WAVE_VALID" block=GDS event=109 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_GDS_DATA_VALID" block=GDS event=110 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_GDS_STALL_BY_ORD" block=GDS event=111 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_GDS_WR_OP" block=GDS event=112 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_GDS_RD_OP" block=GDS event=113 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_GDS_ATOM_OP" block=GDS event=114 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_GDS_REL_OP" block=GDS event=115 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_GDS_CMPXCH_OP" block=GDS event=116 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_GDS_BYTE_OP" block=GDS event=117 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_GDS_SHORT_OP" block=GDS event=118 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH0_NORET" block=GDS event=119 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH0_RET" block=GDS event=120 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH0_ORD_CNT" block=GDS event=121 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH0_2COMP_REQ" block=GDS event=122 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH0_ORD_WAVE_VALID" block=GDS event=123 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH0_GDS_DATA_VALID" block=GDS event=124 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH0_GDS_STALL_BY_ORD" block=GDS event=125 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH0_GDS_WR_OP" block=GDS event=126 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH0_GDS_RD_OP" block=GDS event=127 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH0_GDS_ATOM_OP" block=GDS event=128 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH0_GDS_REL_OP" block=GDS event=129 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH0_GDS_CMPXCH_OP" block=GDS event=130 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH0_GDS_BYTE_OP" block=GDS event=131 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH0_GDS_SHORT_OP" block=GDS event=132 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH1_NORET" block=GDS event=133 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH1_RET" block=GDS event=134 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH1_ORD_CNT" block=GDS event=135 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH1_2COMP_REQ" block=GDS event=136 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH1_ORD_WAVE_VALID" block=GDS event=137 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH1_GDS_DATA_VALID" block=GDS event=138 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH1_GDS_STALL_BY_ORD" block=GDS event=139 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH1_GDS_WR_OP" block=GDS event=140 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH1_GDS_RD_OP" block=GDS event=141 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH1_GDS_ATOM_OP" block=GDS event=142 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH1_GDS_REL_OP" block=GDS event=143 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH1_GDS_CMPXCH_OP" block=GDS event=144 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH1_GDS_BYTE_OP" block=GDS event=145 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE4_SH1_GDS_SHORT_OP" block=GDS event=146 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH0_NORET" block=GDS event=147 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH0_RET" block=GDS event=148 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH0_ORD_CNT" block=GDS event=149 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH0_2COMP_REQ" block=GDS event=150 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH0_ORD_WAVE_VALID" block=GDS event=151 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH0_GDS_DATA_VALID" block=GDS event=152 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH0_GDS_STALL_BY_ORD" block=GDS event=153 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH0_GDS_WR_OP" block=GDS event=154 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH0_GDS_RD_OP" block=GDS event=155 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH0_GDS_ATOM_OP" block=GDS event=156 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH0_GDS_REL_OP" block=GDS event=157 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH0_GDS_CMPXCH_OP" block=GDS event=158 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH0_GDS_BYTE_OP" block=GDS event=159 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH0_GDS_SHORT_OP" block=GDS event=160 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH1_NORET" block=GDS event=161 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH1_RET" block=GDS event=162 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH1_ORD_CNT" block=GDS event=163 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH1_2COMP_REQ" block=GDS event=164 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH1_ORD_WAVE_VALID" block=GDS event=165 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH1_GDS_DATA_VALID" block=GDS event=166 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH1_GDS_STALL_BY_ORD" block=GDS event=167 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH1_GDS_WR_OP" block=GDS event=168 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH1_GDS_RD_OP" block=GDS event=169 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH1_GDS_ATOM_OP" block=GDS event=170 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH1_GDS_REL_OP" block=GDS event=171 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH1_GDS_CMPXCH_OP" block=GDS event=172 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH1_GDS_BYTE_OP" block=GDS event=173 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE5_SH1_GDS_SHORT_OP" block=GDS event=174 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH0_NORET" block=GDS event=175 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH0_RET" block=GDS event=176 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH0_ORD_CNT" block=GDS event=177 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH0_2COMP_REQ" block=GDS event=178 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH0_ORD_WAVE_VALID" block=GDS event=179 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH0_GDS_DATA_VALID" block=GDS event=180 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH0_GDS_STALL_BY_ORD" block=GDS event=181 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH0_GDS_WR_OP" block=GDS event=182 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH0_GDS_RD_OP" block=GDS event=183 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH0_GDS_ATOM_OP" block=GDS event=184 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH0_GDS_REL_OP" block=GDS event=185 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH0_GDS_CMPXCH_OP" block=GDS event=186 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH0_GDS_BYTE_OP" block=GDS event=187 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH0_GDS_SHORT_OP" block=GDS event=188 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH1_NORET" block=GDS event=189 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH1_RET" block=GDS event=190 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH1_ORD_CNT" block=GDS event=191 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH1_2COMP_REQ" block=GDS event=192 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH1_ORD_WAVE_VALID" block=GDS event=193 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH1_GDS_DATA_VALID" block=GDS event=194 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH1_GDS_STALL_BY_ORD" block=GDS event=195 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH1_GDS_WR_OP" block=GDS event=196 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH1_GDS_RD_OP" block=GDS event=197 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH1_GDS_ATOM_OP" block=GDS event=198 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH1_GDS_REL_OP" block=GDS event=199 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH1_GDS_CMPXCH_OP" block=GDS event=200 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH1_GDS_BYTE_OP" block=GDS event=201 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE6_SH1_GDS_SHORT_OP" block=GDS event=202 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH0_NORET" block=GDS event=203 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH0_RET" block=GDS event=204 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH0_ORD_CNT" block=GDS event=205 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH0_2COMP_REQ" block=GDS event=206 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH0_ORD_WAVE_VALID" block=GDS event=207 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH0_GDS_DATA_VALID" block=GDS event=208 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH0_GDS_STALL_BY_ORD" block=GDS event=209 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH0_GDS_WR_OP" block=GDS event=210 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH0_GDS_RD_OP" block=GDS event=211 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH0_GDS_ATOM_OP" block=GDS event=212 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH0_GDS_REL_OP" block=GDS event=213 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH0_GDS_CMPXCH_OP" block=GDS event=214 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH0_GDS_BYTE_OP" block=GDS event=215 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH0_GDS_SHORT_OP" block=GDS event=216 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH1_NORET" block=GDS event=217 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH1_RET" block=GDS event=218 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH1_ORD_CNT" block=GDS event=219 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH1_2COMP_REQ" block=GDS event=220 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH1_ORD_WAVE_VALID" block=GDS event=221 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH1_GDS_DATA_VALID" block=GDS event=222 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH1_GDS_STALL_BY_ORD" block=GDS event=223 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH1_GDS_WR_OP" block=GDS event=224 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH1_GDS_RD_OP" block=GDS event=225 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH1_GDS_ATOM_OP" block=GDS event=226 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH1_GDS_REL_OP" block=GDS event=227 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH1_GDS_CMPXCH_OP" block=GDS event=228 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH1_GDS_BYTE_OP" block=GDS event=229 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE7_SH1_GDS_SHORT_OP" block=GDS event=230 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_GWS_RELEASED" block=GDS event=231 descr="Number of waves released by GWS"
-  ></metric>
-  <metric
-    name="GDS_GWS_BYPASS" block=GDS event=232 descr="Number of waves bypassed by GWS"
-  ></metric>
-  # GRBM counters
-  <metric
-    name="GRBM_COUNT" block=GRBM event=0 descr="Tie High - Count Number of Clocks"
-  ></metric>
-  <metric
-    name="GRBM_USER_DEFINED" block=GRBM event=1 descr="User defined performance select."
-  ></metric>
-  <metric
-    name="GRBM_GUI_ACTIVE" block=GRBM event=2 descr="The GUI is Active"
-  ></metric>
-  <metric
-    name="GRBM_CP_BUSY" block=GRBM event=3 descr="Any of the Command Processor (CPG/CPC/CPF) blocks are busy."
-  ></metric>
-  <metric
-    name="GRBM_CP_COHER_BUSY" block=GRBM event=4 descr="The Command Processor Graphics (CPG) Surface Coherency Logic is busy."
-  ></metric>
-  <metric
-    name="GRBM_CP_DMA_BUSY" block=GRBM event=5 descr="The Command Processor Graphics (CPG) DMA Logic is busy."
-  ></metric>
-  <metric
-    name="GRBM_CB_BUSY" block=GRBM event=6 descr="Any of the Color Blocks (CB) are busy in the shader engine(s)."
-  ></metric>
-  <metric
-    name="GRBM_DB_BUSY" block=GRBM event=7 descr="Any of the Depth Blocks (DB) are busy in the shader engine(s)."
-  ></metric>
-  <metric
-    name="GRBM_PA_BUSY" block=GRBM event=8 descr="Any of the Primitive Assembly Blocks (PA) are busy in the shader engine(s)."
-  ></metric>
-  <metric
-    name="GRBM_SC_BUSY" block=GRBM event=9 descr="Any of the Scan Converter Blocks (SC) are busy in the shader engine(s)."
-  ></metric>
-  <metric
-    name="GRBM_RESERVED_6" block=GRBM event=10 descr="Reserved to maintain backwards compatibility."
-  ></metric>
-  <metric
-    name="GRBM_SPI_BUSY" block=GRBM event=11 descr="Any of the Shader Pipe Interpolators (SPI) are busy in the shader engine(s)."
-  ></metric>
-  <metric
-    name="GRBM_SX_BUSY" block=GRBM event=12 descr="Any of the Shader Export Blocks (SX) are busy."
-  ></metric>
-  <metric
-    name="GRBM_TA_BUSY" block=GRBM event=13 descr="Any of the Texture Pipes (TA) are busy in the shader engine(s)."
-  ></metric>
-  <metric
-    name="GRBM_CB_CLEAN" block=GRBM event=14 descr="Any of the Color Blocks (CB) are not clean in all shader engine(s)."
-  ></metric>
-  <metric
-    name="GRBM_DB_CLEAN" block=GRBM event=15 descr="Any of the Depth Blocks (DB) are not clean in all shader engine(s)."
-  ></metric>
-  <metric
-    name="GRBM_RESERVED_5" block=GRBM event=16 descr="Reserved to maintain backwards compatibility."
-  ></metric>
-  <metric
-    name="GRBM_VGT_BUSY" block=GRBM event=17 descr="Any of the Vertex Geometry Tessellator Blocks (VGT) are busy in the shader engine(s)."
-  ></metric>
-  <metric
-    name="GRBM_RESERVED_4" block=GRBM event=18 descr="Reserved to maintain backwards compatibility."
-  ></metric>
-  <metric
-    name="GRBM_RESERVED_3" block=GRBM event=19 descr="Reserved to maintain backwards compatibility."
-  ></metric>
-  <metric
-    name="GRBM_RESERVED_2" block=GRBM event=20 descr="Reserved to maintain backwards compatibility."
-  ></metric>
-  <metric
-    name="GRBM_RESERVED_1" block=GRBM event=21 descr="Reserved to maintain backwards compatibility."
-  ></metric>
-  <metric
-    name="GRBM_RESERVED_0" block=GRBM event=22 descr="Reserved to maintain backwards compatibility."
-  ></metric>
-  <metric
-    name="GRBM_IA_BUSY" block=GRBM event=23 descr="The Input Assembler (IA) is busy."
-  ></metric>
-  <metric
-    name="GRBM_IA_NO_DMA_BUSY" block=GRBM event=24 descr="The Input Assembler (IA) is busy; Does not include the Index DMA engine status."
-  ></metric>
-  <metric
-    name="GRBM_GDS_BUSY" block=GRBM event=25 descr="The Global Data Share (GDS) is busy."
-  ></metric>
-  <metric
-    name="GRBM_BCI_BUSY" block=GRBM event=26 descr="Any of the Barycentric Interpolators (BCI) are busy in the shader engine(s)."
-  ></metric>
-  <metric
-    name="GRBM_RLC_BUSY" block=GRBM event=27 descr="The Ring List Controller (RLC) is busy."
-  ></metric>
-  <metric
-    name="GRBM_TC_BUSY" block=GRBM event=28 descr="Any of the Texture Cache Blocks (TCP/TCI/TCA/TCC) are busy."
-  ></metric>
-  <metric
-    name="GRBM_CPG_BUSY" block=GRBM event=29 descr="The Command Processor Graphics (CPG) is busy."
-  ></metric>
-  <metric
-    name="GRBM_CPC_BUSY" block=GRBM event=30 descr="The Command Processor Compute (CPC) is busy."
-  ></metric>
-  <metric
-    name="GRBM_CPF_BUSY" block=GRBM event=31 descr="The Command Processor Fetchers (CPF) is busy."
-  ></metric>
-  <metric
-    name="GRBM_WD_BUSY" block=GRBM event=32 descr="The Work Distributor (WD) is busy."
-  ></metric>
-  <metric
-    name="GRBM_WD_NO_DMA_BUSY" block=GRBM event=33 descr="The Work Distributor (WD) is busy; Does not include the Index DMA engine status."
-  ></metric>
-  <metric
-    name="GRBM_UTCL2_BUSY" block=GRBM event=34 descr="The Unified Translation Cache Level-2 (UTCL2) block is busy."
-  ></metric>
-  <metric
-    name="GRBM_EA_BUSY" block=GRBM event=35 descr="The Efficiency Arbiter (EA) block is busy."
-  ></metric>
-  <metric
-    name="GRBM_RMI_BUSY" block=GRBM event=36 descr="The Render Backend Memory Interface (RMI) block is busy."
-  ></metric>
-  <metric
-    name="GRBM_CPAXI_BUSY" block=GRBM event=37 descr="The CPAXI block is busy."
-  ></metric>
-  # SPI counters
-  <metric
-    name="SPI_VS_WINDOW_VALID" block=SPI event=0 descr="Clock count enabled by perfcounter_start event."
-  ></metric>
-  <metric
-    name="SPI_VS_BUSY" block=SPI event=1 descr="Number of clocks with outstanding waves (SPI or SH)."
-  ></metric>
-  <metric
-    name="SPI_VS_FIRST_WAVE" block=SPI event=2 descr="Number of VS_IS_DS first waves"
-  ></metric>
-  <metric
-    name="SPI_VS_LAST_WAVE" block=SPI event=3 descr="Number of VS_IS_DS last waves."
-  ></metric>
-  <metric
-    name="SPI_VS_LSHS_DEALLOC" block=SPI event=4 descr="Number of VS_IS_DS lds dealloc waves."
-  ></metric>
-  <metric
-    name="SPI_VS_PC_STALL" block=SPI event=5 descr="Number of clocks stalled due to pc space."
-  ></metric>
-  <metric
-    name="SPI_VS_POS0_STALL" block=SPI event=6 descr="Number of clocks stalled due to pos buf space in SH0."
-  ></metric>
-  <metric
-    name="SPI_VS_POS1_STALL" block=SPI event=7 descr="Number of clocks stalled due to pos buf space in SH1."
-  ></metric>
-  <metric
-    name="SPI_VS_CRAWLER_STALL" block=SPI event=8 descr="Number of clocks event/wave order fifo is full."
-  ></metric>
-  <metric
-    name="SPI_VS_EVENT_WAVE" block=SPI event=9 descr="Number of events and waves."
-  ></metric>
-  <metric
-    name="SPI_VS_WAVE" block=SPI event=10 descr="Number of waves"
-  ></metric>
-  <metric
-    name="SPI_VS_PERS_UPD_FULL0" block=SPI event=11 descr="Number of clks VS persistent state update fifo0 is full."
-  ></metric>
-  <metric
-    name="SPI_VS_PERS_UPD_FULL1" block=SPI event=12 descr="Number of clks VS persistent state update fifo1 is full."
-  ></metric>
-  <metric
-    name="SPI_VS_LATE_ALLOC_FULL" block=SPI event=13 descr="Number of clks VS late alloc fifo is full."
-  ></metric>
-  <metric
-    name="SPI_VS_FIRST_SUBGRP" block=SPI event=14 descr="Number of first of subgroup waves."
-  ></metric>
-  <metric
-    name="SPI_VS_LAST_SUBGRP" block=SPI event=15 descr="Number of last of subgroup waves."
-  ></metric>
-  <metric
-    name="SPI_VS_ALLOC_CNT" block=SPI event=16 descr="Number of launched VS waves that rasterize (alloc export space)"
-  ></metric>
-  <metric
-    name="SPI_VS_PC_ALLOC_CNT" block=SPI event=17 descr="Number of parameter cache lines allocated"
-  ></metric>
-  <metric
-    name="SPI_VS_LATE_ALLOC_ACCUM" block=SPI event=18 descr="Accumulation of number of VS waves pending export allocation"
-  ></metric>
-  <metric
-    name="SPI_GS_WINDOW_VALID" block=SPI event=19 descr="Clock count enabled by perfcounter_start event."
-  ></metric>
-  <metric
-    name="SPI_GS_BUSY" block=SPI event=20 descr="Number of clocks with outstanding waves (SPI or SH)."
-  ></metric>
-  <metric
-    name="SPI_GS_CRAWLER_STALL" block=SPI event=21 descr="Number of clocks event/wave order fifo is full."
-  ></metric>
-  <metric
-    name="SPI_GS_EVENT_WAVE" block=SPI event=22 descr="Number of events and waves"
-  ></metric>
-  <metric
-    name="SPI_GS_WAVE" block=SPI event=23 descr="Number of waves."
-  ></metric>
-  <metric
-    name="SPI_GS_PERS_UPD_FULL0" block=SPI event=24 descr="Number of clks GS persistent state update fifo0 is full."
-  ></metric>
-  <metric
-    name="SPI_GS_PERS_UPD_FULL1" block=SPI event=25 descr="Number of clks GS persistent state update fifo1 is full."
-  ></metric>
-  <metric
-    name="SPI_GS_FIRST_SUBGRP" block=SPI event=26 descr="Number of first of subgroup waves."
-  ></metric>
-  <metric
-    name="SPI_GS_LAST_SUBGRP" block=SPI event=27 descr="Number of last of subgroup waves."
-  ></metric>
-  <metric
-    name="SPI_GS_HS_DEALLOC" block=SPI event=28 descr="Number of offchip hs dealloc events read from crawler."
-  ></metric>
-  <metric
-    name="SPI_GS_NGG_SE_LATE_ALLOC_LIMIT" block=SPI event=29 descr="Number of clks this SE has reached allocation wave limit (can not launch more waves until pending ones allocate)."
-  ></metric>
-  <metric
-    name="SPI_GS_GRP_FIFO_FULL" block=SPI event=30 descr="GS Group FIFO full count"
-  ></metric>
-  <metric
-    name="SPI_HS_WINDOW_VALID" block=SPI event=31 descr="Clock count enabled by perfcounter_start event."
-  ></metric>
-  <metric
-    name="SPI_HS_BUSY" block=SPI event=32 descr="Number of clocks with outstanding waves (SPI or SH)."
-  ></metric>
-  <metric
-    name="SPI_HS_CRAWLER_STALL" block=SPI event=33 descr="Number of clocks event/wave order fifo is full."
-  ></metric>
-  <metric
-    name="SPI_HS_FIRST_WAVE" block=SPI event=34 descr="Number of first waves."
-  ></metric>
-  <metric
-    name="SPI_HS_LAST_WAVE" block=SPI event=35 descr="Number of last waves."
-  ></metric>
-  <metric
-    name="SPI_HS_OFFCHIP_LDS_STALL" block=SPI event=36 descr="Number of clks HS waits to allocate offchip LDS space."
-  ></metric>
-  <metric
-    name="SPI_HS_EVENT_WAVE" block=SPI event=37 descr="Number of events and waves."
-  ></metric>
-  <metric
-    name="SPI_HS_WAVE" block=SPI event=38 descr="Number of waves."
-  ></metric>
-  <metric
-    name="SPI_HS_PERS_UPD_FULL0" block=SPI event=39 descr="Number of clks HS persistent state update fifo0 is full."
-  ></metric>
-  <metric
-    name="SPI_HS_PERS_UPD_FULL1" block=SPI event=40 descr="Number of clks HS persistent state update fifo1 is full."
-  ></metric>
-  <metric
-    name="SPI_CSG_WINDOW_VALID" block=SPI event=41 descr="Clock count enabled by perfcounter_start event."
-  ></metric>
-  <metric
-    name="SPI_CSG_BUSY" block=SPI event=42 descr="Number of clocks with outstanding waves (SPI or SH)."
-  ></metric>
-  <metric
-    name="SPI_CSG_NUM_THREADGROUPS" block=SPI event=43 descr="Number of threadgroups launched"
-  ></metric>
-  <metric
-    name="SPI_CSG_CRAWLER_STALL" block=SPI event=44 descr="Number of clocks event/wave order fifo is full"
-  ></metric>
-  <metric
-    name="SPI_CSG_EVENT_WAVE" block=SPI event=45 descr="Number of events and waves"
-  ></metric>
-  <metric
-    name="SPI_CSG_WAVE" block=SPI event=46 descr="Number of waves"
-  ></metric>
-  <metric
-    name="SPI_CSN_WINDOW_VALID" block=SPI event=47 descr="Clock count enabled by perfcounter_start event. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSN_BUSY" block=SPI event=48 descr="Number of clocks with outstanding waves (SPI or SH). Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSN_NUM_THREADGROUPS" block=SPI event=49 descr="Number of threadgroups launched. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSN_CRAWLER_STALL" block=SPI event=50 descr="Number of clocks event/wave order fifo is full. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSN_EVENT_WAVE" block=SPI event=51 descr="Number of events and waves. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSN_WAVE" block=SPI event=52 descr="Number of waves. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_PS_WINDOW_VALID" block=SPI event=53 descr="Clock count enabled by perfcounter_start event. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_BUSY" block=SPI event=54 descr="Number of clocks with outstanding waves (SPI or SH), Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_ACTIVE" block=SPI event=55 descr="Number of clks ptr_buff is processing waves. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_DEALLOC_BIN0" block=SPI event=56 descr="Count deallocs for SE matching bin0 range. Uses a 17-bit increment so we can only use the 32-bit counters. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_FPOS_BIN1_STALL" block=SPI event=57 descr="Number of clks stalled waiting for a VS done from SE matching bin1. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_EVENT_WAVE" block=SPI event=58 descr="Number of events and waves, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_WAVE" block=SPI event=59 descr="Number of waves, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_OPT_WAVE" block=SPI event=60 descr="Number of waves with center+centroid+bc_optimize, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_PASS_BIN0" block=SPI event=61 descr="Count waves with bin0 pc reads / attr, range is 1-16. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_PASS_BIN1" block=SPI event=62 descr="Count waves with bin1 pc reads / attr, range is 1-16. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_FPOS_BIN2" block=SPI event=63 descr="Count fpos for SE matching bin2 range, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_PRIM_BIN0" block=SPI event=64 descr="Count waves with bin0 prims, range is 1-16. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_PRIM_BIN1" block=SPI event=65 descr="Count waves with bin1 prims, range is 1-16. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_CNF_BIN2" block=SPI event=66 descr="Count waves with bin2 conflicts, range is 0-15 but max is 8. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_CNF_BIN3" block=SPI event=67 descr="Count waves with bin3 conflicts, range is 0-15 but max is 8. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_CRAWLER_STALL" block=SPI event=68 descr="Number of clocks event/wave order fifo is full, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_LDS_RES_FULL" block=SPI event=69 descr="Number of clks PS per-wavefront storage is full, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_PERS_UPD_FULL0" block=SPI event=70 descr="Number of clks PS persistent state update fifo0 is full, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_PERS_UPD_FULL1" block=SPI event=71 descr="Number of clks PS persistent state update fifo1 is full, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_POPS_WAVE_SENT" block=SPI event=72 descr="Number of PS POPS Waves that were issued by the PS wave controller, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_POPS_WAVE_EXIT" block=SPI event=73 descr="Number of POPS Enabled PS waves that exit the PS crawler, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_LDS0_PC_VALID" block=SPI event=74 descr="Number of param cache reads sent to PC from SH0."
-  ></metric>
-  <metric
-    name="SPI_LDS1_PC_VALID" block=SPI event=75 descr="Number of param cache reads sent to PC from SH1."
-  ></metric>
-  <metric
-    name="SPI_RA_PIPE_REQ_BIN2" block=SPI event=76 descr="Arb cycles with bin2 mqcs pipe_arb req =sum(csprobe0, csproben), Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_TASK_REQ_BIN3" block=SPI event=77 descr="Arb cycles with bin3 requests =sum(mqcs0, mqcsn) + dxcs +sum(gfx), Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_WR_CTL_FULL" block=SPI event=78 descr="Arb cycles where RA is stalled due to wave launch fifo_full. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_REQ_NO_ALLOC" block=SPI event=79 descr="Arb cycles with requests but no allocation. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_REQ_NO_ALLOC_PS" block=SPI event=80 descr="Arb cycles with PS req and no PS alloc. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is from RA0 and PS0, DEBUG_SH_SEL =1, source is from RA0 and PS1."
-  ></metric>
-  <metric
-    name="SPI_RA_REQ_NO_ALLOC_VS" block=SPI event=81 descr="Arb cycles with VS req and no VS alloc. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_REQ_NO_ALLOC_GS" block=SPI event=82 descr="Arb cycles with GS req and no GS alloc. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_REQ_NO_ALLOC_HS" block=SPI event=83 descr="Arb cycles with HS req and no HS alloc. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_REQ_NO_ALLOC_CSG" block=SPI event=84 descr="Arb cycles with CSg req and no CSg alloc. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_REQ_NO_ALLOC_CSN" block=SPI event=85 descr="Arb cycles with CSn req and no CSn alloc. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_RES_STALL_PS" block=SPI event=86 descr="Arb cycles with PS req and no PS fits. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is from RA0 and PS0, DEBUG_SH_SEL =1, source is from RA0 and PS1."
-  ></metric>
-  <metric
-    name="SPI_RA_RES_STALL_VS" block=SPI event=87 descr="Arb cycles with VS req and no VS fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_RES_STALL_GS" block=SPI event=88 descr="Arb cycles with GS req and no GS fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_RES_STALL_HS" block=SPI event=89 descr="Arb cycles with HS req and no HS fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_RES_STALL_CSG" block=SPI event=90 descr="Arb cycles with CSg req and no CSg fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_RES_STALL_CSN" block=SPI event=91 descr="Arb cycles with CSn req and no CSn fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_TMP_STALL_PS" block=SPI event=92 descr="Cycles where ps wants to req but does not fit in temp space. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_TMP_STALL_VS" block=SPI event=93 descr="Cycles where vs wants to req but does not fit in temp space."
-  ></metric>
-  <metric
-    name="SPI_RA_TMP_STALL_GS" block=SPI event=94 descr="Cycles where gs wants to req but does not fit in temp space."
-  ></metric>
-  <metric
-    name="SPI_RA_TMP_STALL_HS" block=SPI event=95 descr="Cycles where hs wants to req but does not fit in temp space."
-  ></metric>
-  <metric
-    name="SPI_RA_TMP_STALL_CSG" block=SPI event=96 descr="Cycles where csg wants to req but does not fit in temp space."
-  ></metric>
-  <metric
-    name="SPI_RA_TMP_STALL_CSN" block=SPI event=97 descr="Cycles where csn wants to req but does not fit in temp space."
-  ></metric>
-  <metric
-    name="SPI_RA_WAVE_SIMD_FULL_PS" block=SPI event=98 descr="Sum of SIMD where WAVE resource full when !ps_fits. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is from RA0 and PS0, DEBUG_SH_SEL =1, source is from RA0 and PS1."
-  ></metric>
-  <metric
-    name="SPI_RA_WAVE_SIMD_FULL_VS" block=SPI event=99 descr="Sum of SIMD where WAVE resource full when !vs_fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_WAVE_SIMD_FULL_GS" block=SPI event=100 descr="Sum of SIMD where WAVE resource full when !gs_fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_WAVE_SIMD_FULL_HS" block=SPI event=101 descr="Sum of SIMD where WAVE can't take hs wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_WAVE_SIMD_FULL_CSG" block=SPI event=102 descr="Sum of SIMD where WAVE can't take csg wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_WAVE_SIMD_FULL_CSN" block=SPI event=103 descr="Sum of SIMD where WAVE can't take csn wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_VGPR_SIMD_FULL_PS" block=SPI event=104 descr="Sum of SIMD where VGPR can't take ps wave when !fits. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is from RA0 and PS0, DEBUG_SH_SEL =1, source is from RA0 and PS1."
-  ></metric>
-  <metric
-    name="SPI_RA_VGPR_SIMD_FULL_VS" block=SPI event=105 descr="Sum of SIMD where VGPR can't take vs wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_VGPR_SIMD_FULL_GS" block=SPI event=106 descr="Sum of SIMD where VGPR can't take gs wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_VGPR_SIMD_FULL_HS" block=SPI event=107 descr="Sum of SIMD where VGPR can't take hs wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_VGPR_SIMD_FULL_CSG" block=SPI event=108 descr="Sum of SIMD where VGPR can't take csg wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_VGPR_SIMD_FULL_CSN" block=SPI event=109 descr="Sum of SIMD where VGPR can't take csn wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_SGPR_SIMD_FULL_PS" block=SPI event=110 descr="Sum of SIMD where SGPR can't take ps wave when !fits. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is from RA0 and PS0, DEBUG_SH_SEL =1, source is from RA0 and PS1."
-  ></metric>
-  <metric
-    name="SPI_RA_SGPR_SIMD_FULL_VS" block=SPI event=111 descr="Sum of SIMD where SGPR can't take vs wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_SGPR_SIMD_FULL_GS" block=SPI event=112 descr="Sum of SIMD where SGPR can't take gs wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_SGPR_SIMD_FULL_HS" block=SPI event=113 descr="Sum of SIMD where SGPR can't take hs wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_SGPR_SIMD_FULL_CSG" block=SPI event=114 descr="Sum of SIMD where SGPR can't take csg wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_SGPR_SIMD_FULL_CSN" block=SPI event=115 descr="Sum of SIMD where SGPR can't take csn wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_LDS_CU_FULL_PS" block=SPI event=116 descr="Sum of CU where LDS can't take ps wave when !fits. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is from RA0 and PS0, DEBUG_SH_SEL =1, source is from RA0 and PS1."
-  ></metric>
-  <metric
-    name="SPI_RA_LDS_CU_FULL_LS" block=SPI event=117 descr="Sum of CU where LDS can't take ls wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_LDS_CU_FULL_ES" block=SPI event=118 descr="Sum of CU where LDS can't take es wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_LDS_CU_FULL_CSG" block=SPI event=119 descr="Sum of CU where LDS can't take csg wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_LDS_CU_FULL_CSN" block=SPI event=120 descr="Sum of CU where LDS can't take csn wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_BAR_CU_FULL_HS" block=SPI event=121 descr="Sum of CU where BARRIER can't take hs wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_BAR_CU_FULL_CSG" block=SPI event=122 descr="Sum of CU where BARRIER can't take csg wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_BAR_CU_FULL_CSN" block=SPI event=123 descr="Sum of CU where BARRIER can't take csn wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_BULKY_CU_FULL_CSG" block=SPI event=124 descr="Sum of CU where BULKY can't take csg wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_BULKY_CU_FULL_CSN" block=SPI event=125 descr="Sum of CU where BULKY can't take csn wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_TGLIM_CU_FULL_CSG" block=SPI event=126 descr="Cycles where csg wants to req but all CU are at tg_limit"
-  ></metric>
-  <metric
-    name="SPI_RA_TGLIM_CU_FULL_CSN" block=SPI event=127 descr="Cycles where csn wants to req but all CU are at tg_limit"
-  ></metric>
-  <metric
-    name="SPI_RA_WVLIM_STALL_PS" block=SPI event=128 descr="Number of clocks ps is stalled due to WAVE LIMIT. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_RA_WVLIM_STALL_VS" block=SPI event=129 descr="Number of clocks vs is stalled due to WAVE LIMIT."
-  ></metric>
-  <metric
-    name="SPI_RA_WVLIM_STALL_GS" block=SPI event=130 descr="Number of clocks gs is stalled due to WAVE LIMIT."
-  ></metric>
-  <metric
-    name="SPI_RA_WVLIM_STALL_HS" block=SPI event=131 descr="Number of clocks hs is stalled due to WAVE LIMIT."
-  ></metric>
-  <metric
-    name="SPI_RA_WVLIM_STALL_CSG" block=SPI event=132 descr="Number of clocks csg is stalled due to WAVE LIMIT."
-  ></metric>
-  <metric
-    name="SPI_RA_WVLIM_STALL_CSN" block=SPI event=133 descr="Number of clocks csn is stalled due to WAVE LIMIT."
-  ></metric>
-  <metric
-    name="SPI_RA_VS_LOCK" block=SPI event=134 descr="Arb cycles VS has a CU locked when !fits and active_cnt < threshold. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_GS_LOCK" block=SPI event=135 descr="Arb cycles GS has a CU locked when !fits and active_cnt < threshold. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_HS_LOCK" block=SPI event=136 descr="Arb cycles HS has a CU locked when !fits and active_cnt < threshold. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_CSG_LOCK" block=SPI event=137 descr="Arb cycles CSG has a CU locked when !fits and active_cnt < threshold. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_CSN_LOCK" block=SPI event=138 descr="Arb cycles CSN has a CU locked when !fits and active_cnt < threshold. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_RSV_UPD" block=SPI event=139 descr="Cycles spent doing updates for reservation changes, Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_EXP_ARB_COL_CNT" block=SPI event=140 descr="Sum of number of color exp requests pending each clk, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_EXP_ARB_PAR_CNT" block=SPI event=141 descr="Sum of number of parameter exp requests pending each clk, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_EXP_ARB_POS_CNT" block=SPI event=142 descr="Sum of number of position exp requests pending each clk, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_EXP_ARB_GDS_CNT" block=SPI event=143 descr="Sum of number of gds exp requests pending each clk, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_NUM_PS_COL_R0_EXPORTS" block=SPI event=144 descr="Number of PS color export grants in dwords for read 0, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is from WB0 and COL0 DEBUG_SH_SEL =1, source is from WB0 and COL1."
-  ></metric>
-  <metric
-    name="SPI_NUM_PS_COL_R1_EXPORTS" block=SPI event=145 descr="Number of PS color export grants in dwords for read 1, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is from WB0 and COL0 DEBUG_SH_SEL =1, source is from WB0 and COL1."
-  ></metric>
-  <metric
-    name="SPI_NUM_VS_POS_R0_EXPORTS" block=SPI event=146 descr="Number of VS position export grants in dwords for read 0, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_NUM_VS_POS_R1_EXPORTS" block=SPI event=147 descr="Number of VS position export grants in dwords for read 1, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_NUM_VS_PARAM_R0_EXPORTS" block=SPI event=148 descr="Number of VS parameter export grants in dwords for read 0, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_NUM_VS_PARAM_R1_EXPORTS" block=SPI event=149 descr="Number of VS parameter export grants in dwords for read 1, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_NUM_VS_GDS_R0_EXPORTS" block=SPI event=150 descr="Number of gds export grants in dwords for read 0, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_NUM_VS_GDS_R1_EXPORTS" block=SPI event=151 descr="Number of gds export grants in dwords for read 1, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_NUM_EXPGRANT_EXPORTS" block=SPI event=152 descr="Number of cycles export bus is busy, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_CLKGATE_BUSY_STALL" block=SPI event=153 descr="Number of clocks with spi busy and not all_clocks_on"
-  ></metric>
-  <metric
-    name="SPI_CLKGATE_ACTIVE_STALL" block=SPI event=154 descr="Number of clocks with spim_active and not all_clocks_on."
-  ></metric>
-  <metric
-    name="SPI_CLKGATE_ALL_CLOCKS_ON" block=SPI event=155 descr="Number of clocks with all_clocks_on."
-  ></metric>
-  <metric
-    name="SPI_CLKGATE_CGTT_DYN_ON" block=SPI event=156 descr="Number of clocks with spi cgtt dyn clk on."
-  ></metric>
-  <metric
-    name="SPI_CLKGATE_CGTT_REG_ON" block=SPI event=157 descr="Number of clocks with spi cgtt reg clk on."
-  ></metric>
-  <metric
-    name="SPI_PIX_ALLOC_PEND_CNT" block=SPI event=158 descr="Sum of number of pixel alloc requests pending per clk, Source is WWC0"
-  ></metric>
-  <metric
-    name="SPI_PIX_ALLOC_SCB_STALL" block=SPI event=159 descr="Number of clks pix alloc stalled due to color scoreboard. Source is WWC0"
-  ></metric>
-  <metric
-    name="SPI_PIX_ALLOC_DB0_STALL" block=SPI event=160 descr="Number of clks pix alloc stalled due to db0 color buffer. Source is WWC0"
-  ></metric>
-  <metric
-    name="SPI_PIX_ALLOC_DB1_STALL" block=SPI event=161 descr="Number of clks pix alloc stalled due to db1 color buffer. Source is WWC0"
-  ></metric>
-  <metric
-    name="SPI_PIX_ALLOC_DB2_STALL" block=SPI event=162 descr="Number of clks pix alloc stalled due to db2 color buffer. Source is WWC0"
-  ></metric>
-  <metric
-    name="SPI_PIX_ALLOC_DB3_STALL" block=SPI event=163 descr="Number of clks pix alloc stalled due to db3 color buffer. Source is WWC0"
-  ></metric>
-  <metric
-    name="SPI_PC_ALLOC_ACCUM" block=SPI event=164 descr="Accumulation of PC space allocated during perf window. Divide by PC_ALLOC_CNT to get avg allocation duration of each PC line (VS alloc to PS dealloc). AKA pc_free_ptr-"
-  ></metric>
-  <metric
-    name="SPI_GS_NGG_SE_HAS_BATON" block=SPI event=165 descr="Number of clocks this SE owns the baton"
-  ></metric>
-  <metric
-    name="SPI_GS_NGG_SE_DOES_NOT_HAVE_BATON" block=SPI event=166 descr="Number of clocks this SE does not have the baton"
-  ></metric>
-  <metric
-    name="SPI_GS_NGG_SE_FORWARDED_BATON" block=SPI event=167 descr="This SE has forwarded the baton"
-  ></metric>
-  <metric
-    name="SPI_GS_NGG_SE_AT_SYNC_EVENT" block=SPI event=168 descr="Number of clocks this SE at sync event (enable_legacy, enable_ngg, reset_to_lowest_vgt or set_next_feid"
-  ></metric>
-  <metric
-    name="SPI_GS_NGG_SE_SG_ALLOC_PC_SPACE_CNT" block=SPI event=169 descr="Allocation of PC space per GS subgroup by this SE"
-  ></metric>
-  <metric
-    name="SPI_GS_NGG_SE_DEALLOC_PC_SPACE_CNT" block=SPI event=170 descr="De-Allocation of PC space as received from PS by this SE"
-  ></metric>
-  <metric
-    name="SPI_GS_NGG_PC_FULL" block=SPI event=171 descr="This SE reports parameter cache is full"
-  ></metric>
-  <metric
-    name="SPI_GS_NGG_SE_SEND_GS_ALLOC" block=SPI event=172 descr="GS granting PC allocations per surviving wave on this SE"
-  ></metric>
-  <metric
-    name="SPI_GS_NGG_GS_ALLOC_FIFO_EMPTY" block=SPI event=173 descr="GS allocation fifo is empty - no GS waves pending allocation on this SE"
-  ></metric>
-  <metric
-    name="SPI_GSC_VTX_BUSY" block=SPI event=174 descr="vtx controller busy"
-  ></metric>
-  <metric
-    name="SPI_GSC_VTX_INPUT_STARVED" block=SPI event=175 descr="There are no more prims to process and VSRs are empty"
-  ></metric>
-  <metric
-    name="SPI_GSC_VTX_VSR_STALL" block=SPI event=176 descr="vtx controller stalled"
-  ></metric>
-  <metric
-    name="SPI_GSC_VTX_VSR_FULL" block=SPI event=177 descr="all VSRs are full or being read by VGPR controller"
-  ></metric>
-  <metric
-    name="SPI_GSC_VTX_CAC_BUSY" block=SPI event=178 descr="vtx controller writing to VSRs"
-  ></metric>
-  <metric
-    name="SPI_ESC_VTX_BUSY" block=SPI event=179 descr="vtx controller busy"
-  ></metric>
-  <metric
-    name="SPI_ESC_VTX_INPUT_STARVED" block=SPI event=180 descr="There are no more verts to process and VSRs are empty"
-  ></metric>
-  <metric
-    name="SPI_ESC_VTX_VSR_STALL" block=SPI event=181 descr="vtx controller stalled"
-  ></metric>
-  <metric
-    name="SPI_ESC_VTX_VSR_FULL" block=SPI event=182 descr="all VSRs are full or being read by VGPR controller"
-  ></metric>
-  <metric
-    name="SPI_ESC_VTX_CAC_BUSY" block=SPI event=183 descr="vtx controller writing to VSRs"
-  ></metric>
-  <metric
-    name="SPI_SWC_PS_WR" block=SPI event=184 descr="Number of clocks to write PS waves to SGPRs (need to multiply this value by 4)"
-  ></metric>
-  <metric
-    name="SPI_SWC_VS_WR" block=SPI event=185 descr="Number of clocks to write VS waves to SGPRs (need to multiply this value by 4)"
-  ></metric>
-  <metric
-    name="SPI_SWC_GS_WR" block=SPI event=186 descr="Number of clocks to write GS waves to SGPRs (need to multiply this value by 4)"
-  ></metric>
-  <metric
-    name="SPI_SWC_HS_WR" block=SPI event=187 descr="Number of clocks to write HS waves to SGPRs (need to multiply this value by 4)"
-  ></metric>
-  <metric
-    name="SPI_SWC_CSG_WR" block=SPI event=188 descr="Number of clocks to write CSG waves to SGPRs (need to multiply this value by 4)"
-  ></metric>
-  <metric
-    name="SPI_SWC_CSC_WR" block=SPI event=189 descr="Number of clocks to write CSC waves to SGPRs (need to multiply this value by 4) Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_VWC_PS_WR" block=SPI event=190 descr="Number of clocks to write PS waves to VGPRs (need to multiply this value by 4)"
-  ></metric>
-  <metric
-    name="SPI_VWC_VS_WR" block=SPI event=191 descr="Number of clocks to write VS waves to VGPRs (need to multiply this value by 4)"
-  ></metric>
-  <metric
-    name="SPI_VWC_GS_WR" block=SPI event=192 descr="Number of clocks to write GS waves to VGPRs (need to multiply this value by 4)"
-  ></metric>
-  <metric
-    name="SPI_VWC_HS_WR" block=SPI event=193 descr="Number of clocks to write HS waves to VGPRs (need to multiply this value by 4)"
-  ></metric>
-  <metric
-    name="SPI_VWC_CSG_WR" block=SPI event=194 descr="Number of clocks to write CSG waves to VGPRs (need to multiply this value by 4)"
-  ></metric>
-  <metric
-    name="SPI_VWC_CSC_WR" block=SPI event=195 descr="Number of clocks to write CSC waves to VGPRs (need to multiply this value by 4) Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSC_TG_SPLIT_ALLOW" block=SPI event=196 descr="Number of TG with split allowed. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSC_TG_SPLIT_TRIGGER" block=SPI event=197 descr="Number of TG with split enabled. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSC_TG_SPLIT_PASS" block=SPI event=198 descr="Number of TG with split passed. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSC_SUB_TG_NUM_EQ_2" block=SPI event=199 descr="Number of TG with split sub_tg_num==2. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSC_SUB_TG_NUM_EQ_3" block=SPI event=200 descr="Number of TG with split sub_tg_num==3. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSC_SUB_TG_NUM_EQ_4" block=SPI event=201 descr="Number of TG with split sub_tg_num==4. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSC_SUB_TG_NUM_EQ_5" block=SPI event=202 descr="Number of TG with split sub_tg_num==5. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSC_SUB_TG_NUM_EQ_6" block=SPI event=203 descr="Number of TG with split sub_tg_num==6. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSC_SUB_TG_NUM_EQ_7" block=SPI event=204 descr="Number of TG with split sub_tg_num==7. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSC_SUB_TG_NUM_EQ_8" block=SPI event=205 descr="Number of TG with split sub_tg_num==8. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSC_SUB_TG_NUM_EQ_9" block=SPI event=206 descr="Number of TG with split sub_tg_num==9. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSC_SUB_TG_NUM_EQ_10" block=SPI event=207 descr="Number of TG with split sub_tg_num==10. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSC_SUB_TG_NUM_EQ_11" block=SPI event=208 descr="Number of TG with split sub_tg_num==11. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSC_SUB_TG_NUM_EQ_12" block=SPI event=209 descr="Number of TG with split sub_tg_num==12. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSC_SUB_TG_NUM_EQ_13" block=SPI event=210 descr="Number of TG with split sub_tg_num==13. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSC_SUB_TG_NUM_EQ_14" block=SPI event=211 descr="Number of TG with split sub_tg_num==14. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSC_SUB_TG_NUM_EQ_15" block=SPI event=212 descr="Number of TG with split sub_tg_num==15. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSC_SUB_TG_NUM_EQ_16" block=SPI event=213 descr="Number of TG with split sub_tg_num==16. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSC_TG_SPLIT_PASS_AT_LVL0" block=SPI event=214 descr="Number of TG split pass at level0. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSC_TG_SPLIT_PASS_AT_LVL1" block=SPI event=215 descr="Number of TG split pass at level1. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSC_TG_SPLIT_PASS_AT_LVL2" block=SPI event=216 descr="Number of TG split pass at level2. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSC_TG_SPLIT_PASS_AT_LVL3" block=SPI event=217 descr="Number of TG split pass at level3. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSC_TG_SPLIT_TRY_AT_LVL0" block=SPI event=218 descr="Number of TG split try at level0. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSC_TG_SPLIT_TRY_AT_LVL1" block=SPI event=219 descr="Number of TG split try at level1. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSC_TG_SPLIT_TRY_AT_LVL2" block=SPI event=220 descr="Number of TG split try at level2. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSC_TG_SPLIT_TRY_AT_LVL3" block=SPI event=221 descr="Number of TG split try at level3. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  # SQ counters
-  <metric
-    name="SQ_NONE" block=SQ event=0 descr="Don't count anything."
-  ></metric>
-  <metric
-    name="SQ_ACCUM_PREV" block=SQ event=1 descr="For counter N, increment by the value of counter N-1. Only accumulates once every 4 cycles."
-  ></metric>
-  <metric
-    name="SQ_CYCLES" block=SQ event=2 descr="Clock cycles. (nondeterministic, per-simd, global)"
-  ></metric>
-  <metric
-    name="SQ_BUSY_CYCLES" block=SQ event=3 descr="Clock cycles while SQ is reporting that it is busy. (nondeterministic, per-simd, global)"
-  ></metric>
-  <metric
-    name="SQ_WAVES" block=SQ event=4 descr="Count number of waves sent to SQs. (per-simd, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_LEVEL_WAVES" block=SQ event=5 descr="Track the number of waves. Set ACCUM_PREV for the next counter to use this. (level, per-simd, global)"
-  ></metric>
-  <metric
-    name="SQ_WAVES_EQ_64" block=SQ event=6 descr="Count number of waves with exactly 64 active threads sent to SQs. (per-simd, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_WAVES_LT_64" block=SQ event=7 descr="Count number of waves with <64 active threads sent to SQs. (per-simd, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_WAVES_LT_48" block=SQ event=8 descr="Count number of waves with <48 active threads sent to SQs. (per-simd, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_WAVES_LT_32" block=SQ event=9 descr="Count number of waves sent <32 active threads sent to SQs. (per-simd, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_WAVES_LT_16" block=SQ event=10 descr="Count number of waves sent <16 active threads sent to SQs. (per-simd, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_WAVES_CU" block=SQ event=11 descr="Count number of waves sent to CUs. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_LEVEL_WAVES_CU" block=SQ event=12 descr="Track the number of waves. Set ACCUM_PREV for the next counter to use this. (level, per-simd)"
-  ></metric>
-  <metric
-    name="SQ_BUSY_CU_CYCLES" block=SQ event=13 descr="Count quad-cycles each CU is busy. (nondeterministic, per-simd)"
-  ></metric>
-  <metric
-    name="SQ_ITEMS" block=SQ event=14 descr="Number of valid items per wave. (per-simd, global)"
-  ></metric>
-  <metric
-    name="SQ_QUADS" block=SQ event=15 descr="Number of completely or partially covered quads per wave. (per-simd, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_EVENTS" block=SQ event=16 descr="Number of events. (unwindowed, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_SURF_SYNCS" block=SQ event=17 descr="Number of surface syncs. (unwindowed, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_TTRACE_REQS" block=SQ event=18 descr="Number of thread trace requests. (unwindowed, global, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_TTRACE_INFLIGHT_REQS" block=SQ event=19 descr="Number of in-flight thread trace requests. (nondeterministic, unwindowed, global)"
-  ></metric>
-  <metric
-    name="SQ_TTRACE_STALL" block=SQ event=20 descr="Number of cycles thread trace stalls stalled execution. (nondeterministic, unwindowed, global)"
-  ></metric>
-  <metric
-    name="SQ_MSG_CNTR" block=SQ event=21 descr="Number of counter messages. (nondeterministic, unwindowed, global)"
-  ></metric>
-  <metric
-    name="SQ_MSG_PERF" block=SQ event=22 descr="Number of perfcounter messages. (nondeterministic, unwindowed), global"
-  ></metric>
-  <metric
-    name="SQ_MSG_GSCNT" block=SQ event=23 descr="Number of geometry messages. (emulated, unwindowed, global)"
-  ></metric>
-  <metric
-    name="SQ_MSG_INTERRUPT" block=SQ event=24 descr="Number of interrupt messages. (emulated, unwindowed, global)"
-  ></metric>
-  <metric
-    name="SQ_INSTS" block=SQ event=25 descr="Number of instructions issued. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VALU" block=SQ event=26 descr="Number of VALU instructions issued. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VALU_ADD_F16" block=SQ event=27 descr="Number of VALU ADD/SUB instructions on float16. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VALU_MUL_F16" block=SQ event=28 descr="Number of VALU MUL instructions on float16. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VALU_FMA_F16" block=SQ event=29 descr="Number of VALU FMA/MAD instructions on float16. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VALU_TRANS_F16" block=SQ event=30 descr="Number of VALU transcendental instructions on float16. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VALU_ADD_F32" block=SQ event=31 descr="Number of VALU ADD/SUB instructions on float32. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VALU_MUL_F32" block=SQ event=32 descr="Number of VALU MUL instructions on float32. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VALU_FMA_F32" block=SQ event=33 descr="Number of VALU FMA/MAD instructions on float32. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VALU_TRANS_F32" block=SQ event=34 descr="Number of VALU transcendental instructions on float32. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VALU_ADD_F64" block=SQ event=35 descr="Number of VALU ADD/SUB instructions on float64. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VALU_MUL_F64" block=SQ event=36 descr="Number of VALU MUL instructions on float64. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VALU_FMA_F64" block=SQ event=37 descr="Number of VALU FMA/MAD instructions on float64. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VALU_TRANS_F64" block=SQ event=38 descr="Number of VALU transcendental instructions on float64. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VALU_INT32" block=SQ event=39 descr="Number of VALU 32-bit integer (signed or unsigned) instructions. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VALU_INT64" block=SQ event=40 descr="Number of VALU 64-bit integer (signed or unsigned) instructions. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VALU_CVT" block=SQ event=41 descr="Number of VALU data conversion instructions. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VALU_MFMA_I8" block=SQ event=42 descr="Number of VALU V_MFMA_*_I8 instructions. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VALU_MFMA_F16" block=SQ event=43 descr="Number of VALU V_MFMA_*_F16 instructions. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VALU_MFMA_BF16" block=SQ event=44 descr="Number of VALU V_MFMA_*_BF16 instructions. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VALU_MFMA_F32" block=SQ event=45 descr="Number of VALU V_MFMA_*_F32 instructions. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VALU_MFMA_F64" block=SQ event=46 descr="Number of VALU V_MFMA_*_F64 instructions. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VALU_MFMA_MOPS_I8" block=SQ event=47 descr="Number of VALU matrix math operations (add or mul) performed dividied by 512, assuming a full EXEC mask, of data type I8. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VALU_MFMA_MOPS_F16" block=SQ event=48 descr="Number of VALU matrix math operations (add or mul) performed dividied by 512, assuming a full EXEC mask, of data type F16. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VALU_MFMA_MOPS_BF16" block=SQ event=49 descr="Number of VALU matrix math operations (add or mul) performed dividied by 512, assuming a full EXEC mask, of data type BF16. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VALU_MFMA_MOPS_F32" block=SQ event=50 descr="Number of VALU matrix math operations (add or mul) performed dividied by 512, assuming a full EXEC mask, of data type F32. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VALU_MFMA_MOPS_F64" block=SQ event=51 descr="Number of VALU matrix math operations (add or mul) performed dividied by 512, assuming a full EXEC mask, of data type F64. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_MFMA" block=SQ event=52 descr="Number of MFMA instructions issued. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VMEM_WR" block=SQ event=53 descr="Number of VMEM write instructions issued (including FLAT). (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VMEM_RD" block=SQ event=54 descr="Number of VMEM read instructions issued (including FLAT). (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VMEM" block=SQ event=55 descr="Number of VMEM instructions issued. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_SALU" block=SQ event=56 descr="Number of SALU instructions issued. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_SMEM" block=SQ event=57 descr="Number of SMEM instructions issued. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_FLAT" block=SQ event=58 descr="Number of FLAT instructions issued. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_FLAT_LDS_ONLY" block=SQ event=59 descr="Number of FLAT instructions issued that read/wrote only from/to LDS (only works if EARLY_TA_DONE is enabled). (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_LDS" block=SQ event=60 descr="Number of LDS instructions issued (including FLAT). (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_GDS" block=SQ event=61 descr="Number of GDS instructions issued. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_EXP" block=SQ event=62 descr="Number of EXP instructions issued, excluding skipped export instructions. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_EXP_GDS" block=SQ event=63 descr="Number of EXP and GDS instructions issued, excluding skipped export instructions. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_BRANCH" block=SQ event=64 descr="Number of Branch instructions issued. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_SENDMSG" block=SQ event=65 descr="Number of Sendmsg instructions issued. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VSKIPPED" block=SQ event=66 descr="Number of vector instructions skipped. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INST_LEVEL_VMEM" block=SQ event=67 descr="Number of in-flight VMEM instructions. Set next counter to ACCUM_PREV and divide by INSTS_VMEM for average latency. Includes FLAT instructions. (per-simd, level, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_INST_LEVEL_SMEM" block=SQ event=68 descr="Number of in-flight SMEM instructions (*2 load/store; *2 atomic; *2 memtime; *4 wb/inv). Set next counter to ACCUM_PREV and divide by INSTS_SMEM for average latency per smem request. Falls slightly short of total request latency because some fetches are divided into two requests that may finish at different times and this counter collects the average latency of the two. (per-simd, level, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_INST_LEVEL_LDS" block=SQ event=69 descr="Number of in-flight LDS instructions. Set next counter to ACCUM_PREV and divide by INSTS_LDS for average latency. Includes FLAT instructions. (per-simd, level, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_INST_LEVEL_GDS" block=SQ event=70 descr="Number of in-flight GDS instructions. Set next counter to ACCUM_PREV and divide by INSTS_GDS for average latency. (per-simd, level, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_INST_LEVEL_EXP" block=SQ event=71 descr="Number of in-flight EXP instructions. Set next counter to ACCUM_PREV and divide by INSTS_EXP for average latency. (per-simd, level, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_VALU_MFMA_BUSY_CYCLES" block=SQ event=72 descr="Number of cycles the MFMA ALU is busy (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_VALU_MFMA_COEXEC_CYCLES" block=SQ event=73 descr="Number of cycles in which MFMA VALU was busy and a normal VALU instruction was issued (co-execution) (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAVE_CYCLES" block=SQ event=74 descr="Number of wave-cycles spent by waves in the CUs (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAVE_READY" block=SQ event=75 descr="Number of wave-cycles waves were ready to execute the next instruction (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_CNT_VM" block=SQ event=76 descr="Number of wave-cycles spent waiting for VM counter. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_CNT_LGKM" block=SQ event=77 descr="Number of wave-cycles spent waiting for LGKM counter. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_CNT_EXP" block=SQ event=78 descr="Number of wave-cycles spent waiting for EXP counter. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_CNT_ANY" block=SQ event=79 descr="Number of wave-cycles spent waiting for any counter. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_BARRIER" block=SQ event=80 descr="Number of wave-cycles spent waiting for a barrier. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_EXP_ALLOC" block=SQ event=81 descr="Number of wave-cycles spent waiting for export allocation (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_SLEEP" block=SQ event=82 descr="Number of wave-cycles spent waiting for sleep to finish (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_SLEEP_XNACK" block=SQ event=83 descr="Number of wave-cycles spent waiting for xnack sleep to finish (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_OTHER" block=SQ event=84 descr="Number of wave-cycles spent waiting for dependency stalls (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_ANY" block=SQ event=85 descr="Number of wave-cycles spent waiting for anything (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_TTRACE" block=SQ event=86 descr="Number of wave-cycles spent waiting for thread trace stalls (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_IFETCH" block=SQ event=87 descr="Number of wave-cycles spent waiting for instructions to arrive (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_INST_ANY" block=SQ event=88 descr="Number of wave-cycles spent waiting for any instruction issue. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_INST_VMEM" block=SQ event=89 descr="Number of wave-cycles spent waiting for VMEM instruction issue. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_INST_SCA" block=SQ event=90 descr="Number of wave-cycles spent waiting for SALU or SMEM instruction issue. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_INST_LDS" block=SQ event=91 descr="Number of wave-cycles spent waiting for LDS instruction issue. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_INST_VALU" block=SQ event=92 descr="Number of wave-cycles spent waiting for VALU instrution issue. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_INST_EXP_GDS" block=SQ event=93 descr="Number of wave-cycles spent waiting for EXPORT or GDS instruction issue. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_INST_MISC" block=SQ event=94 descr="Number of wave-cycles spent waiting for BRANCH or SENDMSG instruction issue. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_INST_FLAT" block=SQ event=95 descr="Number of wave-cycles spent waiting for flat instruction issue. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_ACTIVE_INST_ANY" block=SQ event=96 descr="Number of cycles each wave is working on an instruction. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_ACTIVE_INST_VMEM" block=SQ event=97 descr="Number of cycles the SQ instruction arbiter is working on a VMEM instruction. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_ACTIVE_INST_LDS" block=SQ event=98 descr="Number of cycles the SQ instruction arbiter is working on a LDS instruction. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_ACTIVE_INST_VALU" block=SQ event=99 descr="Number of cycles the SQ instruction arbiter is working on a VALU instruction. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_ACTIVE_INST_SCA" block=SQ event=100 descr="Number of cycles the SQ instruction arbiter is working on a SALU or SMEM instruction. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_ACTIVE_INST_EXP_GDS" block=SQ event=101 descr="Number of cycles the SQ instruction arbiter is working on an EXPORT or GDS instruction. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_ACTIVE_INST_MISC" block=SQ event=102 descr="Number of cycles the SQ instruction aribter is working on a BRANCH or SENDMSG instruction. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_ACTIVE_INST_FLAT" block=SQ event=103 descr="Number of cycles the SQ instruction arbiter is working on a FLAT instruction. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INST_CYCLES_VMEM_WR" block=SQ event=104 descr="Number of cycles needed to send addr and cmd data for VMEM write instructions. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INST_CYCLES_VMEM_RD" block=SQ event=105 descr="Number of cycles needed to send addr and cmd data for VMEM read instructions. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INST_CYCLES_VMEM_ADDR" block=SQ event=106 descr="Number of cycles needed to send VMEM read/write addresses to TA. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INST_CYCLES_VMEM_DATA" block=SQ event=107 descr="Number of cycles needed to send VMEM write data to TA. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INST_CYCLES_VMEM_CMD" block=SQ event=108 descr="Number of cycles needed to send VMEM command to TA. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INST_CYCLES_EXP" block=SQ event=109 descr="Number of cycles needed to export data for EXP instructions. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INST_CYCLES_GDS" block=SQ event=110 descr="Number of cycles needed to export data for GDS instructions. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INST_CYCLES_SMEM" block=SQ event=111 descr="Number of cycles needed to execute scalar memory reads. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INST_CYCLES_SALU" block=SQ event=112 descr="Number of cycles needed to execute non-memory read scalar operations. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_THREAD_CYCLES_VALU" block=SQ event=113 descr="Number of thread-cycles used to execute VALU operations (similar to INST_CYCLES_VALU but multiplied by # of active threads). (per-simd)"
-  ></metric>
-  <metric
-    name="SQ_THREAD_CYCLES_VALU_MAX" block=SQ event=114 descr="Maximum number of thread-cycles VALU operations that could have been executed given the instruction mix (similar to INST_CYCLES_VALU but multiplied by # of active threads). (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_IFETCH" block=SQ event=115 descr="Number of instruction fetch requests from cache. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_IFETCH_LEVEL" block=SQ event=116 descr="Number of instruction fetch requests from cache. (per-simd, level)"
-  ></metric>
-  <metric
-    name="SQ_CBRANCH_FORK" block=SQ event=117 descr="Number of conditional branch instructions. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_CBRANCH_FORK_SPLIT" block=SQ event=118 descr="Number of conditional branch instructions that take both branches. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_VALU_LDS_DIRECT_RD" block=SQ event=119 descr="Number of LDS direct reads issued (excluding interpolation ops). (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_VALU_LDS_INTERP_OP" block=SQ event=120 descr="Number of LDS interpolation ops issued. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_LDS_BANK_CONFLICT" block=SQ event=121 descr="Number of cycles LDS is stalled by bank conflicts. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_LDS_ADDR_CONFLICT" block=SQ event=122 descr="Number of cycles LDS is stalled by address conflicts. (emulated,nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_LDS_UNALIGNED_STALL" block=SQ event=123 descr="Number of cycles LDS is stalled processing flat unaligned load/store ops. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_LDS_MEM_VIOLATIONS" block=SQ event=124 descr="Number of threads that have a memory violation in the LDS.(emulated)"
-  ></metric>
-  <metric
-    name="SQ_LDS_ATOMIC_RETURN" block=SQ event=125 descr="Number of atomic return cycles in LDS. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_LDS_IDX_ACTIVE" block=SQ event=126 descr="Number of cycles LDS is used for indexed (non-direct,non-interpolation) operations. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_VALU_DEP_STALL" block=SQ event=127 descr="Number of cycles VALU is stalled by previous instructions due to dependencies (wait state count). (nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_VALU_STARVE" block=SQ event=128 descr="Number of cycles VALU is starved while waves are present. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_TA_STARVE" block=SQ event=129 descr="Number of cycles SQ_TA_cmd interface is starved while waves are present. (nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_EXP_REQ_FIFO_FULL" block=SQ event=130 descr="Number of cycles export request fifo is full. (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_LDS_DATA_FIFO_FULL" block=SQ event=131 descr="Number of cycles LDS data fifo is full. (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_LDS_CMD_FIFO_FULL" block=SQ event=132 descr="Number of cycles LDS command fifo is full. (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_VMEM_TA_ADDR_FIFO_FULL" block=SQ event=133 descr="Number of cycles texture requests are stalled due to full address fifo in TA. (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_VMEM_TA_CMD_FIFO_FULL" block=SQ event=134 descr="Number of cycles texture requests are stalled due to full cmd fifo in TA. (nondeterministic, unwindowed)."
-  ></metric>
-  <metric
-    name="SQ_VMEM_EX_DATA_REG_BUSY" block=SQ event=135 descr="Number of cycles texture requests are stalled due to full data staging register in EX. (nondeterministic, unwindowed)."
-  ></metric>
-  <metric
-    name="SQ_VMEM_WR_TA_DATA_FIFO_FULL" block=SQ event=136 descr="Number of cycles texture writes are stalled due to full data fifo in TA. (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_VALU_SRC_C_CONFLICT" block=SQ event=137 descr="Number of cycles VALU is stalled by arbitration due to src c conflict. (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_VMEM_RD_SRC_CD_CONFLICT" block=SQ event=138 descr="Number of cycles VMEM_RD instructions are stalled due to VGPR port conflicts. (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_VMEM_WR_SRC_CD_CONFLICT" block=SQ event=139 descr="Number of cycles VMEM_WR instructions are stalled due to VGPR port conflicts. (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_FLAT_SRC_CD_CONFLICT" block=SQ event=140 descr="Number of cycles FLAT instructions are stalled due to VGPR port conflicts. (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_LDS_SRC_CD_CONFLICT" block=SQ event=141 descr="Number of cycles LDS instructions are stalled due to VGPR port conflicts. (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_SRC_CD_BUSY" block=SQ event=142 descr="Number of total accesses of port C and D (up to 2 per cycle). (per-simd)"
-  ></metric>
-  <metric
-    name="SQ_PT_POWER_STALL" block=SQ event=143 descr="Number of cycles the power throttle indicated ALU should stall (ignores whether something actually got stalled). (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_USER0" block=SQ event=144 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 0. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER1" block=SQ event=145 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 1. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER2" block=SQ event=146 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 2. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER3" block=SQ event=147 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 3. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER4" block=SQ event=148 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 4. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER5" block=SQ event=149 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 5. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER6" block=SQ event=150 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 6. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER7" block=SQ event=151 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 7. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER8" block=SQ event=152 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 8. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER9" block=SQ event=153 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 9. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER10" block=SQ event=154 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 10. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER11" block=SQ event=155 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 11. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER12" block=SQ event=156 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 12. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER13" block=SQ event=157 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 13. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER14" block=SQ event=158 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 14. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER15" block=SQ event=159 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 15. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL0" block=SQ event=160 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL when SIMM16[3:0] == 0. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL1" block=SQ event=161 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 1. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL2" block=SQ event=162 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 2. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL3" block=SQ event=163 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 3. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL4" block=SQ event=164 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 4. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL5" block=SQ event=165 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 5. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL6" block=SQ event=166 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 6. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL7" block=SQ event=167 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 7. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL8" block=SQ event=168 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 8. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL9" block=SQ event=169 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 9. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL10" block=SQ event=170 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 10. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL11" block=SQ event=171 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 11. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL12" block=SQ event=172 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 12. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL13" block=SQ event=173 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 13. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL14" block=SQ event=174 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 14. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL15" block=SQ event=175 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 15. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_POWER_VALU" block=SQ event=176 descr="Number of CAC pulses for ALU instructions (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_POWER_VALU0" block=SQ event=177 descr="Number of CAC pulses for ALU instructions in group 0 (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_POWER_VALU1" block=SQ event=178 descr="Number of CAC pulses for ALU instructions in group 1 (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_POWER_VALU2" block=SQ event=179 descr="Number of CAC pulses for ALU instructions in group 2 (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_POWER_GPR_RD" block=SQ event=180 descr="Number of CAC pulses for GPR reads (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_POWER_GPR_WR" block=SQ event=181 descr="Number of CAC pulses for GPR writes (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_POWER_LDS_BUSY" block=SQ event=182 descr="Number of CAC pulses for cycles LDS clocks are active (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_POWER_ALU_BUSY" block=SQ event=183 descr="Number of CAC pulses for cycles ALU clocks are active (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_POWER_TEX_BUSY" block=SQ event=184 descr="Number of CAC pulses for cycles texture clocks are active (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_ACCUM_PREV_HIRES" block=SQ event=185 descr="For counter N, increment by the value of counter N-1."
-  ></metric>
-  <metric
-    name="SQ_WAVES_RESTORED" block=SQ event=186 descr="Count number of context-restored waves sent to SQs. (per-simd, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_WAVES_SAVED" block=SQ event=187 descr="Count number of context-saved waves. (per-simd, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_SMEM_NORM" block=SQ event=188 descr="Number of SMEM instructions issued normalized to match smem_level (*2 load/store; *2 atomic; *2 memtime; *4 wb/inv). (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_XNACK_FIRST" block=SQ event=189 descr="Number of first xnack from TA. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_XNACK_ALL" block=SQ event=190 descr="Number of all xnack from TA. (per-simd)"
-  ></metric>
-  <metric
-    name="SQ_XNACK_FIFO_FULL" block=SQ event=191 descr="Number of cycles XNACK fifo is full. (per-simd, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_IFETCH_XNACK" block=SQ event=192 descr="Number of instruction fetch xnack from SQC. (per-simd)"
-  ></metric>
-  <metric
-    name="SQ_TLB_SHOOTDOWN" block=SQ event=193 descr="Number of TLB shootdowns. (unwindowed, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_TLB_SHOOTDOWN_CYCLES" block=SQ event=194 descr="Number of cycles in which a TLB shootdown is active. (unwindowed, global)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VMEM_WR_REPLAY" block=SQ event=195 descr="Number of VMEM write instructions replayed (including FLAT). (excluding instructions issued). (per-simd, emulated, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VMEM_RD_REPLAY" block=SQ event=196 descr="Number of VMEM read instructions replayed (including FLAT). (excluding instructions issued). (per-simd, emulated, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VMEM_REPLAY" block=SQ event=197 descr="Number of VMEM instructions replayed. (excluding instructions issued). (per-simd, emulated, nondeterministicd)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_SMEM_REPLAY" block=SQ event=198 descr="Number of SMEM instructions replayed. (excluding instructions issued). (per-simd, emulated, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_SMEM_NORM_REPLAY" block=SQ event=199 descr="Number of SMEM instructions replayed normalized to match smem_level (*2 load/store; *2 atomic; *2 memtime; *4 wb/inv). (excluding instructions issued). (per-simd, emulated, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_FLAT_REPLAY" block=SQ event=200 descr="Number of FLAT instructions replayed. (excluding instructions issued). (per-simd, emulated, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_UTCL1_TRANSLATION_MISS" block=SQ event=201 descr="Total UTCL1 translation misses"
-  ></metric>
-  <metric
-    name="SQ_UTCL1_PERMISSION_MISS" block=SQ event=202 descr="Total UTCL1 permission misses"
-  ></metric>
-  <metric
-    name="SQ_UTCL1_TRANSLATION_HIT_EVENT" block=SQ event=203 descr="Total UTCL1 translation hit events"
-  ></metric>
-  <metric
-    name="SQ_UTCL1_REQUEST" block=SQ event=204 descr="Total UTCL1 NORMAL requests"
-  ></metric>
-  <metric
-    name="SQ_UTCL1_STALL_MISSFIFO_FULL" block=SQ event=205 descr="Total UTCL1 stall due to full miss fifo"
-  ></metric>
-  <metric
-    name="SQ_UTCL1_STALL_INFLIGHT_MAX" block=SQ event=206 descr="Total UTCL1 stalls due to inflight counter saturation"
-  ></metric>
-  <metric
-    name="SQ_UTCL1_STALL_LRU_INFLIGHT" block=SQ event=207 descr="Total UTCL1 stalls due to LRU cache line with traffic inflight"
-  ></metric>
-  <metric
-    name="SQ_UTCL1_LFIFO_FULL" block=SQ event=208 descr="Total UTCL1 latency hiding fifo full cycles"
-  ></metric>
-  <metric
-    name="SQ_UTCL1_STALL_LFIFO_NOT_RES" block=SQ event=209 descr="Total UTCL1 stalls due to latency latency hiding fifo output not resident"
-  ></metric>
-  <metric
-    name="SQ_UTCL1_STALL_UTCL2_REQ_OUT_OF_CREDITS" block=SQ event=210 descr="Total UTCL1 stalls due to UTCL2 requests out of credits"
-  ></metric>
-  <metric
-    name="SQ_DUMMY_END" block=SQ event=211 descr="Just a placeholding enum to indicate the end of real SQ performance counter. Not a real performance counter."
-  ></metric>
-  <metric
-    name="SQ_DUMMY_LAST" block=SQ event=255 descr="Just a placeholding enum to separate SQ from SQC counters. Not a real performance counter."
-  ></metric>
-  <metric
-    name="SQC_ICACHE_INPUT_VALID_READY" block=SQ event=256 descr="Successful Transaction (per-SQ, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_INPUT_VALID_READYB" block=SQ event=257 descr="Input stalled by SQC (per-SQ, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_INPUT_VALIDB" block=SQ event=258 descr="SQC starved (per-SQ, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_INPUT_VALID_READY" block=SQ event=259 descr="Successful Transaction (per-SQ, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_INPUT_VALID_READYB" block=SQ event=260 descr="Input stalled by SQC (per-SQ, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_INPUT_VALIDB" block=SQ event=261 descr="SQC starved (per-SQ, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_TC_REQ" block=SQ event=262 descr="Total number of TC requests that were issued by instruction and constant caches. (No-Masking, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_TC_INST_REQ" block=SQ event=263 descr="Number of insruction requests to the TC (No-Masking, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_TC_DATA_READ_REQ" block=SQ event=264 descr="Number of data read requests to the TC (No-Masking, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_TC_DATA_WRITE_REQ" block=SQ event=265 descr="Number of data write requests to the TC (No-Masking, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_TC_DATA_ATOMIC_REQ" block=SQ event=266 descr="Number of data atomic requests to the TC (No-Masking, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_TC_STALL" block=SQ event=267 descr="Valid request stalled TC request interface (no-credits). (No-Masking, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_TC_STARVE" block=SQ event=268 descr="No requests sent to TC while credits available. (No-Masking, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_BUSY_CYCLES" block=SQ event=269 descr="Clock cycles while cache is reporting that it is busy. (No-Masking, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_REQ" block=SQ event=270 descr="Number of requests. (per-SQ, per-Bank)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_HITS" block=SQ event=271 descr="Number of cache hits. (per-SQ, per-Bank, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_MISSES" block=SQ event=272 descr="Number of cache misses, includes uncached requests. (per-SQ, per-Bank, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_MISSES_DUPLICATE" block=SQ event=273 descr="Number of misses that were duplicates (access to a non-resident, miss pending CL). (per-SQ, per-Bank, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_INVAL_INST" block=SQ event=274 descr="Number of cache invalidations caused by instructions (No-Masking)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_INVAL_ASYNC" block=SQ event=275 descr="Number of asynchronous invalidates (surface sync, register write, etc.) (No-Masking, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_INPUT_STALL_ARB_NO_GRANT" block=SQ event=276 descr="Number of arbitration stalls due to lost arbitration to other SQs. (per-SQ, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_INPUT_STALL_BANK_READYB" block=SQ event=277 descr="Number of arbitration stalls due to bank stalling. (per-SQ, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_CACHE_STALLED" block=SQ event=278 descr="Number of cache stalls. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_CACHE_STALL_INFLIGHT_NONZERO" block=SQ event=279 descr="Number of cycles stalled because allocated line has nonzero inflight. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_CACHE_STALL_INFLIGHT_MAX" block=SQ event=280 descr="Number of cycles stalled on a hit CL but inflight counter is maxed out. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_CACHE_STALL_OUTPUT" block=SQ event=281 descr="Number of cycles stalled at cache controller output. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_CACHE_STALL_OUTPUT_MISS_FIFO" block=SQ event=282 descr="Number of cycles stalled because the miss FIFO is full. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_CACHE_STALL_OUTPUT_HIT_FIFO" block=SQ event=283 descr="Number of cycles stalled because a hit FIFO is full. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_CACHE_STALL_OUTPUT_TC_IF" block=SQ event=284 descr="Number of cycles stalled because the TC request interface is stalled. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_STALL_OUTXBAR_ARB_NO_GRANT" block=SQ event=285 descr="Number of arbitration stalls due to lost arbitration for the output port. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_PREFETCH_1" block=SQ event=286 descr="Number of prefetch requests granted. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_PREFETCH_2" block=SQ event=287 descr="Not used in MI200. Always return 0 if read."
-  ></metric>
-  <metric
-    name="SQC_ICACHE_PREFETCH_FILTERED" block=SQ event=288 descr="Number of prefetch requests filtered out. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_BUSY_CYCLES" block=SQ event=289 descr="Clock cycles while cache is reporting that it is busy. (No-Masking, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ" block=SQ event=290 descr="Number of requests (post-bank-serialization). (per-SQ, per-Bank)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_HITS" block=SQ event=291 descr="Number of cache hits. (per-SQ, per-Bank, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_MISSES" block=SQ event=292 descr="Number of cache misses, includes uncached requests. (per-SQ, per-Bank, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_MISSES_DUPLICATE" block=SQ event=293 descr="Number of misses that were duplicates (access to a non-resident, miss pending CL). (per-SQ, per-Bank, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_HIT_LRU_READ" block=SQ event=294 descr="Number of HIT_LRU read requests. (per-SQ, per-Bank)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_MISS_EVICT_READ" block=SQ event=295 descr="Number of MISS_EVICT read requests. (per-SQ, per-Bank)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_WC_LRU_WRITE" block=SQ event=296 descr="Number of WC_LRU write requests. (per-SQ, per-Bank)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_WT_EVICT_WRITE" block=SQ event=297 descr="Number of WT_EVICT write requests. (per-SQ, per-Bank)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_ATOMIC" block=SQ event=298 descr="Number of atomic requests. (per-SQ, per-Bank)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_VOLATILE" block=SQ event=299 descr="Number of volatile cache requests. (per-SQ, per-Bank)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_INVAL_INST" block=SQ event=300 descr="Number of cache invalidations caused by instructions (No-Masking)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_INVAL_ASYNC" block=SQ event=301 descr="Number of asynchronous invalidates (surface sync, register write, etc.) (No-Masking, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_INVAL_VOLATILE_INST" block=SQ event=302 descr="Number of volatile cache invalidations caused by instructions (No-Masking)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_INVAL_VOLATILE_ASYNC" block=SQ event=303 descr="Number of asynchronous volatile invalidates (surface sync, register write, etc.) (No-Masking, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_WB_INST" block=SQ event=304 descr="Number of cache write-backs caused by instructions (No-Masking)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_WB_ASYNC" block=SQ event=305 descr="Number of asynchronous cache write-backs (surface sync, register write, etc.) (No-Masking, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_WB_VOLATILE_INST" block=SQ event=306 descr="Number of volatile cache write-backs caused by instructions (No-Masking)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_WB_VOLATILE_ASYNC" block=SQ event=307 descr="Number of asynchronous volatile cache write-backs (surface sync, register write, etc.) (No-Masking, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_INPUT_STALL_ARB_NO_GRANT" block=SQ event=308 descr="Number of arbitration stalls due to lost arbitration to other SQs. (per-SQ, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_INPUT_STALL_BANK_READYB" block=SQ event=309 descr="Number of arbitration stalls due to bank stalling. (per-SQ, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALLED" block=SQ event=310 descr="Number of cache stalls. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_INFLIGHT_MAX" block=SQ event=311 descr="Number of cycles stalled on a hit CL but inflight counter is maxed out. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_OUTPUT" block=SQ event=312 descr="Number of cycles stalled at cache controller output. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_EVICT" block=SQ event=313 descr="Number of cycles stalled trying to do an evict. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_UNORDERED" block=SQ event=314 descr="Number of cycles stalled due to an unordered access conflict. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_ALLOC_UNAVAILABLE" block=SQ event=315 descr="Number of cycles stalled due to not being able to allocate a line. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_FORCE_EVICT" block=SQ event=316 descr="Number of cycles stalled due to having to force an eviction. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_MULTI_FLUSH" block=SQ event=317 descr="Number of cycles stalled due to multiple flushes. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_FLUSH_DONE" block=SQ event=318 descr="Number of cycles stalled inserting flush done tokens into pipe. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_OUTPUT_MISS_FIFO" block=SQ event=319 descr="Number of cycles stalled because the miss FIFO is full. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_OUTPUT_HIT_FIFO" block=SQ event=320 descr="Number of cycles stalled because a hit FIFO is full. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_OUTPUT_TC_IF" block=SQ event=321 descr="Number of cycles stalled because the TC request interface is stalled. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_STALL_OUTXBAR_ARB_NO_GRANT" block=SQ event=322 descr="Number of arbitration stalls due to lost arbitration for the output port. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ_READ_1" block=SQ event=323 descr="Number of constant cache 1 dw read requests. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ_READ_2" block=SQ event=324 descr="Number of constant cache 2 dw read requests. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ_READ_4" block=SQ event=325 descr="Number of constant cache 4 dw read requests. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ_READ_8" block=SQ event=326 descr="Number of constant cache 8 dw read requests. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ_READ_16" block=SQ event=327 descr="Number of constant cache 16 dw read requests. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ_TIME" block=SQ event=328 descr="Number of constant cache timestamp requests. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ_WRITE_1" block=SQ event=329 descr="Number of constant cache 1 dw write requests. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ_WRITE_2" block=SQ event=330 descr="Number of constant cache 2 dw write requests. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ_WRITE_4" block=SQ event=331 descr="Number of constant cache 4 dw write requests. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ_ATC_PROBE" block=SQ event=332 descr="Number of constant cache atc probe requests. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_SQ_DCACHE_REQS" block=SQ event=333 descr="Number of constant requests from SQ before any serialization (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_FLAT_REQ" block=SQ event=334 descr="Number of constant flat requests (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_NONFLAT_REQ" block=SQ event=335 descr="Number of constant non-flat requests (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_INFLIGHT_LEVEL" block=SQ event=336 descr="Level Counter: # total outstanding transactions in instruction cache (per-SQ, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_INFLIGHT_LEVEL" block=SQ event=337 descr="Level Counter: # total outstanding transactions in data cache (per-SQ, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_TC_INFLIGHT_LEVEL" block=SQ event=338 descr="Level Counter: total outstanding requests to TC (No-Masking, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_TC_INFLIGHT_LEVEL" block=SQ event=339 descr="Level Counter: # of outstanding instruction requests to TC (No-Masking, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_TC_INFLIGHT_LEVEL" block=SQ event=340 descr="Level Counter: # of outstanding data requests to TC (No-Masking, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_TRANSLATION_MISS" block=SQ event=341 descr="Total ICACHE gatcl1 translation misses"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_PERMISSION_MISS" block=SQ event=342 descr="Total ICACHE gatcl1 permission misses"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_TRANSLATION_HIT" block=SQ event=343 descr="Total ICACHE gatcl1 translation hits"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_REQUEST" block=SQ event=344 descr="Total ICACHE CLIENT_ATCL1 NORMAL requestes"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_STALL_INFLIGHT_MAX" block=SQ event=345 descr="Total ICACHE gatcl1 stalls due to inflight counter saturation"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_STALL_LRU_INFLIGHT" block=SQ event=346 descr="Total ICACHE gatcl1 stalls due to LRU cache line with traffic inflight"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_LFIFO_FULL" block=SQ event=347 descr="Total ICACHE gatcl1 atcl2 latency hiding fifo full cycles"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_STALL_LFIFO_NOT_RES" block=SQ event=348 descr="Total ICACHE gatcl1 stalls due to atcl2 latency hiding fifo output not resident"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_STALL_ATCL2_REQ_OUT_OF_CREDITS" block=SQ event=349 descr="Total ICACHE gatcl1 stalls due to atcl2_req out of credits"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_ATCL2_INFLIGHT" block=SQ event=350 descr="The sum of ICACHE inflight ATCL1_ATCL2 requests per cycle"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_STALL_MISSFIFO_FULL" block=SQ event=351 descr="Total ICACHE gatcl1 stalls due to full miss fifo"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_TRANSLATION_MISS" block=SQ event=352 descr="Total DCACHE gatcl1 translation misses"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_PERMISSION_MISS" block=SQ event=353 descr="Total DCACHE gatcl1 permission misses"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_TRANSLATION_HIT" block=SQ event=354 descr="Total DCACHE gatcl1 translation hits"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_REQUEST" block=SQ event=355 descr="Total DCACHE CLIENT_ATCL1 NORMAL requestes"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_STALL_INFLIGHT_MAX" block=SQ event=356 descr="Total DCACHE gatcl1 stalls due to inflight counter saturation"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_STALL_LRU_INFLIGHT" block=SQ event=357 descr="Total DCACHE gatcl1 stalls due to LRU cache line with traffic inflight"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_LFIFO_FULL" block=SQ event=358 descr="Total DCACHE gatcl1 atcl2 latency hiding fifo full cycles"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_STALL_LFIFO_NOT_RES" block=SQ event=359 descr="Total DCACHE gatcl1 stalls due to atcl2 latency hiding fifo output not resident"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_STALL_ATCL2_REQ_OUT_OF_CREDITS" block=SQ event=360 descr="Total DCACHE gatcl1 stalls due to atcl2_req out of credits"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_ATCL2_INFLIGHT" block=SQ event=361 descr="The sum of DCACHE inflight ATCL1_ATCL2 requests per cycle"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_STALL_MISSFIFO_FULL" block=SQ event=362 descr="Total DCACHE gatcl1 stalls due to full miss fifo"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_STALL_MULTI_MISS" block=SQ event=363 descr="Total DCACHE gatcl1 stalls due to arbitrated multiple misses"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_HIT_FIFO_FULL" block=SQ event=364 descr="Total DCACHE gatcl1 hit fifo full cycles"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_UTCL1_INFLIGHT_LEVEL" block=SQ event=365 descr="Level Counter: # total transactions that are outstanding in UTCL1 of instruction cache (nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_UTCL1_ALL_REQ" block=SQ event=366 descr="Total number of requests (all types) going to UTCL1 of instruction cache"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_UTCL2_INFLIGHT_LEVEL" block=SQ event=367 descr="Level Counter: # total transactions that are outstanding in UTCL2 and originating from instruction cache (nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_UTCL2_ALL_REQ" block=SQ event=368 descr="Total number of requests (all types) going to UTCL2 and originating from instruction cache"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_UTCL1_INFLIGHT_LEVEL" block=SQ event=369 descr="Level Counter: # total transactions that are outstanding in UTCL1 of data cache (per-SQ, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_UTCL1_ALL_REQ" block=SQ event=370 descr="Total number of requests (all types) going to UTCL1 of data cache"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_UTCL2_INFLIGHT_LEVEL" block=SQ event=371 descr="Level Counter: # total transactions that are outstanding in UTCL2 and originating from data cache (per-SQ, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_UTCL2_ALL_REQ" block=SQ event=372 descr="Total number of requests (all types) going to UTCL2 and originating from data cache"
-  ></metric>
-  <metric
-    name="SQC_DUMMY_LAST" block=SQ event=373 descr="Just a placeholding enum to indicate the last SQC performance counter. Not a real performance counter."
-  ></metric>
-  # SX counters
-  <metric
-    name="SX_PA_IDLE_CYCLES" block=SX event=0 descr="Nr of cycles where PA was idle waiting to accept vectors from SX"
-  ></metric>
-  <metric
-    name="SX_PA_REQ" block=SX event=1 descr="Nr of PA requests received"
-  ></metric>
-  <metric
-    name="SX_PA_POS" block=SX event=2 descr="Nr of positions sent to the PA"
-  ></metric>
-  <metric
-    name="SX_CLOCK" block=SX event=3 descr="Nr of clocks where SX was busy in any way shape or form"
-  ></metric>
-  <metric
-    name="SX_GATE_EN1" block=SX event=4 descr="Nr of clocks for register accesses"
-  ></metric>
-  <metric
-    name="SX_GATE_EN2" block=SX event=5 descr="Nr of clocks for bus destination sort module"
-  ></metric>
-  <metric
-    name="SX_GATE_EN3" block=SX event=6 descr="Nr of clocks for color exports"
-  ></metric>
-  <metric
-    name="SX_GATE_EN4" block=SX event=7 descr="Nr of clocks for position exports"
-  ></metric>
-  <metric
-    name="SX_SH_POS_STARVE" block=SX event=8 descr="Nr of clocks SX is starved for Position data"
-  ></metric>
-  <metric
-    name="SX_SH_COLOR_STARVE" block=SX event=9 descr="Nr of clocks SX is starved for Color data"
-  ></metric>
-  <metric
-    name="SX_SH_POS_STALL" block=SX event=10 descr="Nr of clocks SX is being stalled by PA"
-  ></metric>
-  <metric
-    name="SX_SH_COLOR_STALL" block=SX event=11 descr="Nr of clocks SX is being stalled by at least one DB"
-  ></metric>
-  <metric
-    name="SX_DB0_PIXELS" block=SX event=12 descr="Number of pixels sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_HALF_QUADS" block=SX event=13 descr="Number of half quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_PIXEL_STALL" block=SX event=14 descr="Number of cycles where pixel traffic is stalled due to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_PIXEL_IDLE" block=SX event=15 descr="Number of cycles where the pixel traffic was idle to DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_PRED_PIXELS" block=SX event=16 descr="Nr of non predicated pixels sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB1_PIXELS" block=SX event=17 descr="Number of pixels sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_HALF_QUADS" block=SX event=18 descr="Number of half quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_PIXEL_STALL" block=SX event=19 descr="Number of cycles where pixel traffic is stalled due to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_PIXEL_IDLE" block=SX event=20 descr="Number of cycles where the pixel traffic was idle to DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_PRED_PIXELS" block=SX event=21 descr="Nr of non predicated pixels sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB2_PIXELS" block=SX event=22 descr="Number of pixels sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_HALF_QUADS" block=SX event=23 descr="Number of half quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_PIXEL_STALL" block=SX event=24 descr="Number of cycles where pixel traffic is stalled due to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_PIXEL_IDLE" block=SX event=25 descr="Number of cycles where the pixel traffic was idle to DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_PRED_PIXELS" block=SX event=26 descr="Nr of non predicated pixels sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB3_PIXELS" block=SX event=27 descr="Number of pixels sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_HALF_QUADS" block=SX event=28 descr="Number of half quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_PIXEL_STALL" block=SX event=29 descr="Number of cycles where pixel traffic is stalled due to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_PIXEL_IDLE" block=SX event=30 descr="Number of cycles where the pixel traffic was idle to DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_PRED_PIXELS" block=SX event=31 descr="Nr of non predicated pixels sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_COL_BUSY" block=SX event=32 descr="Number of cycles of color module's busy"
-  ></metric>
-  <metric
-    name="SX_POS_BUSY" block=SX event=33 descr="Number of cycles of position module's busy"
-  ></metric>
-  <metric
-    name="SX_DB0_A2M_DISCARD_QUADS" block=SX event=34 descr="Number of a2m_discard quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT0_BLEND_BYPASS" block=SX event=35 descr="Number of mrt0 blend_bypass quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT0_DONT_RD_DEST" block=SX event=36 descr="Number of mrt0 dont_rd_dest quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT0_DISCARD_SRC" block=SX event=37 descr="Number of mrt0 discard_src quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT0_SINGLE_QUADS" block=SX event=38 descr="Number of mrt0 single quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT0_DOUBLE_QUADS" block=SX event=39 descr="Number of mrt0 double quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT1_BLEND_BYPASS" block=SX event=40 descr="Number of mrt1 blend_bypass quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT1_DONT_RD_DEST" block=SX event=41 descr="Number of mrt1 dont_rd_dest quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT1_DISCARD_SRC" block=SX event=42 descr="Number of mrt1 discard_src quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT1_SINGLE_QUADS" block=SX event=43 descr="Number of mrt1 single quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT1_DOUBLE_QUADS" block=SX event=44 descr="Number of mrt1 double quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT2_BLEND_BYPASS" block=SX event=45 descr="Number of mrt2 blend_bypass quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT2_DONT_RD_DEST" block=SX event=46 descr="Number of mrt2 dont_rd_dest quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT2_DISCARD_SRC" block=SX event=47 descr="Number of mrt2 discard_src quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT2_SINGLE_QUADS" block=SX event=48 descr="Number of mrt2 single quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT2_DOUBLE_QUADS" block=SX event=49 descr="Number of mrt2 double quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT3_BLEND_BYPASS" block=SX event=50 descr="Number of mrt3 blend_bypass quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT3_DONT_RD_DEST" block=SX event=51 descr="Number of mrt3 dont_rd_dest quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT3_DISCARD_SRC" block=SX event=52 descr="Number of mrt3 discard_src quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT3_SINGLE_QUADS" block=SX event=53 descr="Number of mrt3 single quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT3_DOUBLE_QUADS" block=SX event=54 descr="Number of mrt3 double quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT4_BLEND_BYPASS" block=SX event=55 descr="Number of mrt4 blend_bypass quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT4_DONT_RD_DEST" block=SX event=56 descr="Number of mrt4 dont_rd_dest quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT4_DISCARD_SRC" block=SX event=57 descr="Number of mrt4 discard_src quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT4_SINGLE_QUADS" block=SX event=58 descr="Number of mrt4 single quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT4_DOUBLE_QUADS" block=SX event=59 descr="Number of mrt4 double quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT5_BLEND_BYPASS" block=SX event=60 descr="Number of mrt5 blend_bypass quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT5_DONT_RD_DEST" block=SX event=61 descr="Number of mrt5 dont_rd_dest quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT5_DISCARD_SRC" block=SX event=62 descr="Number of mrt5 discard_src quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT5_SINGLE_QUADS" block=SX event=63 descr="Number of mr5 single quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT5_DOUBLE_QUADS" block=SX event=64 descr="Number of mrt5 double quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT6_BLEND_BYPASS" block=SX event=65 descr="Number of mrt6 blend_bypass quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT6_DONT_RD_DEST" block=SX event=66 descr="Number of mrt6 dont_rd_dest quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT6_DISCARD_SRC" block=SX event=67 descr="Number of mrt6 discard_src quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT6_SINGLE_QUADS" block=SX event=68 descr="Number of mrt6 single quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT6_DOUBLE_QUADS" block=SX event=69 descr="Number of mrt6 double quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT7_BLEND_BYPASS" block=SX event=70 descr="Number of mrt7 blend_bypass quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT7_DONT_RD_DEST" block=SX event=71 descr="Number of mrt7 dont_rd_dest quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT7_DISCARD_SRC" block=SX event=72 descr="Number of mrt7 discard_src quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT7_SINGLE_QUADS" block=SX event=73 descr="Number of mrt7 single quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT7_DOUBLE_QUADS" block=SX event=74 descr="Number of mrt7 double quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB1_A2M_DISCARD_QUADS" block=SX event=75 descr="Number of a2m_discard quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT0_BLEND_BYPASS" block=SX event=76 descr="Number of mrt0 blend_bypass quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT0_DONT_RD_DEST" block=SX event=77 descr="Number of mrt0 dont_rd_dest quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT0_DISCARD_SRC" block=SX event=78 descr="Number of mrt0 discard_src quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT0_SINGLE_QUADS" block=SX event=79 descr="Number of mrt0 single quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT0_DOUBLE_QUADS" block=SX event=80 descr="Number of mrt0 double quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT1_BLEND_BYPASS" block=SX event=81 descr="Number of mrt1 blend_bypass quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT1_DONT_RD_DEST" block=SX event=82 descr="Number of mrt1 dont_rd_dest quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT1_DISCARD_SRC" block=SX event=83 descr="Number of mrt1 discard_src quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT1_SINGLE_QUADS" block=SX event=84 descr="Number of mrt1 single quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT1_DOUBLE_QUADS" block=SX event=85 descr="Number of mrt1 double quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT2_BLEND_BYPASS" block=SX event=86 descr="Number of mrt2 blend_bypass quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT2_DONT_RD_DEST" block=SX event=87 descr="Number of mrt2 dont_rd_dest quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT2_DISCARD_SRC" block=SX event=88 descr="Number of mrt2 discard_src quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT2_SINGLE_QUADS" block=SX event=89 descr="Number of mrt2 single quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT2_DOUBLE_QUADS" block=SX event=90 descr="Number of mrt2 double quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT3_BLEND_BYPASS" block=SX event=91 descr="Number of mrt3 blend_bypass quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT3_DONT_RD_DEST" block=SX event=92 descr="Number of mrt3 dont_rd_dest quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT3_DISCARD_SRC" block=SX event=93 descr="Number of mrt3 discard_src quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT3_SINGLE_QUADS" block=SX event=94 descr="Number of mrt3 single quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT3_DOUBLE_QUADS" block=SX event=95 descr="Number of mrt3 double quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT4_BLEND_BYPASS" block=SX event=96 descr="Number of mrt4 blend_bypass quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT4_DONT_RD_DEST" block=SX event=97 descr="Number of mrt4 dont_rd_dest quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT4_DISCARD_SRC" block=SX event=98 descr="Number of mrt4 discard_src quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT4_SINGLE_QUADS" block=SX event=99 descr="Number of mrt4 single quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT4_DOUBLE_QUADS" block=SX event=100 descr="Number of mrt4 double quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT5_BLEND_BYPASS" block=SX event=101 descr="Number of mrt5 blend_bypass quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT5_DONT_RD_DEST" block=SX event=102 descr="Number of mrt5 dont_rd_dest quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT5_DISCARD_SRC" block=SX event=103 descr="Number of mrt5 discard_src quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT5_SINGLE_QUADS" block=SX event=104 descr="Number of mr5 single quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT5_DOUBLE_QUADS" block=SX event=105 descr="Number of mrt5 double quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT6_BLEND_BYPASS" block=SX event=106 descr="Number of mrt6 blend_bypass quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT6_DONT_RD_DEST" block=SX event=107 descr="Number of mrt6 dont_rd_dest quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT6_DISCARD_SRC" block=SX event=108 descr="Number of mrt6 discard_src quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT6_SINGLE_QUADS" block=SX event=109 descr="Number of mrt6 single quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT6_DOUBLE_QUADS" block=SX event=110 descr="Number of mrt6 double quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT7_BLEND_BYPASS" block=SX event=111 descr="Number of mrt7 blend_bypass quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT7_DONT_RD_DEST" block=SX event=112 descr="Number of mrt7 dont_rd_dest quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT7_DISCARD_SRC" block=SX event=113 descr="Number of mrt7 discard_src quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT7_SINGLE_QUADS" block=SX event=114 descr="Number of mrt7 single quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT7_DOUBLE_QUADS" block=SX event=115 descr="Number of mrt7 double quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB2_A2M_DISCARD_QUADS" block=SX event=116 descr="Number of a2m_discard quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT0_BLEND_BYPASS" block=SX event=117 descr="Number of mrt0 blend_bypass quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT0_DONT_RD_DEST" block=SX event=118 descr="Number of mrt0 dont_rd_dest quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT0_DISCARD_SRC" block=SX event=119 descr="Number of mrt0 discard_src quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT0_SINGLE_QUADS" block=SX event=120 descr="Number of mrt0 single quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT0_DOUBLE_QUADS" block=SX event=121 descr="Number of mrt0 double quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT1_BLEND_BYPASS" block=SX event=122 descr="Number of mrt1 blend_bypass quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT1_DONT_RD_DEST" block=SX event=123 descr="Number of mrt1 dont_rd_dest quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT1_DISCARD_SRC" block=SX event=124 descr="Number of mrt1 discard_src quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT1_SINGLE_QUADS" block=SX event=125 descr="Number of mrt1 single quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT1_DOUBLE_QUADS" block=SX event=126 descr="Number of mrt1 double quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT2_BLEND_BYPASS" block=SX event=127 descr="Number of mrt2 blend_bypass quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT2_DONT_RD_DEST" block=SX event=128 descr="Number of mrt2 dont_rd_dest quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT2_DISCARD_SRC" block=SX event=129 descr="Number of mrt2 discard_src quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT2_SINGLE_QUADS" block=SX event=130 descr="Number of mrt2 single quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT2_DOUBLE_QUADS" block=SX event=131 descr="Number of mrt2 double quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT3_BLEND_BYPASS" block=SX event=132 descr="Number of mrt3 blend_bypass quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT3_DONT_RD_DEST" block=SX event=133 descr="Number of mrt3 dont_rd_dest quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT3_DISCARD_SRC" block=SX event=134 descr="Number of mrt3 discard_src quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT3_SINGLE_QUADS" block=SX event=135 descr="Number of mrt3 single quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT3_DOUBLE_QUADS" block=SX event=136 descr="Number of mrt3 double quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT4_BLEND_BYPASS" block=SX event=137 descr="Number of mrt4 blend_bypass quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT4_DONT_RD_DEST" block=SX event=138 descr="Number of mrt4 dont_rd_dest quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT4_DISCARD_SRC" block=SX event=139 descr="Number of mrt4 discard_src quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT4_SINGLE_QUADS" block=SX event=140 descr="Number of mrt4 single quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT4_DOUBLE_QUADS" block=SX event=141 descr="Number of mrt4 double quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT5_BLEND_BYPASS" block=SX event=142 descr="Number of mrt5 blend_bypass quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT5_DONT_RD_DEST" block=SX event=143 descr="Number of mrt5 dont_rd_dest quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT5_DISCARD_SRC" block=SX event=144 descr="Number of mrt5 discard_src quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT5_SINGLE_QUADS" block=SX event=145 descr="Number of mr5 single quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT5_DOUBLE_QUADS" block=SX event=146 descr="Number of mrt5 double quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT6_BLEND_BYPASS" block=SX event=147 descr="Number of mrt6 blend_bypass quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT6_DONT_RD_DEST" block=SX event=148 descr="Number of mrt6 dont_rd_dest quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT6_DISCARD_SRC" block=SX event=149 descr="Number of mrt6 discard_src quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT6_SINGLE_QUADS" block=SX event=150 descr="Number of mrt6 single quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT6_DOUBLE_QUADS" block=SX event=151 descr="Number of mrt6 double quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT7_BLEND_BYPASS" block=SX event=152 descr="Number of mrt7 blend_bypass quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT7_DONT_RD_DEST" block=SX event=153 descr="Number of mrt7 dont_rd_dest quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT7_DISCARD_SRC" block=SX event=154 descr="Number of mrt7 discard_src quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT7_SINGLE_QUADS" block=SX event=155 descr="Number of mrt7 single quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT7_DOUBLE_QUADS" block=SX event=156 descr="Number of mrt7 double quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB3_A2M_DISCARD_QUADS" block=SX event=157 descr="Number of a2m_discard quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT0_BLEND_BYPASS" block=SX event=158 descr="Number of mrt0 blend_bypass quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT0_DONT_RD_DEST" block=SX event=159 descr="Number of mrt0 dont_rd_dest quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT0_DISCARD_SRC" block=SX event=160 descr="Number of mrt0 discard_src quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT0_SINGLE_QUADS" block=SX event=161 descr="Number of mrt0 single quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT0_DOUBLE_QUADS" block=SX event=162 descr="Number of mrt0 double quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT1_BLEND_BYPASS" block=SX event=163 descr="Number of mrt1 blend_bypass quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT1_DONT_RD_DEST" block=SX event=164 descr="Number of mrt1 dont_rd_dest quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT1_DISCARD_SRC" block=SX event=165 descr="Number of mrt1 discard_src quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT1_SINGLE_QUADS" block=SX event=166 descr="Number of mrt1 single quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT1_DOUBLE_QUADS" block=SX event=167 descr="Number of mrt1 double quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT2_BLEND_BYPASS" block=SX event=168 descr="Number of mrt2 blend_bypass quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT2_DONT_RD_DEST" block=SX event=169 descr="Number of mrt2 dont_rd_dest quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT2_DISCARD_SRC" block=SX event=170 descr="Number of mrt2 discard_src quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT2_SINGLE_QUADS" block=SX event=171 descr="Number of mrt2 single quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT2_DOUBLE_QUADS" block=SX event=172 descr="Number of mrt2 double quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT3_BLEND_BYPASS" block=SX event=173 descr="Number of mrt3 blend_bypass quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT3_DONT_RD_DEST" block=SX event=174 descr="Number of mrt3 dont_rd_dest quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT3_DISCARD_SRC" block=SX event=175 descr="Number of mrt3 discard_src quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT3_SINGLE_QUADS" block=SX event=176 descr="Number of mrt3 single quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT3_DOUBLE_QUADS" block=SX event=177 descr="Number of mrt3 double quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT4_BLEND_BYPASS" block=SX event=178 descr="Number of mrt4 blend_bypass quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT4_DONT_RD_DEST" block=SX event=179 descr="Number of mrt4 dont_rd_dest quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT4_DISCARD_SRC" block=SX event=180 descr="Number of mrt4 discard_src quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT4_SINGLE_QUADS" block=SX event=181 descr="Number of mrt4 single quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT4_DOUBLE_QUADS" block=SX event=182 descr="Number of mrt4 double quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT5_BLEND_BYPASS" block=SX event=183 descr="Number of mrt5 blend_bypass quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT5_DONT_RD_DEST" block=SX event=184 descr="Number of mrt5 dont_rd_dest quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT5_DISCARD_SRC" block=SX event=185 descr="Number of mrt5 discard_src quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT5_SINGLE_QUADS" block=SX event=186 descr="Number of mr5 single quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT5_DOUBLE_QUADS" block=SX event=187 descr="Number of mrt5 double quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT6_BLEND_BYPASS" block=SX event=188 descr="Number of mrt6 blend_bypass quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT6_DONT_RD_DEST" block=SX event=189 descr="Number of mrt6 dont_rd_dest quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT6_DISCARD_SRC" block=SX event=190 descr="Number of mrt6 discard_src quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT6_SINGLE_QUADS" block=SX event=191 descr="Number of mrt6 single quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT6_DOUBLE_QUADS" block=SX event=192 descr="Number of mrt6 double quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT7_BLEND_BYPASS" block=SX event=193 descr="Number of mrt7 blend_bypass quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT7_DONT_RD_DEST" block=SX event=194 descr="Number of mrt7 dont_rd_dest quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT7_DISCARD_SRC" block=SX event=195 descr="Number of mrt7 discard_src quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT7_SINGLE_QUADS" block=SX event=196 descr="Number of mrt7 single quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT7_DOUBLE_QUADS" block=SX event=197 descr="Number of mrt7 double quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_PA_REQ_LATENCY" block=SX event=198 descr="Number of all pa request latency"
-  ></metric>
-  <metric
-    name="SX_POS_SCBD_STALL" block=SX event=199 descr="Number of cycles SX is being stalled by position scoreboard"
-  ></metric>
-  <metric
-    name="SX_COL_SCBD_STALL" block=SX event=200 descr="Number of cycles SX is being stalled by color scoreboard"
-  ></metric>
-  <metric
-    name="SX_CLOCK_DROP_STALL" block=SX event=201 descr="Number of cycles where SX was busy in any way shape or form excluding stall cycles"
-  ></metric>
-  <metric
-    name="SX_GATE_EN5" block=SX event=202 descr="Number of cycles for color exports excluding stall cycles"
-  ></metric>
-  <metric
-    name="SX_GATE_EN6" block=SX event=203 descr="Number of cycles for position exports excluding stall cycles"
-  ></metric>
-  <metric
-    name="SX_DB0_SIZE" block=SX event=204 descr="Number of dw (current smallest unit) send to DB0"
-  ></metric>
-  <metric
-    name="SX_DB1_SIZE" block=SX event=205 descr="Number of dw (current smallest unit) send to DB1"
-  ></metric>
-  <metric
-    name="SX_DB2_SIZE" block=SX event=206 descr="Number of dw (current smallest unit) send to DB2"
-  ></metric>
-  <metric
-    name="SX_DB3_SIZE" block=SX event=207 descr="Number of dw (current smallest unit) send to DB3"
-  ></metric>
-  # TA counters
-  <metric
-    name="TA_NULL" block=TA event=0 descr="NULL"
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_BUSY" block=TA event=1 descr="sh_fifo subblock is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_CMD_BUSY" block=TA event=2 descr="sh_fifo subblock, cmd fifo section is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_ADDR_BUSY" block=TA event=3 descr="sh_fifo subblock, addr fifo section is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_DATA_BUSY" block=TA event=4 descr="sh_fifo subblock, data fifo section is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_DATA_SFIFO_BUSY" block=TA event=5 descr="sh_fifo subblock, data sfifo section is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_DATA_TFIFO_BUSY" block=TA event=6 descr="sh_fifo subblock, data tfifo section is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_GRADIENT_BUSY" block=TA event=7 descr="Deriv/Dispatch/Input subblocks are busy busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_GRADIENT_FIFO_BUSY" block=TA event=8 descr="Gradient FIFO subblock is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_LOD_BUSY" block=TA event=9 descr="Aniso subblock is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_LOD_FIFO_BUSY" block=TA event=10 descr="LOD FIFO subblock is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_ADDRESSER_BUSY" block=TA event=11 descr="Addresser subblock is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_ADDRESSER_FIFO_BUSY" block=TA event=12 descr="Addresser FIFO subblock is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_ALIGNER_BUSY" block=TA event=13 descr="Aligner subblock is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_WRITE_PATH_BUSY" block=TA event=14 descr="Write Path subblock is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_TA_BUSY" block=TA event=15 descr="TA block is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SQ_TA_CMD_CYCLES" block=TA event=16 descr="Number of input cycles input on SQ_TA_cmd interface. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SP_TA_ADDR_CYCLES" block=TA event=17 descr="Number of input cycles input on SP_TA_addr interface. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SP_TA_DATA_CYCLES" block=TA event=18 descr="Number of input cycles input on SP_TA_data interface. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_TA_FA_DATA_STATE_CYCLES" block=TA event=19 descr="Number of input cycles input on TA_FA wrts interface. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_ADDR_WAITING_ON_CMD_CYCLES" block=TA event=20 descr="Number of cycles addr waiting on cmd in sh_fifo subblock. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_CMD_WAITING_ON_ADDR_CYCLES" block=TA event=21 descr="Number of cycles cmd waiting on addr in sh_fifo subblock. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_ADDR_STARVED_WHILE_BUSY_CYCLES" block=TA event=22 descr="Number of cycles addr starved while busy in sh_fifo subblock. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_CMD_STARVED_WHILE_BUSY_CYCLES" block=TA event=23 descr="Number of cycles cmd starved while busy in sh_fifo subblock. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_DATA_WAITING_ON_DATA_STATE_CYCLES" block=TA event=24 descr="Number of cycles data waiting on data state in sh_fifo subblock. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_DATA_STATE_WAITING_ON_DATA_CYCLES" block=TA event=25 descr="Number of cycles data state waiting on data in sh_fifo subblock. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_DATA_STARVED_WHILE_BUSY_CYCLES" block=TA event=26 descr="Number of cycles data starved while busy in sh_fifo subblock. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_DATA_STATE_STARVED_WHILE_BUSY_CYCLES" block=TA event=27 descr="Number of cycles data state starved while busy in sh_fifo subblock. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_TA_SH_FIFO_STARVED" block=TA event=28 descr="Starved signal for all sub-fifos in TA_SH_FIFO"
-  ></metric>
-  <metric
-    name="TA_RESERVED_29" block=TA event=29 descr="RESERVED 29."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_ADDR_CYCLES" block=TA event=30 descr="Number of address cycles issued by sh_fifo to sh_dispatch subblock."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_DATA_CYCLES" block=TA event=31 descr="Number of data cycles issued by sh_fifo to sh_dispatch subblock."
-  ></metric>
-  <metric
-    name="TA_TOTAL_WAVEFRONTS" block=TA event=32 descr="Total number of wavefronts processed by TA."
-  ></metric>
-  <metric
-    name="TA_GRADIENT_CYCLES" block=TA event=33 descr="Number of cycles issued by the per-pixel-gradient state machine."
-  ></metric>
-  <metric
-    name="TA_WALKER_CYCLES" block=TA event=34 descr="Number of cycles issued by the sampler state machine."
-  ></metric>
-  <metric
-    name="TA_ALIGNER_CYCLES" block=TA event=35 descr="Number of cycles issued by the aligner state machine."
-  ></metric>
-  <metric
-    name="TA_IMAGE_WAVEFRONTS" block=TA event=36 descr="Number of image wavefronts processed by TA."
-  ></metric>
-  <metric
-    name="TA_IMAGE_READ_WAVEFRONTS" block=TA event=37 descr="Number of image read (Sample*, Load*, Gather4*) wavefronts processed by TA."
-  ></metric>
-  <metric
-    name="TA_IMAGE_WRITE_WAVEFRONTS" block=TA event=38 descr="Number of image write wavefronts processed by TA."
-  ></metric>
-  <metric
-    name="TA_IMAGE_ATOMIC_WAVEFRONTS" block=TA event=39 descr="Number of image atomic wavefronts processed by TA."
-  ></metric>
-  <metric
-    name="TA_IMAGE_TOTAL_CYCLES" block=TA event=40 descr="Number of image cycles issued to TC."
-  ></metric>
-  <metric
-    name="TA_RESERVED_41" block=TA event=41 descr="RESERVED 41."
-  ></metric>
-  <metric
-    name="TA_RESERVED_42" block=TA event=42 descr="RESERVED 42."
-  ></metric>
-  <metric
-    name="TA_RESERVED_43" block=TA event=43 descr="RESERVED 43."
-  ></metric>
-  <metric
-    name="TA_BUFFER_WAVEFRONTS" block=TA event=44 descr="Number of buffer wavefronts processed by TA."
-  ></metric>
-  <metric
-    name="TA_BUFFER_READ_WAVEFRONTS" block=TA event=45 descr="Number of buffer read wavefronts processed by TA."
-  ></metric>
-  <metric
-    name="TA_BUFFER_WRITE_WAVEFRONTS" block=TA event=46 descr="Number of buffer write wavefronts processed by TA."
-  ></metric>
-  <metric
-    name="TA_BUFFER_ATOMIC_WAVEFRONTS" block=TA event=47 descr="Number of buffer atomic wavefronts processed by TA."
-  ></metric>
-  <metric
-    name="TA_BUFFER_COALESCABLE_WAVEFRONTS" block=TA event=48 descr="Number of buffer coalesceable wavefronts processed by TA."
-  ></metric>
-  <metric
-    name="TA_BUFFER_TOTAL_CYCLES" block=TA event=49 descr="Number of buffer cycles issued to TC."
-  ></metric>
-  <metric
-    name="TA_BUFFER_COALESCABLE_ADDR_MULTICYCLED_CYCLES" block=TA event=50 descr="Number of buffer coalesceable cycles issued to TC that were not coalesced due to addresser."
-  ></metric>
-  <metric
-    name="TA_BUFFER_COALESCABLE_CLAMP_16KDWORD_MULTICYCLED_CYCLES" block=TA event=51 descr="Number of buffer coalesceable cycles issued to TC that were not coalesced due to clamping or 64KB bounds check."
-  ></metric>
-  <metric
-    name="TA_BUFFER_COALESCED_READ_CYCLES" block=TA event=52 descr="Number of buffer coalesced read cycles issued to TC."
-  ></metric>
-  <metric
-    name="TA_BUFFER_COALESCED_WRITE_CYCLES" block=TA event=53 descr="Number of buffer coalesced write cycles issued to TC."
-  ></metric>
-  <metric
-    name="TA_ADDR_STALLED_BY_TC_CYCLES" block=TA event=54 descr="Number of cycles addr path stalled by TC. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_ADDR_STALLED_BY_TD_CYCLES" block=TA event=55 descr="Number of cycles addr path stalled by TD. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_DATA_STALLED_BY_TC_CYCLES" block=TA event=56 descr="Number of cycles data path stalled by TC. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_ADDRESSER_STALLED_BY_ALIGNER_ONLY_CYCLES" block=TA event=57 descr="Number of cycles Addresser stalled by Aligner and not further down the pipe. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_ADDRESSER_STALLED_CYCLES" block=TA event=58 descr="Number of cycles Addresser stalled. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_ANISO_STALLED_BY_ADDRESSER_ONLY_CYCLES" block=TA event=59 descr="Number of cycles Aniso stalled by Addresser and not further down the pipe. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_ANISO_STALLED_CYCLES" block=TA event=60 descr="Number of cycles Aniso stalled. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_DERIV_STALLED_BY_ANISO_ONLY_CYCLES" block=TA event=61 descr="Number of cycles Deriv stalled by Aniso and not further down the pipe. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_DERIV_STALLED_CYCLES" block=TA event=62 descr="Number of cycles Deriv stalled. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_ANISO_GT1_CYCLE_QUADS" block=TA event=63 descr="Number of quads requiring more than 1 aniso sample."
-  ></metric>
-  <metric
-    name="TA_COLOR_1_CYCLE_PIXELS" block=TA event=64 descr="Number of pixels requiring sampler state machine to take 1 cycle due to format."
-  ></metric>
-  <metric
-    name="TA_COLOR_2_CYCLE_PIXELS" block=TA event=65 descr="Number of pixels requiring sampler state machine to take 2 cycle due to format."
-  ></metric>
-  <metric
-    name="TA_COLOR_3_CYCLE_PIXELS" block=TA event=66 descr="Number of pixels requiring sampler state machine to take 3 cycle due to format."
-  ></metric>
-  <metric
-    name="TA_COLOR_4_CYCLE_PIXELS" block=TA event=67 descr="Number of pixels requiring sampler state machine to take 4 cycle due to format."
-  ></metric>
-  <metric
-    name="TA_MIP_1_CYCLE_PIXELS" block=TA event=68 descr="Number of pixels requiring sampler state machine to take 1 cycle due to mip filter."
-  ></metric>
-  <metric
-    name="TA_MIP_2_CYCLE_PIXELS" block=TA event=69 descr="Number of pixels requiring sampler state machine to take 2 cycle due to mip filter."
-  ></metric>
-  <metric
-    name="TA_VOL_1_CYCLE_PIXELS" block=TA event=70 descr="Number of pixels requiring sampler state machine to take 1 cycle due to z filter."
-  ></metric>
-  <metric
-    name="TA_VOL_2_CYCLE_PIXELS" block=TA event=71 descr="Number of pixels requiring sampler state machine to take 2 cycle due to z filter."
-  ></metric>
-  <metric
-    name="TA_BILIN_POINT_1_CYCLE_PIXELS" block=TA event=72 descr="Number of pixels requiring sampler state machine to take 1 cycle due to xy filter."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_0_SAMPLES" block=TA event=73 descr="Number of samples fetched from mip 0."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_1_SAMPLES" block=TA event=74 descr="Number of samples fetched from mip 1."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_2_SAMPLES" block=TA event=75 descr="Number of samples fetched from mip 2."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_3_SAMPLES" block=TA event=76 descr="Number of samples fetched from mip 3."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_4_SAMPLES" block=TA event=77 descr="Number of samples fetched from mip 4."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_5_SAMPLES" block=TA event=78 descr="Number of samples fetched from mip 5."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_6_SAMPLES" block=TA event=79 descr="Number of samples fetched from mip 6."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_7_SAMPLES" block=TA event=80 descr="Number of samples fetched from mip 7."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_8_SAMPLES" block=TA event=81 descr="Number of samples fetched from mip 8."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_9_SAMPLES" block=TA event=82 descr="Number of samples fetched from mip 9."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_10_SAMPLES" block=TA event=83 descr="Number of samples fetched from mip 10."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_11_SAMPLES" block=TA event=84 descr="Number of samples fetched from mip 11."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_12_SAMPLES" block=TA event=85 descr="Number of samples fetched from mip 12."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_13_SAMPLES" block=TA event=86 descr="Number of samples fetched from mip 13."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_14_SAMPLES" block=TA event=87 descr="Number of samples fetched from mip 14."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_INVALID_SAMPLES" block=TA event=88 descr="Number of samples marked invalid using mip 15 method."
-  ></metric>
-  <metric
-    name="TA_ANISO_1_CYCLE_QUADS" block=TA event=89 descr="Number of quads requiring 1 aniso sample."
-  ></metric>
-  <metric
-    name="TA_ANISO_2_CYCLE_QUADS" block=TA event=90 descr="Number of quads requiring 2 aniso sample."
-  ></metric>
-  <metric
-    name="TA_ANISO_4_CYCLE_QUADS" block=TA event=91 descr="Number of quads requiring 4 aniso sample."
-  ></metric>
-  <metric
-    name="TA_ANISO_6_CYCLE_QUADS" block=TA event=92 descr="Number of quads requiring 6 aniso sample."
-  ></metric>
-  <metric
-    name="TA_ANISO_8_CYCLE_QUADS" block=TA event=93 descr="Number of quads requiring 8 aniso sample."
-  ></metric>
-  <metric
-    name="TA_ANISO_10_CYCLE_QUADS" block=TA event=94 descr="Number of quads requiring 10 aniso sample."
-  ></metric>
-  <metric
-    name="TA_ANISO_12_CYCLE_QUADS" block=TA event=95 descr="Number of quads requiring 12 aniso sample."
-  ></metric>
-  <metric
-    name="TA_ANISO_14_CYCLE_QUADS" block=TA event=96 descr="Number of quads requiring 14 aniso sample."
-  ></metric>
-  <metric
-    name="TA_ANISO_16_CYCLE_QUADS" block=TA event=97 descr="Number of quads requiring 16 aniso sample."
-  ></metric>
-  <metric
-    name="TA_WRITE_PATH_INPUT_CYCLES" block=TA event=98 descr="Number of cycles received from write datapath from sh_dispatct."
-  ></metric>
-  <metric
-    name="TA_WRITE_PATH_OUTPUT_CYCLES" block=TA event=99 descr="Number of cycles sent from write datapath to TC."
-  ></metric>
-  <metric
-    name="TA_FLAT_WAVEFRONTS" block=TA event=100 descr="Number of flat opcode wavfronts processed by the TA."
-  ></metric>
-  <metric
-    name="TA_FLAT_READ_WAVEFRONTS" block=TA event=101 descr="Number of flat opcode reads processed by the TA."
-  ></metric>
-  <metric
-    name="TA_FLAT_WRITE_WAVEFRONTS" block=TA event=102 descr="Number of flat opcode writes processed by the TA."
-  ></metric>
-  <metric
-    name="TA_FLAT_ATOMIC_WAVEFRONTS" block=TA event=103 descr="Number of flat opcode atomics processed by the TA."
-  ></metric>
-  <metric
-    name="TA_FLAT_COALESCEABLE_WAVEFRONTS" block=TA event=104 descr="Number of flat opcode coalesceale ops processed by the TA."
-  ></metric>
-  <metric
-    name="TA_REG_SCLK_VLD" block=TA event=105 descr="Number of cycles reg_sclk is active. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_LOCAL_CG_DYN_SCLK_GRP0_EN" block=TA event=106 descr="Number of cycles grp0 sclk is active. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_LOCAL_CG_DYN_SCLK_GRP1_EN" block=TA event=107 descr="Number of cycles grp1 sclk is active. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_LOCAL_CG_DYN_SCLK_GRP1_MEMS_EN" block=TA event=108 descr="Number of cycles grp1_mems sclk is active. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_LOCAL_CG_DYN_SCLK_GRP4_EN" block=TA event=109 descr="Number of cycles grp4 sclk is active. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_LOCAL_CG_DYN_SCLK_GRP5_EN" block=TA event=110 descr="Number of cycles grp5 sclk is active. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_XNACK_ON_PHASE0" block=TA event=111 descr="None zero Xnack mask returned on phase0. This counter is always 0x0 for configurations that do not support XNACKs. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_XNACK_ON_PHASE1" block=TA event=112 descr="None zero Xnack mask returned on phase1. This counter is always 0x0 for configurations that do not support XNACKs. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_XNACK_ON_PHASE2" block=TA event=113 descr="None zero Xnack mask returned on phase2. This counter is always 0x0 for configurations that do not support XNACKs. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_XNACK_ON_PHASE3" block=TA event=114 descr="None zero Xnack mask returned on phase3. This counter is always 0x0 for configurations that do not support XNACKs. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_FIRST_XNACK_ON_PHASE0" block=TA event=115 descr="First Xnack of an instruction occured on phase0. This counter is always 0x0 for configurations that do not support XNACKs. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_FIRST_XNACK_ON_PHASE1" block=TA event=116 descr="First Xnack of an instruction occured on phase1. This counter is always 0x0 for configurations that do not support XNACKs. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_FIRST_XNACK_ON_PHASE2" block=TA event=117 descr="First Xnack of an instruction occured on phase2. This counter is always 0x0 for configurations that do not support XNACKs. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_FIRST_XNACK_ON_PHASE3" block=TA event=118 descr="First Xnack of an instruction occured on phase3. This counter is always 0x0 for configurations that do not support XNACKs. Perf_Windowing not supported for this counter."
-  ></metric>
-  # TCA counters
-  <metric
-    name="TCA_NONE" block=TCA event=0 descr="Don't count anything."
-  ></metric>
-  <metric
-    name="TCA_CYCLE" block=TCA event=1 descr="Number of cycles. Not windowable."
-  ></metric>
-  <metric
-    name="TCA_BUSY" block=TCA event=2 descr="Number of cycles we have a request pending. Not windowable."
-  ></metric>
-  <metric
-    name="TCA_FORCED_HOLE_TCC0" block=TCA event=3 descr="Number of TCC0 hole requests that waited so long that it was decided that they should be forced rather than opportunistic. The TCC number is based on the TCCs connected to this TCA and not on the global numbering."
-  ></metric>
-  <metric
-    name="TCA_FORCED_HOLE_TCC1" block=TCA event=4 descr=""
-  ></metric>
-  <metric
-    name="TCA_FORCED_HOLE_TCC2" block=TCA event=5 descr=""
-  ></metric>
-  <metric
-    name="TCA_FORCED_HOLE_TCC3" block=TCA event=6 descr=""
-  ></metric>
-  <metric
-    name="TCA_FORCED_HOLE_TCC4" block=TCA event=7 descr=""
-  ></metric>
-  <metric
-    name="TCA_FORCED_HOLE_TCC5" block=TCA event=8 descr=""
-  ></metric>
-  <metric
-    name="TCA_FORCED_HOLE_TCC6" block=TCA event=9 descr=""
-  ></metric>
-  <metric
-    name="TCA_FORCED_HOLE_TCC7" block=TCA event=10 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC0" block=TCA event=11 descr="Number of requests sent to TCC0. This should report the same thing as TCC_PERF_SEL_REQ in the corresponding TCC in the long run. It is only offered to create a deterministic counter in the TCA so that the counters may be sanity tested."
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC1" block=TCA event=12 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC2" block=TCA event=13 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC3" block=TCA event=14 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC4" block=TCA event=15 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC5" block=TCA event=16 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC6" block=TCA event=17 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC7" block=TCA event=18 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC8" block=TCA event=19 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC9" block=TCA event=20 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC10" block=TCA event=21 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC11" block=TCA event=22 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC12" block=TCA event=23 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC13" block=TCA event=24 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC14" block=TCA event=25 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC15" block=TCA event=26 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC16" block=TCA event=27 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC17" block=TCA event=28 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC18" block=TCA event=29 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC19" block=TCA event=30 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC20" block=TCA event=31 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC21" block=TCA event=32 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC22" block=TCA event=33 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC23" block=TCA event=34 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC24" block=TCA event=35 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC25" block=TCA event=36 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC26" block=TCA event=37 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC27" block=TCA event=38 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC28" block=TCA event=39 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC29" block=TCA event=40 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC30" block=TCA event=41 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC31" block=TCA event=42 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCC0" block=TCA event=43 descr="Number of cycles no requests could be sent to TCC0 because its fifos were expected to be full. The TCC number is based on the TCCs connected to this TCA and not on the global numbering."
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCC1" block=TCA event=44 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCC2" block=TCA event=45 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCC3" block=TCA event=46 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCA1_TCC0" block=TCA event=47 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCA1_TCC1" block=TCA event=48 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCA1_TCC2" block=TCA event=49 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCA1_TCC3" block=TCA event=50 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCA2_TCC0" block=TCA event=51 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCA2_TCC1" block=TCA event=52 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCA2_TCC2" block=TCA event=53 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCA2_TCC3" block=TCA event=54 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCA3_TCC0" block=TCA event=55 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCA3_TCC1" block=TCA event=56 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCA3_TCC2" block=TCA event=57 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCA3_TCC3" block=TCA event=58 descr=""
-  ></metric>
-  # TCC counters
-  <metric
-    name="TCC_NONE" block=TCC event=0 descr="Don't count anything."
-  ></metric>
-  <metric
-    name="TCC_CYCLE" block=TCC event=1 descr="Number of cycles. Not windowable."
-  ></metric>
-  <metric
-    name="TCC_BUSY" block=TCC event=2 descr="Number of cycles we have a request pending. Not windowable."
-  ></metric>
-  <metric
-    name="TCC_REQ" block=TCC event=3 descr="Number of requests of all types. This is measured at the tag block. This may be more than the number of requests arriving at the TCC, but it is a good indication of the total amount of work that needs to be performed."
-  ></metric>
-  <metric
-    name="TCC_STREAMING_REQ" block=TCC event=4 descr="Number of streaming requests. This is measured at the tag block."
-  ></metric>
-  <metric
-    name="TCC_NC_REQ" block=TCC event=5 descr="The number of noncoherently cached requests. This is measured at the tag block."
-  ></metric>
-  <metric
-    name="TCC_UC_REQ" block=TCC event=6 descr="The number of uncached requests. This is measured at the tag block."
-  ></metric>
-  <metric
-    name="TCC_CC_REQ" block=TCC event=7 descr="The number of coherently cached requests. This is measured at the tag block."
-  ></metric>
-  <metric
-    name="TCC_RW_REQ" block=TCC event=8 descr="The number of RW requests. This is measured at the tag block."
-  ></metric>
-  <metric
-    name="TCC_PROBE" block=TCC event=9 descr="Number of probe requests. Not windowable."
-  ></metric>
-  <metric
-    name="TCC_PROBE_ALL" block=TCC event=10 descr="Number of external probe requests with with EA_TCC_preq_all== 1. Not windowable."
-  ></metric>
-  <metric
-    name="TCC_INTERNAL_PROBE" block=TCC event=11 descr="Number of self-probes spawned by TCC for CC writes/atomic operations. Not windowable."
-  ></metric>
-  <metric
-    name="TCC_READ" block=TCC event=12 descr="Number of read requests. Compressed reads are included in this, but metadata reads are not included."
-  ></metric>
-  <metric
-    name="TCC_WRITE" block=TCC event=13 descr="Number of write requests."
-  ></metric>
-  <metric
-    name="TCC_ATOMIC" block=TCC event=14 descr="Number of atomic requests of all types."
-  ></metric>
-  <metric
-    name="TCC_NOP_ACK" block=TCC event=15 descr="Number of NOP_ACK requests."
-  ></metric>
-  <metric
-    name="TCC_NOP_RTN0" block=TCC event=16 descr="Number of NOP_RTN0 requests."
-  ></metric>
-  <metric
-    name="TCC_HIT" block=TCC event=17 descr="Number of cache hits."
-  ></metric>
-  <metric
-    name="TCC_SECTOR_HIT" block=TCC event=18 descr="Number of cache sector hits."
-  ></metric>
-  <metric
-    name="TCC_MISS" block=TCC event=19 descr="Number of cache misses. UC reads count as misses."
-  ></metric>
-  <metric
-    name="TCC_DEWRITE_ALLOCATE_HIT" block=TCC event=20 descr="Number of times a read was performed on a cache line that had only been written into before. This can only occur once for the life of a cache line."
-  ></metric>
-  <metric
-    name="TCC_FULLY_WRITTEN_HIT" block=TCC event=21 descr="Number of times a 32-byte read from the EA was avoided because the cache sector was already fully written with data. This can only occur once for the life of a cache sector."
-  ></metric>
-  <metric
-    name="TCC_WRITEBACK" block=TCC event=22 descr="Number of lines written back to main memory. This includes writebacks of dirty lines and uncached write/atomic requests."
-  ></metric>
-  <metric
-    name="TCC_LATENCY_FIFO_FULL" block=TCC event=23 descr="Number of cycles the latency fifo was full."
-  ></metric>
-  <metric
-    name="TCC_SRC_FIFO_FULL" block=TCC event=24 descr="Number of cycles the src fifo was expected to be full as measured at the IB block."
-  ></metric>
-  <metric
-    name="TCC_HOLE_FIFO_FULL" block=TCC event=25 descr="Number of cycles the hole fifos in the TCAs were expected to be full as measured at the IB block. This is usually an indication that there was insufficient bandwidth available on the data bus for source data."
-  ></metric>
-  <metric
-    name="TCC_EA_WRREQ" block=TCC event=26 descr="Number of transactions (either 32-byte or 64-byte) going over the TC_EA_wrreq interface. Atomics may travel over the same interface and are generally classified as write requests. This does not include probe commands."
-  ></metric>
-  <metric
-    name="TCC_EA_WRREQ_64B" block=TCC event=27 descr="Number of 64-byte transactions going (64-byte write or CMPSWAP) over the TC_EA_wrreq interface."
-  ></metric>
-  <metric
-    name="TCC_EA_WRREQ_PROBE_COMMAND" block=TCC event=28 descr="Number of probe commands going over the TC_EA_wrreq interface."
-  ></metric>
-  <metric
-    name="TCC_EA_WR_UNCACHED_32B" block=TCC event=29 descr="Number of 32-byte write/atomic going over the TC_EA_wrreq interface due to uncached traffic. Note that CC mtypes can produce uncached requests, and those are included in this. A 64-byte request will be counted as 2"
-  ></metric>
-  <metric
-    name="TCC_EA_WRREQ_STALL" block=TCC event=30 descr="Number of cycles a write request was stalled."
-  ></metric>
-  <metric
-    name="TCC_EA_WRREQ_IO_CREDIT_STALL" block=TCC event=31 descr="Number of cycles a EA write request was stalled because the interface was out of IO credits."
-  ></metric>
-  <metric
-    name="TCC_EA_WRREQ_GMI_CREDIT_STALL" block=TCC event=32 descr="Number of cycles a EA write request was stalled because the interface was out of GMI credits."
-  ></metric>
-  <metric
-    name="TCC_EA_WRREQ_DRAM_CREDIT_STALL" block=TCC event=33 descr="Number of cycles a EA write request was stalled because the interface was out of DRAM credits."
-  ></metric>
-  <metric
-    name="TCC_TOO_MANY_EA_WRREQS_STALL" block=TCC event=34 descr="Number of cycles the TCC could not send a EA write request because it already reached its maximum number of pending EA write requests."
-  ></metric>
-  <metric
-    name="TCC_EA_WRREQ_LEVEL" block=TCC event=35 descr="The sum of the number of EA write requests in flight. This is primarily meant for measure average EA write latency. Average write latency = TCC_PERF_SEL_EA_WRREQ_LEVEL/TCC_PERF_SEL_EA_WRREQ."
-  ></metric>
-  <metric
-    name="TCC_EA_ATOMIC" block=TCC event=36 descr="Number of transactions going over the TC_EA_wrreq interface that are actually atomic requests."
-  ></metric>
-  <metric
-    name="TCC_EA_ATOMIC_LEVEL" block=TCC event=37 descr="The sum of the number of EA atomics in flight. This is primarily meant for measure average EA atomic latency. Average atomic latency = TCC_PERF_SEL_EA_WRREQ_ATOMIC_LEVEL/TCC_PERF_SEL_EA_WRREQ_ATOMIC."
-  ></metric>
-  <metric
-    name="TCC_EA_RDREQ" block=TCC event=38 descr="Number of TCC/EA read requests (either 32-byte or 64-byte)"
-  ></metric>
-  <metric
-    name="TCC_EA_RDREQ_32B" block=TCC event=39 descr="Number of 32-byte TCC/EA read requests"
-  ></metric>
-  <metric
-    name="TCC_EA_RD_UNCACHED_32B" block=TCC event=40 descr="Number of 32-byte TCC/EA read due to uncached traffic. A 64-byte request will be counted as 2"
-  ></metric>
-  <metric
-    name="TCC_EA_RDREQ_IO_CREDIT_STALL" block=TCC event=41 descr="Number of cycles there was a stall because the read request interface was out of IO credits. Stalls occur regardless of whether a read needed to be performed or not."
-  ></metric>
-  <metric
-    name="TCC_EA_RDREQ_GMI_CREDIT_STALL" block=TCC event=42 descr="Number of cycles there was a stall because the read request interface was out of GMI credits. Stalls occur regardless of whether a read needed to be performed or not."
-  ></metric>
-  <metric
-    name="TCC_EA_RDREQ_DRAM_CREDIT_STALL" block=TCC event=43 descr="Number of cycles there was a stall because the read request interface was out of DRAM credits. Stalls occur regardless of whether a read needed to be performed or not."
-  ></metric>
-  <metric
-    name="TCC_EA_RDREQ_LEVEL" block=TCC event=44 descr="The sum of the number of TCC/EA read requests in flight. This is primarily meant for measure average EA read latency. Average read latency = TCC_PERF_SEL_EA_RDREQ_LEVEL/TCC_PERF_SEL_EA_RDREQ."
-  ></metric>
-  <metric
-    name="TCC_TAG_STALL" block=TCC event=45 descr="Number of cycles the normal request pipeline in the tag was stalled for any reason. Normally, stalls of this nature are measured exactly from one point the pipeline, but that is not the case for this counter. Probes can stall the pipeline at a variety of places, and there is no single point that can reasonably measure the total stalls accurately."
-  ></metric>
-  <metric
-    name="TCC_TAG_WRITEBACK_FIFO_FULL_STALL" block=TCC event=46 descr="Number of cycles the normal request pipeline in the tag was stalled due to the writeback fifo within the tag block being full."
-  ></metric>
-  <metric
-    name="TCC_TAG_MISS_NOTHING_REPLACEABLE_STALL" block=TCC event=47 descr="Number of cycles the normal request pipeline in the tag was stalled due to a cache miss and unavailabiliyt of a replaceable cache line."
-  ></metric>
-  <metric
-    name="TCC_TAG_UNCACHED_WRITE_ATOMIC_FIFO_FULL_STALL" block=TCC event=48 descr="Number of cycles the normal request pipeline in the tag was stalled due to the uncached write/atomic fifo being full."
-  ></metric>
-  <metric
-    name="TCC_TAG_NO_UNCACHED_WRITE_ATOMIC_ENTRIES_STALL" block=TCC event=49 descr="Number of cycles the normal request pipeline in the tag was stalled due to the lack of unused uncached write/atomic tracking entries."
-  ></metric>
-  <metric
-    name="TCC_TAG_PROBE_STALL" block=TCC event=50 descr="Number of cycles the normal request pipeline in the tag was stalled due to the presence of a probe."
-  ></metric>
-  <metric
-    name="TCC_TAG_PROBE_FILTER_STALL" block=TCC event=51 descr="Number of cycles the normal request pipeline in the tag was stalled due to the probe filter being in an inappropriate state."
-  ></metric>
-  <metric
-    name="TCC_TAG_PROBE_FIFO_FULL_STALL" block=TCC event=52 descr="Number of cycles the normal request pipeline in the tag was stalled due to the probe fifo begin full."
-  ></metric>
-  <metric
-    name="TCC_READ_RETURN_TIMEOUT" block=TCC event=53 descr="Number of bubbles requests sent to the TCA because a EA read return waited so long for a cache ram port that it timed out."
-  ></metric>
-  <metric
-    name="TCC_WRITEBACK_READ_TIMEOUT" block=TCC event=54 descr="Number of bubbles requests sent to the TCA because a writeback waited so long for a cache ram port that it timed out."
-  ></metric>
-  <metric
-    name="TCC_READ_RETURN_FULL_BUBBLE" block=TCC event=55 descr="Number of bubbles requests sent to the TCA to prevent the EA read return fifos from overflowing. Not windowable."
-  ></metric>
-  <metric
-    name="TCC_BUBBLE" block=TCC event=56 descr="Total number of bubble requests sent to the TCA"
-  ></metric>
-  <metric
-    name="TCC_RETURN_ACK" block=TCC event=57 descr="Number of times only an ack was sent on the return bus."
-  ></metric>
-  <metric
-    name="TCC_RETURN_DATA" block=TCC event=58 descr="Number of times only data was sent on the return bus."
-  ></metric>
-  <metric
-    name="TCC_RETURN_HOLE" block=TCC event=59 descr="Number of times only a hole was sent on the return bus."
-  ></metric>
-  <metric
-    name="TCC_RETURN_ACK_HOLE" block=TCC event=60 descr="Number of times an ack and a hole were sent at the same time on the return bus."
-  ></metric>
-  <metric
-    name="TCC_IB_REQ" block=TCC event=61 descr="Number of requests through the IB. This measures the raw request count from graphics clients going to this TCC."
-  ></metric>
-  <metric
-    name="TCC_IB_STALL" block=TCC event=62 descr="Number of cycles the IB output was stalled."
-  ></metric>
-  <metric
-    name="TCC_IB_TAG_STALL" block=TCC event=63 descr="Number of cycles the IB output was stalled on the tag."
-  ></metric>
-  <metric
-    name="TCC_TCA_LEVEL" block=TCC event=64 descr="The sum of the number of requests sent to the TCA for output arbitration in flight. Average TCA arbitration latency = TCC_PERF_SEL_TCA_LEVEL/TCC_PERF_SEL_REQ."
-  ></metric>
-  <metric
-    name="TCC_HOLE_LEVEL" block=TCC event=65 descr="The sum of the number of hole requests in flight. Average hole latency = TCC_PERF_SEL_HOLE_LEVEL/(TCC_PERF_SEL_WRITE+TCC_PERF_SEL_ATOMIC). Not windowable."
-  ></metric>
-  <metric
-    name="TCC_EA_RDRET_NACK" block=TCC event=66 descr="The number of EA read returns that were nacked."
-  ></metric>
-  <metric
-    name="TCC_EA_WRRET_NACK" block=TCC event=67 descr="The number of EA write returns that were nacked."
-  ></metric>
-  <metric
-    name="TCC_NORMAL_WRITEBACK" block=TCC event=68 descr="Number of writebacks due to requests that are not writeback requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBL2_NC_WRITEBACK" block=TCC event=69 descr="Number of writebacks due to TC_OP_WBL2_NC requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_WRITEBACK" block=TCC event=70 descr="Number of writebacks due to TC_OP_WBINVL2 requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_NC_WRITEBACK" block=TCC event=71 descr="Number of writebacks due to TC_OP_WBINVL2_NC requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_SD_WRITEBACK" block=TCC event=72 descr="Number of writebacks due to TC_OP_WBINVL2_SD requests."
-  ></metric>
-  <metric
-    name="TCC_ALL_TC_OP_WB_WRITEBACK" block=TCC event=73 descr="Number of writebacks due to all TC_OP writeback requests."
-  ></metric>
-  <metric
-    name="TCC_NORMAL_EVICT" block=TCC event=74 descr="Number of evictions due to requests that are not invalidate or probe requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBL2_NC_EVICT" block=TCC event=75 descr="Number of evictions due to TC_OP_WBL2_NC requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_INVL2_NC_EVICT" block=TCC event=76 descr="Number of evictions due to TC_OP_INVL2_NC requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_EVICT" block=TCC event=77 descr="Number of evictions due to TC_OP_WBINVL2 requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_NC_EVICT" block=TCC event=78 descr="Number of evictions due to TC_OP_WBINVL2_NC requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_SD_EVICT" block=TCC event=79 descr="Number of evictions due to TC_OP_WBINVL2_SD requests."
-  ></metric>
-  <metric
-    name="TCC_ALL_TC_OP_INV_EVICT" block=TCC event=80 descr="Number of evictions due to all TC_OP invalidate requests."
-  ></metric>
-  <metric
-    name="TCC_PROBE_EVICT" block=TCC event=81 descr="Number of evictions/invalidations due to probes. Not windowable."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBL2_NC_CYCLE" block=TCC event=82 descr="Number of cycles spent performing TC_OP_WBL2_NC requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_INVL2_NC_CYCLE" block=TCC event=83 descr="Number of cycles spent performing TC_OP_INVL2_NC requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_CYCLE" block=TCC event=84 descr="Number of cycles spent performing TC_OP_WBINVL2 requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_NC_CYCLE" block=TCC event=85 descr="Number of cycles spent performing TC_OP_WBINVL2_NC requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_SD_CYCLE" block=TCC event=86 descr="Number of cycles spent performing TC_OP_WBINVL2_SD requests."
-  ></metric>
-  <metric
-    name="TCC_ALL_TC_OP_WB_OR_INV_CYCLE" block=TCC event=87 descr="Number of cycles spent performing all TC_OP writeback or invalidate requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBL2_NC_START" block=TCC event=88 descr="Number of TC_OP_WBL2_NC requests started."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_INVL2_NC_START" block=TCC event=89 descr="Number of TC_OP_INVL2_NC requests started."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_START" block=TCC event=90 descr="Number of TC_OP_WBINVL2 requests started."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_NC_START" block=TCC event=91 descr="Number of TC_OP_WBINVL2_NC requests started."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_SD_START" block=TCC event=92 descr="Number of TC_OP_WBINVL2_SD requests started."
-  ></metric>
-  <metric
-    name="TCC_ALL_TC_OP_WB_OR_INV_START" block=TCC event=93 descr="Number of TC_OP writeback or invalidate requests started."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBL2_NC_FINISH" block=TCC event=94 descr="Number of TC_OP_WBL2_NC requests finished."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_INVL2_NC_FINISH" block=TCC event=95 descr="Number of TC_OP_INVL2_NC requests finished."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_FINISH" block=TCC event=96 descr="Number of TC_OP_WBINVL2 requests finished."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_NC_FINISH" block=TCC event=97 descr="Number of TC_OP_WBINVL2_NC requests finished."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_SD_FINISH" block=TCC event=98 descr="Number of TC_OP_WBINVL2_SD requests finished."
-  ></metric>
-  <metric
-    name="TCC_ALL_TC_OP_WB_OR_INV_FINISH" block=TCC event=99 descr="Number of TC_OP writeback or invalidate requests finished."
-  ></metric>
-  <metric
-    name="TCC_PROBE_FILTER_DISABLE_TRANSITION" block=TCC event=100 descr="Number of times the probe filter went from enabled to disabled."
-  ></metric>
-  <metric
-    name="TCC_PROBE_FILTER_DISABLED" block=TCC event=101 descr="Number of cycles the probe filter was disabled. The TCC can get probes during these cycles. Not windowable."
-  ></metric>
-  <metric
-    name="TCC_EA_RDREQ_DRAM" block=TCC event=102 descr="Number of TCC/EA read requests (either 32-byte or 64-byte) destined for DRAM (MC)."
-  ></metric>
-  <metric
-    name="TCC_EA_WRREQ_DRAM" block=TCC event=103 descr="Number of TCC/EA write requests (either 32-byte of 64-byte) destined for DRAM (MC)."
-  ></metric>
-  <metric
-    name="TCC_CLIENT0_REQ" block=TCC event=128 descr="Number of cycles client0 sent a request to this TCC."
-  ></metric>
-  <metric
-    name="TCC_CLIENT1_REQ" block=TCC event=129 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT2_REQ" block=TCC event=130 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT3_REQ" block=TCC event=131 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT4_REQ" block=TCC event=132 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT5_REQ" block=TCC event=133 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT6_REQ" block=TCC event=134 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT7_REQ" block=TCC event=135 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT8_REQ" block=TCC event=136 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT9_REQ" block=TCC event=137 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT10_REQ" block=TCC event=138 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT11_REQ" block=TCC event=139 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT12_REQ" block=TCC event=140 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT13_REQ" block=TCC event=141 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT14_REQ" block=TCC event=142 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT15_REQ" block=TCC event=143 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT16_REQ" block=TCC event=144 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT17_REQ" block=TCC event=145 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT18_REQ" block=TCC event=146 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT19_REQ" block=TCC event=147 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT20_REQ" block=TCC event=148 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT21_REQ" block=TCC event=149 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT22_REQ" block=TCC event=150 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT23_REQ" block=TCC event=151 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT24_REQ" block=TCC event=152 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT25_REQ" block=TCC event=153 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT26_REQ" block=TCC event=154 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT27_REQ" block=TCC event=155 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT28_REQ" block=TCC event=156 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT29_REQ" block=TCC event=157 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT30_REQ" block=TCC event=158 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT31_REQ" block=TCC event=159 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT32_REQ" block=TCC event=160 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT33_REQ" block=TCC event=161 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT34_REQ" block=TCC event=162 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT35_REQ" block=TCC event=163 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT36_REQ" block=TCC event=164 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT37_REQ" block=TCC event=165 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT38_REQ" block=TCC event=166 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT39_REQ" block=TCC event=167 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT40_REQ" block=TCC event=168 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT41_REQ" block=TCC event=169 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT42_REQ" block=TCC event=170 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT43_REQ" block=TCC event=171 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT44_REQ" block=TCC event=172 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT45_REQ" block=TCC event=173 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT46_REQ" block=TCC event=174 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT47_REQ" block=TCC event=175 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT48_REQ" block=TCC event=176 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT49_REQ" block=TCC event=177 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT50_REQ" block=TCC event=178 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT51_REQ" block=TCC event=179 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT52_REQ" block=TCC event=180 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT53_REQ" block=TCC event=181 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT54_REQ" block=TCC event=182 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT55_REQ" block=TCC event=183 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT56_REQ" block=TCC event=184 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT57_REQ" block=TCC event=185 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT58_REQ" block=TCC event=186 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT59_REQ" block=TCC event=187 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT60_REQ" block=TCC event=188 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT61_REQ" block=TCC event=189 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT62_REQ" block=TCC event=190 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT63_REQ" block=TCC event=191 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT64_REQ" block=TCC event=192 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT65_REQ" block=TCC event=193 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT66_REQ" block=TCC event=194 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT67_REQ" block=TCC event=195 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT68_REQ" block=TCC event=196 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT69_REQ" block=TCC event=197 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT70_REQ" block=TCC event=198 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT71_REQ" block=TCC event=199 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT72_REQ" block=TCC event=200 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT73_REQ" block=TCC event=201 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT74_REQ" block=TCC event=202 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT75_REQ" block=TCC event=203 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT76_REQ" block=TCC event=204 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT77_REQ" block=TCC event=205 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT78_REQ" block=TCC event=206 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT79_REQ" block=TCC event=207 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT80_REQ" block=TCC event=208 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT81_REQ" block=TCC event=209 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT82_REQ" block=TCC event=210 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT83_REQ" block=TCC event=211 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT84_REQ" block=TCC event=212 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT85_REQ" block=TCC event=213 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT86_REQ" block=TCC event=214 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT87_REQ" block=TCC event=215 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT88_REQ" block=TCC event=216 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT89_REQ" block=TCC event=217 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT90_REQ" block=TCC event=218 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT91_REQ" block=TCC event=219 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT92_REQ" block=TCC event=220 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT93_REQ" block=TCC event=221 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT94_REQ" block=TCC event=222 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT95_REQ" block=TCC event=223 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT96_REQ" block=TCC event=224 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT97_REQ" block=TCC event=225 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT98_REQ" block=TCC event=226 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT99_REQ" block=TCC event=227 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT100_REQ" block=TCC event=228 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT101_REQ" block=TCC event=229 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT102_REQ" block=TCC event=230 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT103_REQ" block=TCC event=231 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT104_REQ" block=TCC event=232 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT105_REQ" block=TCC event=233 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT106_REQ" block=TCC event=234 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT107_REQ" block=TCC event=235 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT108_REQ" block=TCC event=236 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT109_REQ" block=TCC event=237 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT110_REQ" block=TCC event=238 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT111_REQ" block=TCC event=239 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT112_REQ" block=TCC event=240 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT113_REQ" block=TCC event=241 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT114_REQ" block=TCC event=242 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT115_REQ" block=TCC event=243 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT116_REQ" block=TCC event=244 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT117_REQ" block=TCC event=245 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT118_REQ" block=TCC event=246 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT119_REQ" block=TCC event=247 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT120_REQ" block=TCC event=248 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT121_REQ" block=TCC event=249 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT122_REQ" block=TCC event=250 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT123_REQ" block=TCC event=251 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT124_REQ" block=TCC event=252 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT125_REQ" block=TCC event=253 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT126_REQ" block=TCC event=254 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT127_REQ" block=TCC event=255 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT128_REQ" block=TCC event=256 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT129_REQ" block=TCC event=257 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT130_REQ" block=TCC event=258 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT131_REQ" block=TCC event=259 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT132_REQ" block=TCC event=260 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT133_REQ" block=TCC event=261 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT134_REQ" block=TCC event=262 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT135_REQ" block=TCC event=263 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT136_REQ" block=TCC event=264 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT137_REQ" block=TCC event=265 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT138_REQ" block=TCC event=266 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT139_REQ" block=TCC event=267 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT140_REQ" block=TCC event=268 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT141_REQ" block=TCC event=269 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT142_REQ" block=TCC event=270 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT143_REQ" block=TCC event=271 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT144_REQ" block=TCC event=272 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT145_REQ" block=TCC event=273 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT146_REQ" block=TCC event=274 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT147_REQ" block=TCC event=275 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT148_REQ" block=TCC event=276 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT149_REQ" block=TCC event=277 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT150_REQ" block=TCC event=278 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT151_REQ" block=TCC event=279 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT152_REQ" block=TCC event=280 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT153_REQ" block=TCC event=281 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT154_REQ" block=TCC event=282 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT155_REQ" block=TCC event=283 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT156_REQ" block=TCC event=284 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT157_REQ" block=TCC event=285 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT158_REQ" block=TCC event=286 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT159_REQ" block=TCC event=287 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT160_REQ" block=TCC event=288 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT161_REQ" block=TCC event=289 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT162_REQ" block=TCC event=290 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT163_REQ" block=TCC event=291 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT164_REQ" block=TCC event=292 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT165_REQ" block=TCC event=293 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT166_REQ" block=TCC event=294 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT167_REQ" block=TCC event=295 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT168_REQ" block=TCC event=296 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT169_REQ" block=TCC event=297 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT170_REQ" block=TCC event=298 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT171_REQ" block=TCC event=299 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT172_REQ" block=TCC event=300 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT173_REQ" block=TCC event=301 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT174_REQ" block=TCC event=302 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT175_REQ" block=TCC event=303 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT176_REQ" block=TCC event=304 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT177_REQ" block=TCC event=305 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT178_REQ" block=TCC event=306 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT179_REQ" block=TCC event=307 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT180_REQ" block=TCC event=308 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT181_REQ" block=TCC event=309 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT182_REQ" block=TCC event=310 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT183_REQ" block=TCC event=311 descr=""
-  ></metric>
-  # TCP counters
-  <metric
-    name="TCP_GATE_EN1" block=TCP event=0 descr="TCP interface clocks are turned on. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_GATE_EN2" block=TCP event=1 descr="TCP core clocks are turned on. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_CORE_REG_SCLK_VLD" block=TCP event=2 descr="TCP reg clocks are turned on. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_TA_TCP_ADDR_STARVE_CYCLES" block=TCP event=3 descr="TA starves TCP addr interface. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_TA_TCP_DATA_STARVE_CYCLES" block=TCP event=4 descr="TA starves TCP data interface. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_TCP_TA_ADDR_STALL_CYCLES" block=TCP event=5 descr="TCP stalls TA addr interface."
-  ></metric>
-  <metric
-    name="TCP_TCP_TA_DATA_STALL_CYCLES" block=TCP event=6 descr="TCP stalls TA data interface. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_TD_TCP_STALL_CYCLES" block=TCP event=7 descr="TD stalls TCP"
-  ></metric>
-  <metric
-    name="TCP_TCR_TCP_STALL_CYCLES" block=TCP event=8 descr="TCR stalls TCP_TCR_req interface"
-  ></metric>
-  <metric
-    name="TCP_TCP_TCR_STARVE_CYCLES" block=TCP event=9 descr="TCP starves TCP_TCR_req interface"
-  ></metric>
-  <metric
-    name="TCP_LOD_STALL_CYCLES" block=TCP event=10 descr="Per Pixel LOD stall"
-  ></metric>
-  <metric
-    name="TCP_READ_TAGCONFLICT_STALL_CYCLES" block=TCP event=11 descr="Tagram conflict stall on a read"
-  ></metric>
-  <metric
-    name="TCP_WRITE_TAGCONFLICT_STALL_CYCLES" block=TCP event=12 descr="Tagram conflict stall on a write"
-  ></metric>
-  <metric
-    name="TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES" block=TCP event=13 descr="Tagram conflict stall on an atomic"
-  ></metric>
-  <metric
-    name="TCP_ALLOC_STALL_CYCLES" block=TCP event=14 descr="Alloc on inflight cache line stall"
-  ></metric>
-  <metric
-    name="TCP_UNORDERED_MTYPE_STALL" block=TCP event=15 descr="Total stalls due to UC/CC mtype ordering"
-  ></metric>
-  <metric
-    name="TCP_LFIFO_STALL_CYCLES" block=TCP event=16 descr="Memory Latency fifos full stall"
-  ></metric>
-  <metric
-    name="TCP_RFIFO_STALL_CYCLES" block=TCP event=17 descr="Memory Request fifos full stall"
-  ></metric>
-  <metric
-    name="TCP_TCR_RDRET_STALL" block=TCP event=18 descr="write into cache stalled by read return from tcr"
-  ></metric>
-  <metric
-    name="TCP_WRITE_CONFLICT_STALL" block=TCP event=19 descr="write stall due to cache bank conflict"
-  ></metric>
-  <metric
-    name="TCP_HOLE_READ_STALL" block=TCP event=20 descr="read from cache stalled due to hole fill read"
-  ></metric>
-  <metric
-    name="TCP_READCONFLICT_STALL_CYCLES" block=TCP event=21 descr="Read conflict stall due to cache bank conflict"
-  ></metric>
-  <metric
-    name="TCP_PENDING_STALL_CYCLES" block=TCP event=22 descr="Stall due to data pending from L2"
-  ></metric>
-  <metric
-    name="TCP_READFIFO_STALL_CYCLES" block=TCP event=23 descr="Read fifo stall ("
-  ></metric>
-  <metric
-    name="TCP_POWER_STALL" block=TCP event=24 descr="Count of stalls due to power throttling"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_SERIALIZATION_STALL" block=TCP event=25 descr="Total number of stalls due to serializing translation requests through the UTCL1."
-  ></metric>
-  <metric
-    name="TCP_TC_TA_XNACK_STALL" block=TCP event=26 descr="Total number of cycles TA stalled the TCP xnack interface. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_TA_TCP_STATE_READ" block=TCP event=27 descr="Number of state reads"
-  ></metric>
-  <metric
-    name="TCP_VOLATILE" block=TCP event=28 descr="Total number of L1 volatile pixels/buffers from TA"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_ACCESSES" block=TCP event=29 descr="Total number of pixels/buffers from TA. Equals TCP_PERF_SEL_TOTAL_READ+TCP_PERF_SEL_TOTAL_NONREAD"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_READ" block=TCP event=30 descr="Total number of read pixels/buffers from TA. Equals TCP_PERF_SEL_TOTAL_HIT_LRU_READ + TCP_PERF_SEL_TOTAL_MISS_LRU_READ + TCP_PERF_SEL_TOTAL_MISS_EVICT_READ"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_NON_READ" block=TCP event=31 descr="Total number of non-read pixels/buffers from TA. Equals TCP_PERF_SEL_WRITE + TCP_PERF_SEL_TOTAL_ATOMIC_WITH_RET + TCP_PERF_SEL_TOTAL_ATOMIC_WITHOUT_RET"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_WRITE" block=TCP event=32 descr="Total number of local write pixels/buffers from TA. Equals TCP_PERF_SEL_TOTAL_MISS_LRU_WRITE+ TCP_PERF_SEL_TOTAL_MISS_EVICT_WRITE"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_HIT_LRU_READ" block=TCP event=33 descr="Total number of read pixels/buffers from TA using the HIT_LRU policy"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_MISS_LRU_READ" block=TCP event=34 descr="Total number of read pixels/buffers from TA using the MISS_LRU policy"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_MISS_EVICT_READ" block=TCP event=35 descr="Total number of read pixels/buffers from TA using the MISS_EVICT policy"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_MISS_LRU_WRITE" block=TCP event=36 descr="Total number of local write pixels/buffers from TA using the MISS_LRU policy"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_MISS_EVICT_WRITE" block=TCP event=37 descr="Total number of global write pixels/buffers from TA using the MISS_EVICT policy"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_ATOMIC_WITH_RET" block=TCP event=38 descr="Total number of atomic with return pixels/buffers from TA"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_ATOMIC_WITHOUT_RET" block=TCP event=39 descr="Total number of atomic without return pixels/buffers from TA"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_WBINVL1" block=TCP event=40 descr="Total number of wbinvl1 transactions from TA (from shader WBINVL1 instructions)"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_WBINVL1_VOL" block=TCP event=41 descr="Total number of volatile wbinvl1 transactions from TA (from shader WBINVL1_VOL instructions)"
-  ></metric>
-  <metric
-    name="TCP_SQ_TCP_INVALIDATE_VOL" block=TCP event=42 descr="Number of volatile cache invalidates from the SQ. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_CP_TCP_INVALIDATE" block=TCP event=43 descr="Number of cache invalidates from the CP. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_CP_TCP_INVALIDATE_VOL" block=TCP event=44 descr="Number of volatile cache invalidates from the CP. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_TOTAL_WRITEBACK_INVALIDATES" block=TCP event=45 descr="Total number of cache invalidates. Equals TCP_PERF_SEL_TOTAL_WBINVL1+ TCP_PERF_SEL_TOTAL_WBINVL1_VOL+ TCP_PERF_SEL_CP_TCP_INVALIDATE+ TCP_PERF_SEL_SQ_TCP_INVALIDATE_VOL. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_SHOOTDOWN" block=TCP event=46 descr="Total number of shootdowns executed by TCP. Not windowed."
-  ></metric>
-  <metric
-    name="TCP_UTCL1_REQUEST" block=TCP event=47 descr="Total CLIENT_UTCL1 NORMAL requests"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_TRANSLATION_MISS" block=TCP event=48 descr="Total utcl1 translation misses"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_TRANSLATION_HIT" block=TCP event=49 descr="Total utcl1 translation hits"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_PERMISSION_MISS" block=TCP event=50 descr="Total utcl1 permission misses"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_STALL_INFLIGHT_MAX" block=TCP event=51 descr="Total utcl1 stalls due to inflight counter saturation"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_STALL_LRU_INFLIGHT" block=TCP event=52 descr="Total utcl1 stalls due to LRU cache line with traffic inflight"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_STALL_MULTI_MISS" block=TCP event=53 descr="Total utcl1 stalls due to arbitrated multiple misses"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_LFIFO_FULL" block=TCP event=54 descr="Total utcl1 utcl2 latency hiding fifo full cycles"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_STALL_LFIFO_NOT_RES" block=TCP event=55 descr="Total utcl1 stalls due to utcl2 latency hiding fifo output not resident"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_STALL_UTCL2_REQ_OUT_OF_CREDITS" block=TCP event=56 descr="Total utcl1 stalls due to utcl2_req out of credits"
-  ></metric>
-  <metric
-    name="TCP_CLIENT_UTCL1_INFLIGHT" block=TCP event=57 descr="The sum of inflight client to UTCL1 requests per cycle"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_UTCL2_INFLIGHT" block=TCP event=58 descr="The sum of inflight UTCL1_UTCL2 requests per cycle"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_STALL_MISSFIFO_FULL" block=TCP event=59 descr="Total utcl1 stalls due to full miss fifo"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_CACHE_ACCESSES" block=TCP event=60 descr="Count of total cache line (tag) accesses (includes hits and misses)."
-  ></metric>
-  <metric
-    name="TCP_TAGRAM0_REQ" block=TCP event=61 descr="Total L2 requests that mapped to tagram 0 from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TAGRAM1_REQ" block=TCP event=62 descr="Total L2 requests that mapped to tagram 1 from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TAGRAM2_REQ" block=TCP event=63 descr="Total L2 requests that mapped to tagram 2 from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TAGRAM3_REQ" block=TCP event=64 descr="Total L2 requests that mapped to tagram 3 from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCP_LATENCY" block=TCP event=65 descr="Total TCP wave latency (from first clock of wave entering to first clock of wave leaving), divide by TA_TCP_STATE_READ to avg wave latency"
-  ></metric>
-  <metric
-    name="TCP_TCC_READ_REQ_LATENCY" block=TCP event=66 descr="Total TCP->TCC request latency for reads and atomics with return. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_TCC_WRITE_REQ_LATENCY" block=TCP event=67 descr="Total TCP->TCC request latency for writes and atomics without return. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_TCC_WRITE_REQ_HOLE_LATENCY" block=TCP event=68 descr="Total TCP req ->TCC hole latency for writes and atomics. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_TCC_READ_REQ" block=TCP event=69 descr="Total read requests from TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_WRITE_REQ" block=TCP event=70 descr="Total write requests from TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_ATOMIC_WITH_RET_REQ" block=TCP event=71 descr="Total atomic with return requests from TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_ATOMIC_WITHOUT_RET_REQ" block=TCP event=72 descr="Total atomic without return requests from TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_LRU_REQ" block=TCP event=73 descr="Total requests with LRU L2 policy from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_STREAM_REQ" block=TCP event=74 descr="Total requests with STREAM L2 policy from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_NC_READ_REQ" block=TCP event=75 descr="Total read requests with NC mtype from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_NC_WRITE_REQ" block=TCP event=76 descr="Total write requests with NC mtype from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_NC_ATOMIC_REQ" block=TCP event=77 descr="Total atomic requests with NC mtype from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_UC_READ_REQ" block=TCP event=78 descr="Total read requests with UC mtype from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_UC_WRITE_REQ" block=TCP event=79 descr="Total write requests with UC mtype from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_UC_ATOMIC_REQ" block=TCP event=80 descr="Total atomic requests with UC mtype from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_CC_READ_REQ" block=TCP event=81 descr="Total write requests with CC mtype from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_CC_WRITE_REQ" block=TCP event=82 descr="Total write requests with CC mtype from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_CC_ATOMIC_REQ" block=TCP event=83 descr="Total atomic requests with CC mtype from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_DCC_REQ" block=TCP event=84 descr="Total DCC requests from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_RW_READ_REQ" block=TCP event=85 descr="Total write requests with RW mtype from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_RW_WRITE_REQ" block=TCP event=86 descr="Total write requests with RW mtype from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_RW_ATOMIC_REQ" block=TCP event=87 descr="Total atomic requests with RW mtype from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_WBL2_NC_REQ" block=TCP event=88 descr="Total WBL2_NC request to TCC"
-  ></metric>
-  <metric
-    name="TCP_WBL2_NC_LATENCY" block=TCP event=89 descr="Latency for WBL2_NC latency"
-      ></metric>
-
-  <metric
-    name="TCP_TCR_REQ_XFER128B_COMBINING" block=TCP event=90 descr="Total combined request from this TCP to TCR which need to check ratio with TCC_READ_REQ"
-  ></metric>
-
-
-
-  # TD counters
-  <metric
-    name="TD_NONE" block=TD event=0 descr="Won't count anything."
-  ></metric>
-  <metric
-    name="TD_TD_BUSY" block=TD event=1 descr="TD is processing or waiting for data. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TD_INPUT_BUSY" block=TD event=2 descr="TD input subblock is busy or waiting for data. This means the instruction, state or TC data fifos may not be empty or the TD is processing a wave. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TD_OUTPUT_BUSY" block=TD event=3 descr="TD output subblock is busy or waiting for data. This means the TD's output pipeline (accumulation, data swizzle, data packing) could be processing pixel data. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TD_LERP_BUSY" block=TD event=4 descr="TD filter block is busy, which means any of the four lerps has pixel data flowing down its pipeline (blend, accumulation, format). Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TD_REG_SCLK_VLD" block=TD event=5 descr="Clock gate enable for GRBM register reads & writes. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TD_LOCAL_CG_DYN_SCLK_GRP0_EN" block=TD event=6 descr="Clock gate enable for group0 - non-harvestable always_on domain. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TD_LOCAL_CG_DYN_SCLK_GRP1_EN" block=TD event=7 descr="Clock gate enable for group1 - harvestable texture logic domain. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TD_LOCAL_CG_DYN_SCLK_GRP4_EN" block=TD event=8 descr="Clock gate enable for group4 - non-harvestable GDS chain domain. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TD_LOCAL_CG_DYN_SCLK_GRP5_EN" block=TD event=9 descr="Clock gate enable for group5 - non-harvestable texture boundary domain. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TD_TC_TD_FIFO_FULL" block=TD event=10 descr="TC_TD input FIFO is full. This counter could denote a stall in the TD pipeline, which could come from data cycling in the lerps or power throttling from the SMU."
-  ></metric>
-  <metric
-    name="TD_OUTPUT_FIFO_FULL" block=TD event=11 descr="TD output FIFO is full. This counter could denote a stall in the TD pipeline, possibly due to the GDS or PC/LDS."
-  ></metric>
-  <metric
-    name="TD_RESERVED_12" block=TD event=12 descr="RESERVED_12"
-  ></metric>
-  <metric
-    name="TD_RESERVED_13" block=TD event=13 descr="RESERVED_13"
-  ></metric>
-  <metric
-    name="TD_RESERVED_14" block=TD event=14 descr="RESERVED_14"
-  ></metric>
-  <metric
-    name="TD_TC_STALL" block=TD event=15 descr="TD is stalled waiting for TC data."
-  ></metric>
-  <metric
-    name="TD_PC_STALL" block=TD event=16 descr="TD is stalled by PC waiting to send LDS data."
-  ></metric>
-  <metric
-    name="TD_GDS_STALL" block=TD event=17 descr="TD is stalled by GDS data."
-  ></metric>
-  <metric
-    name="TD_SPI_STALL" block=TD event=18 descr="TD is stalled SPI vinit"
-  ></metric>
-  <metric
-    name="TD_RESERVED_19" block=TD event=19 descr="RESERVED_19"
-  ></metric>
-  <metric
-    name="TD_GATHER4_WAVEFRONT" block=TD event=20 descr="Count the wavefronts with opcode = gather4, includes gather4_c."
-  ></metric>
-  <metric
-    name="TD_GATHER4H_WAVEFRONT" block=TD event=21 descr="Count the wavefronts with opcode = gather4h."
-  ></metric>
-  <metric
-    name="TD_GATHER4H_PACKED_WAVEFRONT" block=TD event=22 descr="Count the wavefronts with opcode = gather4h_packed."
-  ></metric>
-  <metric
-    name="TD_GATHER8H_PACKED_WAVEFRONT" block=TD event=23 descr="Count the wavefronts with opcode = gather8h_packed."
-  ></metric>
-  <metric
-    name="TD_SAMPLE_C_WAVEFRONT" block=TD event=24 descr="Count the wavefronts with opcode = sample_c, includes gather4_c."
-  ></metric>
-  <metric
-    name="TD_LOAD_WAVEFRONT" block=TD event=25 descr="Count the wavefronts with opcode = load, include atomics and store."
-  ></metric>
-  <metric
-    name="TD_ATOMIC_WAVEFRONT" block=TD event=26 descr="Count the wavefronts with opcode = atomic."
-  ></metric>
-  <metric
-    name="TD_STORE_WAVEFRONT" block=TD event=27 descr="Count the wavefronts with opcode = store."
-  ></metric>
-  <metric
-    name="TD_LDFPTR_WAVEFRONT" block=TD event=28 descr="Count the wavefronts with LDFPTR formats."
-  ></metric>
-  <metric
-    name="TD_D16_EN_WAVEFRONT" block=TD event=29 descr="Count the wavefronts that use d16 conversion"
-  ></metric>
-  <metric
-    name="TD_BYPASS_FILTER_WAVEFRONT" block=TD event=30 descr="Count the wavefronts that bypass the filter, includes bypass opcode or bypass formats."
-  ></metric>
-  <metric
-    name="TD_MIN_MAX_FILTER_WAVEFRONT" block=TD event=31 descr="Count the wavefronts that use min/max filtering."
-  ></metric>
-  <metric
-    name="TD_COALESCABLE_WAVEFRONT" block=TD event=32 descr="Count wavefronts that TA finds coalescable."
-  ></metric>
-  <metric
-    name="TD_COALESCED_PHASE" block=TD event=33 descr="Count up when each phase is coalesced, if all phases in a wavefront were coalesced the count will be 16."
-  ></metric>
-  <metric
-    name="TD_FOUR_PHASE_WAVEFRONT" block=TD event=34 descr="dmask=1,2,4,8, wavefront was packed into a 4 phase packet for SP."
-  ></metric>
-  <metric
-    name="TD_EIGHT_PHASE_WAVEFRONT" block=TD event=35 descr="dmask=3,5,6,9,a,c, wavefront was packed into an 8 phase packet for SP."
-  ></metric>
-  <metric
-    name="TD_SIXTEEN_PHASE_WAVEFRONT" block=TD event=36 descr="dmask=7,b,d,e,f, wavefront was forwarded to SP in 16 phases."
-  ></metric>
-  <metric
-    name="TD_FOUR_PHASE_FORWARD_WAVEFRONT" block=TD event=37 descr="Count the wavefronts that were forwarded to SP in 4 phases (coalescable)."
-  ></metric>
-  <metric
-    name="TD_WRITE_ACK_WAVEFRONT" block=TD event=38 descr="Count write acknowledgments, sent to SQ and not to SP."
-  ></metric>
-  <metric
-    name="TD_RESERVED_39" block=TD event=39 descr="RESERVED_39"
-  ></metric>
-  <metric
-    name="TD_USER_DEFINED_BORDER" block=TD event=40 descr="Count the wavefronts that user defined border color was used."
-  ></metric>
-  <metric
-    name="TD_WHITE_BORDER" block=TD event=41 descr="Count the wavefronts that white border color was used."
-  ></metric>
-  <metric
-    name="TD_OPAQUE_BLACK_BORDER" block=TD event=42 descr="Count the wavefronts that opaque black border color was used."
-  ></metric>
-  <metric
-    name="TD_RESERVED_43" block=TD event=43 descr="RESERVED_43"
-  ></metric>
-  <metric
-    name="TD_RESERVED_44" block=TD event=44 descr="RESERVED_44"
-  ></metric>
-  <metric
-    name="TD_NACK" block=TD event=45 descr="Count the number of times an nack packet was generated and sent to SP/SQ."
-  ></metric>
-  <metric
-    name="TD_TD_SP_TRAFFIC" block=TD event=46 descr="Count the number of times this TD sends data to the SP."
-  ></metric>
-  <metric
-    name="TD_CONSUME_GDS_TRAFFIC" block=TD event=47 descr="Count the number of times GDS data was consumed by this TD, send to SP."
-  ></metric>
-  <metric
-    name="TD_ADDRESSCMD_POISON" block=TD event=48 descr="Count the wavefronts that had poisoned address or command."
-  ></metric>
-  <metric
-    name="TD_DATA_POISON" block=TD event=49 descr="Count the wavefronts that had poisoned data."
-  ></metric>
-  <metric
-    name="TD_START_CYCLE_0" block=TD event=50 descr="Count the number of times there was a phase change in a wave and the starting cycle was 0. Starting cycle denotes how fast the TD can process the incoming sample (0 is fastest, 3 is slowest)."
-  ></metric>
-  <metric
-    name="TD_START_CYCLE_1" block=TD event=51 descr="Count the number of times there was a phase change in a wave and the starting cycle was 1. Starting cycle denotes how fast the TD can process the incoming sample (0 is fastest, 3 is slowest)."
-  ></metric>
-  <metric
-    name="TD_START_CYCLE_2" block=TD event=52 descr="Count the number of times there was a phase change in a wave and the starting cycle was 2. Starting cycle denotes how fast the TD can process the incoming sample (0 is fastest, 3 is slowest)."
-  ></metric>
-  <metric
-    name="TD_START_CYCLE_3" block=TD event=53 descr="Count the number of times there was a phase change in a wave and the starting cycle was 3. Starting cycle denotes how fast the TD can process the incoming sample (0 is fastest, 3 is slowest)."
-  ></metric>
-  <metric
-    name="TD_NULL_CYCLE_OUTPUT" block=TD event=54 descr="Count the number of times that null cycles had occured at the output stage"
-  ></metric>
-  <metric
-    name="TD_D16_DATA_PACKED" block=TD event=55 descr="Count the number of times the TD packs 2 sets of d16 data into 1 32-bit container"
-  ></metric>
-  <metric
-    name="TD_TEXELS_ZEROED_OUT_BY_BLEND_ZERO_PRT" block=TD event=56 descr="Count the number of times a texel was zeroed out due to the blend zero prt feature"
-  ></metric>
-  # GRBM_SE counters
-  <metric
-    name="GRBM_SE_COUNT" block=GRBM_SE event=0 descr="Tie High - Count Number of Clocks"
-  ></metric>
-  <metric
-    name="GRBM_SE_USER_DEFINED" block=GRBM_SE event=1 descr="User defined performance select."
-  ></metric>
-  <metric
-    name="GRBM_SE_CB_BUSY" block=GRBM_SE event=2 descr="Any of the Color Blocks (CB) are busy in shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_DB_BUSY" block=GRBM_SE event=3 descr="Any of the Depth Blocks (DB) are busy in shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_SC_BUSY" block=GRBM_SE event=4 descr="Any of the Scan Converter Blocks (SC) are busy in shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_RESERVED_1" block=GRBM_SE event=5 descr="Reserved to maintain backwards compatibility."
-  ></metric>
-  <metric
-    name="GRBM_SE_SPI_BUSY" block=GRBM_SE event=6 descr="Any of the Shader Pipe Interpolators (SPI) are busy in shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_SX_BUSY" block=GRBM_SE event=7 descr="Any of the Shader Export Blocks (SX) are busy for shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_TA_BUSY" block=GRBM_SE event=8 descr="Any of the Texture Pipes (TA) are busy in shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_CB_CLEAN" block=GRBM_SE event=9 descr="Any of the Color Blocks (CB) are not clean in shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_DB_CLEAN" block=GRBM_SE event=10 descr="Any of the Depth Blocks (DB) are not clean in shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_RESERVED_0" block=GRBM_SE event=11 descr="Reserved to maintain backwards compatibility."
-  ></metric>
-  <metric
-    name="GRBM_SE_PA_BUSY" block=GRBM_SE event=12 descr="The Primitive Assembly Block (PA) is busy in shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_VGT_BUSY" block=GRBM_SE event=13 descr="The Vertex Geometry Tessellator Block (VGT) is busy in shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_BCI_BUSY" block=GRBM_SE event=14 descr="Any of the Barycentric Interpolators (BCI) are busy in shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_RMI_BUSY" block=GRBM_SE event=15 descr="Any of the Render Backend Memory Interface (RMI) are busy in shader engine 0."
-  ></metric>
-  # ATCL2 counters
-  <metric
-    name="ATCL2_NUMBER_OF_L1_REQUESTS" block=ATCL2 event=1 descr="number of L1 requests"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_BANK0_REQUESTS" block=ATCL2 event=2 descr="number of bank0 requests"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_BANK0_HITS" block=ATCL2 event=3 descr="number of bank0 hits"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_BANK0_MISSES" block=ATCL2 event=4 descr="number of bank0 misses"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_ATS_REQUESTS" block=ATCL2 event=5 descr="number of ATS Requests"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_ATS_RESPONSES" block=ATCL2 event=6 descr="number of ATS Responses"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_INVALIDATE_REQUEST" block=ATCL2 event=7 descr="number of invalidate request"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_FLUSHTYPE_INVALIDATE_REQUEST" block=ATCL2 event=8 descr="number of flushtype invalidate request"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_L1_RT_CACHE_REQUESTS" block=ATCL2 event=9 descr="number of L1 RT cache requests"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_RT_CACHE_BANK0_REQUESTS" block=ATCL2 event=10 descr="number of RT cache bank0 requests"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_RT_CACHE_BANK0_HITS" block=ATCL2 event=11 descr="number of RT cache bank0 hits"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_RT_CACHE_BANK0_MISSES" block=ATCL2 event=12 descr="number of RT cache bank0 misses"
-  ></metric>
-  # MCVML2 counters
-  <metric
-    name="MCVML2_BANK0_PTE_CACHE_BIGK0_REQUEST" block=MCVML2 event=1 descr="bank0 pte cache bigk0 request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_PTE_CACHE_BIGK0_HIT" block=MCVML2 event=2 descr="bank0 pte cache bigk0 hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_PTE_CACHE_BIGK0_MISS" block=MCVML2 event=3 descr="bank0 pte cache bigk0 miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_PTE_CACHE_BIGK0_UPDATE" block=MCVML2 event=4 descr="bank0 pte cache bigk0 update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_PTE_CACHE_4K0_REQUEST" block=MCVML2 event=5 descr="bank0 pte cache 4k0 request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_PTE_CACHE_4K0_HIT" block=MCVML2 event=6 descr="bank0 pte cache 4k0 hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_PTE_CACHE_4K0_MISS" block=MCVML2 event=7 descr="bank0 pte cache 4k0 miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_PTE_CACHE_4K0_UPDATE" block=MCVML2 event=8 descr="bank0 pte cache 4k0 update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_AGGREGATE_REQUEST" block=MCVML2 event=9 descr="bank0 aggregate request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_AGGREGATE_HIT" block=MCVML2 event=10 descr="bank0 aggregate hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_AGGREGATE_MISS" block=MCVML2 event=11 descr="bank0 aggregate miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_AGGREGATE_UPDATE" block=MCVML2 event=12 descr="bank0 aggregate update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_PTE_CACHE_BIGK0_REQUEST" block=MCVML2 event=13 descr="bank1 pte cache bigk0 request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_PTE_CACHE_BIGK0_HIT" block=MCVML2 event=14 descr="bank1 pte cache bigk0 hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_PTE_CACHE_BIGK0_MISS" block=MCVML2 event=15 descr="bank1 pte cache bigk0 miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_PTE_CACHE_BIGK0_UPDATE" block=MCVML2 event=16 descr="bank1 pte cache bigk0 update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_PTE_CACHE_4K0_REQUEST" block=MCVML2 event=17 descr="bank1 pte cache 4k0 request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_PTE_CACHE_4K0_HIT" block=MCVML2 event=18 descr="bank1 pte cache 4k0 hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_PTE_CACHE_4K0_MISS" block=MCVML2 event=19 descr="bank1 pte cache 4k0 miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_PTE_CACHE_4K0_UPDATE" block=MCVML2 event=20 descr="bank1 pte cache 4k0 update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_AGGREGATE_REQUEST" block=MCVML2 event=21 descr="bank1 aggregate request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_AGGREGATE_HIT" block=MCVML2 event=22 descr="bank1 aggregate hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_AGGREGATE_MISS" block=MCVML2 event=23 descr="bank1 aggregate miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_AGGREGATE_UPDATE" block=MCVML2 event=24 descr="bank1 aggregate update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_PTE_CACHE_BIGK0_REQUEST" block=MCVML2 event=25 descr="bank2 pte cache bigk0 request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_PTE_CACHE_BIGK0_HIT" block=MCVML2 event=26 descr="bank2 pte cache bigk0 hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_PTE_CACHE_BIGK0_MISS" block=MCVML2 event=27 descr="bank2 pte cache bigk0 miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_PTE_CACHE_BIGK0_UPDATE" block=MCVML2 event=28 descr="bank2 pte cache bigk0 update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_PTE_CACHE_4K0_REQUEST" block=MCVML2 event=29 descr="bank2 pte cache 4k0 request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_PTE_CACHE_4K0_HIT" block=MCVML2 event=30 descr="bank2 pte cache 4k0 hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_PTE_CACHE_4K0_MISS" block=MCVML2 event=31 descr="bank2 pte cache 4k0 miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_PTE_CACHE_4K0_UPDATE" block=MCVML2 event=32 descr="bank2 pte cache 4k0 update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_AGGREGATE_REQUEST" block=MCVML2 event=33 descr="bank2 aggregate request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_AGGREGATE_HIT" block=MCVML2 event=34 descr="bank2 aggregate hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_AGGREGATE_MISS" block=MCVML2 event=35 descr="bank2 aggregate miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_AGGREGATE_UPDATE" block=MCVML2 event=36 descr="bank2 aggregate update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_PTE_CACHE_BIGK0_REQUEST" block=MCVML2 event=37 descr="bank3 pte cache bigk0 request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_PTE_CACHE_BIGK0_HIT" block=MCVML2 event=38 descr="bank3 pte cache bigk0 hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_PTE_CACHE_BIGK0_MISS" block=MCVML2 event=39 descr="bank3 pte cache bigk0 miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_PTE_CACHE_BIGK0_UPDATE" block=MCVML2 event=40 descr="bank3 pte cache bigk0 update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_PTE_CACHE_4K0_REQUEST" block=MCVML2 event=41 descr="bank3 pte cache 4k0 request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_PTE_CACHE_4K0_HIT" block=MCVML2 event=42 descr="bank3 pte cache 4k0 hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_PTE_CACHE_4K0_MISS" block=MCVML2 event=43 descr="bank3 pte cache 4k0 miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_PTE_CACHE_4K0_UPDATE" block=MCVML2 event=44 descr="bank3 pte cache 4k0 update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_AGGREGATE_REQUEST" block=MCVML2 event=45 descr="bank3 aggregate request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_AGGREGATE_HIT" block=MCVML2 event=46 descr="bank3 aggregate hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_AGGREGATE_MISS" block=MCVML2 event=47 descr="bank3 aggregate miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_AGGREGATE_UPDATE" block=MCVML2 event=48 descr="bank3 aggregate update"
-  ></metric>
-  <metric
-    name="MCVML2_RETRY" block=MCVML2 event=49 descr="retry"
-  ></metric>
-  <metric
-    name="MCVML2_NO_RETRY" block=MCVML2 event=50 descr="no retry"
-  ></metric>
-  <metric
-    name="MCVML2_INTERRUPT" block=MCVML2 event=51 descr="interrupt"
-  ></metric>
-  <metric
-    name="MCVML2_PDE0_CACHE_REQUEST" block=MCVML2 event=52 descr="pde0 cache request"
-  ></metric>
-  <metric
-    name="MCVML2_PDE0_CACHE_HIT" block=MCVML2 event=53 descr="pde0 cache hit"
-  ></metric>
-  <metric
-    name="MCVML2_PDE0_CACHE_MISS" block=MCVML2 event=54 descr="pde0 cache miss"
-  ></metric>
-  <metric
-    name="MCVML2_PDE0_CACHE_UPDATE" block=MCVML2 event=55 descr="pde0 cache update"
-  ></metric>
-  <metric
-    name="MCVML2_PDE0_CACHE_PTE" block=MCVML2 event=56 descr="pde0 cache pte"
-  ></metric>
-  <metric
-    name="MCVML2_PDE1_CACHE_REQUEST" block=MCVML2 event=57 descr="pde1 cache request"
-  ></metric>
-  <metric
-    name="MCVML2_PDE1_CACHE_HIT" block=MCVML2 event=58 descr="pde1 cache hit"
-  ></metric>
-  <metric
-    name="MCVML2_PDE1_CACHE_MISS" block=MCVML2 event=59 descr="pde1 cache miss"
-  ></metric>
-  <metric
-    name="MCVML2_PDE1_CACHE_UPDATE" block=MCVML2 event=60 descr="pde1 cache update"
-  ></metric>
-  <metric
-    name="MCVML2_PDE1_CACHE_PTE" block=MCVML2 event=61 descr="pde1 cache pte"
-  ></metric>
-  <metric
-    name="MCVML2_PDE2_CACHE_REQUEST" block=MCVML2 event=62 descr="pde2 cache request"
-  ></metric>
-  <metric
-    name="MCVML2_PDE2_CACHE_HIT" block=MCVML2 event=63 descr="pde2 cache hit"
-  ></metric>
-  <metric
-    name="MCVML2_PDE2_CACHE_MISS" block=MCVML2 event=64 descr="pde2 cache miss"
-  ></metric>
-  <metric
-    name="MCVML2_PDE2_CACHE_UPDATE" block=MCVML2 event=65 descr="pde2 cache update"
-  ></metric>
-  <metric
-    name="MCVML2_PDE2_CACHE_PTE" block=MCVML2 event=66 descr="pde2 cache pte"
-  ></metric>
-  <metric
-    name="MCVML2_LOG_INVAL" block=MCVML2 event=67 descr="log inval"
-  ></metric>
-  <metric
-    name="MCVML2_LOG_TRANS" block=MCVML2 event=68 descr="log trans"
-  ></metric>
-  <metric
-    name="MCVML2_LOG_TRANS_SKIPPED" block=MCVML2 event=69 descr="log trans skipped"
-  ></metric>
-  <metric
-    name="MCVML2_RDIF_REQUEST_PHYSICAL_SYSTEM" block=MCVML2 event=70 descr="rdif request physical system"
-  ></metric>
-  <metric
-    name="MCVML2_RDIF_REQUEST_PHYSICAL_SYSTEM_START_LATENCY" block=MCVML2 event=71 descr="rdif request physical system start (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_RDIF_REQUEST_PHYSICAL_SYSTEM_STOP_LATENCY" block=MCVML2 event=72 descr="rdif request physical system stop (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_RDIF_REQUEST_OTHER" block=MCVML2 event=73 descr="rdif request other"
-  ></metric>
-  <metric
-    name="MCVML2_RDIF_REQUEST_OTHER_START_LATENCY" block=MCVML2 event=74 descr="rdif request other start (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_RDIF_REQUEST_OTHER_STOP_LATENCY" block=MCVML2 event=75 descr="rdif request other stop (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_QOS_REQUEST" block=MCVML2 event=76 descr="qos request"
-  ></metric>
-  <metric
-    name="MCVML2_QOS_HIT_FETCH_SKIPPED" block=MCVML2 event=77 descr="qos hit (fetch skipped)"
-  ></metric>
-  <metric
-    name="MCVML2_QOS_MISS_FETCH_ISSUED" block=MCVML2 event=78 descr="qos miss (fetch issued)"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL0_REQUEST" block=MCVML2 event=79 descr="level0 request"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL1_REQUEST" block=MCVML2 event=80 descr="level1 request"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL2_REQUEST" block=MCVML2 event=81 descr="level2 request"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL3_REQUEST" block=MCVML2 event=82 descr="level3 request"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL0_REQUEST_START_LATENCY" block=MCVML2 event=83 descr="level0 request start (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL0_REQUEST_STOP_LATENCY" block=MCVML2 event=84 descr="level0 request stop (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL1_REQUEST_START_LATENCY" block=MCVML2 event=85 descr="level1 request start (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL1_REQUEST_STOP_LATENCY" block=MCVML2 event=86 descr="level1 request stop (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL2_REQUEST_START_LATENCY" block=MCVML2 event=87 descr="level2 request start (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL2_REQUEST_STOP_LATENCY" block=MCVML2 event=88 descr="level2 request stop (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL3_REQUEST_START_LATENCY" block=MCVML2 event=89 descr="level3 request start (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL3_REQUEST_STOP_LATENCY" block=MCVML2 event=90 descr="level3 request stop (latency)"
-  ></metric>
-  # ATC counters
-  <metric
-    name="ATC_A_VALUE_OF_0_MEANS_COUNT_CYCLES_OTHERWISE_SELECTS" block=ATC event=0 descr="A value of 0 means count cycles otherwise selects event to count "
-  ></metric>
-  <metric
-    name="ATC_EVENT_START_FOR_STATISTICAL_MIN_SCLKS_FROM_ATC_RPB_REQ_TRANSLATION" block=ATC event=1 descr="event start for statistical min sclks from ATC_RPB_req translation request to RPB_ATC_ret completion"
-  ></metric>
-  <metric
-    name="ATC_EVENT_END_FOR_STATISTICAL_MIN_SCLKS_FROM_ATC_RPB_REQ_TRANSLATION" block=ATC event=2 descr="event end for statistical min sclks from ATC_RPB_req translation request to RPB_ATC_ret completion"
-  ></metric>
-  <metric
-    name="ATC_EVENT_START_FOR_STATISTICAL_MIN_SCLKS_FROM_ATC_RPB_REQ_PAGE" block=ATC event=3 descr="event start for statistical min sclks from ATC_RPB_req page request to RPB_ATC_ret page return"
-  ></metric>
-  <metric
-    name="ATC_EVENT_END_FOR_STATISTICAL_MIN_SCLKS_FROM_ATC_RPB_REQ_PAGE" block=ATC event=4 descr="event end for statistical min sclks from ATC_RPB_req page request to RPB_ATC_ret page return"
-  ></metric>
-  <metric
-    name="ATC_EVENT_START_FOR_STATISTICAL_MAX_SCLKS_FROM_ATC_RPB_REQ_TRANSLATION" block=ATC event=5 descr="event start for statistical max sclks from ATC_RPB_req translation request to RPB_ATC_ret completion"
-  ></metric>
-  <metric
-    name="ATC_EVENT_END_FOR_STATISTICAL_MAX_SCLKS_FROM_ATC_RPB_REQ_TRANSLATION" block=ATC event=6 descr="event end for statistical max sclks from ATC_RPB_req translation request to RPB_ATC_ret completion"
-  ></metric>
-  <metric
-    name="ATC_EVENT_START_FOR_STATISTICAL_MAX_SCLKS_FROM_ATC_RPB_REQ_PAGE" block=ATC event=7 descr="event start for statistical max sclks from ATC_RPB_req page request to RPB_ATC_ret page return"
-  ></metric>
-  <metric
-    name="ATC_EVENT_END_FOR_STATISTICAL_MAX_SCLKS_FROM_ATC_RPB_REQ_PAGE" block=ATC event=8 descr="event end for statistical max sclks from ATC_RPB_req page request to RPB_ATC_ret page return"
-  ></metric>
-  <metric
-    name="ATC_EVENT_START_FOR_MAX_SCLKS_FROM_ATS_L2_INVALIDATE_REQUEST" block=ATC event=9 descr="event start for max sclks from ATS_L2 invalidate request to L2_ATS invalidate ack"
-  ></metric>
-  <metric
-    name="ATC_EVENT_END_FOR_MAX_SCLKS_FROM_ATS_L2_INVALIDATE_REQUEST" block=ATC event=10 descr="event end for max sclks from ATS_L2 invalidate request to L2_ATS invalidate ack"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_REQUESTS_FROM_L2" block=ATC event=11 descr="number of requests from L2"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_FIRST_TIME_TRANS_SUCCESSES" block=ATC event=12 descr="number of first time trans successes"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_PRI_REQUESTS" block=ATC event=13 descr="number of pri requests"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_TRANS_FAILURES" block=ATC event=14 descr="number of trans failures"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_PRI_REQUESTS_NOT_SATISFIED" block=ATC event=15 descr="number of pri requests not satisfied"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_INVALIDATE_REQUESTS_W_PASID_TO_GET_A" block=ATC event=16 descr="number of invalidate requests w PASID to get a correct number"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_INVALIDATE_REQUESTS_W_OUT_PASID" block=ATC event=17 descr="number of invalidate requests w out PASID"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_PASID_CHANGES" block=ATC event=18 descr="number of PASID changes"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_TIMES_1_TRANSLATIONS_RETURNED" block=ATC event=19 descr="number of times 1 translations returned"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_TIMES_2_8_TRANSLATIONS_RETURNED_NOT_BLOCKED" block=ATC event=20 descr="number of times 2 8 translations returned not blocked by invalidations"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_TIMES_5_8_TRANSLATIONS_RETURNED_NOT_BLOCKED" block=ATC event=21 descr="number of times 5 8 translations returned not blocked by invalidations"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_TIMES_SIZE_BIT_WAS_SET_ON_NON" block=ATC event=22 descr="number of times size bit was set on non speculative transactions returned to L2 (>4K translation was returned)"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_INVALIDATE_REQUESTS_THAT_MATCHED_MULTIPLE_VMIDS_EVENT" block=ATC event=23 descr="number of invalidate requests that matched multiple vmids event"
-  ></metric>
-</gfx90a>
diff --git a/src/perfmon_pub/gfx9_metrics.xml b/src/perfmon_pub/gfx9_metrics.xml
deleted file mode 100644
index f9767b3750..0000000000
--- a/src/perfmon_pub/gfx9_metrics.xml
+++ /dev/null
@@ -1,5161 +0,0 @@
-<gfx9>
-  # CPC counters
-  <metric
-    name="CPC_ALWAYS_COUNT" block=CPC event=0 descr="Always Count."
-  ></metric>
-  <metric
-    name="CPC_RCIU_STALL_WAIT_ON_FREE" block=CPC event=1 descr="RCIU Stall Waiting on Free."
-  ></metric>
-  <metric
-    name="CPC_RCIU_STALL_PRIV_VIOLATION" block=CPC event=2 descr="RCIU Stall on Priv violation."
-  ></metric>
-  <metric
-    name="CPC_MIU_STALL_ON_RDREQ_FREE" block=CPC event=3 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPC_MIU_STALL_ON_WRREQ_FREE" block=CPC event=4 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPC_TCIU_STALL_WAIT_ON_FREE" block=CPC event=5 descr="TCIU Stall waiting for free."
-  ></metric>
-  <metric
-    name="CPC_ME1_STALL_WAIT_ON_RCIU_READY" block=CPC event=6 descr="Me1 stall waiting on RCIU Ready."
-  ></metric>
-  <metric
-    name="CPC_ME1_STALL_WAIT_ON_RCIU_READY_PERF" block=CPC event=7 descr="Me1 stall waiting on RCIU Ready Perf."
-  ></metric>
-  <metric
-    name="CPC_ME1_STALL_WAIT_ON_RCIU_READ" block=CPC event=8 descr="Me1 stall waiting on RCIU read."
-  ></metric>
-  <metric
-    name="CPC_ME1_STALL_WAIT_ON_MIU_READ" block=CPC event=9 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPC_ME1_STALL_WAIT_ON_MIU_WRITE" block=CPC event=10 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPC_ME1_STALL_ON_DATA_FROM_ROQ" block=CPC event=11 descr="Me1 stall on data from roq."
-  ></metric>
-  <metric
-    name="CPC_ME1_STALL_ON_DATA_FROM_ROQ_PERF" block=CPC event=12 descr="Me1 stall on data from roq Perf."
-  ></metric>
-  <metric
-    name="CPC_ME1_BUSY_FOR_PACKET_DECODE" block=CPC event=13 descr="Me1 busy for packet decode."
-  ></metric>
-  <metric
-    name="CPC_ME2_STALL_WAIT_ON_RCIU_READY" block=CPC event=14 descr="Me2 stall waiting on RCIU Ready. (Valid Only if ME2 is available"
-  ></metric>
-  <metric
-    name="CPC_ME2_STALL_WAIT_ON_RCIU_READY_PERF" block=CPC event=15 descr="Me2 stall waiting on RCIU Ready Perf. (Valid Only if ME2 is available"
-  ></metric>
-  <metric
-    name="CPC_ME2_STALL_WAIT_ON_RCIU_READ" block=CPC event=16 descr="Me2 stall waiting on RCIU read. (Valid Only if ME2 is available"
-  ></metric>
-  <metric
-    name="CPC_ME2_STALL_WAIT_ON_MIU_READ" block=CPC event=17 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPC_ME2_STALL_WAIT_ON_MIU_WRITE" block=CPC event=18 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPC_ME2_STALL_ON_DATA_FROM_ROQ" block=CPC event=19 descr="Me2 stall on data from roq. (Valid Only if ME2 is available"
-  ></metric>
-  <metric
-    name="CPC_ME2_STALL_ON_DATA_FROM_ROQ_PERF" block=CPC event=20 descr="Me2 stall on data from roq Perf. (Valid Only if ME2 is available"
-  ></metric>
-  <metric
-    name="CPC_ME2_BUSY_FOR_PACKET_DECODE" block=CPC event=21 descr="Me2 busy for packet decode. (Valid Only if ME2 is available"
-  ></metric>
-  <metric
-    name="CPC_UTCL2IU_STALL_WAIT_ON_FREE" block=CPC event=22 descr="UTCL2IU is stalled waiting on credits from the UTCL2."
-  ></metric>
-  <metric
-    name="CPC_UTCL2IU_STALL_WAIT_ON_TAGS" block=CPC event=23 descr="UTCL2IU has used all available tags and is waiting on the UTCL2 to return them."
-  ></metric>
-  <metric
-    name="CPC_UTCL1_STALL_ON_TRANSLATION" block=CPC event=24 descr="One of the UTCL1s is stalled waiting on translation, XNACK or PENDING response."
-  ></metric>
-  <metric
-    name="CPC_CPC_STAT_BUSY" block=CPC event=25 descr="CPC Busy."
-  ></metric>
-  <metric
-    name="CPC_CPC_STAT_IDLE" block=CPC event=26 descr="CPC Idle."
-  ></metric>
-  <metric
-    name="CPC_CPC_STAT_STALL" block=CPC event=27 descr="CPC Stalled."
-  ></metric>
-  <metric
-    name="CPC_CPC_TCIU_BUSY" block=CPC event=28 descr="CPC TCIU interface Busy."
-  ></metric>
-  <metric
-    name="CPC_CPC_TCIU_IDLE" block=CPC event=29 descr="CPC TCIU interface Idle."
-  ></metric>
-  <metric
-    name="CPC_CPC_UTCL2IU_BUSY" block=CPC event=30 descr="CPC UTCL2 interface Busy."
-  ></metric>
-  <metric
-    name="CPC_CPC_UTCL2IU_IDLE" block=CPC event=31 descr="CPC UTCL2 interface Idle."
-  ></metric>
-  <metric
-    name="CPC_CPC_UTCL2IU_STALL" block=CPC event=32 descr="CPC UTCL2 interface Stalled waiting on Free, Tags or Translation."
-  ></metric>
-  <metric
-    name="CPC_ME1_DC0_SPI_BUSY" block=CPC event=33 descr="CPC Me1 Processor Busy."
-  ></metric>
-  <metric
-    name="CPC_ME2_DC1_SPI_BUSY" block=CPC event=34 descr="CPC Me2 Processor Busy. (Valid Only if ME2 is available)"
-  ></metric>
-  # CPF counters
-  <metric
-    name="CPF_ALWAYS_COUNT" block=CPF event=0 descr="Always Count."
-  ></metric>
-  <metric
-    name="CPF_MIU_STALLED_WAITING_RDREQ_FREE" block=CPF event=1 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPF_TCIU_STALLED_WAITING_ON_FREE" block=CPF event=2 descr="CPF TCIU stalled waiting on Free."
-  ></metric>
-  <metric
-    name="CPF_TCIU_STALLED_WAITING_ON_TAGS" block=CPF event=3 descr="CPF TCIU stalled waiting on tags."
-  ></metric>
-  <metric
-    name="CPF_CSF_BUSY_FOR_FETCHING_RING" block=CPF event=4 descr="CSF busy for fetching Ring data."
-  ></metric>
-  <metric
-    name="CPF_CSF_BUSY_FOR_FETCHING_IB1" block=CPF event=5 descr="CSF busy for fetching Indirect buffer 1."
-  ></metric>
-  <metric
-    name="CPF_CSF_BUSY_FOR_FETCHING_IB2" block=CPF event=6 descr="CSF busy for fetching Indirect buffer 2."
-  ></metric>
-  <metric
-    name="CPF_CSF_BUSY_FOR_FECTHINC_STATE" block=CPF event=7 descr="CSF busy for fetching state data."
-  ></metric>
-  <metric
-    name="CPF_MIU_BUSY_FOR_OUTSTANDING_TAGS" block=CPF event=8 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPF_CSF_RTS_MIU_NOT_RTR" block=CPF event=9 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPF_CSF_STATE_FIFO_NOT_RTR" block=CPF event=10 descr="CSF state fifo no RTR."
-  ></metric>
-  <metric
-    name="CPF_CSF_FETCHING_CMD_BUFFERS" block=CPF event=11 descr="CSF is fetching command buffers."
-  ></metric>
-  <metric
-    name="CPF_GRBM_DWORDS_SENT" block=CPF event=12 descr="CPF to GRBM 4 Dwords sent."
-  ></metric>
-  <metric
-    name="CPF_DYNAMIC_CLOCK_VALID" block=CPF event=13 descr="CPF Dynamic clock is valid."
-  ></metric>
-  <metric
-    name="CPF_REGISTER_CLOCK_VALID" block=CPF event=14 descr="CPF register clock is valid."
-  ></metric>
-  <metric
-    name="CPF_MIU_WRITE_REQUEST_SEND" block=CPF event=15 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPF_MIU_READ_REQUEST_SEND" block=CPF event=16 descr="Reserved."
-  ></metric>
-  <metric
-    name="CPF_UTCL2IU_STALL_WAIT_ON_FREE" block=CPF event=17 descr="UTCL2IU is stalled waiting on credits from the UTCL2."
-  ></metric>
-  <metric
-    name="CPF_UTCL2IU_STALL_WAIT_ON_TAGS" block=CPF event=18 descr="UTCL2IU has used all available tags and is waiting on the UTCL2 to return them."
-  ></metric>
-  <metric
-    name="CPF_GFX_UTCL1_STALL_ON_TRANSLATION" block=CPF event=19 descr="One of the Graphics UTCL1s is stalled waiting on translation, XNACK or PENDING response."
-  ></metric>
-  <metric
-    name="CPF_CMP_UTCL1_STALL_ON_TRANSLATION" block=CPF event=20 descr="One of the Compute UTCL1s is stalled waiting on translation, XNACK or PENDING response."
-  ></metric>
-  <metric
-    name="CPF_RCIU_STALL_WAIT_ON_FREE" block=CPF event=21 descr="CPF RCIU is stalled waiting on credits from GRBM."
-  ></metric>
-  <metric
-    name="CPF_TCIU_READ_REQUEST_SENT" block=CPF event=22 descr="Count of TC read requests"
-  ></metric>
-  <metric
-    name="CPF_CPF_STAT_BUSY" block=CPF event=23 descr="CPF Busy."
-  ></metric>
-  <metric
-    name="CPF_CPF_STAT_IDLE" block=CPF event=24 descr="CPF Idle."
-  ></metric>
-  <metric
-    name="CPF_CPF_STAT_STALL" block=CPF event=25 descr="CPF Stalled."
-  ></metric>
-  <metric
-    name="CPF_CPF_TCIU_BUSY" block=CPF event=26 descr="CPF TCIU interface Busy."
-  ></metric>
-  <metric
-    name="CPF_CPF_TCIU_IDLE" block=CPF event=27 descr="CPF TCIU interface Idle."
-  ></metric>
-  <metric
-    name="CPF_CPF_TCIU_STALL" block=CPF event=28 descr="CPF TCIU interface Stalled waiting on Free, Tags."
-  ></metric>
-  <metric
-    name="CPF_CPF_UTCL2IU_BUSY" block=CPF event=29 descr="CPF UTCL2 interface Busy."
-  ></metric>
-  <metric
-    name="CPF_CPF_UTCL2IU_IDLE" block=CPF event=30 descr="CPF UTCL2 interface Idle."
-  ></metric>
-  <metric
-    name="CPF_CPF_UTCL2IU_STALL" block=CPF event=31 descr="CPF UTCL2 interface Stalled waiting on Free, Tags."
-  ></metric>
-  # GDS counters
-  <metric
-    name="GDS_DS_ADDR_CONFL" block=GDS event=0 descr="Number of conflicting addresses in DS memory"
-  ></metric>
-  <metric
-    name="GDS_DS_BANK_CONFL" block=GDS event=1 descr="Number of conflicting banks in DS memory"
-  ></metric>
-  <metric
-    name="GDS_WBUF_FLUSH" block=GDS event=2 descr="Number of times the RBIU write buffer is flushed"
-  ></metric>
-  <metric
-    name="GDS_WR_COMP" block=GDS event=3 descr="Number of times a WRITE_COMPLETE is put in write buffer"
-  ></metric>
-  <metric
-    name="GDS_WBUF_WR" block=GDS event=4 descr="Number of times the RBIU writes to buffer"
-  ></metric>
-  <metric
-    name="GDS_RBUF_HIT" block=GDS event=5 descr="Number of times an RBIU read hits in the buffer"
-  ></metric>
-  <metric
-    name="GDS_RBUF_MISS" block=GDS event=6 descr="Number of times an RBIU read misses the buffer"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_NORET" block=GDS event=7 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_RET" block=GDS event=8 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_ORD_CNT" block=GDS event=9 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_2COMP_REQ" block=GDS event=10 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_ORD_WAVE_VALID" block=GDS event=11 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_GDS_DATA_VALID" block=GDS event=12 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_GDS_STALL_BY_ORD" block=GDS event=13 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_GDS_WR_OP" block=GDS event=14 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_GDS_RD_OP" block=GDS event=15 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_GDS_ATOM_OP" block=GDS event=16 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_GDS_REL_OP" block=GDS event=17 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_GDS_CMPXCH_OP" block=GDS event=18 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_GDS_BYTE_OP" block=GDS event=19 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH0_GDS_SHORT_OP" block=GDS event=20 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_NORET" block=GDS event=21 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_RET" block=GDS event=22 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_ORD_CNT" block=GDS event=23 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_2COMP_REQ" block=GDS event=24 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_ORD_WAVE_VALID" block=GDS event=25 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_GDS_DATA_VALID" block=GDS event=26 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_GDS_STALL_BY_ORD" block=GDS event=27 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_GDS_WR_OP" block=GDS event=28 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_GDS_RD_OP" block=GDS event=29 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_GDS_ATOM_OP" block=GDS event=30 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_GDS_REL_OP" block=GDS event=31 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_GDS_CMPXCH_OP" block=GDS event=32 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_GDS_BYTE_OP" block=GDS event=33 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE0_SH1_GDS_SHORT_OP" block=GDS event=34 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_NORET" block=GDS event=35 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_RET" block=GDS event=36 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_ORD_CNT" block=GDS event=37 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_2COMP_REQ" block=GDS event=38 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_ORD_WAVE_VALID" block=GDS event=39 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_GDS_DATA_VALID" block=GDS event=40 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_GDS_STALL_BY_ORD" block=GDS event=41 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_GDS_WR_OP" block=GDS event=42 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_GDS_RD_OP" block=GDS event=43 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_GDS_ATOM_OP" block=GDS event=44 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_GDS_REL_OP" block=GDS event=45 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_GDS_CMPXCH_OP" block=GDS event=46 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_GDS_BYTE_OP" block=GDS event=47 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH0_GDS_SHORT_OP" block=GDS event=48 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_NORET" block=GDS event=49 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_RET" block=GDS event=50 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_ORD_CNT" block=GDS event=51 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_2COMP_REQ" block=GDS event=52 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_ORD_WAVE_VALID" block=GDS event=53 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_GDS_DATA_VALID" block=GDS event=54 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_GDS_STALL_BY_ORD" block=GDS event=55 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_GDS_WR_OP" block=GDS event=56 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_GDS_RD_OP" block=GDS event=57 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_GDS_ATOM_OP" block=GDS event=58 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_GDS_REL_OP" block=GDS event=59 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_GDS_CMPXCH_OP" block=GDS event=60 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_GDS_BYTE_OP" block=GDS event=61 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE1_SH1_GDS_SHORT_OP" block=GDS event=62 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_NORET" block=GDS event=63 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_RET" block=GDS event=64 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_ORD_CNT" block=GDS event=65 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_2COMP_REQ" block=GDS event=66 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_ORD_WAVE_VALID" block=GDS event=67 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_GDS_DATA_VALID" block=GDS event=68 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_GDS_STALL_BY_ORD" block=GDS event=69 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_GDS_WR_OP" block=GDS event=70 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_GDS_RD_OP" block=GDS event=71 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_GDS_ATOM_OP" block=GDS event=72 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_GDS_REL_OP" block=GDS event=73 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_GDS_CMPXCH_OP" block=GDS event=74 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_GDS_BYTE_OP" block=GDS event=75 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH0_GDS_SHORT_OP" block=GDS event=76 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_NORET" block=GDS event=77 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_RET" block=GDS event=78 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_ORD_CNT" block=GDS event=79 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_2COMP_REQ" block=GDS event=80 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_ORD_WAVE_VALID" block=GDS event=81 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_GDS_DATA_VALID" block=GDS event=82 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_GDS_STALL_BY_ORD" block=GDS event=83 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_GDS_WR_OP" block=GDS event=84 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_GDS_RD_OP" block=GDS event=85 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_GDS_ATOM_OP" block=GDS event=86 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_GDS_REL_OP" block=GDS event=87 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_GDS_CMPXCH_OP" block=GDS event=88 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_GDS_BYTE_OP" block=GDS event=89 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE2_SH1_GDS_SHORT_OP" block=GDS event=90 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_NORET" block=GDS event=91 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_RET" block=GDS event=92 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_ORD_CNT" block=GDS event=93 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_2COMP_REQ" block=GDS event=94 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_ORD_WAVE_VALID" block=GDS event=95 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_GDS_DATA_VALID" block=GDS event=96 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_GDS_STALL_BY_ORD" block=GDS event=97 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_GDS_WR_OP" block=GDS event=98 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_GDS_RD_OP" block=GDS event=99 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_GDS_ATOM_OP" block=GDS event=100 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_GDS_REL_OP" block=GDS event=101 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_GDS_CMPXCH_OP" block=GDS event=102 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_GDS_BYTE_OP" block=GDS event=103 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH0_GDS_SHORT_OP" block=GDS event=104 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_NORET" block=GDS event=105 descr="Number of commands that do not return data"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_RET" block=GDS event=106 descr="Number of commands that do return data"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_ORD_CNT" block=GDS event=107 descr="Number of ordered count operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_2COMP_REQ" block=GDS event=108 descr="Number of commands that return two components"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_ORD_WAVE_VALID" block=GDS event=109 descr="Number of valid wave ID's processed by ordered append"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_GDS_DATA_VALID" block=GDS event=110 descr="Number of valid write enables from the data bus"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_GDS_STALL_BY_ORD" block=GDS event=111 descr="Number of cycles GDS data is stalled due to Ordered count data"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_GDS_WR_OP" block=GDS event=112 descr="Number of GDS Write operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_GDS_RD_OP" block=GDS event=113 descr="Number of GDS Read operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_GDS_ATOM_OP" block=GDS event=114 descr="Number of GDS Atomic operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_GDS_REL_OP" block=GDS event=115 descr="Number of GDS Relative operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_GDS_CMPXCH_OP" block=GDS event=116 descr="Number of GDS Compare or Exchange operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_GDS_BYTE_OP" block=GDS event=117 descr="Number of GDS byte operations"
-  ></metric>
-  <metric
-    name="GDS_SE3_SH1_GDS_SHORT_OP" block=GDS event=118 descr="Number of GDS short operations"
-  ></metric>
-  <metric
-    name="GDS_GWS_RELEASED" block=GDS event=119 descr="Number of waves released by GWS"
-  ></metric>
-  <metric
-    name="GDS_GWS_BYPASS" block=GDS event=120 descr="Number of waves bypassed by GWS"
-  ></metric>
-  # GRBM counters
-  <metric
-    name="GRBM_COUNT" block=GRBM event=0 descr="Tie High - Count Number of Clocks"
-  ></metric>
-  <metric
-    name="GRBM_USER_DEFINED" block=GRBM event=1 descr="User defined performance select."
-  ></metric>
-  <metric
-    name="GRBM_GUI_ACTIVE" block=GRBM event=2 descr="The GUI is Active"
-  ></metric>
-  <metric
-    name="GRBM_CP_BUSY" block=GRBM event=3 descr="Any of the Command Processor (CPG/CPC/CPF) blocks are busy."
-  ></metric>
-  <metric
-    name="GRBM_CP_COHER_BUSY" block=GRBM event=4 descr="The Command Processor Graphics (CPG) Surface Coherency Logic is busy."
-  ></metric>
-  <metric
-    name="GRBM_CP_DMA_BUSY" block=GRBM event=5 descr="The Command Processor Graphics (CPG) DMA Logic is busy."
-  ></metric>
-  <metric
-    name="GRBM_CB_BUSY" block=GRBM event=6 descr="Any of the Color Blocks (CB) are busy in the shader engine(s)."
-  ></metric>
-  <metric
-    name="GRBM_DB_BUSY" block=GRBM event=7 descr="Any of the Depth Blocks (DB) are busy in the shader engine(s)."
-  ></metric>
-  <metric
-    name="GRBM_PA_BUSY" block=GRBM event=8 descr="Any of the Primitive Assembly Blocks (PA) are busy in the shader engine(s)."
-  ></metric>
-  <metric
-    name="GRBM_SC_BUSY" block=GRBM event=9 descr="Any of the Scan Converter Blocks (SC) are busy in the shader engine(s)."
-  ></metric>
-  <metric
-    name="GRBM_RESERVED_6" block=GRBM event=10 descr="Reserved to maintain backwards compatibility."
-  ></metric>
-  <metric
-    name="GRBM_SPI_BUSY" block=GRBM event=11 descr="Any of the Shader Pipe Interpolators (SPI) are busy in the shader engine(s)."
-  ></metric>
-  <metric
-    name="GRBM_SX_BUSY" block=GRBM event=12 descr="Any of the Shader Export Blocks (SX) are busy."
-  ></metric>
-  <metric
-    name="GRBM_TA_BUSY" block=GRBM event=13 descr="Any of the Texture Pipes (TA) are busy in the shader engine(s)."
-  ></metric>
-  <metric
-    name="GRBM_CB_CLEAN" block=GRBM event=14 descr="Any of the Color Blocks (CB) are not clean in all shader engine(s)."
-  ></metric>
-  <metric
-    name="GRBM_DB_CLEAN" block=GRBM event=15 descr="Any of the Depth Blocks (DB) are not clean in all shader engine(s)."
-  ></metric>
-  <metric
-    name="GRBM_RESERVED_5" block=GRBM event=16 descr="Reserved to maintain backwards compatibility."
-  ></metric>
-  <metric
-    name="GRBM_VGT_BUSY" block=GRBM event=17 descr="Any of the Vertex Geometry Tessellator Blocks (VGT) are busy in the shader engine(s)."
-  ></metric>
-  <metric
-    name="GRBM_RESERVED_4" block=GRBM event=18 descr="Reserved to maintain backwards compatibility."
-  ></metric>
-  <metric
-    name="GRBM_RESERVED_3" block=GRBM event=19 descr="Reserved to maintain backwards compatibility."
-  ></metric>
-  <metric
-    name="GRBM_RESERVED_2" block=GRBM event=20 descr="Reserved to maintain backwards compatibility."
-  ></metric>
-  <metric
-    name="GRBM_RESERVED_1" block=GRBM event=21 descr="Reserved to maintain backwards compatibility."
-  ></metric>
-  <metric
-    name="GRBM_RESERVED_0" block=GRBM event=22 descr="Reserved to maintain backwards compatibility."
-  ></metric>
-  <metric
-    name="GRBM_IA_BUSY" block=GRBM event=23 descr="The Input Assembler (IA) is busy."
-  ></metric>
-  <metric
-    name="GRBM_IA_NO_DMA_BUSY" block=GRBM event=24 descr="The Input Assembler (IA) is busy; Does not include the Index DMA engine status."
-  ></metric>
-  <metric
-    name="GRBM_GDS_BUSY" block=GRBM event=25 descr="The Global Data Share (GDS) is busy."
-  ></metric>
-  <metric
-    name="GRBM_BCI_BUSY" block=GRBM event=26 descr="Any of the Barycentric Interpolators (BCI) are busy in the shader engine(s)."
-  ></metric>
-  <metric
-    name="GRBM_RLC_BUSY" block=GRBM event=27 descr="The Ring List Controller (RLC) is busy."
-  ></metric>
-  <metric
-    name="GRBM_TC_BUSY" block=GRBM event=28 descr="Any of the Texture Cache Blocks (TCP/TCI/TCA/TCC) are busy."
-  ></metric>
-  <metric
-    name="GRBM_CPG_BUSY" block=GRBM event=29 descr="The Command Processor Graphics (CPG) is busy."
-  ></metric>
-  <metric
-    name="GRBM_CPC_BUSY" block=GRBM event=30 descr="The Command Processor Compute (CPC) is busy."
-  ></metric>
-  <metric
-    name="GRBM_CPF_BUSY" block=GRBM event=31 descr="The Command Processor Fetchers (CPF) is busy."
-  ></metric>
-  <metric
-    name="GRBM_WD_BUSY" block=GRBM event=32 descr="The Work Distributor (WD) is busy."
-  ></metric>
-  <metric
-    name="GRBM_WD_NO_DMA_BUSY" block=GRBM event=33 descr="The Work Distributor (WD) is busy; Does not include the Index DMA engine status."
-  ></metric>
-  <metric
-    name="GRBM_UTCL2_BUSY" block=GRBM event=34 descr="The Unified Translation Cache Level-2 (UTCL2) block is busy."
-  ></metric>
-  <metric
-    name="GRBM_EA_BUSY" block=GRBM event=35 descr="The Efficiency Arbiter (EA) block is busy."
-  ></metric>
-  <metric
-    name="GRBM_RMI_BUSY" block=GRBM event=36 descr="The Render Backend Memory Interface (RMI) block is busy."
-  ></metric>
-  <metric
-    name="GRBM_CPAXI_BUSY" block=GRBM event=37 descr="The CPAXI block is busy."
-  ></metric>
-  # SPI counters
-  <metric
-    name="SPI_VS_WINDOW_VALID" block=SPI event=0 descr="Clock count enabled by perfcounter_start event."
-  ></metric>
-  <metric
-    name="SPI_VS_BUSY" block=SPI event=1 descr="Number of clocks with outstanding waves (SPI or SH)."
-  ></metric>
-  <metric
-    name="SPI_VS_FIRST_WAVE" block=SPI event=2 descr="Number of VS_IS_DS first waves"
-  ></metric>
-  <metric
-    name="SPI_VS_LAST_WAVE" block=SPI event=3 descr="Number of VS_IS_DS last waves."
-  ></metric>
-  <metric
-    name="SPI_VS_LSHS_DEALLOC" block=SPI event=4 descr="Number of VS_IS_DS lds dealloc waves."
-  ></metric>
-  <metric
-    name="SPI_VS_PC_STALL" block=SPI event=5 descr="Number of clocks stalled due to pc space."
-  ></metric>
-  <metric
-    name="SPI_VS_POS0_STALL" block=SPI event=6 descr="Number of clocks stalled due to pos buf space in SH0."
-  ></metric>
-  <metric
-    name="SPI_VS_POS1_STALL" block=SPI event=7 descr="Number of clocks stalled due to pos buf space in SH1."
-  ></metric>
-  <metric
-    name="SPI_VS_CRAWLER_STALL" block=SPI event=8 descr="Number of clocks event/wave order fifo is full."
-  ></metric>
-  <metric
-    name="SPI_VS_EVENT_WAVE" block=SPI event=9 descr="Number of events and waves."
-  ></metric>
-  <metric
-    name="SPI_VS_WAVE" block=SPI event=10 descr="Number of waves"
-  ></metric>
-  <metric
-    name="SPI_VS_PERS_UPD_FULL0" block=SPI event=11 descr="Number of clks VS persistent state update fifo0 is full."
-  ></metric>
-  <metric
-    name="SPI_VS_PERS_UPD_FULL1" block=SPI event=12 descr="Number of clks VS persistent state update fifo1 is full."
-  ></metric>
-  <metric
-    name="SPI_VS_LATE_ALLOC_FULL" block=SPI event=13 descr="Number of clks VS late alloc fifo is full."
-  ></metric>
-  <metric
-    name="SPI_VS_FIRST_SUBGRP" block=SPI event=14 descr="Number of first of subgroup waves."
-  ></metric>
-  <metric
-    name="SPI_VS_LAST_SUBGRP" block=SPI event=15 descr="Number of last of subgroup waves."
-  ></metric>
-  <metric
-    name="SPI_VS_ALLOC_CNT" block=SPI event=16 descr="Number of launched VS waves that rasterize (alloc export space)"
-  ></metric>
-  <metric
-    name="SPI_VS_PC_ALLOC_CNT" block=SPI event=17 descr="Number of parameter cache lines allocated"
-  ></metric>
-  <metric
-    name="SPI_VS_LATE_ALLOC_ACCUM" block=SPI event=18 descr="Accumulation of number of VS waves pending export allocation"
-  ></metric>
-  <metric
-    name="SPI_GS_WINDOW_VALID" block=SPI event=19 descr="Clock count enabled by perfcounter_start event."
-  ></metric>
-  <metric
-    name="SPI_GS_BUSY" block=SPI event=20 descr="Number of clocks with outstanding waves (SPI or SH)."
-  ></metric>
-  <metric
-    name="SPI_GS_CRAWLER_STALL" block=SPI event=21 descr="Number of clocks event/wave order fifo is full."
-  ></metric>
-  <metric
-    name="SPI_GS_EVENT_WAVE" block=SPI event=22 descr="Number of events and waves"
-  ></metric>
-  <metric
-    name="SPI_GS_WAVE" block=SPI event=23 descr="Number of waves."
-  ></metric>
-  <metric
-    name="SPI_GS_PERS_UPD_FULL0" block=SPI event=24 descr="Number of clks GS persistent state update fifo0 is full."
-  ></metric>
-  <metric
-    name="SPI_GS_PERS_UPD_FULL1" block=SPI event=25 descr="Number of clks GS persistent state update fifo1 is full."
-  ></metric>
-  <metric
-    name="SPI_GS_FIRST_SUBGRP" block=SPI event=26 descr="Number of first of subgroup waves."
-  ></metric>
-  <metric
-    name="SPI_GS_LAST_SUBGRP" block=SPI event=27 descr="Number of last of subgroup waves."
-  ></metric>
-  <metric
-    name="SPI_GS_HS_DEALLOC" block=SPI event=28 descr="Number of offchip hs dealloc events read from crawler."
-  ></metric>
-  <metric
-    name="SPI_GS_NGG_SE_LATE_ALLOC_LIMIT" block=SPI event=29 descr="Number of clks this SE has reached allocation wave limit (can not launch more waves until pending ones allocate)."
-  ></metric>
-  <metric
-    name="SPI_GS_GRP_FIFO_FULL" block=SPI event=30 descr="GS Group FIFO full count"
-  ></metric>
-  <metric
-    name="SPI_HS_WINDOW_VALID" block=SPI event=31 descr="Clock count enabled by perfcounter_start event."
-  ></metric>
-  <metric
-    name="SPI_HS_BUSY" block=SPI event=32 descr="Number of clocks with outstanding waves (SPI or SH)."
-  ></metric>
-  <metric
-    name="SPI_HS_CRAWLER_STALL" block=SPI event=33 descr="Number of clocks event/wave order fifo is full."
-  ></metric>
-  <metric
-    name="SPI_HS_FIRST_WAVE" block=SPI event=34 descr="Number of first waves."
-  ></metric>
-  <metric
-    name="SPI_HS_LAST_WAVE" block=SPI event=35 descr="Number of last waves."
-  ></metric>
-  <metric
-    name="SPI_HS_OFFCHIP_LDS_STALL" block=SPI event=36 descr="Number of clks HS waits to allocate offchip LDS space."
-  ></metric>
-  <metric
-    name="SPI_HS_EVENT_WAVE" block=SPI event=37 descr="Number of events and waves."
-  ></metric>
-  <metric
-    name="SPI_HS_WAVE" block=SPI event=38 descr="Number of waves."
-  ></metric>
-  <metric
-    name="SPI_HS_PERS_UPD_FULL0" block=SPI event=39 descr="Number of clks HS persistent state update fifo0 is full."
-  ></metric>
-  <metric
-    name="SPI_HS_PERS_UPD_FULL1" block=SPI event=40 descr="Number of clks HS persistent state update fifo1 is full."
-  ></metric>
-  <metric
-    name="SPI_CSG_WINDOW_VALID" block=SPI event=41 descr="Clock count enabled by perfcounter_start event."
-  ></metric>
-  <metric
-    name="SPI_CSG_BUSY" block=SPI event=42 descr="Number of clocks with outstanding waves (SPI or SH)."
-  ></metric>
-  <metric
-    name="SPI_CSG_NUM_THREADGROUPS" block=SPI event=43 descr="Number of threadgroups launched"
-  ></metric>
-  <metric
-    name="SPI_CSG_CRAWLER_STALL" block=SPI event=44 descr="Number of clocks event/wave order fifo is full"
-  ></metric>
-  <metric
-    name="SPI_CSG_EVENT_WAVE" block=SPI event=45 descr="Number of events and waves"
-  ></metric>
-  <metric
-    name="SPI_CSG_WAVE" block=SPI event=46 descr="Number of waves"
-  ></metric>
-  <metric
-    name="SPI_CSN_WINDOW_VALID" block=SPI event=47 descr="Clock count enabled by perfcounter_start event. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSN_BUSY" block=SPI event=48 descr="Number of clocks with outstanding waves (SPI or SH). Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSN_NUM_THREADGROUPS" block=SPI event=49 descr="Number of threadgroups launched. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSN_CRAWLER_STALL" block=SPI event=50 descr="Number of clocks event/wave order fifo is full. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSN_EVENT_WAVE" block=SPI event=51 descr="Number of events and waves. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_CSN_WAVE" block=SPI event=52 descr="Number of waves. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_PS_WINDOW_VALID" block=SPI event=53 descr="Clock count enabled by perfcounter_start event. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_BUSY" block=SPI event=54 descr="Number of clocks with outstanding waves (SPI or SH), Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_ACTIVE" block=SPI event=55 descr="Number of clks ptr_buff is processing waves. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_DEALLOC_BIN0" block=SPI event=56 descr="Count deallocs for SE matching bin0 range. Uses a 17-bit increment so we can only use the 32-bit counters. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_FPOS_BIN1_STALL" block=SPI event=57 descr="Number of clks stalled waiting for a VS done from SE matching bin1. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_EVENT_WAVE" block=SPI event=58 descr="Number of events and waves, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_WAVE" block=SPI event=59 descr="Number of waves, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_OPT_WAVE" block=SPI event=60 descr="Number of waves with center+centroid+bc_optimize, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_PASS_BIN0" block=SPI event=61 descr="Count waves with bin0 pc reads / attr, range is 1-16. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_PASS_BIN1" block=SPI event=62 descr="Count waves with bin1 pc reads / attr, range is 1-16. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_FPOS_BIN2" block=SPI event=63 descr="Count fpos for SE matching bin2 range, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_PRIM_BIN0" block=SPI event=64 descr="Count waves with bin0 prims, range is 1-16. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_PRIM_BIN1" block=SPI event=65 descr="Count waves with bin1 prims, range is 1-16. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_CNF_BIN2" block=SPI event=66 descr="Count waves with bin2 conflicts, range is 0-15 but max is 8. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_CNF_BIN3" block=SPI event=67 descr="Count waves with bin3 conflicts, range is 0-15 but max is 8. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_CRAWLER_STALL" block=SPI event=68 descr="Number of clocks event/wave order fifo is full, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_LDS_RES_FULL" block=SPI event=69 descr="Number of clks PS per-wavefront storage is full, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_PERS_UPD_FULL0" block=SPI event=70 descr="Number of clks PS persistent state update fifo0 is full, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_PERS_UPD_FULL1" block=SPI event=71 descr="Number of clks PS persistent state update fifo1 is full, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_POPS_WAVE_SENT" block=SPI event=72 descr="Number of PS POPS Waves that were issued by the PS wave controller, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_PS_POPS_WAVE_EXIT" block=SPI event=73 descr="Number of POPS Enabled PS waves that exit the PS crawler, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_LDS0_PC_VALID" block=SPI event=74 descr="Number of param cache reads sent to PC from SH0."
-  ></metric>
-  <metric
-    name="SPI_LDS1_PC_VALID" block=SPI event=75 descr="Number of param cache reads sent to PC from SH1."
-  ></metric>
-  <metric
-    name="SPI_RA_PIPE_REQ_BIN2" block=SPI event=76 descr="Arb cycles with bin2 mqcs pipe_arb req =sum(csprobe0, csproben), Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_TASK_REQ_BIN3" block=SPI event=77 descr="Arb cycles with bin3 requests =sum(mqcs0, mqcsn) + dxcs +sum(gfx), Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_WR_CTL_FULL" block=SPI event=78 descr="Arb cycles where RA is stalled due to wave launch fifo_full. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_REQ_NO_ALLOC" block=SPI event=79 descr="Arb cycles with requests but no allocation. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_REQ_NO_ALLOC_PS" block=SPI event=80 descr="Arb cycles with PS req and no PS alloc. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is from RA0 and PS0, DEBUG_SH_SEL =1, source is from RA0 and PS1."
-  ></metric>
-  <metric
-    name="SPI_RA_REQ_NO_ALLOC_VS" block=SPI event=81 descr="Arb cycles with VS req and no VS alloc. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_REQ_NO_ALLOC_GS" block=SPI event=82 descr="Arb cycles with GS req and no GS alloc. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_REQ_NO_ALLOC_HS" block=SPI event=83 descr="Arb cycles with HS req and no HS alloc. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_REQ_NO_ALLOC_CSG" block=SPI event=84 descr="Arb cycles with CSg req and no CSg alloc. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_REQ_NO_ALLOC_CSN" block=SPI event=85 descr="Arb cycles with CSn req and no CSn alloc. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_RES_STALL_PS" block=SPI event=86 descr="Arb cycles with PS req and no PS fits. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is from RA0 and PS0, DEBUG_SH_SEL =1, source is from RA0 and PS1."
-  ></metric>
-  <metric
-    name="SPI_RA_RES_STALL_VS" block=SPI event=87 descr="Arb cycles with VS req and no VS fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_RES_STALL_GS" block=SPI event=88 descr="Arb cycles with GS req and no GS fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_RES_STALL_HS" block=SPI event=89 descr="Arb cycles with HS req and no HS fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_RES_STALL_CSG" block=SPI event=90 descr="Arb cycles with CSg req and no CSg fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_RES_STALL_CSN" block=SPI event=91 descr="Arb cycles with CSn req and no CSn fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_TMP_STALL_PS" block=SPI event=92 descr="Cycles where ps wants to req but does not fit in temp space. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_TMP_STALL_VS" block=SPI event=93 descr="Cycles where vs wants to req but does not fit in temp space."
-  ></metric>
-  <metric
-    name="SPI_RA_TMP_STALL_GS" block=SPI event=94 descr="Cycles where gs wants to req but does not fit in temp space."
-  ></metric>
-  <metric
-    name="SPI_RA_TMP_STALL_HS" block=SPI event=95 descr="Cycles where hs wants to req but does not fit in temp space."
-  ></metric>
-  <metric
-    name="SPI_RA_TMP_STALL_CSG" block=SPI event=96 descr="Cycles where csg wants to req but does not fit in temp space."
-  ></metric>
-  <metric
-    name="SPI_RA_TMP_STALL_CSN" block=SPI event=97 descr="Cycles where csn wants to req but does not fit in temp space."
-  ></metric>
-  <metric
-    name="SPI_RA_WAVE_SIMD_FULL_PS" block=SPI event=98 descr="Sum of SIMD where WAVE resource full when !ps_fits. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is from RA0 and PS0, DEBUG_SH_SEL =1, source is from RA0 and PS1."
-  ></metric>
-  <metric
-    name="SPI_RA_WAVE_SIMD_FULL_VS" block=SPI event=99 descr="Sum of SIMD where WAVE resource full when !vs_fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_WAVE_SIMD_FULL_GS" block=SPI event=100 descr="Sum of SIMD where WAVE resource full when !gs_fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_WAVE_SIMD_FULL_HS" block=SPI event=101 descr="Sum of SIMD where WAVE can't take hs wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_WAVE_SIMD_FULL_CSG" block=SPI event=102 descr="Sum of SIMD where WAVE can't take csg wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_WAVE_SIMD_FULL_CSN" block=SPI event=103 descr="Sum of SIMD where WAVE can't take csn wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_VGPR_SIMD_FULL_PS" block=SPI event=104 descr="Sum of SIMD where VGPR can't take ps wave when !fits. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is from RA0 and PS0, DEBUG_SH_SEL =1, source is from RA0 and PS1."
-  ></metric>
-  <metric
-    name="SPI_RA_VGPR_SIMD_FULL_VS" block=SPI event=105 descr="Sum of SIMD where VGPR can't take vs wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_VGPR_SIMD_FULL_GS" block=SPI event=106 descr="Sum of SIMD where VGPR can't take gs wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_VGPR_SIMD_FULL_HS" block=SPI event=107 descr="Sum of SIMD where VGPR can't take hs wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_VGPR_SIMD_FULL_CSG" block=SPI event=108 descr="Sum of SIMD where VGPR can't take csg wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_VGPR_SIMD_FULL_CSN" block=SPI event=109 descr="Sum of SIMD where VGPR can't take csn wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_SGPR_SIMD_FULL_PS" block=SPI event=110 descr="Sum of SIMD where SGPR can't take ps wave when !fits. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is from RA0 and PS0, DEBUG_SH_SEL =1, source is from RA0 and PS1."
-  ></metric>
-  <metric
-    name="SPI_RA_SGPR_SIMD_FULL_VS" block=SPI event=111 descr="Sum of SIMD where SGPR can't take vs wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_SGPR_SIMD_FULL_GS" block=SPI event=112 descr="Sum of SIMD where SGPR can't take gs wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_SGPR_SIMD_FULL_HS" block=SPI event=113 descr="Sum of SIMD where SGPR can't take hs wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_SGPR_SIMD_FULL_CSG" block=SPI event=114 descr="Sum of SIMD where SGPR can't take csg wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_SGPR_SIMD_FULL_CSN" block=SPI event=115 descr="Sum of SIMD where SGPR can't take csn wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_LDS_CU_FULL_PS" block=SPI event=116 descr="Sum of CU where LDS can't take ps wave when !fits. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is from RA0 and PS0, DEBUG_SH_SEL =1, source is from RA0 and PS1."
-  ></metric>
-  <metric
-    name="SPI_RA_LDS_CU_FULL_LS" block=SPI event=117 descr="Sum of CU where LDS can't take ls wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_LDS_CU_FULL_ES" block=SPI event=118 descr="Sum of CU where LDS can't take es wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_LDS_CU_FULL_CSG" block=SPI event=119 descr="Sum of CU where LDS can't take csg wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_LDS_CU_FULL_CSN" block=SPI event=120 descr="Sum of CU where LDS can't take csn wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_BAR_CU_FULL_HS" block=SPI event=121 descr="Sum of CU where BARRIER can't take hs wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_BAR_CU_FULL_CSG" block=SPI event=122 descr="Sum of CU where BARRIER can't take csg wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_BAR_CU_FULL_CSN" block=SPI event=123 descr="Sum of CU where BARRIER can't take csn wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_BULKY_CU_FULL_CSG" block=SPI event=124 descr="Sum of CU where BULKY can't take csg wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_BULKY_CU_FULL_CSN" block=SPI event=125 descr="Sum of CU where BULKY can't take csn wave when !fits. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_TGLIM_CU_FULL_CSG" block=SPI event=126 descr="Cycles where csg wants to req but all CU are at tg_limit"
-  ></metric>
-  <metric
-    name="SPI_RA_TGLIM_CU_FULL_CSN" block=SPI event=127 descr="Cycles where csn wants to req but all CU are at tg_limit"
-  ></metric>
-  <metric
-    name="SPI_RA_WVLIM_STALL_PS" block=SPI event=128 descr="Number of clocks ps is stalled due to WAVE LIMIT. Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is PS0, DEBUG_SH_SEL =1, source is PS1."
-  ></metric>
-  <metric
-    name="SPI_RA_WVLIM_STALL_VS" block=SPI event=129 descr="Number of clocks vs is stalled due to WAVE LIMIT."
-  ></metric>
-  <metric
-    name="SPI_RA_WVLIM_STALL_GS" block=SPI event=130 descr="Number of clocks gs is stalled due to WAVE LIMIT."
-  ></metric>
-  <metric
-    name="SPI_RA_WVLIM_STALL_HS" block=SPI event=131 descr="Number of clocks hs is stalled due to WAVE LIMIT."
-  ></metric>
-  <metric
-    name="SPI_RA_WVLIM_STALL_CSG" block=SPI event=132 descr="Number of clocks csg is stalled due to WAVE LIMIT."
-  ></metric>
-  <metric
-    name="SPI_RA_WVLIM_STALL_CSN" block=SPI event=133 descr="Number of clocks csn is stalled due to WAVE LIMIT."
-  ></metric>
-  <metric
-    name="SPI_RA_VS_LOCK" block=SPI event=134 descr="Arb cycles VS has a CU locked when !fits and active_cnt < threshold. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_GS_LOCK" block=SPI event=135 descr="Arb cycles GS has a CU locked when !fits and active_cnt < threshold. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_HS_LOCK" block=SPI event=136 descr="Arb cycles HS has a CU locked when !fits and active_cnt < threshold. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_CSG_LOCK" block=SPI event=137 descr="Arb cycles CSG has a CU locked when !fits and active_cnt < threshold. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_CSN_LOCK" block=SPI event=138 descr="Arb cycles CSN has a CU locked when !fits and active_cnt < threshold. Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_RA_RSV_UPD" block=SPI event=139 descr="Cycles spent doing updates for reservation changes, Source is RA0"
-  ></metric>
-  <metric
-    name="SPI_EXP_ARB_COL_CNT" block=SPI event=140 descr="Sum of number of color exp requests pending each clk, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_EXP_ARB_PAR_CNT" block=SPI event=141 descr="Sum of number of parameter exp requests pending each clk, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_EXP_ARB_POS_CNT" block=SPI event=142 descr="Sum of number of position exp requests pending each clk, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_EXP_ARB_GDS_CNT" block=SPI event=143 descr="Sum of number of gds exp requests pending each clk, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_NUM_PS_COL_R0_EXPORTS" block=SPI event=144 descr="Number of PS color export grants in dwords for read 0, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is from WB0 and COL0 DEBUG_SH_SEL =1, source is from WB0 and COL1."
-  ></metric>
-  <metric
-    name="SPI_NUM_PS_COL_R1_EXPORTS" block=SPI event=145 descr="Number of PS color export grants in dwords for read 1, Requires SPI_DEBUG_CNTL.DEBUG_SH_SEL to select source, DEBUG_SH_SEL =0, source is from WB0 and COL0 DEBUG_SH_SEL =1, source is from WB0 and COL1."
-  ></metric>
-  <metric
-    name="SPI_NUM_VS_POS_R0_EXPORTS" block=SPI event=146 descr="Number of VS position export grants in dwords for read 0, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_NUM_VS_POS_R1_EXPORTS" block=SPI event=147 descr="Number of VS position export grants in dwords for read 1, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_NUM_VS_PARAM_R0_EXPORTS" block=SPI event=148 descr="Number of VS parameter export grants in dwords for read 0, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_NUM_VS_PARAM_R1_EXPORTS" block=SPI event=149 descr="Number of VS parameter export grants in dwords for read 1, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_NUM_VS_GDS_R0_EXPORTS" block=SPI event=150 descr="Number of gds export grants in dwords for read 0, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_NUM_VS_GDS_R1_EXPORTS" block=SPI event=151 descr="Number of gds export grants in dwords for read 1, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_NUM_EXPGRANT_EXPORTS" block=SPI event=152 descr="Number of cycles export bus is busy, Source is WB0"
-  ></metric>
-  <metric
-    name="SPI_CLKGATE_BUSY_STALL" block=SPI event=153 descr="Number of clocks with spi busy and not all_clocks_on"
-  ></metric>
-  <metric
-    name="SPI_CLKGATE_ACTIVE_STALL" block=SPI event=154 descr="Number of clocks with spim_active and not all_clocks_on."
-  ></metric>
-  <metric
-    name="SPI_CLKGATE_ALL_CLOCKS_ON" block=SPI event=155 descr="Number of clocks with all_clocks_on."
-  ></metric>
-  <metric
-    name="SPI_CLKGATE_CGTT_DYN_ON" block=SPI event=156 descr="Number of clocks with spi cgtt dyn clk on."
-  ></metric>
-  <metric
-    name="SPI_CLKGATE_CGTT_REG_ON" block=SPI event=157 descr="Number of clocks with spi cgtt reg clk on."
-  ></metric>
-  <metric
-    name="SPI_PIX_ALLOC_PEND_CNT" block=SPI event=158 descr="Sum of number of pixel alloc requests pending per clk, Source is WWC0"
-  ></metric>
-  <metric
-    name="SPI_PIX_ALLOC_SCB_STALL" block=SPI event=159 descr="Number of clks pix alloc stalled due to color scoreboard. Source is WWC0"
-  ></metric>
-  <metric
-    name="SPI_PIX_ALLOC_DB0_STALL" block=SPI event=160 descr="Number of clks pix alloc stalled due to db0 color buffer. Source is WWC0"
-  ></metric>
-  <metric
-    name="SPI_PIX_ALLOC_DB1_STALL" block=SPI event=161 descr="Number of clks pix alloc stalled due to db1 color buffer. Source is WWC0"
-  ></metric>
-  <metric
-    name="SPI_PIX_ALLOC_DB2_STALL" block=SPI event=162 descr="Number of clks pix alloc stalled due to db2 color buffer. Source is WWC0"
-  ></metric>
-  <metric
-    name="SPI_PIX_ALLOC_DB3_STALL" block=SPI event=163 descr="Number of clks pix alloc stalled due to db3 color buffer. Source is WWC0"
-  ></metric>
-  <metric
-    name="SPI_PC_ALLOC_ACCUM" block=SPI event=164 descr="Accumulation of PC space allocated during perf window. Divide by PC_ALLOC_CNT to get avg allocation duration of each PC line (VS alloc to PS dealloc). AKA pc_free_ptr-"
-  ></metric>
-  <metric
-    name="SPI_GS_NGG_SE_HAS_BATON" block=SPI event=165 descr="Number of clocks this SE owns the baton"
-  ></metric>
-  <metric
-    name="SPI_GS_NGG_SE_DOES_NOT_HAVE_BATON" block=SPI event=166 descr="Number of clocks this SE does not have the baton"
-  ></metric>
-  <metric
-    name="SPI_GS_NGG_SE_FORWARDED_BATON" block=SPI event=167 descr="This SE has forwarded the baton"
-  ></metric>
-  <metric
-    name="SPI_GS_NGG_SE_AT_SYNC_EVENT" block=SPI event=168 descr="Number of clocks this SE at sync event (enable_legacy, enable_ngg, reset_to_lowest_vgt or set_next_feid"
-  ></metric>
-  <metric
-    name="SPI_GS_NGG_SE_SG_ALLOC_PC_SPACE_CNT" block=SPI event=169 descr="Allocation of PC space per GS subgroup by this SE"
-  ></metric>
-  <metric
-    name="SPI_GS_NGG_SE_DEALLOC_PC_SPACE_CNT" block=SPI event=170 descr="De-Allocation of PC space as received from PS by this SE"
-  ></metric>
-  <metric
-    name="SPI_GS_NGG_PC_FULL" block=SPI event=171 descr="This SE reports parameter cache is full"
-  ></metric>
-  <metric
-    name="SPI_GS_NGG_SE_SEND_GS_ALLOC" block=SPI event=172 descr="GS granting PC allocations per surviving wave on this SE"
-  ></metric>
-  <metric
-    name="SPI_GS_NGG_GS_ALLOC_FIFO_EMPTY" block=SPI event=173 descr="GS allocation fifo is empty - no GS waves pending allocation on this SE"
-  ></metric>
-  <metric
-    name="SPI_GSC_VTX_BUSY" block=SPI event=174 descr="vtx controller busy"
-  ></metric>
-  <metric
-    name="SPI_GSC_VTX_INPUT_STARVED" block=SPI event=175 descr="There are no more prims to process and VSRs are empty"
-  ></metric>
-  <metric
-    name="SPI_GSC_VTX_VSR_STALL" block=SPI event=176 descr="vtx controller stalled"
-  ></metric>
-  <metric
-    name="SPI_GSC_VTX_VSR_FULL" block=SPI event=177 descr="all VSRs are full or being read by VGPR controller"
-  ></metric>
-  <metric
-    name="SPI_GSC_VTX_CAC_BUSY" block=SPI event=178 descr="vtx controller writing to VSRs"
-  ></metric>
-  <metric
-    name="SPI_ESC_VTX_BUSY" block=SPI event=179 descr="vtx controller busy"
-  ></metric>
-  <metric
-    name="SPI_ESC_VTX_INPUT_STARVED" block=SPI event=180 descr="There are no more verts to process and VSRs are empty"
-  ></metric>
-  <metric
-    name="SPI_ESC_VTX_VSR_STALL" block=SPI event=181 descr="vtx controller stalled"
-  ></metric>
-  <metric
-    name="SPI_ESC_VTX_VSR_FULL" block=SPI event=182 descr="all VSRs are full or being read by VGPR controller"
-  ></metric>
-  <metric
-    name="SPI_ESC_VTX_CAC_BUSY" block=SPI event=183 descr="vtx controller writing to VSRs"
-  ></metric>
-  <metric
-    name="SPI_SWC_PS_WR" block=SPI event=184 descr="Number of clocks to write PS waves to SGPRs (need to multiply this value by 4)"
-  ></metric>
-  <metric
-    name="SPI_SWC_VS_WR" block=SPI event=185 descr="Number of clocks to write VS waves to SGPRs (need to multiply this value by 4)"
-  ></metric>
-  <metric
-    name="SPI_SWC_GS_WR" block=SPI event=186 descr="Number of clocks to write GS waves to SGPRs (need to multiply this value by 4)"
-  ></metric>
-  <metric
-    name="SPI_SWC_HS_WR" block=SPI event=187 descr="Number of clocks to write HS waves to SGPRs (need to multiply this value by 4)"
-  ></metric>
-  <metric
-    name="SPI_SWC_CSG_WR" block=SPI event=188 descr="Number of clocks to write CSG waves to SGPRs (need to multiply this value by 4)"
-  ></metric>
-  <metric
-    name="SPI_SWC_CSC_WR" block=SPI event=189 descr="Number of clocks to write CSC waves to SGPRs (need to multiply this value by 4) Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  <metric
-    name="SPI_VWC_PS_WR" block=SPI event=190 descr="Number of clocks to write PS waves to VGPRs (need to multiply this value by 4)"
-  ></metric>
-  <metric
-    name="SPI_VWC_VS_WR" block=SPI event=191 descr="Number of clocks to write VS waves to VGPRs (need to multiply this value by 4)"
-  ></metric>
-  <metric
-    name="SPI_VWC_GS_WR" block=SPI event=192 descr="Number of clocks to write GS waves to VGPRs (need to multiply this value by 4)"
-  ></metric>
-  <metric
-    name="SPI_VWC_HS_WR" block=SPI event=193 descr="Number of clocks to write HS waves to VGPRs (need to multiply this value by 4)"
-  ></metric>
-  <metric
-    name="SPI_VWC_CSG_WR" block=SPI event=194 descr="Number of clocks to write CSG waves to VGPRs (need to multiply this value by 4)"
-  ></metric>
-  <metric
-    name="SPI_VWC_CSC_WR" block=SPI event=195 descr="Number of clocks to write CSC waves to VGPRs (need to multiply this value by 4) Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0;"
-  ></metric>
-  # SQ counters
-  <metric
-    name="SQ_NONE" block=SQ event=0 descr="Don't count anything."
-  ></metric>
-  <metric
-    name="SQ_ACCUM_PREV" block=SQ event=1 descr="For counter N, increment by the value of counter N-1. Only accumulates once every 4 cycles."
-  ></metric>
-  <metric
-    name="SQ_CYCLES" block=SQ event=2 descr="Clock cycles. (nondeterministic, per-simd, global)"
-  ></metric>
-  <metric
-    name="SQ_BUSY_CYCLES" block=SQ event=3 descr="Clock cycles while SQ is reporting that it is busy. (nondeterministic, per-simd, global)"
-  ></metric>
-  <metric
-    name="SQ_WAVES" block=SQ event=4 descr="Count number of waves sent to SQs. (per-simd, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_LEVEL_WAVES" block=SQ event=5 descr="Track the number of waves. Set ACCUM_PREV for the next counter to use this. (level, per-simd, global)"
-  ></metric>
-  <metric
-    name="SQ_WAVES_EQ_64" block=SQ event=6 descr="Count number of waves with exactly 64 active threads sent to SQs. (per-simd, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_WAVES_LT_64" block=SQ event=7 descr="Count number of waves with <64 active threads sent to SQs. (per-simd, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_WAVES_LT_48" block=SQ event=8 descr="Count number of waves with <48 active threads sent to SQs. (per-simd, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_WAVES_LT_32" block=SQ event=9 descr="Count number of waves sent <32 active threads sent to SQs. (per-simd, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_WAVES_LT_16" block=SQ event=10 descr="Count number of waves sent <16 active threads sent to SQs. (per-simd, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_WAVES_CU" block=SQ event=11 descr="Count number of waves sent to CUs. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_LEVEL_WAVES_CU" block=SQ event=12 descr="Track the number of waves. Set ACCUM_PREV for the next counter to use this. (level, per-simd)"
-  ></metric>
-  <metric
-    name="SQ_BUSY_CU_CYCLES" block=SQ event=13 descr="Count quad-cycles each CU is busy. (nondeterministic, per-simd)"
-  ></metric>
-  <metric
-    name="SQ_ITEMS" block=SQ event=14 descr="Number of valid items per wave. (per-simd, global)"
-  ></metric>
-  <metric
-    name="SQ_QUADS" block=SQ event=15 descr="Number of completely or partially covered quads per wave. (per-simd, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_EVENTS" block=SQ event=16 descr="Number of events. (unwindowed, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_SURF_SYNCS" block=SQ event=17 descr="Number of surface syncs. (unwindowed, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_TTRACE_REQS" block=SQ event=18 descr="Number of thread trace requests. (unwindowed, global, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_TTRACE_INFLIGHT_REQS" block=SQ event=19 descr="Number of in-flight thread trace requests. (nondeterministic, unwindowed, global)"
-  ></metric>
-  <metric
-    name="SQ_TTRACE_STALL" block=SQ event=20 descr="Number of cycles thread trace stalls stalled execution. (nondeterministic, unwindowed, global)"
-  ></metric>
-  <metric
-    name="SQ_MSG_CNTR" block=SQ event=21 descr="Number of counter messages. (nondeterministic, unwindowed, global)"
-  ></metric>
-  <metric
-    name="SQ_MSG_PERF" block=SQ event=22 descr="Number of perfcounter messages. (nondeterministic, unwindowed), global"
-  ></metric>
-  <metric
-    name="SQ_MSG_GSCNT" block=SQ event=23 descr="Number of geometry messages. (emulated, unwindowed, global)"
-  ></metric>
-  <metric
-    name="SQ_MSG_INTERRUPT" block=SQ event=24 descr="Number of interrupt messages. (emulated, unwindowed, global)"
-  ></metric>
-  <metric
-    name="SQ_INSTS" block=SQ event=25 descr="Number of instructions issued. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VALU" block=SQ event=26 descr="Number of VALU instructions issued. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VMEM_WR" block=SQ event=27 descr="Number of VMEM write instructions issued (including FLAT). (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VMEM_RD" block=SQ event=28 descr="Number of VMEM read instructions issued (including FLAT). (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VMEM" block=SQ event=29 descr="Number of VMEM instructions issued. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_SALU" block=SQ event=30 descr="Number of SALU instructions issued. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_SMEM" block=SQ event=31 descr="Number of SMEM instructions issued. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_FLAT" block=SQ event=32 descr="Number of FLAT instructions issued. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_FLAT_LDS_ONLY" block=SQ event=33 descr="Number of FLAT instructions issued that read/wrote only from/to LDS (only works if EARLY_TA_DONE is enabled). (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_LDS" block=SQ event=34 descr="Number of LDS instructions issued (including FLAT). (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_GDS" block=SQ event=35 descr="Number of GDS instructions issued. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_EXP" block=SQ event=36 descr="Number of EXP instructions issued, excluding skipped export instructions. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_EXP_GDS" block=SQ event=37 descr="Number of EXP and GDS instructions issued, excluding skipped export instructions. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_BRANCH" block=SQ event=38 descr="Number of Branch instructions issued. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_SENDMSG" block=SQ event=39 descr="Number of Sendmsg instructions issued. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VSKIPPED" block=SQ event=40 descr="Number of vector instructions skipped. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INST_LEVEL_VMEM" block=SQ event=41 descr="Number of in-flight VMEM instructions. Set next counter to ACCUM_PREV and divide by INSTS_VMEM for average latency. Includes FLAT instructions. (per-simd, level, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_INST_LEVEL_SMEM" block=SQ event=42 descr="Number of in-flight SMEM instructions (*2 load/store; *2 atomic; *2 memtime; *4 wb/inv). Set next counter to ACCUM_PREV and divide by INSTS_SMEM for average latency per smem request. Falls slightly short of total request latency because some fetches are divided into two requests that may finish at different times and this counter collects the average latency of the two. (per-simd, level, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_INST_LEVEL_LDS" block=SQ event=43 descr="Number of in-flight LDS instructions. Set next counter to ACCUM_PREV and divide by INSTS_LDS for average latency. Includes FLAT instructions. (per-simd, level, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_INST_LEVEL_GDS" block=SQ event=44 descr="Number of in-flight GDS instructions. Set next counter to ACCUM_PREV and divide by INSTS_GDS for average latency. (per-simd, level, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_INST_LEVEL_EXP" block=SQ event=45 descr="Number of in-flight EXP instructions. Set next counter to ACCUM_PREV and divide by INSTS_EXP for average latency. (per-simd, level, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAVE_CYCLES" block=SQ event=46 descr="Number of wave-cycles spent by waves in the CUs (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAVE_READY" block=SQ event=47 descr="Number of wave-cycles waves were ready to execute the next instruction (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_CNT_VM" block=SQ event=48 descr="Number of wave-cycles spent waiting for VM counter. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_CNT_LGKM" block=SQ event=49 descr="Number of wave-cycles spent waiting for LGKM counter. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_CNT_EXP" block=SQ event=50 descr="Number of wave-cycles spent waiting for EXP counter. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_CNT_ANY" block=SQ event=51 descr="Number of wave-cycles spent waiting for any counter. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_BARRIER" block=SQ event=52 descr="Number of wave-cycles spent waiting for a barrier. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_EXP_ALLOC" block=SQ event=53 descr="Number of wave-cycles spent waiting for export allocation (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_SLEEP" block=SQ event=54 descr="Number of wave-cycles spent waiting for sleep to finish (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_SLEEP_XNACK" block=SQ event=55 descr="Number of wave-cycles spent waiting for xnack sleep to finish (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_OTHER" block=SQ event=56 descr="Number of wave-cycles spent waiting for dependency stalls (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_ANY" block=SQ event=57 descr="Number of wave-cycles spent waiting for anything (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_TTRACE" block=SQ event=58 descr="Number of wave-cycles spent waiting for thread trace stalls (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_IFETCH" block=SQ event=59 descr="Number of wave-cycles spent waiting for instructions to arrive (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_INST_ANY" block=SQ event=60 descr="Number of wave-cycles spent waiting for any instruction issue. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_INST_VMEM" block=SQ event=61 descr="Number of wave-cycles spent waiting for VMEM instruction issue. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_INST_SCA" block=SQ event=62 descr="Number of wave-cycles spent waiting for SALU or SMEM instruction issue. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_INST_LDS" block=SQ event=63 descr="Number of wave-cycles spent waiting for LDS instruction issue. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_INST_VALU" block=SQ event=64 descr="Number of wave-cycles spent waiting for VALU instrution issue. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_INST_EXP_GDS" block=SQ event=65 descr="Number of wave-cycles spent waiting for EXPORT or GDS instruction issue. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_INST_MISC" block=SQ event=66 descr="Number of wave-cycles spent waiting for BRANCH or SENDMSG instruction issue. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_WAIT_INST_FLAT" block=SQ event=67 descr="Number of wave-cycles spent waiting for flat instruction issue. In units of 4 cycles. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_ACTIVE_INST_ANY" block=SQ event=68 descr="Number of cycles each wave is working on an instruction. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_ACTIVE_INST_VMEM" block=SQ event=69 descr="Number of cycles the SQ instruction arbiter is working on a VMEM instruction. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_ACTIVE_INST_LDS" block=SQ event=70 descr="Number of cycles the SQ instruction arbiter is working on a LDS instruction. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_ACTIVE_INST_VALU" block=SQ event=71 descr="Number of cycles the SQ instruction arbiter is working on a VALU instruction. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_ACTIVE_INST_SCA" block=SQ event=72 descr="Number of cycles the SQ instruction arbiter is working on a SALU or SMEM instruction. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_ACTIVE_INST_EXP_GDS" block=SQ event=73 descr="Number of cycles the SQ instruction arbiter is working on an EXPORT or GDS instruction. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_ACTIVE_INST_MISC" block=SQ event=74 descr="Number of cycles the SQ instruction aribter is working on a BRANCH or SENDMSG instruction. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_ACTIVE_INST_FLAT" block=SQ event=75 descr="Number of cycles the SQ instruction arbiter is working on a FLAT instruction. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INST_CYCLES_VMEM_WR" block=SQ event=76 descr="Number of cycles needed to send addr and cmd data for VMEM write instructions. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INST_CYCLES_VMEM_RD" block=SQ event=77 descr="Number of cycles needed to send addr and cmd data for VMEM read instructions. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INST_CYCLES_VMEM_ADDR" block=SQ event=78 descr="Number of cycles needed to send VMEM read/write addresses to TA. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INST_CYCLES_VMEM_DATA" block=SQ event=79 descr="Number of cycles needed to send VMEM write data to TA. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INST_CYCLES_VMEM_CMD" block=SQ event=80 descr="Number of cycles needed to send VMEM command to TA. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INST_CYCLES_EXP" block=SQ event=81 descr="Number of cycles needed to export data for EXP instructions. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INST_CYCLES_GDS" block=SQ event=82 descr="Number of cycles needed to export data for GDS instructions. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INST_CYCLES_SMEM" block=SQ event=83 descr="Number of cycles needed to execute scalar memory reads. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_INST_CYCLES_SALU" block=SQ event=84 descr="Number of cycles needed to execute non-memory read scalar operations. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_THREAD_CYCLES_VALU" block=SQ event=85 descr="Number of thread-cycles used to execute VALU operations (similar to INST_CYCLES_VALU but multiplied by # of active threads). (per-simd)"
-  ></metric>
-  <metric
-    name="SQ_THREAD_CYCLES_VALU_MAX" block=SQ event=86 descr="Maximum number of thread-cycles VALU operations that could have been executed given the instruction mix (similar to INST_CYCLES_VALU but multiplied by # of active threads). (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_IFETCH" block=SQ event=87 descr="Number of instruction fetch requests from cache. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_IFETCH_LEVEL" block=SQ event=88 descr="Number of instruction fetch requests from cache. (per-simd, level)"
-  ></metric>
-  <metric
-    name="SQ_CBRANCH_FORK" block=SQ event=89 descr="Number of conditional branch instructions. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_CBRANCH_FORK_SPLIT" block=SQ event=90 descr="Number of conditional branch instructions that take both branches. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_VALU_LDS_DIRECT_RD" block=SQ event=91 descr="Number of LDS direct reads issued (excluding interpolation ops). (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_VALU_LDS_INTERP_OP" block=SQ event=92 descr="Number of LDS interpolation ops issued. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_LDS_BANK_CONFLICT" block=SQ event=93 descr="Number of cycles LDS is stalled by bank conflicts. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_LDS_ADDR_CONFLICT" block=SQ event=94 descr="Number of cycles LDS is stalled by address conflicts. (emulated,nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_LDS_UNALIGNED_STALL" block=SQ event=95 descr="Number of cycles LDS is stalled processing flat unaligned load/store ops. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_LDS_MEM_VIOLATIONS" block=SQ event=96 descr="Number of threads that have a memory violation in the LDS.(emulated)"
-  ></metric>
-  <metric
-    name="SQ_LDS_ATOMIC_RETURN" block=SQ event=97 descr="Number of atomic return cycles in LDS. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_LDS_IDX_ACTIVE" block=SQ event=98 descr="Number of cycles LDS is used for indexed (non-direct,non-interpolation) operations. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_VALU_DEP_STALL" block=SQ event=99 descr="Number of cycles VALU is stalled by previous instructions due to dependencies (wait state count). (nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_VALU_STARVE" block=SQ event=100 descr="Number of cycles VALU is starved while waves are present. (per-simd, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_TA_STARVE" block=SQ event=101 descr="Number of cycles SQ_TA_cmd interface is starved while waves are present. (nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_EXP_REQ_FIFO_FULL" block=SQ event=102 descr="Number of cycles export request fifo is full. (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_LDS_DATA_FIFO_FULL" block=SQ event=103 descr="Number of cycles LDS data fifo is full. (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_LDS_CMD_FIFO_FULL" block=SQ event=104 descr="Number of cycles LDS command fifo is full. (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_VMEM_TA_ADDR_FIFO_FULL" block=SQ event=105 descr="Number of cycles texture requests are stalled due to full address fifo in TA. (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_VMEM_TA_CMD_FIFO_FULL" block=SQ event=106 descr="Number of cycles texture requests are stalled due to full cmd fifo in TA. (nondeterministic, unwindowed)."
-  ></metric>
-  <metric
-    name="SQ_VMEM_EX_DATA_REG_BUSY" block=SQ event=107 descr="Number of cycles texture requests are stalled due to full data staging register in EX. (nondeterministic, unwindowed)."
-  ></metric>
-  <metric
-    name="SQ_VMEM_WR_TA_DATA_FIFO_FULL" block=SQ event=108 descr="Number of cycles texture writes are stalled due to full data fifo in TA. (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_VALU_SRC_C_CONFLICT" block=SQ event=109 descr="Number of cycles VALU is stalled by arbitration due to src c conflict. (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_VMEM_RD_SRC_CD_CONFLICT" block=SQ event=110 descr="Number of cycles VMEM_RD instructions are stalled due to VGPR port conflicts. (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_VMEM_WR_SRC_CD_CONFLICT" block=SQ event=111 descr="Number of cycles VMEM_WR instructions are stalled due to VGPR port conflicts. (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_FLAT_SRC_CD_CONFLICT" block=SQ event=112 descr="Number of cycles FLAT instructions are stalled due to VGPR port conflicts. (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_LDS_SRC_CD_CONFLICT" block=SQ event=113 descr="Number of cycles LDS instructions are stalled due to VGPR port conflicts. (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_SRC_CD_BUSY" block=SQ event=114 descr="Number of total accesses of port C and D (up to 2 per cycle). (per-simd)"
-  ></metric>
-  <metric
-    name="SQ_PT_POWER_STALL" block=SQ event=115 descr="Number of cycles the power throttle indicated ALU should stall (ignores whether something actually got stalled). (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_USER0" block=SQ event=116 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 0. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER1" block=SQ event=117 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 1. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER2" block=SQ event=118 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 2. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER3" block=SQ event=119 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 3. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER4" block=SQ event=120 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 4. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER5" block=SQ event=121 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 5. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER6" block=SQ event=122 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 6. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER7" block=SQ event=123 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 7. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER8" block=SQ event=124 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 8. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER9" block=SQ event=125 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 9. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER10" block=SQ event=126 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 10. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER11" block=SQ event=127 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 11. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER12" block=SQ event=128 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 12. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER13" block=SQ event=129 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 13. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER14" block=SQ event=130 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 14. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER15" block=SQ event=131 descr="User counter. Incremented by S_INCPERFLEVEL when SIMM16[3:0] == 15. (emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL0" block=SQ event=132 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL when SIMM16[3:0] == 0. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL1" block=SQ event=133 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 1. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL2" block=SQ event=134 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 2. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL3" block=SQ event=135 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 3. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL4" block=SQ event=136 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 4. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL5" block=SQ event=137 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 5. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL6" block=SQ event=138 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 6. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL7" block=SQ event=139 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 7. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL8" block=SQ event=140 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 8. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL9" block=SQ event=141 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 9. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL10" block=SQ event=142 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 10. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL11" block=SQ event=143 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 11. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL12" block=SQ event=144 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 12. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL13" block=SQ event=145 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 13. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL14" block=SQ event=146 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 14. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_USER_LEVEL15" block=SQ event=147 descr="User level counter. Incremented by S_INCPERFLEVEL, decremented by S_DECPERFLEVEL SIMM16[3:0] == 15. (level, emulated)"
-  ></metric>
-  <metric
-    name="SQ_POWER_VALU" block=SQ event=148 descr="Number of CAC pulses for ALU instructions (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_POWER_VALU0" block=SQ event=149 descr="Number of CAC pulses for ALU instructions in group 0 (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_POWER_VALU1" block=SQ event=150 descr="Number of CAC pulses for ALU instructions in group 1 (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_POWER_VALU2" block=SQ event=151 descr="Number of CAC pulses for ALU instructions in group 2 (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_POWER_GPR_RD" block=SQ event=152 descr="Number of CAC pulses for GPR reads (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_POWER_GPR_WR" block=SQ event=153 descr="Number of CAC pulses for GPR writes (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_POWER_LDS_BUSY" block=SQ event=154 descr="Number of CAC pulses for cycles LDS clocks are active (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_POWER_ALU_BUSY" block=SQ event=155 descr="Number of CAC pulses for cycles ALU clocks are active (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_POWER_TEX_BUSY" block=SQ event=156 descr="Number of CAC pulses for cycles texture clocks are active (nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_ACCUM_PREV_HIRES" block=SQ event=157 descr="For counter N, increment by the value of counter N-1."
-  ></metric>
-  <metric
-    name="SQ_WAVES_RESTORED" block=SQ event=158 descr="Count number of context-restored waves sent to SQs. (per-simd, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_WAVES_SAVED" block=SQ event=159 descr="Count number of context-saved waves. (per-simd, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_SMEM_NORM" block=SQ event=160 descr="Number of SMEM instructions issued normalized to match smem_level (*2 load/store; *2 atomic; *2 memtime; *4 wb/inv). (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_XNACK_FIRST" block=SQ event=161 descr="Number of first xnack from TA. (per-simd, emulated)"
-  ></metric>
-  <metric
-    name="SQ_XNACK_ALL" block=SQ event=162 descr="Number of all xnack from TA. (per-simd)"
-  ></metric>
-  <metric
-    name="SQ_XNACK_FIFO_FULL" block=SQ event=163 descr="Number of cycles XNACK fifo is full. (per-simd, unwindowed)"
-  ></metric>
-  <metric
-    name="SQ_IFETCH_XNACK" block=SQ event=164 descr="Number of instruction fetch xnack from SQC. (per-simd)"
-  ></metric>
-  <metric
-    name="SQ_TLB_SHOOTDOWN" block=SQ event=165 descr="Number of TLB shootdowns. (unwindowed, emulated, global)"
-  ></metric>
-  <metric
-    name="SQ_TLB_SHOOTDOWN_CYCLES" block=SQ event=166 descr="Number of cycles in which a TLB shootdown is active. (unwindowed, global)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VMEM_WR_REPLAY" block=SQ event=167 descr="Number of VMEM write instructions replayed (including FLAT). (excluding instructions issued). (per-simd, emulated, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VMEM_RD_REPLAY" block=SQ event=168 descr="Number of VMEM read instructions replayed (including FLAT). (excluding instructions issued). (per-simd, emulated, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_VMEM_REPLAY" block=SQ event=169 descr="Number of VMEM instructions replayed. (excluding instructions issued). (per-simd, emulated, nondeterministicd)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_SMEM_REPLAY" block=SQ event=170 descr="Number of SMEM instructions replayed. (excluding instructions issued). (per-simd, emulated, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_SMEM_NORM_REPLAY" block=SQ event=171 descr="Number of SMEM instructions replayed normalized to match smem_level (*2 load/store; *2 atomic; *2 memtime; *4 wb/inv). (excluding instructions issued). (per-simd, emulated, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_INSTS_FLAT_REPLAY" block=SQ event=172 descr="Number of FLAT instructions replayed. (excluding instructions issued). (per-simd, emulated, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQ_UTCL1_TRANSLATION_MISS" block=SQ event=173 descr="Total UTCL1 translation misses"
-  ></metric>
-  <metric
-    name="SQ_UTCL1_PERMISSION_MISS" block=SQ event=174 descr="Total UTCL1 permission misses"
-  ></metric>
-  <metric
-    name="SQ_UTCL1_TRANSLATION_HIT_EVENT" block=SQ event=175 descr="Total UTCL1 translation hit events"
-  ></metric>
-  <metric
-    name="SQ_UTCL1_REQUEST" block=SQ event=176 descr="Total UTCL1 NORMAL requests"
-  ></metric>
-  <metric
-    name="SQ_UTCL1_STALL_MISSFIFO_FULL" block=SQ event=177 descr="Total UTCL1 stall due to full miss fifo"
-  ></metric>
-  <metric
-    name="SQ_UTCL1_STALL_INFLIGHT_MAX" block=SQ event=178 descr="Total UTCL1 stalls due to inflight counter saturation"
-  ></metric>
-  <metric
-    name="SQ_UTCL1_STALL_LRU_INFLIGHT" block=SQ event=179 descr="Total UTCL1 stalls due to LRU cache line with traffic inflight"
-  ></metric>
-  <metric
-    name="SQ_UTCL1_LFIFO_FULL" block=SQ event=180 descr="Total UTCL1 latency hiding fifo full cycles"
-  ></metric>
-  <metric
-    name="SQ_UTCL1_STALL_LFIFO_NOT_RES" block=SQ event=181 descr="Total UTCL1 stalls due to latency latency hiding fifo output not resident"
-  ></metric>
-  <metric
-    name="SQ_UTCL1_STALL_UTCL2_REQ_OUT_OF_CREDITS" block=SQ event=182 descr="Total UTCL1 stalls due to UTCL2 requests out of credits"
-  ></metric>
-  <metric
-    name="SQ_DUMMY_END" block=SQ event=183 descr="Just a placeholding enum to indicate the end of real SQ performance counter. Not a real performance counter."
-  ></metric>
-  <metric
-    name="SQ_DUMMY_LAST" block=SQ event=255 descr="Just a placeholding enum to separate SQ from SQC counters. Not a real performance counter."
-  ></metric>
-  <metric
-    name="SQC_ICACHE_INPUT_VALID_READY" block=SQ event=256 descr="Successful Transaction (per-SQ, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_INPUT_VALID_READYB" block=SQ event=257 descr="Input stalled by SQC (per-SQ, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_INPUT_VALIDB" block=SQ event=258 descr="SQC starved (per-SQ, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_INPUT_VALID_READY" block=SQ event=259 descr="Successful Transaction (per-SQ, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_INPUT_VALID_READYB" block=SQ event=260 descr="Input stalled by SQC (per-SQ, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_INPUT_VALIDB" block=SQ event=261 descr="SQC starved (per-SQ, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_TC_REQ" block=SQ event=262 descr="Total number of TC requests that were issued by instruction and constant caches. (No-Masking, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_TC_INST_REQ" block=SQ event=263 descr="Number of insruction requests to the TC (No-Masking, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_TC_DATA_READ_REQ" block=SQ event=264 descr="Number of data read requests to the TC (No-Masking, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_TC_DATA_WRITE_REQ" block=SQ event=265 descr="Number of data write requests to the TC (No-Masking, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_TC_DATA_ATOMIC_REQ" block=SQ event=266 descr="Number of data atomic requests to the TC (No-Masking, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_TC_STALL" block=SQ event=267 descr="Valid request stalled TC request interface (no-credits). (No-Masking, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_TC_STARVE" block=SQ event=268 descr="No requests sent to TC while credits available. (No-Masking, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_BUSY_CYCLES" block=SQ event=269 descr="Clock cycles while cache is reporting that it is busy. (No-Masking, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_REQ" block=SQ event=270 descr="Number of requests. (per-SQ, per-Bank)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_HITS" block=SQ event=271 descr="Number of cache hits. (per-SQ, per-Bank, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_MISSES" block=SQ event=272 descr="Number of cache misses, includes uncached requests. (per-SQ, per-Bank, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_MISSES_DUPLICATE" block=SQ event=273 descr="Number of misses that were duplicates (access to a non-resident, miss pending CL). (per-SQ, per-Bank, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_INVAL_INST" block=SQ event=274 descr="Number of cache invalidations caused by instructions (No-Masking)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_INVAL_ASYNC" block=SQ event=275 descr="Number of asynchronous invalidates (surface sync, register write, etc.) (No-Masking, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_INPUT_STALL_ARB_NO_GRANT" block=SQ event=276 descr="Number of arbitration stalls due to lost arbitration to other SQs. (per-SQ, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_INPUT_STALL_BANK_READYB" block=SQ event=277 descr="Number of arbitration stalls due to bank stalling. (per-SQ, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_CACHE_STALLED" block=SQ event=278 descr="Number of cache stalls. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_CACHE_STALL_INFLIGHT_NONZERO" block=SQ event=279 descr="Number of cycles stalled because allocated line has nonzero inflight. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_CACHE_STALL_INFLIGHT_MAX" block=SQ event=280 descr="Number of cycles stalled on a hit CL but inflight counter is maxed out. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_CACHE_STALL_OUTPUT" block=SQ event=281 descr="Number of cycles stalled at cache controller output. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_CACHE_STALL_OUTPUT_MISS_FIFO" block=SQ event=282 descr="Number of cycles stalled because the miss FIFO is full. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_CACHE_STALL_OUTPUT_HIT_FIFO" block=SQ event=283 descr="Number of cycles stalled because a hit FIFO is full. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_CACHE_STALL_OUTPUT_TC_IF" block=SQ event=284 descr="Number of cycles stalled because the TC request interface is stalled. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_STALL_OUTXBAR_ARB_NO_GRANT" block=SQ event=285 descr="Number of arbitration stalls due to lost arbitration for the output port. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_PREFETCH_1" block=SQ event=286 descr="Number of +1 prefetch requests granted. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_PREFETCH_2" block=SQ event=287 descr="Number of +2 prefetch requests granted. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_PREFETCH_FILTERED" block=SQ event=288 descr="Number of prefetch requests filtered out. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_BUSY_CYCLES" block=SQ event=289 descr="Clock cycles while cache is reporting that it is busy. (No-Masking, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ" block=SQ event=290 descr="Number of requests (post-bank-serialization). (per-SQ, per-Bank)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_HITS" block=SQ event=291 descr="Number of cache hits. (per-SQ, per-Bank, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_MISSES" block=SQ event=292 descr="Number of cache misses, includes uncached requests. (per-SQ, per-Bank, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_MISSES_DUPLICATE" block=SQ event=293 descr="Number of misses that were duplicates (access to a non-resident, miss pending CL). (per-SQ, per-Bank, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_HIT_LRU_READ" block=SQ event=294 descr="Number of HIT_LRU read requests. (per-SQ, per-Bank)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_MISS_EVICT_READ" block=SQ event=295 descr="Number of MISS_EVICT read requests. (per-SQ, per-Bank)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_WC_LRU_WRITE" block=SQ event=296 descr="Number of WC_LRU write requests. (per-SQ, per-Bank)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_WT_EVICT_WRITE" block=SQ event=297 descr="Number of WT_EVICT write requests. (per-SQ, per-Bank)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_ATOMIC" block=SQ event=298 descr="Number of atomic requests. (per-SQ, per-Bank)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_VOLATILE" block=SQ event=299 descr="Number of volatile cache requests. (per-SQ, per-Bank)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_INVAL_INST" block=SQ event=300 descr="Number of cache invalidations caused by instructions (No-Masking)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_INVAL_ASYNC" block=SQ event=301 descr="Number of asynchronous invalidates (surface sync, register write, etc.) (No-Masking, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_INVAL_VOLATILE_INST" block=SQ event=302 descr="Number of volatile cache invalidations caused by instructions (No-Masking)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_INVAL_VOLATILE_ASYNC" block=SQ event=303 descr="Number of asynchronous volatile invalidates (surface sync, register write, etc.) (No-Masking, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_WB_INST" block=SQ event=304 descr="Number of cache write-backs caused by instructions (No-Masking)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_WB_ASYNC" block=SQ event=305 descr="Number of asynchronous cache write-backs (surface sync, register write, etc.) (No-Masking, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_WB_VOLATILE_INST" block=SQ event=306 descr="Number of volatile cache write-backs caused by instructions (No-Masking)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_WB_VOLATILE_ASYNC" block=SQ event=307 descr="Number of asynchronous volatile cache write-backs (surface sync, register write, etc.) (No-Masking, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_INPUT_STALL_ARB_NO_GRANT" block=SQ event=308 descr="Number of arbitration stalls due to lost arbitration to other SQs. (per-SQ, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_INPUT_STALL_BANK_READYB" block=SQ event=309 descr="Number of arbitration stalls due to bank stalling. (per-SQ, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALLED" block=SQ event=310 descr="Number of cache stalls. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_INFLIGHT_MAX" block=SQ event=311 descr="Number of cycles stalled on a hit CL but inflight counter is maxed out. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_OUTPUT" block=SQ event=312 descr="Number of cycles stalled at cache controller output. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_EVICT" block=SQ event=313 descr="Number of cycles stalled trying to do an evict. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_UNORDERED" block=SQ event=314 descr="Number of cycles stalled due to an unordered access conflict. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_ALLOC_UNAVAILABLE" block=SQ event=315 descr="Number of cycles stalled due to not being able to allocate a line. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_FORCE_EVICT" block=SQ event=316 descr="Number of cycles stalled due to having to force an eviction. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_MULTI_FLUSH" block=SQ event=317 descr="Number of cycles stalled due to multiple flushes. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_FLUSH_DONE" block=SQ event=318 descr="Number of cycles stalled inserting flush done tokens into pipe. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_OUTPUT_MISS_FIFO" block=SQ event=319 descr="Number of cycles stalled because the miss FIFO is full. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_OUTPUT_HIT_FIFO" block=SQ event=320 descr="Number of cycles stalled because a hit FIFO is full. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_CACHE_STALL_OUTPUT_TC_IF" block=SQ event=321 descr="Number of cycles stalled because the TC request interface is stalled. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_STALL_OUTXBAR_ARB_NO_GRANT" block=SQ event=322 descr="Number of arbitration stalls due to lost arbitration for the output port. (per-Bank, nondeterministic, unwindowed)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ_READ_1" block=SQ event=323 descr="Number of constant cache 1 dw read requests. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ_READ_2" block=SQ event=324 descr="Number of constant cache 2 dw read requests. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ_READ_4" block=SQ event=325 descr="Number of constant cache 4 dw read requests. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ_READ_8" block=SQ event=326 descr="Number of constant cache 8 dw read requests. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ_READ_16" block=SQ event=327 descr="Number of constant cache 16 dw read requests. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ_TIME" block=SQ event=328 descr="Number of constant cache timestamp requests. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ_WRITE_1" block=SQ event=329 descr="Number of constant cache 1 dw write requests. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ_WRITE_2" block=SQ event=330 descr="Number of constant cache 2 dw write requests. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ_WRITE_4" block=SQ event=331 descr="Number of constant cache 4 dw write requests. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_REQ_ATC_PROBE" block=SQ event=332 descr="Number of constant cache atc probe requests. (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_SQ_DCACHE_REQS" block=SQ event=333 descr="Number of constant requests from SQ before any serialization (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_FLAT_REQ" block=SQ event=334 descr="Number of constant flat requests (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_NONFLAT_REQ" block=SQ event=335 descr="Number of constant non-flat requests (per-SQ)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_INFLIGHT_LEVEL" block=SQ event=336 descr="Level Counter: # total outstanding transactions in instruction cache (per-SQ, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_INFLIGHT_LEVEL" block=SQ event=337 descr="Level Counter: # total outstanding transactions in data cache (per-SQ, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_TC_INFLIGHT_LEVEL" block=SQ event=338 descr="Level Counter: total outstanding requests to TC (No-Masking, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_TC_INFLIGHT_LEVEL" block=SQ event=339 descr="Level Counter: # of outstanding instruction requests to TC (No-Masking, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_TC_INFLIGHT_LEVEL" block=SQ event=340 descr="Level Counter: # of outstanding data requests to TC (No-Masking, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_TRANSLATION_MISS" block=SQ event=341 descr="Total ICACHE gatcl1 translation misses"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_PERMISSION_MISS" block=SQ event=342 descr="Total ICACHE gatcl1 permission misses"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_TRANSLATION_HIT" block=SQ event=343 descr="Total ICACHE gatcl1 translation hits"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_REQUEST" block=SQ event=344 descr="Total ICACHE CLIENT_ATCL1 NORMAL requestes"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_STALL_INFLIGHT_MAX" block=SQ event=345 descr="Total ICACHE gatcl1 stalls due to inflight counter saturation"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_STALL_LRU_INFLIGHT" block=SQ event=346 descr="Total ICACHE gatcl1 stalls due to LRU cache line with traffic inflight"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_LFIFO_FULL" block=SQ event=347 descr="Total ICACHE gatcl1 atcl2 latency hiding fifo full cycles"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_STALL_LFIFO_NOT_RES" block=SQ event=348 descr="Total ICACHE gatcl1 stalls due to atcl2 latency hiding fifo output not resident"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_STALL_ATCL2_REQ_OUT_OF_CREDITS" block=SQ event=349 descr="Total ICACHE gatcl1 stalls due to atcl2_req out of credits"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_ATCL2_INFLIGHT" block=SQ event=350 descr="The sum of ICACHE inflight ATCL1_ATCL2 requests per cycle"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_GATCL1_STALL_MISSFIFO_FULL" block=SQ event=351 descr="Total ICACHE gatcl1 stalls due to full miss fifo"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_TRANSLATION_MISS" block=SQ event=352 descr="Total DCACHE gatcl1 translation misses"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_PERMISSION_MISS" block=SQ event=353 descr="Total DCACHE gatcl1 permission misses"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_TRANSLATION_HIT" block=SQ event=354 descr="Total DCACHE gatcl1 translation hits"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_REQUEST" block=SQ event=355 descr="Total DCACHE CLIENT_ATCL1 NORMAL requestes"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_STALL_INFLIGHT_MAX" block=SQ event=356 descr="Total DCACHE gatcl1 stalls due to inflight counter saturation"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_STALL_LRU_INFLIGHT" block=SQ event=357 descr="Total DCACHE gatcl1 stalls due to LRU cache line with traffic inflight"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_LFIFO_FULL" block=SQ event=358 descr="Total DCACHE gatcl1 atcl2 latency hiding fifo full cycles"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_STALL_LFIFO_NOT_RES" block=SQ event=359 descr="Total DCACHE gatcl1 stalls due to atcl2 latency hiding fifo output not resident"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_STALL_ATCL2_REQ_OUT_OF_CREDITS" block=SQ event=360 descr="Total DCACHE gatcl1 stalls due to atcl2_req out of credits"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_ATCL2_INFLIGHT" block=SQ event=361 descr="The sum of DCACHE inflight ATCL1_ATCL2 requests per cycle"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_STALL_MISSFIFO_FULL" block=SQ event=362 descr="Total DCACHE gatcl1 stalls due to full miss fifo"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_STALL_MULTI_MISS" block=SQ event=363 descr="Total DCACHE gatcl1 stalls due to arbitrated multiple misses"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_GATCL1_HIT_FIFO_FULL" block=SQ event=364 descr="Total DCACHE gatcl1 hit fifo full cycles"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_UTCL1_INFLIGHT_LEVEL" block=SQ event=365 descr="Level Counter: # total transactions that are outstanding in UTCL1 of instruction cache (nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_UTCL1_ALL_REQ" block=SQ event=366 descr="Total number of requests (all types) going to UTCL1 of instruction cache"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_UTCL2_INFLIGHT_LEVEL" block=SQ event=367 descr="Level Counter: # total transactions that are outstanding in UTCL2 and originating from instruction cache (nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_ICACHE_UTCL2_ALL_REQ" block=SQ event=368 descr="Total number of requests (all types) going to UTCL2 and originating from instruction cache"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_UTCL1_INFLIGHT_LEVEL" block=SQ event=369 descr="Level Counter: # total transactions that are outstanding in UTCL1 of data cache (per-SQ, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_UTCL1_ALL_REQ" block=SQ event=370 descr="Total number of requests (all types) going to UTCL1 of data cache"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_UTCL2_INFLIGHT_LEVEL" block=SQ event=371 descr="Level Counter: # total transactions that are outstanding in UTCL2 and originating from data cache (per-SQ, nondeterministic)"
-  ></metric>
-  <metric
-    name="SQC_DCACHE_UTCL2_ALL_REQ" block=SQ event=372 descr="Total number of requests (all types) going to UTCL2 and originating from data cache"
-  ></metric>
-  <metric
-    name="SQC_DUMMY_LAST" block=SQ event=373 descr="Just a placeholding enum to indicate the last SQC performance counter. Not a real performance counter."
-  ></metric>
-  # SX counters
-  <metric
-    name="SX_PA_IDLE_CYCLES" block=SX event=0 descr="Nr of cycles where PA was idle waiting to accept vectors from SX"
-  ></metric>
-  <metric
-    name="SX_PA_REQ" block=SX event=1 descr="Nr of PA requests received"
-  ></metric>
-  <metric
-    name="SX_PA_POS" block=SX event=2 descr="Nr of positions sent to the PA"
-  ></metric>
-  <metric
-    name="SX_CLOCK" block=SX event=3 descr="Nr of clocks where SX was busy in any way shape or form"
-  ></metric>
-  <metric
-    name="SX_GATE_EN1" block=SX event=4 descr="Nr of clocks for register accesses"
-  ></metric>
-  <metric
-    name="SX_GATE_EN2" block=SX event=5 descr="Nr of clocks for bus destination sort module"
-  ></metric>
-  <metric
-    name="SX_GATE_EN3" block=SX event=6 descr="Nr of clocks for color exports"
-  ></metric>
-  <metric
-    name="SX_GATE_EN4" block=SX event=7 descr="Nr of clocks for position exports"
-  ></metric>
-  <metric
-    name="SX_SH_POS_STARVE" block=SX event=8 descr="Nr of clocks SX is starved for Position data"
-  ></metric>
-  <metric
-    name="SX_SH_COLOR_STARVE" block=SX event=9 descr="Nr of clocks SX is starved for Color data"
-  ></metric>
-  <metric
-    name="SX_SH_POS_STALL" block=SX event=10 descr="Nr of clocks SX is being stalled by PA"
-  ></metric>
-  <metric
-    name="SX_SH_COLOR_STALL" block=SX event=11 descr="Nr of clocks SX is being stalled by at least one DB"
-  ></metric>
-  <metric
-    name="SX_DB0_PIXELS" block=SX event=12 descr="Number of pixels sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_HALF_QUADS" block=SX event=13 descr="Number of half quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_PIXEL_STALL" block=SX event=14 descr="Number of cycles where pixel traffic is stalled due to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_PIXEL_IDLE" block=SX event=15 descr="Number of cycles where the pixel traffic was idle to DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_PRED_PIXELS" block=SX event=16 descr="Nr of non predicated pixels sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB1_PIXELS" block=SX event=17 descr="Number of pixels sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_HALF_QUADS" block=SX event=18 descr="Number of half quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_PIXEL_STALL" block=SX event=19 descr="Number of cycles where pixel traffic is stalled due to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_PIXEL_IDLE" block=SX event=20 descr="Number of cycles where the pixel traffic was idle to DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_PRED_PIXELS" block=SX event=21 descr="Nr of non predicated pixels sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB2_PIXELS" block=SX event=22 descr="Number of pixels sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_HALF_QUADS" block=SX event=23 descr="Number of half quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_PIXEL_STALL" block=SX event=24 descr="Number of cycles where pixel traffic is stalled due to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_PIXEL_IDLE" block=SX event=25 descr="Number of cycles where the pixel traffic was idle to DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_PRED_PIXELS" block=SX event=26 descr="Nr of non predicated pixels sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB3_PIXELS" block=SX event=27 descr="Number of pixels sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_HALF_QUADS" block=SX event=28 descr="Number of half quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_PIXEL_STALL" block=SX event=29 descr="Number of cycles where pixel traffic is stalled due to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_PIXEL_IDLE" block=SX event=30 descr="Number of cycles where the pixel traffic was idle to DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_PRED_PIXELS" block=SX event=31 descr="Nr of non predicated pixels sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_COL_BUSY" block=SX event=32 descr="Number of cycles of color module's busy"
-  ></metric>
-  <metric
-    name="SX_POS_BUSY" block=SX event=33 descr="Number of cycles of position module's busy"
-  ></metric>
-  <metric
-    name="SX_DB0_A2M_DISCARD_QUADS" block=SX event=34 descr="Number of a2m_discard quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT0_BLEND_BYPASS" block=SX event=35 descr="Number of mrt0 blend_bypass quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT0_DONT_RD_DEST" block=SX event=36 descr="Number of mrt0 dont_rd_dest quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT0_DISCARD_SRC" block=SX event=37 descr="Number of mrt0 discard_src quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT0_SINGLE_QUADS" block=SX event=38 descr="Number of mrt0 single quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT0_DOUBLE_QUADS" block=SX event=39 descr="Number of mrt0 double quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT1_BLEND_BYPASS" block=SX event=40 descr="Number of mrt1 blend_bypass quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT1_DONT_RD_DEST" block=SX event=41 descr="Number of mrt1 dont_rd_dest quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT1_DISCARD_SRC" block=SX event=42 descr="Number of mrt1 discard_src quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT1_SINGLE_QUADS" block=SX event=43 descr="Number of mrt1 single quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT1_DOUBLE_QUADS" block=SX event=44 descr="Number of mrt1 double quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT2_BLEND_BYPASS" block=SX event=45 descr="Number of mrt2 blend_bypass quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT2_DONT_RD_DEST" block=SX event=46 descr="Number of mrt2 dont_rd_dest quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT2_DISCARD_SRC" block=SX event=47 descr="Number of mrt2 discard_src quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT2_SINGLE_QUADS" block=SX event=48 descr="Number of mrt2 single quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT2_DOUBLE_QUADS" block=SX event=49 descr="Number of mrt2 double quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT3_BLEND_BYPASS" block=SX event=50 descr="Number of mrt3 blend_bypass quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT3_DONT_RD_DEST" block=SX event=51 descr="Number of mrt3 dont_rd_dest quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT3_DISCARD_SRC" block=SX event=52 descr="Number of mrt3 discard_src quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT3_SINGLE_QUADS" block=SX event=53 descr="Number of mrt3 single quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT3_DOUBLE_QUADS" block=SX event=54 descr="Number of mrt3 double quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT4_BLEND_BYPASS" block=SX event=55 descr="Number of mrt4 blend_bypass quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT4_DONT_RD_DEST" block=SX event=56 descr="Number of mrt4 dont_rd_dest quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT4_DISCARD_SRC" block=SX event=57 descr="Number of mrt4 discard_src quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT4_SINGLE_QUADS" block=SX event=58 descr="Number of mrt4 single quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT4_DOUBLE_QUADS" block=SX event=59 descr="Number of mrt4 double quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT5_BLEND_BYPASS" block=SX event=60 descr="Number of mrt5 blend_bypass quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT5_DONT_RD_DEST" block=SX event=61 descr="Number of mrt5 dont_rd_dest quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT5_DISCARD_SRC" block=SX event=62 descr="Number of mrt5 discard_src quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT5_SINGLE_QUADS" block=SX event=63 descr="Number of mr5 single quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT5_DOUBLE_QUADS" block=SX event=64 descr="Number of mrt5 double quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT6_BLEND_BYPASS" block=SX event=65 descr="Number of mrt6 blend_bypass quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT6_DONT_RD_DEST" block=SX event=66 descr="Number of mrt6 dont_rd_dest quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT6_DISCARD_SRC" block=SX event=67 descr="Number of mrt6 discard_src quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT6_SINGLE_QUADS" block=SX event=68 descr="Number of mrt6 single quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT6_DOUBLE_QUADS" block=SX event=69 descr="Number of mrt6 double quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT7_BLEND_BYPASS" block=SX event=70 descr="Number of mrt7 blend_bypass quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT7_DONT_RD_DEST" block=SX event=71 descr="Number of mrt7 dont_rd_dest quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT7_DISCARD_SRC" block=SX event=72 descr="Number of mrt7 discard_src quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT7_SINGLE_QUADS" block=SX event=73 descr="Number of mrt7 single quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB0_MRT7_DOUBLE_QUADS" block=SX event=74 descr="Number of mrt7 double quads sent to the DB0"
-  ></metric>
-  <metric
-    name="SX_DB1_A2M_DISCARD_QUADS" block=SX event=75 descr="Number of a2m_discard quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT0_BLEND_BYPASS" block=SX event=76 descr="Number of mrt0 blend_bypass quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT0_DONT_RD_DEST" block=SX event=77 descr="Number of mrt0 dont_rd_dest quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT0_DISCARD_SRC" block=SX event=78 descr="Number of mrt0 discard_src quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT0_SINGLE_QUADS" block=SX event=79 descr="Number of mrt0 single quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT0_DOUBLE_QUADS" block=SX event=80 descr="Number of mrt0 double quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT1_BLEND_BYPASS" block=SX event=81 descr="Number of mrt1 blend_bypass quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT1_DONT_RD_DEST" block=SX event=82 descr="Number of mrt1 dont_rd_dest quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT1_DISCARD_SRC" block=SX event=83 descr="Number of mrt1 discard_src quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT1_SINGLE_QUADS" block=SX event=84 descr="Number of mrt1 single quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT1_DOUBLE_QUADS" block=SX event=85 descr="Number of mrt1 double quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT2_BLEND_BYPASS" block=SX event=86 descr="Number of mrt2 blend_bypass quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT2_DONT_RD_DEST" block=SX event=87 descr="Number of mrt2 dont_rd_dest quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT2_DISCARD_SRC" block=SX event=88 descr="Number of mrt2 discard_src quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT2_SINGLE_QUADS" block=SX event=89 descr="Number of mrt2 single quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT2_DOUBLE_QUADS" block=SX event=90 descr="Number of mrt2 double quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT3_BLEND_BYPASS" block=SX event=91 descr="Number of mrt3 blend_bypass quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT3_DONT_RD_DEST" block=SX event=92 descr="Number of mrt3 dont_rd_dest quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT3_DISCARD_SRC" block=SX event=93 descr="Number of mrt3 discard_src quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT3_SINGLE_QUADS" block=SX event=94 descr="Number of mrt3 single quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT3_DOUBLE_QUADS" block=SX event=95 descr="Number of mrt3 double quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT4_BLEND_BYPASS" block=SX event=96 descr="Number of mrt4 blend_bypass quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT4_DONT_RD_DEST" block=SX event=97 descr="Number of mrt4 dont_rd_dest quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT4_DISCARD_SRC" block=SX event=98 descr="Number of mrt4 discard_src quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT4_SINGLE_QUADS" block=SX event=99 descr="Number of mrt4 single quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT4_DOUBLE_QUADS" block=SX event=100 descr="Number of mrt4 double quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT5_BLEND_BYPASS" block=SX event=101 descr="Number of mrt5 blend_bypass quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT5_DONT_RD_DEST" block=SX event=102 descr="Number of mrt5 dont_rd_dest quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT5_DISCARD_SRC" block=SX event=103 descr="Number of mrt5 discard_src quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT5_SINGLE_QUADS" block=SX event=104 descr="Number of mr5 single quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT5_DOUBLE_QUADS" block=SX event=105 descr="Number of mrt5 double quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT6_BLEND_BYPASS" block=SX event=106 descr="Number of mrt6 blend_bypass quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT6_DONT_RD_DEST" block=SX event=107 descr="Number of mrt6 dont_rd_dest quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT6_DISCARD_SRC" block=SX event=108 descr="Number of mrt6 discard_src quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT6_SINGLE_QUADS" block=SX event=109 descr="Number of mrt6 single quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT6_DOUBLE_QUADS" block=SX event=110 descr="Number of mrt6 double quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT7_BLEND_BYPASS" block=SX event=111 descr="Number of mrt7 blend_bypass quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT7_DONT_RD_DEST" block=SX event=112 descr="Number of mrt7 dont_rd_dest quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT7_DISCARD_SRC" block=SX event=113 descr="Number of mrt7 discard_src quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT7_SINGLE_QUADS" block=SX event=114 descr="Number of mrt7 single quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB1_MRT7_DOUBLE_QUADS" block=SX event=115 descr="Number of mrt7 double quads sent to the DB1"
-  ></metric>
-  <metric
-    name="SX_DB2_A2M_DISCARD_QUADS" block=SX event=116 descr="Number of a2m_discard quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT0_BLEND_BYPASS" block=SX event=117 descr="Number of mrt0 blend_bypass quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT0_DONT_RD_DEST" block=SX event=118 descr="Number of mrt0 dont_rd_dest quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT0_DISCARD_SRC" block=SX event=119 descr="Number of mrt0 discard_src quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT0_SINGLE_QUADS" block=SX event=120 descr="Number of mrt0 single quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT0_DOUBLE_QUADS" block=SX event=121 descr="Number of mrt0 double quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT1_BLEND_BYPASS" block=SX event=122 descr="Number of mrt1 blend_bypass quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT1_DONT_RD_DEST" block=SX event=123 descr="Number of mrt1 dont_rd_dest quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT1_DISCARD_SRC" block=SX event=124 descr="Number of mrt1 discard_src quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT1_SINGLE_QUADS" block=SX event=125 descr="Number of mrt1 single quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT1_DOUBLE_QUADS" block=SX event=126 descr="Number of mrt1 double quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT2_BLEND_BYPASS" block=SX event=127 descr="Number of mrt2 blend_bypass quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT2_DONT_RD_DEST" block=SX event=128 descr="Number of mrt2 dont_rd_dest quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT2_DISCARD_SRC" block=SX event=129 descr="Number of mrt2 discard_src quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT2_SINGLE_QUADS" block=SX event=130 descr="Number of mrt2 single quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT2_DOUBLE_QUADS" block=SX event=131 descr="Number of mrt2 double quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT3_BLEND_BYPASS" block=SX event=132 descr="Number of mrt3 blend_bypass quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT3_DONT_RD_DEST" block=SX event=133 descr="Number of mrt3 dont_rd_dest quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT3_DISCARD_SRC" block=SX event=134 descr="Number of mrt3 discard_src quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT3_SINGLE_QUADS" block=SX event=135 descr="Number of mrt3 single quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT3_DOUBLE_QUADS" block=SX event=136 descr="Number of mrt3 double quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT4_BLEND_BYPASS" block=SX event=137 descr="Number of mrt4 blend_bypass quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT4_DONT_RD_DEST" block=SX event=138 descr="Number of mrt4 dont_rd_dest quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT4_DISCARD_SRC" block=SX event=139 descr="Number of mrt4 discard_src quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT4_SINGLE_QUADS" block=SX event=140 descr="Number of mrt4 single quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT4_DOUBLE_QUADS" block=SX event=141 descr="Number of mrt4 double quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT5_BLEND_BYPASS" block=SX event=142 descr="Number of mrt5 blend_bypass quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT5_DONT_RD_DEST" block=SX event=143 descr="Number of mrt5 dont_rd_dest quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT5_DISCARD_SRC" block=SX event=144 descr="Number of mrt5 discard_src quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT5_SINGLE_QUADS" block=SX event=145 descr="Number of mr5 single quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT5_DOUBLE_QUADS" block=SX event=146 descr="Number of mrt5 double quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT6_BLEND_BYPASS" block=SX event=147 descr="Number of mrt6 blend_bypass quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT6_DONT_RD_DEST" block=SX event=148 descr="Number of mrt6 dont_rd_dest quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT6_DISCARD_SRC" block=SX event=149 descr="Number of mrt6 discard_src quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT6_SINGLE_QUADS" block=SX event=150 descr="Number of mrt6 single quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT6_DOUBLE_QUADS" block=SX event=151 descr="Number of mrt6 double quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT7_BLEND_BYPASS" block=SX event=152 descr="Number of mrt7 blend_bypass quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT7_DONT_RD_DEST" block=SX event=153 descr="Number of mrt7 dont_rd_dest quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT7_DISCARD_SRC" block=SX event=154 descr="Number of mrt7 discard_src quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT7_SINGLE_QUADS" block=SX event=155 descr="Number of mrt7 single quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB2_MRT7_DOUBLE_QUADS" block=SX event=156 descr="Number of mrt7 double quads sent to the DB2"
-  ></metric>
-  <metric
-    name="SX_DB3_A2M_DISCARD_QUADS" block=SX event=157 descr="Number of a2m_discard quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT0_BLEND_BYPASS" block=SX event=158 descr="Number of mrt0 blend_bypass quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT0_DONT_RD_DEST" block=SX event=159 descr="Number of mrt0 dont_rd_dest quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT0_DISCARD_SRC" block=SX event=160 descr="Number of mrt0 discard_src quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT0_SINGLE_QUADS" block=SX event=161 descr="Number of mrt0 single quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT0_DOUBLE_QUADS" block=SX event=162 descr="Number of mrt0 double quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT1_BLEND_BYPASS" block=SX event=163 descr="Number of mrt1 blend_bypass quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT1_DONT_RD_DEST" block=SX event=164 descr="Number of mrt1 dont_rd_dest quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT1_DISCARD_SRC" block=SX event=165 descr="Number of mrt1 discard_src quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT1_SINGLE_QUADS" block=SX event=166 descr="Number of mrt1 single quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT1_DOUBLE_QUADS" block=SX event=167 descr="Number of mrt1 double quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT2_BLEND_BYPASS" block=SX event=168 descr="Number of mrt2 blend_bypass quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT2_DONT_RD_DEST" block=SX event=169 descr="Number of mrt2 dont_rd_dest quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT2_DISCARD_SRC" block=SX event=170 descr="Number of mrt2 discard_src quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT2_SINGLE_QUADS" block=SX event=171 descr="Number of mrt2 single quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT2_DOUBLE_QUADS" block=SX event=172 descr="Number of mrt2 double quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT3_BLEND_BYPASS" block=SX event=173 descr="Number of mrt3 blend_bypass quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT3_DONT_RD_DEST" block=SX event=174 descr="Number of mrt3 dont_rd_dest quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT3_DISCARD_SRC" block=SX event=175 descr="Number of mrt3 discard_src quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT3_SINGLE_QUADS" block=SX event=176 descr="Number of mrt3 single quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT3_DOUBLE_QUADS" block=SX event=177 descr="Number of mrt3 double quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT4_BLEND_BYPASS" block=SX event=178 descr="Number of mrt4 blend_bypass quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT4_DONT_RD_DEST" block=SX event=179 descr="Number of mrt4 dont_rd_dest quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT4_DISCARD_SRC" block=SX event=180 descr="Number of mrt4 discard_src quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT4_SINGLE_QUADS" block=SX event=181 descr="Number of mrt4 single quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT4_DOUBLE_QUADS" block=SX event=182 descr="Number of mrt4 double quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT5_BLEND_BYPASS" block=SX event=183 descr="Number of mrt5 blend_bypass quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT5_DONT_RD_DEST" block=SX event=184 descr="Number of mrt5 dont_rd_dest quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT5_DISCARD_SRC" block=SX event=185 descr="Number of mrt5 discard_src quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT5_SINGLE_QUADS" block=SX event=186 descr="Number of mr5 single quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT5_DOUBLE_QUADS" block=SX event=187 descr="Number of mrt5 double quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT6_BLEND_BYPASS" block=SX event=188 descr="Number of mrt6 blend_bypass quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT6_DONT_RD_DEST" block=SX event=189 descr="Number of mrt6 dont_rd_dest quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT6_DISCARD_SRC" block=SX event=190 descr="Number of mrt6 discard_src quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT6_SINGLE_QUADS" block=SX event=191 descr="Number of mrt6 single quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT6_DOUBLE_QUADS" block=SX event=192 descr="Number of mrt6 double quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT7_BLEND_BYPASS" block=SX event=193 descr="Number of mrt7 blend_bypass quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT7_DONT_RD_DEST" block=SX event=194 descr="Number of mrt7 dont_rd_dest quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT7_DISCARD_SRC" block=SX event=195 descr="Number of mrt7 discard_src quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT7_SINGLE_QUADS" block=SX event=196 descr="Number of mrt7 single quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_DB3_MRT7_DOUBLE_QUADS" block=SX event=197 descr="Number of mrt7 double quads sent to the DB3"
-  ></metric>
-  <metric
-    name="SX_PA_REQ_LATENCY" block=SX event=198 descr="Number of all pa request latency"
-  ></metric>
-  <metric
-    name="SX_POS_SCBD_STALL" block=SX event=199 descr="Number of cycles SX is being stalled by position scoreboard"
-  ></metric>
-  <metric
-    name="SX_COL_SCBD_STALL" block=SX event=200 descr="Number of cycles SX is being stalled by color scoreboard"
-  ></metric>
-  <metric
-    name="SX_CLOCK_DROP_STALL" block=SX event=201 descr="Number of cycles where SX was busy in any way shape or form excluding stall cycles"
-  ></metric>
-  <metric
-    name="SX_GATE_EN5" block=SX event=202 descr="Number of cycles for color exports excluding stall cycles"
-  ></metric>
-  <metric
-    name="SX_GATE_EN6" block=SX event=203 descr="Number of cycles for position exports excluding stall cycles"
-  ></metric>
-  <metric
-    name="SX_DB0_SIZE" block=SX event=204 descr="Number of dw (current smallest unit) send to DB0"
-  ></metric>
-  <metric
-    name="SX_DB1_SIZE" block=SX event=205 descr="Number of dw (current smallest unit) send to DB1"
-  ></metric>
-  <metric
-    name="SX_DB2_SIZE" block=SX event=206 descr="Number of dw (current smallest unit) send to DB2"
-  ></metric>
-  <metric
-    name="SX_DB3_SIZE" block=SX event=207 descr="Number of dw (current smallest unit) send to DB3"
-  ></metric>
-  # TA counters
-  <metric
-    name="TA_NULL" block=TA event=0 descr="NULL"
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_BUSY" block=TA event=1 descr="sh_fifo subblock is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_CMD_BUSY" block=TA event=2 descr="sh_fifo subblock, cmd fifo section is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_ADDR_BUSY" block=TA event=3 descr="sh_fifo subblock, addr fifo section is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_DATA_BUSY" block=TA event=4 descr="sh_fifo subblock, data fifo section is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_DATA_SFIFO_BUSY" block=TA event=5 descr="sh_fifo subblock, data sfifo section is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_DATA_TFIFO_BUSY" block=TA event=6 descr="sh_fifo subblock, data tfifo section is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_GRADIENT_BUSY" block=TA event=7 descr="Deriv/Dispatch/Input subblocks are busy busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_GRADIENT_FIFO_BUSY" block=TA event=8 descr="Gradient FIFO subblock is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_LOD_BUSY" block=TA event=9 descr="Aniso subblock is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_LOD_FIFO_BUSY" block=TA event=10 descr="LOD FIFO subblock is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_ADDRESSER_BUSY" block=TA event=11 descr="Addresser subblock is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_ADDRESSER_FIFO_BUSY" block=TA event=12 descr="Addresser FIFO subblock is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_ALIGNER_BUSY" block=TA event=13 descr="Aligner subblock is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_WRITE_PATH_BUSY" block=TA event=14 descr="Write Path subblock is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_TA_BUSY" block=TA event=15 descr="TA block is busy. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SQ_TA_CMD_CYCLES" block=TA event=16 descr="Number of input cycles input on SQ_TA_cmd interface. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SP_TA_ADDR_CYCLES" block=TA event=17 descr="Number of input cycles input on SP_TA_addr interface. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SP_TA_DATA_CYCLES" block=TA event=18 descr="Number of input cycles input on SP_TA_data interface. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_TA_FA_DATA_STATE_CYCLES" block=TA event=19 descr="Number of input cycles input on TA_FA wrts interface. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_ADDR_WAITING_ON_CMD_CYCLES" block=TA event=20 descr="Number of cycles addr waiting on cmd in sh_fifo subblock. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_CMD_WAITING_ON_ADDR_CYCLES" block=TA event=21 descr="Number of cycles cmd waiting on addr in sh_fifo subblock. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_ADDR_STARVED_WHILE_BUSY_CYCLES" block=TA event=22 descr="Number of cycles addr starved while busy in sh_fifo subblock. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_CMD_STARVED_WHILE_BUSY_CYCLES" block=TA event=23 descr="Number of cycles cmd starved while busy in sh_fifo subblock. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_DATA_WAITING_ON_DATA_STATE_CYCLES" block=TA event=24 descr="Number of cycles data waiting on data state in sh_fifo subblock. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_DATA_STATE_WAITING_ON_DATA_CYCLES" block=TA event=25 descr="Number of cycles data state waiting on data in sh_fifo subblock. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_DATA_STARVED_WHILE_BUSY_CYCLES" block=TA event=26 descr="Number of cycles data starved while busy in sh_fifo subblock. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_DATA_STATE_STARVED_WHILE_BUSY_CYCLES" block=TA event=27 descr="Number of cycles data state starved while busy in sh_fifo subblock. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_TA_SH_FIFO_STARVED" block=TA event=28 descr="Starved signal for all sub-fifos in TA_SH_FIFO"
-  ></metric>
-  <metric
-    name="TA_RESERVED_29" block=TA event=29 descr="RESERVED 29."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_ADDR_CYCLES" block=TA event=30 descr="Number of address cycles issued by sh_fifo to sh_dispatch subblock."
-  ></metric>
-  <metric
-    name="TA_SH_FIFO_DATA_CYCLES" block=TA event=31 descr="Number of data cycles issued by sh_fifo to sh_dispatch subblock."
-  ></metric>
-  <metric
-    name="TA_TOTAL_WAVEFRONTS" block=TA event=32 descr="Total number of wavefronts processed by TA."
-  ></metric>
-  <metric
-    name="TA_GRADIENT_CYCLES" block=TA event=33 descr="Number of cycles issued by the per-pixel-gradient state machine."
-  ></metric>
-  <metric
-    name="TA_WALKER_CYCLES" block=TA event=34 descr="Number of cycles issued by the sampler state machine."
-  ></metric>
-  <metric
-    name="TA_ALIGNER_CYCLES" block=TA event=35 descr="Number of cycles issued by the aligner state machine."
-  ></metric>
-  <metric
-    name="TA_IMAGE_WAVEFRONTS" block=TA event=36 descr="Number of image wavefronts processed by TA."
-  ></metric>
-  <metric
-    name="TA_IMAGE_READ_WAVEFRONTS" block=TA event=37 descr="Number of image read (Sample*, Load*, Gather4*) wavefronts processed by TA."
-  ></metric>
-  <metric
-    name="TA_IMAGE_WRITE_WAVEFRONTS" block=TA event=38 descr="Number of image write wavefronts processed by TA."
-  ></metric>
-  <metric
-    name="TA_IMAGE_ATOMIC_WAVEFRONTS" block=TA event=39 descr="Number of image atomic wavefronts processed by TA."
-  ></metric>
-  <metric
-    name="TA_IMAGE_TOTAL_CYCLES" block=TA event=40 descr="Number of image cycles issued to TC."
-  ></metric>
-  <metric
-    name="TA_RESERVED_41" block=TA event=41 descr="RESERVED 41."
-  ></metric>
-  <metric
-    name="TA_RESERVED_42" block=TA event=42 descr="RESERVED 42."
-  ></metric>
-  <metric
-    name="TA_RESERVED_43" block=TA event=43 descr="RESERVED 43."
-  ></metric>
-  <metric
-    name="TA_BUFFER_WAVEFRONTS" block=TA event=44 descr="Number of buffer wavefronts processed by TA."
-  ></metric>
-  <metric
-    name="TA_BUFFER_READ_WAVEFRONTS" block=TA event=45 descr="Number of buffer read wavefronts processed by TA."
-  ></metric>
-  <metric
-    name="TA_BUFFER_WRITE_WAVEFRONTS" block=TA event=46 descr="Number of buffer write wavefronts processed by TA."
-  ></metric>
-  <metric
-    name="TA_BUFFER_ATOMIC_WAVEFRONTS" block=TA event=47 descr="Number of buffer atomic wavefronts processed by TA."
-  ></metric>
-  <metric
-    name="TA_BUFFER_COALESCABLE_WAVEFRONTS" block=TA event=48 descr="Number of buffer coalesceable wavefronts processed by TA."
-  ></metric>
-  <metric
-    name="TA_BUFFER_TOTAL_CYCLES" block=TA event=49 descr="Number of buffer cycles issued to TC."
-  ></metric>
-  <metric
-    name="TA_BUFFER_COALESCABLE_ADDR_MULTICYCLED_CYCLES" block=TA event=50 descr="Number of buffer coalesceable cycles issued to TC that were not coalesced due to addresser."
-  ></metric>
-  <metric
-    name="TA_BUFFER_COALESCABLE_CLAMP_16KDWORD_MULTICYCLED_CYCLES" block=TA event=51 descr="Number of buffer coalesceable cycles issued to TC that were not coalesced due to clamping or 64KB bounds check."
-  ></metric>
-  <metric
-    name="TA_BUFFER_COALESCED_READ_CYCLES" block=TA event=52 descr="Number of buffer coalesced read cycles issued to TC."
-  ></metric>
-  <metric
-    name="TA_BUFFER_COALESCED_WRITE_CYCLES" block=TA event=53 descr="Number of buffer coalesced write cycles issued to TC."
-  ></metric>
-  <metric
-    name="TA_ADDR_STALLED_BY_TC_CYCLES" block=TA event=54 descr="Number of cycles addr path stalled by TC. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_ADDR_STALLED_BY_TD_CYCLES" block=TA event=55 descr="Number of cycles addr path stalled by TD. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_DATA_STALLED_BY_TC_CYCLES" block=TA event=56 descr="Number of cycles data path stalled by TC. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_ADDRESSER_STALLED_BY_ALIGNER_ONLY_CYCLES" block=TA event=57 descr="Number of cycles Addresser stalled by Aligner and not further down the pipe. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_ADDRESSER_STALLED_CYCLES" block=TA event=58 descr="Number of cycles Addresser stalled. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_ANISO_STALLED_BY_ADDRESSER_ONLY_CYCLES" block=TA event=59 descr="Number of cycles Aniso stalled by Addresser and not further down the pipe. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_ANISO_STALLED_CYCLES" block=TA event=60 descr="Number of cycles Aniso stalled. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_DERIV_STALLED_BY_ANISO_ONLY_CYCLES" block=TA event=61 descr="Number of cycles Deriv stalled by Aniso and not further down the pipe. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_DERIV_STALLED_CYCLES" block=TA event=62 descr="Number of cycles Deriv stalled. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_ANISO_GT1_CYCLE_QUADS" block=TA event=63 descr="Number of quads requiring more than 1 aniso sample."
-  ></metric>
-  <metric
-    name="TA_COLOR_1_CYCLE_PIXELS" block=TA event=64 descr="Number of pixels requiring sampler state machine to take 1 cycle due to format."
-  ></metric>
-  <metric
-    name="TA_COLOR_2_CYCLE_PIXELS" block=TA event=65 descr="Number of pixels requiring sampler state machine to take 2 cycle due to format."
-  ></metric>
-  <metric
-    name="TA_COLOR_3_CYCLE_PIXELS" block=TA event=66 descr="Number of pixels requiring sampler state machine to take 3 cycle due to format."
-  ></metric>
-  <metric
-    name="TA_COLOR_4_CYCLE_PIXELS" block=TA event=67 descr="Number of pixels requiring sampler state machine to take 4 cycle due to format."
-  ></metric>
-  <metric
-    name="TA_MIP_1_CYCLE_PIXELS" block=TA event=68 descr="Number of pixels requiring sampler state machine to take 1 cycle due to mip filter."
-  ></metric>
-  <metric
-    name="TA_MIP_2_CYCLE_PIXELS" block=TA event=69 descr="Number of pixels requiring sampler state machine to take 2 cycle due to mip filter."
-  ></metric>
-  <metric
-    name="TA_VOL_1_CYCLE_PIXELS" block=TA event=70 descr="Number of pixels requiring sampler state machine to take 1 cycle due to z filter."
-  ></metric>
-  <metric
-    name="TA_VOL_2_CYCLE_PIXELS" block=TA event=71 descr="Number of pixels requiring sampler state machine to take 2 cycle due to z filter."
-  ></metric>
-  <metric
-    name="TA_BILIN_POINT_1_CYCLE_PIXELS" block=TA event=72 descr="Number of pixels requiring sampler state machine to take 1 cycle due to xy filter."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_0_SAMPLES" block=TA event=73 descr="Number of samples fetched from mip 0."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_1_SAMPLES" block=TA event=74 descr="Number of samples fetched from mip 1."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_2_SAMPLES" block=TA event=75 descr="Number of samples fetched from mip 2."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_3_SAMPLES" block=TA event=76 descr="Number of samples fetched from mip 3."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_4_SAMPLES" block=TA event=77 descr="Number of samples fetched from mip 4."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_5_SAMPLES" block=TA event=78 descr="Number of samples fetched from mip 5."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_6_SAMPLES" block=TA event=79 descr="Number of samples fetched from mip 6."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_7_SAMPLES" block=TA event=80 descr="Number of samples fetched from mip 7."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_8_SAMPLES" block=TA event=81 descr="Number of samples fetched from mip 8."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_9_SAMPLES" block=TA event=82 descr="Number of samples fetched from mip 9."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_10_SAMPLES" block=TA event=83 descr="Number of samples fetched from mip 10."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_11_SAMPLES" block=TA event=84 descr="Number of samples fetched from mip 11."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_12_SAMPLES" block=TA event=85 descr="Number of samples fetched from mip 12."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_13_SAMPLES" block=TA event=86 descr="Number of samples fetched from mip 13."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_LOD_14_SAMPLES" block=TA event=87 descr="Number of samples fetched from mip 14."
-  ></metric>
-  <metric
-    name="TA_MIPMAP_INVALID_SAMPLES" block=TA event=88 descr="Number of samples marked invalid using mip 15 method."
-  ></metric>
-  <metric
-    name="TA_ANISO_1_CYCLE_QUADS" block=TA event=89 descr="Number of quads requiring 1 aniso sample."
-  ></metric>
-  <metric
-    name="TA_ANISO_2_CYCLE_QUADS" block=TA event=90 descr="Number of quads requiring 2 aniso sample."
-  ></metric>
-  <metric
-    name="TA_ANISO_4_CYCLE_QUADS" block=TA event=91 descr="Number of quads requiring 4 aniso sample."
-  ></metric>
-  <metric
-    name="TA_ANISO_6_CYCLE_QUADS" block=TA event=92 descr="Number of quads requiring 6 aniso sample."
-  ></metric>
-  <metric
-    name="TA_ANISO_8_CYCLE_QUADS" block=TA event=93 descr="Number of quads requiring 8 aniso sample."
-  ></metric>
-  <metric
-    name="TA_ANISO_10_CYCLE_QUADS" block=TA event=94 descr="Number of quads requiring 10 aniso sample."
-  ></metric>
-  <metric
-    name="TA_ANISO_12_CYCLE_QUADS" block=TA event=95 descr="Number of quads requiring 12 aniso sample."
-  ></metric>
-  <metric
-    name="TA_ANISO_14_CYCLE_QUADS" block=TA event=96 descr="Number of quads requiring 14 aniso sample."
-  ></metric>
-  <metric
-    name="TA_ANISO_16_CYCLE_QUADS" block=TA event=97 descr="Number of quads requiring 16 aniso sample."
-  ></metric>
-  <metric
-    name="TA_WRITE_PATH_INPUT_CYCLES" block=TA event=98 descr="Number of cycles received from write datapath from sh_dispatct."
-  ></metric>
-  <metric
-    name="TA_WRITE_PATH_OUTPUT_CYCLES" block=TA event=99 descr="Number of cycles sent from write datapath to TC."
-  ></metric>
-  <metric
-    name="TA_FLAT_WAVEFRONTS" block=TA event=100 descr="Number of flat opcode wavfronts processed by the TA."
-  ></metric>
-  <metric
-    name="TA_FLAT_READ_WAVEFRONTS" block=TA event=101 descr="Number of flat opcode reads processed by the TA."
-  ></metric>
-  <metric
-    name="TA_FLAT_WRITE_WAVEFRONTS" block=TA event=102 descr="Number of flat opcode writes processed by the TA."
-  ></metric>
-  <metric
-    name="TA_FLAT_ATOMIC_WAVEFRONTS" block=TA event=103 descr="Number of flat opcode atomics processed by the TA."
-  ></metric>
-  <metric
-    name="TA_FLAT_COALESCEABLE_WAVEFRONTS" block=TA event=104 descr="Number of flat opcode coalesceale ops processed by the TA."
-  ></metric>
-  <metric
-    name="TA_REG_SCLK_VLD" block=TA event=105 descr="Number of cycles reg_sclk is active. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_LOCAL_CG_DYN_SCLK_GRP0_EN" block=TA event=106 descr="Number of cycles grp0 sclk is active. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_LOCAL_CG_DYN_SCLK_GRP1_EN" block=TA event=107 descr="Number of cycles grp1 sclk is active. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_LOCAL_CG_DYN_SCLK_GRP1_MEMS_EN" block=TA event=108 descr="Number of cycles grp1_mems sclk is active. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_LOCAL_CG_DYN_SCLK_GRP4_EN" block=TA event=109 descr="Number of cycles grp4 sclk is active. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_LOCAL_CG_DYN_SCLK_GRP5_EN" block=TA event=110 descr="Number of cycles grp5 sclk is active. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_XNACK_ON_PHASE0" block=TA event=111 descr="None zero Xnack mask returned on phase0. This counter is always 0x0 for configurations that do not support XNACKs. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_XNACK_ON_PHASE1" block=TA event=112 descr="None zero Xnack mask returned on phase1. This counter is always 0x0 for configurations that do not support XNACKs. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_XNACK_ON_PHASE2" block=TA event=113 descr="None zero Xnack mask returned on phase2. This counter is always 0x0 for configurations that do not support XNACKs. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_XNACK_ON_PHASE3" block=TA event=114 descr="None zero Xnack mask returned on phase3. This counter is always 0x0 for configurations that do not support XNACKs. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_FIRST_XNACK_ON_PHASE0" block=TA event=115 descr="First Xnack of an instruction occured on phase0. This counter is always 0x0 for configurations that do not support XNACKs. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_FIRST_XNACK_ON_PHASE1" block=TA event=116 descr="First Xnack of an instruction occured on phase1. This counter is always 0x0 for configurations that do not support XNACKs. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_FIRST_XNACK_ON_PHASE2" block=TA event=117 descr="First Xnack of an instruction occured on phase2. This counter is always 0x0 for configurations that do not support XNACKs. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TA_FIRST_XNACK_ON_PHASE3" block=TA event=118 descr="First Xnack of an instruction occured on phase3. This counter is always 0x0 for configurations that do not support XNACKs. Perf_Windowing not supported for this counter."
-  ></metric>
-  # TCA counters
-  <metric
-    name="TCA_NONE" block=TCA event=0 descr="Don't count anything."
-  ></metric>
-  <metric
-    name="TCA_CYCLE" block=TCA event=1 descr="Number of cycles. Not windowable."
-  ></metric>
-  <metric
-    name="TCA_BUSY" block=TCA event=2 descr="Number of cycles we have a request pending. Not windowable."
-  ></metric>
-  <metric
-    name="TCA_FORCED_HOLE_TCC0" block=TCA event=3 descr="Number of TCC0 hole requests that waited so long that it was decided that they should be forced rather than opportunistic. The TCC number is based on the TCCs connected to this TCA and not on the global numbering."
-  ></metric>
-  <metric
-    name="TCA_FORCED_HOLE_TCC1" block=TCA event=4 descr=""
-  ></metric>
-  <metric
-    name="TCA_FORCED_HOLE_TCC2" block=TCA event=5 descr=""
-  ></metric>
-  <metric
-    name="TCA_FORCED_HOLE_TCC3" block=TCA event=6 descr=""
-  ></metric>
-  <metric
-    name="TCA_FORCED_HOLE_TCC4" block=TCA event=7 descr=""
-  ></metric>
-  <metric
-    name="TCA_FORCED_HOLE_TCC5" block=TCA event=8 descr=""
-  ></metric>
-  <metric
-    name="TCA_FORCED_HOLE_TCC6" block=TCA event=9 descr=""
-  ></metric>
-  <metric
-    name="TCA_FORCED_HOLE_TCC7" block=TCA event=10 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC0" block=TCA event=11 descr="Number of requests sent to TCC0. This should report the same thing as TCC_PERF_SEL_REQ in the corresponding TCC in the long run. It is only offered to create a deterministic counter in the TCA so that the counters may be sanity tested."
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC1" block=TCA event=12 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC2" block=TCA event=13 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC3" block=TCA event=14 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC4" block=TCA event=15 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC5" block=TCA event=16 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC6" block=TCA event=17 descr=""
-  ></metric>
-  <metric
-    name="TCA_REQ_TCC7" block=TCA event=18 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_DOUBLE_ARB_TCC0" block=TCA event=19 descr="Number of cycles two requests were sent in one clock to TCC0. The TCC number is based on the TCCs connected to this TCA and not on the global numbering."
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_DOUBLE_ARB_TCC1" block=TCA event=20 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_DOUBLE_ARB_TCC2" block=TCA event=21 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_DOUBLE_ARB_TCC3" block=TCA event=22 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_DOUBLE_ARB_TCC4" block=TCA event=23 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_DOUBLE_ARB_TCC5" block=TCA event=24 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_DOUBLE_ARB_TCC6" block=TCA event=25 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_DOUBLE_ARB_TCC7" block=TCA event=26 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCC0" block=TCA event=27 descr="Number of cycles no requests could be sent to TCC0 because its fifos were expected to be full. The TCC number is based on the TCCs connected to this TCA and not on the global numbering."
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCC1" block=TCA event=28 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCC2" block=TCA event=29 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCC3" block=TCA event=30 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCC4" block=TCA event=31 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCC5" block=TCA event=32 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCC6" block=TCA event=33 descr=""
-  ></metric>
-  <metric
-    name="TCA_CROSSBAR_STALL_TCC7" block=TCA event=34 descr=""
-  ></metric>
-  # TCC counters
-  <metric
-    name="TCC_NONE" block=TCC event=0 descr="Don't count anything."
-  ></metric>
-  <metric
-    name="TCC_CYCLE" block=TCC event=1 descr="Number of cycles. Not windowable."
-  ></metric>
-  <metric
-    name="TCC_BUSY" block=TCC event=2 descr="Number of cycles we have a request pending. Not windowable."
-  ></metric>
-  <metric
-    name="TCC_REQ" block=TCC event=3 descr="Number of requests of all types. This is measured at the tag block. This may be more than the number of requests arriving at the TCC, but it is a good indication of the total amount of work that needs to be performed."
-  ></metric>
-  <metric
-    name="TCC_STREAMING_REQ" block=TCC event=4 descr="Number of streaming requests. This is measured at the tag block."
-  ></metric>
-  <metric
-    name="TCC_COMPRESSED_REQ" block=TCC event=5 descr="Number of compressed requests. This includes requests that read 0 bytes of compressed data. Metadata requests are not included. This is measured at the tag block."
-  ></metric>
-  <metric
-    name="TCC_COMPRESSED_0_REQ" block=TCC event=6 descr="Number of compressed requests that read 0 bytes of compressed data. Metadata requests are not included. This is measured at the tag block."
-  ></metric>
-  <metric
-    name="TCC_COMPRESSED_32_REQ" block=TCC event=7 descr="Number of compressed requests that read 32 bytes of compressed data. Metadata requests are not included. This is measured at the tag block."
-  ></metric>
-  <metric
-    name="TCC_METADATA_REQ" block=TCC event=8 descr="Number of metadata requests. This is measured at the tag block."
-  ></metric>
-  <metric
-    name="TCC_NC_REQ" block=TCC event=9 descr="The number of noncoherently cached requests. This is measured at the tag block."
-  ></metric>
-  <metric
-    name="TCC_UC_REQ" block=TCC event=10 descr="The number of uncached requests. This is measured at the tag block."
-  ></metric>
-  <metric
-    name="TCC_CC_REQ" block=TCC event=11 descr="The number of coherently cached requests. This is measured at the tag block."
-  ></metric>
-  <metric
-    name="TCC_PROBE" block=TCC event=12 descr="Number of probe requests. Not windowable."
-  ></metric>
-  <metric
-    name="TCC_PROBE_ALL" block=TCC event=13 descr="Number of external probe requests with with EA_TCC_preq_all== 1. Not windowable."
-  ></metric>
-  <metric
-    name="TCC_INTERNAL_PROBE" block=TCC event=14 descr="Number of self-probes spawned by TCC for CC writes/atomic operations. Not windowable."
-  ></metric>
-  <metric
-    name="TCC_READ" block=TCC event=15 descr="Number of read requests. Compressed reads are included in this, but metadata reads are not included."
-  ></metric>
-  <metric
-    name="TCC_WRITE" block=TCC event=16 descr="Number of write requests."
-  ></metric>
-  <metric
-    name="TCC_ATOMIC" block=TCC event=17 descr="Number of atomic requests of all types."
-  ></metric>
-  <metric
-    name="TCC_NOP_ACK" block=TCC event=18 descr="Number of NOP_ACK requests."
-  ></metric>
-  <metric
-    name="TCC_NOP_RTN0" block=TCC event=19 descr="Number of NOP_RTN0 requests."
-  ></metric>
-  <metric
-    name="TCC_HIT" block=TCC event=20 descr="Number of cache hits."
-  ></metric>
-  <metric
-    name="TCC_SECTOR_HIT" block=TCC event=21 descr="Number of cache sector hits."
-  ></metric>
-  <metric
-    name="TCC_MISS" block=TCC event=22 descr="Number of cache misses. UC reads count as misses."
-  ></metric>
-  <metric
-    name="TCC_DEWRITE_ALLOCATE_HIT" block=TCC event=23 descr="Number of times a read was performed on a cache line that had only been written into before. This can only occur once for the life of a cache line."
-  ></metric>
-  <metric
-    name="TCC_FULLY_WRITTEN_HIT" block=TCC event=24 descr="Number of times a 32-byte read from the EA was avoided because the cache sector was already fully written with data. This can only occur once for the life of a cache sector."
-  ></metric>
-  <metric
-    name="TCC_WRITEBACK" block=TCC event=25 descr="Number of lines written back to main memory. This includes writebacks of dirty lines and uncached write/atomic requests."
-  ></metric>
-  <metric
-    name="TCC_LATENCY_FIFO_FULL" block=TCC event=26 descr="Number of cycles the latency fifo was full."
-  ></metric>
-  <metric
-    name="TCC_SRC_FIFO_FULL" block=TCC event=27 descr="Number of cycles the src fifo was expected to be full as measured at the IB block."
-  ></metric>
-  <metric
-    name="TCC_HOLE_FIFO_FULL" block=TCC event=28 descr="Number of cycles the hole fifos in the TCAs were expected to be full as measured at the IB block. This is usually an indication that there was insufficient bandwidth available on the data bus for source data."
-  ></metric>
-  <metric
-    name="TCC_EA_WRREQ" block=TCC event=29 descr="Number of transactions (either 32-byte or 64-byte) going over the TC_EA_wrreq interface. Atomics may travel over the same interface and are generally classified as write requests. This does not include probe commands."
-  ></metric>
-  <metric
-    name="TCC_EA_WRREQ_64B" block=TCC event=30 descr="Number of 64-byte transactions going (64-byte write or CMPSWAP) over the TC_EA_wrreq interface."
-  ></metric>
-  <metric
-    name="TCC_EA_WRREQ_PROBE_COMMAND" block=TCC event=31 descr="Number of probe commands going over the TC_EA_wrreq interface."
-  ></metric>
-  <metric
-    name="TCC_EA_WR_UNCACHED_32B" block=TCC event=32 descr="Number of 32-byte write/atomic going over the TC_EA_wrreq interface due to uncached traffic. Note that CC mtypes can produce uncached requests, and those are included in this. A 64-byte request will be counted as 2"
-  ></metric>
-  <metric
-    name="TCC_EA_WRREQ_STALL" block=TCC event=33 descr="Number of cycles a write request was stalled."
-  ></metric>
-  <metric
-    name="TCC_EA_WRREQ_IO_CREDIT_STALL" block=TCC event=34 descr="Number of cycles a EA write request was stalled because the interface was out of IO credits."
-  ></metric>
-  <metric
-    name="TCC_EA_WRREQ_GMI_CREDIT_STALL" block=TCC event=35 descr="Number of cycles a EA write request was stalled because the interface was out of GMI credits."
-  ></metric>
-  <metric
-    name="TCC_EA_WRREQ_DRAM_CREDIT_STALL" block=TCC event=36 descr="Number of cycles a EA write request was stalled because the interface was out of DRAM credits."
-  ></metric>
-  <metric
-    name="TCC_TOO_MANY_EA_WRREQS_STALL" block=TCC event=37 descr="Number of cycles the TCC could not send a EA write request because it already reached its maximum number of pending EA write requests."
-  ></metric>
-  <metric
-    name="TCC_EA_WRREQ_LEVEL" block=TCC event=38 descr="The sum of the number of EA write requests in flight. This is primarily meant for measure average EA write latency. Average write latency = TCC_PERF_SEL_EA_WRREQ_LEVEL/TCC_PERF_SEL_EA_WRREQ."
-  ></metric>
-  <metric
-    name="TCC_EA_ATOMIC" block=TCC event=39 descr="Number of transactions going over the TC_EA_wrreq interface that are actually atomic requests."
-  ></metric>
-  <metric
-    name="TCC_EA_ATOMIC_LEVEL" block=TCC event=40 descr="The sum of the number of EA atomics in flight. This is primarily meant for measure average EA atomic latency. Average atomic latency = TCC_PERF_SEL_EA_WRREQ_ATOMIC_LEVEL/TCC_PERF_SEL_EA_WRREQ_ATOMIC."
-  ></metric>
-  <metric
-    name="TCC_EA_RDREQ" block=TCC event=41 descr="Number of TCC/EA read requests (either 32-byte or 64-byte)"
-  ></metric>
-  <metric
-    name="TCC_EA_RDREQ_32B" block=TCC event=42 descr="Number of 32-byte TCC/EA read requests"
-  ></metric>
-  <metric
-    name="TCC_EA_RD_UNCACHED_32B" block=TCC event=43 descr="Number of 32-byte TCC/EA read due to uncached traffic. A 64-byte request will be counted as 2"
-  ></metric>
-  <metric
-    name="TCC_EA_RD_MDC_32B" block=TCC event=44 descr="Number of 32-byte TCC/EA read due to MDC traffic. A 64-byte request will be counted as 2"
-  ></metric>
-  <metric
-    name="TCC_EA_RD_COMPRESSED_32B" block=TCC event=45 descr="Number of 32-byte TCC/EA read due to compressed data reads. This does not include MDC traffic. A 64-byte request will be counted as 2"
-  ></metric>
-  <metric
-    name="TCC_EA_RDREQ_IO_CREDIT_STALL" block=TCC event=46 descr="Number of cycles there was a stall because the read request interface was out of IO credits. Stalls occur regardless of whether a read needed to be performed or not."
-  ></metric>
-  <metric
-    name="TCC_EA_RDREQ_GMI_CREDIT_STALL" block=TCC event=47 descr="Number of cycles there was a stall because the read request interface was out of GMI credits. Stalls occur regardless of whether a read needed to be performed or not."
-  ></metric>
-  <metric
-    name="TCC_EA_RDREQ_DRAM_CREDIT_STALL" block=TCC event=48 descr="Number of cycles there was a stall because the read request interface was out of DRAM credits. Stalls occur regardless of whether a read needed to be performed or not."
-  ></metric>
-  <metric
-    name="TCC_EA_RDREQ_LEVEL" block=TCC event=49 descr="The sum of the number of TCC/EA read requests in flight. This is primarily meant for measure average EA read latency. Average read latency = TCC_PERF_SEL_EA_RDREQ_LEVEL/TCC_PERF_SEL_EA_RDREQ."
-  ></metric>
-  <metric
-    name="TCC_TAG_STALL" block=TCC event=50 descr="Number of cycles the normal request pipeline in the tag was stalled for any reason. Normally, stalls of this nature are measured exactly from one point the pipeline, but that is not the case for this counter. Probes can stall the pipeline at a variety of places, and there is no single point that can reasonably measure the total stalls accurately."
-  ></metric>
-  <metric
-    name="TCC_TAG_WRITEBACK_FIFO_FULL_STALL" block=TCC event=51 descr="Number of cycles the normal request pipeline in the tag was stalled due to the writeback fifo within the tag block being full."
-  ></metric>
-  <metric
-    name="TCC_TAG_MISS_NOTHING_REPLACEABLE_STALL" block=TCC event=52 descr="Number of cycles the normal request pipeline in the tag was stalled due to a cache miss and unavailabiliyt of a replaceable cache line."
-  ></metric>
-  <metric
-    name="TCC_TAG_UNCACHED_WRITE_ATOMIC_FIFO_FULL_STALL" block=TCC event=53 descr="Number of cycles the normal request pipeline in the tag was stalled due to the uncached write/atomic fifo being full."
-  ></metric>
-  <metric
-    name="TCC_TAG_NO_UNCACHED_WRITE_ATOMIC_ENTRIES_STALL" block=TCC event=54 descr="Number of cycles the normal request pipeline in the tag was stalled due to the lack of unused uncached write/atomic tracking entries."
-  ></metric>
-  <metric
-    name="TCC_TAG_PROBE_STALL" block=TCC event=55 descr="Number of cycles the normal request pipeline in the tag was stalled due to the presence of a probe."
-  ></metric>
-  <metric
-    name="TCC_TAG_PROBE_FILTER_STALL" block=TCC event=56 descr="Number of cycles the normal request pipeline in the tag was stalled due to the probe filter being in an inappropriate state."
-  ></metric>
-  <metric
-    name="TCC_TAG_PROBE_FIFO_FULL_STALL" block=TCC event=57 descr="Number of cycles the normal request pipeline in the tag was stalled due to the probe fifo begin full."
-  ></metric>
-  <metric
-    name="TCC_READ_RETURN_TIMEOUT" block=TCC event=58 descr="Number of bubbles requests sent to the TCA because a EA read return waited so long for a cache ram port that it timed out."
-  ></metric>
-  <metric
-    name="TCC_WRITEBACK_READ_TIMEOUT" block=TCC event=59 descr="Number of bubbles requests sent to the TCA because a writeback waited so long for a cache ram port that it timed out."
-  ></metric>
-  <metric
-    name="TCC_READ_RETURN_FULL_BUBBLE" block=TCC event=60 descr="Number of bubbles requests sent to the TCA to prevent the EA read return fifos from overflowing. Not windowable."
-  ></metric>
-  <metric
-    name="TCC_BUBBLE" block=TCC event=61 descr="Total number of bubble requests sent to the TCA"
-  ></metric>
-  <metric
-    name="TCC_RETURN_ACK" block=TCC event=62 descr="Number of times only an ack was sent on the return bus."
-  ></metric>
-  <metric
-    name="TCC_RETURN_DATA" block=TCC event=63 descr="Number of times only data was sent on the return bus."
-  ></metric>
-  <metric
-    name="TCC_RETURN_HOLE" block=TCC event=64 descr="Number of times only a hole was sent on the return bus."
-  ></metric>
-  <metric
-    name="TCC_RETURN_ACK_HOLE" block=TCC event=65 descr="Number of times an ack and a hole were sent at the same time on the return bus."
-  ></metric>
-  <metric
-    name="TCC_IB_REQ" block=TCC event=66 descr="Number of requests through the IB. This measures the raw request count from graphics clients going to this TCC."
-  ></metric>
-  <metric
-    name="TCC_IB_STALL" block=TCC event=67 descr="Number of cycles the IB output was stalled."
-  ></metric>
-  <metric
-    name="TCC_IB_TAG_STALL" block=TCC event=68 descr="Number of cycles the IB output was stalled on the tag."
-  ></metric>
-  <metric
-    name="TCC_IB_MDC_STALL" block=TCC event=69 descr="Number of cycles the IB output was stalled on the mdc."
-  ></metric>
-  <metric
-    name="TCC_TCA_LEVEL" block=TCC event=70 descr="The sum of the number of requests sent to the TCA for output arbitration in flight. Average TCA arbitration latency = TCC_PERF_SEL_TCA_LEVEL/TCC_PERF_SEL_REQ."
-  ></metric>
-  <metric
-    name="TCC_HOLE_LEVEL" block=TCC event=71 descr="The sum of the number of hole requests in flight. Average hole latency = TCC_PERF_SEL_HOLE_LEVEL/(TCC_PERF_SEL_WRITE+TCC_PERF_SEL_ATOMIC). Not windowable."
-  ></metric>
-  <metric
-    name="TCC_EA_RDRET_NACK" block=TCC event=72 descr="The number of EA read returns that were nacked."
-  ></metric>
-  <metric
-    name="TCC_EA_WRRET_NACK" block=TCC event=73 descr="The number of EA write returns that were nacked."
-  ></metric>
-  <metric
-    name="TCC_NORMAL_WRITEBACK" block=TCC event=74 descr="Number of writebacks due to requests that are not writeback requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBL2_NC_WRITEBACK" block=TCC event=75 descr="Number of writebacks due to TC_OP_WBL2_NC requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_WRITEBACK" block=TCC event=76 descr="Number of writebacks due to TC_OP_WBINVL2 requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_NC_WRITEBACK" block=TCC event=77 descr="Number of writebacks due to TC_OP_WBINVL2_NC requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_SD_WRITEBACK" block=TCC event=78 descr="Number of writebacks due to TC_OP_WBINVL2_SD requests."
-  ></metric>
-  <metric
-    name="TCC_ALL_TC_OP_WB_WRITEBACK" block=TCC event=79 descr="Number of writebacks due to all TC_OP writeback requests."
-  ></metric>
-  <metric
-    name="TCC_NORMAL_EVICT" block=TCC event=80 descr="Number of evictions due to requests that are not invalidate or probe requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBL2_NC_EVICT" block=TCC event=81 descr="Number of evictions due to TC_OP_WBL2_NC requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_INVL2_NC_EVICT" block=TCC event=82 descr="Number of evictions due to TC_OP_INVL2_NC requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_EVICT" block=TCC event=83 descr="Number of evictions due to TC_OP_WBINVL2 requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_NC_EVICT" block=TCC event=84 descr="Number of evictions due to TC_OP_WBINVL2_NC requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_SD_EVICT" block=TCC event=85 descr="Number of evictions due to TC_OP_WBINVL2_SD requests."
-  ></metric>
-  <metric
-    name="TCC_ALL_TC_OP_INV_EVICT" block=TCC event=86 descr="Number of evictions due to all TC_OP invalidate requests."
-  ></metric>
-  <metric
-    name="TCC_PROBE_EVICT" block=TCC event=87 descr="Number of evictions/invalidations due to probes. Not windowable."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBL2_NC_CYCLE" block=TCC event=88 descr="Number of cycles spent performing TC_OP_WBL2_NC requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_INVL2_NC_CYCLE" block=TCC event=89 descr="Number of cycles spent performing TC_OP_INVL2_NC requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_CYCLE" block=TCC event=90 descr="Number of cycles spent performing TC_OP_WBINVL2 requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_NC_CYCLE" block=TCC event=91 descr="Number of cycles spent performing TC_OP_WBINVL2_NC requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_SD_CYCLE" block=TCC event=92 descr="Number of cycles spent performing TC_OP_WBINVL2_SD requests."
-  ></metric>
-  <metric
-    name="TCC_ALL_TC_OP_WB_OR_INV_CYCLE" block=TCC event=93 descr="Number of cycles spent performing all TC_OP writeback or invalidate requests."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBL2_NC_START" block=TCC event=94 descr="Number of TC_OP_WBL2_NC requests started."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_INVL2_NC_START" block=TCC event=95 descr="Number of TC_OP_INVL2_NC requests started."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_START" block=TCC event=96 descr="Number of TC_OP_WBINVL2 requests started."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_NC_START" block=TCC event=97 descr="Number of TC_OP_WBINVL2_NC requests started."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_SD_START" block=TCC event=98 descr="Number of TC_OP_WBINVL2_SD requests started."
-  ></metric>
-  <metric
-    name="TCC_ALL_TC_OP_WB_OR_INV_START" block=TCC event=99 descr="Number of TC_OP writeback or invalidate requests started."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBL2_NC_FINISH" block=TCC event=100 descr="Number of TC_OP_WBL2_NC requests finished."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_INVL2_NC_FINISH" block=TCC event=101 descr="Number of TC_OP_INVL2_NC requests finished."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_FINISH" block=TCC event=102 descr="Number of TC_OP_WBINVL2 requests finished."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_NC_FINISH" block=TCC event=103 descr="Number of TC_OP_WBINVL2_NC requests finished."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_WBINVL2_SD_FINISH" block=TCC event=104 descr="Number of TC_OP_WBINVL2_SD requests finished."
-  ></metric>
-  <metric
-    name="TCC_ALL_TC_OP_WB_OR_INV_FINISH" block=TCC event=105 descr="Number of TC_OP writeback or invalidate requests finished."
-  ></metric>
-  <metric
-    name="TCC_TC_OP_INV_METADATA" block=TCC event=106 descr="Number of TC_OP_INV_METADATA requests. TC_OP_INV_METADATA is not included in the other WB/INV perf counters since it doesn't affect the L2 cache."
-  ></metric>
-  <metric
-    name="TCC_MDC_REQ" block=TCC event=107 descr="Number of requests passed through the metadata cache."
-  ></metric>
-  <metric
-    name="TCC_MDC_LEVEL" block=TCC event=108 descr="The sum of the number of mdc requests in flight. Average MDC latency=TCC_PERF_SEL_MDC_LEVEL/TCC_PERF_SEL_MDC_REQ."
-  ></metric>
-  <metric
-    name="TCC_MDC_TAG_HIT" block=TCC event=109 descr="Number of MDC tag hits. A tag contains multiple sectors, so many tag hits will be sector misses."
-  ></metric>
-  <metric
-    name="TCC_MDC_SECTOR_HIT" block=TCC event=110 descr="Number of MDC sector hits. A sector hit means that there actually is data in the cache for this request."
-  ></metric>
-  <metric
-    name="TCC_MDC_SECTOR_MISS" block=TCC event=111 descr="Number of MDC sector misses."
-  ></metric>
-  <metric
-    name="TCC_MDC_TAG_STALL" block=TCC event=112 descr="Number of cycles that the mdc tag is stalled."
-  ></metric>
-  <metric
-    name="TCC_MDC_TAG_REPLACEMENT_LINE_IN_USE_STALL" block=TCC event=113 descr="Number of cycles that the mdc tag is stalled because the line to be replaced is stalled."
-  ></metric>
-  <metric
-    name="TCC_MDC_TAG_DESECTORIZATION_FIFO_FULL_STALL" block=TCC event=114 descr="Number of cycles that the mdc tag is stalled because the desctorization fifo is full."
-  ></metric>
-  <metric
-    name="TCC_MDC_TAG_WAITING_FOR_INVALIDATE_COMPLETION_STALL" block=TCC event=115 descr="Number of cycles that the mdc tag is stalled because it is waiting for the previous invalidate to complete."
-  ></metric>
-  <metric
-    name="TCC_PROBE_FILTER_DISABLE_TRANSITION" block=TCC event=116 descr="Number of times the probe filter went from enabled to disabled."
-  ></metric>
-  <metric
-    name="TCC_PROBE_FILTER_DISABLED" block=TCC event=117 descr="Number of cycles the probe filter was disabled. The TCC can get probes during these cycles. Not windowable."
-  ></metric>
-  <metric
-    name="TCC_CLIENT0_REQ" block=TCC event=128 descr="Number of cycles client0 sent a request to this TCC."
-  ></metric>
-  <metric
-    name="TCC_CLIENT1_REQ" block=TCC event=129 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT2_REQ" block=TCC event=130 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT3_REQ" block=TCC event=131 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT4_REQ" block=TCC event=132 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT5_REQ" block=TCC event=133 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT6_REQ" block=TCC event=134 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT7_REQ" block=TCC event=135 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT8_REQ" block=TCC event=136 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT9_REQ" block=TCC event=137 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT10_REQ" block=TCC event=138 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT11_REQ" block=TCC event=139 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT12_REQ" block=TCC event=140 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT13_REQ" block=TCC event=141 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT14_REQ" block=TCC event=142 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT15_REQ" block=TCC event=143 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT16_REQ" block=TCC event=144 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT17_REQ" block=TCC event=145 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT18_REQ" block=TCC event=146 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT19_REQ" block=TCC event=147 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT20_REQ" block=TCC event=148 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT21_REQ" block=TCC event=149 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT22_REQ" block=TCC event=150 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT23_REQ" block=TCC event=151 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT24_REQ" block=TCC event=152 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT25_REQ" block=TCC event=153 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT26_REQ" block=TCC event=154 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT27_REQ" block=TCC event=155 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT28_REQ" block=TCC event=156 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT29_REQ" block=TCC event=157 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT30_REQ" block=TCC event=158 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT31_REQ" block=TCC event=159 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT32_REQ" block=TCC event=160 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT33_REQ" block=TCC event=161 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT34_REQ" block=TCC event=162 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT35_REQ" block=TCC event=163 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT36_REQ" block=TCC event=164 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT37_REQ" block=TCC event=165 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT38_REQ" block=TCC event=166 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT39_REQ" block=TCC event=167 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT40_REQ" block=TCC event=168 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT41_REQ" block=TCC event=169 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT42_REQ" block=TCC event=170 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT43_REQ" block=TCC event=171 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT44_REQ" block=TCC event=172 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT45_REQ" block=TCC event=173 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT46_REQ" block=TCC event=174 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT47_REQ" block=TCC event=175 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT48_REQ" block=TCC event=176 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT49_REQ" block=TCC event=177 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT50_REQ" block=TCC event=178 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT51_REQ" block=TCC event=179 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT52_REQ" block=TCC event=180 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT53_REQ" block=TCC event=181 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT54_REQ" block=TCC event=182 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT55_REQ" block=TCC event=183 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT56_REQ" block=TCC event=184 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT57_REQ" block=TCC event=185 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT58_REQ" block=TCC event=186 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT59_REQ" block=TCC event=187 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT60_REQ" block=TCC event=188 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT61_REQ" block=TCC event=189 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT62_REQ" block=TCC event=190 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT63_REQ" block=TCC event=191 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT64_REQ" block=TCC event=192 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT65_REQ" block=TCC event=193 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT66_REQ" block=TCC event=194 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT67_REQ" block=TCC event=195 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT68_REQ" block=TCC event=196 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT69_REQ" block=TCC event=197 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT70_REQ" block=TCC event=198 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT71_REQ" block=TCC event=199 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT72_REQ" block=TCC event=200 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT73_REQ" block=TCC event=201 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT74_REQ" block=TCC event=202 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT75_REQ" block=TCC event=203 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT76_REQ" block=TCC event=204 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT77_REQ" block=TCC event=205 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT78_REQ" block=TCC event=206 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT79_REQ" block=TCC event=207 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT80_REQ" block=TCC event=208 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT81_REQ" block=TCC event=209 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT82_REQ" block=TCC event=210 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT83_REQ" block=TCC event=211 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT84_REQ" block=TCC event=212 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT85_REQ" block=TCC event=213 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT86_REQ" block=TCC event=214 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT87_REQ" block=TCC event=215 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT88_REQ" block=TCC event=216 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT89_REQ" block=TCC event=217 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT90_REQ" block=TCC event=218 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT91_REQ" block=TCC event=219 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT92_REQ" block=TCC event=220 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT93_REQ" block=TCC event=221 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT94_REQ" block=TCC event=222 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT95_REQ" block=TCC event=223 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT96_REQ" block=TCC event=224 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT97_REQ" block=TCC event=225 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT98_REQ" block=TCC event=226 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT99_REQ" block=TCC event=227 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT100_REQ" block=TCC event=228 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT101_REQ" block=TCC event=229 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT102_REQ" block=TCC event=230 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT103_REQ" block=TCC event=231 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT104_REQ" block=TCC event=232 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT105_REQ" block=TCC event=233 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT106_REQ" block=TCC event=234 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT107_REQ" block=TCC event=235 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT108_REQ" block=TCC event=236 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT109_REQ" block=TCC event=237 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT110_REQ" block=TCC event=238 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT111_REQ" block=TCC event=239 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT112_REQ" block=TCC event=240 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT113_REQ" block=TCC event=241 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT114_REQ" block=TCC event=242 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT115_REQ" block=TCC event=243 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT116_REQ" block=TCC event=244 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT117_REQ" block=TCC event=245 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT118_REQ" block=TCC event=246 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT119_REQ" block=TCC event=247 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT120_REQ" block=TCC event=248 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT121_REQ" block=TCC event=249 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT122_REQ" block=TCC event=250 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT123_REQ" block=TCC event=251 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT124_REQ" block=TCC event=252 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT125_REQ" block=TCC event=253 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT126_REQ" block=TCC event=254 descr=""
-  ></metric>
-  <metric
-    name="TCC_CLIENT127_REQ" block=TCC event=255 descr=""
-  ></metric>
-  # TCP counters
-  <metric
-    name="TCP_GATE_EN1" block=TCP event=0 descr="TCP interface clocks are turned on. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_GATE_EN2" block=TCP event=1 descr="TCP core clocks are turned on. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_CORE_REG_SCLK_VLD" block=TCP event=2 descr="TCP reg clocks are turned on. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_TA_TCP_ADDR_STARVE_CYCLES" block=TCP event=3 descr="TA starves TCP addr interface. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_TA_TCP_DATA_STARVE_CYCLES" block=TCP event=4 descr="TA starves TCP data interface. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_TCP_TA_ADDR_STALL_CYCLES" block=TCP event=5 descr="TCP stalls TA addr interface."
-  ></metric>
-  <metric
-    name="TCP_TCP_TA_DATA_STALL_CYCLES" block=TCP event=6 descr="TCP stalls TA data interface. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_TD_TCP_STALL_CYCLES" block=TCP event=7 descr="TD stalls TCP"
-  ></metric>
-  <metric
-    name="TCP_TCR_TCP_STALL_CYCLES" block=TCP event=8 descr="TCR stalls TCP_TCR_req interface"
-  ></metric>
-  <metric
-    name="TCP_TCP_TCR_STARVE_CYCLES" block=TCP event=9 descr="TCP starves TCP_TCR_req interface"
-  ></metric>
-  <metric
-    name="TCP_LOD_STALL_CYCLES" block=TCP event=10 descr="Per Pixel LOD stall"
-  ></metric>
-  <metric
-    name="TCP_READ_TAGCONFLICT_STALL_CYCLES" block=TCP event=11 descr="Tagram conflict stall on a read"
-  ></metric>
-  <metric
-    name="TCP_WRITE_TAGCONFLICT_STALL_CYCLES" block=TCP event=12 descr="Tagram conflict stall on a write"
-  ></metric>
-  <metric
-    name="TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES" block=TCP event=13 descr="Tagram conflict stall on an atomic"
-  ></metric>
-  <metric
-    name="TCP_ALLOC_STALL_CYCLES" block=TCP event=14 descr="Alloc on inflight cache line stall"
-  ></metric>
-  <metric
-    name="TCP_UNORDERED_MTYPE_STALL" block=TCP event=15 descr="Total stalls due to UC/CC mtype ordering"
-  ></metric>
-  <metric
-    name="TCP_LFIFO_STALL_CYCLES" block=TCP event=16 descr="Memory Latency fifos full stall"
-  ></metric>
-  <metric
-    name="TCP_RFIFO_STALL_CYCLES" block=TCP event=17 descr="Memory Request fifos full stall"
-  ></metric>
-  <metric
-    name="TCP_TCR_RDRET_STALL" block=TCP event=18 descr="write into cache stalled by read return from tcr"
-  ></metric>
-  <metric
-    name="TCP_WRITE_CONFLICT_STALL" block=TCP event=19 descr="write stall due to cache bank conflict"
-  ></metric>
-  <metric
-    name="TCP_HOLE_READ_STALL" block=TCP event=20 descr="read from cache stalled due to hole fill read"
-  ></metric>
-  <metric
-    name="TCP_READCONFLICT_STALL_CYCLES" block=TCP event=21 descr="Read conflict stall due to cache bank conflict"
-  ></metric>
-  <metric
-    name="TCP_PENDING_STALL_CYCLES" block=TCP event=22 descr="Stall due to data pending from L2"
-  ></metric>
-  <metric
-    name="TCP_READFIFO_STALL_CYCLES" block=TCP event=23 descr="Read fifo stall ("
-  ></metric>
-  <metric
-    name="TCP_POWER_STALL" block=TCP event=24 descr="Count of stalls due to power throttling"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_SERIALIZATION_STALL" block=TCP event=25 descr="Total number of stalls due to serializing translation requests through the UTCL1."
-  ></metric>
-  <metric
-    name="TCP_TC_TA_XNACK_STALL" block=TCP event=26 descr="Total number of cycles TA stalled the TCP xnack interface. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_TA_TCP_STATE_READ" block=TCP event=27 descr="Number of state reads"
-  ></metric>
-  <metric
-    name="TCP_VOLATILE" block=TCP event=28 descr="Total number of L1 volatile pixels/buffers from TA"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_ACCESSES" block=TCP event=29 descr="Total number of pixels/buffers from TA. Equals TCP_PERF_SEL_TOTAL_READ+TCP_PERF_SEL_TOTAL_NONREAD"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_READ" block=TCP event=30 descr="Total number of read pixels/buffers from TA. Equals TCP_PERF_SEL_TOTAL_HIT_LRU_READ + TCP_PERF_SEL_TOTAL_MISS_LRU_READ + TCP_PERF_SEL_TOTAL_MISS_EVICT_READ"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_NON_READ" block=TCP event=31 descr="Total number of non-read pixels/buffers from TA. Equals TCP_PERF_SEL_WRITE + TCP_PERF_SEL_TOTAL_ATOMIC_WITH_RET + TCP_PERF_SEL_TOTAL_ATOMIC_WITHOUT_RET"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_WRITE" block=TCP event=32 descr="Total number of local write pixels/buffers from TA. Equals TCP_PERF_SEL_TOTAL_MISS_LRU_WRITE+ TCP_PERF_SEL_TOTAL_MISS_EVICT_WRITE"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_HIT_LRU_READ" block=TCP event=33 descr="Total number of read pixels/buffers from TA using the HIT_LRU policy"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_MISS_LRU_READ" block=TCP event=34 descr="Total number of read pixels/buffers from TA using the MISS_LRU policy"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_MISS_EVICT_READ" block=TCP event=35 descr="Total number of read pixels/buffers from TA using the MISS_EVICT policy"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_MISS_LRU_WRITE" block=TCP event=36 descr="Total number of local write pixels/buffers from TA using the MISS_LRU policy"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_MISS_EVICT_WRITE" block=TCP event=37 descr="Total number of global write pixels/buffers from TA using the MISS_EVICT policy"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_ATOMIC_WITH_RET" block=TCP event=38 descr="Total number of atomic with return pixels/buffers from TA"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_ATOMIC_WITHOUT_RET" block=TCP event=39 descr="Total number of atomic without return pixels/buffers from TA"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_WBINVL1" block=TCP event=40 descr="Total number of wbinvl1 transactions from TA (from shader WBINVL1 instructions)"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_WBINVL1_VOL" block=TCP event=41 descr="Total number of volatile wbinvl1 transactions from TA (from shader WBINVL1_VOL instructions)"
-  ></metric>
-  <metric
-    name="TCP_SQ_TCP_INVALIDATE_VOL" block=TCP event=42 descr="Number of volatile cache invalidates from the SQ. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_CP_TCP_INVALIDATE" block=TCP event=43 descr="Number of cache invalidates from the CP. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_CP_TCP_INVALIDATE_VOL" block=TCP event=44 descr="Number of volatile cache invalidates from the CP. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_TOTAL_WRITEBACK_INVALIDATES" block=TCP event=45 descr="Total number of cache invalidates. Equals TCP_PERF_SEL_TOTAL_WBINVL1+ TCP_PERF_SEL_TOTAL_WBINVL1_VOL+ TCP_PERF_SEL_CP_TCP_INVALIDATE+ TCP_PERF_SEL_SQ_TCP_INVALIDATE_VOL. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_SHOOTDOWN" block=TCP event=46 descr="Total number of shootdowns executed by TCP. Not windowed."
-  ></metric>
-  <metric
-    name="TCP_UTCL1_REQUEST" block=TCP event=47 descr="Total CLIENT_UTCL1 NORMAL requests"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_TRANSLATION_MISS" block=TCP event=48 descr="Total utcl1 translation misses"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_TRANSLATION_HIT" block=TCP event=49 descr="Total utcl1 translation hits"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_PERMISSION_MISS" block=TCP event=50 descr="Total utcl1 permission misses"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_STALL_INFLIGHT_MAX" block=TCP event=51 descr="Total utcl1 stalls due to inflight counter saturation"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_STALL_LRU_INFLIGHT" block=TCP event=52 descr="Total utcl1 stalls due to LRU cache line with traffic inflight"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_STALL_MULTI_MISS" block=TCP event=53 descr="Total utcl1 stalls due to arbitrated multiple misses"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_LFIFO_FULL" block=TCP event=54 descr="Total utcl1 utcl2 latency hiding fifo full cycles"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_STALL_LFIFO_NOT_RES" block=TCP event=55 descr="Total utcl1 stalls due to utcl2 latency hiding fifo output not resident"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_STALL_UTCL2_REQ_OUT_OF_CREDITS" block=TCP event=56 descr="Total utcl1 stalls due to utcl2_req out of credits"
-  ></metric>
-  <metric
-    name="TCP_CLIENT_UTCL1_INFLIGHT" block=TCP event=57 descr="The sum of inflight client to UTCL1 requests per cycle"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_UTCL2_INFLIGHT" block=TCP event=58 descr="The sum of inflight UTCL1_UTCL2 requests per cycle"
-  ></metric>
-  <metric
-    name="TCP_UTCL1_STALL_MISSFIFO_FULL" block=TCP event=59 descr="Total utcl1 stalls due to full miss fifo"
-  ></metric>
-  <metric
-    name="TCP_TOTAL_CACHE_ACCESSES" block=TCP event=60 descr="Count of total cache line (tag) accesses (includes hits and misses)."
-  ></metric>
-  <metric
-    name="TCP_TAGRAM0_REQ" block=TCP event=61 descr="Total L2 requests that mapped to tagram 0 from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TAGRAM1_REQ" block=TCP event=62 descr="Total L2 requests that mapped to tagram 1 from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TAGRAM2_REQ" block=TCP event=63 descr="Total L2 requests that mapped to tagram 2 from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TAGRAM3_REQ" block=TCP event=64 descr="Total L2 requests that mapped to tagram 3 from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCP_LATENCY" block=TCP event=65 descr="Total TCP wave latency (from first clock of wave entering to first clock of wave leaving), divide by TA_TCP_STATE_READ to avg wave latency"
-  ></metric>
-  <metric
-    name="TCP_TCC_READ_REQ_LATENCY" block=TCP event=66 descr="Total TCP->TCC request latency for reads and atomics with return. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_TCC_WRITE_REQ_LATENCY" block=TCP event=67 descr="Total TCP->TCC request latency for writes and atomics without return. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_TCC_WRITE_REQ_HOLE_LATENCY" block=TCP event=68 descr="Total TCP req ->TCC hole latency for writes and atomics. Not Windowed."
-  ></metric>
-  <metric
-    name="TCP_TCC_READ_REQ" block=TCP event=69 descr="Total read requests from TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_WRITE_REQ" block=TCP event=70 descr="Total write requests from TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_ATOMIC_WITH_RET_REQ" block=TCP event=71 descr="Total atomic with return requests from TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_ATOMIC_WITHOUT_RET_REQ" block=TCP event=72 descr="Total atomic without return requests from TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_LRU_REQ" block=TCP event=73 descr="Total requests with LRU L2 policy from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_STREAM_REQ" block=TCP event=74 descr="Total requests with STREAM L2 policy from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_NC_READ_REQ" block=TCP event=75 descr="Total read requests with NC mtype from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_NC_WRITE_REQ" block=TCP event=76 descr="Total write requests with NC mtype from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_NC_ATOMIC_REQ" block=TCP event=77 descr="Total atomic requests with NC mtype from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_UC_READ_REQ" block=TCP event=78 descr="Total read requests with UC mtype from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_UC_WRITE_REQ" block=TCP event=79 descr="Total write requests with UC mtype from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_UC_ATOMIC_REQ" block=TCP event=80 descr="Total atomic requests with UC mtype from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_CC_READ_REQ" block=TCP event=81 descr="Total write requests with CC mtype from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_CC_WRITE_REQ" block=TCP event=82 descr="Total write requests with CC mtype from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_CC_ATOMIC_REQ" block=TCP event=83 descr="Total atomic requests with CC mtype from this TCP to all TCCs"
-  ></metric>
-  <metric
-    name="TCP_TCC_DCC_REQ" block=TCP event=84 descr="Total DCC requests from this TCP to all TCCs"
-  ></metric>
-  # TD counters
-  <metric
-    name="TD_NONE" block=TD event=0 descr="Won't count anything."
-  ></metric>
-  <metric
-    name="TD_TD_BUSY" block=TD event=1 descr="TD is processing or waiting for data. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TD_INPUT_BUSY" block=TD event=2 descr="TD input subblock is busy or waiting for data. This means the instruction, state or TC data fifos may not be empty or the TD is processing a wave. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TD_OUTPUT_BUSY" block=TD event=3 descr="TD output subblock is busy or waiting for data. This means the TD's output pipeline (accumulation, data swizzle, data packing) could be processing pixel data. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TD_LERP_BUSY" block=TD event=4 descr="TD filter block is busy, which means any of the four lerps has pixel data flowing down its pipeline (blend, accumulation, format). Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TD_REG_SCLK_VLD" block=TD event=5 descr="Clock gate enable for GRBM register reads & writes. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TD_LOCAL_CG_DYN_SCLK_GRP0_EN" block=TD event=6 descr="Clock gate enable for group0 - non-harvestable always_on domain. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TD_LOCAL_CG_DYN_SCLK_GRP1_EN" block=TD event=7 descr="Clock gate enable for group1 - harvestable texture logic domain. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TD_LOCAL_CG_DYN_SCLK_GRP4_EN" block=TD event=8 descr="Clock gate enable for group4 - non-harvestable GDS chain domain. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TD_LOCAL_CG_DYN_SCLK_GRP5_EN" block=TD event=9 descr="Clock gate enable for group5 - non-harvestable texture boundary domain. Perf_Windowing not supported for this counter."
-  ></metric>
-  <metric
-    name="TD_TC_TD_FIFO_FULL" block=TD event=10 descr="TC_TD input FIFO is full. This counter could denote a stall in the TD pipeline, which could come from data cycling in the lerps or power throttling from the SMU."
-  ></metric>
-  <metric
-    name="TD_OUTPUT_FIFO_FULL" block=TD event=11 descr="TD output FIFO is full. This counter could denote a stall in the TD pipeline, possibly due to the GDS or PC/LDS."
-  ></metric>
-  <metric
-    name="TD_RESERVED_12" block=TD event=12 descr="RESERVED_12"
-  ></metric>
-  <metric
-    name="TD_RESERVED_13" block=TD event=13 descr="RESERVED_13"
-  ></metric>
-  <metric
-    name="TD_RESERVED_14" block=TD event=14 descr="RESERVED_14"
-  ></metric>
-  <metric
-    name="TD_TC_STALL" block=TD event=15 descr="TD is stalled waiting for TC data."
-  ></metric>
-  <metric
-    name="TD_PC_STALL" block=TD event=16 descr="TD is stalled by PC waiting to send LDS data."
-  ></metric>
-  <metric
-    name="TD_GDS_STALL" block=TD event=17 descr="TD is stalled by GDS data."
-  ></metric>
-  <metric
-    name="TD_RESERVED_18" block=TD event=18 descr="RESERVED_18"
-  ></metric>
-  <metric
-    name="TD_RESERVED_19" block=TD event=19 descr="RESERVED_19"
-  ></metric>
-  <metric
-    name="TD_GATHER4_WAVEFRONT" block=TD event=20 descr="Count the wavefronts with opcode = gather4, includes gather4_c."
-  ></metric>
-  <metric
-    name="TD_GATHER4H_WAVEFRONT" block=TD event=21 descr="Count the wavefronts with opcode = gather4h."
-  ></metric>
-  <metric
-    name="TD_GATHER4H_PACKED_WAVEFRONT" block=TD event=22 descr="Count the wavefronts with opcode = gather4h_packed."
-  ></metric>
-  <metric
-    name="TD_GATHER8H_PACKED_WAVEFRONT" block=TD event=23 descr="Count the wavefronts with opcode = gather8h_packed."
-  ></metric>
-  <metric
-    name="TD_SAMPLE_C_WAVEFRONT" block=TD event=24 descr="Count the wavefronts with opcode = sample_c, includes gather4_c."
-  ></metric>
-  <metric
-    name="TD_LOAD_WAVEFRONT" block=TD event=25 descr="Count the wavefronts with opcode = load, include atomics and store."
-  ></metric>
-  <metric
-    name="TD_ATOMIC_WAVEFRONT" block=TD event=26 descr="Count the wavefronts with opcode = atomic."
-  ></metric>
-  <metric
-    name="TD_STORE_WAVEFRONT" block=TD event=27 descr="Count the wavefronts with opcode = store."
-  ></metric>
-  <metric
-    name="TD_LDFPTR_WAVEFRONT" block=TD event=28 descr="Count the wavefronts with LDFPTR formats."
-  ></metric>
-  <metric
-    name="TD_D16_EN_WAVEFRONT" block=TD event=29 descr="Count the wavefronts that use d16 conversion"
-  ></metric>
-  <metric
-    name="TD_BYPASS_FILTER_WAVEFRONT" block=TD event=30 descr="Count the wavefronts that bypass the filter, includes bypass opcode or bypass formats."
-  ></metric>
-  <metric
-    name="TD_MIN_MAX_FILTER_WAVEFRONT" block=TD event=31 descr="Count the wavefronts that use min/max filtering."
-  ></metric>
-  <metric
-    name="TD_COALESCABLE_WAVEFRONT" block=TD event=32 descr="Count wavefronts that TA finds coalescable."
-  ></metric>
-  <metric
-    name="TD_COALESCED_PHASE" block=TD event=33 descr="Count up when each phase is coalesced, if all phases in a wavefront were coalesced the count will be 16."
-  ></metric>
-  <metric
-    name="TD_FOUR_PHASE_WAVEFRONT" block=TD event=34 descr="dmask=1,2,4,8, wavefront was packed into a 4 phase packet for SP."
-  ></metric>
-  <metric
-    name="TD_EIGHT_PHASE_WAVEFRONT" block=TD event=35 descr="dmask=3,5,6,9,a,c, wavefront was packed into an 8 phase packet for SP."
-  ></metric>
-  <metric
-    name="TD_SIXTEEN_PHASE_WAVEFRONT" block=TD event=36 descr="dmask=7,b,d,e,f, wavefront was forwarded to SP in 16 phases."
-  ></metric>
-  <metric
-    name="TD_FOUR_PHASE_FORWARD_WAVEFRONT" block=TD event=37 descr="Count the wavefronts that were forwarded to SP in 4 phases (coalescable)."
-  ></metric>
-  <metric
-    name="TD_WRITE_ACK_WAVEFRONT" block=TD event=38 descr="Count write acknowledgments, sent to SQ and not to SP."
-  ></metric>
-  <metric
-    name="TD_RESERVED_39" block=TD event=39 descr="RESERVED_39"
-  ></metric>
-  <metric
-    name="TD_USER_DEFINED_BORDER" block=TD event=40 descr="Count the wavefronts that user defined border color was used."
-  ></metric>
-  <metric
-    name="TD_WHITE_BORDER" block=TD event=41 descr="Count the wavefronts that white border color was used."
-  ></metric>
-  <metric
-    name="TD_OPAQUE_BLACK_BORDER" block=TD event=42 descr="Count the wavefronts that opaque black border color was used."
-  ></metric>
-  <metric
-    name="TD_RESERVED_43" block=TD event=43 descr="RESERVED_43"
-  ></metric>
-  <metric
-    name="TD_RESERVED_44" block=TD event=44 descr="RESERVED_44"
-  ></metric>
-  <metric
-    name="TD_NACK" block=TD event=45 descr="Count the number of times an nack packet was generated and sent to SP/SQ."
-  ></metric>
-  <metric
-    name="TD_TD_SP_TRAFFIC" block=TD event=46 descr="Count the number of times this TD sends data to the SP."
-  ></metric>
-  <metric
-    name="TD_CONSUME_GDS_TRAFFIC" block=TD event=47 descr="Count the number of times GDS data was consumed by this TD, send to SP."
-  ></metric>
-  <metric
-    name="TD_ADDRESSCMD_POISON" block=TD event=48 descr="Count the wavefronts that had poisoned address or command."
-  ></metric>
-  <metric
-    name="TD_DATA_POISON" block=TD event=49 descr="Count the wavefronts that had poisoned data."
-  ></metric>
-  <metric
-    name="TD_START_CYCLE_0" block=TD event=50 descr="Count the number of times there was a phase change in a wave and the starting cycle was 0. Starting cycle denotes how fast the TD can process the incoming sample (0 is fastest, 3 is slowest)."
-  ></metric>
-  <metric
-    name="TD_START_CYCLE_1" block=TD event=51 descr="Count the number of times there was a phase change in a wave and the starting cycle was 1. Starting cycle denotes how fast the TD can process the incoming sample (0 is fastest, 3 is slowest)."
-  ></metric>
-  <metric
-    name="TD_START_CYCLE_2" block=TD event=52 descr="Count the number of times there was a phase change in a wave and the starting cycle was 2. Starting cycle denotes how fast the TD can process the incoming sample (0 is fastest, 3 is slowest)."
-  ></metric>
-  <metric
-    name="TD_START_CYCLE_3" block=TD event=53 descr="Count the number of times there was a phase change in a wave and the starting cycle was 3. Starting cycle denotes how fast the TD can process the incoming sample (0 is fastest, 3 is slowest)."
-  ></metric>
-  <metric
-    name="TD_NULL_CYCLE_OUTPUT" block=TD event=54 descr="Count the number of times that null cycles had occured at the output stage"
-  ></metric>
-  <metric
-    name="TD_D16_DATA_PACKED" block=TD event=55 descr="Count the number of times the TD packs 2 sets of d16 data into 1 32-bit container"
-  ></metric>
-  <metric
-    name="TD_TEXELS_ZEROED_OUT_BY_BLEND_ZERO_PRT" block=TD event=56 descr="Count the number of times a texel was zeroed out due to the blend zero prt feature"
-  ></metric>
-  # GRBM_SE counters
-  <metric
-    name="GRBM_SE_COUNT" block=GRBM_SE event=0 descr="Tie High - Count Number of Clocks"
-  ></metric>
-  <metric
-    name="GRBM_SE_USER_DEFINED" block=GRBM_SE event=1 descr="User defined performance select."
-  ></metric>
-  <metric
-    name="GRBM_SE_CB_BUSY" block=GRBM_SE event=2 descr="Any of the Color Blocks (CB) are busy in shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_DB_BUSY" block=GRBM_SE event=3 descr="Any of the Depth Blocks (DB) are busy in shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_SC_BUSY" block=GRBM_SE event=4 descr="Any of the Scan Converter Blocks (SC) are busy in shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_RESERVED_1" block=GRBM_SE event=5 descr="Reserved to maintain backwards compatibility."
-  ></metric>
-  <metric
-    name="GRBM_SE_SPI_BUSY" block=GRBM_SE event=6 descr="Any of the Shader Pipe Interpolators (SPI) are busy in shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_SX_BUSY" block=GRBM_SE event=7 descr="Any of the Shader Export Blocks (SX) are busy for shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_TA_BUSY" block=GRBM_SE event=8 descr="Any of the Texture Pipes (TA) are busy in shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_CB_CLEAN" block=GRBM_SE event=9 descr="Any of the Color Blocks (CB) are not clean in shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_DB_CLEAN" block=GRBM_SE event=10 descr="Any of the Depth Blocks (DB) are not clean in shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_RESERVED_0" block=GRBM_SE event=11 descr="Reserved to maintain backwards compatibility."
-  ></metric>
-  <metric
-    name="GRBM_SE_PA_BUSY" block=GRBM_SE event=12 descr="The Primitive Assembly Block (PA) is busy in shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_VGT_BUSY" block=GRBM_SE event=13 descr="The Vertex Geometry Tessellator Block (VGT) is busy in shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_BCI_BUSY" block=GRBM_SE event=14 descr="Any of the Barycentric Interpolators (BCI) are busy in shader engine 0."
-  ></metric>
-  <metric
-    name="GRBM_SE_RMI_BUSY" block=GRBM_SE event=15 descr="Any of the Render Backend Memory Interface (RMI) are busy in shader engine 0."
-  ></metric>
-  # SDMA counters
-  <metric
-    name="SDMA_CYCLE" block=SDMA event=0 descr="Cycle count"
-  ></metric>
-  <metric
-    name="SDMA_IDLE" block=SDMA event=1 descr="Cycle count of SDMA idle"
-  ></metric>
-  <metric
-    name="SDMA_REG_IDLE" block=SDMA event=2 descr="Cycle count of register unit idle"
-  ></metric>
-  <metric
-    name="SDMA_RB_EMPTY" block=SDMA event=3 descr="Cycle count of ring buffer empty"
-  ></metric>
-  <metric
-    name="SDMA_RB_FULL" block=SDMA event=4 descr="Cycle count of ring buffer full"
-  ></metric>
-  <metric
-    name="SDMA_RB_WPTR_WRAP" block=SDMA event=5 descr="Number of ring buffer write pointer wraps"
-  ></metric>
-  <metric
-    name="SDMA_RB_RPTR_WRAP" block=SDMA event=6 descr="Number of ring buffer read pointer wraps"
-  ></metric>
-  <metric
-    name="SDMA_RB_WPTR_POLL_READ" block=SDMA event=7 descr="Number of ring buffer write pointer polling memory reads"
-  ></metric>
-  <metric
-    name="SDMA_RB_RPTR_WB" block=SDMA event=8 descr="Number of ring buffer read pointer writebacks"
-  ></metric>
-  <metric
-    name="SDMA_RB_CMD_IDLE" block=SDMA event=9 descr="Cycle count of ring command buffer unit idle"
-  ></metric>
-  <metric
-    name="SDMA_RB_CMD_FULL" block=SDMA event=10 descr="Cycle count of ring command packet buffer full"
-  ></metric>
-  <metric
-    name="SDMA_IB_CMD_IDLE" block=SDMA event=11 descr="Cycle count of indirect command packet buffer unit idle"
-  ></metric>
-  <metric
-    name="SDMA_IB_CMD_FULL" block=SDMA event=12 descr="Cycle count of indirect command packet buffer full"
-  ></metric>
-  <metric
-    name="SDMA_EX_IDLE" block=SDMA event=13 descr="Cycle count of execution unit idle"
-  ></metric>
-  <metric
-    name="SDMA_SRBM_REG_SEND" block=SDMA event=14 descr=""
-  ></metric>
-  <metric
-    name="SDMA_EX_IDLE_POLL_TIMER_EXPIRE" block=SDMA event=15 descr="Cycle count of poll on idle timer expire"
-  ></metric>
-  <metric
-    name="SDMA_MC_WR_IDLE" block=SDMA event=16 descr="Cycle count of memory write unit idle"
-  ></metric>
-  <metric
-    name="SDMA_MC_WR_COUNT" block=SDMA event=17 descr="Number of memory write requests issued"
-  ></metric>
-  <metric
-    name="SDMA_MC_RD_IDLE" block=SDMA event=18 descr="Cycle count of memory read unit idle"
-  ></metric>
-  <metric
-    name="SDMA_MC_RD_COUNT" block=SDMA event=19 descr="Number of memory read requests issued"
-  ></metric>
-  <metric
-    name="SDMA_MC_RD_RET_STALL" block=SDMA event=20 descr="Cycle count of read request stalled by MC pending return data"
-  ></metric>
-  <metric
-    name="SDMA_MC_RD_NO_POLL_IDLE" block=SDMA event=21 descr="Cycle count of memory read unit idle excluding WPTR poll-on-idle activity"
-  ></metric>
-  <metric
-    name="SDMA_DRM_IDLE" block=SDMA event=22 descr="Cycle count of drm interface unit idle"
-  ></metric>
-  <metric
-    name="SDMA_DRM_REQ_STALL" block=SDMA event=23 descr="Cycle count of drm clientport request stalled by DRM"
-  ></metric>
-  <metric
-    name="SDMA_SEM_IDLE" block=SDMA event=24 descr="Cycle count of sem interface unit idle"
-  ></metric>
-  <metric
-    name="SDMA_SEM_REQ_STALL" block=SDMA event=25 descr="Cycle count of sem request stalled by SEM"
-  ></metric>
-  <metric
-    name="SDMA_SEM_REQ_COUNT" block=SDMA event=26 descr="Number of sem requests issued"
-  ></metric>
-  <metric
-    name="SDMA_SEM_RESP_INCOMPLETE" block=SDMA event=27 descr="Number of sem response with status incomplete"
-  ></metric>
-  <metric
-    name="SDMA_SEM_RESP_FAIL" block=SDMA event=28 descr="Number of sem response with status fail"
-  ></metric>
-  <metric
-    name="SDMA_SEM_RESP_PASS" block=SDMA event=29 descr="Number of sem response with status pass"
-  ></metric>
-  <metric
-    name="SDMA_INT_IDLE" block=SDMA event=30 descr="Cycle count of interrupt interface unit idle"
-  ></metric>
-  <metric
-    name="SDMA_INT_REQ_STALL" block=SDMA event=31 descr="Cycle count of interrupt request stalled by IH/RLC"
-  ></metric>
-  <metric
-    name="SDMA_INT_REQ_COUNT" block=SDMA event=32 descr="Number of interrupt requests issued"
-  ></metric>
-  <metric
-    name="SDMA_INT_RESP_ACCEPTED" block=SDMA event=33 descr="Number of interrupt response with status accepted"
-  ></metric>
-  <metric
-    name="SDMA_INT_RESP_RETRY" block=SDMA event=34 descr="Number of interrupt response with status retry"
-  ></metric>
-  <metric
-    name="SDMA_NUM_PACKET" block=SDMA event=35 descr="Number of packets processed in command parser"
-  ></metric>
-  <metric
-    name="SDMA_DRM1_REQ_STALL" block=SDMA event=36 descr="Cycle count of drm1 clientport request stalled by DRM"
-  ></metric>
-  <metric
-    name="SDMA_CE_WREQ_IDLE" block=SDMA event=37 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_WR_IDLE" block=SDMA event=38 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_SPLIT_IDLE" block=SDMA event=39 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_RREQ_IDLE" block=SDMA event=40 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_OUT_IDLE" block=SDMA event=41 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_IN_IDLE" block=SDMA event=42 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_DST_IDLE" block=SDMA event=43 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_DRM_IDLE" block=SDMA event=44 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_DRM1_IDLE" block=SDMA event=45 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_AFIFO_FULL" block=SDMA event=46 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_DRM_FULL" block=SDMA event=47 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_DRM1_FULL" block=SDMA event=48 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_INFO_FULL" block=SDMA event=49 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_INFO1_FULL" block=SDMA event=50 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_RD_STALL" block=SDMA event=51 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CE_WR_STALL" block=SDMA event=52 descr=""
-  ></metric>
-  <metric
-    name="SDMA_GFX_SELECT" block=SDMA event=53 descr=""
-  ></metric>
-  <metric
-    name="SDMA_RLC0_SELECT" block=SDMA event=54 descr=""
-  ></metric>
-  <metric
-    name="SDMA_RLC1_SELECT" block=SDMA event=55 descr=""
-  ></metric>
-  <metric
-    name="SDMA_PAGE_SELECT" block=SDMA event=56 descr=""
-  ></metric>
-  <metric
-    name="SDMA_CTX_CHANGE" block=SDMA event=57 descr="Time of auto ctx switch"
-  ></metric>
-  <metric
-    name="SDMA_CTX_CHANGE_EXPIRED" block=SDMA event=58 descr="Time of auto ctx switch due to time quantum reached"
-  ></metric>
-  <metric
-    name="SDMA_CTX_CHANGE_EXCEPTION" block=SDMA event=59 descr="Time of auto ctx switch due to exception"
-  ></metric>
-  <metric
-    name="SDMA_DOORBELL" block=SDMA event=60 descr="Time of gfx and rlc0 and rlc1 wptr updated by doorbell"
-  ></metric>
-  <metric
-    name="SDMA_RD_BA_RTR" block=SDMA event=61 descr="read bandwidth agitator indication"
-  ></metric>
-  <metric
-    name="SDMA_WR_BA_RTR" block=SDMA event=62 descr="write bandwidth agitator indication"
-  ></metric>
-  <metric
-    name="SDMA_F32_L1_WR_VLD" block=SDMA event=63 descr="F32 write data valid"
-  ></metric>
-  <metric
-    name="SDMA_CE_L1_WR_VLD" block=SDMA event=64 descr="CE write data valid to L1"
-  ></metric>
-  <metric
-    name="SDMA_CE_L1_STALL" block=SDMA event=65 descr="Read stall from CE to L1"
-  ></metric>
-  <metric
-    name="SDMA_SDMA_INVACK_NFLUSH" block=SDMA event=66 descr="Non-flushtype invalid ack from SDMA to ATCL2"
-  ></metric>
-  <metric
-    name="SDMA_SDMA_INVACK_FLUSH" block=SDMA event=67 descr="Flushtype invalid ack from SDMA to ATCL2"
-  ></metric>
-  <metric
-    name="SDMA_ATCL2_INVREQ_NFLUSH" block=SDMA event=68 descr="Non-flushtype invalid request from ATCL2 to SDMA"
-  ></metric>
-  <metric
-    name="SDMA_ATCL2_INVREQ_FLUSH" block=SDMA event=69 descr="Flushtype invalid request from ATCL2 to SDMA"
-  ></metric>
-  <metric
-    name="SDMA_ATCL2_RET_XNACK" block=SDMA event=70 descr="ATCL2 return non-zero XNACK"
-  ></metric>
-  <metric
-    name="SDMA_ATCL2_RET_ACK" block=SDMA event=71 descr="ATCL2 return zero XNACK"
-  ></metric>
-  <metric
-    name="SDMA_ATCL2_FREE" block=SDMA event=72 descr="ATCL2 return free to SDMA_L1"
-  ></metric>
-  <metric
-    name="SDMA_SDMA_ATCL2_SEND" block=SDMA event=73 descr="SDMA send page request to ATCL2"
-  ></metric>
-  <metric
-    name="SDMA_DMA_L1_WR_SEND" block=SDMA event=74 descr="Internal write request to L1"
-  ></metric>
-  <metric
-    name="SDMA_DMA_L1_RD_SEND" block=SDMA event=75 descr="Internal read request to L1"
-  ></metric>
-  <metric
-    name="SDMA_DMA_MC_WR_SEND" block=SDMA event=76 descr="L1 send write request to MC"
-  ></metric>
-  <metric
-    name="SDMA_DMA_MC_RD_SEND" block=SDMA event=77 descr="L2 send read request to MC"
-  ></metric>
-  <metric
-    name="SDMA_L1_WR_FIFO_IDLE" block=SDMA event=78 descr="L1 internal write FIFO empty"
-  ></metric>
-  <metric
-    name="SDMA_L1_RD_FIFO_IDLE" block=SDMA event=79 descr="L1 internal read FIFO empty"
-  ></metric>
-  <metric
-    name="SDMA_L1_WRL2_IDLE" block=SDMA event=80 descr="All write page requests to L2 are returned"
-  ></metric>
-  <metric
-    name="SDMA_L1_RDL2_IDLE" block=SDMA event=81 descr="All read page requests to L2 are returned"
-  ></metric>
-  <metric
-    name="SDMA_L1_WRMC_IDLE" block=SDMA event=82 descr="All write data requests to MC are returned"
-  ></metric>
-  <metric
-    name="SDMA_L1_RDMC_IDLE" block=SDMA event=83 descr="All read data requests to MC are returned"
-  ></metric>
-  <metric
-    name="SDMA_L1_WR_INV_IDLE" block=SDMA event=84 descr="Write client invalidation idle"
-  ></metric>
-  <metric
-    name="SDMA_L1_RD_INV_IDLE" block=SDMA event=85 descr="Read client invalidation idle"
-  ></metric>
-  <metric
-    name="SDMA_L1_WR_INV_EN" block=SDMA event=86 descr="Write client is in invalidation process"
-  ></metric>
-  <metric
-    name="SDMA_L1_RD_INV_EN" block=SDMA event=87 descr="Read client is in invalidation process"
-  ></metric>
-  <metric
-    name="SDMA_L1_WR_WAIT_INVADR" block=SDMA event=88 descr="Write client is waiting for invalidated page address"
-  ></metric>
-  <metric
-    name="SDMA_L1_RD_WAIT_INVADR" block=SDMA event=89 descr="Read client is waiting for invalidated page address"
-  ></metric>
-  <metric
-    name="SDMA_IS_INVREQ_ADDR_WR" block=SDMA event=90 descr="Write client is using the returned page address which is invalidated"
-  ></metric>
-  <metric
-    name="SDMA_IS_INVREQ_ADDR_RD" block=SDMA event=91 descr="Read client is using the returned page address which is invalidated"
-  ></metric>
-  <metric
-    name="SDMA_L1_WR_XNACK_TIMEOUT" block=SDMA event=92 descr="Write client received continuous xnacks which reaches the limit"
-  ></metric>
-  <metric
-    name="SDMA_L1_RD_XNACK_TIMEOUT" block=SDMA event=93 descr="Read client received continuous xnacks which reaches the limit"
-  ></metric>
-  <metric
-    name="SDMA_L1_INV_MIDDLE" block=SDMA event=94 descr="Invalidation happens for one page when one client is using that page and the other client is waiting for that page"
-  ></metric>
-  <metric
-    name="SDMA_UTCL1_TAG_DELAY_COUNTER" block=SDMA event=95 descr="Counts UTCL1 request latency between request sent and all return back."
-  ></metric>
-  <metric
-    name="SDMA_MMHUB_TAG_DELAY_COUNTER" block=SDMA event=96 descr="Counts MC read/write latency between request sent and all return back. This is the default"
-  ></metric>
-  # ATCL2 counters
-  <metric
-    name="ATCL2_NUMBER_OF_L1_REQUESTS" block=ATCL2 event=1 descr="number of L1 requests"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_BANK0_REQUESTS" block=ATCL2 event=2 descr="number of bank0 requests"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_BANK0_HITS" block=ATCL2 event=3 descr="number of bank0 hits"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_BANK0_MISSES" block=ATCL2 event=4 descr="number of bank0 misses"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_ATS_REQUESTS" block=ATCL2 event=5 descr="number of ATS Requests"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_ATS_RESPONSES" block=ATCL2 event=6 descr="number of ATS Responses"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_INVALIDATE_REQUEST" block=ATCL2 event=7 descr="number of invalidate request"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_FLUSHTYPE_INVALIDATE_REQUEST" block=ATCL2 event=8 descr="number of flushtype invalidate request"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_L1_RT_CACHE_REQUESTS" block=ATCL2 event=9 descr="number of L1 RT cache requests"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_RT_CACHE_BANK0_REQUESTS" block=ATCL2 event=10 descr="number of RT cache bank0 requests"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_RT_CACHE_BANK0_HITS" block=ATCL2 event=11 descr="number of RT cache bank0 hits"
-  ></metric>
-  <metric
-    name="ATCL2_NUMBER_OF_RT_CACHE_BANK0_MISSES" block=ATCL2 event=12 descr="number of RT cache bank0 misses"
-  ></metric>
-  # MCVML2 counters
-  <metric
-    name="MCVML2_BANK0_PTE_CACHE_BIGK0_REQUEST" block=MCVML2 event=1 descr="bank0 pte cache bigk0 request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_PTE_CACHE_BIGK0_HIT" block=MCVML2 event=2 descr="bank0 pte cache bigk0 hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_PTE_CACHE_BIGK0_MISS" block=MCVML2 event=3 descr="bank0 pte cache bigk0 miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_PTE_CACHE_BIGK0_UPDATE" block=MCVML2 event=4 descr="bank0 pte cache bigk0 update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_PTE_CACHE_4K0_REQUEST" block=MCVML2 event=5 descr="bank0 pte cache 4k0 request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_PTE_CACHE_4K0_HIT" block=MCVML2 event=6 descr="bank0 pte cache 4k0 hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_PTE_CACHE_4K0_MISS" block=MCVML2 event=7 descr="bank0 pte cache 4k0 miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_PTE_CACHE_4K0_UPDATE" block=MCVML2 event=8 descr="bank0 pte cache 4k0 update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_AGGREGATE_REQUEST" block=MCVML2 event=9 descr="bank0 aggregate request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_AGGREGATE_HIT" block=MCVML2 event=10 descr="bank0 aggregate hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_AGGREGATE_MISS" block=MCVML2 event=11 descr="bank0 aggregate miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK0_AGGREGATE_UPDATE" block=MCVML2 event=12 descr="bank0 aggregate update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_PTE_CACHE_BIGK0_REQUEST" block=MCVML2 event=13 descr="bank1 pte cache bigk0 request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_PTE_CACHE_BIGK0_HIT" block=MCVML2 event=14 descr="bank1 pte cache bigk0 hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_PTE_CACHE_BIGK0_MISS" block=MCVML2 event=15 descr="bank1 pte cache bigk0 miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_PTE_CACHE_BIGK0_UPDATE" block=MCVML2 event=16 descr="bank1 pte cache bigk0 update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_PTE_CACHE_4K0_REQUEST" block=MCVML2 event=17 descr="bank1 pte cache 4k0 request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_PTE_CACHE_4K0_HIT" block=MCVML2 event=18 descr="bank1 pte cache 4k0 hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_PTE_CACHE_4K0_MISS" block=MCVML2 event=19 descr="bank1 pte cache 4k0 miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_PTE_CACHE_4K0_UPDATE" block=MCVML2 event=20 descr="bank1 pte cache 4k0 update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_AGGREGATE_REQUEST" block=MCVML2 event=21 descr="bank1 aggregate request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_AGGREGATE_HIT" block=MCVML2 event=22 descr="bank1 aggregate hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_AGGREGATE_MISS" block=MCVML2 event=23 descr="bank1 aggregate miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK1_AGGREGATE_UPDATE" block=MCVML2 event=24 descr="bank1 aggregate update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_PTE_CACHE_BIGK0_REQUEST" block=MCVML2 event=25 descr="bank2 pte cache bigk0 request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_PTE_CACHE_BIGK0_HIT" block=MCVML2 event=26 descr="bank2 pte cache bigk0 hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_PTE_CACHE_BIGK0_MISS" block=MCVML2 event=27 descr="bank2 pte cache bigk0 miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_PTE_CACHE_BIGK0_UPDATE" block=MCVML2 event=28 descr="bank2 pte cache bigk0 update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_PTE_CACHE_4K0_REQUEST" block=MCVML2 event=29 descr="bank2 pte cache 4k0 request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_PTE_CACHE_4K0_HIT" block=MCVML2 event=30 descr="bank2 pte cache 4k0 hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_PTE_CACHE_4K0_MISS" block=MCVML2 event=31 descr="bank2 pte cache 4k0 miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_PTE_CACHE_4K0_UPDATE" block=MCVML2 event=32 descr="bank2 pte cache 4k0 update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_AGGREGATE_REQUEST" block=MCVML2 event=33 descr="bank2 aggregate request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_AGGREGATE_HIT" block=MCVML2 event=34 descr="bank2 aggregate hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_AGGREGATE_MISS" block=MCVML2 event=35 descr="bank2 aggregate miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK2_AGGREGATE_UPDATE" block=MCVML2 event=36 descr="bank2 aggregate update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_PTE_CACHE_BIGK0_REQUEST" block=MCVML2 event=37 descr="bank3 pte cache bigk0 request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_PTE_CACHE_BIGK0_HIT" block=MCVML2 event=38 descr="bank3 pte cache bigk0 hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_PTE_CACHE_BIGK0_MISS" block=MCVML2 event=39 descr="bank3 pte cache bigk0 miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_PTE_CACHE_BIGK0_UPDATE" block=MCVML2 event=40 descr="bank3 pte cache bigk0 update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_PTE_CACHE_4K0_REQUEST" block=MCVML2 event=41 descr="bank3 pte cache 4k0 request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_PTE_CACHE_4K0_HIT" block=MCVML2 event=42 descr="bank3 pte cache 4k0 hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_PTE_CACHE_4K0_MISS" block=MCVML2 event=43 descr="bank3 pte cache 4k0 miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_PTE_CACHE_4K0_UPDATE" block=MCVML2 event=44 descr="bank3 pte cache 4k0 update"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_AGGREGATE_REQUEST" block=MCVML2 event=45 descr="bank3 aggregate request"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_AGGREGATE_HIT" block=MCVML2 event=46 descr="bank3 aggregate hit"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_AGGREGATE_MISS" block=MCVML2 event=47 descr="bank3 aggregate miss"
-  ></metric>
-  <metric
-    name="MCVML2_BANK3_AGGREGATE_UPDATE" block=MCVML2 event=48 descr="bank3 aggregate update"
-  ></metric>
-  <metric
-    name="MCVML2_RETRY" block=MCVML2 event=49 descr="retry"
-  ></metric>
-  <metric
-    name="MCVML2_NO_RETRY" block=MCVML2 event=50 descr="no retry"
-  ></metric>
-  <metric
-    name="MCVML2_INTERRUPT" block=MCVML2 event=51 descr="interrupt"
-  ></metric>
-  <metric
-    name="MCVML2_PDE0_CACHE_REQUEST" block=MCVML2 event=52 descr="pde0 cache request"
-  ></metric>
-  <metric
-    name="MCVML2_PDE0_CACHE_HIT" block=MCVML2 event=53 descr="pde0 cache hit"
-  ></metric>
-  <metric
-    name="MCVML2_PDE0_CACHE_MISS" block=MCVML2 event=54 descr="pde0 cache miss"
-  ></metric>
-  <metric
-    name="MCVML2_PDE0_CACHE_UPDATE" block=MCVML2 event=55 descr="pde0 cache update"
-  ></metric>
-  <metric
-    name="MCVML2_PDE0_CACHE_PTE" block=MCVML2 event=56 descr="pde0 cache pte"
-  ></metric>
-  <metric
-    name="MCVML2_PDE1_CACHE_REQUEST" block=MCVML2 event=57 descr="pde1 cache request"
-  ></metric>
-  <metric
-    name="MCVML2_PDE1_CACHE_HIT" block=MCVML2 event=58 descr="pde1 cache hit"
-  ></metric>
-  <metric
-    name="MCVML2_PDE1_CACHE_MISS" block=MCVML2 event=59 descr="pde1 cache miss"
-  ></metric>
-  <metric
-    name="MCVML2_PDE1_CACHE_UPDATE" block=MCVML2 event=60 descr="pde1 cache update"
-  ></metric>
-  <metric
-    name="MCVML2_PDE1_CACHE_PTE" block=MCVML2 event=61 descr="pde1 cache pte"
-  ></metric>
-  <metric
-    name="MCVML2_PDE2_CACHE_REQUEST" block=MCVML2 event=62 descr="pde2 cache request"
-  ></metric>
-  <metric
-    name="MCVML2_PDE2_CACHE_HIT" block=MCVML2 event=63 descr="pde2 cache hit"
-  ></metric>
-  <metric
-    name="MCVML2_PDE2_CACHE_MISS" block=MCVML2 event=64 descr="pde2 cache miss"
-  ></metric>
-  <metric
-    name="MCVML2_PDE2_CACHE_UPDATE" block=MCVML2 event=65 descr="pde2 cache update"
-  ></metric>
-  <metric
-    name="MCVML2_PDE2_CACHE_PTE" block=MCVML2 event=66 descr="pde2 cache pte"
-  ></metric>
-  <metric
-    name="MCVML2_LOG_INVAL" block=MCVML2 event=67 descr="log inval"
-  ></metric>
-  <metric
-    name="MCVML2_LOG_TRANS" block=MCVML2 event=68 descr="log trans"
-  ></metric>
-  <metric
-    name="MCVML2_LOG_TRANS_SKIPPED" block=MCVML2 event=69 descr="log trans skipped"
-  ></metric>
-  <metric
-    name="MCVML2_RDIF_REQUEST_PHYSICAL_SYSTEM" block=MCVML2 event=70 descr="rdif request physical system"
-  ></metric>
-  <metric
-    name="MCVML2_RDIF_REQUEST_PHYSICAL_SYSTEM_START_LATENCY" block=MCVML2 event=71 descr="rdif request physical system start (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_RDIF_REQUEST_PHYSICAL_SYSTEM_STOP_LATENCY" block=MCVML2 event=72 descr="rdif request physical system stop (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_RDIF_REQUEST_OTHER" block=MCVML2 event=73 descr="rdif request other"
-  ></metric>
-  <metric
-    name="MCVML2_RDIF_REQUEST_OTHER_START_LATENCY" block=MCVML2 event=74 descr="rdif request other start (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_RDIF_REQUEST_OTHER_STOP_LATENCY" block=MCVML2 event=75 descr="rdif request other stop (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_QOS_REQUEST" block=MCVML2 event=76 descr="qos request"
-  ></metric>
-  <metric
-    name="MCVML2_QOS_HIT_FETCH_SKIPPED" block=MCVML2 event=77 descr="qos hit (fetch skipped)"
-  ></metric>
-  <metric
-    name="MCVML2_QOS_MISS_FETCH_ISSUED" block=MCVML2 event=78 descr="qos miss (fetch issued)"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL0_REQUEST" block=MCVML2 event=79 descr="level0 request"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL1_REQUEST" block=MCVML2 event=80 descr="level1 request"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL2_REQUEST" block=MCVML2 event=81 descr="level2 request"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL3_REQUEST" block=MCVML2 event=82 descr="level3 request"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL0_REQUEST_START_LATENCY" block=MCVML2 event=83 descr="level0 request start (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL0_REQUEST_STOP_LATENCY" block=MCVML2 event=84 descr="level0 request stop (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL1_REQUEST_START_LATENCY" block=MCVML2 event=85 descr="level1 request start (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL1_REQUEST_STOP_LATENCY" block=MCVML2 event=86 descr="level1 request stop (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL2_REQUEST_START_LATENCY" block=MCVML2 event=87 descr="level2 request start (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL2_REQUEST_STOP_LATENCY" block=MCVML2 event=88 descr="level2 request stop (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL3_REQUEST_START_LATENCY" block=MCVML2 event=89 descr="level3 request start (latency)"
-  ></metric>
-  <metric
-    name="MCVML2_LEVEL3_REQUEST_STOP_LATENCY" block=MCVML2 event=90 descr="level3 request stop (latency)"
-  ></metric>
-  # ATC counters
-  <metric
-    name="ATC_A_VALUE_OF_0_MEANS_COUNT_CYCLES_OTHERWISE_SELECTS" block=ATC event=0 descr="A value of 0 means count cycles otherwise selects event to count "
-  ></metric>
-  <metric
-    name="ATC_EVENT_START_FOR_STATISTICAL_MIN_SCLKS_FROM_ATC_RPB_REQ_TRANSLATION" block=ATC event=1 descr="event start for statistical min sclks from ATC_RPB_req translation request to RPB_ATC_ret completion"
-  ></metric>
-  <metric
-    name="ATC_EVENT_END_FOR_STATISTICAL_MIN_SCLKS_FROM_ATC_RPB_REQ_TRANSLATION" block=ATC event=2 descr="event end for statistical min sclks from ATC_RPB_req translation request to RPB_ATC_ret completion"
-  ></metric>
-  <metric
-    name="ATC_EVENT_START_FOR_STATISTICAL_MIN_SCLKS_FROM_ATC_RPB_REQ_PAGE" block=ATC event=3 descr="event start for statistical min sclks from ATC_RPB_req page request to RPB_ATC_ret page return"
-  ></metric>
-  <metric
-    name="ATC_EVENT_END_FOR_STATISTICAL_MIN_SCLKS_FROM_ATC_RPB_REQ_PAGE" block=ATC event=4 descr="event end for statistical min sclks from ATC_RPB_req page request to RPB_ATC_ret page return"
-  ></metric>
-  <metric
-    name="ATC_EVENT_START_FOR_STATISTICAL_MAX_SCLKS_FROM_ATC_RPB_REQ_TRANSLATION" block=ATC event=5 descr="event start for statistical max sclks from ATC_RPB_req translation request to RPB_ATC_ret completion"
-  ></metric>
-  <metric
-    name="ATC_EVENT_END_FOR_STATISTICAL_MAX_SCLKS_FROM_ATC_RPB_REQ_TRANSLATION" block=ATC event=6 descr="event end for statistical max sclks from ATC_RPB_req translation request to RPB_ATC_ret completion"
-  ></metric>
-  <metric
-    name="ATC_EVENT_START_FOR_STATISTICAL_MAX_SCLKS_FROM_ATC_RPB_REQ_PAGE" block=ATC event=7 descr="event start for statistical max sclks from ATC_RPB_req page request to RPB_ATC_ret page return"
-  ></metric>
-  <metric
-    name="ATC_EVENT_END_FOR_STATISTICAL_MAX_SCLKS_FROM_ATC_RPB_REQ_PAGE" block=ATC event=8 descr="event end for statistical max sclks from ATC_RPB_req page request to RPB_ATC_ret page return"
-  ></metric>
-  <metric
-    name="ATC_EVENT_START_FOR_MAX_SCLKS_FROM_ATS_L2_INVALIDATE_REQUEST" block=ATC event=9 descr="event start for max sclks from ATS_L2 invalidate request to L2_ATS invalidate ack"
-  ></metric>
-  <metric
-    name="ATC_EVENT_END_FOR_MAX_SCLKS_FROM_ATS_L2_INVALIDATE_REQUEST" block=ATC event=10 descr="event end for max sclks from ATS_L2 invalidate request to L2_ATS invalidate ack"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_REQUESTS_FROM_L2" block=ATC event=11 descr="number of requests from L2"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_FIRST_TIME_TRANS_SUCCESSES" block=ATC event=12 descr="number of first time trans successes"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_PRI_REQUESTS" block=ATC event=13 descr="number of pri requests"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_TRANS_FAILURES" block=ATC event=14 descr="number of trans failures"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_PRI_REQUESTS_NOT_SATISFIED" block=ATC event=15 descr="number of pri requests not satisfied"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_INVALIDATE_REQUESTS_W_PASID_TO_GET_A" block=ATC event=16 descr="number of invalidate requests w PASID to get a correct number"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_INVALIDATE_REQUESTS_W_OUT_PASID" block=ATC event=17 descr="number of invalidate requests w out PASID"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_PASID_CHANGES" block=ATC event=18 descr="number of PASID changes"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_TIMES_1_TRANSLATIONS_RETURNED" block=ATC event=19 descr="number of times 1 translations returned"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_TIMES_2_8_TRANSLATIONS_RETURNED_NOT_BLOCKED" block=ATC event=20 descr="number of times 2 8 translations returned not blocked by invalidations"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_TIMES_5_8_TRANSLATIONS_RETURNED_NOT_BLOCKED" block=ATC event=21 descr="number of times 5 8 translations returned not blocked by invalidations"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_TIMES_SIZE_BIT_WAS_SET_ON_NON" block=ATC event=22 descr="number of times size bit was set on non speculative transactions returned to L2 (>4K translation was returned)"
-  ></metric>
-  <metric
-    name="ATC_NUMBER_OF_INVALIDATE_REQUESTS_THAT_MATCHED_MULTIPLE_VMIDS_EVENT" block=ATC event=23 descr="number of invalidate requests that matched multiple vmids event"
-  ></metric>
-</gfx9>
diff --git a/src/perfmon_pub/metrics.xml b/src/perfmon_pub/metrics.xml
deleted file mode 100644
index 4871eaf3ac..0000000000
--- a/src/perfmon_pub/metrics.xml
+++ /dev/null
@@ -1,770 +0,0 @@
-#include "gfx906_metrics.xml"
-#include "gfx908_metrics.xml"
-#include "gfx90a_metrics.xml"
-
-<gfx8_expr>
-  <metric name="TA_BUSY_avr" expr=avr(TA_TA_BUSY,16) descr="TA block is busy. Average over TA instances."></metric>
-  <metric name="TA_BUSY_max" expr=max(TA_TA_BUSY,16) descr="TA block is busy. Max over TA instances."></metric>
-  <metric name="TA_BUSY_min" expr=min(TA_TA_BUSY,16) descr="TA block is busy. Min over TA instances."></metric>
-  <metric name="TA_FLAT_READ_WAVEFRONTS_sum" expr=sum(TA_FLAT_READ_WAVEFRONTS,16) descr="Number of flat opcode reads processed by the TA. Sum over TA instances."></metric>
-  <metric name="TA_FLAT_WRITE_WAVEFRONTS_sum" expr=sum(TA_FLAT_WRITE_WAVEFRONTS,16) descr="Number of flat opcode writes processed by the TA. Sum over TA instances."></metric>
-
-  <metric name="TCC_BUSY_avr" expr=avr(TCC_BUSY,16) descr="TCC_BUSY avr over all memory channels."></metric>
-  <metric name="TCC_REQ_sum" expr=sum(TCC_REQ,16) descr="TCC_REQ sum over all memory channels."></metric>
-  <metric name="TCC_HIT_sum" expr=sum(TCC_HIT,16) descr="Number of cache hits. Sum over TCC instances."></metric>
-  <metric name="TCC_MISS_sum" expr=sum(TCC_MISS,16) descr="Number of cache misses. Sum over TCC instances."></metric>
-  <metric name="TCC_MC_RDREQ_sum" expr=sum(TCC_MC_RDREQ,16) descr="Number of 32-byte reads. Sum over TCC instaces."></metric>
-  <metric name="TCC_MC_WRREQ_sum" expr=sum(TCC_MC_WRREQ,16) descr="Number of 32-byte transactions going over the TC_MC_wrreq interface. Sum over TCC instaces."></metric>
-  <metric name="TCC_WRREQ_STALL_max" expr=max(TCC_MC_WRREQ_STALL,16) descr="Number of cycles a write request was stalled. Max over TCC instances."></metric>
-
-  <metric name="FETCH_SIZE" expr=(TCC_MC_RDREQ_sum*32)/1024 descr="The total kilobytes fetched from the video memory. This is measured with all extra fetches and any cache or memory effects taken into account."></metric>
-  <metric name="WRITE_SIZE" expr=(TCC_MC_WRREQ_sum*32)/1024 descr="The total kilobytes written to the video memory. This is measured with all extra fetches and any cache or memory effects taken into account."></metric>
-  <metric name="WRITE_REQ_32B" expr=TCC_MC_WRREQ_sum descr="The total number of 32-byte effective memory writes."></metric>
-</gfx8_expr>
-
-<gfx9_expr>
-  <metric name="TA_BUSY_avr" expr=avr(TA_TA_BUSY,16) descr="TA block is busy. Average over TA instances."></metric>
-  <metric name="TA_BUSY_max" expr=max(TA_TA_BUSY,16) descr="TA block is busy. Max over TA instances."></metric>
-  <metric name="TA_BUSY_min" expr=min(TA_TA_BUSY,16) descr="TA block is busy. Min over TA instances."></metric>
-  <metric name="TA_FLAT_READ_WAVEFRONTS_sum" expr=sum(TA_FLAT_READ_WAVEFRONTS,16) descr="Number of flat opcode reads processed by the TA. Sum over TA instances."></metric>
-  <metric name="TA_FLAT_WRITE_WAVEFRONTS_sum" expr=sum(TA_FLAT_WRITE_WAVEFRONTS,16) descr="Number of flat opcode writes processed by the TA. Sum over TA instances."></metric>
-
-  <metric name="TCC_BUSY_avr" expr=avr(TCC_BUSY,16) descr="TCC_BUSY avr over all memory channels."></metric>
-  <metric name="TCC_REQ_sum" expr=sum(TCC_REQ,16) descr="TCC_REQ sum over all memory channels."></metric>
-  <metric name="TCC_HIT_sum" expr=sum(TCC_HIT,16) descr="Number of cache hits. Sum over TCC instances."></metric>
-  <metric name="TCC_MISS_sum" expr=sum(TCC_MISS,16) descr="Number of cache misses. Sum over TCC instances."></metric>
-  <metric name="TCC_EA_RDREQ_32B_sum" expr=sum(TCC_EA_RDREQ_32B,16) descr="Number of 32-byte TCC/EA read requests. Sum over TCC instances."></metric>
-  <metric name="TCC_EA_RDREQ_sum" expr=sum(TCC_EA_RDREQ,16) descr="Number of TCC/EA read requests (either 32-byte or 64-byte). Sum over TCC instances."></metric>
-  <metric name="TCC_EA_WRREQ_sum" expr=sum(TCC_EA_WRREQ,16) descr="Number of transactions (either 32-byte or 64-byte) going over the TC_EA_wrreq interface. Sum over TCC instances."></metric>
-  <metric name="TCC_EA_WRREQ_64B_sum" expr=sum(TCC_EA_WRREQ_64B,16) descr="Number of 64-byte transactions going (64-byte write or CMPSWAP) over the TC_EA_wrreq interface. Sum over TCC instances."></metric>
-  <metric name="TCC_WRREQ_STALL_max" expr=max(TCC_EA_WRREQ_STALL,16) descr="Number of cycles a write request was stalled. Max over TCC instances."></metric>
-
-  <metric name="FETCH_SIZE" expr=(TCC_EA_RDREQ_32B_sum*32+(TCC_EA_RDREQ_sum-TCC_EA_RDREQ_32B_sum)*64)/1024 descr="The total kilobytes fetched from the video memory. This is measured with all extra fetches and any cache or memory effects taken into account."></metric>
-  <metric name="WRITE_SIZE" expr=((TCC_EA_WRREQ_sum-TCC_EA_WRREQ_64B_sum)*32+TCC_EA_WRREQ_64B_sum*64)/1024 descr="The total kilobytes written to the video memory. This is measured with all extra fetches and any cache or memory effects taken into account."></metric>
-  <metric name="WRITE_REQ_32B" expr=TCC_EA_WRREQ_64B_sum*2+(TCC_EA_WRREQ_sum-TCC_EA_WRREQ_64B_sum) descr="The total number of 32-byte effective memory writes."></metric>
-
-
-
- #xlu - TA
-  <metric name="TA_TA_BUSY_sum"                                        expr=sum(TA_TA_BUSY,16) descr="."></metric>
-  <metric name="TA_SH_FIFO_BUSY_sum"                                   expr=sum(TA_SH_FIFO_BUSY,16) descr="."></metric>
-  <metric name="TA_SH_FIFO_CMD_BUSY_sum"                               expr=sum(TA_SH_FIFO_CMD_BUSY,16) descr="."></metric>
-  <metric name="TA_SH_FIFO_ADDR_BUSY_sum"                              expr=sum(TA_SH_FIFO_ADDR_BUSY,16) descr="."></metric>
-  <metric name="TA_SH_FIFO_DATA_BUSY_sum"                              expr=sum(TA_SH_FIFO_DATA_BUSY,16) descr="."></metric>
-  <metric name="TA_SH_FIFO_DATA_SFIFO_BUSY_sum"                        expr=sum(TA_SH_FIFO_DATA_SFIFO_BUSY,16) descr="."></metric>
-  <metric name="TA_SH_FIFO_DATA_TFIFO_BUSY_sum"                        expr=sum(TA_SH_FIFO_DATA_TFIFO_BUSY,16) descr="."></metric>
-  <metric name="TA_SQ_TA_CMD_CYCLES_sum"                               expr=sum(TA_SQ_TA_CMD_CYCLES,16) descr="."></metric>
-  <metric name="TA_SP_TA_ADDR_CYCLES_sum"                              expr=sum(TA_SP_TA_ADDR_CYCLES,16) descr="."></metric>
-  <metric name="TA_SP_TA_DATA_CYCLES_sum"                              expr=sum(TA_SP_TA_DATA_CYCLES,16) descr="."></metric>
-  <metric name="TA_TA_SH_FIFO_STARVED_sum"                             expr=sum(TA_TA_SH_FIFO_STARVED,16) descr="."></metric>
-  <metric name="TA_SH_FIFO_ADDR_STARVED_WHILE_BUSY_CYCLES_sum"         expr=sum(TA_SH_FIFO_ADDR_STARVED_WHILE_BUSY_CYCLES,16) descr="."></metric>
-  <metric name="TA_SH_FIFO_DATA_STARVED_WHILE_BUSY_CYCLES_sum"         expr=sum(TA_SH_FIFO_DATA_STARVED_WHILE_BUSY_CYCLES,16) descr="."></metric>
-  <metric name="TA_SH_FIFO_CMD_STARVED_WHILE_BUSY_CYCLES_sum"          expr=sum(TA_SH_FIFO_CMD_STARVED_WHILE_BUSY_CYCLES,16) descr="."></metric>
-
-  <metric name="TA_TOTAL_WAVEFRONTS_sum"                               expr=sum(TA_TOTAL_WAVEFRONTS,16) descr="."></metric>
-  <metric name="TA_ADDR_STALLED_BY_TC_CYCLES_sum"                      expr=sum(TA_ADDR_STALLED_BY_TC_CYCLES,16) descr="."></metric>
-  <metric name="TA_ADDR_STALLED_BY_TD_CYCLES_sum"                      expr=sum(TA_ADDR_STALLED_BY_TD_CYCLES,16) descr="."></metric>
-  <metric name="TA_DATA_STALLED_BY_TC_CYCLES_sum"                      expr=sum(TA_DATA_STALLED_BY_TC_CYCLES,16) descr="."></metric>
-
-
-
-  <metric name="TA_FLAT_WAVEFRONTS_sum"                                expr=sum(TA_FLAT_WAVEFRONTS,16) descr="."></metric>
-  <metric name="TA_FLAT_READ_WAVEFRONTS_sum"                           expr=sum(TA_FLAT_READ_WAVEFRONTS,16) descr="."></metric>
-  <metric name="TA_FLAT_WRITE_WAVEFRONTS_sum"                          expr=sum(TA_FLAT_WRITE_WAVEFRONTS,16) descr="."></metric>
-  <metric name="TA_FLAT_ATOMIC_WAVEFRONTS_sum"                         expr=sum(TA_FLAT_ATOMIC_WAVEFRONTS,16) descr="."></metric>
-  <metric name="TA_FLAT_COALESCEABLE_WAVEFRONTS_sum"                   expr=sum(TA_FLAT_COALESCEABLE_WAVEFRONTS,16) descr="."></metric>
-      
-  <metric name="TA_BUFFER_WAVEFRONTS_sum"                              expr=sum(TA_BUFFER_WAVEFRONTS,16) descr="."></metric>
-  <metric name="TA_BUFFER_READ_WAVEFRONTS_sum"                         expr=sum(TA_BUFFER_READ_WAVEFRONTS,16) descr="."></metric>
-  <metric name="TA_BUFFER_WRITE_WAVEFRONTS_sum"                        expr=sum(TA_BUFFER_WRITE_WAVEFRONTS,16) descr="."></metric>
-  <metric name="TA_BUFFER_ATOMIC_WAVEFRONTS_sum"                       expr=sum(TA_BUFFER_ATOMIC_WAVEFRONTS,16) descr="."></metric>
-  <metric name="TA_BUFFER_TOTAL_CYCLES_sum"                            expr=sum(TA_BUFFER_TOTAL_CYCLES,16) descr="."></metric>
-
-  <metric name="TA_BUFFER_COALESCABLE_WAVEFRONTS_sum"                  expr=sum(TA_BUFFER_COALESCABLE_WAVEFRONTS,16) descr="."></metric>
-  <metric name="TA_BUFFER_COALESCED_READ_CYCLES_sum"                   expr=sum(TA_BUFFER_COALESCED_READ_CYCLES,16) descr="."></metric>
-  <metric name="TA_BUFFER_COALESCED_WRITE_CYCLES_sum"                  expr=sum(TA_BUFFER_COALESCED_WRITE_CYCLES,16) descr="."></metric>
-
-  #xlu -TD
-  <metric name="TD_TD_BUSY_sum"                                         expr=sum(TD_TD_BUSY,16) descr="."></metric>
-  <metric name="TD_INPUT_BUSY_sum"                                      expr=sum(TD_INPUT_BUSY,16) descr="."></metric>
-  <metric name="TD_OUTPUT_BUSY_sum"                                     expr=sum(TD_OUTPUT_BUSY,16) descr="."></metric>
-  <metric name="TD_LERP_BUSY_sum"                                       expr=sum(TD_LERP_BUSY,16) descr="."></metric>
-  <metric name="TD_TC_TD_FIFO_FULL_sum"                                 expr=sum(TD_TC_TD_FIFO_FULL,16) descr="."></metric>
-  <metric name="TD_OUTPUT_FIFO_FULL_sum"                                expr=sum(TD_OUTPUT_FIFO_FULL,16) descr="."></metric>
-  <metric name="TD_TC_STALL_sum"                                        expr=sum(TD_TC_STALL,16) descr="."></metric>
-  <metric name="TD_PC_STALL_sum"                                        expr=sum(TD_PC_STALL,16) descr="."></metric>
-  <metric name="TD_GDS_STALL_sum"                                       expr=sum(TD_GDS_STALL,16) descr="."></metric>
-  <metric name="TD_LOAD_WAVEFRONT_sum"                                  expr=sum(TD_LOAD_WAVEFRONT,16) descr="."></metric>
-  <metric name="TD_ATOMIC_WAVEFRONT_sum"                                expr=sum(TD_ATOMIC_WAVEFRONT,16) descr="."></metric>
-  <metric name="TD_STORE_WAVEFRONT_sum"                                 expr=sum(TD_STORE_WAVEFRONT,16) descr="."></metric>
-  <metric name="TD_LDFPTR_WAVEFRONT_sum"                                expr=sum(TD_LDFPTR_WAVEFRONT,16) descr="."></metric>
-  <metric name="TD_D16_EN_WAVEFRONT_sum"                                expr=sum(TD_D16_EN_WAVEFRONT,16) descr="."></metric>
-  <metric name="TD_WRITE_ACK_WAVEFRONT_sum"                             expr=sum(TD_WRITE_ACK_WAVEFRONT,16) descr="."></metric>
-  <metric name="TD_NACK_sum"                                            expr=sum(TD_NACK,16) descr="."></metric>
-  <metric name="TD_TD_SP_TRAFFIC_sum"                                   expr=sum(TD_TD_SP_TRAFFIC,16) descr="."></metric>
-  <metric name="TD_CONSUME_GDS_TRAFFIC_sum"                             expr=sum(TD_CONSUME_GDS_TRAFFIC,16) descr="."></metric>
-  
-  <metric name="TD_COALESCABLE_WAVEFRONT_sum"                             expr=sum(TD_COALESCABLE_WAVEFRONT,16) descr="."></metric>
-  <metric name="TD_COALESCED_PHASE_sum"                             expr=sum(TD_COALESCED_PHASE,16) descr="."></metric>
-
-    #xlu -TCP
-  <metric name="TCP_GATE_EN1_sum"                                       expr=sum(TCP_GATE_EN1,16) descr="."></metric>
-  <metric name="TCP_GATE_EN2_sum"                                       expr=sum(TCP_GATE_EN2,16) descr="."></metric>
-  <metric name="TCP_CORE_REG_SCLK_VLD_sum"                              expr=sum(TCP_CORE_REG_SCLK_VLD,16) descr="."></metric>
-  <metric name="TCP_TA_TCP_ADDR_STARVE_CYCLES_sum"                      expr=sum(TCP_TA_TCP_ADDR_STARVE_CYCLES,16) descr="."></metric>
-  <metric name="TCP_TA_TCP_DATA_STARVE_CYCLES_sum"                      expr=sum(TCP_TA_TCP_DATA_STARVE_CYCLES,16) descr="."></metric>
-  <metric name="TCP_TCP_TA_ADDR_STALL_CYCLES_sum"                       expr=sum(TCP_TCP_TA_ADDR_STALL_CYCLES,16) descr="."></metric>
-  <metric name="TCP_TCP_TA_DATA_STALL_CYCLES_sum"                       expr=sum(TCP_TCP_TA_DATA_STALL_CYCLES,16) descr="."></metric>
-  <metric name="TCP_TD_TCP_STALL_CYCLES_sum"                            expr=sum(TCP_TD_TCP_STALL_CYCLES,16) descr="."></metric>
-  <metric name="TCP_TCR_TCP_STALL_CYCLES_sum"                           expr=sum(TCP_TCR_TCP_STALL_CYCLES,16) descr="."></metric>
-  <metric name="TCP_TCP_TCR_STARVE_CYCLES_sum"                          expr=sum(TCP_TCP_TCR_STARVE_CYCLES,16) descr="."></metric>
-  <metric name="TCP_LOD_STALL_CYCLES_sum"                               expr=sum(TCP_LOD_STALL_CYCLES,16) descr="."></metric>
-  <metric name="TCP_READ_TAGCONFLICT_STALL_CYCLES_sum"                  expr=sum(TCP_READ_TAGCONFLICT_STALL_CYCLES,16) descr="."></metric>
-  <metric name="TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum"                 expr=sum(TCP_WRITE_TAGCONFLICT_STALL_CYCLES,16) descr="."></metric>
-  <metric name="TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum"                expr=sum(TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES,16) descr="."></metric>
-  <metric name="TCP_ALLOC_STALL_CYCLES_sum"                             expr=sum(TCP_ALLOC_STALL_CYCLES,16) descr="."></metric>
-  <metric name="TCP_UNORDERED_MTYPE_STALL_sum"                          expr=sum(TCP_UNORDERED_MTYPE_STALL,16) descr="."></metric>
-  <metric name="TCP_LFIFO_STALL_CYCLES_sum"                             expr=sum(TCP_LFIFO_STALL_CYCLES,16) descr="."></metric>
-  <metric name="TCP_RFIFO_STALL_CYCLES_sum"                             expr=sum(TCP_RFIFO_STALL_CYCLES,16) descr="."></metric>
-  <metric name="TCP_TCR_RDRET_STALL_sum"                                expr=sum(TCP_TCR_RDRET_STALL,16) descr="."></metric>
-  <metric name="TCP_WRITE_CONFLICT_STALL_sum"                           expr=sum(TCP_WRITE_CONFLICT_STALL,16) descr="."></metric>
-  <metric name="TCP_HOLE_READ_STALL_sum"                                expr=sum(TCP_HOLE_READ_STALL,16) descr="."></metric>
-  <metric name="TCP_READCONFLICT_STALL_CYCLES_sum"                      expr=sum(TCP_READCONFLICT_STALL_CYCLES,16) descr="."></metric>
-  <metric name="TCP_PENDING_STALL_CYCLES_sum"                           expr=sum(TCP_PENDING_STALL_CYCLES,16) descr="."></metric>
-  <metric name="TCP_READFIFO_STALL_CYCLES_sum"                          expr=sum(TCP_READFIFO_STALL_CYCLES,16) descr="."></metric>
-  <metric name="TCP_POWER_STALL_sum"                                    expr=sum(TCP_POWER_STALL,16) descr="."></metric>
-  <metric name="TCP_UTCL1_SERIALIZATION_STALL_sum"                      expr=sum(TCP_UTCL1_SERIALIZATION_STALL,16) descr="."></metric>
-  <metric name="TCP_TC_TA_XNACK_STALL_sum"                              expr=sum(TCP_TC_TA_XNACK_STALL,16) descr="."></metric>
-  <metric name="TCP_VOLATILE_sum"                                       expr=sum(TCP_VOLATILE,16) descr="."></metric>
-  <metric name="TCP_TOTAL_ACCESSES_sum"                                 expr=sum(TCP_TOTAL_ACCESSES,16) descr="."></metric>
-  <metric name="TCP_TOTAL_READ_sum"                                     expr=sum(TCP_TOTAL_READ,16) descr="."></metric>
-  <metric name="TCP_TOTAL_NON_READ_sum"                                 expr=sum(TCP_TOTAL_NON_READ,16) descr="."></metric>
-  <metric name="TCP_TOTAL_WRITE_sum"                                    expr=sum(TCP_TOTAL_WRITE,16) descr="."></metric>
-  <metric name="TCP_TOTAL_HIT_LRU_READ_sum"                             expr=sum(TCP_TOTAL_HIT_LRU_READ,16) descr="."></metric>
-  <metric name="TCP_TOTAL_MISS_LRU_READ_sum"                            expr=sum(TCP_TOTAL_MISS_LRU_READ,16) descr="."></metric>
-  <metric name="TCP_TOTAL_MISS_EVICT_READ_sum"                          expr=sum(TCP_TOTAL_MISS_EVICT_READ,16) descr="."></metric>
-  <metric name="TCP_TOTAL_MISS_LRU_WRITE_sum"                           expr=sum(TCP_TOTAL_MISS_LRU_WRITE,16) descr="."></metric>
-  <metric name="TCP_TOTAL_MISS_EVICT_WRITE_sum"                         expr=sum(TCP_TOTAL_MISS_EVICT_WRITE,16) descr="."></metric>
-  <metric name="TCP_TOTAL_ATOMIC_WITH_RET_sum"                          expr=sum(TCP_TOTAL_ATOMIC_WITH_RET,16) descr="."></metric>
-  <metric name="TCP_TOTAL_ATOMIC_WITHOUT_RET_sum"                       expr=sum(TCP_TOTAL_ATOMIC_WITHOUT_RET,16) descr="."></metric>
-  <metric name="TCP_TOTAL_WBINVL1_sum"                                  expr=sum(TCP_TOTAL_WBINVL1,16) descr="."></metric>
-  <metric name="TCP_TOTAL_WBINVL1_VOL_sum"                              expr=sum(TCP_TOTAL_WBINVL1_VOL,16) descr="."></metric>
-  <metric name="TCP_SQ_TCP_INVALIDATE_VOL_sum"                          expr=sum(TCP_SQ_TCP_INVALIDATE_VOL,16) descr="."></metric>
-  <metric name="TCP_CP_TCP_INVALIDATE_sum"                              expr=sum(TCP_CP_TCP_INVALIDATE,16) descr="."></metric>
-  <metric name="TCP_CP_TCP_INVALIDATE_VOL_sum"                          expr=sum(TCP_CP_TCP_INVALIDATE_VOL,16) descr="."></metric>
-  <metric name="TCP_TOTAL_WRITEBACK_INVALIDATES_sum"                    expr=sum(TCP_TOTAL_WRITEBACK_INVALIDATES,16) descr="."></metric>
-  <metric name="TCP_SHOOTDOWN_sum"                                      expr=sum(TCP_SHOOTDOWN,16) descr="."></metric>
-  <metric name="TCP_UTCL1_REQUEST_sum"                                  expr=sum(TCP_UTCL1_REQUEST,16) descr="."></metric>
-  <metric name="TCP_UTCL1_TRANSLATION_MISS_sum"                         expr=sum(TCP_UTCL1_TRANSLATION_MISS,16) descr="."></metric>
-  <metric name="TCP_UTCL1_TRANSLATION_HIT_sum"                          expr=sum(TCP_UTCL1_TRANSLATION_HIT,16) descr="."></metric>
-  <metric name="TCP_UTCL1_PERMISSION_MISS_sum"                          expr=sum(TCP_UTCL1_PERMISSION_MISS,16) descr="."></metric>
-  <metric name="TCP_UTCL1_STALL_INFLIGHT_MAX_sum"                       expr=sum(TCP_UTCL1_STALL_INFLIGHT_MAX,16) descr="."></metric>
-  <metric name="TCP_UTCL1_STALL_LRU_INFLIGHT_sum"                       expr=sum(TCP_UTCL1_STALL_LRU_INFLIGHT,16) descr="."></metric>
-  <metric name="TCP_UTCL1_STALL_MULTI_MISS_sum"                         expr=sum(TCP_UTCL1_STALL_MULTI_MISS,16) descr="."></metric>
-  <metric name="TCP_UTCL1_LFIFO_FULL_sum"                               expr=sum(TCP_UTCL1_LFIFO_FULL,16) descr="."></metric>
-  <metric name="TCP_UTCL1_STALL_LFIFO_NOT_RES_sum"                      expr=sum(TCP_UTCL1_STALL_LFIFO_NOT_RES,16) descr="."></metric>
-  <metric name="TCP_UTCL1_STALL_UTCL2_REQ_OUT_OF_CREDITS_sum"           expr=sum(TCP_UTCL1_STALL_UTCL2_REQ_OUT_OF_CREDITS,16) descr="."></metric>
-  <metric name="TCP_CLIENT_UTCL1_INFLIGHT_sum"                          expr=sum(TCP_CLIENT_UTCL1_INFLIGHT,16) descr="."></metric>
-  <metric name="TCP_UTCL1_UTCL2_INFLIGHT_sum"                           expr=sum(TCP_UTCL1_UTCL2_INFLIGHT,16) descr="."></metric>
-  <metric name="TCP_UTCL1_STALL_MISSFIFO_FULL_sum"                      expr=sum(TCP_UTCL1_STALL_MISSFIFO_FULL,16) descr="."></metric>
-  <metric name="TCP_TOTAL_CACHE_ACCESSES_sum"                           expr=sum(TCP_TOTAL_CACHE_ACCESSES,16) descr="."></metric>
-  <metric name="TCP_TAGRAM0_REQ_sum"                                    expr=sum(TCP_TAGRAM0_REQ,16) descr="."></metric>
-  <metric name="TCP_TAGRAM1_REQ_sum"                                    expr=sum(TCP_TAGRAM1_REQ,16) descr="."></metric>
-  <metric name="TCP_TAGRAM2_REQ_sum"                                    expr=sum(TCP_TAGRAM2_REQ,16) descr="."></metric>
-  <metric name="TCP_TAGRAM3_REQ_sum"                                    expr=sum(TCP_TAGRAM3_REQ,16) descr="."></metric>
-  <metric name="TCP_TCP_LATENCY_sum"                                    expr=sum(TCP_TCP_LATENCY,16) descr="."></metric>
-  <metric name="TCP_TA_TCP_STATE_READ_sum"                              expr=sum(TCP_TA_TCP_STATE_READ,16) descr="."></metric>
-  <metric name="TCP_TCC_READ_REQ_LATENCY_sum"                           expr=sum(TCP_TCC_READ_REQ_LATENCY,16) descr="."></metric>
-  <metric name="TCP_TCC_WRITE_REQ_LATENCY_sum"                          expr=sum(TCP_TCC_WRITE_REQ_LATENCY,16) descr="."></metric>
-  <metric name="TCP_TCC_WRITE_REQ_HOLE_LATENCY_sum"                     expr=sum(TCP_TCC_WRITE_REQ_HOLE_LATENCY,16) descr="."></metric>
-  <metric name="TCP_TCC_READ_REQ_sum"                                   expr=sum(TCP_TCC_READ_REQ,16) descr="."></metric>
-  <metric name="TCP_TCC_WRITE_REQ_sum"                                  expr=sum(TCP_TCC_WRITE_REQ,16) descr="."></metric>
-  <metric name="TCP_TCC_ATOMIC_WITH_RET_REQ_sum"                        expr=sum(TCP_TCC_ATOMIC_WITH_RET_REQ,16) descr="."></metric>
-  <metric name="TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum"                     expr=sum(TCP_TCC_ATOMIC_WITHOUT_RET_REQ,16) descr="."></metric>
-  <metric name="TCP_TCC_LRU_REQ_sum"                                    expr=sum(TCP_TCC_LRU_REQ,16) descr="."></metric>
-  <metric name="TCP_TCC_STREAM_REQ_sum"                                 expr=sum(TCP_TCC_STREAM_REQ,16) descr="."></metric>
-  <metric name="TCP_TCC_NC_READ_REQ_sum"                                expr=sum(TCP_TCC_NC_READ_REQ,16) descr="."></metric>
-  <metric name="TCP_TCC_NC_WRITE_REQ_sum"                               expr=sum(TCP_TCC_NC_WRITE_REQ,16) descr="."></metric>
-  <metric name="TCP_TCC_NC_ATOMIC_REQ_sum"                              expr=sum(TCP_TCC_NC_ATOMIC_REQ,16) descr="."></metric>
-  <metric name="TCP_TCC_UC_READ_REQ_sum"                                expr=sum(TCP_TCC_UC_READ_REQ,16) descr="."></metric>
-  <metric name="TCP_TCC_UC_WRITE_REQ_sum"                               expr=sum(TCP_TCC_UC_WRITE_REQ,16) descr="."></metric>
-  <metric name="TCP_TCC_UC_ATOMIC_REQ_sum"                              expr=sum(TCP_TCC_UC_ATOMIC_REQ,16) descr="."></metric>
-  <metric name="TCP_TCC_CC_READ_REQ_sum"                                expr=sum(TCP_TCC_CC_READ_REQ,16) descr="."></metric>
-  <metric name="TCP_TCC_CC_WRITE_REQ_sum"                               expr=sum(TCP_TCC_CC_WRITE_REQ,16) descr="."></metric>
-  <metric name="TCP_TCC_CC_ATOMIC_REQ_sum"                              expr=sum(TCP_TCC_CC_ATOMIC_REQ,16) descr="."></metric>
-  <metric name="TCP_TCC_DCC_REQ_sum"                                    expr=sum(TCP_TCC_DCC_REQ,16) descr="."></metric>
-  #<metric name="TCP_TCC_RW_READ_REQ_sum"                                expr=sum(TCP_TCC_RW_READ_REQ,16) descr="."></metric>
-  #<metric name="TCP_TCC_RW_WRITE_REQ_sum"                               expr=sum(TCP_TCC_RW_WRITE_REQ,16) descr="."></metric>
-  #<metric name="TCP_TCC_RW_ATOMIC_REQ_sum"                              expr=sum(TCP_TCC_RW_ATOMIC_REQ,16) descr="."></metric>
-
-</gfx9_expr>
-
-<gfx906_expr base="gfx9_expr">
-  # EA1
-  <metric name="TCC_EA1_RDREQ_32B_sum" expr=sum(TCC_EA1_RDREQ_32B,16) descr="Number of 32-byte TCC/EA read requests. Sum over TCC EA1s."></metric>
-  <metric name="TCC_EA1_RDREQ_sum" expr=sum(TCC_EA1_RDREQ,16) descr="Number of TCC/EA read requests (either 32-byte or 64-byte). Sum over TCC EA1s."></metric>
-  <metric name="TCC_EA1_WRREQ_sum" expr=sum(TCC_EA1_WRREQ,16) descr="Number of transactions (either 32-byte or 64-byte) going over the TC_EA_wrreq interface. Sum over TCC EA1s."></metric>
-  <metric name="TCC_EA1_WRREQ_64B_sum" expr=sum(TCC_EA1_WRREQ_64B,16) descr="Number of 64-byte transactions going (64-byte write or CMPSWAP) over the TC_EA_wrreq interface. Sum over TCC EA1s."></metric>
-  <metric name="TCC_WRREQ1_STALL_max" expr=max(TCC_EA1_WRREQ_STALL,16) descr="Number of cycles a write request was stalled. Max over TCC instances."></metric>
-
-  <metric name="RDATA1_SIZE" expr=(TCC_EA1_RDREQ_32B_sum*32+(TCC_EA1_RDREQ_sum-TCC_EA1_RDREQ_32B_sum)*64) descr="The total kilobytes fetched from the video memory. This is measured on EA1s."></metric>
-  <metric name="WDATA1_SIZE" expr=((TCC_EA1_WRREQ_sum-TCC_EA1_WRREQ_64B_sum)*32+TCC_EA1_WRREQ_64B_sum*64) descr="The total kilobytes written to the video memory. This is measured on EA1s."></metric>
-
-  # both EA0 and EA1 should be included
-  <metric name="FETCH_SIZE" expr=(TCC_EA_RDREQ_32B_sum*32+(TCC_EA_RDREQ_sum-TCC_EA_RDREQ_32B_sum)*64+RDATA1_SIZE)/1024 descr="The total kilobytes fetched from the video memory. This is measured with all extra fetches and any cache or memory effects taken into account."></metric>
-  <metric name="WRITE_SIZE" expr=((TCC_EA_WRREQ_sum-TCC_EA_WRREQ_64B_sum)*32+TCC_EA_WRREQ_64B_sum*64+WDATA1_SIZE)/1024 descr="The total kilobytes written to the video memory. This is measured with all extra fetches and any cache or memory effects taken into account."></metric>
-  <metric name="WRITE_REQ_32B" expr=(TCC_EA_WRREQ_sum-TCC_EA_WRREQ_64B_sum)+(TCC_EA1_WRREQ_sum-TCC_EA1_WRREQ_64B_sum)+(TCC_EA_WRREQ_64B_sum+TCC_EA1_WRREQ_64B_sum)*2 descr="The total number of 32-byte effective memory writes."></metric>
-
-
-    #xlu - TCC
-  <metric name="TCC_CYCLE_sum"                                          expr=sum(TCC_CYCLE,16) descr="."></metric>
-  <metric name="TCC_BUSY_sum"                                           expr=sum(TCC_BUSY,16) descr="."></metric>
-  <metric name="TCC_REQ_sum"                                            expr=sum(TCC_REQ,16) descr="."></metric>
-  <metric name="TCC_STREAMING_REQ_sum"                                  expr=sum(TCC_STREAMING_REQ,16) descr="."></metric>
-  <metric name="TCC_NC_REQ_sum"                                         expr=sum(TCC_NC_REQ,16) descr="."></metric>
-  <metric name="TCC_UC_REQ_sum"                                         expr=sum(TCC_UC_REQ,16) descr="."></metric>
-  <metric name="TCC_CC_REQ_sum"                                         expr=sum(TCC_CC_REQ,16) descr="."></metric>
-      #<metric name="TCC_RW_REQ_sum"                                         expr=sum(TCC_RW_REQ,16) descr="."></metric>
-  <metric name="TCC_PROBE_sum"                                          expr=sum(TCC_PROBE,16) descr="."></metric>
-  <metric name="TCC_PROBE_ALL_sum"                                      expr=sum(TCC_PROBE_ALL,16) descr="."></metric>
-  <metric name="TCC_INTERNAL_PROBE_sum"                                 expr=sum(TCC_INTERNAL_PROBE,16) descr="."></metric>
-  <metric name="TCC_READ_sum"                                           expr=sum(TCC_READ,16) descr="."></metric>
-  <metric name="TCC_WRITE_sum"                                          expr=sum(TCC_WRITE,16) descr="."></metric>
-  <metric name="TCC_ATOMIC_sum"                                         expr=sum(TCC_ATOMIC,16) descr="."></metric>
-  <metric name="TCC_NOP_ACK_sum"                                        expr=sum(TCC_NOP_ACK,16) descr="."></metric>
-  <metric name="TCC_NOP_RTN0_sum"                                       expr=sum(TCC_NOP_RTN0,16) descr="."></metric>
-  <metric name="TCC_HIT_sum"                                            expr=sum(TCC_HIT,16) descr="."></metric>
-  <metric name="TCC_SECTOR_HIT_sum"                                     expr=sum(TCC_SECTOR_HIT,16) descr="."></metric>
-  <metric name="TCC_MISS_sum"                                           expr=sum(TCC_MISS,16) descr="."></metric>
-  <metric name="TCC_DEWRITE_ALLOCATE_HIT_sum"                           expr=sum(TCC_DEWRITE_ALLOCATE_HIT,16) descr="."></metric>
-  <metric name="TCC_FULLY_WRITTEN_HIT_sum"                              expr=sum(TCC_FULLY_WRITTEN_HIT,16) descr="."></metric>
-  <metric name="TCC_WRITEBACK_sum"                                      expr=sum(TCC_WRITEBACK,16) descr="."></metric>
-  <metric name="TCC_LATENCY_FIFO_FULL_sum"                              expr=sum(TCC_LATENCY_FIFO_FULL,16) descr="."></metric>
-  <metric name="TCC_SRC_FIFO_FULL_sum"                                  expr=sum(TCC_SRC_FIFO_FULL,16) descr="."></metric>
-  <metric name="TCC_HOLE_FIFO_FULL_sum"                                 expr=sum(TCC_HOLE_FIFO_FULL,16) descr="."></metric>
-  <metric name="TCC_EA_WRREQ_sum"                                       expr=sum(TCC_EA_WRREQ,16) descr="."></metric>
-  <metric name="TCC_EA_WRREQ_64B_sum"                                   expr=sum(TCC_EA_WRREQ_64B,16) descr="."></metric>
-  <metric name="TCC_EA_WRREQ_PROBE_COMMAND_sum"                         expr=sum(TCC_EA_WRREQ_PROBE_COMMAND,16) descr="."></metric>
-  <metric name="TCC_EA_WR_UNCACHED_32B_sum"                             expr=sum(TCC_EA_WR_UNCACHED_32B,16) descr="."></metric>
-  <metric name="TCC_EA_WRREQ_STALL_sum"                                 expr=sum(TCC_EA_WRREQ_STALL,16) descr="."></metric>
-  <metric name="TCC_EA_WRREQ_IO_CREDIT_STALL_sum"                       expr=sum(TCC_EA_WRREQ_IO_CREDIT_STALL,16) descr="."></metric>
-  <metric name="TCC_EA_WRREQ_GMI_CREDIT_STALL_sum"                      expr=sum(TCC_EA_WRREQ_GMI_CREDIT_STALL,16) descr="."></metric>
-  <metric name="TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum"                     expr=sum(TCC_EA_WRREQ_DRAM_CREDIT_STALL,16) descr="."></metric>
-  <metric name="TCC_TOO_MANY_EA_WRREQS_STALL_sum"                       expr=sum(TCC_TOO_MANY_EA_WRREQS_STALL,16) descr="."></metric>
-  <metric name="TCC_EA_WRREQ_LEVEL_sum"                                 expr=sum(TCC_EA_WRREQ_LEVEL,16) descr="."></metric>
-  <metric name="TCC_EA_RDREQ_LEVEL_sum"                                 expr=sum(TCC_EA_RDREQ_LEVEL,16) descr="."></metric>
-  <metric name="TCC_HOLE_LEVEL_sum"                                     expr=sum(TCC_HOLE_LEVEL,16) descr="."></metric>
-  <metric name="TCC_TCA_LEVEL_sum"                                      expr=sum(TCC_TCA_LEVEL,16) descr="."></metric>
-  <metric name="TCC_EA_ATOMIC_sum"                                      expr=sum(TCC_EA_ATOMIC,16) descr="."></metric>
-  <metric name="TCC_EA_ATOMIC_LEVEL_sum"                                expr=sum(TCC_EA_ATOMIC_LEVEL,16) descr="."></metric>
-  <metric name="TCC_EA_RDREQ_sum"                                       expr=sum(TCC_EA_RDREQ,16) descr="."></metric>
-  <metric name="TCC_EA_RDREQ_32B_sum"                                   expr=sum(TCC_EA_RDREQ_32B,16) descr="."></metric>
-  <metric name="TCC_EA_RD_UNCACHED_32B_sum"                             expr=sum(TCC_EA_RD_UNCACHED_32B,16) descr="."></metric>
-  <metric name="TCC_EA_RDREQ_IO_CREDIT_STALL_sum"                       expr=sum(TCC_EA_RDREQ_IO_CREDIT_STALL,16) descr="."></metric>
-  <metric name="TCC_EA_RDREQ_GMI_CREDIT_STALL_sum"                      expr=sum(TCC_EA_RDREQ_GMI_CREDIT_STALL,16) descr="."></metric>
-  <metric name="TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum"                     expr=sum(TCC_EA_RDREQ_DRAM_CREDIT_STALL,16) descr="."></metric>
-  <metric name="TCC_TAG_WRITEBACK_FIFO_FULL_STALL_sum"                  expr=sum(TCC_TAG_WRITEBACK_FIFO_FULL_STALL,16) descr="."></metric>
-  <metric name="TCC_TAG_MISS_NOTHING_REPLACEABLE_STALL_sum"             expr=sum(TCC_TAG_MISS_NOTHING_REPLACEABLE_STALL,16) descr="."></metric>
-  <metric name="TCC_TAG_UNCACHED_WRITE_ATOMIC_FIFO_FULL_STALL_sum"      expr=sum(TCC_TAG_UNCACHED_WRITE_ATOMIC_FIFO_FULL_STALL,16) descr="."></metric>
-  <metric name="TCC_TAG_NO_UNCACHED_WRITE_ATOMIC_ENTRIES_STALL_sum"     expr=sum(TCC_TAG_NO_UNCACHED_WRITE_ATOMIC_ENTRIES_STALL,16) descr="."></metric>
-  <metric name="TCC_TAG_PROBE_STALL_sum"                                expr=sum(TCC_TAG_PROBE_STALL,16) descr="."></metric>
-  <metric name="TCC_TAG_PROBE_FILTER_STALL_sum"                         expr=sum(TCC_TAG_PROBE_FILTER_STALL,16) descr="."></metric>
-  <metric name="TCC_TAG_PROBE_FIFO_FULL_STALL_sum"                      expr=sum(TCC_TAG_PROBE_FIFO_FULL_STALL,16) descr="."></metric>
-  <metric name="TCC_READ_RETURN_TIMEOUT_sum"                            expr=sum(TCC_READ_RETURN_TIMEOUT,16) descr="."></metric>
-  <metric name="TCC_WRITEBACK_READ_TIMEOUT_sum"                         expr=sum(TCC_WRITEBACK_READ_TIMEOUT,16) descr="."></metric>
-  <metric name="TCC_READ_RETURN_FULL_BUBBLE_sum"                        expr=sum(TCC_READ_RETURN_FULL_BUBBLE,16) descr="."></metric>
-  <metric name="TCC_BUBBLE_sum"                                         expr=sum(TCC_BUBBLE,16) descr="."></metric>
-  <metric name="TCC_RETURN_ACK_sum"                                     expr=sum(TCC_RETURN_ACK,16) descr="."></metric>
-  <metric name="TCC_RETURN_DATA_sum"                                    expr=sum(TCC_RETURN_DATA,16) descr="."></metric>
-  <metric name="TCC_RETURN_HOLE_sum"                                    expr=sum(TCC_RETURN_HOLE,16) descr="."></metric>
-  <metric name="TCC_RETURN_ACK_HOLE_sum"                                expr=sum(TCC_RETURN_ACK_HOLE,16) descr="."></metric>
-  <metric name="TCC_IB_REQ_sum"                                         expr=sum(TCC_IB_REQ,16) descr="."></metric>
-  <metric name="TCC_IB_STALL_sum"                                       expr=sum(TCC_IB_STALL,16) descr="."></metric>
-  <metric name="TCC_IB_TAG_STALL_sum"                                   expr=sum(TCC_IB_TAG_STALL,16) descr="."></metric>
-  <metric name="TCC_EA_RDRET_NACK_sum"                                  expr=sum(TCC_EA_RDRET_NACK,16) descr="."></metric>
-  <metric name="TCC_EA_WRRET_NACK_sum"                                  expr=sum(TCC_EA_WRRET_NACK,16) descr="."></metric>
-  <metric name="TCC_NORMAL_WRITEBACK_sum"                               expr=sum(TCC_NORMAL_WRITEBACK,16) descr="."></metric>
-  <metric name="TCC_TC_OP_WBL2_NC_WRITEBACK_sum"                        expr=sum(TCC_TC_OP_WBL2_NC_WRITEBACK,16) descr="."></metric>
-  <metric name="TCC_TC_OP_WBINVL2_WRITEBACK_sum"                        expr=sum(TCC_TC_OP_WBINVL2_WRITEBACK,16) descr="."></metric>
-  <metric name="TCC_TC_OP_WBINVL2_NC_WRITEBACK_sum"                     expr=sum(TCC_TC_OP_WBINVL2_NC_WRITEBACK,16) descr="."></metric>
-  <metric name="TCC_TC_OP_WBINVL2_SD_WRITEBACK_sum"                     expr=sum(TCC_TC_OP_WBINVL2_SD_WRITEBACK,16) descr="."></metric>
-  <metric name="TCC_ALL_TC_OP_WB_WRITEBACK_sum"                         expr=sum(TCC_ALL_TC_OP_WB_WRITEBACK,16) descr="."></metric>
-  <metric name="TCC_NORMAL_EVICT_sum"                                   expr=sum(TCC_NORMAL_EVICT,16) descr="."></metric>
-  <metric name="TCC_TC_OP_WBL2_NC_EVICT_sum"                            expr=sum(TCC_TC_OP_WBL2_NC_EVICT,16) descr="."></metric>
-  <metric name="TCC_TC_OP_INVL2_NC_EVICT_sum"                           expr=sum(TCC_TC_OP_INVL2_NC_EVICT,16) descr="."></metric>
-  <metric name="TCC_TC_OP_WBINVL2_EVICT_sum"                            expr=sum(TCC_TC_OP_WBINVL2_EVICT,16) descr="."></metric>
-  <metric name="TCC_TC_OP_WBINVL2_NC_EVICT_sum"                         expr=sum(TCC_TC_OP_WBINVL2_NC_EVICT,16) descr="."></metric>
-  <metric name="TCC_TC_OP_WBINVL2_SD_EVICT_sum"                         expr=sum(TCC_TC_OP_WBINVL2_SD_EVICT,16) descr="."></metric>
-  <metric name="TCC_ALL_TC_OP_INV_EVICT_sum"                            expr=sum(TCC_ALL_TC_OP_INV_EVICT,16) descr="."></metric>
-  <metric name="TCC_PROBE_EVICT_sum"                                    expr=sum(TCC_PROBE_EVICT,16) descr="."></metric>
-  <metric name="TCC_TC_OP_WBL2_NC_CYCLE_sum"                            expr=sum(TCC_TC_OP_WBL2_NC_CYCLE,16) descr="."></metric>
-  <metric name="TCC_TC_OP_INVL2_NC_CYCLE_sum"                           expr=sum(TCC_TC_OP_INVL2_NC_CYCLE,16) descr="."></metric>
-  <metric name="TCC_TC_OP_WBINVL2_CYCLE_sum"                            expr=sum(TCC_TC_OP_WBINVL2_CYCLE,16) descr="."></metric>
-  <metric name="TCC_TC_OP_WBINVL2_NC_CYCLE_sum"                         expr=sum(TCC_TC_OP_WBINVL2_NC_CYCLE,16) descr="."></metric>
-  <metric name="TCC_TC_OP_WBINVL2_SD_CYCLE_sum"                         expr=sum(TCC_TC_OP_WBINVL2_SD_CYCLE,16) descr="."></metric>
-  <metric name="TCC_ALL_TC_OP_WB_OR_INV_CYCLE_sum"                      expr=sum(TCC_ALL_TC_OP_WB_OR_INV_CYCLE,16) descr="."></metric>
-  <metric name="TCC_TC_OP_WBL2_NC_START_sum"                            expr=sum(TCC_TC_OP_WBL2_NC_START,16) descr="."></metric>
-  <metric name="TCC_TC_OP_INVL2_NC_START_sum"                           expr=sum(TCC_TC_OP_INVL2_NC_START,16) descr="."></metric>
-  <metric name="TCC_TC_OP_WBINVL2_START_sum"                            expr=sum(TCC_TC_OP_WBINVL2_START,16) descr="."></metric>
-  <metric name="TCC_TC_OP_WBINVL2_NC_START_sum"                         expr=sum(TCC_TC_OP_WBINVL2_NC_START,16) descr="."></metric>
-  <metric name="TCC_TC_OP_WBINVL2_SD_START_sum"                         expr=sum(TCC_TC_OP_WBINVL2_SD_START,16) descr="."></metric>
-  <metric name="TCC_ALL_TC_OP_WB_OR_INV_START_sum"                      expr=sum(TCC_ALL_TC_OP_WB_OR_INV_START,16) descr="."></metric>
-  <metric name="TCC_TC_OP_WBL2_NC_FINISH_sum"                           expr=sum(TCC_TC_OP_WBL2_NC_FINISH,16) descr="."></metric>
-  <metric name="TCC_TC_OP_INVL2_NC_FINISH_sum"                          expr=sum(TCC_TC_OP_INVL2_NC_FINISH,16) descr="."></metric>
-  <metric name="TCC_TC_OP_WBINVL2_FINISH_sum"                           expr=sum(TCC_TC_OP_WBINVL2_FINISH,16) descr="."></metric>
-  <metric name="TCC_TC_OP_WBINVL2_NC_FINISH_sum"                        expr=sum(TCC_TC_OP_WBINVL2_NC_FINISH,16) descr="."></metric>
-  <metric name="TCC_TC_OP_WBINVL2_SD_FINISH_sum"                        expr=sum(TCC_TC_OP_WBINVL2_SD_FINISH,16) descr="."></metric>
-  <metric name="TCC_ALL_TC_OP_WB_OR_INV_FINISH_sum"                     expr=sum(TCC_ALL_TC_OP_WB_OR_INV_FINISH,16) descr="."></metric>
-  <metric name="TCC_PROBE_FILTER_DISABLE_TRANSITION_sum"                expr=sum(TCC_PROBE_FILTER_DISABLE_TRANSITION,16) descr="."></metric>
-  <metric name="TCC_PROBE_FILTER_DISABLED_sum"                          expr=sum(TCC_PROBE_FILTER_DISABLED,16) descr="."></metric>
-  <metric name="TCC_EA_RDREQ_DRAM_sum"                                  expr=sum(TCC_EA_RDREQ_DRAM,16) descr="."></metric>
-  <metric name="TCC_EA_WRREQ_DRAM_sum"                                  expr=sum(TCC_EA_WRREQ_DRAM,16) descr="."></metric>
-
-
-</gfx906_expr>
-
-<gfx908_expr base="gfx9_expr">
-  <metric name="TCC_BUSY_avr" expr=avr(TCC_BUSY,32) descr="TCC_BUSY avr over all memory channels."></metric>
-  <metric name="TCC_REQ_sum" expr=sum(TCC_REQ,32) descr="TCC_REQ sum over all memory channels."></metric>
-  <metric name="TCC_HIT_sum" expr=sum(TCC_HIT,32) descr="Number of cache hits. Sum over TCC instances."></metric>
-  <metric name="TCC_MISS_sum" expr=sum(TCC_MISS,32) descr="Number of cache misses. Sum over TCC instances."></metric>
-  <metric name="TCC_EA_RDREQ_32B_sum" expr=sum(TCC_EA_RDREQ_32B,32) descr="Number of 32-byte TCC/EA read requests. Sum over TCC instances."></metric>
-  <metric name="TCC_EA_RDREQ_sum" expr=sum(TCC_EA_RDREQ,32) descr="Number of TCC/EA read requests (either 32-byte or 64-byte). Sum over TCC instances."></metric>
-  <metric name="TCC_EA_WRREQ_sum" expr=sum(TCC_EA_WRREQ,32) descr="Number of transactions (either 32-byte or 64-byte) going over the TC_EA_wrreq interface. Sum over TCC instances."></metric>
-  <metric name="TCC_EA_WRREQ_64B_sum" expr=sum(TCC_EA_WRREQ_64B,32) descr="Number of 64-byte transactions going (64-byte write or CMPSWAP) over the TC_EA_wrreq interface. Sum over TCC instances."></metric>
-  <metric name="TCC_WRREQ_STALL_max" expr=max(TCC_EA_WRREQ_STALL,32) descr="Number of cycles a write request was stalled. Max over TCC instances."></metric>
-
-  #xlu - TCP
-  <metric name="TCP_TCC_RW_READ_REQ_sum"                                expr=sum(TCP_TCC_RW_READ_REQ,16) descr="."></metric>
-  <metric name="TCP_TCC_RW_WRITE_REQ_sum"                               expr=sum(TCP_TCC_RW_WRITE_REQ,16) descr="."></metric>
-  <metric name="TCP_TCC_RW_ATOMIC_REQ_sum"                              expr=sum(TCP_TCC_RW_ATOMIC_REQ,16) descr="."></metric>
-
-    #xlu - TCC
-  <metric name="TCC_CYCLE_sum"                                          expr=sum(TCC_CYCLE,32) descr="."></metric>
-  <metric name="TCC_BUSY_sum"                                           expr=sum(TCC_BUSY,32) descr="."></metric>
-  <metric name="TCC_REQ_sum"                                            expr=sum(TCC_REQ,32) descr="."></metric>
-  <metric name="TCC_STREAMING_REQ_sum"                                  expr=sum(TCC_STREAMING_REQ,32) descr="."></metric>
-  <metric name="TCC_NC_REQ_sum"                                         expr=sum(TCC_NC_REQ,32) descr="."></metric>
-  <metric name="TCC_UC_REQ_sum"                                         expr=sum(TCC_UC_REQ,32) descr="."></metric>
-  <metric name="TCC_CC_REQ_sum"                                         expr=sum(TCC_CC_REQ,32) descr="."></metric>
-  <metric name="TCC_RW_REQ_sum"                                         expr=sum(TCC_RW_REQ,32) descr="."></metric>
-  <metric name="TCC_PROBE_sum"                                          expr=sum(TCC_PROBE,32) descr="."></metric>
-  <metric name="TCC_PROBE_ALL_sum"                                      expr=sum(TCC_PROBE_ALL,32) descr="."></metric>
-  <metric name="TCC_INTERNAL_PROBE_sum"                                 expr=sum(TCC_INTERNAL_PROBE,32) descr="."></metric>
-  <metric name="TCC_READ_sum"                                           expr=sum(TCC_READ,32) descr="."></metric>
-  <metric name="TCC_WRITE_sum"                                          expr=sum(TCC_WRITE,32) descr="."></metric>
-  <metric name="TCC_ATOMIC_sum"                                         expr=sum(TCC_ATOMIC,32) descr="."></metric>
-  <metric name="TCC_NOP_ACK_sum"                                        expr=sum(TCC_NOP_ACK,32) descr="."></metric>
-  <metric name="TCC_NOP_RTN0_sum"                                       expr=sum(TCC_NOP_RTN0,32) descr="."></metric>
-  <metric name="TCC_HIT_sum"                                            expr=sum(TCC_HIT,32) descr="."></metric>
-  <metric name="TCC_SECTOR_HIT_sum"                                     expr=sum(TCC_SECTOR_HIT,32) descr="."></metric>
-  <metric name="TCC_MISS_sum"                                           expr=sum(TCC_MISS,32) descr="."></metric>
-  <metric name="TCC_TAG_STALL_sum"                                      expr=sum(TCC_TAG_STALL,32) descr="."></metric>
-  <metric name="TCC_DEWRITE_ALLOCATE_HIT_sum"                           expr=sum(TCC_DEWRITE_ALLOCATE_HIT,32) descr="."></metric>
-  <metric name="TCC_FULLY_WRITTEN_HIT_sum"                              expr=sum(TCC_FULLY_WRITTEN_HIT,32) descr="."></metric>
-  <metric name="TCC_WRITEBACK_sum"                                      expr=sum(TCC_WRITEBACK,32) descr="."></metric>
-  <metric name="TCC_LATENCY_FIFO_FULL_sum"                              expr=sum(TCC_LATENCY_FIFO_FULL,32) descr="."></metric>
-  <metric name="TCC_SRC_FIFO_FULL_sum"                                  expr=sum(TCC_SRC_FIFO_FULL,32) descr="."></metric>
-  <metric name="TCC_HOLE_FIFO_FULL_sum"                                 expr=sum(TCC_HOLE_FIFO_FULL,32) descr="."></metric>
-  <metric name="TCC_EA_WRREQ_sum"                                       expr=sum(TCC_EA_WRREQ,32) descr="."></metric>
-  <metric name="TCC_EA_WRREQ_64B_sum"                                   expr=sum(TCC_EA_WRREQ_64B,32) descr="."></metric>
-  <metric name="TCC_EA_WRREQ_PROBE_COMMAND_sum"                         expr=sum(TCC_EA_WRREQ_PROBE_COMMAND,32) descr="."></metric>
-  <metric name="TCC_EA_WR_UNCACHED_32B_sum"                             expr=sum(TCC_EA_WR_UNCACHED_32B,32) descr="."></metric>
-  <metric name="TCC_EA_WRREQ_STALL_sum"                                 expr=sum(TCC_EA_WRREQ_STALL,32) descr="."></metric>
-  <metric name="TCC_EA_WRREQ_IO_CREDIT_STALL_sum"                       expr=sum(TCC_EA_WRREQ_IO_CREDIT_STALL,32) descr="."></metric>
-  <metric name="TCC_EA_WRREQ_GMI_CREDIT_STALL_sum"                      expr=sum(TCC_EA_WRREQ_GMI_CREDIT_STALL,32) descr="."></metric>
-  <metric name="TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum"                     expr=sum(TCC_EA_WRREQ_DRAM_CREDIT_STALL,32) descr="."></metric>
-  <metric name="TCC_TOO_MANY_EA_WRREQS_STALL_sum"                       expr=sum(TCC_TOO_MANY_EA_WRREQS_STALL,32) descr="."></metric>
-  <metric name="TCC_EA_WRREQ_LEVEL_sum"                                 expr=sum(TCC_EA_WRREQ_LEVEL,32) descr="."></metric>
-  <metric name="TCC_EA_RDREQ_LEVEL_sum"                                 expr=sum(TCC_EA_RDREQ_LEVEL,32) descr="."></metric>
-  <metric name="TCC_HOLE_LEVEL_sum"                                     expr=sum(TCC_HOLE_LEVEL,32) descr="."></metric>
-  <metric name="TCC_TCA_LEVEL_sum"                                      expr=sum(TCC_TCA_LEVEL,32) descr="."></metric>
-  <metric name="TCC_EA_ATOMIC_sum"                                      expr=sum(TCC_EA_ATOMIC,32) descr="."></metric>
-  <metric name="TCC_EA_ATOMIC_LEVEL_sum"                                expr=sum(TCC_EA_ATOMIC_LEVEL,32) descr="."></metric>
-  <metric name="TCC_EA_RDREQ_sum"                                       expr=sum(TCC_EA_RDREQ,32) descr="."></metric>
-  <metric name="TCC_EA_RDREQ_32B_sum"                                   expr=sum(TCC_EA_RDREQ_32B,32) descr="."></metric>
-  <metric name="TCC_EA_RD_UNCACHED_32B_sum"                             expr=sum(TCC_EA_RD_UNCACHED_32B,32) descr="."></metric>
-  <metric name="TCC_EA_RDREQ_IO_CREDIT_STALL_sum"                       expr=sum(TCC_EA_RDREQ_IO_CREDIT_STALL,32) descr="."></metric>
-  <metric name="TCC_EA_RDREQ_GMI_CREDIT_STALL_sum"                      expr=sum(TCC_EA_RDREQ_GMI_CREDIT_STALL,32) descr="."></metric>
-  <metric name="TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum"                     expr=sum(TCC_EA_RDREQ_DRAM_CREDIT_STALL,32) descr="."></metric>
-  <metric name="TCC_TAG_WRITEBACK_FIFO_FULL_STALL_sum"                  expr=sum(TCC_TAG_WRITEBACK_FIFO_FULL_STALL,32) descr="."></metric>
-  <metric name="TCC_TAG_MISS_NOTHING_REPLACEABLE_STALL_sum"             expr=sum(TCC_TAG_MISS_NOTHING_REPLACEABLE_STALL,32) descr="."></metric>
-  <metric name="TCC_TAG_UNCACHED_WRITE_ATOMIC_FIFO_FULL_STALL_sum"      expr=sum(TCC_TAG_UNCACHED_WRITE_ATOMIC_FIFO_FULL_STALL,32) descr="."></metric>
-  <metric name="TCC_TAG_NO_UNCACHED_WRITE_ATOMIC_ENTRIES_STALL_sum"     expr=sum(TCC_TAG_NO_UNCACHED_WRITE_ATOMIC_ENTRIES_STALL,32) descr="."></metric>
-  <metric name="TCC_TAG_PROBE_STALL_sum"                                expr=sum(TCC_TAG_PROBE_STALL,32) descr="."></metric>
-  <metric name="TCC_TAG_PROBE_FILTER_STALL_sum"                         expr=sum(TCC_TAG_PROBE_FILTER_STALL,32) descr="."></metric>
-  <metric name="TCC_TAG_PROBE_FIFO_FULL_STALL_sum"                      expr=sum(TCC_TAG_PROBE_FIFO_FULL_STALL,32) descr="."></metric>
-  <metric name="TCC_READ_RETURN_TIMEOUT_sum"                            expr=sum(TCC_READ_RETURN_TIMEOUT,32) descr="."></metric>
-  <metric name="TCC_WRITEBACK_READ_TIMEOUT_sum"                         expr=sum(TCC_WRITEBACK_READ_TIMEOUT,32) descr="."></metric>
-  <metric name="TCC_READ_RETURN_FULL_BUBBLE_sum"                        expr=sum(TCC_READ_RETURN_FULL_BUBBLE,32) descr="."></metric>
-  <metric name="TCC_BUBBLE_sum"                                         expr=sum(TCC_BUBBLE,32) descr="."></metric>
-  <metric name="TCC_RETURN_ACK_sum"                                     expr=sum(TCC_RETURN_ACK,32) descr="."></metric>
-  <metric name="TCC_RETURN_DATA_sum"                                    expr=sum(TCC_RETURN_DATA,32) descr="."></metric>
-  <metric name="TCC_RETURN_HOLE_sum"                                    expr=sum(TCC_RETURN_HOLE,32) descr="."></metric>
-  <metric name="TCC_RETURN_ACK_HOLE_sum"                                expr=sum(TCC_RETURN_ACK_HOLE,32) descr="."></metric>
-  <metric name="TCC_IB_REQ_sum"                                         expr=sum(TCC_IB_REQ,32) descr="."></metric>
-  <metric name="TCC_IB_STALL_sum"                                       expr=sum(TCC_IB_STALL,32) descr="."></metric>
-  <metric name="TCC_IB_TAG_STALL_sum"                                   expr=sum(TCC_IB_TAG_STALL,32) descr="."></metric>
-  <metric name="TCC_EA_RDRET_NACK_sum"                                  expr=sum(TCC_EA_RDRET_NACK,32) descr="."></metric>
-  <metric name="TCC_EA_WRRET_NACK_sum"                                  expr=sum(TCC_EA_WRRET_NACK,32) descr="."></metric>
-  <metric name="TCC_NORMAL_WRITEBACK_sum"                               expr=sum(TCC_NORMAL_WRITEBACK,32) descr="."></metric>
-  <metric name="TCC_TC_OP_WBL2_NC_WRITEBACK_sum"                        expr=sum(TCC_TC_OP_WBL2_NC_WRITEBACK,32) descr="."></metric>
-  <metric name="TCC_TC_OP_WBINVL2_WRITEBACK_sum"                        expr=sum(TCC_TC_OP_WBINVL2_WRITEBACK,32) descr="."></metric>
-  <metric name="TCC_TC_OP_WBINVL2_NC_WRITEBACK_sum"                     expr=sum(TCC_TC_OP_WBINVL2_NC_WRITEBACK,32) descr="."></metric>
-  <metric name="TCC_TC_OP_WBINVL2_SD_WRITEBACK_sum"                     expr=sum(TCC_TC_OP_WBINVL2_SD_WRITEBACK,32) descr="."></metric>
-  <metric name="TCC_ALL_TC_OP_WB_WRITEBACK_sum"                         expr=sum(TCC_ALL_TC_OP_WB_WRITEBACK,32) descr="."></metric>
-  <metric name="TCC_NORMAL_EVICT_sum"                                   expr=sum(TCC_NORMAL_EVICT,32) descr="."></metric>
-  <metric name="TCC_TC_OP_WBL2_NC_EVICT_sum"                            expr=sum(TCC_TC_OP_WBL2_NC_EVICT,32) descr="."></metric>
-  <metric name="TCC_TC_OP_INVL2_NC_EVICT_sum"                           expr=sum(TCC_TC_OP_INVL2_NC_EVICT,32) descr="."></metric>
-  <metric name="TCC_TC_OP_WBINVL2_EVICT_sum"                            expr=sum(TCC_TC_OP_WBINVL2_EVICT,32) descr="."></metric>
-  <metric name="TCC_TC_OP_WBINVL2_NC_EVICT_sum"                         expr=sum(TCC_TC_OP_WBINVL2_NC_EVICT,32) descr="."></metric>
-  <metric name="TCC_TC_OP_WBINVL2_SD_EVICT_sum"                         expr=sum(TCC_TC_OP_WBINVL2_SD_EVICT,32) descr="."></metric>
-  <metric name="TCC_ALL_TC_OP_INV_EVICT_sum"                            expr=sum(TCC_ALL_TC_OP_INV_EVICT,32) descr="."></metric>
-  <metric name="TCC_PROBE_EVICT_sum"                                    expr=sum(TCC_PROBE_EVICT,32) descr="."></metric>
-  <metric name="TCC_TC_OP_WBL2_NC_CYCLE_sum"                            expr=sum(TCC_TC_OP_WBL2_NC_CYCLE,32) descr="."></metric>
-  <metric name="TCC_TC_OP_INVL2_NC_CYCLE_sum"                           expr=sum(TCC_TC_OP_INVL2_NC_CYCLE,32) descr="."></metric>
-  <metric name="TCC_TC_OP_WBINVL2_CYCLE_sum"                            expr=sum(TCC_TC_OP_WBINVL2_CYCLE,32) descr="."></metric>
-  <metric name="TCC_TC_OP_WBINVL2_NC_CYCLE_sum"                         expr=sum(TCC_TC_OP_WBINVL2_NC_CYCLE,32) descr="."></metric>
-  <metric name="TCC_TC_OP_WBINVL2_SD_CYCLE_sum"                         expr=sum(TCC_TC_OP_WBINVL2_SD_CYCLE,32) descr="."></metric>
-  <metric name="TCC_ALL_TC_OP_WB_OR_INV_CYCLE_sum"                      expr=sum(TCC_ALL_TC_OP_WB_OR_INV_CYCLE,32) descr="."></metric>
-  <metric name="TCC_TC_OP_WBL2_NC_START_sum"                            expr=sum(TCC_TC_OP_WBL2_NC_START,32) descr="."></metric>
-  <metric name="TCC_TC_OP_INVL2_NC_START_sum"                           expr=sum(TCC_TC_OP_INVL2_NC_START,32) descr="."></metric>
-  <metric name="TCC_TC_OP_WBINVL2_START_sum"                            expr=sum(TCC_TC_OP_WBINVL2_START,32) descr="."></metric>
-  <metric name="TCC_TC_OP_WBINVL2_NC_START_sum"                         expr=sum(TCC_TC_OP_WBINVL2_NC_START,32) descr="."></metric>
-  <metric name="TCC_TC_OP_WBINVL2_SD_START_sum"                         expr=sum(TCC_TC_OP_WBINVL2_SD_START,32) descr="."></metric>
-  <metric name="TCC_ALL_TC_OP_WB_OR_INV_START_sum"                      expr=sum(TCC_ALL_TC_OP_WB_OR_INV_START,32) descr="."></metric>
-  <metric name="TCC_TC_OP_WBL2_NC_FINISH_sum"                           expr=sum(TCC_TC_OP_WBL2_NC_FINISH,32) descr="."></metric>
-  <metric name="TCC_TC_OP_INVL2_NC_FINISH_sum"                          expr=sum(TCC_TC_OP_INVL2_NC_FINISH,32) descr="."></metric>
-  <metric name="TCC_TC_OP_WBINVL2_FINISH_sum"                           expr=sum(TCC_TC_OP_WBINVL2_FINISH,32) descr="."></metric>
-  <metric name="TCC_TC_OP_WBINVL2_NC_FINISH_sum"                        expr=sum(TCC_TC_OP_WBINVL2_NC_FINISH,32) descr="."></metric>
-  <metric name="TCC_TC_OP_WBINVL2_SD_FINISH_sum"                        expr=sum(TCC_TC_OP_WBINVL2_SD_FINISH,32) descr="."></metric>
-  <metric name="TCC_ALL_TC_OP_WB_OR_INV_FINISH_sum"                     expr=sum(TCC_ALL_TC_OP_WB_OR_INV_FINISH,32) descr="."></metric>
-  <metric name="TCC_PROBE_FILTER_DISABLE_TRANSITION_sum"                expr=sum(TCC_PROBE_FILTER_DISABLE_TRANSITION,32) descr="."></metric>
-  <metric name="TCC_PROBE_FILTER_DISABLED_sum"                          expr=sum(TCC_PROBE_FILTER_DISABLED,32) descr="."></metric>
-  <metric name="TCC_EA_RDREQ_DRAM_sum"                                  expr=sum(TCC_EA_RDREQ_DRAM,32) descr="."></metric>
-  <metric name="TCC_EA_WRREQ_DRAM_sum"                                  expr=sum(TCC_EA_WRREQ_DRAM,32) descr="."></metric>
-  
-  <metric name="TCC_CLIENT42_REQ_sum"                                   expr=sum(TCC_CLIENT42_REQ,32) descr="SQG0-to-TCC requests"></metric>
-  <metric name="TCC_CLIENT43_REQ_sum"                                   expr=sum(TCC_CLIENT43_REQ,32) descr="SQG2-to-TCC requests"></metric>
-  <metric name="TCC_CLIENT45_REQ_sum"                                   expr=sum(TCC_CLIENT45_REQ,32) descr="CPF-2-TCC requests"></metric>
-  <metric name="TCC_CLIENT88_REQ_sum"                                   expr=sum(TCC_CLIENT88_REQ,32) descr="SQG4-to-TCC requests"></metric>
-  <metric name="TCC_CLIENT89_REQ_sum"                                   expr=sum(TCC_CLIENT89_REQ,32) descr="SQG6-TCC requests"></metric>
-  <metric name="TCC_CLIENT91_REQ_sum"                                   expr=sum(TCC_CLIENT91_REQ,32) descr="UTCL2-to-TCC requests"></metric>
-  <metric name="TCC_CLIENT134_REQ_sum"                                  expr=sum(TCC_CLIENT134_REQ,32) descr="SQG1-to-TCC requests"></metric>
-  <metric name="TCC_CLIENT135_REQ_sum"                                  expr=sum(TCC_CLIENT135_REQ,32) descr="SQG3-to-TCC requests"></metric>
-  <metric name="TCC_CLIENT137_REQ_sum"                                  expr=sum(TCC_CLIENT137_REQ,32) descr="RLC-to-TCC requests"></metric>
-  <metric name="TCC_CLIENT180_REQ_sum"                                  expr=sum(TCC_CLIENT180_REQ,32) descr="SQG5-to-TCC requests"></metric>
-  <metric name="TCC_CLIENT181_REQ_sum"                                  expr=sum(TCC_CLIENT181_REQ,32) descr="SQG7-to-TCC requests"></metric>
-  <metric name="TCC_CLIENT182_REQ_sum"                                  expr=sum(TCC_CLIENT182_REQ,32) descr="TPI-to-TCC requests"></metric>
-  <metric name="TCC_CLIENT183_REQ_sum"                                  expr=sum(TCC_CLIENT183_REQ,32) descr="CPG-to-TCC requests"></metric>
-
-
-
-
-</gfx908_expr>
-
-<gfx8 base="gfx8_expr"></gfx8>
-<gfx9 base="gfx9_expr"></gfx9>
-<gfx906 base="gfx906_expr"></gfx906>
-<gfx908 base="gfx908_expr"> </gfx908>
-
-
-<gfx90a base="gfx908_expr"> 
-  #xlu - TD
-  <metric name="TD_SPI_STALL_sum"                                       expr=sum(TD_SPI_STALL,16) descr="."></metric>
-
-  #xlu - TCP
-  <metric name="TCP_WBL2_NC_REQ_sum"                                    expr=sum(TCP_WBL2_NC_REQ,16) descr="."></metric>
-  <metric name="TCP_WBL2_NC_LATENCY_sum"                                expr=sum(TCP_WBL2_NC_LATENCY,16) descr="."></metric>
-  <metric name="TCP_TCR_REQ_XFER128B_COMBINING_sum"                     expr=sum(TCP_TCR_REQ_XFER128B_COMBINING,16) descr="."></metric>
-</gfx90a>
-
-
-<global>
-  # GPUBusy         The percentage of time GPU was busy.
-  <metric
-    name="GPUBusy"
-    descr="The percentage of time GPU was busy."
-    expr=100*GRBM_GUI_ACTIVE/GRBM_COUNT
-  ></metric>
-
-  # Wavefronts      Total wavefronts.
-  <metric
-    name="Wavefronts"
-    descr="Total wavefronts."
-    expr=SQ_WAVES
-  ></metric>
-
-  # VALUInsts       The average number of vector ALU instructions executed per work-item (affected by flow control).
-  <metric
-    name="VALUInsts"
-    descr="The average number of vector ALU instructions executed per work-item (affected by flow control)."
-    expr=SQ_INSTS_VALU/SQ_WAVES
-  ></metric>
-
-  # SALUInsts       The average number of scalar ALU instructions executed per work-item (affected by flow control).
-  <metric
-    name="SALUInsts"
-    descr="The average number of scalar ALU instructions executed per work-item (affected by flow control)."
-    expr=SQ_INSTS_SALU/SQ_WAVES
-  ></metric>
-
-  # VFetchInsts     The average number of vector fetch instructions from the video memory executed per work-item (affected by flow control). Excludes FLAT instructions that fetch from video memory.
-  <metric
-    name="VFetchInsts"
-    descr="The average number of vector fetch instructions from the video memory executed per work-item (affected by flow control). Excludes FLAT instructions that fetch from video memory."
-    expr=(SQ_INSTS_VMEM_RD-TA_FLAT_READ_WAVEFRONTS_sum)/SQ_WAVES
-  ></metric>
-
-  # SFetchInsts     The average number of scalar fetch instructions from the video memory executed per work-item (affected by flow control).
-  <metric
-    name="SFetchInsts"
-    descr="The average number of scalar fetch instructions from the video memory executed per work-item (affected by flow control)."
-    expr=SQ_INSTS_SMEM/SQ_WAVES
-  ></metric>
-
-  # VWriteInsts     The average number of vector write instructions to the video memory executed per work-item (affected by flow control). Excludes FLAT instructions that write to video memory.
-  <metric
-    name="VWriteInsts"
-    descr="The average number of vector write instructions to the video memory executed per work-item (affected by flow control). Excludes FLAT instructions that write to video memory."
-    expr=(SQ_INSTS_VMEM_WR-TA_FLAT_WRITE_WAVEFRONTS_sum)/SQ_WAVES
-  ></metric>
-
-  # FlatVMemInsts   The average number of FLAT instructions that read from or write to the video memory executed per work item (affected by flow control). Includes FLAT instructions that read from or write to scratch.
-  <metric
-    name="FlatVMemInsts"
-    descr="The average number of FLAT instructions that read from or write to the video memory executed per work item (affected by flow control). Includes FLAT instructions that read from or write to scratch."
-    expr=(SQ_INSTS_FLAT-SQ_INSTS_FLAT_LDS_ONLY)/SQ_WAVES
-  ></metric>
-
-  # LDSInsts        The average number of LDS read or LDS write instructions executed per work item (affected by flow control).  Excludes FLAT instructions that read from or write to LDS.
-  <metric
-    name="LDSInsts"
-    descr="The average number of LDS read or LDS write instructions executed per work item (affected by flow control).  Excludes FLAT instructions that read from or write to LDS."
-    expr=(SQ_INSTS_LDS-SQ_INSTS_FLAT_LDS_ONLY)/SQ_WAVES
-  ></metric>
-
-  # FlatLDSInsts    The average number of FLAT instructions that read or write to LDS executed per work item (affected by flow control).
-  <metric
-    name="FlatLDSInsts"
-    descr="The average number of FLAT instructions that read or write to LDS executed per work item (affected by flow control)."
-    expr=SQ_INSTS_FLAT_LDS_ONLY/SQ_WAVES
-  ></metric>
-
-  # GDSInsts        The average number of GDS read or GDS write instructions executed per work item (affected by flow control).
-  <metric
-    name="GDSInsts"
-    descr="The average number of GDS read or GDS write instructions executed per work item (affected by flow control)."
-    expr=SQ_INSTS_GDS/SQ_WAVES
-  ></metric>
-
-  # FetchSize       The total kilobytes fetched from the video memory. This is measured with all extra fetches and any cache or memory effects taken into account.
-  <metric
-    name="FetchSize"
-    descr="The total kilobytes fetched from the video memory. This is measured with all extra fetches and any cache or memory effects taken into account."
-    expr=FETCH_SIZE
-  ></metric>
-
-  # WriteSize       The total kilobytes written to the video memory. This is measured with all extra fetches and any cache or memory effects taken into account.
-  <metric
-    name="WriteSize"
-    descr="The total kilobytes written to the video memory. This is measured with all extra fetches and any cache or memory effects taken into account."
-    expr=WRITE_SIZE
-  ></metric>
-
-  # MemWrites32B    The total number of effective 32B write transactions to the memory
-  <metric
-    name="MemWrites32B"
-    descr="The total number of effective 32B write transactions to the memory"
-    expr=WRITE_REQ_32B
-  ></metric>
-
-  # MemUnitStalled  The percentage of GPUTime the memory unit is stalled. Try reducing the number or size of fetches and writes if possible. Value range: 0% (optimal) to 100% (bad).
-  <metric
-    name="MemUnitStalled"
-    descr="The percentage of GPUTime the memory unit is stalled. Try reducing the number or size of fetches and writes if possible. Value range: 0% (optimal) to 100% (bad)."
-    expr=100*max(TCP_TCP_TA_DATA_STALL_CYCLES,16)/GRBM_GUI_ACTIVE/SE_NUM
-  ></metric>
-
-  # WriteUnitStalled The percentage of GPUTime the Write unit is stalled. Value range: 0% to 100% (bad).
-  <metric
-    name="WriteUnitStalled"
-    descr="The percentage of GPUTime the Write unit is stalled. Value range: 0% to 100% (bad)."
-    expr=100*TCC_WRREQ_STALL_max/GRBM_GUI_ACTIVE
-  ></metric>
-
-  # ALUStalledByLDS The percentage of GPUTime ALU units are stalled by the LDS input queue being full or the output queue being not ready. If there are LDS bank conflicts, reduce them. Otherwise, try reducing the number of LDS accesses if possible. Value range: 0% (optimal) to 100% (bad).
-  <metric
-    name="ALUStalledByLDS"
-    descr="The percentage of GPUTime ALU units are stalled by the LDS input queue being full or the output queue being not ready. If there are LDS bank conflicts, reduce them. Otherwise, try reducing the number of LDS accesses if possible. Value range: 0% (optimal) to 100% (bad)."
-    expr=100*SQ_WAIT_INST_LDS*4/SQ_WAVES/GRBM_GUI_ACTIVE
-  ></metric>
-
-  # LDSBankConflict The percentage of GPUTime LDS is stalled by bank conflicts. Value range: 0% (optimal) to 100% (bad).
-  <metric
-    name="LDSBankConflict"
-    descr="The percentage of GPUTime LDS is stalled by bank conflicts. Value range: 0% (optimal) to 100% (bad)."
-    expr=100*SQ_LDS_BANK_CONFLICT/GRBM_GUI_ACTIVE/CU_NUM
-  ></metric>
-
-  # High level stats
-  <metric
-    name="VALUBusy"
-    descr="The percentage of GPUTime vector ALU instructions are processed. Value range: 0% (bad) to 100% (optimal)."
-    expr=100*SQ_ACTIVE_INST_VALU*4/SIMD_NUM/GRBM_GUI_ACTIVE
-  ></metric>
-  <metric
-    name="SALUBusy"
-    descr="The percentage of GPUTime scalar ALU instructions are processed. Value range: 0% (bad) to 100% (optimal)."
-    expr=100*SQ_INST_CYCLES_SALU*4/SIMD_NUM/GRBM_GUI_ACTIVE
-  ></metric>
-  <metric
-    name="MemUnitBusy"
-    descr="The percentage of GPUTime the memory unit is active. The result includes the stall time (MemUnitStalled). This is measured with all extra fetches and writes and any cache or memory effects taken into account. Value range: 0% to 100% (fetch-bound)."
-    expr=100*TA_BUSY_max/GRBM_GUI_ACTIVE/SE_NUM
-  ></metric>
-
-  # ALU stats
-  <metric
-    name="VALUUtilization"
-    descr="The percentage of active vector ALU threads in a wave. A lower number can mean either more thread divergence in a wave or that the work-group size is not a multiple of 64. Value range: 0% (bad), 100% (ideal - no thread divergence)."
-    expr=100*SQ_THREAD_CYCLES_VALU/(SQ_ACTIVE_INST_VALU*MAX_WAVE_SIZE)
-  ></metric>
-  <metric
-    name="ThreadRate"
-    descr="Threads paralelsim level, how many threads managed per cycle"
-    expr=SQ_ITEMS/SQ_BUSY_CYCLES
-  ></metric>
-  <metric
-    name="WaveRate"
-    descr="Waves paralelsim level, how many waves managed per cycle"
-    expr=SQ_WAVES/SQ_BUSY_CYCLES
-  ></metric>
-  <metric
-    name="PartialWaveRate"
-    descr="Percent of partial waves"
-    expr=100*SQ_WAVES_LT_64/SQ_WAVES
-  ></metric>
-  <metric
-    name="VALUInstrRate"
-    descr="VALU instructions rate"
-    expr=SQ_INSTS_VALU/SQ_BUSY_CYCLES
-  ></metric>
-  <metric
-    name="SALUInstrRate"
-    descr="SALU instructions rate"
-    expr=SQ_INSTS_SALU/SQ_BUSY_CYCLES
-  ></metric>
-  <metric
-    name="InstrStallsRate"
-    descr="Instr Stalls rate"
-    expr=SQ_WAIT_INST_ANY/SQC_DCACHE_BUSY_CYCLES
-  ></metric>
-  <metric
-    name="ALUStallsRate"
-    descr="ALU busy rate"
-    expr=SQ_WAIT_CNT_ANY/SQC_DCACHE_BUSY_CYCLES
-  ></metric>
-
-  # Memory instr rates
-  <metric
-    name="VectMenRdRate"
-    descr="Vector memory reads rate"
-    expr=SQ_INST_CYCLES_VMEM_RD/SQ_BUSY_CYCLES
-  ></metric>
-  <metric
-    name="VectMemWrRate"
-    descr="Vector memory writes rate"
-    expr=SQ_INST_CYCLES_VMEM_WR/SQ_BUSY_CYCLES
-  ></metric>
-  <metric
-    name="ScalMemRdRate"
-    descr="Scalar memory reads rate"
-    expr=SQ_INST_CYCLES_SMEM/SQ_BUSY_CYCLES
-  ></metric>
-
-  # Memory subsystem stats
-  # ICache and ScalCache(DCache) stats
-  <metric
-    name="ICacheHit"
-    descr="Instruction cache hit-rate"
-    expr=SQC_ICACHE_HITS/SQC_ICACHE_REQ
-  ></metric>
-  <metric
-    name="ICacheRate"
-    descr="Instruction cache requests rate"
-    expr=SQC_ICACHE_REQ/SQC_ICACHE_BUSY_CYCLES
-  ></metric>
-  <metric
-    name="DCacheHit"
-    descr="Constant cache hit-rate"
-    expr=SQC_DCACHE_HITS/SQC_DCACHE_REQ
-  ></metric>
-  <metric
-    name="DcacheRate"
-    descr="Constant cache requests rate"
-    expr=SQC_DCACHE_REQ/SQC_DCACHE_BUSY_CYCLES
-  ></metric>
-
-  # L1/L2 caches stats
-  <metric
-    name="L1CacheHit"
-    descr="L1 TCP cache hit-rate"
-    expr=1-((sum(TCP_TCC_READ_REQ,16)+sum(TCP_TCC_WRITE_REQ,16))/sum(TCP_TOTAL_CACHE_ACCESSES,16))
-  ></metric>
-  <metric
-    name="L1CacheBW"
-    descr="L1 TCP cache bandwidth"
-    expr=sum(TCP_TOTAL_CACHE_ACCESSES,16)*64/TA_BUSY_avr
-  ></metric>
-  <metric
-    name="L2CacheHit"
-    descr="L2 cache hit-rate"
-    expr=TCC_HIT_sum/(TCC_HIT_sum+TCC_MISS_sum)
-  ></metric>
-  <metric
-    name="L2CacheBW"
-    descr="L2 TCC cache bandwidth"
-    expr=(TCC_HIT_sum+TCC_MISS_sum)*64/TCC_BUSY_avr
-  ></metric>
-  <metric
-    name="L2ChanEfficiency"
-    descr="L2 TCC channel efficiency"
-    expr=TCC_REQ_sum/TCC_BUSY_avr
-  ></metric>
-
-  # Memory latencies
-  <metric
-    name="L1Wavelatency"
-    descr="L1 TCP wave start/end latency"
-    expr=sum(TCP_TCP_LATENCY,16)/sum(TCP_TA_TCP_STATE_READ,16)
-  ></metric>
-  <metric
-    name="L1ToL2RdLatency"
-    descr="L1 to L2 (TCP to TCC) read latency"
-    expr=sum(TCP_TCC_READ_REQ_LATENCY,16)/sum(TCP_TCC_READ_REQ,16)
-  ></metric>
-  #<metric
-  #  name="L2ToDRAMRdLatency"
-  #  descr="L2 TCC issued memory read requests latency"
-  #  expr=sum(TCC_EA_RDREQ_LEVEL,16)/sum(TCC_EA_RDREQ_sum)
-  #></metric>
-  #<metric
-  #  name="L2ToDRAMWrLatency"
-  #  descr="L2 TCC issued memory write requests latency"
-  #  expr=sum(TCC_EA_WRREQ_LEVEL,16)/sum(TCC_EA_WRREQ_sum)
-  #></metric>
-
-  # DRAM bandwidth
-  <metric
-    name="DramRdBW"
-    descr="DRAM read bandwidth"
-    expr=FETCH_SIZE/TCC_BUSY_avr
-  ></metric>
-  <metric
-    name="DramWrBW"
-    descr="DRAM write bandwidth"
-    expr=WRITE_SIZE/TCC_BUSY_avr
-  ></metric>
-
-</global>
diff --git a/src/perfmon_pub/mi100/pmc_ta_perf.txt b/src/perfmon_pub/mi100/pmc_ta_perf.txt
index 851f22400d..938076de7b 100644
--- a/src/perfmon_pub/mi100/pmc_ta_perf.txt
+++ b/src/perfmon_pub/mi100/pmc_ta_perf.txt
@@ -1,22 +1,11 @@
 pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES 
 
-pmc: TA_TA_BUSY_sum                      TA_SH_FIFO_BUSY_sum                 
-pmc: TA_SH_FIFO_CMD_BUSY_sum             TA_SH_FIFO_ADDR_BUSY_sum            
-pmc: TA_SH_FIFO_DATA_BUSY_sum            TA_SH_FIFO_DATA_SFIFO_BUSY_sum      
-pmc: TA_SH_FIFO_DATA_TFIFO_BUSY_sum      TA_SQ_TA_CMD_CYCLES_sum             
-pmc: TA_SP_TA_ADDR_CYCLES_sum            TA_SP_TA_DATA_CYCLES_sum 
-
-
-# Starvation
-pmc: TA_SH_FIFO_ADDR_STARVED_WHILE_BUSY_CYCLES_sum          TA_SH_FIFO_CMD_STARVED_WHILE_BUSY_CYCLES_sum
-pmc: TA_SH_FIFO_DATA_STARVED_WHILE_BUSY_CYCLES_sum          TA_TA_SH_FIFO_STARVED_sum
-
-
+pmc: TA_TA_BUSY_sum
 
 # buffer access
 pmc: TA_BUFFER_WAVEFRONTS_sum                   TA_BUFFER_READ_WAVEFRONTS_sum
 pmc: TA_BUFFER_WRITE_WAVEFRONTS_sum             TA_BUFFER_ATOMIC_WAVEFRONTS_sum
-pmc: TA_BUFFER_TOTAL_CYCLES_sum                 TA_BUFFER_COALESCABLE_WAVEFRONTS_sum
+pmc: TA_BUFFER_TOTAL_CYCLES_sum                 
 pmc: TA_BUFFER_COALESCED_READ_CYCLES_sum        TA_BUFFER_COALESCED_WRITE_CYCLES_sum
 
 
@@ -26,8 +15,7 @@ pmc: TA_ADDR_STALLED_BY_TD_CYCLES_sum    TA_DATA_STALLED_BY_TC_CYCLES_sum
 
 # flat accesses
 pmc: TA_FLAT_WAVEFRONTS_sum              TA_FLAT_READ_WAVEFRONTS_sum         
-pmc: TA_FLAT_WRITE_WAVEFRONTS_sum        TA_FLAT_ATOMIC_WAVEFRONTS_sum       
-pmc: TA_FLAT_COALESCEABLE_WAVEFRONTS_sum 
+pmc: TA_FLAT_WRITE_WAVEFRONTS_sum        TA_FLAT_ATOMIC_WAVEFRONTS_sum
 
 
 range: 
diff --git a/src/perfmon_pub/mi200/pmc_ta_perf.txt b/src/perfmon_pub/mi200/pmc_ta_perf.txt
index 851f22400d..45dc9d7bf1 100644
--- a/src/perfmon_pub/mi200/pmc_ta_perf.txt
+++ b/src/perfmon_pub/mi200/pmc_ta_perf.txt
@@ -1,22 +1,11 @@
 pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES 
 
-pmc: TA_TA_BUSY_sum                      TA_SH_FIFO_BUSY_sum                 
-pmc: TA_SH_FIFO_CMD_BUSY_sum             TA_SH_FIFO_ADDR_BUSY_sum            
-pmc: TA_SH_FIFO_DATA_BUSY_sum            TA_SH_FIFO_DATA_SFIFO_BUSY_sum      
-pmc: TA_SH_FIFO_DATA_TFIFO_BUSY_sum      TA_SQ_TA_CMD_CYCLES_sum             
-pmc: TA_SP_TA_ADDR_CYCLES_sum            TA_SP_TA_DATA_CYCLES_sum 
-
-
-# Starvation
-pmc: TA_SH_FIFO_ADDR_STARVED_WHILE_BUSY_CYCLES_sum          TA_SH_FIFO_CMD_STARVED_WHILE_BUSY_CYCLES_sum
-pmc: TA_SH_FIFO_DATA_STARVED_WHILE_BUSY_CYCLES_sum          TA_TA_SH_FIFO_STARVED_sum
-
-
+pmc: TA_TA_BUSY_sum
 
 # buffer access
 pmc: TA_BUFFER_WAVEFRONTS_sum                   TA_BUFFER_READ_WAVEFRONTS_sum
 pmc: TA_BUFFER_WRITE_WAVEFRONTS_sum             TA_BUFFER_ATOMIC_WAVEFRONTS_sum
-pmc: TA_BUFFER_TOTAL_CYCLES_sum                 TA_BUFFER_COALESCABLE_WAVEFRONTS_sum
+pmc: TA_BUFFER_TOTAL_CYCLES_sum
 pmc: TA_BUFFER_COALESCED_READ_CYCLES_sum        TA_BUFFER_COALESCED_WRITE_CYCLES_sum
 
 
@@ -27,7 +16,6 @@ pmc: TA_ADDR_STALLED_BY_TD_CYCLES_sum    TA_DATA_STALLED_BY_TC_CYCLES_sum
 # flat accesses
 pmc: TA_FLAT_WAVEFRONTS_sum              TA_FLAT_READ_WAVEFRONTS_sum         
 pmc: TA_FLAT_WRITE_WAVEFRONTS_sum        TA_FLAT_ATOMIC_WAVEFRONTS_sum       
-pmc: TA_FLAT_COALESCEABLE_WAVEFRONTS_sum 
 
 
 range: 
diff --git a/src/perfmon_pub/mi50/pmc_ta_perf.txt b/src/perfmon_pub/mi50/pmc_ta_perf.txt
index 851f22400d..9c6fa835c4 100644
--- a/src/perfmon_pub/mi50/pmc_ta_perf.txt
+++ b/src/perfmon_pub/mi50/pmc_ta_perf.txt
@@ -1,22 +1,11 @@
 pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES 
 
-pmc: TA_TA_BUSY_sum                      TA_SH_FIFO_BUSY_sum                 
-pmc: TA_SH_FIFO_CMD_BUSY_sum             TA_SH_FIFO_ADDR_BUSY_sum            
-pmc: TA_SH_FIFO_DATA_BUSY_sum            TA_SH_FIFO_DATA_SFIFO_BUSY_sum      
-pmc: TA_SH_FIFO_DATA_TFIFO_BUSY_sum      TA_SQ_TA_CMD_CYCLES_sum             
-pmc: TA_SP_TA_ADDR_CYCLES_sum            TA_SP_TA_DATA_CYCLES_sum 
-
-
-# Starvation
-pmc: TA_SH_FIFO_ADDR_STARVED_WHILE_BUSY_CYCLES_sum          TA_SH_FIFO_CMD_STARVED_WHILE_BUSY_CYCLES_sum
-pmc: TA_SH_FIFO_DATA_STARVED_WHILE_BUSY_CYCLES_sum          TA_TA_SH_FIFO_STARVED_sum
-
-
+pmc: TA_TA_BUSY_sum                     
 
 # buffer access
 pmc: TA_BUFFER_WAVEFRONTS_sum                   TA_BUFFER_READ_WAVEFRONTS_sum
 pmc: TA_BUFFER_WRITE_WAVEFRONTS_sum             TA_BUFFER_ATOMIC_WAVEFRONTS_sum
-pmc: TA_BUFFER_TOTAL_CYCLES_sum                 TA_BUFFER_COALESCABLE_WAVEFRONTS_sum
+pmc: TA_BUFFER_TOTAL_CYCLES_sum                 
 pmc: TA_BUFFER_COALESCED_READ_CYCLES_sum        TA_BUFFER_COALESCED_WRITE_CYCLES_sum
 
 
@@ -26,8 +15,7 @@ pmc: TA_ADDR_STALLED_BY_TD_CYCLES_sum    TA_DATA_STALLED_BY_TC_CYCLES_sum
 
 # flat accesses
 pmc: TA_FLAT_WAVEFRONTS_sum              TA_FLAT_READ_WAVEFRONTS_sum         
-pmc: TA_FLAT_WRITE_WAVEFRONTS_sum        TA_FLAT_ATOMIC_WAVEFRONTS_sum       
-pmc: TA_FLAT_COALESCEABLE_WAVEFRONTS_sum 
+pmc: TA_FLAT_WRITE_WAVEFRONTS_sum        TA_FLAT_ATOMIC_WAVEFRONTS_sum 
 
 
 range: