P4 to Git Change 1102960 by gandryey@gera-dev-w7 on 2014/12/05 10:51:47
EPR #410824 - [CQE OCL][CZ][S/G][QR] Two Bolt sample failing on CPU; Faulty CL: 1101352 - The test performs double maps with different map flags. Optimization could choose different map schemes for each call and memory coherency could be broken. Add extra conditions to detect multiple maps and use the same path as the first map. Affected files ... ... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gpumemory.hpp#45 edit
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@@ -205,8 +205,15 @@ public:
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//! will cause a switch to indirect map for MAP_READ operations
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bool isDirectMap(uint mapFlags)
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{
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return (isCacheable() || (owner()->getMemFlags() & CL_MEM_ALLOC_HOST_PTR) ||
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!isHostMemDirectAccess() || !(mapFlags & CL_MAP_READ));
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return (((isCacheable() || (owner()->getMemFlags() & CL_MEM_ALLOC_HOST_PTR) ||
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!isHostMemDirectAccess() || !(mapFlags & CL_MAP_READ)) &&
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// If map(indirect) memory isn't NULL,
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// then it's a double map from the app with different map flags.
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// If runtime will provide different regions,
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// then it won't be able to guarantee coherency
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(mapMemory_ == NULL)) ||
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// Keep direct map always if the first map was direct already
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((indirectMapCount_ > 1) && (mapMemory_ == NULL)));
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}
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protected:
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