diff --git a/tests/amd_smi_test/functional/frequencies_read.cc b/tests/amd_smi_test/functional/frequencies_read.cc
index 7e211a1a74..e5ac6c955e 100755
--- a/tests/amd_smi_test/functional/frequencies_read.cc
+++ b/tests/amd_smi_test/functional/frequencies_read.cc
@@ -138,11 +138,11 @@ void TestFrequenciesRead::Run(void) {
 
       PrintDeviceHeader(device_handles_[i]);
 
-      freq_output(CLOCK_TYPE_MEM, "Supported GPU Memory");
-      freq_output(CLOCK_TYPE_SYS, "Supported GPU");
-      freq_output(CLOCK_TYPE_DF, "Data Fabric Clock");
-      freq_output(CLOCK_TYPE_DCEF, "Display Controller Engine Clock");
-      freq_output(CLOCK_TYPE_SOC, "SOC Clock");
+      freq_output(CLK_TYPE_MEM, "Supported GPU Memory");
+      freq_output(CLK_TYPE_SYS, "Supported GPU");
+      freq_output(CLK_TYPE_DF, "Data Fabric Clock");
+      freq_output(CLK_TYPE_DCEF, "Display Controller Engine Clock");
+      freq_output(CLK_TYPE_SOC, "SOC Clock");
 
       err = amdsmi_dev_pci_bandwidth_get(device_handles_[i], &b);
       if (err == AMDSMI_STATUS_NOT_SUPPORTED) {
diff --git a/tests/amd_smi_test/functional/frequencies_read_write.cc b/tests/amd_smi_test/functional/frequencies_read_write.cc
index b932d66feb..745e2d2a0c 100755
--- a/tests/amd_smi_test/functional/frequencies_read_write.cc
+++ b/tests/amd_smi_test/functional/frequencies_read_write.cc
@@ -104,14 +104,14 @@ void TestFrequenciesReadWrite::Run(void) {
   for (uint32_t dv_ind = 0; dv_ind < num_monitor_devs(); ++dv_ind) {
     PrintDeviceHeader(device_handles_[dv_ind]);
 
-    for (uint32_t clk = (uint32_t)CLOCK_TYPE_FIRST;
-                                           clk <= CLOCK_TYPE__MAX; ++clk) {
+    for (uint32_t clk = (uint32_t)CLK_TYPE_FIRST;
+                                           clk <= CLK_TYPE__MAX; ++clk) {
       amdsmi_clk = (amdsmi_clk_type)clk;
 
       auto freq_read = [&]() -> bool {
-        // Skip CLOCK_TYPE_PCIE, which does not supported in rocm-smi.
+        // Skip CLK_TYPE_PCIE, which does not supported in rocm-smi.
         std::cout << amdsmi_clk << std::endl;
-        if (amdsmi_clk == CLOCK_TYPE_PCIE)
+        if (amdsmi_clk == CLK_TYPE_PCIE)
           return false;
         ret = amdsmi_dev_gpu_clk_freq_get(device_handles_[dv_ind], amdsmi_clk, &f);
         std::cout << ret << std::endl;
@@ -133,8 +133,8 @@ void TestFrequenciesReadWrite::Run(void) {
       auto freq_write = [&]() {
         // Set clocks to something other than the usual default of the lowest
         // frequency.
-        // Skip CLOCK_TYPE_PCIE, which does not supported in rocm-smi.
-        if (amdsmi_clk == CLOCK_TYPE_PCIE)
+        // Skip CLK_TYPE_PCIE, which does not supported in rocm-smi.
+        if (amdsmi_clk == CLK_TYPE_PCIE)
           return;
 
         freq_bitmask = 0b01100;  // Try the 3rd and 4th clocks
diff --git a/tests/amd_smi_test/functional/mutual_exclusion.cc b/tests/amd_smi_test/functional/mutual_exclusion.cc
index c93b7a6f0f..b1f83e8b15 100755
--- a/tests/amd_smi_test/functional/mutual_exclusion.cc
+++ b/tests/amd_smi_test/functional/mutual_exclusion.cc
@@ -239,7 +239,7 @@ void TestMutualExclusion::Run(void) {
     CHECK_RET(ret, AMDSMI_STATUS_BUSY);
     ret = amdsmi_dev_overdrive_level_get(device_handles_[0], &dmy_ui32);
     CHECK_RET(ret, AMDSMI_STATUS_BUSY);
-    ret = amdsmi_dev_gpu_clk_freq_get(device_handles_[0], CLOCK_TYPE_SYS, &dmy_freqs);
+    ret = amdsmi_dev_gpu_clk_freq_get(device_handles_[0], CLK_TYPE_SYS, &dmy_freqs);
     CHECK_RET(ret, AMDSMI_STATUS_BUSY);
     ret = amdsmi_dev_od_volt_info_get(device_handles_[0], &dmy_od_volt);
     CHECK_RET(ret, AMDSMI_STATUS_BUSY);
@@ -247,7 +247,7 @@ void TestMutualExclusion::Run(void) {
     CHECK_RET(ret, AMDSMI_STATUS_BUSY);
     ret = amdsmi_dev_overdrive_level_set_v1(device_handles_[0], dmy_i32);
     CHECK_RET(ret, AMDSMI_STATUS_BUSY);
-    ret = amdsmi_dev_gpu_clk_freq_set(device_handles_[0], CLOCK_TYPE_SYS, 0);
+    ret = amdsmi_dev_gpu_clk_freq_set(device_handles_[0], CLK_TYPE_SYS, 0);
     CHECK_RET(ret, AMDSMI_STATUS_BUSY);
     ret = amdsmi_dev_ecc_count_get(device_handles_[0], AMDSMI_GPU_BLOCK_UMC, &dmy_err_cnt);
     CHECK_RET(ret, AMDSMI_STATUS_BUSY);
diff --git a/tests/amd_smi_test/test_common.cc b/tests/amd_smi_test/test_common.cc
index 3c06b9657b..d1f890caa3 100644
--- a/tests/amd_smi_test/test_common.cc
+++ b/tests/amd_smi_test/test_common.cc
@@ -215,19 +215,19 @@ const std::string GetVoltSensorNameStr(amdsmi_voltage_type_t st) {
   return kVoltSensorNameMap.at(st);
 }
 const char *FreqEnumToStr(amdsmi_clk_type amdsmi_clk) {
-  static_assert(CLOCK_TYPE__MAX == CLOCK_TYPE_DCLK1,
+  static_assert(CLK_TYPE__MAX == CLK_TYPE_DCLK1,
                                        "FreqEnumToStr() needs to be updated");
   switch (amdsmi_clk) {
-    case CLOCK_TYPE_SYS:  return "System clock";
-    case CLOCK_TYPE_DF:   return "Data Fabric clock";
-    case CLOCK_TYPE_DCEF: return "Display Controller Engine clock";
-    case CLOCK_TYPE_SOC:  return "SOC clock";
-    case CLOCK_TYPE_MEM:  return "Memory clock";
-    case CLOCK_TYPE_PCIE:  return "PCIE clock";
-    case CLOCK_TYPE_VCLK0:  return "VCLK0 clock";
-    case CLOCK_TYPE_VCLK1:  return "VCLK1 clock";
-    case CLOCK_TYPE_DCLK0:  return "DCLK0 clock";
-    case CLOCK_TYPE_DCLK1:  return "DCLK1 clock";
+    case CLK_TYPE_SYS:  return "System clock";
+    case CLK_TYPE_DF:   return "Data Fabric clock";
+    case CLK_TYPE_DCEF: return "Display Controller Engine clock";
+    case CLK_TYPE_SOC:  return "SOC clock";
+    case CLK_TYPE_MEM:  return "Memory clock";
+    case CLK_TYPE_PCIE:  return "PCIE clock";
+    case CLK_TYPE_VCLK0:  return "VCLK0 clock";
+    case CLK_TYPE_VCLK1:  return "VCLK1 clock";
+    case CLK_TYPE_DCLK0:  return "DCLK0 clock";
+    case CLK_TYPE_DCLK1:  return "DCLK1 clock";
     default: return "Invalid Clock ID";
   }
 }