[SWDEV-483526] Fix MI3x partitions not showing all logical nodes

Changes:
- Updates to amdsmi_asic_info_t structure to include:
  target_graphics_version, kfd_id, node_id, partition_id
- Updates to amd-smi static --asic to display new
  samdsmi_asic_info_t fields
- Updates to gpu enumeration during amdsmi_init()
  to discover all logical GPUs when in a non-SPX mode
  (ex. DPX, TPX, QPX, or CPX)
 - Updates to amdsmi_get_gpu_bdf_id(..) to include
   partition_id details when in BDF or optional bits.
     - bits [63:32] = domain
     - bits [31:28] or bits [2:0] = partition id
     - bits [27:16] = reserved
     - bits [15:8]  = Bus
     - bits [7:3] = Device
     - bits [2:0] = Function (partition id maybe in bits [2:0]) <-- Fallback for non SPX modes

- C++/Python tests updated to reflect these outputs

Change-Id: I4be0ea35bb98f3109ae2ca9e82f6b21baa38de29
Signed-off-by: Charis Poag <Charis.Poag@amd.com>

py-interface/amdsmi_interface.py

@@ -1664,7 +1664,11 @@ def amdsmi_get_gpu_asic_info(
         "rev_id": _padHexValue(hex(asic_info_struct.rev_id), 2),
         "asic_serial": asic_info_struct.asic_serial.decode("utf-8"),
         "oam_id": asic_info_struct.oam_id,
-        "num_compute_units": asic_info_struct.num_of_compute_units
+        "num_compute_units": asic_info_struct.num_of_compute_units,
+        "target_graphics_version": "gfx" + str(asic_info_struct.target_graphics_version),
+        "kfd_id": asic_info_struct.kfd_id,
+        "node_id": asic_info_struct.node_id,
+        "partition_id": asic_info_struct.partition_id
     }
 
     string_values = ["market_name", "vendor_name"]

py-interface/amdsmi_wrapper.py

@@ -380,18 +380,18 @@ amdsmi_clk_type_t = ctypes.c_uint32 # enum
 # values for enumeration 'amdsmi_compute_partition_type_t'
 amdsmi_compute_partition_type_t__enumvalues = {
     0: 'AMDSMI_COMPUTE_PARTITION_INVALID',
-    1: 'AMDSMI_COMPUTE_PARTITION_CPX',
-    2: 'AMDSMI_COMPUTE_PARTITION_SPX',
-    3: 'AMDSMI_COMPUTE_PARTITION_DPX',
-    4: 'AMDSMI_COMPUTE_PARTITION_TPX',
-    5: 'AMDSMI_COMPUTE_PARTITION_QPX',
+    1: 'AMDSMI_COMPUTE_PARTITION_SPX',
+    2: 'AMDSMI_COMPUTE_PARTITION_DPX',
+    3: 'AMDSMI_COMPUTE_PARTITION_TPX',
+    4: 'AMDSMI_COMPUTE_PARTITION_QPX',
+    5: 'AMDSMI_COMPUTE_PARTITION_CPX',
 }
 AMDSMI_COMPUTE_PARTITION_INVALID = 0
-AMDSMI_COMPUTE_PARTITION_CPX = 1
-AMDSMI_COMPUTE_PARTITION_SPX = 2
-AMDSMI_COMPUTE_PARTITION_DPX = 3
-AMDSMI_COMPUTE_PARTITION_TPX = 4
-AMDSMI_COMPUTE_PARTITION_QPX = 5
+AMDSMI_COMPUTE_PARTITION_SPX = 1
+AMDSMI_COMPUTE_PARTITION_DPX = 2
+AMDSMI_COMPUTE_PARTITION_TPX = 3
+AMDSMI_COMPUTE_PARTITION_QPX = 4
+AMDSMI_COMPUTE_PARTITION_CPX = 5
 amdsmi_compute_partition_type_t = ctypes.c_uint32 # enum
 
 # values for enumeration 'amdsmi_memory_partition_type_t'
@@ -902,7 +902,13 @@ struct_amdsmi_asic_info_t._fields_ = [
     ('asic_serial', ctypes.c_char * 32),
     ('oam_id', ctypes.c_uint32),
     ('num_of_compute_units', ctypes.c_uint32),
+    ('PADDING_0', ctypes.c_ubyte * 4),
+    ('target_graphics_version', ctypes.c_uint64),
+    ('kfd_id', ctypes.c_uint64),
+    ('node_id', ctypes.c_uint32),
+    ('partition_id', ctypes.c_uint32),
     ('reserved', ctypes.c_uint32 * 17),
+    ('PADDING_1', ctypes.c_ubyte * 4),
 ]
 
 amdsmi_asic_info_t = struct_amdsmi_asic_info_t