2.9.6-1
Add support for CUDA graphs. Fuse BCM Gen4 switches to avoid suboptimal performance on some platforms. Issue #439. Fix bootstrap issue caused by connection reordering. Fix CPU locking block. Improve CollNet algorithm. Improve performance on DGX A100 for communicators with only one GPU per node.
Šī revīzija ir iekļauta:
+10
-5
@@ -1,5 +1,5 @@
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/*************************************************************************
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* Copyright (c) 2016-2020, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2016-2021, NVIDIA CORPORATION. All rights reserved.
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*
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* See LICENSE.txt for license information
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************************************************************************/
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@@ -47,11 +47,12 @@ static ncclResult_t ncclGpuGdrSupport(int* gdrSupport) {
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ncclNetHandle_t handle;
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void* gpuPtr = NULL;
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void* mHandle = NULL;
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NCCLCHECK(ncclNetListen(dev, &handle, &lComm));
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NCCLCHECK(ncclNetConnect(dev, &handle, &sComm));
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NCCLCHECK(ncclNetAccept(lComm, &rComm));
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CUDACHECK(cudaMalloc(&gpuPtr, GPU_BUF_SIZE));
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ncclResult_t ret;
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ncclDebugNoWarn = NCCL_NET;
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NCCLCHECKGOTO(ncclNetListen(dev, &handle, &lComm), ret, cleanup1);
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NCCLCHECKGOTO(ncclNetConnect(dev, &handle, &sComm), ret, cleanup2);
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NCCLCHECKGOTO(ncclNetAccept(lComm, &rComm), ret, cleanup3);
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CUDACHECKGOTO(cudaMalloc(&gpuPtr, GPU_BUF_SIZE), ret, cleanup4);
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if (ncclNetRegMr(sComm, gpuPtr, GPU_BUF_SIZE, NCCL_PTR_CUDA, &mHandle) == ncclSuccess) {
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NCCLCHECK(ncclNetDeregMr(sComm, mHandle));
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NCCLCHECK(ncclNetRegMr(rComm, gpuPtr, GPU_BUF_SIZE, NCCL_PTR_CUDA, &mHandle));
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@@ -60,9 +61,13 @@ static ncclResult_t ncclGpuGdrSupport(int* gdrSupport) {
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}
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ncclDebugNoWarn = 0;
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CUDACHECK(cudaFree(gpuPtr));
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cleanup4:
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NCCLCHECK(ncclNetCloseRecv(rComm));
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cleanup3:
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NCCLCHECK(ncclNetCloseSend(sComm));
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cleanup2:
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NCCLCHECK(ncclNetCloseListen(lComm));
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cleanup1:
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break;
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}
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return ncclSuccess;
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