SWDEV-409299 - Vega clinfo is not working

Change-Id: Ia48bc6f130bd102dff210b105de6f9c02ebbe012 [ROCm/clr commit: 7912f3af89]
2023-07-06 16:13:14 -04:00
parent 41381e9557
commit a7418845f8
3 changed files with 14 additions and 3 deletions
@@ -95,7 +95,9 @@ const char* BlitLinearSourceCode = BLIT_KERNELS(
                                                   ulong4 srcRect, ulong4 dstRect, ulong4 size) {
    __amd_copyBufferRectAligned(src, dst, srcRect, dstRect, size);
  }
+);

+const char* HipExtraSourceCode = BLIT_KERNELS(
  __kernel void __amd_rocclr_streamOpsWrite(__global uint* ptrInt, __global ulong* ptrUlong,
                                            ulong value, ulong sizeBytes) {
    __amd_streamOpsWrite(ptrInt, ptrUlong, value, sizeBytes);