diff --git a/runtime/hsa-runtime/CMakeLists.txt b/runtime/hsa-runtime/CMakeLists.txt index 6a047c1855..f11345d209 100644 --- a/runtime/hsa-runtime/CMakeLists.txt +++ b/runtime/hsa-runtime/CMakeLists.txt @@ -228,6 +228,7 @@ if(${IMAGE_SUPPORT}) image/addrlib/src/r800/siaddrlib.cpp image/addrlib/src/gfx9/gfx9addrlib.cpp image/addrlib/src/gfx10/gfx10addrlib.cpp + image/addrlib/src/gfx11/gfx11addrlib.cpp image/device_info.cpp image/hsa_ext_image.cpp image/image_runtime.cpp @@ -255,9 +256,11 @@ if(${IMAGE_SUPPORT}) ${CMAKE_CURRENT_SOURCE_DIR}/image/addrlib/src/r800 ${CMAKE_CURRENT_SOURCE_DIR}/image/addrlib/src/gfx9 ${CMAKE_CURRENT_SOURCE_DIR}/image/addrlib/src/gfx10 + ${CMAKE_CURRENT_SOURCE_DIR}/image/addrlib/src/gfx11 ${CMAKE_CURRENT_SOURCE_DIR}/image/addrlib/src/chip/r800 ${CMAKE_CURRENT_SOURCE_DIR}/image/addrlib/src/chip/gfx9 - ${CMAKE_CURRENT_SOURCE_DIR}/image/addrlib/src/chip/gfx10 ) + ${CMAKE_CURRENT_SOURCE_DIR}/image/addrlib/src/chip/gfx10 + ${CMAKE_CURRENT_SOURCE_DIR}/image/addrlib/src/chip/gfx11 ) target_sources( ${CORE_RUNTIME_TARGET} PRIVATE ${IMAGE_SRCS} ) diff --git a/runtime/hsa-runtime/image/addrlib/inc/addrinterface.h b/runtime/hsa-runtime/image/addrlib/inc/addrinterface.h index 517be64fdb..5260426b68 100644 --- a/runtime/hsa-runtime/image/addrlib/inc/addrinterface.h +++ b/runtime/hsa-runtime/image/addrlib/inc/addrinterface.h @@ -1,28 +1,27 @@ /* - * Copyright © 2007-2019 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ +************************************************************************************************************************ +* +* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +* OTHER DEALINGS IN THE SOFTWARE +* +***********************************************************************************************************************/ /** **************************************************************************************************** @@ -33,6 +32,7 @@ #ifndef __ADDR_INTERFACE_H__ #define __ADDR_INTERFACE_H__ +// Includes should be before extern "C" #include "addrtypes.h" namespace rocr { @@ -174,6 +174,7 @@ typedef struct _ADDR_EQUATION ///< stacked vertically prior to swizzling } ADDR_EQUATION; + /** **************************************************************************************************** * @brief Alloc system memory flags. @@ -305,8 +306,9 @@ typedef union _ADDR_CREATE_FLAGS UINT_32 useHtileSliceAlign : 1; ///< Do htile single slice alignment UINT_32 allowLargeThickTile : 1; ///< Allow 64*thickness*bytesPerPixel > rowSize UINT_32 forceDccAndTcCompat : 1; ///< Force enable DCC and TC compatibility - UINT_32 nonPower2MemConfig : 1; ///< Physical video memory size is not power of 2 - UINT_32 reserved : 23; ///< Reserved bits for future use + UINT_32 nonPower2MemConfig : 1; ///< Video memory bit width is not power of 2 + UINT_32 enableAltTiling : 1; ///< Enable alt tile mode + UINT_32 reserved : 22; ///< Reserved bits for future use }; UINT_32 value; @@ -404,6 +406,8 @@ ADDR_E_RETURNCODE ADDR_API AddrCreate( const ADDR_CREATE_INPUT* pAddrCreateIn, ADDR_CREATE_OUTPUT* pAddrCreateOut); + + /** **************************************************************************************************** * AddrDestroy @@ -418,6 +422,8 @@ ADDR_E_RETURNCODE ADDR_API AddrCreate( ADDR_E_RETURNCODE ADDR_API AddrDestroy( ADDR_HANDLE hLib); + + //////////////////////////////////////////////////////////////////////////////////////////////////// // Surface functions //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -649,6 +655,8 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceInfo( const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut); + + /** **************************************************************************************************** * ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT @@ -737,6 +745,8 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceAddrFromCoord( const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut); + + /** **************************************************************************************************** * ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT @@ -918,6 +928,8 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeHtileInfo( const ADDR_COMPUTE_HTILE_INFO_INPUT* pIn, ADDR_COMPUTE_HTILE_INFO_OUTPUT* pOut); + + /** **************************************************************************************************** * ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT @@ -980,6 +992,8 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeHtileAddrFromCoord( const ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn, ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut); + + /** **************************************************************************************************** * ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT @@ -1040,6 +1054,8 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeHtileCoordFromAddr( const ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn, ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut); + + //////////////////////////////////////////////////////////////////////////////////////////////////// // C-mask functions //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -1127,6 +1143,8 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskInfo( const ADDR_COMPUTE_CMASK_INFO_INPUT* pIn, ADDR_COMPUTE_CMASK_INFO_OUTPUT* pOut); + + /** **************************************************************************************************** * ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT @@ -1187,6 +1205,8 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskAddrFromCoord( const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn, ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut); + + /** **************************************************************************************************** * ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT @@ -1245,6 +1265,8 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskCoordFromAddr( const ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT* pIn, ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT* pOut); + + //////////////////////////////////////////////////////////////////////////////////////////////////// // F-mask functions //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -1325,6 +1347,8 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskInfo( const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut); + + /** **************************************************************************************************** * ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT @@ -1401,6 +1425,8 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskAddrFromCoord( const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut); + + /** **************************************************************************************************** * ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT @@ -1474,6 +1500,8 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskCoordFromAddr( const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut); + + //////////////////////////////////////////////////////////////////////////////////////////////////// // Element/utility functions //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -1562,6 +1590,7 @@ ADDR_E_RETURNCODE ADDR_API AddrExtractBankPipeSwizzle( const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn, ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut); + /** **************************************************************************************************** * ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT @@ -1619,6 +1648,8 @@ ADDR_E_RETURNCODE ADDR_API AddrCombineBankPipeSwizzle( const ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT* pIn, ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT* pOut); + + /** **************************************************************************************************** * ADDR_COMPUTE_SLICESWIZZLE_INPUT @@ -1645,6 +1676,8 @@ typedef struct _ADDR_COMPUTE_SLICESWIZZLE_INPUT ///< README: When tileIndex is not -1, this must be valid } ADDR_COMPUTE_SLICESWIZZLE_INPUT; + + /** **************************************************************************************************** * ADDR_COMPUTE_SLICESWIZZLE_OUTPUT @@ -1675,6 +1708,7 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeSliceSwizzle( const ADDR_COMPUTE_SLICESWIZZLE_INPUT* pIn, ADDR_COMPUTE_SLICESWIZZLE_OUTPUT* pOut); + /** **************************************************************************************************** * AddrSwizzleGenOption @@ -1765,6 +1799,8 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeBaseSwizzle( const ADDR_COMPUTE_BASE_SWIZZLE_INPUT* pIn, ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT* pOut); + + /** **************************************************************************************************** * ELEM_GETEXPORTNORM_INPUT @@ -1805,6 +1841,8 @@ BOOL_32 ADDR_API ElemGetExportNorm( ADDR_HANDLE hLib, const ELEM_GETEXPORTNORM_INPUT* pIn); + + /** **************************************************************************************************** * ELEM_FLT32TODEPTHPIXEL_INPUT @@ -1860,6 +1898,8 @@ ADDR_E_RETURNCODE ADDR_API ElemFlt32ToDepthPixel( const ELEM_FLT32TODEPTHPIXEL_INPUT* pIn, ELEM_FLT32TODEPTHPIXEL_OUTPUT* pOut); + + /** **************************************************************************************************** * ELEM_FLT32TOCOLORPIXEL_INPUT @@ -1986,6 +2026,8 @@ ADDR_E_RETURNCODE ADDR_API AddrConvertTileInfoToHW( const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn, ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut); + + /** **************************************************************************************************** * ADDR_CONVERT_TILEINDEX_INPUT @@ -2110,6 +2152,8 @@ ADDR_E_RETURNCODE ADDR_API AddrConvertTileIndex1( const ADDR_CONVERT_TILEINDEX1_INPUT* pIn, ADDR_CONVERT_TILEINDEX_OUTPUT* pOut); + + /** **************************************************************************************************** * ADDR_GET_TILEINDEX_INPUT @@ -2155,6 +2199,8 @@ ADDR_E_RETURNCODE ADDR_API AddrGetTileIndex( const ADDR_GET_TILEINDEX_INPUT* pIn, ADDR_GET_TILEINDEX_OUTPUT* pOut); + + /** **************************************************************************************************** * ADDR_PRT_INFO_INPUT @@ -2199,6 +2245,8 @@ ADDR_E_RETURNCODE ADDR_API AddrComputePrtInfo( const ADDR_PRT_INFO_INPUT* pIn, ADDR_PRT_INFO_OUTPUT* pOut); + + //////////////////////////////////////////////////////////////////////////////////////////////////// // DCC key functions //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -2259,6 +2307,8 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeDccInfo( const ADDR_COMPUTE_DCCINFO_INPUT* pIn, ADDR_COMPUTE_DCCINFO_OUTPUT* pOut); + + /** **************************************************************************************************** * ADDR_GET_MAX_ALIGNMENTS_OUTPUT @@ -2267,7 +2317,7 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeDccInfo( * Output structure of AddrGetMaxAlignments **************************************************************************************************** */ -typedef struct _ADDR_GET_MAX_ALIGNMENTS_OUTPUT +typedef struct ADDR_GET_MAX_ALINGMENTS_OUTPUT { UINT_32 size; ///< Size of this structure in bytes UINT_32 baseAlign; ///< Maximum base alignment in bytes @@ -2322,6 +2372,7 @@ ADDR_E_RETURNCODE ADDR_API AddrGetMaxMetaAlignments( * **/ + //////////////////////////////////////////////////////////////////////////////////////////////////// // Surface functions for Gfx9 //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -2485,6 +2536,8 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeSurfaceInfo( const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut); + + /** **************************************************************************************************** * ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT @@ -2551,6 +2604,8 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeSurfaceAddrFromCoord( const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut); + + /** **************************************************************************************************** * ADDR2_COMPUTE_SURFACE_COORDFROMADDR_INPUT @@ -2616,6 +2671,8 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeSurfaceCoordFromAddr( const ADDR2_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, ADDR2_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut); + + //////////////////////////////////////////////////////////////////////////////////////////////////// // HTile functions for Gfx9 //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -2664,6 +2721,7 @@ typedef struct _ADDR2_META_MIP_INFO UINT_32 depth; }; + // GFX10 struct { UINT_32 offset; ///< Metadata offset within one slice, @@ -2696,6 +2754,7 @@ typedef struct _ADDR2_COMPUTE_HTILE_INFO_INPUT UINT_32 firstMipIdInTail; /// Id of the first mip in tail, /// if no mip is in tail, it should be set to /// number of mip levels + /// Only for GFX10 } ADDR2_COMPUTE_HTILE_INFO_INPUT; /** @@ -2722,6 +2781,10 @@ typedef struct _ADDR2_COMPUTE_HTILE_INFO_OUTPUT UINT_32 metaBlkNumPerSlice; ///< Number of metablock within one slice ADDR2_META_MIP_INFO* pMipInfo; ///< HTILE mip information + + struct { + UINT_16* gfx10_bits; /* 72 2-byte elements */ + } equation; } ADDR2_COMPUTE_HTILE_INFO_OUTPUT; /** @@ -2737,6 +2800,8 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeHtileInfo( const ADDR2_COMPUTE_HTILE_INFO_INPUT* pIn, ADDR2_COMPUTE_HTILE_INFO_OUTPUT* pOut); + + /** **************************************************************************************************** * ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT @@ -2794,6 +2859,8 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeHtileAddrFromCoord( const ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn, ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut); + + /** **************************************************************************************************** * ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT @@ -2852,6 +2919,8 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeHtileCoordFromAddr( const ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn, ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut); + + //////////////////////////////////////////////////////////////////////////////////////////////////// // C-mask functions for Gfx9 //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -2878,8 +2947,23 @@ typedef struct _ADDR2_COMPUTE_CMASKINFO_INPUT UINT_32 numMipLevels; ///< Number of mip levels UINT_32 firstMipIdInTail; ///< The id of first mip in tail, if no mip is in tail, /// it should be number of mip levels + /// Only for GFX10 } ADDR2_COMPUTE_CMASK_INFO_INPUT; +/* DCC addr meta equation for GFX9. */ +struct gfx9_addr_meta_equation { + UINT_8 num_bits; + + struct { + struct { + UINT_8 dim; /* 0..4 as index, 5 means invalid */ + UINT_8 ord; /* 0..31 */ + } coord[8]; /* 0..num_coords */ + } bit[32]; /* 0..num_bits */ + + UINT_8 numPipeBits; +}; + /** **************************************************************************************************** * ADDR2_COMPUTE_CMASK_INFO_OUTPUT @@ -2906,6 +2990,21 @@ typedef struct _ADDR2_COMPUTE_CMASK_INFO_OUTPUT UINT_32 metaBlkNumPerSlice; ///< Number of metablock within one slice ADDR2_META_MIP_INFO* pMipInfo; ///< CMASK mip information + + /* The equation for doing CMASK address computations in shaders. */ + union { + /* This is chip-specific, and it varies with: + * - resource type + * - swizzle_mode + * - bpp + * - pipe_aligned + * - rb_aligned + */ + struct gfx9_addr_meta_equation gfx9; + + /* This is chip-specific, it requires 64KB_Z_X. */ + UINT_16 *gfx10_bits; /* 68 2-byte elements */ + } equation; } ADDR2_COMPUTE_CMASK_INFO_OUTPUT; /** @@ -2922,6 +3021,8 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeCmaskInfo( const ADDR2_COMPUTE_CMASK_INFO_INPUT* pIn, ADDR2_COMPUTE_CMASK_INFO_OUTPUT* pOut); + + /** **************************************************************************************************** * ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_INPUT @@ -2983,6 +3084,8 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeCmaskAddrFromCoord( const ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn, ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut); + + /** **************************************************************************************************** * ADDR2_COMPUTE_CMASK_COORDFROMADDR_INPUT @@ -3041,6 +3144,8 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeCmaskCoordFromAddr( const ADDR2_COMPUTE_CMASK_COORDFROMADDR_INPUT* pIn, ADDR2_COMPUTE_CMASK_COORDFROMADDR_OUTPUT* pOut); + + //////////////////////////////////////////////////////////////////////////////////////////////////// // F-mask functions for Gfx9 //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -3123,6 +3228,8 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeFmaskInfo( const ADDR2_COMPUTE_FMASK_INFO_INPUT* pIn, ADDR2_COMPUTE_FMASK_INFO_OUTPUT* pOut); + + /** **************************************************************************************************** * ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_INPUT @@ -3182,6 +3289,8 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeFmaskAddrFromCoord( const ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut); + + /** **************************************************************************************************** * ADDR2_COMPUTE_FMASK_COORDFROMADDR_INPUT @@ -3240,6 +3349,8 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeFmaskCoordFromAddr( const ADDR2_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, ADDR2_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut); + + //////////////////////////////////////////////////////////////////////////////////////////////////// // DCC key functions for Gfx9 //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -3270,6 +3381,7 @@ typedef struct _ADDR2_COMPUTE_DCCINFO_INPUT ///< useful in meta linear case UINT_32 firstMipIdInTail; ///< The id of first mip in tail, if no mip is in tail, /// it should be number of mip levels + /// Only for GFX10 } ADDR2_COMPUTE_DCCINFO_INPUT; /** @@ -3298,7 +3410,7 @@ typedef struct _ADDR2_COMPUTE_DCCINFO_OUTPUT UINT_32 metaBlkWidth; ///< DCC meta block width UINT_32 metaBlkHeight; ///< DCC meta block height UINT_32 metaBlkDepth; ///< DCC meta block depth - + UINT_32 metaBlkSize; ///< DCC meta block size in bytes UINT_32 metaBlkNumPerSlice; ///< Number of metablock within one slice union @@ -3307,9 +3419,29 @@ typedef struct _ADDR2_COMPUTE_DCCINFO_OUTPUT UINT_32 dccRamSliceSize; ///< DCC ram size per slice. For mipmap, it's /// the slize size of a mip chain, the thickness of a /// a slice is meta block depth + /// Only for GFX10 }; ADDR2_META_MIP_INFO* pMipInfo; ///< DCC mip information + + /* The equation for doing DCC address computations in shaders. */ + union { + /* This is chip-specific, and it varies with: + * - resource type + * - swizzle_mode + * - bpp + * - number of fragments + * - pipe_aligned + * - rb_aligned + */ + struct gfx9_addr_meta_equation gfx9; + + /* This is chip-specific, it requires 64KB_R_X, and it varies with: + * - bpp + * - pipe_aligned + */ + UINT_16 *gfx10_bits; /* 68 2-byte elements */ + } equation; } ADDR2_COMPUTE_DCCINFO_OUTPUT; /** @@ -3326,6 +3458,7 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeDccInfo( const ADDR2_COMPUTE_DCCINFO_INPUT* pIn, ADDR2_COMPUTE_DCCINFO_OUTPUT* pOut); + /** **************************************************************************************************** * ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT @@ -3346,9 +3479,12 @@ typedef struct _ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT UINT_32 mipId; ///< mipmap level id ADDR2_META_FLAGS dccKeyFlags; ///< DCC flags + ADDR2_SURFACE_FLAGS colorFlags; ///< Color surface flags AddrResourceType resourceType; ///< Color surface type AddrSwizzleMode swizzleMode; ///< Color surface swizzle mode UINT_32 bpp; ///< Color surface bits per pixel + UINT_32 unalignedWidth; ///< Color surface original width (of mip0) + UINT_32 unalignedHeight; ///< Color surface original height (of mip0) UINT_32 numSlices; ///< Color surface original slices (of mip0) UINT_32 numMipLevels; ///< Color surface mipmap levels UINT_32 numFrags; ///< Color surface fragment number @@ -3459,6 +3595,7 @@ typedef struct _ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT UINT_32 size; ///< Size of this structure in bytes AddrSwizzleMode swizzleMode; ///< Surface swizzle mode AddrResourceType resourceType; ///< Surface resource type + UINT_32 bpe; ///< bits per element (e.g. block size for BCn format) UINT_32 basePipeBankXor; ///< Base pipe bank xor UINT_32 slice; ///< Slice id UINT_32 numSamples; ///< Number of samples @@ -3538,6 +3675,62 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeSubResourceOffsetForSwizzlePattern( const ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT* pIn, ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT* pOut); +/** +**************************************************************************************************** +* ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_INPUT +* +* @brief +* Input structure of Addr2ComputeNonBlockCompressedView +**************************************************************************************************** +*/ +typedef struct _ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + ADDR2_SURFACE_FLAGS flags; ///< Surface flags + AddrSwizzleMode swizzleMode; ///< Swizzle Mode for Gfx9 + AddrResourceType resourceType; ///< Surface type + AddrFormat format; ///< Surface format + UINT_32 width; ///< Width of mip0 in texels (not in compressed block) + UINT_32 height; ///< Height of mip0 in texels (not in compressed block) + UINT_32 numSlices; ///< Number surface slice/depth of mip0 + UINT_32 numMipLevels; ///< Total mipmap levels. + UINT_32 pipeBankXor; ///< Combined swizzle used to do bank/pipe rotation + UINT_32 slice; ///< Index of slice to view + UINT_32 mipId; ///< Id of mip to view +} ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_INPUT; + +/** +**************************************************************************************************** +* ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_OUTPUT +* +* @brief +* Output structure of Addr2ComputeNonBlockCompressedView +**************************************************************************************************** +*/ +typedef struct _ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + UINT_64 offset; ///< Offset shifted from resource base for the view + UINT_32 pipeBankXor; ///< Pipe bank xor for the view + UINT_32 unalignedWidth; ///< Mip0 width (in element) for the view + UINT_32 unalignedHeight; ///< Mip0 height (in element) for the view + UINT_32 numMipLevels; ///< Total mipmap levels for the view + UINT_32 mipId; ///< Mip ID for the view +} ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_OUTPUT; + +/** +**************************************************************************************************** +* Addr2ComputeNonBlockCompressedView +* +* @brief +* Compute non-block-compressed view for a given mipmap level/slice +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2ComputeNonBlockCompressedView( + ADDR_HANDLE hLib, + const ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_INPUT* pIn, + ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_OUTPUT* pOut); + /** **************************************************************************************************** * ADDR2_BLOCK_SET @@ -3556,10 +3749,19 @@ typedef union _ADDR2_BLOCK_SET UINT_32 macroThin64KB : 1; // Thin 64KB for 2D/3D resource UINT_32 macroThick64KB : 1; // Thick 64KB for 3D resource UINT_32 var : 1; // VAR block + UINT_32 : 1; UINT_32 linear : 1; // Linear block - UINT_32 reserved : 25; + UINT_32 reserved : 24; }; + struct + { + UINT_32 : 5; + UINT_32 thin256KB : 1; // Thin 256KB block + UINT_32 thick256KB : 1; // Thick 256KB block + UINT_32 : 25; + } gfx11; + UINT_32 value; } ADDR2_BLOCK_SET; @@ -3609,10 +3811,10 @@ typedef union _ADDR2_SWMODE_SET UINT_32 sw64KB_S : 1; UINT_32 sw64KB_D : 1; UINT_32 sw64KB_R : 1; - UINT_32 swReserved0 : 1; - UINT_32 swReserved1 : 1; - UINT_32 swReserved2 : 1; - UINT_32 swReserved3 : 1; + UINT_32 swMiscDef12 : 1; + UINT_32 swMiscDef13 : 1; + UINT_32 swMiscDef14 : 1; + UINT_32 swMiscDef15 : 1; UINT_32 sw64KB_Z_T : 1; UINT_32 sw64KB_S_T : 1; UINT_32 sw64KB_D_T : 1; @@ -3625,12 +3827,29 @@ typedef union _ADDR2_SWMODE_SET UINT_32 sw64KB_S_X : 1; UINT_32 sw64KB_D_X : 1; UINT_32 sw64KB_R_X : 1; - UINT_32 swVar_Z_X : 1; - UINT_32 swReserved4 : 1; - UINT_32 swReserved5 : 1; - UINT_32 swVar_R_X : 1; + UINT_32 swMiscDef28 : 1; + UINT_32 swMiscDef29 : 1; + UINT_32 swMiscDef30 : 1; + UINT_32 swMiscDef31 : 1; }; + struct + { + UINT_32 : 28; + UINT_32 swVar_Z_X : 1; + UINT_32 : 2; + UINT_32 swVar_R_X : 1; + } gfx10; + + struct + { + UINT_32 : 28; + UINT_32 sw256KB_Z_X : 1; + UINT_32 sw256KB_S_X : 1; + UINT_32 sw256KB_D_X : 1; + UINT_32 sw256KB_R_X : 1; + } gfx11; + UINT_32 value; } ADDR2_SWMODE_SET; @@ -3666,6 +3885,8 @@ typedef struct _ADDR2_GET_PREFERRED_SURF_SETTING_INPUT UINT_32 maxAlign; ///< maximum base/size alignment requested by client UINT_32 minSizeAlign; ///< memory allocated for surface in client driver will /// be padded to multiple of this value (in bytes) + DOUBLE memoryBudget; ///< Memory consumption ratio based on minimum possible + /// size. } ADDR2_GET_PREFERRED_SURF_SETTING_INPUT; /** @@ -3708,14 +3929,14 @@ ADDR_E_RETURNCODE ADDR_API Addr2GetPreferredSurfaceSetting( * Addr2IsValidDisplaySwizzleMode * * @brief -* Return whether the swizzle mode is supported by DCE / DCN. +* Return whether the swizzle mode is supported by display engine **************************************************************************************************** */ ADDR_E_RETURNCODE ADDR_API Addr2IsValidDisplaySwizzleMode( ADDR_HANDLE hLib, AddrSwizzleMode swizzleMode, UINT_32 bpp, - bool *result); + BOOL_32 *pResult); } // rocr diff --git a/runtime/hsa-runtime/image/addrlib/inc/addrtypes.h b/runtime/hsa-runtime/image/addrlib/inc/addrtypes.h index c17e817e3a..ccecc2473f 100644 --- a/runtime/hsa-runtime/image/addrlib/inc/addrtypes.h +++ b/runtime/hsa-runtime/image/addrlib/inc/addrtypes.h @@ -1,28 +1,27 @@ /* - * Copyright © 2007-2019 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ +************************************************************************************************************************ +* +* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +* OTHER DEALINGS IN THE SOFTWARE +* +***********************************************************************************************************************/ /** **************************************************************************************************** @@ -49,6 +48,10 @@ typedef void VOID; typedef float FLOAT; #endif +#if !defined(DOUBLE) +typedef double DOUBLE; +#endif + #if !defined(CHAR) typedef char CHAR; #endif @@ -68,7 +71,11 @@ typedef int INT; */ #ifndef ADDR_CDECL #if defined(__GNUC__) - #define ADDR_CDECL __attribute__((cdecl)) + #if defined(__i386__) + #define ADDR_CDECL __attribute__((cdecl)) + #else + #define ADDR_CDECL + #endif #else #define ADDR_CDECL __cdecl #endif @@ -76,10 +83,10 @@ typedef int INT; #ifndef ADDR_STDCALL #if defined(__GNUC__) - #if defined(__amd64__) || defined(__x86_64__) - #define ADDR_STDCALL - #else + #if defined(__i386__) #define ADDR_STDCALL __attribute__((stdcall)) + #else + #define ADDR_STDCALL #endif #else #define ADDR_STDCALL __stdcall @@ -88,7 +95,11 @@ typedef int INT; #ifndef ADDR_FASTCALL #if defined(__GNUC__) - #define ADDR_FASTCALL __attribute__((regparm(0))) + #if defined(__i386__) || defined(__amd64__) || defined(__x86_64__) + #define ADDR_FASTCALL __attribute__((regparm(0))) + #else + #define ADDR_FASTCALL + #endif #else #define ADDR_FASTCALL __fastcall #endif @@ -106,6 +117,7 @@ typedef int INT; #define GC_FASTCALL ADDR_FASTCALL #endif + #if defined(__GNUC__) #define ADDR_INLINE static inline // inline needs to be static to link #else @@ -113,11 +125,7 @@ typedef int INT; #define ADDR_INLINE __inline #endif // #if defined(__GNUC__) -#if defined(__amd64__) || defined(__x86_64__) || defined(__i386__) - #define ADDR_API ADDR_FASTCALL // default call convention is fast call -#else - #define ADDR_API -#endif +#define ADDR_API ADDR_FASTCALL //default call convention is fast call /** **************************************************************************************************** @@ -205,9 +213,10 @@ typedef enum _AddrTileMode * @note * * ADDR_SW_LINEAR linear aligned addressing mode, for 1D/2D/3D resource -* ADDR_SW_256B_* addressing block aligned size is 256B, for 2D/3D resource +* ADDR_SW_256B_* addressing block aligned size is 256B, for 2D resource * ADDR_SW_4KB_* addressing block aligned size is 4KB, for 2D/3D resource -* ADDR_SW_64KB_* addressing block aligned size is 64KB, for 2D/3D resource +* ADDR_SW_64KB_* addressing block aligned size is 64KB, for 1D/2D/3D resource +* ADDR_SW_VAR_* addressing block aligned size is ASIC specific * * ADDR_SW_*_Z For GFX9: - for 2D resource, represents Z-order swizzle mode for depth/stencil/FMask @@ -244,10 +253,10 @@ typedef enum _AddrSwizzleMode ADDR_SW_64KB_S = 9, ADDR_SW_64KB_D = 10, ADDR_SW_64KB_R = 11, - ADDR_SW_RESERVED0 = 12, - ADDR_SW_RESERVED1 = 13, - ADDR_SW_RESERVED2 = 14, - ADDR_SW_RESERVED3 = 15, + ADDR_SW_MISCDEF12 = 12, + ADDR_SW_MISCDEF13 = 13, + ADDR_SW_MISCDEF14 = 14, + ADDR_SW_MISCDEF15 = 15, ADDR_SW_64KB_Z_T = 16, ADDR_SW_64KB_S_T = 17, ADDR_SW_64KB_D_T = 18, @@ -260,12 +269,27 @@ typedef enum _AddrSwizzleMode ADDR_SW_64KB_S_X = 25, ADDR_SW_64KB_D_X = 26, ADDR_SW_64KB_R_X = 27, - ADDR_SW_VAR_Z_X = 28, - ADDR_SW_RESERVED4 = 29, - ADDR_SW_RESERVED5 = 30, - ADDR_SW_VAR_R_X = 31, + ADDR_SW_MISCDEF28 = 28, + ADDR_SW_MISCDEF29 = 29, + ADDR_SW_MISCDEF30 = 30, + ADDR_SW_MISCDEF31 = 31, ADDR_SW_LINEAR_GENERAL = 32, ADDR_SW_MAX_TYPE = 33, + + ADDR_SW_RESERVED0 = ADDR_SW_MISCDEF12, + ADDR_SW_RESERVED1 = ADDR_SW_MISCDEF13, + ADDR_SW_RESERVED2 = ADDR_SW_MISCDEF14, + ADDR_SW_RESERVED3 = ADDR_SW_MISCDEF15, + ADDR_SW_RESERVED4 = ADDR_SW_MISCDEF29, + ADDR_SW_RESERVED5 = ADDR_SW_MISCDEF30, + + ADDR_SW_VAR_Z_X = ADDR_SW_MISCDEF28, + ADDR_SW_VAR_R_X = ADDR_SW_MISCDEF31, + + ADDR_SW_256KB_Z_X = ADDR_SW_MISCDEF28, + ADDR_SW_256KB_S_X = ADDR_SW_MISCDEF29, + ADDR_SW_256KB_D_X = ADDR_SW_MISCDEF30, + ADDR_SW_256KB_R_X = ADDR_SW_MISCDEF31, } AddrSwizzleMode; /** @@ -553,6 +577,7 @@ typedef enum _AddrHtileBlockSize ADDR_HTILE_BLOCKSIZE_8 = 8, } AddrHtileBlockSize; + /** **************************************************************************************************** * AddrPipeCfg @@ -638,7 +663,7 @@ typedef enum _AddrTileType #endif #ifndef INT_8 -#define INT_8 char +#define INT_8 signed char // signed must be used because of aarch64 #endif #ifndef UINT_8 @@ -715,6 +740,7 @@ typedef enum _AddrTileType #define ADDR64D "lld" OR "I64d" #endif + /// @brief Union for storing a 32-bit float or 32-bit integer /// @ingroup type /// @@ -730,6 +756,7 @@ typedef union { float f; } ADDR_FLT_32; + //////////////////////////////////////////////////////////////////////////////////////////////////// // // Macros for controlling linking and building on multiple systems diff --git a/runtime/hsa-runtime/image/addrlib/src/addrinterface.cpp b/runtime/hsa-runtime/image/addrlib/src/addrinterface.cpp index 7d87029858..d1ebf2680e 100644 --- a/runtime/hsa-runtime/image/addrlib/src/addrinterface.cpp +++ b/runtime/hsa-runtime/image/addrlib/src/addrinterface.cpp @@ -1,28 +1,27 @@ /* - * Copyright © 2007-2019 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ +************************************************************************************************************************ +* +* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +* OTHER DEALINGS IN THE SOFTWARE +* +***********************************************************************************************************************/ /** **************************************************************************************************** @@ -36,8 +35,6 @@ #include "addrcommon.h" -#include "util/macros.h" - namespace rocr { using namespace Addr; @@ -68,6 +65,8 @@ ADDR_E_RETURNCODE ADDR_API AddrCreate( return returnCode; } + + /** **************************************************************************************************** * AddrDestroy @@ -97,6 +96,8 @@ ADDR_E_RETURNCODE ADDR_API AddrDestroy( return returnCode; } + + //////////////////////////////////////////////////////////////////////////////////////////////////// // Surface functions //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -133,6 +134,8 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceInfo( return returnCode; } + + /** **************************************************************************************************** * AddrComputeSurfaceAddrFromCoord @@ -197,6 +200,8 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceCoordFromAddr( return returnCode; } + + //////////////////////////////////////////////////////////////////////////////////////////////////// // HTile functions //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -298,6 +303,8 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeHtileCoordFromAddr( return returnCode; } + + //////////////////////////////////////////////////////////////////////////////////////////////////// // C-mask functions //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -400,6 +407,8 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskCoordFromAddr( return returnCode; } + + //////////////////////////////////////////////////////////////////////////////////////////////////// // F-mask functions //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -500,6 +509,8 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskCoordFromAddr( return returnCode; } + + //////////////////////////////////////////////////////////////////////////////////////////////////// // DCC key functions //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -534,6 +545,8 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeDccInfo( return returnCode; } + + /////////////////////////////////////////////////////////////////////////////// // Below functions are element related or helper functions /////////////////////////////////////////////////////////////////////////////// @@ -820,7 +833,7 @@ BOOL_32 ADDR_API ElemGetExportNorm( Addr::Lib* pLib = Lib::GetLib(hLib); BOOL_32 enabled = FALSE; - ASSERTED ADDR_E_RETURNCODE returnCode = ADDR_OK; + ADDR_E_RETURNCODE returnCode = ADDR_OK; if (pLib != NULL) { @@ -1119,6 +1132,7 @@ ADDR_E_RETURNCODE ADDR_API AddrGetMaxMetaAlignments( return returnCode; } + //////////////////////////////////////////////////////////////////////////////////////////////////// // Surface functions for Addr2 //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -1155,6 +1169,7 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeSurfaceInfo( return returnCode; } + /** **************************************************************************************************** * Addr2ComputeSurfaceAddrFromCoord @@ -1187,6 +1202,7 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeSurfaceAddrFromCoord( return returnCode; } + /** **************************************************************************************************** * Addr2ComputeSurfaceCoordFromAddr @@ -1219,6 +1235,8 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeSurfaceCoordFromAddr( return returnCode; } + + //////////////////////////////////////////////////////////////////////////////////////////////////// // HTile functions for Addr2 //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -1255,6 +1273,7 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeHtileInfo( return returnCode; } + /** **************************************************************************************************** * Addr2ComputeHtileAddrFromCoord @@ -1287,6 +1306,7 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeHtileAddrFromCoord( return returnCode; } + /** **************************************************************************************************** * Addr2ComputeHtileCoordFromAddr @@ -1320,6 +1340,8 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeHtileCoordFromAddr( return returnCode; } + + //////////////////////////////////////////////////////////////////////////////////////////////////// // C-mask functions for Addr2 //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -1357,6 +1379,7 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeCmaskInfo( return returnCode; } + /** **************************************************************************************************** * Addr2ComputeCmaskAddrFromCoord @@ -1389,6 +1412,7 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeCmaskAddrFromCoord( return returnCode; } + /** **************************************************************************************************** * Addr2ComputeCmaskCoordFromAddr @@ -1422,6 +1446,8 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeCmaskCoordFromAddr( return returnCode; } + + //////////////////////////////////////////////////////////////////////////////////////////////////// // F-mask functions for Addr2 //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -1458,6 +1484,7 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeFmaskInfo( return returnCode; } + /** **************************************************************************************************** * Addr2ComputeFmaskAddrFromCoord @@ -1490,6 +1517,7 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeFmaskAddrFromCoord( return returnCode; } + /** **************************************************************************************************** * Addr2ComputeFmaskCoordFromAddr @@ -1522,6 +1550,8 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeFmaskCoordFromAddr( return returnCode; } + + //////////////////////////////////////////////////////////////////////////////////////////////////// // DCC key functions for Addr2 //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -1675,6 +1705,35 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeSubResourceOffsetForSwizzlePattern( return returnCode; } +/** +**************************************************************************************************** +* Addr2ComputeNonBlockCompressedView +* +* @brief +* Compute non-block-compressed view for a given mipmap level/slice. +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2ComputeNonBlockCompressedView( + ADDR_HANDLE hLib, ///< handle of addrlib + const ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_INPUT* pIn, ///< [in] input + ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_OUTPUT* pOut) ///< [out] output +{ + ADDR_E_RETURNCODE returnCode; + + V2::Lib* pLib = V2::Lib::GetLib(hLib); + + if (pLib != NULL) + { + returnCode = pLib->ComputeNonBlockCompressedView(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + /** **************************************************************************************************** * Addr2GetPreferredSurfaceSetting @@ -1709,14 +1768,14 @@ ADDR_E_RETURNCODE ADDR_API Addr2GetPreferredSurfaceSetting( * Addr2IsValidDisplaySwizzleMode * * @brief -* Return whether the swizzle mode is supported by DCE / DCN. +* Return whether the swizzle mode is supported by display engine **************************************************************************************************** */ ADDR_E_RETURNCODE ADDR_API Addr2IsValidDisplaySwizzleMode( ADDR_HANDLE hLib, AddrSwizzleMode swizzleMode, UINT_32 bpp, - bool *result) + BOOL_32 *pResult) { ADDR_E_RETURNCODE returnCode; @@ -1724,12 +1783,12 @@ ADDR_E_RETURNCODE ADDR_API Addr2IsValidDisplaySwizzleMode( if (pLib != NULL) { - ADDR2_COMPUTE_SURFACE_INFO_INPUT in; + ADDR2_COMPUTE_SURFACE_INFO_INPUT in = {}; in.resourceType = ADDR_RSRC_TEX_2D; - in.swizzleMode = swizzleMode; - in.bpp = bpp; + in.swizzleMode = swizzleMode; + in.bpp = bpp; - *result = pLib->IsValidDisplaySwizzleMode(&in); + *pResult = pLib->IsValidDisplaySwizzleMode(&in); returnCode = ADDR_OK; } else @@ -1737,7 +1796,7 @@ ADDR_E_RETURNCODE ADDR_API Addr2IsValidDisplaySwizzleMode( returnCode = ADDR_ERROR; } - return returnCode; + return returnCode; } -} // rocr +} // namespace rocr \ No newline at end of file diff --git a/runtime/hsa-runtime/image/addrlib/src/amdgpu_asic_addr.h b/runtime/hsa-runtime/image/addrlib/src/amdgpu_asic_addr.h index 3307f1941a..28faf83e7e 100644 --- a/runtime/hsa-runtime/image/addrlib/src/amdgpu_asic_addr.h +++ b/runtime/hsa-runtime/image/addrlib/src/amdgpu_asic_addr.h @@ -1,28 +1,27 @@ /* - * Copyright © 2017-2019 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ +************************************************************************************************************************ +* +* Copyright (C) 2017-2022 Advanced Micro Devices, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +* OTHER DEALINGS IN THE SOFTWARE +* +***********************************************************************************************************************/ #ifndef _AMDGPU_ASIC_ADDR_H #define _AMDGPU_ASIC_ADDR_H @@ -44,6 +43,12 @@ #define FAMILY_AI 0x8D #define FAMILY_RV 0x8E #define FAMILY_NV 0x8F +#define FAMILY_VGH 0x90 +#define FAMILY_GFX1100 0x91 +#define FAMILY_GFX1103 0x94 +#define FAMILY_RMB 0x92 +#define FAMILY_GC_10_3_6 0x95 +#define FAMILY_GC_10_3_7 0x97 // AMDGPU_FAMILY_IS(familyId, familyName) #define FAMILY_IS(f, fn) (f == FAMILY_##fn) @@ -57,6 +62,9 @@ #define FAMILY_IS_AI(f) FAMILY_IS(f, AI) #define FAMILY_IS_RV(f) FAMILY_IS(f, RV) #define FAMILY_IS_NV(f) FAMILY_IS(f, NV) +#define FAMILY_IS_RMB(f) FAMILY_IS(f, RMB) +#define FAMILY_IS_GFX1100(f) FAMILY_IS(f, GFX1100) +#define FAMILY_IS_GFX1103(f) FAMILY_IS(f, GFX1103) #define AMDGPU_UNKNOWN 0xFF @@ -77,6 +85,7 @@ #define AMDGPU_ICELAND_RANGE 0x01, 0x14 #define AMDGPU_TONGA_RANGE 0x14, 0x28 #define AMDGPU_FIJI_RANGE 0x3C, 0x50 + #define AMDGPU_POLARIS10_RANGE 0x50, 0x5A #define AMDGPU_POLARIS11_RANGE 0x5A, 0x64 #define AMDGPU_POLARIS12_RANGE 0x64, 0x6E @@ -88,7 +97,8 @@ #define AMDGPU_VEGA10_RANGE 0x01, 0x14 #define AMDGPU_VEGA12_RANGE 0x14, 0x28 #define AMDGPU_VEGA20_RANGE 0x28, 0x32 -#define AMDGPU_ARCTURUS_RANGE 0x32, 0xFF +#define AMDGPU_ARCTURUS_RANGE 0x32, 0x3C +#define AMDGPU_ALDEBARAN_RANGE 0x3C, 0xFF #define AMDGPU_RAVEN_RANGE 0x01, 0x81 #define AMDGPU_RAVEN2_RANGE 0x81, 0x91 @@ -97,12 +107,30 @@ #define AMDGPU_NAVI10_RANGE 0x01, 0x0A #define AMDGPU_NAVI12_RANGE 0x0A, 0x14 #define AMDGPU_NAVI14_RANGE 0x14, 0x28 -#define AMDGPU_SIENNA_RANGE 0x28, 0x32 +#define AMDGPU_NAVI21_RANGE 0x28, 0x32 +#define AMDGPU_NAVI22_RANGE 0x32, 0x3C +#define AMDGPU_NAVI23_RANGE 0x3C, 0x46 +#define AMDGPU_NAVI24_RANGE 0x46, 0x50 + +#define AMDGPU_VANGOGH_RANGE 0x01, 0xFF + +#define AMDGPU_GFX1100_RANGE 0x01, 0x10 +#define AMDGPU_GFX1101_RANGE 0x20, 0xFF +#define AMDGPU_GFX1102_RANGE 0x10, 0x20 + +#define AMDGPU_GFX1103_RANGE 0x01, 0xFF + +#define AMDGPU_REMBRANDT_RANGE 0x01, 0xFF + +#define AMDGPU_GFX1036_RANGE 0x01, 0xFF + +#define AMDGPU_GFX1037_RANGE 0x01, 0xFF #define AMDGPU_EXPAND_FIX(x) x #define AMDGPU_RANGE_HELPER(val, min, max) ((val >= min) && (val < max)) #define AMDGPU_IN_RANGE(val, ...) AMDGPU_EXPAND_FIX(AMDGPU_RANGE_HELPER(val, __VA_ARGS__)) + // ASICREV_IS(eRevisionId, revisionName) #define ASICREV_IS(r, rn) AMDGPU_IN_RANGE(r, AMDGPU_##rn##_RANGE) #define ASICREV_IS_TAHITI_P(r) ASICREV_IS(r, TAHITI) @@ -137,14 +165,37 @@ #define ASICREV_IS_VEGA12_p(r) ASICREV_IS(r, VEGA12) #define ASICREV_IS_VEGA20_P(r) ASICREV_IS(r, VEGA20) #define ASICREV_IS_ARCTURUS(r) ASICREV_IS(r, ARCTURUS) +#define ASICREV_IS_ALDEBARAN(r) ASICREV_IS(r, ALDEBARAN) #define ASICREV_IS_RAVEN(r) ASICREV_IS(r, RAVEN) #define ASICREV_IS_RAVEN2(r) ASICREV_IS(r, RAVEN2) #define ASICREV_IS_RENOIR(r) ASICREV_IS(r, RENOIR) #define ASICREV_IS_NAVI10_P(r) ASICREV_IS(r, NAVI10) -#define ASICREV_IS_NAVI12(r) ASICREV_IS(r, NAVI12) -#define ASICREV_IS_NAVI14(r) ASICREV_IS(r, NAVI14) -#define ASICREV_IS_SIENNA_M(r) ASICREV_IS(r, SIENNA) + +#define ASICREV_IS_NAVI12_P(r) ASICREV_IS(r, NAVI12) + +#define ASICREV_IS_NAVI14_M(r) ASICREV_IS(r, NAVI14) + +#define ASICREV_IS_NAVI21_M(r) ASICREV_IS(r, NAVI21) + +#define ASICREV_IS_NAVI22_P(r) ASICREV_IS(r, NAVI22) + +#define ASICREV_IS_NAVI23_P(r) ASICREV_IS(r, NAVI23) + +#define ASICREV_IS_NAVI24_P(r) ASICREV_IS(r, NAVI24) + +#define ASICREV_IS_VANGOGH(r) ASICREV_IS(r, VANGOGH) + +#define ASICREV_IS_GFX1100(r) ASICREV_IS(r, GFX1100) +#define ASICREV_IS_GFX1101(r) ASICREV_IS(r, GFX1101) +#define ASICREV_IS_GFX1102(r) ASICREV_IS(r, GFX1102) +#define ASICREV_IS_GFX1103(r) ASICREV_IS(r, GFX1103) + +#define ASICREV_IS_REMBRANDT(r) ASICREV_IS(r, REMBRANDT) + +#define ASICREV_IS_GFX1036(r) ASICREV_IS(r, GFX1036) + +#define ASICREV_IS_GFX1037(r) ASICREV_IS(r, GFX1037) #endif // _AMDGPU_ASIC_ADDR_H diff --git a/runtime/hsa-runtime/image/addrlib/src/chip/gfx10/gfx10_gb_reg.h b/runtime/hsa-runtime/image/addrlib/src/chip/gfx10/gfx10_gb_reg.h index 6f13b31869..7383c4e061 100644 --- a/runtime/hsa-runtime/image/addrlib/src/chip/gfx10/gfx10_gb_reg.h +++ b/runtime/hsa-runtime/image/addrlib/src/chip/gfx10/gfx10_gb_reg.h @@ -1,28 +1,27 @@ /* - * Copyright © 2007-2019 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ +************************************************************************************************************************ +* +* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +* OTHER DEALINGS IN THE SOFTWARE +* +***********************************************************************************************************************/ #if !defined (__GFX10_GB_REG_H__) #define __GFX10_GB_REG_H__ @@ -34,7 +33,16 @@ * */ -union GB_ADDR_CONFIG +// +// Make sure the necessary endian defines are there. +// +#if defined(LITTLEENDIAN_CPU) +#elif defined(BIGENDIAN_CPU) +#else +#error "BIGENDIAN_CPU or LITTLEENDIAN_CPU must be defined" +#endif + +union GB_ADDR_CONFIG_GFX10 { struct { diff --git a/runtime/hsa-runtime/image/addrlib/src/chip/gfx11/gfx11_gb_reg.h b/runtime/hsa-runtime/image/addrlib/src/chip/gfx11/gfx11_gb_reg.h new file mode 100644 index 0000000000..99a66c08d3 --- /dev/null +++ b/runtime/hsa-runtime/image/addrlib/src/chip/gfx11/gfx11_gb_reg.h @@ -0,0 +1,76 @@ +/* +************************************************************************************************************************ +* +* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +* OTHER DEALINGS IN THE SOFTWARE +* +***********************************************************************************************************************/ + +#if !defined (__GFX11_GB_REG_H__) +#define __GFX11_GB_REG_H__ + +/* +* gfx11_gb_reg.h +* +* Register Spec Release: 1.0 +* +*/ + +// +// Make sure the necessary endian defines are there. +// +#if defined(LITTLEENDIAN_CPU) +#elif defined(BIGENDIAN_CPU) +#else +#error "BIGENDIAN_CPU or LITTLEENDIAN_CPU must be defined" +#endif + +union GB_ADDR_CONFIG_GFX11 +{ + struct + { +#if defined(LITTLEENDIAN_CPU) + unsigned int NUM_PIPES : 3; + unsigned int PIPE_INTERLEAVE_SIZE : 3; + unsigned int MAX_COMPRESSED_FRAGS : 2; + unsigned int NUM_PKRS : 3; + unsigned int : 8; + unsigned int NUM_SHADER_ENGINES : 2; + unsigned int : 5; + unsigned int NUM_RB_PER_SE : 2; + unsigned int : 4; +#elif defined(BIGENDIAN_CPU) + unsigned int : 4; + unsigned int NUM_RB_PER_SE : 2; + unsigned int : 5; + unsigned int NUM_SHADER_ENGINES : 2; + unsigned int : 8; + unsigned int NUM_PKRS : 3; + unsigned int MAX_COMPRESSED_FRAGS : 2; + unsigned int PIPE_INTERLEAVE_SIZE : 3; + unsigned int NUM_PIPES : 3; +#endif + } bitfields, bits; + unsigned int u32All; + int i32All; + float f32All; +}; + +#endif diff --git a/runtime/hsa-runtime/image/addrlib/src/chip/gfx9/gfx9_gb_reg.h b/runtime/hsa-runtime/image/addrlib/src/chip/gfx9/gfx9_gb_reg.h index 6d0475c4ae..b0be682ccf 100644 --- a/runtime/hsa-runtime/image/addrlib/src/chip/gfx9/gfx9_gb_reg.h +++ b/runtime/hsa-runtime/image/addrlib/src/chip/gfx9/gfx9_gb_reg.h @@ -1,28 +1,27 @@ /* - * Copyright © 2007-2019 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ +************************************************************************************************************************ +* +* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +* OTHER DEALINGS IN THE SOFTWARE +* +***********************************************************************************************************************/ #if !defined (__GFX9_GB_REG_H__) #define __GFX9_GB_REG_H__ @@ -34,7 +33,16 @@ * */ -union GB_ADDR_CONFIG_gfx9 { +// +// Make sure the necessary endian defines are there. +// +#if defined(LITTLEENDIAN_CPU) +#elif defined(BIGENDIAN_CPU) +#else +#error "BIGENDIAN_CPU or LITTLEENDIAN_CPU must be defined" +#endif + +union GB_ADDR_CONFIG_GFX9 { struct { #if defined(LITTLEENDIAN_CPU) unsigned int NUM_PIPES : 3; diff --git a/runtime/hsa-runtime/image/addrlib/src/chip/r800/si_gb_reg.h b/runtime/hsa-runtime/image/addrlib/src/chip/r800/si_gb_reg.h index 43371d402b..3f5f4071eb 100644 --- a/runtime/hsa-runtime/image/addrlib/src/chip/r800/si_gb_reg.h +++ b/runtime/hsa-runtime/image/addrlib/src/chip/r800/si_gb_reg.h @@ -1,28 +1,27 @@ /* - * Copyright © 2007-2019 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ +************************************************************************************************************************ +* +* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +* OTHER DEALINGS IN THE SOFTWARE +* +***********************************************************************************************************************/ #if !defined (__SI_GB_REG_H__) #define __SI_GB_REG_H__ @@ -35,6 +34,15 @@ * *****************************************************************************************************************/ +// +// Make sure the necessary endian defines are there. +// +#if defined(LITTLEENDIAN_CPU) +#elif defined(BIGENDIAN_CPU) +#else +#error "BIGENDIAN_CPU or LITTLEENDIAN_CPU must be defined" +#endif + /* * GB_ADDR_CONFIG struct */ @@ -103,7 +111,7 @@ typedef union { unsigned int num_banks : 2; unsigned int micro_tile_mode_new : 3; unsigned int sample_split : 2; - unsigned int : 5; + unsigned int alt_pipe_config : 5; } GB_TILE_MODE_T; typedef struct _GB_MACROTILE_MODE_T { @@ -111,13 +119,16 @@ typedef union { unsigned int bank_height : 2; unsigned int macro_tile_aspect : 2; unsigned int num_banks : 2; - unsigned int : 24; + unsigned int alt_bank_height : 2; + unsigned int alt_macro_tile_aspect : 2; + unsigned int alt_num_banks : 2; + unsigned int : 18; } GB_MACROTILE_MODE_T; #elif defined(BIGENDIAN_CPU) typedef struct _GB_TILE_MODE_T { - unsigned int : 5; + unsigned int alt_pipe_config : 5; unsigned int sample_split : 2; unsigned int micro_tile_mode_new : 3; unsigned int num_banks : 2; @@ -131,7 +142,10 @@ typedef union { } GB_TILE_MODE_T; typedef struct _GB_MACROTILE_MODE_T { - unsigned int : 24; + unsigned int : 18; + unsigned int alt_num_banks : 2; + unsigned int alt_macro_tile_aspect : 2; + unsigned int alt_bank_height : 2; unsigned int num_banks : 2; unsigned int macro_tile_aspect : 2; unsigned int bank_height : 2; diff --git a/runtime/hsa-runtime/image/addrlib/src/core/addrcommon.h b/runtime/hsa-runtime/image/addrlib/src/core/addrcommon.h index d03d7bf403..6b8fa0a5cb 100644 --- a/runtime/hsa-runtime/image/addrlib/src/core/addrcommon.h +++ b/runtime/hsa-runtime/image/addrlib/src/core/addrcommon.h @@ -1,28 +1,27 @@ /* - * Copyright © 2007-2019 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ +************************************************************************************************************************ +* +* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +* OTHER DEALINGS IN THE SOFTWARE +* +***********************************************************************************************************************/ /** **************************************************************************************************** @@ -36,39 +35,38 @@ #include "addrinterface.h" -#if !defined(DEBUG) -#ifdef NDEBUG -#define DEBUG 0 -#else -#define DEBUG 1 -#endif -#endif -// ADDR_LNX_KERNEL_BUILD is for internal build -// Moved from addrinterface.h so __KERNEL__ is not needed any more -#if ADDR_LNX_KERNEL_BUILD // || (defined(__GNUC__) && defined(__KERNEL__)) - #include -#elif !defined(__APPLE__) || defined(HAVE_TSERVER) +#if !defined(__APPLE__) || defined(HAVE_TSERVER) #include #include #endif -#include -#include "util/macros.h" +#if defined(__GNUC__) + #include +#endif + //////////////////////////////////////////////////////////////////////////////////////////////////// // Platform specific debug break defines //////////////////////////////////////////////////////////////////////////////////////////////////// +#if !defined(DEBUG) + #ifdef NDEBUG + #define DEBUG 0 + #else + #define DEBUG 1 + #endif +#endif + #if DEBUG #if defined(__GNUC__) - #define ADDR_DBG_BREAK() assert(false) + #define ADDR_DBG_BREAK() { assert(false); } #elif defined(__APPLE__) #define ADDR_DBG_BREAK() { IOPanic("");} #else #define ADDR_DBG_BREAK() { __debugbreak(); } #endif #else - #define ADDR_DBG_BREAK() do {} while(0) + #define ADDR_DBG_BREAK() #endif //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -81,10 +79,29 @@ #define ADDR_ANALYSIS_ASSUME(expr) do { (void)(expr); } while (0) #endif -#define ADDR_ASSERT(__e) assert(__e) -#define ADDR_ASSERT_ALWAYS() ADDR_DBG_BREAK() -#define ADDR_UNHANDLED_CASE() ADDR_ASSERT(!"Unhandled case") -#define ADDR_NOT_IMPLEMENTED() ADDR_ASSERT(!"Not implemented"); +#if DEBUG + #if defined( _WIN32 ) + #define ADDR_ASSERT(__e) \ + { \ + ADDR_ANALYSIS_ASSUME(__e); \ + if ( !((__e) ? TRUE : FALSE)) { ADDR_DBG_BREAK(); } \ + } + #else + #define ADDR_ASSERT(__e) if ( !((__e) ? TRUE : FALSE)) { ADDR_DBG_BREAK(); } + #endif + #define ADDR_ASSERT_ALWAYS() ADDR_DBG_BREAK() + #define ADDR_UNHANDLED_CASE() ADDR_ASSERT(!"Unhandled case") + #define ADDR_NOT_IMPLEMENTED() ADDR_ASSERT(!"Not implemented"); +#else //DEBUG + #if defined( _WIN32 ) + #define ADDR_ASSERT(__e) { ADDR_ANALYSIS_ASSUME(__e); } + #else + #define ADDR_ASSERT(__e) + #endif + #define ADDR_ASSERT_ALWAYS() + #define ADDR_UNHANDLED_CASE() + #define ADDR_NOT_IMPLEMENTED() +#endif //DEBUG //////////////////////////////////////////////////////////////////////////////////////////////////// //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -107,6 +124,7 @@ #define ADDR_INFO(cond, a) \ { if (!(cond)) { ADDR_PRNT(a); } } + /// @brief Macro for reporting error warning messages /// @ingroup util /// @@ -125,6 +143,7 @@ ADDR_PRNT((" WARNING in file %s, line %d\n", __FILE__, __LINE__)); \ } } + /// @brief Macro for reporting fatal error conditions /// @ingroup util /// @@ -147,27 +166,35 @@ #define ADDRDPF 1 ? (void)0 : (void) -#define ADDR_PRNT(a) do {} while(0) +#define ADDR_PRNT(a) -#define ADDR_DBG_BREAK() do {} while(0) +#define ADDR_DBG_BREAK() -#define ADDR_INFO(cond, a) do {} while(0) +#define ADDR_INFO(cond, a) -#define ADDR_WARN(cond, a) do {} while(0) +#define ADDR_WARN(cond, a) -#define ADDR_EXIT(cond, a) do {} while(0) +#define ADDR_EXIT(cond, a) #endif // DEBUG //////////////////////////////////////////////////////////////////////////////////////////////////// -#define ADDR_C_ASSERT(__e) STATIC_ASSERT(__e) +#if defined(static_assert) +#define ADDR_C_ASSERT(__e) static_assert(__e, "") +#else + /* This version of STATIC_ASSERT() relies on VLAs. If COND is + * false/zero, the array size will be -1 and we'll get a compile + * error + */ +# define ADDR_C_ASSERT(__e) do { \ + (void) sizeof(char [1 - 2*!(__e)]); \ + } while (0) +#endif namespace rocr { -namespace Addr -{ +namespace Addr { +namespace V1 { -namespace V1 -{ //////////////////////////////////////////////////////////////////////////////////////////////////// // Common constants //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -207,21 +234,6 @@ static const UINT_32 MaxSurfaceHeight = 16384; /// Helper macros to select a single bit from an int (undefined later in section) #define _BIT(v,b) (((v) >> (b) ) & 1) -/** -**************************************************************************************************** -* @brief Enums to identify AddrLib type -**************************************************************************************************** -*/ -enum LibClass -{ - BASE_ADDRLIB = 0x0, - R600_ADDRLIB = 0x6, - R800_ADDRLIB = 0x8, - SI_ADDRLIB = 0xa, - CI_ADDRLIB = 0xb, - AI_ADDRLIB = 0xd, -}; - /** **************************************************************************************************** * ChipFamily @@ -271,8 +283,9 @@ union ConfigFlags UINT_32 disableLinearOpt : 1; ///< Disallow tile modes to be optimized to linear UINT_32 use32bppFor422Fmt : 1; ///< View 422 formats as 32 bits per pixel element UINT_32 forceDccAndTcCompat : 1; ///< Force enable DCC and TC compatibility - UINT_32 nonPower2MemConfig : 1; ///< Physical video memory size is not power of 2 - UINT_32 reserved : 19; ///< Reserved bits for future use + UINT_32 nonPower2MemConfig : 1; ///< Video memory bit width is not power of 2 + UINT_32 enableAltTiling : 1; ///< Enable alt tile mode + UINT_32 reserved : 18; ///< Reserved bits for future use }; UINT_32 value; @@ -433,6 +446,38 @@ static inline INT_32 Max( return ((value1 > (value2)) ? (value1) : value2); } +/** +**************************************************************************************************** +* RoundUpQuotient +* +* @brief +* Divides two numbers, rounding up any remainder. +**************************************************************************************************** +*/ +static inline UINT_32 RoundUpQuotient( + UINT_32 numerator, + UINT_32 denominator) +{ + ADDR_ASSERT(denominator > 0); + return ((numerator + (denominator - 1)) / denominator); +} + +/** +**************************************************************************************************** +* RoundUpQuotient +* +* @brief +* Divides two numbers, rounding up any remainder. +**************************************************************************************************** +*/ +static inline UINT_64 RoundUpQuotient( + UINT_64 numerator, + UINT_64 denominator) +{ + ADDR_ASSERT(denominator > 0); + return ((numerator + (denominator - 1)) / denominator); +} + /** **************************************************************************************************** * NextPow2 @@ -856,6 +901,7 @@ static inline VOID InitChannel( pChanSet->index = index; } + /** **************************************************************************************************** * InitChannel @@ -933,7 +979,7 @@ static inline UINT_32 GetCoordActiveMask( * ShiftCeil * * @brief -* Apply righ-shift with ceiling +* Apply right-shift with ceiling **************************************************************************************************** */ static inline UINT_32 ShiftCeil( @@ -943,9 +989,23 @@ static inline UINT_32 ShiftCeil( return (a >> b) + (((a & ((1 << b) - 1)) != 0) ? 1 : 0); } +/** +**************************************************************************************************** +* ShiftRight +* +* @brief +* Return right-shift value and minimum is 1 +**************************************************************************************************** +*/ +static inline UINT_32 ShiftRight( + UINT_32 a, ///< [in] value to be right-shifted + UINT_32 b) ///< [in] number of bits to shift +{ + return Max(a >> b, 1u); +} + } // Addr } // rocr - #endif // __ADDR_COMMON_H__ diff --git a/runtime/hsa-runtime/image/addrlib/src/core/addrelemlib.cpp b/runtime/hsa-runtime/image/addrlib/src/core/addrelemlib.cpp index ff501a7aeb..b3bff74fc0 100644 --- a/runtime/hsa-runtime/image/addrlib/src/core/addrelemlib.cpp +++ b/runtime/hsa-runtime/image/addrlib/src/core/addrelemlib.cpp @@ -1,28 +1,27 @@ /* - * Copyright © 2007-2019 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ +************************************************************************************************************************ +* +* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +* OTHER DEALINGS IN THE SOFTWARE +* +***********************************************************************************************************************/ /** **************************************************************************************************** @@ -35,8 +34,7 @@ #include "addrlib.h" namespace rocr { -namespace Addr -{ +namespace Addr { /** **************************************************************************************************** @@ -348,6 +346,7 @@ VOID ElemLib::Int32sToPixel( UINT_32 elemMask=0; UINT_32 elementXor = 0; // address xor when reading bytes from elements + // @@ NOTE: assert if called on a compressed format! if (properties.byteAligned) // Components are all byte-sized @@ -1273,7 +1272,6 @@ VOID ElemLib::RestoreSurfaceInfo( UINT_32 bpp; BOOL_32 bBCnFormat = FALSE; - (void)bBCnFormat; ADDR_ASSERT(pBpp != NULL); ADDR_ASSERT(pWidth != NULL && pHeight != NULL); @@ -1746,6 +1744,7 @@ BOOL_32 ElemLib::IsBlockCompressed( ((format >= ADDR_FMT_ASTC_4x4) && (format <= ADDR_FMT_ETC2_128BPP))); } + /** **************************************************************************************************** * ElemLib::IsCompressed diff --git a/runtime/hsa-runtime/image/addrlib/src/core/addrelemlib.h b/runtime/hsa-runtime/image/addrlib/src/core/addrelemlib.h index e8ad02756f..308c9844b3 100644 --- a/runtime/hsa-runtime/image/addrlib/src/core/addrelemlib.h +++ b/runtime/hsa-runtime/image/addrlib/src/core/addrelemlib.h @@ -1,28 +1,28 @@ /* - * Copyright © 2007-2019 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ +************************************************************************************************************************ +* +* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +* OTHER DEALINGS IN THE SOFTWARE +* +***********************************************************************************************************************/ + /** **************************************************************************************************** @@ -39,8 +39,7 @@ #include "addrcommon.h" namespace rocr { -namespace Addr -{ +namespace Addr { class Lib; diff --git a/runtime/hsa-runtime/image/addrlib/src/core/addrlib.cpp b/runtime/hsa-runtime/image/addrlib/src/core/addrlib.cpp index d24b8749de..b8c16d4432 100644 --- a/runtime/hsa-runtime/image/addrlib/src/core/addrlib.cpp +++ b/runtime/hsa-runtime/image/addrlib/src/core/addrlib.cpp @@ -1,28 +1,27 @@ /* - * Copyright © 2007-2019 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ +************************************************************************************************************************ +* +* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +* OTHER DEALINGS IN THE SOFTWARE +* +***********************************************************************************************************************/ /** **************************************************************************************************** @@ -82,8 +81,7 @@ UINT_32 __umoddi3(UINT_64 n, UINT_32 base) #endif // __APPLE__ namespace rocr { -namespace Addr -{ +namespace Addr { //////////////////////////////////////////////////////////////////////////////////////////////////// // Constructor/Destructor @@ -99,7 +97,6 @@ namespace Addr **************************************************************************************************** */ Lib::Lib() : - m_class(BASE_ADDRLIB), m_chipFamily(ADDR_CHIP_FAMILY_IVLD), m_chipRevision(0), m_version(ADDRLIB_VERSION), @@ -109,6 +106,8 @@ Lib::Lib() : m_rowSize(0), m_minPitchAlignPixels(1), m_maxSamples(8), + m_maxBaseAlign(0), + m_maxMetaBaseAlign(0), m_pElemLib(NULL) { m_configFlags.value = 0; @@ -125,7 +124,6 @@ Lib::Lib() : */ Lib::Lib(const Client* pClient) : Object(pClient), - m_class(BASE_ADDRLIB), m_chipFamily(ADDR_CHIP_FAMILY_IVLD), m_chipRevision(0), m_version(ADDRLIB_VERSION), @@ -135,6 +133,8 @@ Lib::Lib(const Client* pClient) : m_rowSize(0), m_minPitchAlignPixels(1), m_maxSamples(8), + m_maxBaseAlign(0), + m_maxMetaBaseAlign(0), m_pElemLib(NULL) { m_configFlags.value = 0; @@ -158,6 +158,7 @@ Lib::~Lib() } } + //////////////////////////////////////////////////////////////////////////////////////////////////// // Initialization/Helper //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -207,7 +208,7 @@ ADDR_E_RETURNCODE Lib::Create( pLib = SiHwlInit(&client); break; case FAMILY_VI: - case FAMILY_CZ: + case FAMILY_CZ: // VI based fusion case FAMILY_CI: case FAMILY_KV: // CI based fusion pLib = CiHwlInit(&client); @@ -225,8 +226,16 @@ ADDR_E_RETURNCODE Lib::Create( pLib = Gfx9HwlInit(&client); break; case FAMILY_NV: + case FAMILY_VGH: + case FAMILY_RMB: + case FAMILY_GC_10_3_6: + case FAMILY_GC_10_3_7: pLib = Gfx10HwlInit(&client); break; + case FAMILY_GFX1100: + case FAMILY_GFX1103: + pLib = Gfx11HwlInit(&client); + break; default: ADDR_ASSERT_ALWAYS(); break; @@ -252,6 +261,7 @@ ADDR_E_RETURNCODE Lib::Create( pLib->m_configFlags.allowLargeThickTile = pCreateIn->createFlags.allowLargeThickTile; pLib->m_configFlags.forceDccAndTcCompat = pCreateIn->createFlags.forceDccAndTcCompat; pLib->m_configFlags.nonPower2MemConfig = pCreateIn->createFlags.nonPower2MemConfig; + pLib->m_configFlags.enableAltTiling = pCreateIn->createFlags.enableAltTiling; pLib->m_configFlags.disableLinearOpt = FALSE; pLib->SetChipFamily(pCreateIn->chipFamily, pCreateIn->chipRevision); @@ -491,10 +501,12 @@ UINT_32 Lib::Bits2Number( return number; } + //////////////////////////////////////////////////////////////////////////////////////////////////// // Element lib //////////////////////////////////////////////////////////////////////////////////////////////////// + /** **************************************************************************************************** * Lib::Flt32ToColorPixel @@ -610,6 +622,7 @@ ADDR_E_RETURNCODE Lib::Flt32ToColorPixel( return returnCode; } + /** **************************************************************************************************** * Lib::GetExportNorm @@ -660,4 +673,3 @@ UINT_32 Lib::GetBpe(AddrFormat format) const } // Addr } // rocr - diff --git a/runtime/hsa-runtime/image/addrlib/src/core/addrlib.h b/runtime/hsa-runtime/image/addrlib/src/core/addrlib.h index 5584a49eea..0d16762a55 100644 --- a/runtime/hsa-runtime/image/addrlib/src/core/addrlib.h +++ b/runtime/hsa-runtime/image/addrlib/src/core/addrlib.h @@ -1,28 +1,27 @@ /* - * Copyright © 2007-2019 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ +************************************************************************************************************************ +* +* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +* OTHER DEALINGS IN THE SOFTWARE +* +***********************************************************************************************************************/ /** **************************************************************************************************** @@ -57,8 +56,7 @@ #endif namespace rocr { -namespace Addr -{ +namespace Addr { /** **************************************************************************************************** @@ -371,8 +369,6 @@ private: VOID SetMaxAlignments(); protected: - LibClass m_class; ///< Store class type (HWL type) - ChipFamily m_chipFamily; ///< Chip family translated from the one in atiid.h UINT_32 m_chipRevision; ///< Revision id from xxx_id.h @@ -411,8 +407,8 @@ Lib* SiHwlInit (const Client* pClient); Lib* CiHwlInit (const Client* pClient); Lib* Gfx9HwlInit (const Client* pClient); Lib* Gfx10HwlInit(const Client* pClient); +Lib* Gfx11HwlInit(const Client* pClient); } // Addr } // rocr - #endif diff --git a/runtime/hsa-runtime/image/addrlib/src/core/addrlib1.cpp b/runtime/hsa-runtime/image/addrlib/src/core/addrlib1.cpp index ad27785a18..c6ab5b3dac 100644 --- a/runtime/hsa-runtime/image/addrlib/src/core/addrlib1.cpp +++ b/runtime/hsa-runtime/image/addrlib/src/core/addrlib1.cpp @@ -1,28 +1,27 @@ /* - * Copyright © 2007-2019 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ +************************************************************************************************************************ +* +* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +* OTHER DEALINGS IN THE SOFTWARE +* +***********************************************************************************************************************/ /** **************************************************************************************************** @@ -36,10 +35,8 @@ #include "addrcommon.h" namespace rocr { -namespace Addr -{ -namespace V1 -{ +namespace Addr { +namespace V1 { //////////////////////////////////////////////////////////////////////////////////////////////////// // Static Const Member @@ -148,10 +145,12 @@ Lib* Lib::GetLib( return static_cast(hLib); } + //////////////////////////////////////////////////////////////////////////////////////////////////// // Surface Methods //////////////////////////////////////////////////////////////////////////////////////////////////// + /** **************************************************************************************************** * Lib::ComputeSurfaceInfo @@ -1229,6 +1228,8 @@ UINT_32 Lib::Thickness( return ModeFlags[tileMode].thickness; } + + //////////////////////////////////////////////////////////////////////////////////////////////////// // CMASK/HTILE //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -2009,6 +2010,7 @@ ADDR_E_RETURNCODE Lib::ComputeCmaskInfo( *pPitchOut = (pitchIn + macroWidth - 1) & ~(macroWidth - 1); *pHeightOut = (heightIn + macroHeight - 1) & ~(macroHeight - 1); + sliceBytes = ComputeCmaskBytes(*pPitchOut, *pHeightOut, 1); @@ -2187,7 +2189,6 @@ VOID Lib::HwlComputeXmaskCoordFromAddr( UINT_32 pipe; UINT_32 numPipes; UINT_32 numGroupBits; - (void)numGroupBits; UINT_32 numPipeBits; UINT_32 macroTilePitch; UINT_32 macroTileHeight; @@ -2236,6 +2237,7 @@ VOID Lib::HwlComputeXmaskCoordFromAddr( UINT_32 groupBits = 8 * m_pipeInterleaveBytes; UINT_32 pipes = numPipes; + // // Compute the micro tile size, in bits. And macro tile pitch and height. // @@ -2288,17 +2290,20 @@ VOID Lib::HwlComputeXmaskCoordFromAddr( pitch = pitchAligned; height = heightAligned; + // // Convert byte address to bit address. // bitAddr = BYTES_TO_BITS(addr) + bitPosition; + // // Remove pipe bits from address. // bitAddr = (bitAddr % groupBits) + ((bitAddr/groupBits/pipes)*groupBits); + elemOffset = bitAddr / elemBits; tilesPerMacro = (macroTilePitch/factor) * macroTileHeight / MicroTilePixels >> numPipeBits; @@ -2316,6 +2321,7 @@ VOID Lib::HwlComputeXmaskCoordFromAddr( macroY = static_cast((macroNumber % macrosPerSlice) / macrosPerPitch); macroZ = static_cast((macroNumber / macrosPerSlice)); + microX = microNumber % (macroTilePitch / factor / MicroTileWidth); microY = (microNumber / (macroTilePitch / factor / MicroTileHeight)); @@ -2326,6 +2332,7 @@ VOID Lib::HwlComputeXmaskCoordFromAddr( microTileCoordY = ComputeXmaskCoordYFromPipe(pipe, *pX/MicroTileWidth); + // // Assemble final coordinates. // @@ -2385,6 +2392,7 @@ UINT_64 Lib::HwlComputeXmaskAddrFromCoord( UINT_64 offsetHi; UINT_64 groupMask; + UINT_32 elemBits = 0; UINT_32 numPipes = m_pipes; // This function is accessed prior to si only @@ -3347,6 +3355,7 @@ VOID Lib::PadDimensions( heightAlign); } + /** **************************************************************************************************** * Lib::HwlPreHandleBaseLvl3xPitch @@ -3408,6 +3417,7 @@ UINT_32 Lib::HwlPostHandleBaseLvl3xPitch( return expPitch; } + /** **************************************************************************************************** * Lib::IsMacroTiled @@ -3524,7 +3534,6 @@ VOID Lib::ComputeMipLevel( { // Check if HWL has handled BOOL_32 hwlHandled = FALSE; - (void)hwlHandled; if (ElemLib::IsBlockCompressed(pIn->format)) { @@ -3928,6 +3937,7 @@ VOID Lib::ComputeQbStereoInfo( // 1D surface on SI may break this rule, but we can force it to meet by checking .qbStereo. } + /** **************************************************************************************************** * Lib::ComputePrtInfo @@ -4060,5 +4070,4 @@ ADDR_E_RETURNCODE Lib::ComputePrtInfo( } // V1 } // Addr -} // rocr - +} // namespace rocr diff --git a/runtime/hsa-runtime/image/addrlib/src/core/addrlib1.h b/runtime/hsa-runtime/image/addrlib/src/core/addrlib1.h index 904967bfd3..a6b7fe32d1 100644 --- a/runtime/hsa-runtime/image/addrlib/src/core/addrlib1.h +++ b/runtime/hsa-runtime/image/addrlib/src/core/addrlib1.h @@ -1,28 +1,28 @@ /* - * Copyright © 2007-2019 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ +************************************************************************************************************************ +* +* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +* OTHER DEALINGS IN THE SOFTWARE +* +***********************************************************************************************************************/ + /** **************************************************************************************************** @@ -37,10 +37,8 @@ #include "addrlib.h" namespace rocr { -namespace Addr -{ -namespace V1 -{ +namespace Addr { +namespace V1 { /** **************************************************************************************************** @@ -355,6 +353,7 @@ protected: const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, UINT_32* pPitchAlign, UINT_32* pHeightAlign, UINT_32* pSizeAlign) const = 0; + virtual VOID HwlOverrideTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const { // not supported in hwl layer @@ -540,8 +539,7 @@ private: } // V1 } // Addr -} // rocr - +} // namespace rocr #endif diff --git a/runtime/hsa-runtime/image/addrlib/src/core/addrlib2.cpp b/runtime/hsa-runtime/image/addrlib/src/core/addrlib2.cpp index 2d215cb657..e230291005 100644 --- a/runtime/hsa-runtime/image/addrlib/src/core/addrlib2.cpp +++ b/runtime/hsa-runtime/image/addrlib/src/core/addrlib2.cpp @@ -1,28 +1,28 @@ /* - * Copyright © 2007-2019 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ +************************************************************************************************************************ +* +* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +* OTHER DEALINGS IN THE SOFTWARE +* +***********************************************************************************************************************/ + /** ************************************************************************************************************************ @@ -36,10 +36,8 @@ #include "addrcommon.h" namespace rocr { -namespace Addr -{ -namespace V2 -{ +namespace Addr { +namespace V2 { //////////////////////////////////////////////////////////////////////////////////////////////////// // Static Const Member @@ -143,10 +141,12 @@ Lib* Lib::GetLib( return static_cast(hLib); } + //////////////////////////////////////////////////////////////////////////////////////////////////// // Surface Methods //////////////////////////////////////////////////////////////////////////////////////////////////// + /** ************************************************************************************************************************ * Lib::ComputeSurfaceInfo @@ -309,11 +309,16 @@ ADDR_E_RETURNCODE Lib::ComputeSurfaceInfo( if (pOut->pStereoInfo != NULL) { ComputeQbStereoInfo(pOut); +#if DEBUG + ValidateStereoInfo(pIn, pOut); +#endif } } } } + ADDR_ASSERT(pOut->surfSize != 0); + ValidBaseAlignments(pOut->baseAlign); return returnCode; @@ -436,6 +441,7 @@ ADDR_E_RETURNCODE Lib::ComputeSurfaceCoordFromAddr( return returnCode; } + //////////////////////////////////////////////////////////////////////////////////////////////////// // CMASK/HTILE //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -822,7 +828,12 @@ ADDR_E_RETURNCODE Lib::ComputeDccAddrFromCoord( } else { - returnCode = HwlComputeDccAddrFromCoord(pIn, pOut); + returnCode = HwlSupportComputeDccAddrFromCoord(pIn); + + if (returnCode == ADDR_OK) + { + HwlComputeDccAddrFromCoord(pIn, pOut); + } } return returnCode; @@ -888,6 +899,15 @@ ADDR_E_RETURNCODE Lib::ComputeSlicePipeBankXor( { returnCode = ADDR_NOTSUPPORTED; } + else if ((pIn->bpe != 0) && + (pIn->bpe != 8) && + (pIn->bpe != 16) && + (pIn->bpe != 32) && + (pIn->bpe != 64) && + (pIn->bpe != 128)) + { + returnCode = ADDR_INVALIDPARAMS; + } else { returnCode = HwlComputeSlicePipeBankXor(pIn, pOut); @@ -927,6 +947,37 @@ ADDR_E_RETURNCODE Lib::ComputeSubResourceOffsetForSwizzlePattern( return returnCode; } +/** +************************************************************************************************************************ +* Lib::ComputeNonBlockCompressedView +* +* @brief +* Interface function stub of Addr2ComputeNonBlockCompressedView. +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Lib::ComputeNonBlockCompressedView( + const ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_INPUT* pIn, + ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_OUTPUT* pOut) +{ + ADDR_E_RETURNCODE returnCode; + + if ((GetFillSizeFieldsFlags() == TRUE) && + ((pIn->size != sizeof(ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_INPUT)) || + (pOut->size != sizeof(ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_OUTPUT)))) + { + returnCode = ADDR_INVALIDPARAMS; + } + else + { + returnCode = HwlComputeNonBlockCompressedView(pIn, pOut); + } + + return returnCode; +} + /** ************************************************************************************************************************ * Lib::ExtractPipeBankXor @@ -1539,11 +1590,11 @@ Dim3d Lib::GetMipTailDim( { ADDR_ASSERT(IsThin(resourceType, swizzleMode)); +#if DEBUG // GFX9/GFX10 use different dimension shrinking logic for mipmap tail: say for 128KB block + 2BPE, the maximum // dimension of mipmap tail level will be [256W * 128H] on GFX9 ASICs and [128W * 256H] on GFX10 ASICs. Since // GFX10 is newer HWL so we make its implementation into base class, in order to save future change on new HWLs. // And assert log2BlkSize will always be an even value on GFX9, so we never need the logic wrapped by DEBUG... -#if DEBUG if ((log2BlkSize & 1) && (m_chipFamily == ADDR_CHIP_FAMILY_AI)) { // Should never go here... @@ -1958,7 +2009,7 @@ VOID Lib::FilterInvalidEqSwizzleMode( const UINT_32 rsrcTypeIdx = static_cast(resourceType) - 1; UINT_32 validSwModeSet = allowedSwModeSetVal; - for (UINT_32 swModeIdx = 0; validSwModeSet != 0; swModeIdx++) + for (UINT_32 swModeIdx = 1; validSwModeSet != 0; swModeIdx++) { if (validSwModeSet & 1) { @@ -1979,8 +2030,169 @@ VOID Lib::FilterInvalidEqSwizzleMode( } } +/** +************************************************************************************************************************ +* Lib::IsBlockTypeAvaiable +* +* @brief +* Determine whether a block type is allowed in a given blockSet +* +* @return +* N/A +************************************************************************************************************************ +*/ +BOOL_32 Lib::IsBlockTypeAvaiable( + ADDR2_BLOCK_SET blockSet, + AddrBlockType blockType) +{ + BOOL_32 avail; + + if (blockType == AddrBlockLinear) + { + avail = blockSet.linear ? TRUE : FALSE; + } + else + { + avail = blockSet.value & (1 << (static_cast(blockType) - 1)) ? TRUE : FALSE; + } + + return avail; +} + +/** +************************************************************************************************************************ +* Lib::BlockTypeWithinMemoryBudget +* +* @brief +* Determine whether a new block type is acceptible based on memory waste ratio +* +* @return +* N/A +************************************************************************************************************************ +*/ +BOOL_32 Lib::BlockTypeWithinMemoryBudget( + UINT_64 minSize, + UINT_64 newBlockTypeSize, + UINT_32 ratioLow, + UINT_32 ratioHi, + DOUBLE memoryBudget, + BOOL_32 newBlockTypeBigger) +{ + BOOL_32 accept = FALSE; + + if (memoryBudget >= 1.0) + { + if (newBlockTypeBigger) + { + if ((static_cast(newBlockTypeSize) / minSize) <= memoryBudget) + { + accept = TRUE; + } + } + else + { + if ((static_cast(minSize) / newBlockTypeSize) > memoryBudget) + { + accept = TRUE; + } + } + } + else + { + if (newBlockTypeBigger) + { + if ((newBlockTypeSize * ratioHi) <= (minSize * ratioLow)) + { + accept = TRUE; + } + } + else + { + if ((newBlockTypeSize * ratioLow) < (minSize * ratioHi)) + { + accept = TRUE; + } + } + } + + return accept; +} + +#if DEBUG +/** +************************************************************************************************************************ +* Lib::ValidateStereoInfo +* +* @brief +* Validate stereo info by checking a few typical cases +* +* @return +* N/A +************************************************************************************************************************ +*/ +VOID Lib::ValidateStereoInfo( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure + const ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [in] output structure + ) const +{ + ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT addrIn = {}; + addrIn.size = sizeof(addrIn); + addrIn.swizzleMode = pIn->swizzleMode; + addrIn.flags = pIn->flags; + addrIn.flags.qbStereo = 0; + addrIn.resourceType = pIn->resourceType; + addrIn.bpp = pIn->bpp; + addrIn.unalignedWidth = pIn->width; + addrIn.numSlices = pIn->numSlices; + addrIn.numMipLevels = pIn->numMipLevels; + addrIn.numSamples = pIn->numSamples; + addrIn.numFrags = pIn->numFrags; + + // Call Addr2ComputePipeBankXor() and validate different pbXor value if necessary... + const UINT_32 pbXor = 0; + + ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT addrOut = {}; + addrOut.size = sizeof(addrOut); + + // Make the array to be {0, 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096} for full test + const UINT_32 TestCoord[] = {0}; + + for (UINT_32 xIdx = 0; xIdx < sizeof(TestCoord) / sizeof(TestCoord[0]); xIdx++) + { + if (TestCoord[xIdx] < pIn->width) + { + addrIn.x = TestCoord[xIdx]; + + for (UINT_32 yIdx = 0; yIdx < sizeof(TestCoord) / sizeof(TestCoord[0]); yIdx++) + { + if (TestCoord[yIdx] < pIn->height) + { + addrIn.y = TestCoord[yIdx] + pOut->pStereoInfo->eyeHeight; + addrIn.pipeBankXor = pbXor ^ pOut->pStereoInfo->rightSwizzle; + addrIn.unalignedHeight = pIn->height + pOut->pStereoInfo->eyeHeight; + + ADDR_E_RETURNCODE ret = ComputeSurfaceAddrFromCoord(&addrIn, &addrOut); + ADDR_ASSERT(ret == ADDR_OK); + + const UINT_64 rightEyeOffsetFromBase = addrOut.addr; + + addrIn.y = TestCoord[yIdx]; + addrIn.pipeBankXor = pbXor; + addrIn.unalignedHeight = pIn->height; + + ret = ComputeSurfaceAddrFromCoord(&addrIn, &addrOut); + ADDR_ASSERT(ret == ADDR_OK); + + const UINT_64 rightEyeOffsetRelative = addrOut.addr; + + ADDR_ASSERT(rightEyeOffsetFromBase == rightEyeOffsetRelative + pOut->pStereoInfo->rightOffset); + } + } + } + } +} +#endif + } // V2 } // Addr } // rocr - - diff --git a/runtime/hsa-runtime/image/addrlib/src/core/addrlib2.h b/runtime/hsa-runtime/image/addrlib/src/core/addrlib2.h index 1e32742384..118306674e 100644 --- a/runtime/hsa-runtime/image/addrlib/src/core/addrlib2.h +++ b/runtime/hsa-runtime/image/addrlib/src/core/addrlib2.h @@ -1,28 +1,28 @@ /* - * Copyright © 2007-2019 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ +************************************************************************************************************************ +* +* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +* OTHER DEALINGS IN THE SOFTWARE +* +***********************************************************************************************************************/ + /** ************************************************************************************************************************ @@ -37,40 +37,44 @@ #include "addrlib.h" namespace rocr { -namespace Addr -{ -namespace V2 -{ +namespace Addr { +namespace V2 { /** ************************************************************************************************************************ * @brief Flags for SwizzleModeTable ************************************************************************************************************************ */ -struct SwizzleModeFlags +union SwizzleModeFlags { - // Swizzle mode - UINT_32 isLinear : 1; // Linear + struct + { + // Swizzle mode + UINT_32 isLinear : 1; // Linear - // Block size - UINT_32 is256b : 1; // Block size is 256B - UINT_32 is4kb : 1; // Block size is 4KB - UINT_32 is64kb : 1; // Block size is 64KB - UINT_32 isVar : 1; // Block size is variable + // Block size + UINT_32 is256b : 1; // Block size is 256B + UINT_32 is4kb : 1; // Block size is 4KB + UINT_32 is64kb : 1; // Block size is 64KB + UINT_32 isVar : 1; // Block size is variable - UINT_32 isZ : 1; // Z order swizzle mode - UINT_32 isStd : 1; // Standard swizzle mode - UINT_32 isDisp : 1; // Display swizzle mode - UINT_32 isRot : 1; // Rotate swizzle mode + UINT_32 isZ : 1; // Z order swizzle mode + UINT_32 isStd : 1; // Standard swizzle mode + UINT_32 isDisp : 1; // Display swizzle mode + UINT_32 isRot : 1; // Rotate swizzle mode - // XOR mode - UINT_32 isXor : 1; // XOR after swizzle if set + // XOR mode + UINT_32 isXor : 1; // XOR after swizzle if set - UINT_32 isT : 1; // T mode + UINT_32 isT : 1; // T mode - UINT_32 isRtOpt : 1; // mode opt for render target + // GFX10 + UINT_32 isRtOpt : 1; // mode opt for render target - UINT_32 reserved : 20; // Reserved bits + UINT_32 reserved : 20; // Reserved bits + }; + + UINT_32 u32All; }; struct Dim2d @@ -89,15 +93,18 @@ struct Dim3d // Macro define resource block type enum AddrBlockType { - AddrBlockMicro = 0, // Resource uses 256B block - AddrBlockThin4KB = 1, // Resource uses thin 4KB block - AddrBlockThick4KB = 2, // Resource uses thick 4KB block - AddrBlockThin64KB = 3, // Resource uses thin 64KB block - AddrBlockThick64KB = 4, // Resource uses thick 64KB block - AddrBlockVar = 5, // Resource uses var block, only valid for GFX9 - AddrBlockLinear = 6, // Resource uses linear swizzle mode + AddrBlockLinear = 0, // Resource uses linear swizzle mode + AddrBlockMicro = 1, // Resource uses 256B block + AddrBlockThin4KB = 2, // Resource uses thin 4KB block + AddrBlockThick4KB = 3, // Resource uses thick 4KB block + AddrBlockThin64KB = 4, // Resource uses thin 64KB block + AddrBlockThick64KB = 5, // Resource uses thick 64KB block + AddrBlockThinVar = 6, // Resource uses thin var block + AddrBlockThickVar = 7, // Resource uses thick var block + AddrBlockMaxTiledType, - AddrBlockMaxTiledType = AddrBlockVar + 1, + AddrBlockThin256KB = AddrBlockThinVar, + AddrBlockThick256KB = AddrBlockThickVar, }; enum AddrSwSet @@ -118,6 +125,87 @@ const UINT_32 Log2Size256 = 8u; const UINT_32 Log2Size4K = 12u; const UINT_32 Log2Size64K = 16u; +/** +************************************************************************************************************************ +* @brief Bit setting for swizzle pattern +************************************************************************************************************************ +*/ +union ADDR_BIT_SETTING +{ + struct + { + UINT_16 x; + UINT_16 y; + UINT_16 z; + UINT_16 s; + }; + UINT_64 value; +}; + +/** +************************************************************************************************************************ +* @brief Swizzle pattern information +************************************************************************************************************************ +*/ +struct ADDR_SW_PATINFO +{ + UINT_8 maxItemCount; + UINT_8 nibble01Idx; + UINT_16 nibble2Idx; + UINT_16 nibble3Idx; + UINT_8 nibble4Idx; +}; + +/** +************************************************************************************************************************ +* InitBit +* +* @brief +* Initialize bit setting value via a return value +************************************************************************************************************************ +*/ +#define InitBit(c, index) (1ull << ((c << 4) + index)) + +const UINT_64 X0 = InitBit(0, 0); +const UINT_64 X1 = InitBit(0, 1); +const UINT_64 X2 = InitBit(0, 2); +const UINT_64 X3 = InitBit(0, 3); +const UINT_64 X4 = InitBit(0, 4); +const UINT_64 X5 = InitBit(0, 5); +const UINT_64 X6 = InitBit(0, 6); +const UINT_64 X7 = InitBit(0, 7); +const UINT_64 X8 = InitBit(0, 8); +const UINT_64 X9 = InitBit(0, 9); +const UINT_64 X10 = InitBit(0, 10); +const UINT_64 X11 = InitBit(0, 11); + +const UINT_64 Y0 = InitBit(1, 0); +const UINT_64 Y1 = InitBit(1, 1); +const UINT_64 Y2 = InitBit(1, 2); +const UINT_64 Y3 = InitBit(1, 3); +const UINT_64 Y4 = InitBit(1, 4); +const UINT_64 Y5 = InitBit(1, 5); +const UINT_64 Y6 = InitBit(1, 6); +const UINT_64 Y7 = InitBit(1, 7); +const UINT_64 Y8 = InitBit(1, 8); +const UINT_64 Y9 = InitBit(1, 9); +const UINT_64 Y10 = InitBit(1, 10); +const UINT_64 Y11 = InitBit(1, 11); + +const UINT_64 Z0 = InitBit(2, 0); +const UINT_64 Z1 = InitBit(2, 1); +const UINT_64 Z2 = InitBit(2, 2); +const UINT_64 Z3 = InitBit(2, 3); +const UINT_64 Z4 = InitBit(2, 4); +const UINT_64 Z5 = InitBit(2, 5); +const UINT_64 Z6 = InitBit(2, 6); +const UINT_64 Z7 = InitBit(2, 7); +const UINT_64 Z8 = InitBit(2, 8); + +const UINT_64 S0 = InitBit(3, 0); +const UINT_64 S1 = InitBit(3, 1); +const UINT_64 S2 = InitBit(3, 2); + /** ************************************************************************************************************************ * @brief This class contains asic independent address lib functionalities @@ -209,6 +297,10 @@ public: const ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT* pIn, ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT* pOut); + ADDR_E_RETURNCODE ComputeNonBlockCompressedView( + const ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_INPUT* pIn, + ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_OUTPUT* pOut); + ADDR_E_RETURNCODE Addr2GetPreferredSurfaceSetting( const ADDR2_GET_PREFERRED_SURF_SETTING_INPUT* pIn, ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT* pOut) const; @@ -237,11 +329,7 @@ protected: BOOL_32 IsValidSwMode(AddrSwizzleMode swizzleMode) const { - // Don't dereference a reinterpret_cast pointer so as not to break - // strict-aliasing rules. - UINT_32 mode; - memcpy(&mode, &m_swizzleModeTable[swizzleMode], sizeof(UINT_32)); - return mode != 0; + return (m_swizzleModeTable[swizzleMode].u32All != 0); } // Checking block size @@ -458,12 +546,18 @@ protected: return ADDR_NOTSUPPORTED; } - virtual ADDR_E_RETURNCODE HwlComputeDccAddrFromCoord( + virtual ADDR_E_RETURNCODE HwlSupportComputeDccAddrFromCoord( + const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn) + { + ADDR_NOT_IMPLEMENTED(); + return ADDR_NOTSUPPORTED; + } + + virtual VOID HwlComputeDccAddrFromCoord( const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn, ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT* pOut) { ADDR_NOT_IMPLEMENTED(); - return ADDR_NOTSUPPORTED; } virtual ADDR_E_RETURNCODE HwlComputeCmaskAddrFromCoord( @@ -559,6 +653,14 @@ protected: return ADDR_NOTSUPPORTED; } + virtual ADDR_E_RETURNCODE HwlComputeNonBlockCompressedView( + const ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_INPUT* pIn, + ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_OUTPUT* pOut) const + { + ADDR_NOT_IMPLEMENTED(); + return ADDR_NOTSUPPORTED; + } + virtual ADDR_E_RETURNCODE HwlGetPreferredSurfaceSetting( const ADDR2_GET_PREFERRED_SURF_SETTING_INPUT* pIn, ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT* pOut) const @@ -822,6 +924,22 @@ protected: AddrResourceType resourceType, UINT_32 elemLog2) const; + static BOOL_32 IsBlockTypeAvaiable(ADDR2_BLOCK_SET blockSet, AddrBlockType blockType); + + static BOOL_32 BlockTypeWithinMemoryBudget( + UINT_64 minSize, + UINT_64 newBlockTypeSize, + UINT_32 ratioLow, + UINT_32 ratioHi, + DOUBLE memoryBudget = 0.0f, + BOOL_32 newBlockTypeBigger = TRUE); + +#if DEBUG + VOID ValidateStereoInfo( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, + const ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; +#endif + UINT_32 m_se; ///< Number of shader engine UINT_32 m_rbPerSe; ///< Number of render backend per shader engine UINT_32 m_maxCompFrag; ///< Number of max compressed fragment @@ -866,6 +984,5 @@ private: } // Addr } // rocr - #endif diff --git a/runtime/hsa-runtime/image/addrlib/src/core/addrobject.cpp b/runtime/hsa-runtime/image/addrlib/src/core/addrobject.cpp index 5d26d93fd5..2a08b0ae04 100644 --- a/runtime/hsa-runtime/image/addrlib/src/core/addrobject.cpp +++ b/runtime/hsa-runtime/image/addrlib/src/core/addrobject.cpp @@ -1,28 +1,28 @@ /* - * Copyright © 2007-2019 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ +************************************************************************************************************************ +* +* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +* OTHER DEALINGS IN THE SOFTWARE +* +***********************************************************************************************************************/ + /** **************************************************************************************************** @@ -35,8 +35,7 @@ #include "addrobject.h" namespace rocr { -namespace Addr -{ +namespace Addr { /** **************************************************************************************************** @@ -178,7 +177,8 @@ VOID Object::Free( */ VOID* Object::operator new( size_t objSize, ///< [in] Size to allocate - VOID* pMem) ///< [in] Pre-allocated pointer + VOID* pMem ///< [in] Pre-allocated pointer + ) noexcept { return pMem; } @@ -231,10 +231,10 @@ VOID Object::DebugPrint( m_client.callbacks.debugPrint(&debugPrintInput); va_end(ap); + va_end(debugPrintInput.ap); } #endif } } // Addr } // rocr - diff --git a/runtime/hsa-runtime/image/addrlib/src/core/addrobject.h b/runtime/hsa-runtime/image/addrlib/src/core/addrobject.h index ab68508cc9..0d270789a2 100644 --- a/runtime/hsa-runtime/image/addrlib/src/core/addrobject.h +++ b/runtime/hsa-runtime/image/addrlib/src/core/addrobject.h @@ -1,28 +1,28 @@ /* - * Copyright © 2007-2019 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ +************************************************************************************************************************ +* +* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +* OTHER DEALINGS IN THE SOFTWARE +* +***********************************************************************************************************************/ + /** **************************************************************************************************** @@ -38,8 +38,7 @@ #include "addrcommon.h" namespace rocr { -namespace Addr -{ +namespace Addr { /** **************************************************************************************************** @@ -63,7 +62,7 @@ public: Object(const Client* pClient); virtual ~Object(); - VOID* operator new(size_t size, VOID* pMem); + VOID* operator new(size_t size, VOID* pMem) noexcept; VOID operator delete(VOID* pObj); /// Microsoft compiler requires a matching delete implementation, which seems to be called when /// bad_alloc is thrown. But currently C++ exception isn't allowed so a dummy implementation is @@ -95,4 +94,3 @@ private: } // rocr #endif - diff --git a/runtime/hsa-runtime/image/addrlib/src/core/coord.cpp b/runtime/hsa-runtime/image/addrlib/src/core/coord.cpp index e022b3b2e7..f371458f4e 100644 --- a/runtime/hsa-runtime/image/addrlib/src/core/coord.cpp +++ b/runtime/hsa-runtime/image/addrlib/src/core/coord.cpp @@ -1,39 +1,36 @@ /* - * Copyright © 2007-2019 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ +************************************************************************************************************************ +* +* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +* OTHER DEALINGS IN THE SOFTWARE +* +***********************************************************************************************************************/ // Coordinate class implementation #include "addrcommon.h" #include "coord.h" namespace rocr { -namespace Addr -{ -namespace V2 -{ +namespace Addr { +namespace V2 { Coordinate::Coordinate() { @@ -604,4 +601,3 @@ BOOL_32 CoordEq::operator!=(const CoordEq& b) } // V2 } // Addr } // rocr - diff --git a/runtime/hsa-runtime/image/addrlib/src/core/coord.h b/runtime/hsa-runtime/image/addrlib/src/core/coord.h index bbbb169d22..490823f3ff 100644 --- a/runtime/hsa-runtime/image/addrlib/src/core/coord.h +++ b/runtime/hsa-runtime/image/addrlib/src/core/coord.h @@ -1,28 +1,27 @@ /* - * Copyright © 2007-2019 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ +************************************************************************************************************************ +* +* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +* OTHER DEALINGS IN THE SOFTWARE +* +***********************************************************************************************************************/ // Class used to define a coordinate bit @@ -30,12 +29,25 @@ #define __COORD_H namespace rocr { -namespace Addr -{ -namespace V2 -{ +namespace Addr { +namespace V2 { +#if defined(__cplusplus) +#if defined(_MSC_VER) + #if _MSC_VER >= 1900 + #define ADDR_CPP11_COMPILER TRUE + #endif +#else + #if __cplusplus >= 201103L + #define ADDR_CPP11_COMPILER TRUE + #endif +#endif +#endif +#if defined(ADDR_CPP11_COMPILER) +enum Dim : INT_8 +#else enum Dim +#endif { DIM_X, DIM_Y, @@ -130,6 +142,5 @@ private: } // Addr } // rocr - #endif diff --git a/runtime/hsa-runtime/image/addrlib/src/gfx10/gfx10SwizzlePattern.h b/runtime/hsa-runtime/image/addrlib/src/gfx10/gfx10SwizzlePattern.h index 249738a2fe..3a783bb4b3 100644 --- a/runtime/hsa-runtime/image/addrlib/src/gfx10/gfx10SwizzlePattern.h +++ b/runtime/hsa-runtime/image/addrlib/src/gfx10/gfx10SwizzlePattern.h @@ -1,28 +1,27 @@ /* - * Copyright © 2007-2019 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ +************************************************************************************************************************ +* +* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +* OTHER DEALINGS IN THE SOFTWARE +* +***********************************************************************************************************************/ /** ************************************************************************************************************************ @@ -35,92 +34,10 @@ #define __GFX10_SWIZZLE_PATTERN_H__ namespace rocr { -namespace Addr -{ -namespace V2 -{ -/** -************************************************************************************************************************ -* @brief Bit setting for swizzle pattern -************************************************************************************************************************ -*/ -union ADDR_BIT_SETTING -{ - struct - { - UINT_16 x; - UINT_16 y; - UINT_16 z; - UINT_16 s; - }; - UINT_64 value; -}; +namespace Addr { +namespace V2 { -/** -************************************************************************************************************************ -* @brief Swizzle pattern information -************************************************************************************************************************ -*/ -struct ADDR_SW_PATINFO -{ - UINT_8 maxItemCount; - UINT_8 nibble01Idx; - UINT_16 nibble2Idx; - UINT_16 nibble3Idx; - UINT_8 nibble4Idx; -}; - -/** -************************************************************************************************************************ -* InitBit -* -* @brief -* Initialize bit setting value via a return value -************************************************************************************************************************ -*/ -#define InitBit(c, index) (1ull << ((c << 4) + index)) - -const UINT_64 X0 = InitBit(0, 0); -const UINT_64 X1 = InitBit(0, 1); -const UINT_64 X2 = InitBit(0, 2); -const UINT_64 X3 = InitBit(0, 3); -const UINT_64 X4 = InitBit(0, 4); -const UINT_64 X5 = InitBit(0, 5); -const UINT_64 X6 = InitBit(0, 6); -const UINT_64 X7 = InitBit(0, 7); -const UINT_64 X8 = InitBit(0, 8); -const UINT_64 X9 = InitBit(0, 9); -const UINT_64 X10 = InitBit(0, 10); -const UINT_64 X11 = InitBit(0, 11); - -const UINT_64 Y0 = InitBit(1, 0); -const UINT_64 Y1 = InitBit(1, 1); -const UINT_64 Y2 = InitBit(1, 2); -const UINT_64 Y3 = InitBit(1, 3); -const UINT_64 Y4 = InitBit(1, 4); -const UINT_64 Y5 = InitBit(1, 5); -const UINT_64 Y6 = InitBit(1, 6); -const UINT_64 Y7 = InitBit(1, 7); -const UINT_64 Y8 = InitBit(1, 8); -const UINT_64 Y9 = InitBit(1, 9); -const UINT_64 Y10 = InitBit(1, 10); -const UINT_64 Y11 = InitBit(1, 11); - -const UINT_64 Z0 = InitBit(2, 0); -const UINT_64 Z1 = InitBit(2, 1); -const UINT_64 Z2 = InitBit(2, 2); -const UINT_64 Z3 = InitBit(2, 3); -const UINT_64 Z4 = InitBit(2, 4); -const UINT_64 Z5 = InitBit(2, 5); -const UINT_64 Z6 = InitBit(2, 6); -const UINT_64 Z7 = InitBit(2, 7); -const UINT_64 Z8 = InitBit(2, 8); - -const UINT_64 S0 = InitBit(3, 0); -const UINT_64 S1 = InitBit(3, 1); -const UINT_64 S2 = InitBit(3, 2); - -const ADDR_SW_PATINFO SW_256_S_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_256_S_PATINFO[] = { { 1, 0, 0, 0, 0, } , // 1 pipes 1 bpe @ SW_256_S @ Navi1x { 1, 1, 0, 0, 0, } , // 1 pipes 2 bpe @ SW_256_S @ Navi1x @@ -159,7 +76,7 @@ const ADDR_SW_PATINFO SW_256_S_PATINFO[] = { 1, 4, 0, 0, 0, } , // 64 pipes 16 bpe @ SW_256_S @ Navi1x }; -const ADDR_SW_PATINFO SW_256_D_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_256_D_PATINFO[] = { { 1, 5, 0, 0, 0, } , // 1 pipes 1 bpe @ SW_256_D @ Navi1x { 1, 1, 0, 0, 0, } , // 1 pipes 2 bpe @ SW_256_D @ Navi1x @@ -198,7 +115,7 @@ const ADDR_SW_PATINFO SW_256_D_PATINFO[] = { 1, 7, 0, 0, 0, } , // 64 pipes 16 bpe @ SW_256_D @ Navi1x }; -const ADDR_SW_PATINFO SW_4K_S_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_4K_S_PATINFO[] = { { 1, 0, 1, 0, 0, } , // 1 pipes 1 bpe @ SW_4K_S @ Navi1x { 1, 1, 2, 0, 0, } , // 1 pipes 2 bpe @ SW_4K_S @ Navi1x @@ -237,7 +154,7 @@ const ADDR_SW_PATINFO SW_4K_S_PATINFO[] = { 1, 4, 5, 0, 0, } , // 64 pipes 16 bpe @ SW_4K_S @ Navi1x }; -const ADDR_SW_PATINFO SW_4K_D_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_4K_D_PATINFO[] = { { 1, 5, 1, 0, 0, } , // 1 pipes 1 bpe @ SW_4K_D @ Navi1x { 1, 1, 2, 0, 0, } , // 1 pipes 2 bpe @ SW_4K_D @ Navi1x @@ -276,7 +193,7 @@ const ADDR_SW_PATINFO SW_4K_D_PATINFO[] = { 1, 7, 5, 0, 0, } , // 64 pipes 16 bpe @ SW_4K_D @ Navi1x }; -const ADDR_SW_PATINFO SW_4K_S_X_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_4K_S_X_PATINFO[] = { { 1, 0, 1, 0, 0, } , // 1 pipes 1 bpe @ SW_4K_S_X @ Navi1x { 1, 1, 2, 0, 0, } , // 1 pipes 2 bpe @ SW_4K_S_X @ Navi1x @@ -315,7 +232,7 @@ const ADDR_SW_PATINFO SW_4K_S_X_PATINFO[] = { 3, 4, 25, 0, 0, } , // 64 pipes 16 bpe @ SW_4K_S_X @ Navi1x }; -const ADDR_SW_PATINFO SW_4K_D_X_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_4K_D_X_PATINFO[] = { { 1, 5, 1, 0, 0, } , // 1 pipes 1 bpe @ SW_4K_D_X @ Navi1x { 1, 1, 2, 0, 0, } , // 1 pipes 2 bpe @ SW_4K_D_X @ Navi1x @@ -354,7 +271,7 @@ const ADDR_SW_PATINFO SW_4K_D_X_PATINFO[] = { 3, 7, 25, 0, 0, } , // 64 pipes 16 bpe @ SW_4K_D_X @ Navi1x }; -const ADDR_SW_PATINFO SW_4K_S3_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_4K_S3_PATINFO[] = { { 1, 29, 131, 0, 0, } , // 1 pipes 1 bpe @ SW_4K_S3 @ Navi1x { 1, 30, 132, 0, 0, } , // 1 pipes 2 bpe @ SW_4K_S3 @ Navi1x @@ -393,7 +310,7 @@ const ADDR_SW_PATINFO SW_4K_S3_PATINFO[] = { 1, 33, 135, 0, 0, } , // 64 pipes 16 bpe @ SW_4K_S3 @ Navi1x }; -const ADDR_SW_PATINFO SW_4K_S3_X_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_4K_S3_X_PATINFO[] = { { 1, 29, 131, 0, 0, } , // 1 pipes 1 bpe @ SW_4K_S3_X @ Navi1x { 1, 30, 132, 0, 0, } , // 1 pipes 2 bpe @ SW_4K_S3_X @ Navi1x @@ -432,7 +349,7 @@ const ADDR_SW_PATINFO SW_4K_S3_X_PATINFO[] = { 3, 33, 155, 0, 0, } , // 64 pipes 16 bpe @ SW_4K_S3_X @ Navi1x }; -const ADDR_SW_PATINFO SW_64K_S_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_64K_S_PATINFO[] = { { 1, 0, 1, 1, 0, } , // 1 pipes 1 bpe @ SW_64K_S @ Navi1x { 1, 1, 2, 2, 0, } , // 1 pipes 2 bpe @ SW_64K_S @ Navi1x @@ -471,7 +388,7 @@ const ADDR_SW_PATINFO SW_64K_S_PATINFO[] = { 1, 4, 5, 5, 0, } , // 64 pipes 16 bpe @ SW_64K_S @ Navi1x }; -const ADDR_SW_PATINFO SW_64K_D_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_64K_D_PATINFO[] = { { 1, 5, 1, 1, 0, } , // 1 pipes 1 bpe @ SW_64K_D @ Navi1x { 1, 1, 2, 2, 0, } , // 1 pipes 2 bpe @ SW_64K_D @ Navi1x @@ -510,7 +427,7 @@ const ADDR_SW_PATINFO SW_64K_D_PATINFO[] = { 1, 7, 5, 5, 0, } , // 64 pipes 16 bpe @ SW_64K_D @ Navi1x }; -const ADDR_SW_PATINFO SW_64K_S_T_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_64K_S_T_PATINFO[] = { { 1, 0, 1, 1, 0, } , // 1 pipes 1 bpe @ SW_64K_S_T @ Navi1x { 1, 1, 2, 2, 0, } , // 1 pipes 2 bpe @ SW_64K_S_T @ Navi1x @@ -549,7 +466,7 @@ const ADDR_SW_PATINFO SW_64K_S_T_PATINFO[] = { 2, 4, 5, 25, 0, } , // 64 pipes 16 bpe @ SW_64K_S_T @ Navi1x }; -const ADDR_SW_PATINFO SW_64K_D_T_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_64K_D_T_PATINFO[] = { { 1, 5, 1, 1, 0, } , // 1 pipes 1 bpe @ SW_64K_D_T @ Navi1x { 1, 1, 2, 2, 0, } , // 1 pipes 2 bpe @ SW_64K_D_T @ Navi1x @@ -588,7 +505,7 @@ const ADDR_SW_PATINFO SW_64K_D_T_PATINFO[] = { 2, 7, 5, 25, 0, } , // 64 pipes 16 bpe @ SW_64K_D_T @ Navi1x }; -const ADDR_SW_PATINFO SW_64K_S_X_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_64K_S_X_PATINFO[] = { { 1, 0, 1, 1, 0, } , // 1 pipes 1 bpe @ SW_64K_S_X @ Navi1x { 1, 1, 2, 2, 0, } , // 1 pipes 2 bpe @ SW_64K_S_X @ Navi1x @@ -627,7 +544,7 @@ const ADDR_SW_PATINFO SW_64K_S_X_PATINFO[] = { 3, 4, 35, 15, 0, } , // 64 pipes 16 bpe @ SW_64K_S_X @ Navi1x }; -const ADDR_SW_PATINFO SW_64K_D_X_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_64K_D_X_PATINFO[] = { { 1, 5, 1, 1, 0, } , // 1 pipes 1 bpe @ SW_64K_D_X @ Navi1x { 1, 1, 2, 2, 0, } , // 1 pipes 2 bpe @ SW_64K_D_X @ Navi1x @@ -666,7 +583,7 @@ const ADDR_SW_PATINFO SW_64K_D_X_PATINFO[] = { 3, 7, 35, 15, 0, } , // 64 pipes 16 bpe @ SW_64K_D_X @ Navi1x }; -const ADDR_SW_PATINFO SW_64K_R_X_1xaa_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_64K_R_X_1xaa_PATINFO[] = { { 1, 5, 1, 1, 0, } , // 1 pipes 1 bpe @ SW_64K_R_X 1xaa @ Navi1x { 1, 1, 2, 2, 0, } , // 1 pipes 2 bpe @ SW_64K_R_X 1xaa @ Navi1x @@ -705,7 +622,7 @@ const ADDR_SW_PATINFO SW_64K_R_X_1xaa_PATINFO[] = { 3, 7, 79, 41, 0, } , // 64 pipes 16 bpe @ SW_64K_R_X 1xaa @ Navi1x }; -const ADDR_SW_PATINFO SW_64K_R_X_2xaa_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_64K_R_X_2xaa_PATINFO[] = { { 2, 5, 1, 99, 0, } , // 1 pipes 1 bpe @ SW_64K_R_X 2xaa @ Navi1x { 2, 1, 2, 100, 0, } , // 1 pipes 2 bpe @ SW_64K_R_X 2xaa @ Navi1x @@ -744,7 +661,7 @@ const ADDR_SW_PATINFO SW_64K_R_X_2xaa_PATINFO[] = { 3, 7, 115, 41, 0, } , // 64 pipes 16 bpe @ SW_64K_R_X 2xaa @ Navi1x }; -const ADDR_SW_PATINFO SW_64K_R_X_4xaa_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_64K_R_X_4xaa_PATINFO[] = { { 2, 5, 1, 118, 0, } , // 1 pipes 1 bpe @ SW_64K_R_X 4xaa @ Navi1x { 2, 1, 2, 119, 0, } , // 1 pipes 2 bpe @ SW_64K_R_X 4xaa @ Navi1x @@ -783,7 +700,7 @@ const ADDR_SW_PATINFO SW_64K_R_X_4xaa_PATINFO[] = { 3, 7, 122, 41, 0, } , // 64 pipes 16 bpe @ SW_64K_R_X 4xaa @ Navi1x }; -const ADDR_SW_PATINFO SW_64K_R_X_8xaa_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_64K_R_X_8xaa_PATINFO[] = { { 2, 5, 1, 134, 0, } , // 1 pipes 1 bpe @ SW_64K_R_X 8xaa @ Navi1x { 2, 1, 2, 135, 0, } , // 1 pipes 2 bpe @ SW_64K_R_X 8xaa @ Navi1x @@ -822,7 +739,7 @@ const ADDR_SW_PATINFO SW_64K_R_X_8xaa_PATINFO[] = { 3, 7, 130, 147, 0, } , // 64 pipes 16 bpe @ SW_64K_R_X 8xaa @ Navi1x }; -const ADDR_SW_PATINFO SW_64K_Z_X_1xaa_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_64K_Z_X_1xaa_PATINFO[] = { { 1, 8, 1, 1, 0, } , // 1 pipes 1 bpe @ SW_64K_Z_X 1xaa @ Navi1x { 1, 9, 2, 2, 0, } , // 1 pipes 2 bpe @ SW_64K_Z_X 1xaa @ Navi1x @@ -861,7 +778,7 @@ const ADDR_SW_PATINFO SW_64K_Z_X_1xaa_PATINFO[] = { 3, 7, 79, 41, 0, } , // 64 pipes 16 bpe @ SW_64K_Z_X 1xaa @ Navi1x }; -const ADDR_SW_PATINFO SW_64K_Z_X_2xaa_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_64K_Z_X_2xaa_PATINFO[] = { { 1, 13, 80, 42, 0, } , // 1 pipes 1 bpe @ SW_64K_Z_X 2xaa @ Navi1x { 1, 14, 3, 3, 0, } , // 1 pipes 2 bpe @ SW_64K_Z_X 2xaa @ Navi1x @@ -900,7 +817,7 @@ const ADDR_SW_PATINFO SW_64K_Z_X_2xaa_PATINFO[] = { 3, 17, 89, 61, 0, } , // 64 pipes 16 bpe @ SW_64K_Z_X 2xaa @ Navi1x }; -const ADDR_SW_PATINFO SW_64K_Z_X_4xaa_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_64K_Z_X_4xaa_PATINFO[] = { { 1, 18, 3, 3, 0, } , // 1 pipes 1 bpe @ SW_64K_Z_X 4xaa @ Navi1x { 2, 19, 90, 62, 0, } , // 1 pipes 2 bpe @ SW_64K_Z_X 4xaa @ Navi1x @@ -939,7 +856,7 @@ const ADDR_SW_PATINFO SW_64K_Z_X_4xaa_PATINFO[] = { 3, 22, 100, 82, 0, } , // 64 pipes 16 bpe @ SW_64K_Z_X 4xaa @ Navi1x }; -const ADDR_SW_PATINFO SW_64K_Z_X_8xaa_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_64K_Z_X_8xaa_PATINFO[] = { { 2, 23, 3, 43, 0, } , // 1 pipes 1 bpe @ SW_64K_Z_X 8xaa @ Navi1x { 2, 24, 3, 63, 0, } , // 1 pipes 2 bpe @ SW_64K_Z_X 8xaa @ Navi1x @@ -978,7 +895,7 @@ const ADDR_SW_PATINFO SW_64K_Z_X_8xaa_PATINFO[] = { 3, 27, 112, 98, 0, } , // 64 pipes 16 bpe @ SW_64K_Z_X 8xaa @ Navi1x }; -const ADDR_SW_PATINFO SW_64K_S3_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_64K_S3_PATINFO[] = { { 1, 29, 131, 148, 0, } , // 1 pipes 1 bpe @ SW_64K_S3 @ Navi1x { 1, 30, 132, 149, 0, } , // 1 pipes 2 bpe @ SW_64K_S3 @ Navi1x @@ -1017,7 +934,7 @@ const ADDR_SW_PATINFO SW_64K_S3_PATINFO[] = { 1, 33, 135, 152, 0, } , // 64 pipes 16 bpe @ SW_64K_S3 @ Navi1x }; -const ADDR_SW_PATINFO SW_64K_S3_X_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_64K_S3_X_PATINFO[] = { { 1, 29, 131, 148, 0, } , // 1 pipes 1 bpe @ SW_64K_S3_X @ Navi1x { 1, 30, 132, 149, 0, } , // 1 pipes 2 bpe @ SW_64K_S3_X @ Navi1x @@ -1056,7 +973,7 @@ const ADDR_SW_PATINFO SW_64K_S3_X_PATINFO[] = { 3, 33, 165, 162, 0, } , // 64 pipes 16 bpe @ SW_64K_S3_X @ Navi1x }; -const ADDR_SW_PATINFO SW_64K_S3_T_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_64K_S3_T_PATINFO[] = { { 1, 29, 131, 148, 0, } , // 1 pipes 1 bpe @ SW_64K_S3_T @ Navi1x { 1, 30, 132, 149, 0, } , // 1 pipes 2 bpe @ SW_64K_S3_T @ Navi1x @@ -1095,7 +1012,7 @@ const ADDR_SW_PATINFO SW_64K_S3_T_PATINFO[] = { 3, 33, 135, 167, 0, } , // 64 pipes 16 bpe @ SW_64K_S3_T @ Navi1x }; -const ADDR_SW_PATINFO SW_64K_D3_X_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_64K_D3_X_PATINFO[] = { { 1, 34, 131, 148, 0, } , // 1 pipes 1 bpe @ SW_64K_D3_X @ Navi1x { 1, 35, 132, 149, 0, } , // 1 pipes 2 bpe @ SW_64K_D3_X @ Navi1x @@ -1134,7 +1051,7 @@ const ADDR_SW_PATINFO SW_64K_D3_X_PATINFO[] = { 3, 38, 209, 182, 0, } , // 64 pipes 16 bpe @ SW_64K_D3_X @ Navi1x }; -const ADDR_SW_PATINFO SW_256_S_RBPLUS_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_256_S_RBPLUS_PATINFO[] = { { 1, 0, 0, 0, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_256_S @ RbPlus { 1, 1, 0, 0, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_256_S @ RbPlus @@ -1213,7 +1130,7 @@ const ADDR_SW_PATINFO SW_256_S_RBPLUS_PATINFO[] = { 1, 4, 0, 0, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_256_S @ RbPlus }; -const ADDR_SW_PATINFO SW_256_D_RBPLUS_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_256_D_RBPLUS_PATINFO[] = { { 1, 5, 0, 0, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_256_D @ RbPlus { 1, 1, 0, 0, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_256_D @ RbPlus @@ -1292,7 +1209,7 @@ const ADDR_SW_PATINFO SW_256_D_RBPLUS_PATINFO[] = { 1, 7, 0, 0, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_256_D @ RbPlus }; -const ADDR_SW_PATINFO SW_4K_S_RBPLUS_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_4K_S_RBPLUS_PATINFO[] = { { 1, 0, 1, 0, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_4K_S @ RbPlus { 1, 1, 2, 0, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_4K_S @ RbPlus @@ -1371,7 +1288,7 @@ const ADDR_SW_PATINFO SW_4K_S_RBPLUS_PATINFO[] = { 1, 4, 5, 0, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_4K_S @ RbPlus }; -const ADDR_SW_PATINFO SW_4K_D_RBPLUS_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_4K_D_RBPLUS_PATINFO[] = { { 1, 5, 1, 0, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_4K_D @ RbPlus { 1, 1, 2, 0, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_4K_D @ RbPlus @@ -1450,7 +1367,7 @@ const ADDR_SW_PATINFO SW_4K_D_RBPLUS_PATINFO[] = { 1, 7, 5, 0, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_4K_D @ RbPlus }; -const ADDR_SW_PATINFO SW_4K_S_X_RBPLUS_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_4K_S_X_RBPLUS_PATINFO[] = { { 1, 0, 1, 0, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_4K_S_X @ RbPlus { 1, 1, 2, 0, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_4K_S_X @ RbPlus @@ -1529,7 +1446,7 @@ const ADDR_SW_PATINFO SW_4K_S_X_RBPLUS_PATINFO[] = { 3, 4, 244, 0, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_4K_S_X @ RbPlus }; -const ADDR_SW_PATINFO SW_4K_D_X_RBPLUS_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_4K_D_X_RBPLUS_PATINFO[] = { { 1, 5, 1, 0, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_4K_D_X @ RbPlus { 1, 1, 2, 0, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_4K_D_X @ RbPlus @@ -1608,7 +1525,7 @@ const ADDR_SW_PATINFO SW_4K_D_X_RBPLUS_PATINFO[] = { 3, 7, 244, 0, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_4K_D_X @ RbPlus }; -const ADDR_SW_PATINFO SW_4K_S3_RBPLUS_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_4K_S3_RBPLUS_PATINFO[] = { { 1, 29, 131, 0, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_4K_S3 @ RbPlus { 1, 30, 132, 0, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_4K_S3 @ RbPlus @@ -1687,7 +1604,7 @@ const ADDR_SW_PATINFO SW_4K_S3_RBPLUS_PATINFO[] = { 1, 33, 135, 0, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_4K_S3 @ RbPlus }; -const ADDR_SW_PATINFO SW_4K_S3_X_RBPLUS_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_4K_S3_X_RBPLUS_PATINFO[] = { { 1, 29, 131, 0, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_4K_S3_X @ RbPlus { 1, 30, 132, 0, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_4K_S3_X @ RbPlus @@ -1766,7 +1683,7 @@ const ADDR_SW_PATINFO SW_4K_S3_X_RBPLUS_PATINFO[] = { 3, 33, 155, 0, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_4K_S3_X @ RbPlus }; -const ADDR_SW_PATINFO SW_64K_S_RBPLUS_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_64K_S_RBPLUS_PATINFO[] = { { 1, 0, 1, 1, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_S @ RbPlus { 1, 1, 2, 2, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_S @ RbPlus @@ -1845,7 +1762,7 @@ const ADDR_SW_PATINFO SW_64K_S_RBPLUS_PATINFO[] = { 1, 4, 5, 5, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_S @ RbPlus }; -const ADDR_SW_PATINFO SW_64K_D_RBPLUS_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_64K_D_RBPLUS_PATINFO[] = { { 1, 5, 1, 1, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_D @ RbPlus { 1, 1, 2, 2, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_D @ RbPlus @@ -1924,7 +1841,7 @@ const ADDR_SW_PATINFO SW_64K_D_RBPLUS_PATINFO[] = { 1, 7, 5, 5, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_D @ RbPlus }; -const ADDR_SW_PATINFO SW_64K_S_T_RBPLUS_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_64K_S_T_RBPLUS_PATINFO[] = { { 1, 0, 1, 1, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_S_T @ RbPlus { 1, 1, 2, 2, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_S_T @ RbPlus @@ -2003,7 +1920,7 @@ const ADDR_SW_PATINFO SW_64K_S_T_RBPLUS_PATINFO[] = { 2, 4, 5, 25, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_S_T @ RbPlus }; -const ADDR_SW_PATINFO SW_64K_D_T_RBPLUS_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_64K_D_T_RBPLUS_PATINFO[] = { { 1, 5, 1, 1, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_D_T @ RbPlus { 1, 1, 2, 2, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_D_T @ RbPlus @@ -2082,7 +1999,7 @@ const ADDR_SW_PATINFO SW_64K_D_T_RBPLUS_PATINFO[] = { 2, 7, 5, 25, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_D_T @ RbPlus }; -const ADDR_SW_PATINFO SW_64K_S_X_RBPLUS_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_64K_S_X_RBPLUS_PATINFO[] = { { 1, 0, 1, 1, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_S_X @ RbPlus { 1, 1, 2, 2, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_S_X @ RbPlus @@ -2161,7 +2078,7 @@ const ADDR_SW_PATINFO SW_64K_S_X_RBPLUS_PATINFO[] = { 3, 4, 269, 15, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_S_X @ RbPlus }; -const ADDR_SW_PATINFO SW_64K_D_X_RBPLUS_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_64K_D_X_RBPLUS_PATINFO[] = { { 1, 5, 1, 1, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_D_X @ RbPlus { 1, 1, 2, 2, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_D_X @ RbPlus @@ -2240,7 +2157,7 @@ const ADDR_SW_PATINFO SW_64K_D_X_RBPLUS_PATINFO[] = { 3, 7, 269, 15, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_D_X @ RbPlus }; -const ADDR_SW_PATINFO SW_64K_R_X_1xaa_RBPLUS_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_64K_R_X_1xaa_RBPLUS_PATINFO[] = { { 2, 0, 347, 193, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_R_X 1xaa @ RbPlus { 2, 1, 348, 366, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_R_X 1xaa @ RbPlus @@ -2319,7 +2236,7 @@ const ADDR_SW_PATINFO SW_64K_R_X_1xaa_RBPLUS_PATINFO[] = { 3, 7, 324, 414, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_R_X 1xaa @ RbPlus }; -const ADDR_SW_PATINFO SW_64K_R_X_2xaa_RBPLUS_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_64K_R_X_2xaa_RBPLUS_PATINFO[] = { { 3, 0, 424, 526, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_R_X 2xaa @ RbPlus { 3, 1, 348, 527, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_R_X 2xaa @ RbPlus @@ -2398,7 +2315,7 @@ const ADDR_SW_PATINFO SW_64K_R_X_2xaa_RBPLUS_PATINFO[] = { 3, 7, 429, 414, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_R_X 2xaa @ RbPlus }; -const ADDR_SW_PATINFO SW_64K_R_X_4xaa_RBPLUS_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_64K_R_X_4xaa_RBPLUS_PATINFO[] = { { 3, 0, 347, 566, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_R_X 4xaa @ RbPlus { 3, 1, 348, 733, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_R_X 4xaa @ RbPlus @@ -2477,7 +2394,7 @@ const ADDR_SW_PATINFO SW_64K_R_X_4xaa_RBPLUS_PATINFO[] = { 3, 7, 441, 414, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_R_X 4xaa @ RbPlus }; -const ADDR_SW_PATINFO SW_64K_R_X_8xaa_RBPLUS_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_64K_R_X_8xaa_RBPLUS_PATINFO[] = { { 3, 0, 424, 619, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_R_X 8xaa @ RbPlus { 3, 1, 348, 620, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_R_X 8xaa @ RbPlus @@ -2556,7 +2473,7 @@ const ADDR_SW_PATINFO SW_64K_R_X_8xaa_RBPLUS_PATINFO[] = { 3, 7, 458, 414, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_R_X 8xaa @ RbPlus }; -const ADDR_SW_PATINFO SW_64K_Z_X_1xaa_RBPLUS_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_64K_Z_X_1xaa_RBPLUS_PATINFO[] = { { 2, 8, 347, 193, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_Z_X 1xaa @ RbPlus { 2, 9, 348, 366, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_Z_X 1xaa @ RbPlus @@ -2635,7 +2552,7 @@ const ADDR_SW_PATINFO SW_64K_Z_X_1xaa_RBPLUS_PATINFO[] = { 3, 7, 324, 414, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_Z_X 1xaa @ RbPlus }; -const ADDR_SW_PATINFO SW_64K_Z_X_2xaa_RBPLUS_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_64K_Z_X_2xaa_RBPLUS_PATINFO[] = { { 2, 13, 357, 415, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_Z_X 2xaa @ RbPlus { 2, 14, 349, 195, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_Z_X 2xaa @ RbPlus @@ -2714,7 +2631,7 @@ const ADDR_SW_PATINFO SW_64K_Z_X_2xaa_RBPLUS_PATINFO[] = { 3, 17, 367, 414, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_Z_X 2xaa @ RbPlus }; -const ADDR_SW_PATINFO SW_64K_Z_X_4xaa_RBPLUS_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_64K_Z_X_4xaa_RBPLUS_PATINFO[] = { { 2, 18, 349, 195, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_Z_X 4xaa @ RbPlus { 3, 19, 349, 447, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_Z_X 4xaa @ RbPlus @@ -2793,7 +2710,7 @@ const ADDR_SW_PATINFO SW_64K_Z_X_4xaa_RBPLUS_PATINFO[] = { 3, 22, 377, 414, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_Z_X 4xaa @ RbPlus }; -const ADDR_SW_PATINFO SW_64K_Z_X_8xaa_RBPLUS_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_64K_Z_X_8xaa_RBPLUS_PATINFO[] = { { 3, 23, 358, 263, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_Z_X 8xaa @ RbPlus { 3, 24, 349, 448, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_Z_X 8xaa @ RbPlus @@ -2872,7 +2789,7 @@ const ADDR_SW_PATINFO SW_64K_Z_X_8xaa_RBPLUS_PATINFO[] = { 3, 27, 393, 414, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_Z_X 8xaa @ RbPlus }; -const ADDR_SW_PATINFO SW_64K_S3_RBPLUS_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_64K_S3_RBPLUS_PATINFO[] = { { 1, 29, 131, 148, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_S3 @ RbPlus { 1, 30, 132, 149, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_S3 @ RbPlus @@ -2951,7 +2868,7 @@ const ADDR_SW_PATINFO SW_64K_S3_RBPLUS_PATINFO[] = { 1, 33, 135, 152, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_S3 @ RbPlus }; -const ADDR_SW_PATINFO SW_64K_S3_X_RBPLUS_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_64K_S3_X_RBPLUS_PATINFO[] = { { 1, 29, 131, 148, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_S3_X @ RbPlus { 1, 30, 132, 149, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_S3_X @ RbPlus @@ -3030,7 +2947,7 @@ const ADDR_SW_PATINFO SW_64K_S3_X_RBPLUS_PATINFO[] = { 3, 33, 165, 162, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_S3_X @ RbPlus }; -const ADDR_SW_PATINFO SW_64K_S3_T_RBPLUS_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_64K_S3_T_RBPLUS_PATINFO[] = { { 1, 29, 131, 148, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_S3_T @ RbPlus { 1, 30, 132, 149, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_S3_T @ RbPlus @@ -3109,7 +3026,7 @@ const ADDR_SW_PATINFO SW_64K_S3_T_RBPLUS_PATINFO[] = { 3, 33, 135, 167, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_S3_T @ RbPlus }; -const ADDR_SW_PATINFO SW_64K_D3_X_RBPLUS_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_64K_D3_X_RBPLUS_PATINFO[] = { { 1, 34, 131, 148, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_D3_X @ RbPlus { 1, 35, 132, 149, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_D3_X @ RbPlus @@ -3188,7 +3105,7 @@ const ADDR_SW_PATINFO SW_64K_D3_X_RBPLUS_PATINFO[] = { 4, 38, 509, 841, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_D3_X @ RbPlus }; -const ADDR_SW_PATINFO SW_VAR_R_X_1xaa_RBPLUS_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_VAR_R_X_1xaa_RBPLUS_PATINFO[] = { { 2, 0, 270, 183, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_VAR_R_X 1xaa @ RbPlus { 2, 1, 271, 184, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_VAR_R_X 1xaa @ RbPlus @@ -3267,7 +3184,7 @@ const ADDR_SW_PATINFO SW_VAR_R_X_1xaa_RBPLUS_PATINFO[] = { 3, 7, 311, 254, 44, } , // 64 pipes (32 PKRs) 16 bpe @ SW_VAR_R_X 1xaa @ RbPlus }; -const ADDR_SW_PATINFO SW_VAR_R_X_2xaa_RBPLUS_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_VAR_R_X_2xaa_RBPLUS_PATINFO[] = { { 3, 0, 403, 516, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_VAR_R_X 2xaa @ RbPlus { 3, 1, 271, 517, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_VAR_R_X 2xaa @ RbPlus @@ -3346,7 +3263,7 @@ const ADDR_SW_PATINFO SW_VAR_R_X_2xaa_RBPLUS_PATINFO[] = { 3, 7, 318, 290, 158, } , // 64 pipes (32 PKRs) 16 bpe @ SW_VAR_R_X 2xaa @ RbPlus }; -const ADDR_SW_PATINFO SW_VAR_R_X_4xaa_RBPLUS_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_VAR_R_X_4xaa_RBPLUS_PATINFO[] = { { 3, 0, 270, 556, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_VAR_R_X 4xaa @ RbPlus { 3, 1, 271, 557, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_VAR_R_X 4xaa @ RbPlus @@ -3425,7 +3342,7 @@ const ADDR_SW_PATINFO SW_VAR_R_X_4xaa_RBPLUS_PATINFO[] = { 3, 7, 324, 328, 204, } , // 64 pipes (32 PKRs) 16 bpe @ SW_VAR_R_X 4xaa @ RbPlus }; -const ADDR_SW_PATINFO SW_VAR_R_X_8xaa_RBPLUS_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_VAR_R_X_8xaa_RBPLUS_PATINFO[] = { { 3, 0, 407, 610, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_VAR_R_X 8xaa @ RbPlus { 3, 1, 408, 611, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_VAR_R_X 8xaa @ RbPlus @@ -3504,7 +3421,7 @@ const ADDR_SW_PATINFO SW_VAR_R_X_8xaa_RBPLUS_PATINFO[] = { 3, 7, 344, 668, 204, } , // 64 pipes (32 PKRs) 16 bpe @ SW_VAR_R_X 8xaa @ RbPlus }; -const ADDR_SW_PATINFO SW_VAR_Z_X_1xaa_RBPLUS_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_VAR_Z_X_1xaa_RBPLUS_PATINFO[] = { { 2, 8, 270, 183, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_VAR_Z_X 1xaa @ RbPlus { 2, 9, 271, 184, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_VAR_Z_X 1xaa @ RbPlus @@ -3583,7 +3500,7 @@ const ADDR_SW_PATINFO SW_VAR_Z_X_1xaa_RBPLUS_PATINFO[] = { 3, 7, 311, 254, 44, } , // 64 pipes (32 PKRs) 16 bpe @ SW_VAR_Z_X 1xaa @ RbPlus }; -const ADDR_SW_PATINFO SW_VAR_Z_X_2xaa_RBPLUS_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_VAR_Z_X_2xaa_RBPLUS_PATINFO[] = { { 2, 13, 312, 255, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_VAR_Z_X 2xaa @ RbPlus { 2, 14, 272, 185, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_VAR_Z_X 2xaa @ RbPlus @@ -3662,7 +3579,7 @@ const ADDR_SW_PATINFO SW_VAR_Z_X_2xaa_RBPLUS_PATINFO[] = { 3, 17, 318, 290, 65, } , // 64 pipes (32 PKRs) 16 bpe @ SW_VAR_Z_X 2xaa @ RbPlus }; -const ADDR_SW_PATINFO SW_VAR_Z_X_4xaa_RBPLUS_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_VAR_Z_X_4xaa_RBPLUS_PATINFO[] = { { 2, 18, 272, 185, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_VAR_Z_X 4xaa @ RbPlus { 3, 19, 272, 291, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_VAR_Z_X 4xaa @ RbPlus @@ -3741,7 +3658,7 @@ const ADDR_SW_PATINFO SW_VAR_Z_X_4xaa_RBPLUS_PATINFO[] = { 3, 22, 324, 328, 100, } , // 64 pipes (32 PKRs) 16 bpe @ SW_VAR_Z_X 4xaa @ RbPlus }; -const ADDR_SW_PATINFO SW_VAR_Z_X_8xaa_RBPLUS_PATINFO[] = +const ADDR_SW_PATINFO GFX10_SW_VAR_Z_X_8xaa_RBPLUS_PATINFO[] = { { 3, 23, 313, 256, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_VAR_Z_X 8xaa @ RbPlus { 3, 24, 272, 292, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_VAR_Z_X 8xaa @ RbPlus @@ -5467,7 +5384,7 @@ const UINT_64 GFX10_SW_PATTERN_NIBBLE4[][4] = {X3^Y8, S0^X7^Y7, S1^X6^Y7, 0, }, // 238 }; -const UINT_8 DCC_64K_R_X_PATIDX[] = +const UINT_8 GFX10_DCC_64K_R_X_PATIDX[] = { 0, // 1 pipes 1 bpe ua @ SW_64K_R_X 1xaa @ Navi1x 1, // 1 pipes 2 bpe ua @ SW_64K_R_X 1xaa @ Navi1x @@ -5521,7 +5438,7 @@ const UINT_8 DCC_64K_R_X_PATIDX[] = 37, // 64 pipes 16 bpe pa @ SW_64K_R_X 1xaa @ Navi1x }; -const UINT_8 HTILE_PATIDX[] = +const UINT_8 GFX10_HTILE_PATIDX[] = { 0, // 1xaa ua @ HTILE_64K @ Navi1x 0, // 2xaa ua @ HTILE_64K @ Navi1x @@ -5557,7 +5474,7 @@ const UINT_8 HTILE_PATIDX[] = 12, // 64 pipes 8xaa pa @ HTILE_64K @ Navi1x }; -const UINT_8 CMASK_64K_PATIDX[] = +const UINT_8 GFX10_CMASK_64K_PATIDX[] = { 0, // 1 bpe ua @ CMASK_64K @ Navi1x 0, // 2 bpe ua @ CMASK_64K @ Navi1x @@ -5593,7 +5510,7 @@ const UINT_8 CMASK_64K_PATIDX[] = 7, // 64 pipes 8 bpe pa @ CMASK_64K @ Navi1x }; -const UINT_8 DCC_64K_R_X_RBPLUS_PATIDX[] = +const UINT_8 GFX10_DCC_64K_R_X_RBPLUS_PATIDX[] = { 0, // 1 bpe ua @ SW_64K_R_X 1xaa @ RbPlus 1, // 2 bpe ua @ SW_64K_R_X 1xaa @ RbPlus @@ -5677,7 +5594,7 @@ const UINT_8 DCC_64K_R_X_RBPLUS_PATIDX[] = 107, // 64 pipes (32 PKRs) 16 bpe pa @ SW_64K_R_X 1xaa @ RbPlus }; -const UINT_8 HTILE_RBPLUS_PATIDX[] = +const UINT_8 GFX10_HTILE_RBPLUS_PATIDX[] = { 0, // 1xaa ua @ HTILE_64K @ RbPlus 0, // 2xaa ua @ HTILE_64K @ RbPlus @@ -5761,7 +5678,7 @@ const UINT_8 HTILE_RBPLUS_PATIDX[] = 29, // 64 pipes (32 PKRs) 8xaa pa @ HTILE_64K @ RbPlus }; -const UINT_8 CMASK_64K_RBPLUS_PATIDX[] = +const UINT_8 GFX10_CMASK_64K_RBPLUS_PATIDX[] = { 0, // 1 bpe ua @ CMASK_64K @ RbPlus 0, // 2 bpe ua @ CMASK_64K @ RbPlus @@ -5845,7 +5762,7 @@ const UINT_8 CMASK_64K_RBPLUS_PATIDX[] = 34, // 64 pipes (32 PKRs) 8 bpe pa @ CMASK_64K @ RbPlus }; -const UINT_8 CMASK_VAR_RBPLUS_PATIDX[] = +const UINT_8 GFX10_CMASK_VAR_RBPLUS_PATIDX[] = { 0, // 1 bpe ua @ CMASK_VAR @ RbPlus 0, // 2 bpe ua @ CMASK_VAR @ RbPlus @@ -5929,7 +5846,7 @@ const UINT_8 CMASK_VAR_RBPLUS_PATIDX[] = 31, // 64 pipes (32 PKRs) 8 bpe pa @ CMASK_VAR @ RbPlus }; -const UINT_64 DCC_64K_R_X_SW_PATTERN[][17] = +const UINT_64 GFX10_DCC_64K_R_X_SW_PATTERN[][17] = { {0, X4, Y4, X5, Y5, X6, Y6, X7, Y7, X8, Y8, X9, Y9, 0, 0, 0, 0, }, //0 {0, Y3, X4, Y4, X5, Y5, X6, Y6, X7, Y7, X8, Y8, X9, 0, 0, 0, 0, }, //1 @@ -6041,7 +5958,7 @@ const UINT_64 DCC_64K_R_X_SW_PATTERN[][17] = {0, X3, Y3, X7, Y7, X8, Y8, X2, Y2, Y4^X9^Y9, Z2^X4^Y4, Z1^Y5^X8, Z0^X5^Y8, Y2^Y6^X7, X2^X6^Y7, 0, 0, }, //107 }; -const UINT_64 HTILE_SW_PATTERN[][18] = +const UINT_64 GFX10_HTILE_SW_PATTERN[][18] = { {0, 0, 0, X3, Y3, X4, Y4, X5, Y5, X6, Y6, X7, Y7, 0, 0, 0, 0, 0, }, //0 {0, 0, 0, X3, Y4, X4, X5, Y5, X6, Z0^X3^Y3, Y6, X7, Y7, 0, 0, 0, 0, 0, }, //1 @@ -6075,7 +5992,7 @@ const UINT_64 HTILE_SW_PATTERN[][18] = {0, 0, 0, X3, Y3, X7, Y7, X8, Y8, Y4^X9^Y9, Z1^X4^Y4, Z0^Y5^X8, X5^Y8, Y6^X7, X6^Y7, X9, Y9, X10, }, //29 }; -const UINT_64 CMASK_SW_PATTERN[][17] = +const UINT_64 GFX10_CMASK_SW_PATTERN[][17] = { {X3, Y3, X4, Y4, X5, Y5, X6, Y6, X7, Y7, X8, Y8, X9, 0, 0, 0, 0, }, //0 {X3, Y4, X4, X5, Y5, X6, Y6, X7, Y7, Z0^X3^Y3, X8, Y8, X9, 0, 0, 0, 0, }, //1 @@ -6117,6 +6034,4 @@ const UINT_64 CMASK_SW_PATTERN[][17] = } // V2 } // Addr } // rocr - - #endif diff --git a/runtime/hsa-runtime/image/addrlib/src/gfx10/gfx10addrlib.cpp b/runtime/hsa-runtime/image/addrlib/src/gfx10/gfx10addrlib.cpp index 6cd6a3e602..7852b9369a 100644 --- a/runtime/hsa-runtime/image/addrlib/src/gfx10/gfx10addrlib.cpp +++ b/runtime/hsa-runtime/image/addrlib/src/gfx10/gfx10addrlib.cpp @@ -1,28 +1,27 @@ /* - * Copyright © 2007-2019 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ +************************************************************************************************************************ +* +* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +* OTHER DEALINGS IN THE SOFTWARE +* +***********************************************************************************************************************/ /** ************************************************************************************************************************ @@ -40,8 +39,7 @@ //////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// namespace rocr { -namespace Addr -{ +namespace Addr { /** ************************************************************************************************************************ * Gfx10HwlInit @@ -67,46 +65,46 @@ namespace V2 const SwizzleModeFlags Gfx10Lib::SwizzleModeTable[ADDR_SW_MAX_TYPE] = {//Linear 256B 4KB 64KB Var Z Std Disp Rot XOR T RtOpt Reserved - {1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // ADDR_SW_LINEAR - {0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0}, // ADDR_SW_256B_S - {0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0}, // ADDR_SW_256B_D - {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved + {{1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // ADDR_SW_LINEAR + {{0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0}}, // ADDR_SW_256B_S + {{0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0}}, // ADDR_SW_256B_D + {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved - {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved - {0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0}, // ADDR_SW_4KB_S - {0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0}, // ADDR_SW_4KB_D - {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved + {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved + {{0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0}}, // ADDR_SW_4KB_S + {{0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0}}, // ADDR_SW_4KB_D + {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved - {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved - {0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0}, // ADDR_SW_64KB_S - {0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0}, // ADDR_SW_64KB_D - {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved + {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved + {{0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0}}, // ADDR_SW_64KB_S + {{0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0}}, // ADDR_SW_64KB_D + {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved - {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved - {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved - {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved - {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved + {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved + {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved + {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved + {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved - {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved - {0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 1, 0, 0}, // ADDR_SW_64KB_S_T - {0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 0, 0}, // ADDR_SW_64KB_D_T - {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved + {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved + {{0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 1, 0, 0}}, // ADDR_SW_64KB_S_T + {{0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 0, 0}}, // ADDR_SW_64KB_D_T + {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved - {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved - {0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0}, // ADDR_SW_4KB_S_X - {0, 0, 1, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0}, // ADDR_SW_4KB_D_X - {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved + {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved + {{0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0}}, // ADDR_SW_4KB_S_X + {{0, 0, 1, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0}}, // ADDR_SW_4KB_D_X + {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved - {0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0}, // ADDR_SW_64KB_Z_X - {0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0}, // ADDR_SW_64KB_S_X - {0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 0, 0, 0}, // ADDR_SW_64KB_D_X - {0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0}, // ADDR_SW_64KB_R_X + {{0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0}}, // ADDR_SW_64KB_Z_X + {{0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0}}, // ADDR_SW_64KB_S_X + {{0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 0, 0, 0}}, // ADDR_SW_64KB_D_X + {{0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0}}, // ADDR_SW_64KB_R_X - {0, 0, 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0}, // ADDR_SW_VAR_Z_X - {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved - {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved - {0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 1, 0}, // ADDR_SW_VAR_R_X - {1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // ADDR_SW_LINEAR_GENERAL + {{0, 0, 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0}}, // ADDR_SW_VAR_Z_X + {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved + {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved + {{0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 1, 0}}, // ADDR_SW_VAR_R_X + {{1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // ADDR_SW_LINEAR_GENERAL }; const Dim3d Gfx10Lib::Block256_3d[] = {{8, 4, 8}, {4, 4, 8}, {4, 4, 4}, {4, 2, 4}, {2, 2, 4}}; @@ -126,11 +124,12 @@ const Dim3d Gfx10Lib::Block4K_Log2_3d[] = {{4, 4, 4}, {3, 4, 4}, {3, 4, 3}, {3, Gfx10Lib::Gfx10Lib(const Client* pClient) : Lib(pClient), + m_numPkrLog2(0), + m_numSaLog2(0), m_colorBaseIndex(0), m_xmaskBaseIndex(0), m_dccBaseIndex(0) { - m_class = AI_ADDRLIB; memset(&m_settings, 0, sizeof(m_settings)); memcpy(m_swizzleModeTable, SwizzleModeTable, sizeof(SwizzleModeTable)); } @@ -173,7 +172,7 @@ ADDR_E_RETURNCODE Gfx10Lib::HwlComputeHtileInfo( } else { - Dim3d metaBlk = {0}; + Dim3d metaBlk = {}; const UINT_32 metaBlkSize = GetMetaBlkSize(Gfx10DataDepthStencil, ADDR_RSRC_TEX_2D, pIn->swizzleMode, @@ -252,6 +251,14 @@ ADDR_E_RETURNCODE Gfx10Lib::HwlComputeHtileInfo( pOut->pMipInfo[0].sliceSize = pOut->sliceSize; } } + + // Get the HTILE address equation (copied from HtileAddrFromCoord). + // HTILE addressing depends on the number of samples, but this code doesn't support it yet. + const UINT_32 index = m_xmaskBaseIndex; + const UINT_8* patIdxTable = m_settings.supportRbPlus ? GFX10_HTILE_RBPLUS_PATIDX : GFX10_HTILE_PATIDX; + + ADDR_C_ASSERT(sizeof(GFX10_HTILE_SW_PATTERN[patIdxTable[index]]) == 72 * 2); + pOut->equation.gfx10_bits = (UINT_16 *)GFX10_HTILE_SW_PATTERN[patIdxTable[index]]; } return ret; @@ -284,7 +291,7 @@ ADDR_E_RETURNCODE Gfx10Lib::HwlComputeCmaskInfo( } else { - Dim3d metaBlk = {0}; + Dim3d metaBlk = {}; const UINT_32 metaBlkSize = GetMetaBlkSize(Gfx10DataFmask, ADDR_RSRC_TEX_2D, pIn->swizzleMode, @@ -361,6 +368,17 @@ ADDR_E_RETURNCODE Gfx10Lib::HwlComputeCmaskInfo( pOut->sliceSize = pOut->metaBlkNumPerSlice * metaBlkSize; pOut->cmaskBytes = pOut->sliceSize * pIn->numSlices; + + // Get the CMASK address equation (copied from CmaskAddrFromCoord) + const UINT_32 fmaskBpp = GetFmaskBpp(1, 1); + const UINT_32 fmaskElemLog2 = Log2(fmaskBpp >> 3); + const UINT_32 index = m_xmaskBaseIndex + fmaskElemLog2; + const UINT_8* patIdxTable = + (pIn->swizzleMode == ADDR_SW_VAR_Z_X) ? GFX10_CMASK_VAR_RBPLUS_PATIDX : + (m_settings.supportRbPlus ? GFX10_CMASK_64K_RBPLUS_PATIDX : GFX10_CMASK_64K_PATIDX); + + ADDR_C_ASSERT(sizeof(GFX10_CMASK_SW_PATTERN[patIdxTable[index]]) == 68 * 2); + pOut->equation.gfx10_bits = (UINT_16*)GFX10_CMASK_SW_PATTERN[patIdxTable[index]]; } return ret; @@ -384,9 +402,10 @@ ADDR_E_RETURNCODE Gfx10Lib::HwlComputeDccInfo( { ADDR_E_RETURNCODE ret = ADDR_OK; - if (pIn->swizzleMode != ADDR_SW_64KB_Z_X && pIn->swizzleMode != ADDR_SW_64KB_R_X) + if (IsLinear(pIn->swizzleMode) || IsBlock256b(pIn->swizzleMode)) { - // Hardware does not support DCC for this swizzle mode. + // Hardware support dcc for 256 swizzle mode, but address lib will not support it because we only + // select 256 swizzle mode for small surface, and it's not helpful to enable dcc for small surface. ret = ADDR_INVALIDPARAMS; } else if (m_settings.dccUnsup3DSwDis && IsTex3d(pIn->resourceType) && IsDisplaySwizzle(pIn->swizzleMode)) @@ -396,97 +415,152 @@ ADDR_E_RETURNCODE Gfx10Lib::HwlComputeDccInfo( } else { - // only SW_*_R_X surfaces may be DCC compressed when attached to the CB - ADDR_ASSERT(IsRtOptSwizzle(pIn->swizzleMode)); + const UINT_32 elemLog2 = Log2(pIn->bpp >> 3); - Dim3d metaBlk = {0}; - const UINT_32 elemLog2 = Log2(pIn->bpp >> 3); - const UINT_32 numFragLog2 = Log2(pIn->numFrags); - const UINT_32 metaBlkSize = GetMetaBlkSize(Gfx10DataColor, - pIn->resourceType, - pIn->swizzleMode, - elemLog2, - numFragLog2, - pIn->dccKeyFlags.pipeAligned, - &metaBlk); - const BOOL_32 isThick = IsThick(pIn->resourceType, pIn->swizzleMode); - - pOut->compressBlkWidth = isThick ? Block256_3d[elemLog2].w : Block256_2d[elemLog2].w; - pOut->compressBlkHeight = isThick ? Block256_3d[elemLog2].h : Block256_2d[elemLog2].h; - pOut->compressBlkDepth = isThick ? Block256_3d[elemLog2].d : 1; - - pOut->dccRamBaseAlign = metaBlkSize; - pOut->metaBlkWidth = metaBlk.w; - pOut->metaBlkHeight = metaBlk.h; - pOut->metaBlkDepth = metaBlk.d; - - pOut->pitch = PowTwoAlign(pIn->unalignedWidth, metaBlk.w); - pOut->height = PowTwoAlign(pIn->unalignedHeight, metaBlk.h); - pOut->depth = PowTwoAlign(pIn->numSlices, metaBlk.d); - - if (pIn->numMipLevels > 1) { - ADDR_ASSERT(pIn->firstMipIdInTail <= pIn->numMipLevels); + // only SW_*_R_X surfaces may be DCC compressed when attached to the CB + ADDR_ASSERT(IsRtOptSwizzle(pIn->swizzleMode)); - UINT_32 offset = (pIn->firstMipIdInTail == pIn->numMipLevels) ? 0 : metaBlkSize; + const BOOL_32 isThick = IsThick(pIn->resourceType, pIn->swizzleMode); - for (INT_32 i = static_cast(pIn->firstMipIdInTail) - 1; i >= 0; i--) + pOut->compressBlkWidth = isThick ? Block256_3d[elemLog2].w : Block256_2d[elemLog2].w; + pOut->compressBlkHeight = isThick ? Block256_3d[elemLog2].h : Block256_2d[elemLog2].h; + pOut->compressBlkDepth = isThick ? Block256_3d[elemLog2].d : 1; + } + + if (ret == ADDR_OK) + { + Dim3d metaBlk = {}; + const UINT_32 numFragLog2 = Log2(Max(pIn->numFrags, 1u)); + const UINT_32 metaBlkSize = GetMetaBlkSize(Gfx10DataColor, + pIn->resourceType, + pIn->swizzleMode, + elemLog2, + numFragLog2, + pIn->dccKeyFlags.pipeAligned, + &metaBlk); + + pOut->dccRamBaseAlign = metaBlkSize; + pOut->metaBlkWidth = metaBlk.w; + pOut->metaBlkHeight = metaBlk.h; + pOut->metaBlkDepth = metaBlk.d; + pOut->metaBlkSize = metaBlkSize; + + pOut->pitch = PowTwoAlign(pIn->unalignedWidth, metaBlk.w); + pOut->height = PowTwoAlign(pIn->unalignedHeight, metaBlk.h); + pOut->depth = PowTwoAlign(Max(pIn->numSlices, 1u), metaBlk.d); + + if (pIn->numMipLevels > 1) { - UINT_32 mipWidth, mipHeight; + ADDR_ASSERT(pIn->firstMipIdInTail <= pIn->numMipLevels); - GetMipSize(pIn->unalignedWidth, pIn->unalignedHeight, 1, i, &mipWidth, &mipHeight); + UINT_32 offset = (pIn->firstMipIdInTail == pIn->numMipLevels) ? 0 : metaBlkSize; - mipWidth = PowTwoAlign(mipWidth, metaBlk.w); - mipHeight = PowTwoAlign(mipHeight, metaBlk.h); + for (INT_32 i = static_cast(pIn->firstMipIdInTail) - 1; i >= 0; i--) + { + UINT_32 mipWidth, mipHeight; - const UINT_32 pitchInM = mipWidth / metaBlk.w; - const UINT_32 heightInM = mipHeight / metaBlk.h; - const UINT_32 mipSliceSize = pitchInM * heightInM * metaBlkSize; + GetMipSize(pIn->unalignedWidth, pIn->unalignedHeight, 1, i, &mipWidth, &mipHeight); + + mipWidth = PowTwoAlign(mipWidth, metaBlk.w); + mipHeight = PowTwoAlign(mipHeight, metaBlk.h); + + const UINT_32 pitchInM = mipWidth / metaBlk.w; + const UINT_32 heightInM = mipHeight / metaBlk.h; + const UINT_32 mipSliceSize = pitchInM * heightInM * metaBlkSize; + + if (pOut->pMipInfo != NULL) + { + pOut->pMipInfo[i].inMiptail = FALSE; + pOut->pMipInfo[i].offset = offset; + pOut->pMipInfo[i].sliceSize = mipSliceSize; + } + + offset += mipSliceSize; + } + + pOut->dccRamSliceSize = offset; + pOut->metaBlkNumPerSlice = offset / metaBlkSize; + pOut->dccRamSize = pOut->dccRamSliceSize * (pOut->depth / metaBlk.d); if (pOut->pMipInfo != NULL) { - pOut->pMipInfo[i].inMiptail = FALSE; - pOut->pMipInfo[i].offset = offset; - pOut->pMipInfo[i].sliceSize = mipSliceSize; + for (UINT_32 i = pIn->firstMipIdInTail; i < pIn->numMipLevels; i++) + { + pOut->pMipInfo[i].inMiptail = TRUE; + pOut->pMipInfo[i].offset = 0; + pOut->pMipInfo[i].sliceSize = 0; + } + + if (pIn->firstMipIdInTail != pIn->numMipLevels) + { + pOut->pMipInfo[pIn->firstMipIdInTail].sliceSize = metaBlkSize; + } } - - offset += mipSliceSize; } - - pOut->dccRamSliceSize = offset; - pOut->metaBlkNumPerSlice = offset / metaBlkSize; - pOut->dccRamSize = pOut->dccRamSliceSize * (pOut->depth / metaBlk.d); - - if (pOut->pMipInfo != NULL) + else { - for (UINT_32 i = pIn->firstMipIdInTail; i < pIn->numMipLevels; i++) - { - pOut->pMipInfo[i].inMiptail = TRUE; - pOut->pMipInfo[i].offset = 0; - pOut->pMipInfo[i].sliceSize = 0; - } + const UINT_32 pitchInM = pOut->pitch / metaBlk.w; + const UINT_32 heightInM = pOut->height / metaBlk.h; - if (pIn->firstMipIdInTail != pIn->numMipLevels) + pOut->metaBlkNumPerSlice = pitchInM * heightInM; + pOut->dccRamSliceSize = pOut->metaBlkNumPerSlice * metaBlkSize; + pOut->dccRamSize = pOut->dccRamSliceSize * (pOut->depth / metaBlk.d); + + if (pOut->pMipInfo != NULL) { - pOut->pMipInfo[pIn->firstMipIdInTail].sliceSize = metaBlkSize; + pOut->pMipInfo[0].inMiptail = FALSE; + pOut->pMipInfo[0].offset = 0; + pOut->pMipInfo[0].sliceSize = pOut->dccRamSliceSize; } } - } - else - { - const UINT_32 pitchInM = pOut->pitch / metaBlk.w; - const UINT_32 heightInM = pOut->height / metaBlk.h; - pOut->metaBlkNumPerSlice = pitchInM * heightInM; - pOut->dccRamSliceSize = pOut->metaBlkNumPerSlice * metaBlkSize; - pOut->dccRamSize = pOut->dccRamSliceSize * (pOut->depth / metaBlk.d); + // Get the DCC address equation (copied from DccAddrFromCoord) + const UINT_32 elemLog2 = Log2(pIn->bpp >> 3); + const UINT_32 numPipeLog2 = m_pipesLog2; + UINT_32 index = m_dccBaseIndex + elemLog2; + const UINT_8* patIdxTable; - if (pOut->pMipInfo != NULL) + if (m_settings.supportRbPlus) { - pOut->pMipInfo[0].inMiptail = FALSE; - pOut->pMipInfo[0].offset = 0; - pOut->pMipInfo[0].sliceSize = pOut->dccRamSliceSize; + patIdxTable = GFX10_DCC_64K_R_X_RBPLUS_PATIDX; + + if (pIn->dccKeyFlags.pipeAligned) + { + index += MaxNumOfBpp; + + if (m_numPkrLog2 < 2) + { + index += m_pipesLog2 * MaxNumOfBpp; + } + else + { + // 4 groups for "m_numPkrLog2 < 2" case + index += 4 * MaxNumOfBpp; + + const UINT_32 dccPipePerPkr = 3; + + index += (m_numPkrLog2 - 2) * dccPipePerPkr * MaxNumOfBpp + + (m_pipesLog2 - m_numPkrLog2) * MaxNumOfBpp; + } + } } + else + { + patIdxTable = GFX10_DCC_64K_R_X_PATIDX; + + if (pIn->dccKeyFlags.pipeAligned) + { + index += (numPipeLog2 + UnalignedDccType) * MaxNumOfBpp; + } + else + { + index += Min(numPipeLog2, UnalignedDccType - 1) * MaxNumOfBpp; + } + } + + ADDR_C_ASSERT(sizeof(GFX10_DCC_64K_R_X_SW_PATTERN[patIdxTable[index]]) == 68 * 2); + pOut->equation.gfx10_bits = (UINT_16*)GFX10_DCC_64K_R_X_SW_PATTERN[patIdxTable[index]]; } } @@ -532,12 +606,13 @@ ADDR_E_RETURNCODE Gfx10Lib::HwlComputeCmaskAddrFromCoord( const UINT_32 fmaskElemLog2 = Log2(fmaskBpp >> 3); const UINT_32 pipeMask = (1 << m_pipesLog2) - 1; const UINT_32 index = m_xmaskBaseIndex + fmaskElemLog2; - const UINT_8* patIdxTable = (pIn->swizzleMode == ADDR_SW_VAR_Z_X) ? CMASK_VAR_RBPLUS_PATIDX : - (m_settings.supportRbPlus ? CMASK_64K_RBPLUS_PATIDX : CMASK_64K_PATIDX); + const UINT_8* patIdxTable = + (pIn->swizzleMode == ADDR_SW_VAR_Z_X) ? GFX10_CMASK_VAR_RBPLUS_PATIDX : + (m_settings.supportRbPlus ? GFX10_CMASK_64K_RBPLUS_PATIDX : GFX10_CMASK_64K_PATIDX); const UINT_32 blkSizeLog2 = Log2(output.metaBlkWidth) + Log2(output.metaBlkHeight) - 7; const UINT_32 blkMask = (1 << blkSizeLog2) - 1; - const UINT_32 blkOffset = ComputeOffsetFromSwizzlePattern(CMASK_SW_PATTERN[patIdxTable[index]], + const UINT_32 blkOffset = ComputeOffsetFromSwizzlePattern(GFX10_CMASK_SW_PATTERN[patIdxTable[index]], blkSizeLog2 + 1, // +1 for nibble offset pIn->x, pIn->y, @@ -581,7 +656,7 @@ ADDR_E_RETURNCODE Gfx10Lib::HwlComputeHtileAddrFromCoord( } else { - ADDR2_COMPUTE_HTILE_INFO_INPUT input = {0}; + ADDR2_COMPUTE_HTILE_INFO_INPUT input = {}; input.size = sizeof(input); input.hTileFlags = pIn->hTileFlags; input.depthFlags = pIn->depthflags; @@ -591,7 +666,7 @@ ADDR_E_RETURNCODE Gfx10Lib::HwlComputeHtileAddrFromCoord( input.numSlices = Max(pIn->numSlices, 1u); input.numMipLevels = 1; - ADDR2_COMPUTE_HTILE_INFO_OUTPUT output = {0}; + ADDR2_COMPUTE_HTILE_INFO_OUTPUT output = {}; output.size = sizeof(output); returnCode = ComputeHtileInfo(&input, &output); @@ -601,11 +676,11 @@ ADDR_E_RETURNCODE Gfx10Lib::HwlComputeHtileAddrFromCoord( const UINT_32 numSampleLog2 = Log2(pIn->numSamples); const UINT_32 pipeMask = (1 << m_pipesLog2) - 1; const UINT_32 index = m_xmaskBaseIndex + numSampleLog2; - const UINT_8* patIdxTable = m_settings.supportRbPlus ? HTILE_RBPLUS_PATIDX : HTILE_PATIDX; + const UINT_8* patIdxTable = m_settings.supportRbPlus ? GFX10_HTILE_RBPLUS_PATIDX : GFX10_HTILE_PATIDX; const UINT_32 blkSizeLog2 = Log2(output.metaBlkWidth) + Log2(output.metaBlkHeight) - 4; const UINT_32 blkMask = (1 << blkSizeLog2) - 1; - const UINT_32 blkOffset = ComputeOffsetFromSwizzlePattern(HTILE_SW_PATTERN[patIdxTable[index]], + const UINT_32 blkOffset = ComputeOffsetFromSwizzlePattern(GFX10_HTILE_SW_PATTERN[patIdxTable[index]], blkSizeLog2 + 1, // +1 for nibble offset pIn->x, pIn->y, @@ -648,18 +723,17 @@ ADDR_E_RETURNCODE Gfx10Lib::HwlComputeHtileCoordFromAddr( /** ************************************************************************************************************************ -* Gfx10Lib::HwlComputeDccAddrFromCoord +* Gfx10Lib::HwlSupportComputeDccAddrFromCoord * * @brief -* Interface function stub of AddrComputeDccAddrFromCoord +* Check whether HwlComputeDccAddrFromCoord() can be done for the input parameter * * @return * ADDR_E_RETURNCODE ************************************************************************************************************************ */ -ADDR_E_RETURNCODE Gfx10Lib::HwlComputeDccAddrFromCoord( - const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure - ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT* pOut) ///< [out] output structure +ADDR_E_RETURNCODE Gfx10Lib::HwlSupportComputeDccAddrFromCoord( + const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn) { ADDR_E_RETURNCODE returnCode = ADDR_OK; @@ -672,74 +746,96 @@ ADDR_E_RETURNCODE Gfx10Lib::HwlComputeDccAddrFromCoord( { returnCode = ADDR_NOTSUPPORTED; } - else + else if ((pIn->pitch == 0) || + (pIn->metaBlkWidth == 0) || + (pIn->metaBlkHeight == 0) || + (pIn->slice > 0 && pIn->dccRamSliceSize == 0)) { - const UINT_32 elemLog2 = Log2(pIn->bpp >> 3); - const UINT_32 numPipeLog2 = m_pipesLog2; - const UINT_32 pipeMask = (1 << numPipeLog2) - 1; - UINT_32 index = m_dccBaseIndex + elemLog2; - const UINT_8* patIdxTable; - - if (m_settings.supportRbPlus) - { - patIdxTable = DCC_64K_R_X_RBPLUS_PATIDX; - - if (pIn->dccKeyFlags.pipeAligned) - { - index += MaxNumOfBpp; - - if (m_numPkrLog2 < 2) - { - index += m_pipesLog2 * MaxNumOfBpp; - } - else - { - // 4 groups for "m_numPkrLog2 < 2" case - index += 4 * MaxNumOfBpp; - - const UINT_32 dccPipePerPkr = 3; - - index += (m_numPkrLog2 - 2) * dccPipePerPkr * MaxNumOfBpp + - (m_pipesLog2 - m_numPkrLog2) * MaxNumOfBpp; - } - } - } - else - { - patIdxTable = DCC_64K_R_X_PATIDX; - - if (pIn->dccKeyFlags.pipeAligned) - { - index += (numPipeLog2 + UnalignedDccType) * MaxNumOfBpp; - } - else - { - index += Min(numPipeLog2, UnalignedDccType - 1) * MaxNumOfBpp; - } - } - - const UINT_32 blkSizeLog2 = Log2(pIn->metaBlkWidth) + Log2(pIn->metaBlkHeight) + elemLog2 - 8; - const UINT_32 blkMask = (1 << blkSizeLog2) - 1; - const UINT_32 blkOffset = ComputeOffsetFromSwizzlePattern(DCC_64K_R_X_SW_PATTERN[patIdxTable[index]], - blkSizeLog2 + 1, // +1 for nibble offset - pIn->x, - pIn->y, - pIn->slice, - 0); - const UINT_32 xb = pIn->x / pIn->metaBlkWidth; - const UINT_32 yb = pIn->y / pIn->metaBlkHeight; - const UINT_32 pb = pIn->pitch / pIn->metaBlkWidth; - const UINT_32 blkIndex = (yb * pb) + xb; - const UINT_32 pipeXor = ((pIn->pipeXor & pipeMask) << m_pipeInterleaveLog2) & blkMask; - - pOut->addr = (static_cast(pIn->dccRamSliceSize) * pIn->slice) + - (blkIndex * (1 << blkSizeLog2)) + - ((blkOffset >> 1) ^ pipeXor); + returnCode = ADDR_NOTSUPPORTED; } return returnCode; } +/** +************************************************************************************************************************ +* Gfx10Lib::HwlComputeDccAddrFromCoord +* +* @brief +* Interface function stub of AddrComputeDccAddrFromCoord +* +* @return +* N/A +************************************************************************************************************************ +*/ +VOID Gfx10Lib::HwlComputeDccAddrFromCoord( + const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT* pOut) ///< [out] output structure +{ + const UINT_32 elemLog2 = Log2(pIn->bpp >> 3); + const UINT_32 numPipeLog2 = m_pipesLog2; + const UINT_32 pipeMask = (1 << numPipeLog2) - 1; + UINT_32 index = m_dccBaseIndex + elemLog2; + const UINT_8* patIdxTable; + + if (m_settings.supportRbPlus) + { + patIdxTable = GFX10_DCC_64K_R_X_RBPLUS_PATIDX; + + if (pIn->dccKeyFlags.pipeAligned) + { + index += MaxNumOfBpp; + + if (m_numPkrLog2 < 2) + { + index += m_pipesLog2 * MaxNumOfBpp; + } + else + { + // 4 groups for "m_numPkrLog2 < 2" case + index += 4 * MaxNumOfBpp; + + const UINT_32 dccPipePerPkr = 3; + + index += (m_numPkrLog2 - 2) * dccPipePerPkr * MaxNumOfBpp + + (m_pipesLog2 - m_numPkrLog2) * MaxNumOfBpp; + } + } + } + else + { + patIdxTable = GFX10_DCC_64K_R_X_PATIDX; + + if (pIn->dccKeyFlags.pipeAligned) + { + index += (numPipeLog2 + UnalignedDccType) * MaxNumOfBpp; + } + else + { + index += Min(numPipeLog2, UnalignedDccType - 1) * MaxNumOfBpp; + } + } + + const UINT_32 blkSizeLog2 = Log2(pIn->metaBlkWidth) + Log2(pIn->metaBlkHeight) + elemLog2 - 8; + const UINT_32 blkMask = (1 << blkSizeLog2) - 1; + const UINT_32 blkOffset = + ComputeOffsetFromSwizzlePattern(GFX10_DCC_64K_R_X_SW_PATTERN[patIdxTable[index]], + blkSizeLog2 + 1, // +1 for nibble offset + pIn->x, + pIn->y, + pIn->slice, + 0); + const UINT_32 xb = pIn->x / pIn->metaBlkWidth; + const UINT_32 yb = pIn->y / pIn->metaBlkHeight; + const UINT_32 pb = pIn->pitch / pIn->metaBlkWidth; + const UINT_32 blkIndex = (yb * pb) + xb; + const UINT_32 pipeXor = ((pIn->pipeXor & pipeMask) << m_pipeInterleaveLog2) & blkMask; + + pOut->addr = (static_cast(pIn->dccRamSliceSize) * pIn->slice) + + (blkIndex * (1 << blkSizeLog2)) + + ((blkOffset >> 1) ^ pipeXor); +} + /** ************************************************************************************************************************ * Gfx10Lib::HwlInitGlobalParams @@ -755,8 +851,8 @@ ADDR_E_RETURNCODE Gfx10Lib::HwlComputeDccAddrFromCoord( BOOL_32 Gfx10Lib::HwlInitGlobalParams( const ADDR_CREATE_INPUT* pCreateIn) ///< [in] create input { - BOOL_32 valid = TRUE; - GB_ADDR_CONFIG gbAddrConfig; + BOOL_32 valid = TRUE; + GB_ADDR_CONFIG_GFX10 gbAddrConfig; gbAddrConfig.u32All = pCreateIn->regValue.gbAddrConfig; @@ -864,8 +960,8 @@ BOOL_32 Gfx10Lib::HwlInitGlobalParams( ADDR_ASSERT((m_numPkrLog2 <= m_pipesLog2) && ((m_pipesLog2 - m_numPkrLog2) <= 2)); - ADDR_C_ASSERT(sizeof(HTILE_RBPLUS_PATIDX) / sizeof(HTILE_RBPLUS_PATIDX[0]) == - sizeof(CMASK_64K_RBPLUS_PATIDX) / sizeof(CMASK_64K_RBPLUS_PATIDX[0])); + ADDR_C_ASSERT(sizeof(GFX10_HTILE_RBPLUS_PATIDX) / sizeof(GFX10_HTILE_RBPLUS_PATIDX[0]) == + sizeof(GFX10_CMASK_64K_RBPLUS_PATIDX) / sizeof(GFX10_CMASK_64K_RBPLUS_PATIDX[0])); if (m_numPkrLog2 >= 2) { @@ -879,10 +975,10 @@ BOOL_32 Gfx10Lib::HwlInitGlobalParams( static_cast(ADDR_CONFIG_1_PIPE) + 1; - ADDR_C_ASSERT(sizeof(HTILE_PATIDX) / sizeof(HTILE_PATIDX[0]) == (numPipeType + 1) * MaxNumOfAA); + ADDR_C_ASSERT(sizeof(GFX10_HTILE_PATIDX) / sizeof(GFX10_HTILE_PATIDX[0]) == (numPipeType + 1) * MaxNumOfAA); - ADDR_C_ASSERT(sizeof(HTILE_PATIDX) / sizeof(HTILE_PATIDX[0]) == - sizeof(CMASK_64K_PATIDX) / sizeof(CMASK_64K_PATIDX[0])); + ADDR_C_ASSERT(sizeof(GFX10_HTILE_PATIDX) / sizeof(GFX10_HTILE_PATIDX[0]) == + sizeof(GFX10_CMASK_64K_PATIDX) / sizeof(GFX10_CMASK_64K_PATIDX[0])); } } @@ -917,31 +1013,99 @@ ChipFamily Gfx10Lib::HwlConvertChipFamily( { ChipFamily family = ADDR_CHIP_FAMILY_NAVI; - m_settings.dccUnsup3DSwDis = 1; + m_settings.dccUnsup3DSwDis = 1; + m_settings.dsMipmapHtileFix = 1; switch (chipFamily) { case FAMILY_NV: - m_settings.isDcn2 = 1; + if (ASICREV_IS_NAVI10_P(chipRevision)) + { + m_settings.dsMipmapHtileFix = 0; + m_settings.isDcn20 = 1; + } - if (ASICREV_IS_SIENNA_M(chipRevision)) + if (ASICREV_IS_NAVI12_P(chipRevision)) + { + m_settings.isDcn20 = 1; + } + + if (ASICREV_IS_NAVI14_M(chipRevision)) + { + m_settings.isDcn20 = 1; + } + + if (ASICREV_IS_NAVI21_M(chipRevision)) + { + m_settings.supportRbPlus = 1; + m_settings.dccUnsup3DSwDis = 0; + } + + if (ASICREV_IS_NAVI22_P(chipRevision)) + { + m_settings.supportRbPlus = 1; + m_settings.dccUnsup3DSwDis = 0; + } + + if (ASICREV_IS_NAVI23_P(chipRevision)) + { + m_settings.supportRbPlus = 1; + m_settings.dccUnsup3DSwDis = 0; + } + + if (ASICREV_IS_NAVI24_P(chipRevision)) { m_settings.supportRbPlus = 1; m_settings.dccUnsup3DSwDis = 0; } break; + + case FAMILY_VGH: + if (ASICREV_IS_VANGOGH(chipRevision)) + { + m_settings.supportRbPlus = 1; + m_settings.dccUnsup3DSwDis = 0; + } + else + { + ADDR_ASSERT(!"Unknown chip revision"); + } + break; + + case FAMILY_RMB: + if (ASICREV_IS_REMBRANDT(chipRevision)) + { + m_settings.supportRbPlus = 1; + m_settings.dccUnsup3DSwDis = 0; + } + else + { + ADDR_ASSERT(!"Unknown chip revision"); + } + break; + case FAMILY_GC_10_3_6: + if (ASICREV_IS_GFX1036(chipRevision)) + { + m_settings.supportRbPlus = 1; + m_settings.dccUnsup3DSwDis = 0; + } + break; + case FAMILY_GC_10_3_7: + if (ASICREV_IS_GFX1037(chipRevision)) + { + m_settings.supportRbPlus = 1; + m_settings.dccUnsup3DSwDis = 0; + } + else + { + ADDR_ASSERT(!"Unknown chip revision"); + } + break; default: ADDR_ASSERT(!"Unknown chip family"); break; } - m_settings.dsMipmapHtileFix = 1; - - if (ASICREV_IS_NAVI10_P(chipRevision)) - { - m_settings.dsMipmapHtileFix = 0; - } - m_configFlags.use32bppFor422Fmt = TRUE; return family; @@ -1152,123 +1316,126 @@ UINT_32 Gfx10Lib::GetMetaBlkSize( Dim3d* pBlock ///< [out] block size ) const { - INT_32 metablkSizeLog2; - const INT_32 metaElemSizeLog2 = GetMetaElementSizeLog2(dataType); - const INT_32 metaCacheSizeLog2 = GetMetaCacheSizeLog2(dataType); - const INT_32 compBlkSizeLog2 = (dataType == Gfx10DataColor) ? 8 : 6 + numSamplesLog2 + elemLog2; - const INT_32 metaBlkSamplesLog2 = (dataType == Gfx10DataDepthStencil) ? - numSamplesLog2 : Min(numSamplesLog2, m_maxCompFragLog2); - const INT_32 dataBlkSizeLog2 = GetBlockSizeLog2(swizzleMode); - INT_32 numPipesLog2 = m_pipesLog2; + INT_32 metablkSizeLog2; - if (IsThin(resourceType, swizzleMode)) { - if ((pipeAlign == FALSE) || - (IsStandardSwizzle(resourceType, swizzleMode) == TRUE) || - (IsDisplaySwizzle(resourceType, swizzleMode) == TRUE)) + const INT_32 metaElemSizeLog2 = GetMetaElementSizeLog2(dataType); + const INT_32 metaCacheSizeLog2 = GetMetaCacheSizeLog2(dataType); + const INT_32 compBlkSizeLog2 = (dataType == Gfx10DataColor) ? 8 : 6 + numSamplesLog2 + elemLog2; + const INT_32 metaBlkSamplesLog2 = (dataType == Gfx10DataDepthStencil) ? + numSamplesLog2 : Min(numSamplesLog2, m_maxCompFragLog2); + const INT_32 dataBlkSizeLog2 = GetBlockSizeLog2(swizzleMode); + INT_32 numPipesLog2 = m_pipesLog2; + + if (IsThin(resourceType, swizzleMode)) { - if (pipeAlign) + if ((pipeAlign == FALSE) || + (IsStandardSwizzle(resourceType, swizzleMode) == TRUE) || + (IsDisplaySwizzle(resourceType, swizzleMode) == TRUE)) { - metablkSizeLog2 = Max(static_cast(m_pipeInterleaveLog2) + numPipesLog2, 12); - metablkSizeLog2 = Min(metablkSizeLog2, dataBlkSizeLog2); + if (pipeAlign) + { + metablkSizeLog2 = Max(static_cast(m_pipeInterleaveLog2) + numPipesLog2, 12); + metablkSizeLog2 = Min(metablkSizeLog2, dataBlkSizeLog2); + } + else + { + metablkSizeLog2 = Min(dataBlkSizeLog2, 12); + } } else { - metablkSizeLog2 = Min(dataBlkSizeLog2, 12); + if (m_settings.supportRbPlus && (m_pipesLog2 == m_numSaLog2 + 1) && (m_pipesLog2 > 1)) + { + numPipesLog2++; + } + + INT_32 pipeRotateLog2 = GetPipeRotateAmount(resourceType, swizzleMode); + + if (numPipesLog2 >= 4) + { + INT_32 overlapLog2 = GetMetaOverlapLog2(dataType, resourceType, swizzleMode, elemLog2, numSamplesLog2); + + // In 16Bpe 8xaa, we have an extra overlap bit + if ((pipeRotateLog2 > 0) && + (elemLog2 == 4) && + (numSamplesLog2 == 3) && + (IsZOrderSwizzle(swizzleMode) || (GetEffectiveNumPipes() > 3))) + { + overlapLog2++; + } + + metablkSizeLog2 = metaCacheSizeLog2 + overlapLog2 + numPipesLog2; + metablkSizeLog2 = Max(metablkSizeLog2, static_cast(m_pipeInterleaveLog2) + numPipesLog2); + + if (m_settings.supportRbPlus && + IsRtOptSwizzle(swizzleMode) && + (numPipesLog2 == 6) && + (numSamplesLog2 == 3) && + (m_maxCompFragLog2 == 3) && + (metablkSizeLog2 < 15)) + { + metablkSizeLog2 = 15; + } + } + else + { + metablkSizeLog2 = Max(static_cast(m_pipeInterleaveLog2) + numPipesLog2, 12); + } + + if (dataType == Gfx10DataDepthStencil) + { + // For htile surfaces, pad meta block size to 2K * num_pipes + metablkSizeLog2 = Max(metablkSizeLog2, 11 + numPipesLog2); + } + + const INT_32 compFragLog2 = Min(m_maxCompFragLog2, numSamplesLog2); + + if (IsRtOptSwizzle(swizzleMode) && (compFragLog2 > 1) && (pipeRotateLog2 >= 1)) + { + const INT_32 tmp = 8 + m_pipesLog2 + Max(pipeRotateLog2, compFragLog2 - 1); + + metablkSizeLog2 = Max(metablkSizeLog2, tmp); + } } + + const INT_32 metablkBitsLog2 = + metablkSizeLog2 + compBlkSizeLog2 - elemLog2 - metaBlkSamplesLog2 - metaElemSizeLog2; + pBlock->w = 1 << ((metablkBitsLog2 >> 1) + (metablkBitsLog2 & 1)); + pBlock->h = 1 << (metablkBitsLog2 >> 1); + pBlock->d = 1; } else { - if (m_settings.supportRbPlus && (m_pipesLog2 == m_numSaLog2 + 1) && (m_pipesLog2 > 1)) + ADDR_ASSERT(IsThick(resourceType, swizzleMode)); + + if (pipeAlign) { - numPipesLog2++; - } - - INT_32 pipeRotateLog2 = GetPipeRotateAmount(resourceType, swizzleMode); - - if (numPipesLog2 >= 4) - { - INT_32 overlapLog2 = GetMetaOverlapLog2(dataType, resourceType, swizzleMode, elemLog2, numSamplesLog2); - - // In 16Bpe 8xaa, we have an extra overlap bit - if ((pipeRotateLog2 > 0) && - (elemLog2 == 4) && - (numSamplesLog2 == 3) && - (IsZOrderSwizzle(swizzleMode) || (GetEffectiveNumPipes() > 3))) + if (m_settings.supportRbPlus && + (m_pipesLog2 == m_numSaLog2 + 1) && + (m_pipesLog2 > 1) && + IsRbAligned(resourceType, swizzleMode)) { - overlapLog2++; + numPipesLog2++; } + const INT_32 overlapLog2 = Get3DMetaOverlapLog2(resourceType, swizzleMode, elemLog2); + metablkSizeLog2 = metaCacheSizeLog2 + overlapLog2 + numPipesLog2; metablkSizeLog2 = Max(metablkSizeLog2, static_cast(m_pipeInterleaveLog2) + numPipesLog2); - - if (m_settings.supportRbPlus && - IsRtOptSwizzle(swizzleMode) && - (numPipesLog2 == 6) && - (numSamplesLog2 == 3) && - (m_maxCompFragLog2 == 3) && - (metablkSizeLog2 < 15)) - { - metablkSizeLog2 = 15; - } + metablkSizeLog2 = Max(metablkSizeLog2, 12); } else { - metablkSizeLog2 = Max(static_cast(m_pipeInterleaveLog2) + numPipesLog2, 12); + metablkSizeLog2 = 12; } - if (dataType == Gfx10DataDepthStencil) - { - // For htile surfaces, pad meta block size to 2K * num_pipes - metablkSizeLog2 = Max(metablkSizeLog2, 11 + numPipesLog2); - } - - const INT_32 compFragLog2 = Min(m_maxCompFragLog2, numSamplesLog2); - - if (IsRtOptSwizzle(swizzleMode) && (compFragLog2 > 1) && (pipeRotateLog2 >= 1)) - { - const INT_32 tmp = 8 + m_pipesLog2 + Max(pipeRotateLog2, compFragLog2 - 1); - - metablkSizeLog2 = Max(metablkSizeLog2, tmp); - } + const INT_32 metablkBitsLog2 = + metablkSizeLog2 + compBlkSizeLog2 - elemLog2 - metaBlkSamplesLog2 - metaElemSizeLog2; + pBlock->w = 1 << ((metablkBitsLog2 / 3) + (((metablkBitsLog2 % 3) > 0) ? 1 : 0)); + pBlock->h = 1 << ((metablkBitsLog2 / 3) + (((metablkBitsLog2 % 3) > 1) ? 1 : 0)); + pBlock->d = 1 << (metablkBitsLog2 / 3); } - - const INT_32 metablkBitsLog2 = - metablkSizeLog2 + compBlkSizeLog2 - elemLog2 - metaBlkSamplesLog2 - metaElemSizeLog2; - pBlock->w = 1 << ((metablkBitsLog2 >> 1) + (metablkBitsLog2 & 1)); - pBlock->h = 1 << (metablkBitsLog2 >> 1); - pBlock->d = 1; - } - else - { - ADDR_ASSERT(IsThick(resourceType, swizzleMode)); - - if (pipeAlign) - { - if (m_settings.supportRbPlus && - (m_pipesLog2 == m_numSaLog2 + 1) && - (m_pipesLog2 > 1) && - IsRbAligned(resourceType, swizzleMode)) - { - numPipesLog2++; - } - - const INT_32 overlapLog2 = Get3DMetaOverlapLog2(resourceType, swizzleMode, elemLog2); - - metablkSizeLog2 = metaCacheSizeLog2 + overlapLog2 + numPipesLog2; - metablkSizeLog2 = Max(metablkSizeLog2, static_cast(m_pipeInterleaveLog2) + numPipesLog2); - metablkSizeLog2 = Max(metablkSizeLog2, 12); - } - else - { - metablkSizeLog2 = 12; - } - - const INT_32 metablkBitsLog2 = - metablkSizeLog2 + compBlkSizeLog2 - elemLog2 - metaBlkSamplesLog2 - metaElemSizeLog2; - pBlock->w = 1 << ((metablkBitsLog2 / 3) + (((metablkBitsLog2 % 3) > 0) ? 1 : 0)); - pBlock->h = 1 << ((metablkBitsLog2 / 3) + (((metablkBitsLog2 % 3) > 1) ? 1 : 0)); - pBlock->d = 1 << (metablkBitsLog2 / 3); } return (1 << static_cast(metablkSizeLog2)); @@ -1355,7 +1522,7 @@ VOID Gfx10Lib::ConvertSwizzlePatternToEquation( const UINT_32 blkXMask = dim.w - 1; const UINT_32 blkYMask = dim.h - 1; - ADDR_BIT_SETTING swizzle[ADDR_MAX_EQUATION_BIT]; + ADDR_BIT_SETTING swizzle[ADDR_MAX_EQUATION_BIT] = {}; UINT_32 xMask = 0; UINT_32 yMask = 0; UINT_32 bMask = (1 << elemLog2) - 1; @@ -1558,7 +1725,7 @@ VOID Gfx10Lib::ConvertSwizzlePatternToEquation( const UINT_32 blkYMask = (1 << blkYLog2) - 1; const UINT_32 blkZMask = (1 << blkZLog2) - 1; - ADDR_BIT_SETTING swizzle[ADDR_MAX_EQUATION_BIT]; + ADDR_BIT_SETTING swizzle[ADDR_MAX_EQUATION_BIT] = {}; UINT_32 xMask = 0; UINT_32 yMask = 0; UINT_32 zMask = 0; @@ -1912,6 +2079,38 @@ UINT_32 Gfx10Lib::HwlGetEquationIndex( return equationIdx; } +/** +************************************************************************************************************************ +* Gfx10Lib::GetValidDisplaySwizzleModes +* +* @brief +* Get valid swizzle modes mask for displayable surface +* +* @return +* Valid swizzle modes mask for displayable surface +************************************************************************************************************************ +*/ +UINT_32 Gfx10Lib::GetValidDisplaySwizzleModes( + UINT_32 bpp + ) const +{ + UINT_32 swModeMask = 0; + + if (bpp <= 64) + { + if (m_settings.isDcn20) + { + swModeMask = (bpp == 64) ? Dcn20Bpp64SwModeMask : Dcn20NonBpp64SwModeMask; + } + else + { + swModeMask = (bpp == 64) ? Dcn21Bpp64SwModeMask : Dcn21NonBpp64SwModeMask; + } + } + + return swModeMask; +} + /** ************************************************************************************************************************ * Gfx10Lib::IsValidDisplaySwizzleMode @@ -1929,40 +2128,7 @@ BOOL_32 Gfx10Lib::IsValidDisplaySwizzleMode( { ADDR_ASSERT(pIn->resourceType == ADDR_RSRC_TEX_2D); - BOOL_32 support = FALSE; - - if (m_settings.isDcn2) - { - switch (pIn->swizzleMode) - { - case ADDR_SW_4KB_D: - case ADDR_SW_4KB_D_X: - case ADDR_SW_64KB_D: - case ADDR_SW_64KB_D_T: - case ADDR_SW_64KB_D_X: - support = (pIn->bpp == 64); - break; - - case ADDR_SW_LINEAR: - case ADDR_SW_4KB_S: - case ADDR_SW_4KB_S_X: - case ADDR_SW_64KB_S: - case ADDR_SW_64KB_S_T: - case ADDR_SW_64KB_S_X: - case ADDR_SW_64KB_R_X: - support = (pIn->bpp <= 64); - break; - - default: - break; - } - } - else - { - ADDR_NOT_IMPLEMENTED(); - } - - return support; + return (GetValidDisplaySwizzleModes(pIn->bpp) & (1 << pIn->swizzleMode)) ? TRUE : FALSE; } /** @@ -2009,42 +2175,32 @@ ADDR_E_RETURNCODE Gfx10Lib::HwlComputePipeBankXor( { if (IsNonPrtXor(pIn->swizzleMode)) { - const UINT_32 blockBits = GetBlockSizeLog2(pIn->swizzleMode); - const UINT_32 pipeBits = GetPipeXorBits(blockBits); - const UINT_32 bankBits = GetBankXorBits(blockBits); + const UINT_32 bankBits = GetBankXorBits(GetBlockSizeLog2(pIn->swizzleMode)); - UINT_32 pipeXor = 0; - UINT_32 bankXor = 0; + // No pipe xor... + const UINT_32 pipeXor = 0; + UINT_32 bankXor = 0; - if (bankBits != 0) + const UINT_32 XorPatternLen = 8; + static const UINT_32 XorBankRot1b[XorPatternLen] = {0, 1, 0, 1, 0, 1, 0, 1}; + static const UINT_32 XorBankRot2b[XorPatternLen] = {0, 2, 1, 3, 2, 0, 3, 1}; + static const UINT_32 XorBankRot3b[XorPatternLen] = {0, 4, 2, 6, 1, 5, 3, 7}; + static const UINT_32 XorBankRot4b[XorPatternLen] = {0, 8, 4, 12, 2, 10, 6, 14}; + static const UINT_32* XorBankRotPat[] = {XorBankRot1b, XorBankRot2b, XorBankRot3b, XorBankRot4b}; + + switch (bankBits) { - if (blockBits == 16) - { - const UINT_32 XorPatternLen = 8; - static const UINT_32 XorBank1b[XorPatternLen] = {0x00, 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, 0x80}; - static const UINT_32 XorBank2b[XorPatternLen] = {0x00, 0x80, 0x40, 0xC0, 0x80, 0x00, 0xC0, 0x40}; - static const UINT_32 XorBank3b[XorPatternLen] = {0x00, 0x80, 0x40, 0xC0, 0x20, 0xA0, 0x60, 0xE0}; - - const UINT_32 index = pIn->surfIndex % XorPatternLen; - - if (bankBits == 1) - { - bankXor = XorBank1b[index]; - } - else if (bankBits == 2) - { - bankXor = XorBank2b[index]; - } - else - { - bankXor = XorBank3b[index]; - - if (bankBits == 4) - { - bankXor >>= (2 - pipeBits); - } - } - } + case 1: + case 2: + case 3: + case 4: + bankXor = XorBankRotPat[bankBits - 1][pIn->surfIndex % XorPatternLen] << (m_pipesLog2 + ColumnBits); + break; + default: + // valid bank bits should be 0~4 + ADDR_ASSERT_ALWAYS(); + case 0: + break; } pOut->pipeBankXor = bankXor | pipeXor; @@ -2080,6 +2236,38 @@ ADDR_E_RETURNCODE Gfx10Lib::HwlComputeSlicePipeBankXor( const UINT_32 pipeXor = ReverseBitVector(pIn->slice, pipeBits); pOut->pipeBankXor = pIn->basePipeBankXor ^ pipeXor; + + if (pIn->bpe != 0) + { + const ADDR_SW_PATINFO* pPatInfo = GetSwizzlePatternInfo(pIn->swizzleMode, + pIn->resourceType, + Log2(pIn->bpe >> 3), + 1); + + if (pPatInfo != NULL) + { + ADDR_BIT_SETTING fullSwizzlePattern[20]; + GetSwizzlePatternFromPatternInfo(pPatInfo, fullSwizzlePattern); + + const UINT_32 pipeBankXorOffset = + ComputeOffsetFromSwizzlePattern(reinterpret_cast(fullSwizzlePattern), + blockBits, + 0, + 0, + pIn->slice, + 0); + + const UINT_32 pipeBankXor = pipeBankXorOffset >> m_pipeInterleaveLog2; + + // Should have no bit set under pipe interleave + ADDR_ASSERT((pipeBankXor << m_pipeInterleaveLog2) == pipeBankXorOffset); + + // This assertion firing means old approach doesn't calculate a correct sliceXor value... + ADDR_ASSERT(pipeBankXor == pipeXor); + + pOut->pipeBankXor = pIn->basePipeBankXor ^ pipeBankXor; + } + } } else { @@ -2112,6 +2300,188 @@ ADDR_E_RETURNCODE Gfx10Lib::HwlComputeSubResourceOffsetForSwizzlePattern( return ADDR_OK; } +/** +************************************************************************************************************************ +* Gfx10Lib::HwlComputeNonBlockCompressedView +* +* @brief +* Compute non-block-compressed view for a given mipmap level/slice. +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx10Lib::HwlComputeNonBlockCompressedView( + const ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pIn->resourceType != ADDR_RSRC_TEX_2D) + { + // Only 2D resource can have a NonBC view... + returnCode = ADDR_INVALIDPARAMS; + } + else if (((pIn->format < ADDR_FMT_ASTC_4x4) || (pIn->format > ADDR_FMT_ETC2_128BPP)) && + ((pIn->format < ADDR_FMT_BC1) || (pIn->format > ADDR_FMT_BC7))) + { + // Only support BC1~BC7, ASTC, or ETC2 for now... + returnCode = ADDR_NOTSUPPORTED; + } + else + { + UINT_32 bcWidth, bcHeight; + UINT_32 bpp = GetElemLib()->GetBitsPerPixel(pIn->format, NULL, &bcWidth, &bcHeight); + + ADDR2_COMPUTE_SURFACE_INFO_INPUT infoIn = {}; + infoIn.flags = pIn->flags; + infoIn.swizzleMode = pIn->swizzleMode; + infoIn.resourceType = pIn->resourceType; + infoIn.bpp = bpp; + infoIn.width = RoundUpQuotient(pIn->width, bcWidth); + infoIn.height = RoundUpQuotient(pIn->height, bcHeight); + infoIn.numSlices = pIn->numSlices; + infoIn.numMipLevels = pIn->numMipLevels; + infoIn.numSamples = 1; + infoIn.numFrags = 1; + + ADDR2_MIP_INFO mipInfo[MaxMipLevels] = {}; + + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT infoOut = {}; + infoOut.pMipInfo = mipInfo; + + const BOOL_32 tiled = (pIn->swizzleMode != ADDR_SW_LINEAR) ? TRUE : FALSE; + + if (tiled) + { + returnCode = HwlComputeSurfaceInfoTiled(&infoIn, &infoOut); + } + else + { + returnCode = HwlComputeSurfaceInfoLinear(&infoIn, &infoOut); + } + + if (returnCode == ADDR_OK) + { + ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT subOffIn = {}; + subOffIn.swizzleMode = infoIn.swizzleMode; + subOffIn.resourceType = infoIn.resourceType; + subOffIn.slice = pIn->slice; + subOffIn.sliceSize = infoOut.sliceSize; + subOffIn.macroBlockOffset = mipInfo[pIn->mipId].macroBlockOffset; + subOffIn.mipTailOffset = mipInfo[pIn->mipId].mipTailOffset; + + ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT subOffOut = {}; + + // For any mipmap level, move nonBc view base address by offset + HwlComputeSubResourceOffsetForSwizzlePattern(&subOffIn, &subOffOut); + pOut->offset = subOffOut.offset; + + ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT slicePbXorIn = {}; + slicePbXorIn.bpe = infoIn.bpp; + slicePbXorIn.swizzleMode = infoIn.swizzleMode; + slicePbXorIn.resourceType = infoIn.resourceType; + slicePbXorIn.basePipeBankXor = pIn->pipeBankXor; + slicePbXorIn.slice = pIn->slice; + + ADDR2_COMPUTE_SLICE_PIPEBANKXOR_OUTPUT slicePbXorOut = {}; + + // For any mipmap level, nonBc view should use computed pbXor + HwlComputeSlicePipeBankXor(&slicePbXorIn, &slicePbXorOut); + pOut->pipeBankXor = slicePbXorOut.pipeBankXor; + + const BOOL_32 inTail = tiled && (pIn->mipId >= infoOut.firstMipIdInTail) ? TRUE : FALSE; + const UINT_32 requestMipWidth = RoundUpQuotient(Max(pIn->width >> pIn->mipId, 1u), bcWidth); + const UINT_32 requestMipHeight = RoundUpQuotient(Max(pIn->height >> pIn->mipId, 1u), bcHeight); + + if (inTail) + { + // For mipmap level that is in mip tail block, hack a lot of things... + // Basically all mipmap levels in tail block will be viewed as a small mipmap chain that all levels + // are fit in tail block: + + // - mipId = relative mip id (which is counted from first mip ID in tail in original mip chain) + pOut->mipId = pIn->mipId - infoOut.firstMipIdInTail; + + // - at least 2 mipmap levels (since only 1 mipmap level will not be viewed as mipmap!) + pOut->numMipLevels = Max(infoIn.numMipLevels - infoOut.firstMipIdInTail, 2u); + + // - (mip0) width = requestMipWidth << mipId, the value can't exceed mip tail dimension threshold + pOut->unalignedWidth = Min(requestMipWidth << pOut->mipId, infoOut.blockWidth / 2); + + // - (mip0) height = requestMipHeight << mipId, the value can't exceed mip tail dimension threshold + pOut->unalignedHeight = Min(requestMipHeight << pOut->mipId, infoOut.blockHeight); + } + // This check should cover at least mipId == 0 + else if (requestMipWidth << pIn->mipId == infoIn.width) + { + // For mipmap level [N] that is not in mip tail block and downgraded without losing element: + // - only one mipmap level and mipId = 0 + pOut->mipId = 0; + pOut->numMipLevels = 1; + + // (mip0) width = requestMipWidth + pOut->unalignedWidth = requestMipWidth; + + // (mip0) height = requestMipHeight + pOut->unalignedHeight = requestMipHeight; + } + else + { + // For mipmap level [N] that is not in mip tail block and downgraded with element losing, + // We have to make it a multiple mipmap view (2 levels view here), add one extra element if needed, + // because single mip view may have different pitch value than original (multiple) mip view... + // A simple case would be: + // - 64KB block swizzle mode, 8 Bytes-Per-Element. Block dim = [0x80, 0x40] + // - 2 mipmap levels with API mip0 width = 0x401/mip1 width = 0x200 and non-BC view + // mip0 width = 0x101/mip1 width = 0x80 + // By multiple mip view, the pitch for mip level 1 would be 0x100 bytes, due to rounding up logic in + // GetMipSize(), and by single mip level view the pitch will only be 0x80 bytes. + + // - 2 levels and mipId = 1 + pOut->mipId = 1; + pOut->numMipLevels = 2; + + const UINT_32 upperMipWidth = RoundUpQuotient(Max(pIn->width >> (pIn->mipId - 1), 1u), bcWidth); + const UINT_32 upperMipHeight = RoundUpQuotient(Max(pIn->height >> (pIn->mipId - 1), 1u), bcHeight); + + const BOOL_32 needToAvoidInTail = + tiled && (requestMipWidth <= infoOut.blockWidth / 2) && (requestMipHeight <= infoOut.blockHeight) ? + TRUE : FALSE; + + const UINT_32 hwMipWidth = PowTwoAlign(ShiftCeil(infoIn.width, pIn->mipId), infoOut.blockWidth); + const UINT_32 hwMipHeight = PowTwoAlign(ShiftCeil(infoIn.height, pIn->mipId), infoOut.blockHeight); + + const BOOL_32 needExtraWidth = + ((upperMipWidth < requestMipWidth * 2) || + ((upperMipWidth == requestMipWidth * 2) && + ((needToAvoidInTail == TRUE) || + (hwMipWidth > PowTwoAlign(requestMipWidth, infoOut.blockWidth))))) ? TRUE : FALSE; + + const BOOL_32 needExtraHeight = + ((upperMipHeight < requestMipHeight * 2) || + ((upperMipHeight == requestMipHeight * 2) && + ((needToAvoidInTail == TRUE) || + (hwMipHeight > PowTwoAlign(requestMipHeight, infoOut.blockHeight))))) ? TRUE : FALSE; + + // (mip0) width = requestLastMipLevelWidth + pOut->unalignedWidth = upperMipWidth + (needExtraWidth ? 1: 0); + + // (mip0) height = requestLastMipLevelHeight + pOut->unalignedHeight = upperMipHeight + (needExtraHeight ? 1: 0); + } + + // Assert the downgrading from this mip[0] width would still generate correct mip[N] width + ADDR_ASSERT(ShiftRight(pOut->unalignedWidth, pOut->mipId) == requestMipWidth); + // Assert the downgrading from this mip[0] height would still generate correct mip[N] height + ADDR_ASSERT(ShiftRight(pOut->unalignedHeight, pOut->mipId) == requestMipHeight); + } + } + + return returnCode; +} + /** ************************************************************************************************************************ * Gfx10Lib::ValidateNonSwModeParams @@ -2200,11 +2570,18 @@ BOOL_32 Gfx10Lib::ValidateSwModeParams( { BOOL_32 valid = TRUE; - if ((pIn->swizzleMode >= ADDR_SW_MAX_TYPE) || (IsValidSwMode(pIn->swizzleMode) == FALSE)) + if (pIn->swizzleMode >= ADDR_SW_MAX_TYPE) { ADDR_ASSERT_ALWAYS(); valid = FALSE; } + else if (IsValidSwMode(pIn->swizzleMode) == FALSE) + { + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + } const ADDR2_SURFACE_FLAGS flags = pIn->flags; const AddrResourceType rsrcType = pIn->resourceType; @@ -2258,9 +2635,15 @@ BOOL_32 Gfx10Lib::ValidateSwModeParams( } else if (tex2d) { - if (((swizzleMask & Gfx10Rsrc2dSwModeMask) == 0) || - (prt && ((swizzleMask & Gfx10Rsrc2dPrtSwModeMask) == 0)) || - (fmask && ((swizzleMask & Gfx10ZSwModeMask) == 0))) + if ((swizzleMask & Gfx10Rsrc2dSwModeMask) == 0) + { + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + } + else if ((prt && ((swizzleMask & Gfx10Rsrc2dPrtSwModeMask) == 0)) || + (fmask && ((swizzleMask & Gfx10ZSwModeMask) == 0))) { ADDR_ASSERT_ALWAYS(); valid = FALSE; @@ -2323,8 +2706,10 @@ BOOL_32 Gfx10Lib::ValidateSwModeParams( } else { - ADDR_ASSERT_ALWAYS(); - valid = FALSE; + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } } // Block type check @@ -2397,16 +2782,16 @@ ADDR_E_RETURNCODE Gfx10Lib::HwlGetPreferredSurfaceSetting( } else { - pOut->resourceType = ADDR_RSRC_TEX_2D; - pOut->validBlockSet.value = 0; - pOut->validBlockSet.macroThin64KB = forbid64KbBlockType ? 0 : 1; - pOut->validBlockSet.var = forbidVarBlockType ? 0 : 1; - pOut->validSwModeSet.value = 0; - pOut->validSwModeSet.sw64KB_Z_X = forbid64KbBlockType ? 0 : 1; - pOut->validSwModeSet.swVar_Z_X = forbidVarBlockType ? 0 : 1; - pOut->canXor = TRUE; - pOut->validSwTypeSet.value = AddrSwSetZ; - pOut->clientPreferredSwSet = pOut->validSwTypeSet; + pOut->resourceType = ADDR_RSRC_TEX_2D; + pOut->validBlockSet.value = 0; + pOut->validBlockSet.macroThin64KB = forbid64KbBlockType ? 0 : 1; + pOut->validBlockSet.var = forbidVarBlockType ? 0 : 1; + pOut->validSwModeSet.value = 0; + pOut->validSwModeSet.sw64KB_Z_X = forbid64KbBlockType ? 0 : 1; + pOut->validSwModeSet.gfx10.swVar_Z_X = forbidVarBlockType ? 0 : 1; + pOut->canXor = TRUE; + pOut->validSwTypeSet.value = AddrSwSetZ; + pOut->clientPreferredSwSet = pOut->validSwTypeSet; BOOL_32 use64KbBlockType = (forbid64KbBlockType == FALSE); @@ -2422,9 +2807,9 @@ ADDR_E_RETURNCODE Gfx10Lib::HwlGetPreferredSurfaceSetting( const UINT_64 sizeAlignInElement = Max(NextPow2(pIn->minSizeAlign) / (fmaskBpp >> 3), 1u); AddrSwizzleMode swMode[maxFmaskSwizzleModeType] = {ADDR_SW_64KB_Z_X, ADDR_SW_VAR_Z_X}; - Dim3d blkDim[maxFmaskSwizzleModeType] = {{0}, {0}}; - Dim3d padDim[maxFmaskSwizzleModeType] = {{0}, {0}}; - UINT_64 padSize[maxFmaskSwizzleModeType] = {0}; + Dim3d blkDim[maxFmaskSwizzleModeType] = {{}, {}}; + Dim3d padDim[maxFmaskSwizzleModeType] = {{}, {}}; + UINT_64 padSize[maxFmaskSwizzleModeType] = {}; for (UINT_8 i = 0; i < maxFmaskSwizzleModeType; i++) { @@ -2440,19 +2825,14 @@ ADDR_E_RETURNCODE Gfx10Lib::HwlGetPreferredSurfaceSetting( padSize[i] = PowTwoAlign(padSize[i], sizeAlignInElement); } - if (GetBlockSizeLog2(swMode[1]) >= GetBlockSizeLog2(swMode[0])) + if (BlockTypeWithinMemoryBudget(padSize[0], + padSize[1], + ratioLow, + ratioHi, + pIn->memoryBudget, + GetBlockSizeLog2(swMode[1]) >= GetBlockSizeLog2(swMode[0]))) { - if ((padSize[1] * ratioHi) <= (padSize[0] * ratioLow)) - { - use64KbBlockType = FALSE; - } - } - else - { - if ((padSize[1] * ratioLow) < (padSize[0] * ratioHi)) - { - use64KbBlockType = FALSE; - } + use64KbBlockType = FALSE; } } else if (forbidVarBlockType) @@ -2525,16 +2905,16 @@ ADDR_E_RETURNCODE Gfx10Lib::HwlGetPreferredSurfaceSetting( allowedSwModeSet.value |= pIn->forbiddenBlock.micro ? 0 : Gfx10Blk256BSwModeMask; allowedSwModeSet.value |= pIn->forbiddenBlock.macroThin4KB ? 0 : - ((pOut->resourceType == ADDR_RSRC_TEX_3D) ? 0 : Gfx10Blk4KBSwModeMask); + ((pIn->resourceType == ADDR_RSRC_TEX_3D) ? 0 : Gfx10Blk4KBSwModeMask); allowedSwModeSet.value |= pIn->forbiddenBlock.macroThick4KB ? 0 : - ((pOut->resourceType == ADDR_RSRC_TEX_3D) ? Gfx10Rsrc3dThick4KBSwModeMask : 0); + ((pIn->resourceType == ADDR_RSRC_TEX_3D) ? Gfx10Rsrc3dThick4KBSwModeMask : 0); allowedSwModeSet.value |= pIn->forbiddenBlock.macroThin64KB ? 0 : - ((pOut->resourceType == ADDR_RSRC_TEX_3D) ? Gfx10Rsrc3dThin64KBSwModeMask : Gfx10Blk64KBSwModeMask); + ((pIn->resourceType == ADDR_RSRC_TEX_3D) ? Gfx10Rsrc3dThin64KBSwModeMask : Gfx10Blk64KBSwModeMask); allowedSwModeSet.value |= pIn->forbiddenBlock.macroThick64KB ? 0 : - ((pOut->resourceType == ADDR_RSRC_TEX_3D) ? Gfx10Rsrc3dThick64KBSwModeMask : 0); + ((pIn->resourceType == ADDR_RSRC_TEX_3D) ? Gfx10Rsrc3dThick64KBSwModeMask : 0); allowedSwModeSet.value |= pIn->forbiddenBlock.var ? 0 : (m_blockVarSizeLog2 ? Gfx10BlkVarSwModeMask : 0); @@ -2625,14 +3005,7 @@ ADDR_E_RETURNCODE Gfx10Lib::HwlGetPreferredSurfaceSetting( if (pIn->flags.display) { - if (m_settings.isDcn2) - { - allowedSwModeSet.value &= (bpp == 64) ? Dcn2Bpp64SwModeMask : Dcn2NonBpp64SwModeMask; - } - else - { - ADDR_NOT_IMPLEMENTED(); - } + allowedSwModeSet.value &= GetValidDisplaySwizzleModes(bpp); } if (allowedSwModeSet.value != 0) @@ -2694,19 +3067,28 @@ ADDR_E_RETURNCODE Gfx10Lib::HwlGetPreferredSurfaceSetting( } else { - // Always ignore linear swizzle mode if there is other choice. - allowedSwModeSet.swLinear = 0; + const BOOL_32 computeMinSize = (pIn->flags.minimizeAlign == 1) || (pIn->memoryBudget >= 1.0); + + if ((height > 1) && (computeMinSize == FALSE)) + { + // Always ignore linear swizzle mode if: + // 1. This is a (2D/3D) resource with height > 1 + // 2. Client doesn't require computing minimize size + allowedSwModeSet.swLinear = 0; + } ADDR2_BLOCK_SET allowedBlockSet = GetAllowedBlockSet(allowedSwModeSet, pOut->resourceType); - // Determine block size if there is 2 or more block type candidates + // Determine block size if there are 2 or more block type candidates if (IsPow2(allowedBlockSet.value) == FALSE) { - AddrSwizzleMode swMode[AddrBlockMaxTiledType] = { ADDR_SW_LINEAR }; + AddrSwizzleMode swMode[AddrBlockMaxTiledType] = {}; + + swMode[AddrBlockLinear] = ADDR_SW_LINEAR; if (m_blockVarSizeLog2 != 0) { - swMode[AddrBlockVar] = ADDR_SW_VAR_R_X; + swMode[AddrBlockThinVar] = ADDR_SW_VAR_R_X; } if (pOut->resourceType == ADDR_RSRC_TEX_3D) @@ -2722,99 +3104,170 @@ ADDR_E_RETURNCODE Gfx10Lib::HwlGetPreferredSurfaceSetting( swMode[AddrBlockThin64KB] = ADDR_SW_64KB_S; } - Dim3d blkDim[AddrBlockMaxTiledType] = {{0}, {0}, {0}, {0}, {0}, {0}}; - Dim3d padDim[AddrBlockMaxTiledType] = {{0}, {0}, {0}, {0}, {0}, {0}}; - UINT_64 padSize[AddrBlockMaxTiledType] = {0}; + UINT_64 padSize[AddrBlockMaxTiledType] = {}; - const UINT_32 ratioLow = pIn->flags.minimizeAlign ? 1 : (pIn->flags.opt4space ? 3 : 2); - const UINT_32 ratioHi = pIn->flags.minimizeAlign ? 1 : (pIn->flags.opt4space ? 2 : 1); + const UINT_32 ratioLow = computeMinSize ? 1 : (pIn->flags.opt4space ? 3 : 2); + const UINT_32 ratioHi = computeMinSize ? 1 : (pIn->flags.opt4space ? 2 : 1); const UINT_64 sizeAlignInElement = Max(NextPow2(pIn->minSizeAlign) / (bpp >> 3), 1u); UINT_32 minSizeBlk = AddrBlockMicro; UINT_64 minSize = 0; - for (UINT_32 i = AddrBlockMicro; i < AddrBlockMaxTiledType; i++) + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT localOut = {}; + + for (UINT_32 i = AddrBlockLinear; i < AddrBlockMaxTiledType; i++) { - if (allowedBlockSet.value & (1 << i)) + if (IsBlockTypeAvaiable(allowedBlockSet, static_cast(i))) { - ComputeBlockDimensionForSurf(&blkDim[i].w, - &blkDim[i].h, - &blkDim[i].d, - bpp, - numFrags, - pOut->resourceType, - swMode[i]); + localIn.swizzleMode = swMode[i]; - padSize[i] = ComputePadSize(&blkDim[i], width, height, numSlices, &padDim[i]); - padSize[i] = PowTwoAlign(padSize[i] * numFrags, sizeAlignInElement); - - if (minSize == 0) + if (localIn.swizzleMode == ADDR_SW_LINEAR) { - minSize = padSize[i]; - minSizeBlk = i; + returnCode = HwlComputeSurfaceInfoLinear(&localIn, &localOut); } else { - // Due to the fact that VAR block size = 16KB * m_pipes, it is possible that VAR - // block size < 64KB. And ratio[Hi/Low] logic implicitly requires iterating from - // smaller block type to bigger block type. So we have to correct comparing logic - // according to the size of existing "minimun block" and size of coming/comparing - // block. The new logic can also be useful to any future change about AddrBlockType. - if (GetBlockSizeLog2(swMode[i]) >= GetBlockSizeLog2(swMode[minSizeBlk])) + returnCode = HwlComputeSurfaceInfoTiled(&localIn, &localOut); + } + + if (returnCode == ADDR_OK) + { + padSize[i] = localOut.surfSize; + + if (minSize == 0) { - if ((padSize[i] * ratioHi) <= (minSize * ratioLow)) - { - minSize = padSize[i]; - minSizeBlk = i; - } + minSize = padSize[i]; + minSizeBlk = i; } else { - if ((padSize[i] * ratioLow) < (minSize * ratioHi)) + if (BlockTypeWithinMemoryBudget( + minSize, + padSize[i], + ratioLow, + ratioHi, + 0.0, + GetBlockSizeLog2(swMode[i]) >= GetBlockSizeLog2(swMode[minSizeBlk]))) { minSize = padSize[i]; minSizeBlk = i; } } } + else + { + ADDR_ASSERT_ALWAYS(); + break; + } } } - if ((allowedBlockSet.micro == TRUE) && - (width <= blkDim[AddrBlockMicro].w) && - (height <= blkDim[AddrBlockMicro].h)) + if (pIn->memoryBudget > 1.0) { - minSizeBlk = AddrBlockMicro; + // If minimum size is given by swizzle mode with bigger-block type, then don't ever check + // smaller-block type again in coming loop + switch (minSizeBlk) + { + case AddrBlockThick64KB: + allowedBlockSet.macroThin64KB = 0; + case AddrBlockThinVar: + case AddrBlockThin64KB: + allowedBlockSet.macroThick4KB = 0; + case AddrBlockThick4KB: + allowedBlockSet.macroThin4KB = 0; + case AddrBlockThin4KB: + allowedBlockSet.micro = 0; + case AddrBlockMicro: + allowedBlockSet.linear = 0; + case AddrBlockLinear: + break; + + default: + ADDR_ASSERT_ALWAYS(); + break; + } + + for (UINT_32 i = AddrBlockMicro; i < AddrBlockMaxTiledType; i++) + { + if ((i != minSizeBlk) && + IsBlockTypeAvaiable(allowedBlockSet, static_cast(i))) + { + if (BlockTypeWithinMemoryBudget( + minSize, + padSize[i], + 0, + 0, + pIn->memoryBudget, + GetBlockSizeLog2(swMode[i]) >= GetBlockSizeLog2(swMode[minSizeBlk])) == FALSE) + { + // Clear the block type if the memory waste is unacceptable + allowedBlockSet.value &= ~(1u << (i - 1)); + } + } + } + + // Remove VAR block type if bigger block type is allowed + if (GetBlockSizeLog2(swMode[AddrBlockThinVar]) < GetBlockSizeLog2(ADDR_SW_64KB_R_X)) + { + if (allowedBlockSet.macroThick64KB || allowedBlockSet.macroThin64KB) + { + allowedBlockSet.var = 0; + } + } + + // Remove linear block type if 2 or more block types are allowed + if (IsPow2(allowedBlockSet.value) == FALSE) + { + allowedBlockSet.linear = 0; + } + + // Select the biggest allowed block type + minSizeBlk = Log2NonPow2(allowedBlockSet.value) + 1; + + if (minSizeBlk == static_cast(AddrBlockMaxTiledType)) + { + minSizeBlk = AddrBlockLinear; + } } - if (minSizeBlk == AddrBlockMicro) + switch (minSizeBlk) { - ADDR_ASSERT(pOut->resourceType != ADDR_RSRC_TEX_3D); - allowedSwModeSet.value &= Gfx10Blk256BSwModeMask; - } - else if (minSizeBlk == AddrBlockThick4KB) - { - ADDR_ASSERT(pOut->resourceType == ADDR_RSRC_TEX_3D); - allowedSwModeSet.value &= Gfx10Rsrc3dThick4KBSwModeMask; - } - else if (minSizeBlk == AddrBlockThin4KB) - { - ADDR_ASSERT(pOut->resourceType != ADDR_RSRC_TEX_3D); - allowedSwModeSet.value &= Gfx10Blk4KBSwModeMask; - } - else if (minSizeBlk == AddrBlockThick64KB) - { - ADDR_ASSERT(pOut->resourceType == ADDR_RSRC_TEX_3D); - allowedSwModeSet.value &= Gfx10Rsrc3dThick64KBSwModeMask; - } - else if (minSizeBlk == AddrBlockThin64KB) - { - allowedSwModeSet.value &= (pOut->resourceType == ADDR_RSRC_TEX_3D) ? - Gfx10Rsrc3dThin64KBSwModeMask : Gfx10Blk64KBSwModeMask; - } - else - { - ADDR_ASSERT(minSizeBlk == AddrBlockVar); - allowedSwModeSet.value &= Gfx10BlkVarSwModeMask; + case AddrBlockLinear: + allowedSwModeSet.value &= Gfx10LinearSwModeMask; + break; + + case AddrBlockMicro: + ADDR_ASSERT(pOut->resourceType != ADDR_RSRC_TEX_3D); + allowedSwModeSet.value &= Gfx10Blk256BSwModeMask; + break; + + case AddrBlockThin4KB: + ADDR_ASSERT(pOut->resourceType != ADDR_RSRC_TEX_3D); + allowedSwModeSet.value &= Gfx10Blk4KBSwModeMask; + break; + + case AddrBlockThick4KB: + ADDR_ASSERT(pOut->resourceType == ADDR_RSRC_TEX_3D); + allowedSwModeSet.value &= Gfx10Rsrc3dThick4KBSwModeMask; + break; + + case AddrBlockThin64KB: + allowedSwModeSet.value &= (pOut->resourceType == ADDR_RSRC_TEX_3D) ? + Gfx10Rsrc3dThin64KBSwModeMask : Gfx10Blk64KBSwModeMask; + break; + + case AddrBlockThick64KB: + ADDR_ASSERT(pOut->resourceType == ADDR_RSRC_TEX_3D); + allowedSwModeSet.value &= Gfx10Rsrc3dThick64KBSwModeMask; + break; + + case AddrBlockThinVar: + allowedSwModeSet.value &= Gfx10BlkVarSwModeMask; + break; + + default: + ADDR_ASSERT_ALWAYS(); + allowedSwModeSet.value = 0; + break; } } @@ -2823,8 +3276,8 @@ ADDR_E_RETURNCODE Gfx10Lib::HwlGetPreferredSurfaceSetting( ADDR2_SWTYPE_SET allowedSwSet = GetAllowedSwSet(allowedSwModeSet); - // Determine swizzle type if there is 2 or more swizzle type candidates - if (IsPow2(allowedSwSet.value) == FALSE) + // Determine swizzle type if there are 2 or more swizzle type candidates + if ((allowedSwSet.value != 0) && (IsPow2(allowedSwSet.value) == FALSE)) { if (ElemLib::IsBlockCompressed(pIn->format)) { @@ -2900,10 +3353,10 @@ ADDR_E_RETURNCODE Gfx10Lib::HwlGetPreferredSurfaceSetting( allowedSwModeSet.value &= Gfx10ZSwModeMask; } } - } - // Swizzle type should be determined. - ADDR_ASSERT(IsPow2(GetAllowedSwSet(allowedSwModeSet).value)); + // Swizzle type should be determined. + ADDR_ASSERT(IsPow2(GetAllowedSwSet(allowedSwModeSet).value)); + } // Determine swizzle mode now. Always select the "largest" swizzle mode for a given block type + // swizzle type combination. E.g, for AddrBlockThin64KB + ADDR_SW_S, select SW_64KB_S_X(25) if it's @@ -2943,14 +3396,12 @@ ADDR_E_RETURNCODE Gfx10Lib::HwlGetPreferredSurfaceSetting( */ ADDR_E_RETURNCODE Gfx10Lib::ComputeStereoInfo( const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< Compute surface info - UINT_32 blkHeight, ///< Block height UINT_32* pAlignY, ///< Stereo requested additional alignment in Y UINT_32* pRightXor ///< Right eye xor ) const { ADDR_E_RETURNCODE ret = ADDR_OK; - *pAlignY = 1; *pRightXor = 0; if (IsNonPrtXor(pIn->swizzleMode)) @@ -2963,37 +3414,68 @@ ADDR_E_RETURNCODE Gfx10Lib::ComputeStereoInfo( if (eqIndex != ADDR_INVALID_EQUATION_INDEX) { - UINT_32 yMax = 0; - UINT_32 yPos = 0; + UINT_32 yMax = 0; + UINT_32 yPosMask = 0; + // First get "max y bit" for (UINT_32 i = m_pipeInterleaveLog2; i < blkSizeLog2; i++) { - if (m_equationTable[eqIndex].xor1[i].value == 0) + ADDR_ASSERT(m_equationTable[eqIndex].addr[i].valid == 1); + + if ((m_equationTable[eqIndex].addr[i].channel == 1) && + (m_equationTable[eqIndex].addr[i].index > yMax)) { - break; + yMax = m_equationTable[eqIndex].addr[i].index; } - ADDR_ASSERT(m_equationTable[eqIndex].xor1[i].valid == 1); - - if ((m_equationTable[eqIndex].xor1[i].channel == 1) && + if ((m_equationTable[eqIndex].xor1[i].valid == 1) && + (m_equationTable[eqIndex].xor1[i].channel == 1) && (m_equationTable[eqIndex].xor1[i].index > yMax)) { yMax = m_equationTable[eqIndex].xor1[i].index; - yPos = i; + } + + if ((m_equationTable[eqIndex].xor2[i].valid == 1) && + (m_equationTable[eqIndex].xor2[i].channel == 1) && + (m_equationTable[eqIndex].xor2[i].index > yMax)) + { + yMax = m_equationTable[eqIndex].xor2[i].index; + } + } + + // Then loop again for populating a position mask of "max Y bit" + for (UINT_32 i = m_pipeInterleaveLog2; i < blkSizeLog2; i++) + { + if ((m_equationTable[eqIndex].addr[i].channel == 1) && + (m_equationTable[eqIndex].addr[i].index == yMax)) + { + yPosMask |= 1u << i; + } + else if ((m_equationTable[eqIndex].xor1[i].valid == 1) && + (m_equationTable[eqIndex].xor1[i].channel == 1) && + (m_equationTable[eqIndex].xor1[i].index == yMax)) + { + yPosMask |= 1u << i; + } + else if ((m_equationTable[eqIndex].xor2[i].valid == 1) && + (m_equationTable[eqIndex].xor2[i].channel == 1) && + (m_equationTable[eqIndex].xor2[i].index == yMax)) + { + yPosMask |= 1u << i; } } const UINT_32 additionalAlign = 1 << yMax; - if (additionalAlign >= blkHeight) + if (additionalAlign >= *pAlignY) { - *pAlignY *= (additionalAlign / blkHeight); + *pAlignY = additionalAlign; const UINT_32 alignedHeight = PowTwoAlign(pIn->height, additionalAlign); if ((alignedHeight >> yMax) & 1) { - *pRightXor = 1 << (yPos - m_pipeInterleaveLog2); + *pRightXor = yPosMask >> m_pipeInterleaveLog2; } } } @@ -3024,6 +3506,16 @@ ADDR_E_RETURNCODE Gfx10Lib::HwlComputeSurfaceInfoTiled( { ADDR_E_RETURNCODE ret; + // Mip chain dimesion and epitch has no meaning in GFX10, set to default value + pOut->mipChainPitch = 0; + pOut->mipChainHeight = 0; + pOut->mipChainSlice = 0; + pOut->epitchIsHeight = FALSE; + + // Following information will be provided in ComputeSurfaceInfoMacroTiled() if necessary + pOut->mipChainInTail = FALSE; + pOut->firstMipIdInTail = pIn->numMipLevels; + if (IsBlock256b(pIn->swizzleMode)) { ret = ComputeSurfaceInfoMicroTiled(pIn, pOut); @@ -3062,13 +3554,6 @@ ADDR_E_RETURNCODE Gfx10Lib::ComputeSurfaceInfoMicroTiled( if (ret == ADDR_OK) { - pOut->mipChainPitch = 0; - pOut->mipChainHeight = 0; - pOut->mipChainSlice = 0; - pOut->epitchIsHeight = FALSE; - pOut->mipChainInTail = FALSE; - pOut->firstMipIdInTail = pIn->numMipLevels; - const UINT_32 blockSize = GetBlockSize(pIn->swizzleMode); pOut->pitch = PowTwoAlign(pIn->width, pOut->blockWidth); @@ -3159,28 +3644,17 @@ ADDR_E_RETURNCODE Gfx10Lib::ComputeSurfaceInfoMacroTiled( if (pIn->flags.qbStereo) { UINT_32 rightXor = 0; - UINT_32 alignY = 1; - returnCode = ComputeStereoInfo(pIn, heightAlign, &alignY, &rightXor); + returnCode = ComputeStereoInfo(pIn, &heightAlign, &rightXor); if (returnCode == ADDR_OK) { pOut->pStereoInfo->rightSwizzle = rightXor; - - heightAlign *= alignY; } } if (returnCode == ADDR_OK) { - // Mip chain dimesion and epitch has no meaning in GFX10, set to default value - pOut->mipChainPitch = 0; - pOut->mipChainHeight = 0; - pOut->mipChainSlice = 0; - pOut->epitchIsHeight = FALSE; - pOut->mipChainInTail = FALSE; - pOut->firstMipIdInTail = pIn->numMipLevels; - const UINT_32 blockSizeLog2 = GetBlockSizeLog2(pIn->swizzleMode); const UINT_32 blockSize = 1 << blockSizeLog2; @@ -3242,7 +3716,7 @@ ADDR_E_RETURNCODE Gfx10Lib::ComputeSurfaceInfoMacroTiled( { pOut->pMipInfo[i].pitch = pitch; pOut->pMipInfo[i].height = height; - pOut->pMipInfo[i].depth = depth; + pOut->pMipInfo[i].depth = IsTex3d(pIn->resourceType) ? pOut->numSlices : 1; } } } @@ -3296,7 +3770,7 @@ ADDR_E_RETURNCODE Gfx10Lib::ComputeSurfaceInfoMacroTiled( pOut->pMipInfo[i].pitch = pitch; pOut->pMipInfo[i].height = height; - pOut->pMipInfo[i].depth = depth; + pOut->pMipInfo[i].depth = IsTex3d(pIn->resourceType) ? pOut->numSlices : 1; UINT_32 mipX = ((mipOffset >> 9) & 1) | ((mipOffset >> 10) & 2) | @@ -3332,7 +3806,6 @@ ADDR_E_RETURNCODE Gfx10Lib::ComputeSurfaceInfoMacroTiled( pitch = Max(pitch >> 1, Block256_2d[index].w); height = Max(height >> 1, Block256_2d[index].h); - depth = 1; } else { @@ -3342,7 +3815,6 @@ ADDR_E_RETURNCODE Gfx10Lib::ComputeSurfaceInfoMacroTiled( pitch = Max(pitch >> 1, Block256_3d[index].w); height = Max(height >> 1, Block256_3d[index].h); - depth = PowTwoAlign(Max(depth >> 1, 1u), Block256_3d[index].d); } } } @@ -3356,7 +3828,7 @@ ADDR_E_RETURNCODE Gfx10Lib::ComputeSurfaceInfoMacroTiled( { pOut->pMipInfo[0].pitch = pOut->pitch; pOut->pMipInfo[0].height = pOut->height; - pOut->pMipInfo[0].depth = IsTex3d(pIn->resourceType)? pOut->numSlices : 1; + pOut->pMipInfo[0].depth = IsTex3d(pIn->resourceType) ? pOut->numSlices : 1; pOut->pMipInfo[0].offset = 0; pOut->pMipInfo[0].mipTailOffset = 0; pOut->pMipInfo[0].macroBlockOffset = 0; @@ -3605,57 +4077,57 @@ const ADDR_SW_PATINFO* Gfx10Lib::GetSwizzlePatternInfo( const ADDR_SW_PATINFO* patInfo = NULL; const UINT_32 swizzleMask = 1 << swizzleMode; - if (IsLinear(swizzleMode) == FALSE) + if (IsBlockVariable(swizzleMode)) { - if (IsBlockVariable(swizzleMode)) + if (m_blockVarSizeLog2 != 0) { - if (m_blockVarSizeLog2 != 0) - { - ADDR_ASSERT(m_settings.supportRbPlus); + ADDR_ASSERT(m_settings.supportRbPlus); - if (IsRtOptSwizzle(swizzleMode)) + if (IsRtOptSwizzle(swizzleMode)) + { + if (numFrag == 1) { - if (numFrag == 1) - { - patInfo = SW_VAR_R_X_1xaa_RBPLUS_PATINFO; - } - else if (numFrag == 2) - { - patInfo = SW_VAR_R_X_2xaa_RBPLUS_PATINFO; - } - else if (numFrag == 4) - { - patInfo = SW_VAR_R_X_4xaa_RBPLUS_PATINFO; - } - else - { - ADDR_ASSERT(numFrag == 8); - patInfo = SW_VAR_R_X_8xaa_RBPLUS_PATINFO; - } + patInfo = GFX10_SW_VAR_R_X_1xaa_RBPLUS_PATINFO; } - else if (IsZOrderSwizzle(swizzleMode)) + else if (numFrag == 2) { - if (numFrag == 1) - { - patInfo = SW_VAR_Z_X_1xaa_RBPLUS_PATINFO; - } - else if (numFrag == 2) - { - patInfo = SW_VAR_Z_X_2xaa_RBPLUS_PATINFO; - } - else if (numFrag == 4) - { - patInfo = SW_VAR_Z_X_4xaa_RBPLUS_PATINFO; - } - else - { - ADDR_ASSERT(numFrag == 8); - patInfo = SW_VAR_Z_X_8xaa_RBPLUS_PATINFO; - } + patInfo = GFX10_SW_VAR_R_X_2xaa_RBPLUS_PATINFO; + } + else if (numFrag == 4) + { + patInfo = GFX10_SW_VAR_R_X_4xaa_RBPLUS_PATINFO; + } + else + { + ADDR_ASSERT(numFrag == 8); + patInfo = GFX10_SW_VAR_R_X_8xaa_RBPLUS_PATINFO; + } + } + else if (IsZOrderSwizzle(swizzleMode)) + { + if (numFrag == 1) + { + patInfo = GFX10_SW_VAR_Z_X_1xaa_RBPLUS_PATINFO; + } + else if (numFrag == 2) + { + patInfo = GFX10_SW_VAR_Z_X_2xaa_RBPLUS_PATINFO; + } + else if (numFrag == 4) + { + patInfo = GFX10_SW_VAR_Z_X_4xaa_RBPLUS_PATINFO; + } + else + { + ADDR_ASSERT(numFrag == 8); + patInfo = GFX10_SW_VAR_Z_X_8xaa_RBPLUS_PATINFO; } } } - else if (resourceType == ADDR_RSRC_TEX_3D) + } + else if (IsLinear(swizzleMode) == FALSE) + { + if (resourceType == ADDR_RSRC_TEX_3D) { ADDR_ASSERT(numFrag == 1); @@ -3663,16 +4135,19 @@ const ADDR_SW_PATINFO* Gfx10Lib::GetSwizzlePatternInfo( { if (IsRtOptSwizzle(swizzleMode)) { - patInfo = m_settings.supportRbPlus ? SW_64K_R_X_1xaa_RBPLUS_PATINFO : SW_64K_R_X_1xaa_PATINFO; + patInfo = m_settings.supportRbPlus ? + GFX10_SW_64K_R_X_1xaa_RBPLUS_PATINFO : GFX10_SW_64K_R_X_1xaa_PATINFO; } else if (IsZOrderSwizzle(swizzleMode)) { - patInfo = m_settings.supportRbPlus ? SW_64K_Z_X_1xaa_RBPLUS_PATINFO : SW_64K_Z_X_1xaa_PATINFO; + patInfo = m_settings.supportRbPlus ? + GFX10_SW_64K_Z_X_1xaa_RBPLUS_PATINFO : GFX10_SW_64K_Z_X_1xaa_PATINFO; } else if (IsDisplaySwizzle(resourceType, swizzleMode)) { ADDR_ASSERT(swizzleMode == ADDR_SW_64KB_D_X); - patInfo = m_settings.supportRbPlus ? SW_64K_D3_X_RBPLUS_PATINFO : SW_64K_D3_X_PATINFO; + patInfo = m_settings.supportRbPlus ? + GFX10_SW_64K_D3_X_RBPLUS_PATINFO : GFX10_SW_64K_D3_X_PATINFO; } else { @@ -3682,28 +4157,33 @@ const ADDR_SW_PATINFO* Gfx10Lib::GetSwizzlePatternInfo( { if (swizzleMode == ADDR_SW_4KB_S) { - patInfo = m_settings.supportRbPlus ? SW_4K_S3_RBPLUS_PATINFO : SW_4K_S3_PATINFO; + patInfo = m_settings.supportRbPlus ? + GFX10_SW_4K_S3_RBPLUS_PATINFO : GFX10_SW_4K_S3_PATINFO; } else { ADDR_ASSERT(swizzleMode == ADDR_SW_4KB_S_X); - patInfo = m_settings.supportRbPlus ? SW_4K_S3_X_RBPLUS_PATINFO : SW_4K_S3_X_PATINFO; + patInfo = m_settings.supportRbPlus ? + GFX10_SW_4K_S3_X_RBPLUS_PATINFO : GFX10_SW_4K_S3_X_PATINFO; } } else { if (swizzleMode == ADDR_SW_64KB_S) { - patInfo = m_settings.supportRbPlus ? SW_64K_S3_RBPLUS_PATINFO : SW_64K_S3_PATINFO; + patInfo = m_settings.supportRbPlus ? + GFX10_SW_64K_S3_RBPLUS_PATINFO : GFX10_SW_64K_S3_PATINFO; } else if (swizzleMode == ADDR_SW_64KB_S_X) { - patInfo = m_settings.supportRbPlus ? SW_64K_S3_X_RBPLUS_PATINFO : SW_64K_S3_X_PATINFO; + patInfo = m_settings.supportRbPlus ? + GFX10_SW_64K_S3_X_RBPLUS_PATINFO : GFX10_SW_64K_S3_X_PATINFO; } else { ADDR_ASSERT(swizzleMode == ADDR_SW_64KB_S_T); - patInfo = m_settings.supportRbPlus ? SW_64K_S3_T_RBPLUS_PATINFO : SW_64K_S3_T_PATINFO; + patInfo = m_settings.supportRbPlus ? + GFX10_SW_64K_S3_T_RBPLUS_PATINFO : GFX10_SW_64K_S3_T_PATINFO; } } } @@ -3717,12 +4197,14 @@ const ADDR_SW_PATINFO* Gfx10Lib::GetSwizzlePatternInfo( { if (swizzleMode == ADDR_SW_256B_S) { - patInfo = m_settings.supportRbPlus ? SW_256_S_RBPLUS_PATINFO : SW_256_S_PATINFO; + patInfo = m_settings.supportRbPlus ? + GFX10_SW_256_S_RBPLUS_PATINFO : GFX10_SW_256_S_PATINFO; } else { ADDR_ASSERT(swizzleMode == ADDR_SW_256B_D); - patInfo = m_settings.supportRbPlus ? SW_256_D_RBPLUS_PATINFO : SW_256_D_PATINFO; + patInfo = m_settings.supportRbPlus ? + GFX10_SW_256_D_RBPLUS_PATINFO : GFX10_SW_256_D_PATINFO; } } else if (IsBlock4kb(swizzleMode)) @@ -3731,24 +4213,28 @@ const ADDR_SW_PATINFO* Gfx10Lib::GetSwizzlePatternInfo( { if (swizzleMode == ADDR_SW_4KB_S) { - patInfo = m_settings.supportRbPlus ? SW_4K_S_RBPLUS_PATINFO : SW_4K_S_PATINFO; + patInfo = m_settings.supportRbPlus ? + GFX10_SW_4K_S_RBPLUS_PATINFO : GFX10_SW_4K_S_PATINFO; } else { ADDR_ASSERT(swizzleMode == ADDR_SW_4KB_S_X); - patInfo = m_settings.supportRbPlus ? SW_4K_S_X_RBPLUS_PATINFO : SW_4K_S_X_PATINFO; + patInfo = m_settings.supportRbPlus ? + GFX10_SW_4K_S_X_RBPLUS_PATINFO : GFX10_SW_4K_S_X_PATINFO; } } else { if (swizzleMode == ADDR_SW_4KB_D) { - patInfo = m_settings.supportRbPlus ? SW_4K_D_RBPLUS_PATINFO : SW_4K_D_PATINFO; + patInfo = m_settings.supportRbPlus ? + GFX10_SW_4K_D_RBPLUS_PATINFO : GFX10_SW_4K_D_PATINFO; } else { ADDR_ASSERT(swizzleMode == ADDR_SW_4KB_D_X); - patInfo = m_settings.supportRbPlus ? SW_4K_D_X_RBPLUS_PATINFO : SW_4K_D_X_PATINFO; + patInfo = m_settings.supportRbPlus ? + GFX10_SW_4K_D_X_RBPLUS_PATINFO : GFX10_SW_4K_D_X_PATINFO; } } } @@ -3758,72 +4244,86 @@ const ADDR_SW_PATINFO* Gfx10Lib::GetSwizzlePatternInfo( { if (numFrag == 1) { - patInfo = m_settings.supportRbPlus ? SW_64K_R_X_1xaa_RBPLUS_PATINFO : SW_64K_R_X_1xaa_PATINFO; + patInfo = m_settings.supportRbPlus ? + GFX10_SW_64K_R_X_1xaa_RBPLUS_PATINFO : GFX10_SW_64K_R_X_1xaa_PATINFO; } else if (numFrag == 2) { - patInfo = m_settings.supportRbPlus ? SW_64K_R_X_2xaa_RBPLUS_PATINFO : SW_64K_R_X_2xaa_PATINFO; + patInfo = m_settings.supportRbPlus ? + GFX10_SW_64K_R_X_2xaa_RBPLUS_PATINFO : GFX10_SW_64K_R_X_2xaa_PATINFO; } else if (numFrag == 4) { - patInfo = m_settings.supportRbPlus ? SW_64K_R_X_4xaa_RBPLUS_PATINFO : SW_64K_R_X_4xaa_PATINFO; + patInfo = m_settings.supportRbPlus ? + GFX10_SW_64K_R_X_4xaa_RBPLUS_PATINFO : GFX10_SW_64K_R_X_4xaa_PATINFO; } else { ADDR_ASSERT(numFrag == 8); - patInfo = m_settings.supportRbPlus ? SW_64K_R_X_8xaa_RBPLUS_PATINFO : SW_64K_R_X_8xaa_PATINFO; + patInfo = m_settings.supportRbPlus ? + GFX10_SW_64K_R_X_8xaa_RBPLUS_PATINFO : GFX10_SW_64K_R_X_8xaa_PATINFO; } } else if (IsZOrderSwizzle(swizzleMode)) { if (numFrag == 1) { - patInfo = m_settings.supportRbPlus ? SW_64K_Z_X_1xaa_RBPLUS_PATINFO : SW_64K_Z_X_1xaa_PATINFO; + patInfo = m_settings.supportRbPlus ? + GFX10_SW_64K_Z_X_1xaa_RBPLUS_PATINFO : GFX10_SW_64K_Z_X_1xaa_PATINFO; } else if (numFrag == 2) { - patInfo = m_settings.supportRbPlus ? SW_64K_Z_X_2xaa_RBPLUS_PATINFO : SW_64K_Z_X_2xaa_PATINFO; + patInfo = m_settings.supportRbPlus ? + GFX10_SW_64K_Z_X_2xaa_RBPLUS_PATINFO : GFX10_SW_64K_Z_X_2xaa_PATINFO; } else if (numFrag == 4) { - patInfo = m_settings.supportRbPlus ? SW_64K_Z_X_4xaa_RBPLUS_PATINFO : SW_64K_Z_X_4xaa_PATINFO; + patInfo = m_settings.supportRbPlus ? + GFX10_SW_64K_Z_X_4xaa_RBPLUS_PATINFO : GFX10_SW_64K_Z_X_4xaa_PATINFO; } else { ADDR_ASSERT(numFrag == 8); - patInfo = m_settings.supportRbPlus ? SW_64K_Z_X_8xaa_RBPLUS_PATINFO : SW_64K_Z_X_8xaa_PATINFO; + patInfo = m_settings.supportRbPlus ? + GFX10_SW_64K_Z_X_8xaa_RBPLUS_PATINFO : GFX10_SW_64K_Z_X_8xaa_PATINFO; } } else if (IsDisplaySwizzle(resourceType, swizzleMode)) { if (swizzleMode == ADDR_SW_64KB_D) { - patInfo = m_settings.supportRbPlus ? SW_64K_D_RBPLUS_PATINFO : SW_64K_D_PATINFO; + patInfo = m_settings.supportRbPlus ? + GFX10_SW_64K_D_RBPLUS_PATINFO : GFX10_SW_64K_D_PATINFO; } else if (swizzleMode == ADDR_SW_64KB_D_X) { - patInfo = m_settings.supportRbPlus ? SW_64K_D_X_RBPLUS_PATINFO : SW_64K_D_X_PATINFO; + patInfo = m_settings.supportRbPlus ? + GFX10_SW_64K_D_X_RBPLUS_PATINFO : GFX10_SW_64K_D_X_PATINFO; } else { ADDR_ASSERT(swizzleMode == ADDR_SW_64KB_D_T); - patInfo = m_settings.supportRbPlus ? SW_64K_D_T_RBPLUS_PATINFO : SW_64K_D_T_PATINFO; + patInfo = m_settings.supportRbPlus ? + GFX10_SW_64K_D_T_RBPLUS_PATINFO : GFX10_SW_64K_D_T_PATINFO; } } else { if (swizzleMode == ADDR_SW_64KB_S) { - patInfo = m_settings.supportRbPlus ? SW_64K_S_RBPLUS_PATINFO : SW_64K_S_PATINFO; + patInfo = m_settings.supportRbPlus ? + GFX10_SW_64K_S_RBPLUS_PATINFO : GFX10_SW_64K_S_PATINFO; } else if (swizzleMode == ADDR_SW_64KB_S_X) { - patInfo = m_settings.supportRbPlus ? SW_64K_S_X_RBPLUS_PATINFO : SW_64K_S_X_PATINFO; + patInfo = m_settings.supportRbPlus ? + GFX10_SW_64K_S_X_RBPLUS_PATINFO : GFX10_SW_64K_S_X_PATINFO; } else { ADDR_ASSERT(swizzleMode == ADDR_SW_64KB_S_T); - patInfo = m_settings.supportRbPlus ? SW_64K_S_T_RBPLUS_PATINFO : SW_64K_S_T_PATINFO; + patInfo = m_settings.supportRbPlus ? + GFX10_SW_64K_S_T_RBPLUS_PATINFO : GFX10_SW_64K_S_T_PATINFO; } } } @@ -3850,8 +4350,8 @@ ADDR_E_RETURNCODE Gfx10Lib::ComputeSurfaceAddrFromCoordMicroTiled( ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut ///< [out] output structure ) const { - ADDR2_COMPUTE_SURFACE_INFO_INPUT localIn = {0}; - ADDR2_COMPUTE_SURFACE_INFO_OUTPUT localOut = {0}; + ADDR2_COMPUTE_SURFACE_INFO_INPUT localIn = {}; + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT localOut = {}; ADDR2_MIP_INFO mipInfo[MaxMipLevels]; localIn.swizzleMode = pIn->swizzleMode; @@ -3916,8 +4416,8 @@ ADDR_E_RETURNCODE Gfx10Lib::ComputeSurfaceAddrFromCoordMacroTiled( ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut ///< [out] output structure ) const { - ADDR2_COMPUTE_SURFACE_INFO_INPUT localIn = {0}; - ADDR2_COMPUTE_SURFACE_INFO_OUTPUT localOut = {0}; + ADDR2_COMPUTE_SURFACE_INFO_INPUT localIn = {}; + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT localOut = {}; ADDR2_MIP_INFO mipInfo[MaxMipLevels]; localIn.swizzleMode = pIn->swizzleMode; @@ -4312,4 +4812,3 @@ ADDR_E_RETURNCODE Gfx10Lib::HwlComputeSurfaceInfoLinear( } // V2 } // Addr } // rocr - diff --git a/runtime/hsa-runtime/image/addrlib/src/gfx10/gfx10addrlib.h b/runtime/hsa-runtime/image/addrlib/src/gfx10/gfx10addrlib.h index 80f22b3764..542d51a437 100644 --- a/runtime/hsa-runtime/image/addrlib/src/gfx10/gfx10addrlib.h +++ b/runtime/hsa-runtime/image/addrlib/src/gfx10/gfx10addrlib.h @@ -1,28 +1,27 @@ /* - * Copyright © 2007-2019 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ +************************************************************************************************************************ +* +* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +* OTHER DEALINGS IN THE SOFTWARE +* +***********************************************************************************************************************/ /** ************************************************************************************************************************ @@ -39,10 +38,8 @@ #include "gfx10SwizzlePattern.h" namespace rocr { -namespace Addr -{ -namespace V2 -{ +namespace Addr { +namespace V2 { /** ************************************************************************************************************************ @@ -56,11 +53,12 @@ struct Gfx10ChipSettings UINT_32 reserved1 : 32; // Misc configuration bits - UINT_32 isDcn2 : 1; + UINT_32 isDcn20 : 1; // If using DCN2.0 UINT_32 supportRbPlus : 1; UINT_32 dsMipmapHtileFix : 1; UINT_32 dccUnsup3DSwDis : 1; - UINT_32 reserved2 : 28; + UINT_32 : 2; + UINT_32 reserved2 : 26; }; }; @@ -171,20 +169,32 @@ const UINT_32 Gfx10Rsrc3dThick64KBSwModeMask = Gfx10Rsrc3dThickSwModeMask & Gfx1 const UINT_32 Gfx10MsaaSwModeMask = Gfx10ZSwModeMask | Gfx10RenderSwModeMask; -const UINT_32 Dcn2NonBpp64SwModeMask = (1u << ADDR_SW_LINEAR) | - (1u << ADDR_SW_4KB_S) | - (1u << ADDR_SW_64KB_S) | - (1u << ADDR_SW_64KB_S_T) | - (1u << ADDR_SW_4KB_S_X) | - (1u << ADDR_SW_64KB_S_X) | - (1u << ADDR_SW_64KB_R_X); +const UINT_32 Dcn20NonBpp64SwModeMask = (1u << ADDR_SW_LINEAR) | + (1u << ADDR_SW_4KB_S) | + (1u << ADDR_SW_64KB_S) | + (1u << ADDR_SW_64KB_S_T) | + (1u << ADDR_SW_4KB_S_X) | + (1u << ADDR_SW_64KB_S_X) | + (1u << ADDR_SW_64KB_R_X); + +const UINT_32 Dcn20Bpp64SwModeMask = (1u << ADDR_SW_4KB_D) | + (1u << ADDR_SW_64KB_D) | + (1u << ADDR_SW_64KB_D_T) | + (1u << ADDR_SW_4KB_D_X) | + (1u << ADDR_SW_64KB_D_X) | + Dcn20NonBpp64SwModeMask; + +const UINT_32 Dcn21NonBpp64SwModeMask = (1u << ADDR_SW_LINEAR) | + (1u << ADDR_SW_64KB_S) | + (1u << ADDR_SW_64KB_S_T) | + (1u << ADDR_SW_64KB_S_X) | + (1u << ADDR_SW_64KB_R_X); + +const UINT_32 Dcn21Bpp64SwModeMask = (1u << ADDR_SW_64KB_D) | + (1u << ADDR_SW_64KB_D_T) | + (1u << ADDR_SW_64KB_D_X) | + Dcn21NonBpp64SwModeMask; -const UINT_32 Dcn2Bpp64SwModeMask = (1u << ADDR_SW_4KB_D) | - (1u << ADDR_SW_64KB_D) | - (1u << ADDR_SW_64KB_D_T) | - (1u << ADDR_SW_4KB_D_X) | - (1u << ADDR_SW_64KB_D_X) | - Dcn2NonBpp64SwModeMask; /** ************************************************************************************************************************ * @brief This class is the GFX10 specific address library @@ -262,7 +272,10 @@ protected: const ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn, ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut); - virtual ADDR_E_RETURNCODE HwlComputeDccAddrFromCoord( + virtual ADDR_E_RETURNCODE HwlSupportComputeDccAddrFromCoord( + const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn); + + virtual VOID HwlComputeDccAddrFromCoord( const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn, ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT* pOut); @@ -289,6 +302,10 @@ protected: const ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT* pIn, ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT* pOut) const; + virtual ADDR_E_RETURNCODE HwlComputeNonBlockCompressedView( + const ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_INPUT* pIn, + ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_OUTPUT* pOut) const; + virtual ADDR_E_RETURNCODE HwlGetPreferredSurfaceSetting( const ADDR2_GET_PREFERRED_SURF_SETTING_INPUT* pIn, ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT* pOut) const; @@ -316,6 +333,7 @@ protected: virtual ChipFamily HwlConvertChipFamily(UINT_32 uChipFamily, UINT_32 uChipRevision); +private: // Initialize equation table VOID InitEquationTable(); @@ -335,7 +353,6 @@ protected: const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const; -private: UINT_32 ComputeOffsetFromSwizzlePattern( const UINT_64* pPattern, UINT_32 numBits, @@ -352,32 +369,9 @@ private: ADDR_E_RETURNCODE ComputeStereoInfo( const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, - UINT_32 blkHeight, UINT_32* pAlignY, UINT_32* pRightXor) const; - Dim3d GetDccCompressBlk( - AddrResourceType resourceType, - AddrSwizzleMode swizzleMode, - UINT_32 bpp) const - { - UINT_32 index = Log2(bpp >> 3); - Dim3d compressBlkDim; - - if (IsThin(resourceType, swizzleMode)) - { - compressBlkDim.w = Block256_2d[index].w; - compressBlkDim.h = Block256_2d[index].h; - compressBlkDim.d = 1; - } - else - { - compressBlkDim = Block256_3d[index]; - } - - return compressBlkDim; - } - static void GetMipSize( UINT_32 mip0Width, UINT_32 mip0Height, @@ -493,6 +487,8 @@ private: } + UINT_32 GetValidDisplaySwizzleModes(UINT_32 bpp) const; + BOOL_32 IsValidDisplaySwizzleMode(const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const; UINT_32 GetMaxNumMipsInTail(UINT_32 blockSizeLog2, BOOL_32 isThin) const; @@ -581,6 +577,5 @@ private: } // Addr } // rocr - #endif diff --git a/runtime/hsa-runtime/image/addrlib/src/gfx11/gfx11SwizzlePattern.h b/runtime/hsa-runtime/image/addrlib/src/gfx11/gfx11SwizzlePattern.h new file mode 100644 index 0000000000..c9f92bbead --- /dev/null +++ b/runtime/hsa-runtime/image/addrlib/src/gfx11/gfx11SwizzlePattern.h @@ -0,0 +1,3056 @@ +/* +************************************************************************************************************************ +* +* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +* OTHER DEALINGS IN THE SOFTWARE +* +***********************************************************************************************************************/ + +/** +************************************************************************************************************************ +* @file gfx11SwizzlePattern.h +* @brief swizzle pattern for gfx11. +************************************************************************************************************************ +*/ + +#ifndef __GFX11_SWIZZLE_PATTERN_H__ +#define __GFX11_SWIZZLE_PATTERN_H__ + +namespace rocr { +namespace Addr { +namespace V2 { + +const ADDR_SW_PATINFO GFX11_SW_256_D_PATINFO[] = +{ + { 1, 0, 0, 0, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_256_D + { 1, 1, 0, 0, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_256_D + { 1, 2, 0, 0, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_256_D + { 1, 3, 0, 0, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_256_D + { 1, 4, 0, 0, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_256_D + { 1, 0, 0, 0, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_256_D + { 1, 1, 0, 0, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_256_D + { 1, 2, 0, 0, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_256_D + { 1, 3, 0, 0, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_256_D + { 1, 4, 0, 0, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_256_D + { 1, 0, 0, 0, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_256_D + { 1, 1, 0, 0, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_256_D + { 1, 2, 0, 0, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_256_D + { 1, 3, 0, 0, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_256_D + { 1, 4, 0, 0, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_256_D + { 1, 0, 0, 0, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_256_D + { 1, 1, 0, 0, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_256_D + { 1, 2, 0, 0, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_256_D + { 1, 3, 0, 0, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_256_D + { 1, 4, 0, 0, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_256_D + { 1, 0, 0, 0, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_256_D + { 1, 1, 0, 0, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_256_D + { 1, 2, 0, 0, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_256_D + { 1, 3, 0, 0, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_256_D + { 1, 4, 0, 0, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_256_D + { 1, 0, 0, 0, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_256_D + { 1, 1, 0, 0, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_256_D + { 1, 2, 0, 0, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_256_D + { 1, 3, 0, 0, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_256_D + { 1, 4, 0, 0, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_256_D + { 1, 0, 0, 0, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_256_D + { 1, 1, 0, 0, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_256_D + { 1, 2, 0, 0, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_256_D + { 1, 3, 0, 0, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_256_D + { 1, 4, 0, 0, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_256_D + { 1, 0, 0, 0, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_256_D + { 1, 1, 0, 0, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_256_D + { 1, 2, 0, 0, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_256_D + { 1, 3, 0, 0, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_256_D + { 1, 4, 0, 0, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_256_D + { 1, 0, 0, 0, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_256_D + { 1, 1, 0, 0, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_256_D + { 1, 2, 0, 0, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_256_D + { 1, 3, 0, 0, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_256_D + { 1, 4, 0, 0, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_256_D + { 1, 0, 0, 0, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_256_D + { 1, 1, 0, 0, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_256_D + { 1, 2, 0, 0, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_256_D + { 1, 3, 0, 0, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_256_D + { 1, 4, 0, 0, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_256_D + { 1, 0, 0, 0, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_256_D + { 1, 1, 0, 0, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_256_D + { 1, 2, 0, 0, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_256_D + { 1, 3, 0, 0, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_256_D + { 1, 4, 0, 0, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_256_D + { 1, 0, 0, 0, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_256_D + { 1, 1, 0, 0, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_256_D + { 1, 2, 0, 0, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_256_D + { 1, 3, 0, 0, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_256_D + { 1, 4, 0, 0, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_256_D + { 1, 0, 0, 0, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_256_D + { 1, 1, 0, 0, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_256_D + { 1, 2, 0, 0, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_256_D + { 1, 3, 0, 0, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_256_D + { 1, 4, 0, 0, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_256_D + { 1, 0, 0, 0, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_256_D + { 1, 1, 0, 0, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_256_D + { 1, 2, 0, 0, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_256_D + { 1, 3, 0, 0, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_256_D + { 1, 4, 0, 0, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_256_D + { 1, 0, 0, 0, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_256_D + { 1, 1, 0, 0, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_256_D + { 1, 2, 0, 0, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_256_D + { 1, 3, 0, 0, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_256_D + { 1, 4, 0, 0, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_256_D +}; + +const ADDR_SW_PATINFO GFX11_SW_4K_D_PATINFO[] = +{ + { 1, 0, 1, 0, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_4K_D + { 1, 1, 2, 0, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_4K_D + { 1, 2, 3, 0, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_4K_D + { 1, 3, 4, 0, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_4K_D + { 1, 4, 5, 0, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_4K_D + { 1, 0, 1, 0, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_4K_D + { 1, 1, 2, 0, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_4K_D + { 1, 2, 3, 0, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_4K_D + { 1, 3, 4, 0, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_4K_D + { 1, 4, 5, 0, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_4K_D + { 1, 0, 1, 0, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_4K_D + { 1, 1, 2, 0, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_4K_D + { 1, 2, 3, 0, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_4K_D + { 1, 3, 4, 0, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_4K_D + { 1, 4, 5, 0, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_4K_D + { 1, 0, 1, 0, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_4K_D + { 1, 1, 2, 0, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_4K_D + { 1, 2, 3, 0, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_4K_D + { 1, 3, 4, 0, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_4K_D + { 1, 4, 5, 0, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_4K_D + { 1, 0, 1, 0, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_4K_D + { 1, 1, 2, 0, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_4K_D + { 1, 2, 3, 0, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_4K_D + { 1, 3, 4, 0, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_4K_D + { 1, 4, 5, 0, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_4K_D + { 1, 0, 1, 0, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_4K_D + { 1, 1, 2, 0, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_4K_D + { 1, 2, 3, 0, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_4K_D + { 1, 3, 4, 0, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_4K_D + { 1, 4, 5, 0, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_4K_D + { 1, 0, 1, 0, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_4K_D + { 1, 1, 2, 0, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_4K_D + { 1, 2, 3, 0, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_4K_D + { 1, 3, 4, 0, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_4K_D + { 1, 4, 5, 0, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_4K_D + { 1, 0, 1, 0, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_4K_D + { 1, 1, 2, 0, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_4K_D + { 1, 2, 3, 0, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_4K_D + { 1, 3, 4, 0, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_4K_D + { 1, 4, 5, 0, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_4K_D + { 1, 0, 1, 0, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_4K_D + { 1, 1, 2, 0, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_4K_D + { 1, 2, 3, 0, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_4K_D + { 1, 3, 4, 0, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_4K_D + { 1, 4, 5, 0, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_4K_D + { 1, 0, 1, 0, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_4K_D + { 1, 1, 2, 0, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_4K_D + { 1, 2, 3, 0, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_4K_D + { 1, 3, 4, 0, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_4K_D + { 1, 4, 5, 0, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_4K_D + { 1, 0, 1, 0, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_4K_D + { 1, 1, 2, 0, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_4K_D + { 1, 2, 3, 0, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_4K_D + { 1, 3, 4, 0, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_4K_D + { 1, 4, 5, 0, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_4K_D + { 1, 0, 1, 0, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_4K_D + { 1, 1, 2, 0, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_4K_D + { 1, 2, 3, 0, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_4K_D + { 1, 3, 4, 0, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_4K_D + { 1, 4, 5, 0, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_4K_D + { 1, 0, 1, 0, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_4K_D + { 1, 1, 2, 0, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_4K_D + { 1, 2, 3, 0, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_4K_D + { 1, 3, 4, 0, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_4K_D + { 1, 4, 5, 0, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_4K_D + { 1, 0, 1, 0, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_4K_D + { 1, 1, 2, 0, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_4K_D + { 1, 2, 3, 0, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_4K_D + { 1, 3, 4, 0, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_4K_D + { 1, 4, 5, 0, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_4K_D + { 1, 0, 1, 0, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_4K_D + { 1, 1, 2, 0, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_4K_D + { 1, 2, 3, 0, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_4K_D + { 1, 3, 4, 0, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_4K_D + { 1, 4, 5, 0, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_4K_D +}; + +const ADDR_SW_PATINFO GFX11_SW_4K_D_X_PATINFO[] = +{ + { 1, 0, 1, 0, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_4K_D_X + { 1, 1, 2, 0, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_4K_D_X + { 1, 2, 3, 0, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_4K_D_X + { 1, 3, 4, 0, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_4K_D_X + { 1, 4, 5, 0, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_4K_D_X + { 3, 0, 6, 0, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_4K_D_X + { 3, 1, 7, 0, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_4K_D_X + { 3, 2, 8, 0, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_4K_D_X + { 3, 3, 9, 0, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_4K_D_X + { 3, 4, 10, 0, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_4K_D_X + { 3, 0, 11, 0, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_4K_D_X + { 3, 1, 12, 0, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_4K_D_X + { 3, 2, 13, 0, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_4K_D_X + { 3, 3, 14, 0, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_4K_D_X + { 3, 4, 15, 0, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_4K_D_X + { 3, 0, 16, 0, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_4K_D_X + { 3, 1, 17, 0, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_4K_D_X + { 3, 2, 18, 0, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_4K_D_X + { 3, 3, 19, 0, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_4K_D_X + { 3, 4, 20, 0, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_4K_D_X + { 3, 0, 21, 0, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_4K_D_X + { 3, 1, 22, 0, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_4K_D_X + { 3, 2, 23, 0, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_4K_D_X + { 3, 3, 24, 0, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_4K_D_X + { 3, 4, 25, 0, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_4K_D_X + { 3, 0, 26, 0, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_4K_D_X + { 3, 1, 27, 0, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_4K_D_X + { 3, 2, 28, 0, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_4K_D_X + { 3, 3, 29, 0, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_4K_D_X + { 3, 4, 30, 0, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_4K_D_X + { 3, 0, 31, 0, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_4K_D_X + { 3, 1, 32, 0, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_4K_D_X + { 3, 2, 33, 0, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_4K_D_X + { 3, 3, 34, 0, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_4K_D_X + { 3, 4, 35, 0, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_4K_D_X + { 3, 0, 36, 0, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_4K_D_X + { 3, 1, 37, 0, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_4K_D_X + { 3, 2, 38, 0, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_4K_D_X + { 3, 3, 39, 0, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_4K_D_X + { 3, 4, 40, 0, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_4K_D_X + { 3, 0, 41, 0, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_4K_D_X + { 3, 1, 42, 0, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_4K_D_X + { 3, 2, 43, 0, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_4K_D_X + { 3, 3, 44, 0, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_4K_D_X + { 3, 4, 45, 0, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_4K_D_X + { 3, 0, 46, 0, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_4K_D_X + { 3, 1, 47, 0, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_4K_D_X + { 3, 2, 48, 0, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_4K_D_X + { 3, 3, 49, 0, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_4K_D_X + { 3, 4, 50, 0, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_4K_D_X + { 3, 0, 51, 0, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_4K_D_X + { 3, 1, 52, 0, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_4K_D_X + { 3, 2, 53, 0, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_4K_D_X + { 3, 3, 54, 0, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_4K_D_X + { 3, 4, 55, 0, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_4K_D_X + { 3, 0, 56, 0, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_4K_D_X + { 3, 1, 57, 0, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_4K_D_X + { 3, 2, 58, 0, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_4K_D_X + { 3, 3, 59, 0, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_4K_D_X + { 3, 4, 60, 0, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_4K_D_X + { 3, 0, 61, 0, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_4K_D_X + { 3, 1, 62, 0, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_4K_D_X + { 3, 2, 63, 0, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_4K_D_X + { 3, 3, 64, 0, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_4K_D_X + { 3, 4, 65, 0, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_4K_D_X + { 3, 0, 51, 0, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_4K_D_X + { 3, 1, 52, 0, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_4K_D_X + { 3, 2, 53, 0, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_4K_D_X + { 3, 3, 54, 0, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_4K_D_X + { 3, 4, 55, 0, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_4K_D_X + { 3, 0, 56, 0, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_4K_D_X + { 3, 1, 57, 0, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_4K_D_X + { 3, 2, 58, 0, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_4K_D_X + { 3, 3, 59, 0, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_4K_D_X + { 3, 4, 60, 0, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_4K_D_X +}; + +const ADDR_SW_PATINFO GFX11_SW_64K_D_PATINFO[] = +{ + { 1, 0, 1, 1, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_D + { 1, 1, 2, 2, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_D + { 1, 2, 3, 3, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_D + { 1, 3, 4, 4, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_D + { 1, 4, 5, 5, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_D + { 1, 0, 1, 1, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_D + { 1, 1, 2, 2, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_D + { 1, 2, 3, 3, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_D + { 1, 3, 4, 4, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_D + { 1, 4, 5, 5, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_D + { 1, 0, 1, 1, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_D + { 1, 1, 2, 2, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_D + { 1, 2, 3, 3, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_D + { 1, 3, 4, 4, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_D + { 1, 4, 5, 5, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_D + { 1, 0, 1, 1, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_D + { 1, 1, 2, 2, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_D + { 1, 2, 3, 3, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_D + { 1, 3, 4, 4, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_D + { 1, 4, 5, 5, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_D + { 1, 0, 1, 1, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_D + { 1, 1, 2, 2, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_D + { 1, 2, 3, 3, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_D + { 1, 3, 4, 4, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_D + { 1, 4, 5, 5, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_D + { 1, 0, 1, 1, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_D + { 1, 1, 2, 2, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_D + { 1, 2, 3, 3, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_D + { 1, 3, 4, 4, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_D + { 1, 4, 5, 5, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_D + { 1, 0, 1, 1, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_D + { 1, 1, 2, 2, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_D + { 1, 2, 3, 3, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_D + { 1, 3, 4, 4, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_D + { 1, 4, 5, 5, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_D + { 1, 0, 1, 1, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_D + { 1, 1, 2, 2, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_D + { 1, 2, 3, 3, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_D + { 1, 3, 4, 4, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_D + { 1, 4, 5, 5, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_D + { 1, 0, 1, 1, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_D + { 1, 1, 2, 2, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_D + { 1, 2, 3, 3, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_D + { 1, 3, 4, 4, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_D + { 1, 4, 5, 5, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_D + { 1, 0, 1, 1, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_D + { 1, 1, 2, 2, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_D + { 1, 2, 3, 3, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_D + { 1, 3, 4, 4, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_D + { 1, 4, 5, 5, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_D + { 1, 0, 1, 1, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_D + { 1, 1, 2, 2, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_D + { 1, 2, 3, 3, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_D + { 1, 3, 4, 4, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_D + { 1, 4, 5, 5, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_D + { 1, 0, 1, 1, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_D + { 1, 1, 2, 2, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_D + { 1, 2, 3, 3, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_D + { 1, 3, 4, 4, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_D + { 1, 4, 5, 5, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_D + { 1, 0, 1, 1, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_D + { 1, 1, 2, 2, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_D + { 1, 2, 3, 3, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_D + { 1, 3, 4, 4, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_D + { 1, 4, 5, 5, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_D + { 1, 0, 1, 1, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_D + { 1, 1, 2, 2, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_D + { 1, 2, 3, 3, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_D + { 1, 3, 4, 4, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_D + { 1, 4, 5, 5, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_D + { 1, 0, 1, 1, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_D + { 1, 1, 2, 2, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_D + { 1, 2, 3, 3, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_D + { 1, 3, 4, 4, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_D + { 1, 4, 5, 5, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_D +}; + +const ADDR_SW_PATINFO GFX11_SW_64K_D_X_PATINFO[] = +{ + { 1, 0, 1, 1, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_D_X + { 1, 1, 2, 2, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_D_X + { 1, 2, 3, 3, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_D_X + { 1, 3, 4, 4, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_D_X + { 1, 4, 5, 5, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_D_X + { 3, 0, 6, 1, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_D_X + { 3, 1, 7, 2, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_D_X + { 3, 2, 8, 3, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_D_X + { 3, 3, 9, 4, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_D_X + { 3, 4, 10, 5, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_D_X + { 3, 0, 11, 1, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_D_X + { 3, 1, 12, 2, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_D_X + { 3, 2, 13, 3, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_D_X + { 3, 3, 14, 4, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_D_X + { 3, 4, 15, 5, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_D_X + { 3, 0, 16, 1, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_D_X + { 3, 1, 17, 2, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_D_X + { 3, 2, 18, 3, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_D_X + { 3, 3, 19, 4, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_D_X + { 3, 4, 20, 5, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_D_X + { 3, 0, 21, 1, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_D_X + { 3, 1, 22, 2, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_D_X + { 3, 2, 23, 3, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_D_X + { 3, 3, 24, 4, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_D_X + { 3, 4, 25, 5, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_D_X + { 3, 0, 26, 1, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_D_X + { 3, 1, 27, 2, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_D_X + { 3, 2, 28, 3, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_D_X + { 3, 3, 29, 4, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_D_X + { 3, 4, 30, 5, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_D_X + { 3, 0, 31, 1, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_D_X + { 3, 1, 32, 2, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_D_X + { 3, 2, 33, 3, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_D_X + { 3, 3, 34, 4, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_D_X + { 3, 4, 35, 5, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_D_X + { 3, 0, 36, 1, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_D_X + { 3, 1, 37, 2, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_D_X + { 3, 2, 38, 3, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_D_X + { 3, 3, 39, 4, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_D_X + { 3, 4, 40, 5, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_D_X + { 3, 0, 41, 1, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_D_X + { 3, 1, 42, 2, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_D_X + { 3, 2, 43, 3, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_D_X + { 3, 3, 44, 4, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_D_X + { 3, 4, 45, 5, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_D_X + { 3, 0, 66, 6, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_D_X + { 3, 1, 67, 7, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_D_X + { 3, 2, 68, 8, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_D_X + { 3, 3, 69, 9, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_D_X + { 3, 4, 70, 10, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_D_X + { 3, 0, 51, 1, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_D_X + { 3, 1, 52, 2, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_D_X + { 3, 2, 53, 3, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_D_X + { 3, 3, 54, 4, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_D_X + { 3, 4, 55, 5, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_D_X + { 3, 0, 71, 6, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_D_X + { 3, 1, 72, 7, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_D_X + { 3, 2, 73, 8, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_D_X + { 3, 3, 74, 9, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_D_X + { 3, 4, 75, 10, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_D_X + { 3, 0, 76, 11, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_D_X + { 3, 1, 77, 12, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_D_X + { 3, 2, 78, 13, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_D_X + { 3, 3, 79, 14, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_D_X + { 3, 4, 80, 15, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_D_X + { 3, 0, 81, 6, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_D_X + { 3, 1, 82, 7, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_D_X + { 3, 2, 83, 8, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_D_X + { 3, 3, 84, 9, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_D_X + { 3, 4, 85, 10, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_D_X + { 3, 0, 86, 11, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_D_X + { 3, 1, 87, 12, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_D_X + { 3, 2, 88, 13, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_D_X + { 3, 3, 89, 14, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_D_X + { 3, 4, 90, 15, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_D_X +}; + +const ADDR_SW_PATINFO GFX11_SW_64K_D_T_PATINFO[] = +{ + { 1, 0, 1, 1, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_D_T + { 1, 1, 2, 2, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_D_T + { 1, 2, 3, 3, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_D_T + { 1, 3, 4, 4, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_D_T + { 1, 4, 5, 5, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_D_T + { 2, 0, 91, 1, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_D_T + { 2, 1, 92, 2, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_D_T + { 2, 2, 93, 3, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_D_T + { 2, 3, 94, 4, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_D_T + { 2, 4, 95, 5, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_D_T + { 2, 0, 96, 1, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_D_T + { 2, 1, 97, 2, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_D_T + { 2, 2, 98, 3, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_D_T + { 2, 3, 99, 4, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_D_T + { 2, 4, 100, 5, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_D_T + { 2, 0, 101, 1, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_D_T + { 2, 1, 102, 2, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_D_T + { 2, 2, 103, 3, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_D_T + { 2, 3, 104, 4, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_D_T + { 2, 4, 105, 5, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_D_T + { 2, 0, 96, 1, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_D_T + { 2, 1, 97, 2, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_D_T + { 2, 2, 98, 3, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_D_T + { 2, 3, 99, 4, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_D_T + { 2, 4, 100, 5, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_D_T + { 2, 0, 101, 1, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_D_T + { 2, 1, 102, 2, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_D_T + { 2, 2, 103, 3, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_D_T + { 2, 3, 104, 4, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_D_T + { 2, 4, 105, 5, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_D_T + { 2, 0, 106, 1, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_D_T + { 2, 1, 107, 2, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_D_T + { 2, 2, 108, 3, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_D_T + { 2, 3, 109, 4, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_D_T + { 2, 4, 110, 5, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_D_T + { 2, 0, 101, 1, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_D_T + { 2, 1, 102, 2, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_D_T + { 2, 2, 103, 3, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_D_T + { 2, 3, 104, 4, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_D_T + { 2, 4, 105, 5, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_D_T + { 2, 0, 106, 1, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_D_T + { 2, 1, 107, 2, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_D_T + { 2, 2, 108, 3, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_D_T + { 2, 3, 109, 4, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_D_T + { 2, 4, 110, 5, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_D_T + { 2, 0, 111, 16, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_D_T + { 2, 1, 112, 17, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_D_T + { 2, 2, 113, 18, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_D_T + { 2, 3, 114, 19, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_D_T + { 2, 4, 115, 20, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_D_T + { 2, 0, 106, 1, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_D_T + { 2, 1, 107, 2, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_D_T + { 2, 2, 108, 3, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_D_T + { 2, 3, 109, 4, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_D_T + { 2, 4, 110, 5, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_D_T + { 2, 0, 111, 16, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_D_T + { 2, 1, 112, 17, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_D_T + { 2, 2, 113, 18, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_D_T + { 2, 3, 114, 19, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_D_T + { 2, 4, 115, 20, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_D_T + { 2, 0, 1, 21, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_D_T + { 2, 1, 2, 22, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_D_T + { 2, 2, 3, 23, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_D_T + { 2, 3, 4, 24, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_D_T + { 2, 4, 5, 25, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_D_T + { 2, 0, 111, 16, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_D_T + { 2, 1, 112, 17, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_D_T + { 2, 2, 113, 18, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_D_T + { 2, 3, 114, 19, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_D_T + { 2, 4, 115, 20, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_D_T + { 2, 0, 1, 21, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_D_T + { 2, 1, 2, 22, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_D_T + { 2, 2, 3, 23, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_D_T + { 2, 3, 4, 24, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_D_T + { 2, 4, 5, 25, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_D_T +}; + +const ADDR_SW_PATINFO GFX11_SW_256K_D_X_PATINFO[] = +{ + { 1, 0, 1, 1, 1, } , // 1 pipes (1 PKRs) 1 bpe @ SW_256K_D_X + { 1, 1, 2, 2, 2, } , // 1 pipes (1 PKRs) 2 bpe @ SW_256K_D_X + { 1, 2, 3, 3, 3, } , // 1 pipes (1 PKRs) 4 bpe @ SW_256K_D_X + { 1, 3, 4, 4, 4, } , // 1 pipes (1 PKRs) 8 bpe @ SW_256K_D_X + { 1, 4, 5, 5, 5, } , // 1 pipes (1 PKRs) 16 bpe @ SW_256K_D_X + { 3, 0, 6, 1, 1, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_256K_D_X + { 3, 1, 7, 2, 2, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_256K_D_X + { 3, 2, 8, 3, 3, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_256K_D_X + { 3, 3, 9, 4, 4, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_256K_D_X + { 3, 4, 10, 5, 5, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_256K_D_X + { 3, 0, 11, 1, 1, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_256K_D_X + { 3, 1, 12, 2, 2, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_256K_D_X + { 3, 2, 13, 3, 3, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_256K_D_X + { 3, 3, 14, 4, 4, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_256K_D_X + { 3, 4, 15, 5, 5, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_256K_D_X + { 3, 0, 16, 1, 1, } , // 8 pipes (2 PKRs) 1 bpe @ SW_256K_D_X + { 3, 1, 17, 2, 2, } , // 8 pipes (2 PKRs) 2 bpe @ SW_256K_D_X + { 3, 2, 18, 3, 3, } , // 8 pipes (2 PKRs) 4 bpe @ SW_256K_D_X + { 3, 3, 19, 4, 4, } , // 8 pipes (2 PKRs) 8 bpe @ SW_256K_D_X + { 3, 4, 20, 5, 5, } , // 8 pipes (2 PKRs) 16 bpe @ SW_256K_D_X + { 3, 0, 21, 1, 1, } , // 4 pipes (4 PKRs) 1 bpe @ SW_256K_D_X + { 3, 1, 22, 2, 2, } , // 4 pipes (4 PKRs) 2 bpe @ SW_256K_D_X + { 3, 2, 23, 3, 3, } , // 4 pipes (4 PKRs) 4 bpe @ SW_256K_D_X + { 3, 3, 24, 4, 4, } , // 4 pipes (4 PKRs) 8 bpe @ SW_256K_D_X + { 3, 4, 25, 5, 5, } , // 4 pipes (4 PKRs) 16 bpe @ SW_256K_D_X + { 3, 0, 26, 1, 1, } , // 8 pipes (4 PKRs) 1 bpe @ SW_256K_D_X + { 3, 1, 27, 2, 2, } , // 8 pipes (4 PKRs) 2 bpe @ SW_256K_D_X + { 3, 2, 28, 3, 3, } , // 8 pipes (4 PKRs) 4 bpe @ SW_256K_D_X + { 3, 3, 29, 4, 4, } , // 8 pipes (4 PKRs) 8 bpe @ SW_256K_D_X + { 3, 4, 30, 5, 5, } , // 8 pipes (4 PKRs) 16 bpe @ SW_256K_D_X + { 3, 0, 31, 1, 1, } , // 16 pipes (4 PKRs) 1 bpe @ SW_256K_D_X + { 3, 1, 32, 2, 2, } , // 16 pipes (4 PKRs) 2 bpe @ SW_256K_D_X + { 3, 2, 33, 3, 3, } , // 16 pipes (4 PKRs) 4 bpe @ SW_256K_D_X + { 3, 3, 34, 4, 4, } , // 16 pipes (4 PKRs) 8 bpe @ SW_256K_D_X + { 3, 4, 35, 5, 5, } , // 16 pipes (4 PKRs) 16 bpe @ SW_256K_D_X + { 3, 0, 36, 1, 1, } , // 8 pipes (8 PKRs) 1 bpe @ SW_256K_D_X + { 3, 1, 37, 2, 2, } , // 8 pipes (8 PKRs) 2 bpe @ SW_256K_D_X + { 3, 2, 38, 3, 3, } , // 8 pipes (8 PKRs) 4 bpe @ SW_256K_D_X + { 3, 3, 39, 4, 4, } , // 8 pipes (8 PKRs) 8 bpe @ SW_256K_D_X + { 3, 4, 40, 5, 5, } , // 8 pipes (8 PKRs) 16 bpe @ SW_256K_D_X + { 3, 0, 41, 1, 1, } , // 16 pipes (8 PKRs) 1 bpe @ SW_256K_D_X + { 3, 1, 42, 2, 2, } , // 16 pipes (8 PKRs) 2 bpe @ SW_256K_D_X + { 3, 2, 43, 3, 3, } , // 16 pipes (8 PKRs) 4 bpe @ SW_256K_D_X + { 3, 3, 44, 4, 4, } , // 16 pipes (8 PKRs) 8 bpe @ SW_256K_D_X + { 3, 4, 45, 5, 5, } , // 16 pipes (8 PKRs) 16 bpe @ SW_256K_D_X + { 3, 0, 66, 6, 1, } , // 32 pipes (8 PKRs) 1 bpe @ SW_256K_D_X + { 3, 1, 67, 7, 2, } , // 32 pipes (8 PKRs) 2 bpe @ SW_256K_D_X + { 3, 2, 68, 8, 3, } , // 32 pipes (8 PKRs) 4 bpe @ SW_256K_D_X + { 3, 3, 69, 9, 4, } , // 32 pipes (8 PKRs) 8 bpe @ SW_256K_D_X + { 3, 4, 70, 10, 5, } , // 32 pipes (8 PKRs) 16 bpe @ SW_256K_D_X + { 3, 0, 51, 1, 1, } , // 16 pipes (16 PKRs) 1 bpe @ SW_256K_D_X + { 3, 1, 52, 2, 2, } , // 16 pipes (16 PKRs) 2 bpe @ SW_256K_D_X + { 3, 2, 53, 3, 3, } , // 16 pipes (16 PKRs) 4 bpe @ SW_256K_D_X + { 3, 3, 54, 4, 4, } , // 16 pipes (16 PKRs) 8 bpe @ SW_256K_D_X + { 3, 4, 55, 5, 5, } , // 16 pipes (16 PKRs) 16 bpe @ SW_256K_D_X + { 3, 0, 71, 6, 1, } , // 32 pipes (16 PKRs) 1 bpe @ SW_256K_D_X + { 3, 1, 72, 7, 2, } , // 32 pipes (16 PKRs) 2 bpe @ SW_256K_D_X + { 3, 2, 73, 8, 3, } , // 32 pipes (16 PKRs) 4 bpe @ SW_256K_D_X + { 3, 3, 74, 9, 4, } , // 32 pipes (16 PKRs) 8 bpe @ SW_256K_D_X + { 3, 4, 75, 10, 5, } , // 32 pipes (16 PKRs) 16 bpe @ SW_256K_D_X + { 3, 0, 76, 11, 1, } , // 64 pipes (16 PKRs) 1 bpe @ SW_256K_D_X + { 3, 1, 77, 12, 2, } , // 64 pipes (16 PKRs) 2 bpe @ SW_256K_D_X + { 3, 2, 78, 13, 3, } , // 64 pipes (16 PKRs) 4 bpe @ SW_256K_D_X + { 3, 3, 79, 14, 4, } , // 64 pipes (16 PKRs) 8 bpe @ SW_256K_D_X + { 3, 4, 80, 15, 5, } , // 64 pipes (16 PKRs) 16 bpe @ SW_256K_D_X + { 3, 0, 81, 6, 1, } , // 32 pipes (32 PKRs) 1 bpe @ SW_256K_D_X + { 3, 1, 82, 7, 2, } , // 32 pipes (32 PKRs) 2 bpe @ SW_256K_D_X + { 3, 2, 83, 8, 3, } , // 32 pipes (32 PKRs) 4 bpe @ SW_256K_D_X + { 3, 3, 84, 9, 4, } , // 32 pipes (32 PKRs) 8 bpe @ SW_256K_D_X + { 3, 4, 85, 10, 5, } , // 32 pipes (32 PKRs) 16 bpe @ SW_256K_D_X + { 3, 0, 86, 11, 1, } , // 64 pipes (32 PKRs) 1 bpe @ SW_256K_D_X + { 3, 1, 87, 12, 2, } , // 64 pipes (32 PKRs) 2 bpe @ SW_256K_D_X + { 3, 2, 88, 13, 3, } , // 64 pipes (32 PKRs) 4 bpe @ SW_256K_D_X + { 3, 3, 89, 14, 4, } , // 64 pipes (32 PKRs) 8 bpe @ SW_256K_D_X + { 3, 4, 90, 15, 5, } , // 64 pipes (32 PKRs) 16 bpe @ SW_256K_D_X +}; + +const ADDR_SW_PATINFO GFX11_SW_64K_ZR_X_1xaa_PATINFO[] = +{ + { 2, 0, 116, 26, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa + { 2, 1, 117, 22, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa + { 2, 2, 118, 27, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa + { 2, 3, 119, 28, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa + { 2, 4, 120, 29, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 0, 121, 30, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 1, 122, 31, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 2, 123, 32, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 3, 124, 33, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 4, 125, 34, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 0, 126, 35, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 1, 127, 36, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 2, 128, 37, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 3, 129, 38, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 4, 130, 39, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 0, 131, 40, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 1, 132, 41, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 2, 133, 42, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 3, 134, 43, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 4, 135, 44, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 0, 136, 45, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 1, 137, 46, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 2, 138, 47, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 3, 139, 48, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 4, 140, 49, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 0, 141, 40, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 1, 142, 50, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 2, 143, 51, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 3, 144, 52, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 4, 145, 53, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 0, 146, 54, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 1, 146, 55, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 2, 146, 56, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 3, 146, 57, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 4, 146, 58, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 0, 147, 59, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 1, 148, 60, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 2, 149, 61, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 3, 150, 62, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 4, 151, 63, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 0, 152, 54, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 1, 152, 64, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 2, 152, 56, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 3, 153, 57, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 4, 153, 65, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 0, 152, 66, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 1, 152, 67, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 2, 152, 68, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 3, 153, 69, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 4, 153, 70, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 0, 154, 71, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 1, 154, 72, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 2, 154, 73, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 3, 155, 74, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 4, 156, 75, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 0, 154, 76, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 1, 154, 77, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 2, 154, 78, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 3, 155, 79, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 4, 156, 80, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 0, 154, 81, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 1, 154, 82, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 2, 154, 83, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 3, 155, 84, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 4, 156, 85, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 0, 157, 86, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 1, 157, 87, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 2, 157, 88, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 3, 158, 89, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 4, 159, 90, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 0, 157, 91, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 1, 157, 92, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 2, 157, 93, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 3, 158, 94, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa + { 3, 4, 159, 95, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa +}; + +const ADDR_SW_PATINFO GFX11_SW_64K_ZR_X_2xaa_PATINFO[] = +{ + { 2, 5, 160, 96, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa + { 2, 6, 118, 27, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa + { 2, 7, 161, 97, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa + { 2, 8, 119, 98, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa + { 2, 9, 162, 99, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 5, 163, 100, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 6, 123, 32, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 7, 123, 101, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 8, 164, 102, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 9, 125, 103, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 5, 127, 104, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 6, 128, 37, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 7, 128, 105, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 8, 165, 106, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 9, 130, 107, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 5, 132, 108, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 6, 133, 51, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 7, 133, 109, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 8, 135, 110, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 9, 135, 111, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 5, 137, 112, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 6, 138, 47, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 7, 138, 113, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 8, 139, 114, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 9, 140, 115, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 5, 142, 108, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 6, 143, 51, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 7, 143, 109, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 8, 144, 116, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 9, 145, 111, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 5, 146, 117, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 6, 146, 118, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 7, 146, 119, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 8, 166, 120, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 9, 167, 121, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 5, 148, 122, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 6, 149, 61, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 7, 149, 123, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 8, 151, 124, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 9, 168, 125, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 5, 152, 55, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 6, 152, 56, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 7, 152, 126, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 8, 153, 127, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 9, 169, 127, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 5, 152, 77, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 6, 152, 78, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 7, 152, 128, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 8, 153, 80, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 9, 169, 80, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 5, 154, 72, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 6, 154, 73, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 7, 154, 129, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 8, 156, 130, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 9, 170, 130, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 5, 154, 77, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 6, 154, 78, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 7, 154, 128, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 8, 156, 131, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 9, 170, 131, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 5, 154, 132, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 6, 154, 83, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 7, 154, 133, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 8, 156, 134, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 9, 170, 134, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 5, 157, 135, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 6, 157, 88, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 7, 157, 136, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 8, 159, 90, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 9, 171, 90, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 5, 157, 137, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 6, 157, 93, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 7, 157, 138, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 8, 159, 95, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa + { 3, 9, 171, 95, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa +}; + +const ADDR_SW_PATINFO GFX11_SW_64K_ZR_X_4xaa_PATINFO[] = +{ + { 2, 10, 118, 27, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa + { 2, 11, 118, 139, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa + { 2, 12, 118, 140, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa + { 2, 13, 119, 141, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa + { 2, 14, 120, 142, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 10, 123, 32, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 11, 172, 143, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 12, 123, 144, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 13, 124, 145, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 14, 125, 146, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 10, 128, 37, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 11, 128, 147, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 12, 128, 148, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 13, 129, 149, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 14, 130, 150, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 10, 133, 42, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 11, 133, 151, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 12, 133, 152, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 13, 134, 153, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 14, 173, 154, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 10, 138, 47, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 11, 138, 155, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 12, 138, 156, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 13, 174, 157, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 14, 175, 158, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 10, 143, 51, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 11, 143, 159, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 12, 143, 160, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 13, 145, 161, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 14, 176, 162, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 10, 146, 56, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 11, 146, 163, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 12, 146, 164, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 13, 167, 165, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 14, 177, 166, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 10, 149, 61, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 11, 149, 167, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 12, 149, 168, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 13, 178, 169, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 14, 179, 170, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 10, 152, 56, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 11, 152, 163, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 12, 152, 171, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 13, 180, 171, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 14, 181, 171, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 10, 152, 68, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 11, 152, 172, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 12, 152, 173, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 13, 180, 173, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 14, 181, 173, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 10, 154, 73, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 11, 154, 174, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 12, 154, 130, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 13, 182, 130, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 14, 183, 130, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 10, 154, 78, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 11, 154, 172, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 12, 154, 131, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 13, 182, 131, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 14, 183, 131, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 10, 154, 83, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 11, 154, 133, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 12, 154, 134, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 13, 182, 134, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 14, 183, 134, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 10, 157, 88, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 11, 157, 175, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 12, 157, 90, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 13, 184, 90, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 14, 185, 90, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 10, 157, 93, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 11, 157, 176, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 12, 157, 95, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 13, 184, 95, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa + { 3, 14, 185, 95, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa +}; + +const ADDR_SW_PATINFO GFX11_SW_64K_ZR_X_8xaa_PATINFO[] = +{ + { 2, 15, 161, 97, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa + { 2, 16, 118, 140, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 17, 186, 177, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 18, 187, 178, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 19, 162, 179, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 15, 123, 101, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 16, 123, 144, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 17, 188, 180, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 18, 189, 181, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 19, 190, 182, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 15, 128, 105, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 16, 128, 148, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 17, 128, 183, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 18, 165, 184, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 19, 191, 185, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 15, 133, 109, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 16, 133, 186, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 17, 133, 187, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 18, 192, 188, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 19, 193, 189, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 15, 138, 113, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 16, 138, 156, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 17, 138, 190, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 18, 194, 191, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 19, 195, 192, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 15, 143, 109, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 16, 143, 160, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 17, 143, 187, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 18, 196, 193, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 19, 197, 194, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 15, 146, 126, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 16, 146, 164, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 17, 198, 195, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 18, 199, 196, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 19, 200, 197, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 15, 149, 123, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 16, 149, 168, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 17, 149, 198, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 18, 179, 170, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 19, 201, 170, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 15, 152, 126, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 16, 152, 171, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 17, 202, 199, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 18, 181, 171, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 19, 203, 171, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 15, 152, 128, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 16, 152, 173, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 17, 202, 200, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 18, 181, 173, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 19, 203, 201, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 15, 154, 129, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 16, 154, 130, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 17, 204, 202, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 18, 183, 130, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 19, 205, 130, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 15, 154, 128, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 16, 154, 131, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 17, 206, 203, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 18, 183, 131, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 19, 205, 131, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 15, 154, 133, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 16, 154, 134, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 17, 206, 204, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 18, 183, 134, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 19, 205, 134, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 15, 157, 136, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 16, 157, 90, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 17, 207, 205, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 18, 185, 90, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 19, 208, 90, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 15, 157, 138, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 16, 157, 95, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 17, 171, 95, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 18, 185, 95, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa + { 3, 19, 208, 95, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa +}; + +const ADDR_SW_PATINFO GFX11_SW_256K_ZR_X_1xaa_PATINFO[] = +{ + { 2, 0, 116, 26, 6, } , // 1 pipes (1 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa + { 2, 1, 117, 22, 2, } , // 1 pipes (1 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa + { 2, 2, 118, 27, 7, } , // 1 pipes (1 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa + { 2, 3, 119, 28, 4, } , // 1 pipes (1 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa + { 2, 4, 120, 29, 8, } , // 1 pipes (1 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 0, 121, 30, 6, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 1, 122, 31, 9, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 2, 123, 32, 7, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 3, 124, 33, 10, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 4, 125, 34, 8, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 0, 126, 35, 6, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 1, 127, 36, 9, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 2, 128, 37, 7, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 3, 129, 38, 10, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 4, 130, 39, 8, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 0, 131, 206, 11, } , // 8 pipes (2 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 1, 132, 207, 12, } , // 8 pipes (2 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 2, 133, 208, 13, } , // 8 pipes (2 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 3, 134, 209, 14, } , // 8 pipes (2 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 4, 135, 210, 15, } , // 8 pipes (2 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 0, 136, 211, 16, } , // 4 pipes (4 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 1, 137, 35, 17, } , // 4 pipes (4 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 2, 138, 212, 18, } , // 4 pipes (4 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 3, 139, 213, 19, } , // 4 pipes (4 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 4, 140, 214, 20, } , // 4 pipes (4 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 0, 141, 206, 11, } , // 8 pipes (4 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 1, 142, 215, 21, } , // 8 pipes (4 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 2, 143, 216, 13, } , // 8 pipes (4 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 3, 144, 217, 22, } , // 8 pipes (4 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 4, 145, 218, 15, } , // 8 pipes (4 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 0, 146, 219, 23, } , // 16 pipes (4 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 1, 146, 220, 24, } , // 16 pipes (4 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 2, 146, 221, 25, } , // 16 pipes (4 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 3, 146, 222, 26, } , // 16 pipes (4 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 4, 146, 223, 27, } , // 16 pipes (4 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 0, 147, 224, 28, } , // 8 pipes (8 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 1, 148, 225, 29, } , // 8 pipes (8 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 2, 149, 226, 30, } , // 8 pipes (8 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 3, 150, 227, 31, } , // 8 pipes (8 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 4, 151, 228, 32, } , // 8 pipes (8 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 0, 152, 219, 23, } , // 16 pipes (8 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 1, 152, 229, 33, } , // 16 pipes (8 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 2, 152, 221, 25, } , // 16 pipes (8 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 3, 153, 222, 34, } , // 16 pipes (8 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 4, 153, 230, 27, } , // 16 pipes (8 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 0, 152, 231, 23, } , // 32 pipes (8 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 1, 152, 232, 33, } , // 32 pipes (8 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 2, 152, 233, 25, } , // 32 pipes (8 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 3, 153, 234, 34, } , // 32 pipes (8 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 4, 153, 235, 35, } , // 32 pipes (8 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 0, 154, 236, 36, } , // 16 pipes (16 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 1, 154, 237, 37, } , // 16 pipes (16 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 2, 154, 238, 38, } , // 16 pipes (16 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 3, 155, 239, 39, } , // 16 pipes (16 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 4, 155, 240, 40, } , // 16 pipes (16 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 0, 154, 241, 23, } , // 32 pipes (16 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 1, 154, 242, 24, } , // 32 pipes (16 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 2, 154, 243, 25, } , // 32 pipes (16 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 3, 155, 244, 41, } , // 32 pipes (16 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 4, 155, 245, 42, } , // 32 pipes (16 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 0, 154, 81, 23, } , // 64 pipes (16 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 1, 154, 82, 24, } , // 64 pipes (16 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 2, 154, 83, 25, } , // 64 pipes (16 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 3, 155, 246, 43, } , // 64 pipes (16 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 4, 155, 247, 44, } , // 64 pipes (16 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 0, 157, 248, 45, } , // 32 pipes (32 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 1, 157, 249, 46, } , // 32 pipes (32 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 2, 157, 250, 47, } , // 32 pipes (32 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 3, 209, 251, 48, } , // 32 pipes (32 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 4, 209, 252, 49, } , // 32 pipes (32 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 0, 157, 91, 23, } , // 64 pipes (32 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 1, 157, 92, 33, } , // 64 pipes (32 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 2, 157, 93, 25, } , // 64 pipes (32 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 3, 209, 253, 43, } , // 64 pipes (32 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa + { 3, 4, 209, 254, 50, } , // 64 pipes (32 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa +}; + +const ADDR_SW_PATINFO GFX11_SW_256K_ZR_X_2xaa_PATINFO[] = +{ + { 2, 5, 160, 96, 51, } , // 1 pipes (1 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa + { 2, 6, 118, 27, 7, } , // 1 pipes (1 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa + { 2, 7, 210, 255, 52, } , // 1 pipes (1 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa + { 2, 8, 120, 29, 8, } , // 1 pipes (1 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa + { 2, 9, 211, 256, 53, } , // 1 pipes (1 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 5, 163, 100, 51, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 6, 123, 32, 7, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 7, 212, 257, 52, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 8, 125, 34, 8, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 9, 213, 258, 53, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 5, 127, 104, 51, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 6, 128, 37, 7, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 7, 129, 259, 52, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 8, 130, 39, 8, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 9, 214, 260, 53, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 5, 132, 261, 54, } , // 8 pipes (2 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 6, 133, 216, 13, } , // 8 pipes (2 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 7, 134, 262, 55, } , // 8 pipes (2 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 8, 135, 263, 15, } , // 8 pipes (2 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 9, 215, 264, 56, } , // 8 pipes (2 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 5, 137, 265, 16, } , // 4 pipes (4 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 6, 138, 212, 18, } , // 4 pipes (4 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 7, 139, 266, 18, } , // 4 pipes (4 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 8, 140, 214, 20, } , // 4 pipes (4 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 9, 216, 267, 20, } , // 4 pipes (4 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 5, 142, 261, 54, } , // 8 pipes (4 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 6, 143, 216, 13, } , // 8 pipes (4 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 7, 144, 262, 55, } , // 8 pipes (4 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 8, 145, 218, 15, } , // 8 pipes (4 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 9, 217, 268, 56, } , // 8 pipes (4 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 5, 146, 269, 57, } , // 16 pipes (4 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 6, 146, 270, 25, } , // 16 pipes (4 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 7, 146, 271, 41, } , // 16 pipes (4 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 8, 146, 272, 58, } , // 16 pipes (4 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 9, 146, 273, 59, } , // 16 pipes (4 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 5, 148, 274, 60, } , // 8 pipes (8 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 6, 149, 226, 30, } , // 8 pipes (8 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 7, 218, 275, 61, } , // 8 pipes (8 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 8, 151, 228, 32, } , // 8 pipes (8 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 9, 219, 276, 62, } , // 8 pipes (8 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 5, 152, 277, 57, } , // 16 pipes (8 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 6, 152, 221, 25, } , // 16 pipes (8 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 7, 152, 278, 41, } , // 16 pipes (8 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 8, 153, 230, 27, } , // 16 pipes (8 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 9, 153, 279, 63, } , // 16 pipes (8 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 5, 152, 280, 57, } , // 32 pipes (8 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 6, 152, 243, 25, } , // 32 pipes (8 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 7, 152, 281, 41, } , // 32 pipes (8 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 8, 153, 282, 64, } , // 32 pipes (8 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 9, 153, 283, 65, } , // 32 pipes (8 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 5, 154, 284, 37, } , // 16 pipes (16 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 6, 154, 238, 38, } , // 16 pipes (16 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 7, 154, 239, 66, } , // 16 pipes (16 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 8, 155, 240, 40, } , // 16 pipes (16 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 9, 155, 273, 67, } , // 16 pipes (16 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 5, 154, 280, 57, } , // 32 pipes (16 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 6, 154, 243, 25, } , // 32 pipes (16 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 7, 154, 281, 41, } , // 32 pipes (16 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 8, 155, 245, 42, } , // 32 pipes (16 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 9, 155, 285, 68, } , // 32 pipes (16 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 5, 154, 82, 24, } , // 64 pipes (16 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 6, 154, 83, 25, } , // 64 pipes (16 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 7, 154, 286, 43, } , // 64 pipes (16 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 8, 155, 247, 44, } , // 64 pipes (16 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 9, 155, 287, 69, } , // 64 pipes (16 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 5, 157, 288, 70, } , // 32 pipes (32 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 6, 157, 250, 47, } , // 32 pipes (32 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 7, 157, 289, 71, } , // 32 pipes (32 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 8, 158, 290, 72, } , // 32 pipes (32 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 9, 158, 291, 73, } , // 32 pipes (32 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 5, 157, 92, 24, } , // 64 pipes (32 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 6, 157, 93, 25, } , // 64 pipes (32 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 7, 157, 292, 43, } , // 64 pipes (32 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 8, 158, 293, 50, } , // 64 pipes (32 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa + { 3, 9, 158, 294, 74, } , // 64 pipes (32 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa +}; + +const ADDR_SW_PATINFO GFX11_SW_256K_ZR_X_4xaa_PATINFO[] = +{ + { 2, 10, 118, 27, 7, } , // 1 pipes (1 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa + { 2, 11, 119, 28, 4, } , // 1 pipes (1 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa + { 2, 12, 120, 29, 8, } , // 1 pipes (1 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa + { 2, 13, 220, 295, 75, } , // 1 pipes (1 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa + { 2, 14, 221, 296, 76, } , // 1 pipes (1 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 10, 123, 32, 7, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 11, 124, 33, 10, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 12, 125, 34, 8, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 13, 222, 297, 77, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 14, 223, 298, 76, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 10, 128, 37, 7, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 11, 129, 38, 10, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 12, 130, 39, 8, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 13, 224, 299, 77, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 14, 225, 300, 76, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 10, 133, 208, 13, } , // 8 pipes (2 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 11, 134, 209, 14, } , // 8 pipes (2 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 12, 135, 210, 15, } , // 8 pipes (2 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 13, 215, 301, 78, } , // 8 pipes (2 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 14, 226, 302, 79, } , // 8 pipes (2 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 10, 138, 212, 18, } , // 4 pipes (4 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 11, 139, 213, 19, } , // 4 pipes (4 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 12, 140, 214, 20, } , // 4 pipes (4 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 13, 216, 299, 80, } , // 4 pipes (4 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 14, 227, 303, 81, } , // 4 pipes (4 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 10, 143, 216, 13, } , // 8 pipes (4 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 11, 144, 217, 22, } , // 8 pipes (4 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 12, 145, 218, 15, } , // 8 pipes (4 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 13, 217, 304, 82, } , // 8 pipes (4 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 14, 228, 305, 83, } , // 8 pipes (4 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 10, 146, 221, 25, } , // 16 pipes (4 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 11, 146, 222, 26, } , // 16 pipes (4 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 12, 146, 223, 27, } , // 16 pipes (4 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 13, 146, 306, 84, } , // 16 pipes (4 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 14, 146, 307, 85, } , // 16 pipes (4 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 10, 149, 226, 30, } , // 8 pipes (8 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 11, 218, 227, 86, } , // 8 pipes (8 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 12, 168, 228, 87, } , // 8 pipes (8 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 13, 219, 301, 62, } , // 8 pipes (8 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 14, 229, 308, 88, } , // 8 pipes (8 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 10, 152, 221, 25, } , // 16 pipes (8 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 11, 152, 222, 34, } , // 16 pipes (8 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 12, 152, 230, 27, } , // 16 pipes (8 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 13, 153, 306, 84, } , // 16 pipes (8 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 14, 153, 309, 89, } , // 16 pipes (8 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 10, 152, 233, 25, } , // 32 pipes (8 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 11, 152, 234, 34, } , // 32 pipes (8 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 12, 152, 235, 35, } , // 32 pipes (8 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 13, 153, 310, 90, } , // 32 pipes (8 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 14, 153, 311, 91, } , // 32 pipes (8 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 10, 154, 238, 38, } , // 16 pipes (16 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 11, 154, 239, 66, } , // 16 pipes (16 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 12, 154, 240, 92, } , // 16 pipes (16 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 13, 156, 312, 93, } , // 16 pipes (16 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 14, 156, 313, 94, } , // 16 pipes (16 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 10, 154, 243, 25, } , // 32 pipes (16 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 11, 154, 281, 41, } , // 32 pipes (16 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 12, 154, 314, 42, } , // 32 pipes (16 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 13, 156, 315, 95, } , // 32 pipes (16 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 14, 156, 316, 96, } , // 32 pipes (16 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 10, 154, 83, 25, } , // 64 pipes (16 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 11, 154, 286, 43, } , // 64 pipes (16 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 12, 154, 317, 44, } , // 64 pipes (16 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 13, 156, 318, 97, } , // 64 pipes (16 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 14, 156, 319, 68, } , // 64 pipes (16 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 10, 157, 250, 47, } , // 32 pipes (32 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 11, 157, 289, 71, } , // 32 pipes (32 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 12, 157, 320, 98, } , // 32 pipes (32 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 13, 159, 321, 99, } , // 32 pipes (32 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 14, 159, 322, 100, } , // 32 pipes (32 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 10, 157, 93, 25, } , // 64 pipes (32 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 11, 157, 292, 43, } , // 64 pipes (32 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 12, 157, 323, 50, } , // 64 pipes (32 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 13, 159, 324, 74, } , // 64 pipes (32 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa + { 3, 14, 159, 325, 101, } , // 64 pipes (32 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa +}; + +const ADDR_SW_PATINFO GFX11_SW_256K_ZR_X_8xaa_PATINFO[] = +{ + { 2, 15, 210, 255, 52, } , // 1 pipes (1 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa + { 2, 16, 120, 29, 8, } , // 1 pipes (1 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa + { 2, 17, 211, 256, 53, } , // 1 pipes (1 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa + { 2, 18, 221, 296, 76, } , // 1 pipes (1 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa + { 2, 19, 230, 326, 102, } , // 1 pipes (1 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 15, 212, 257, 52, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 16, 125, 34, 8, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 17, 213, 258, 53, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 18, 223, 298, 76, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 19, 231, 327, 103, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 15, 129, 259, 52, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 16, 130, 39, 8, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 17, 214, 260, 53, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 18, 225, 300, 76, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 19, 232, 328, 103, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 15, 134, 262, 55, } , // 8 pipes (2 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 16, 135, 263, 15, } , // 8 pipes (2 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 17, 215, 264, 56, } , // 8 pipes (2 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 18, 226, 302, 104, } , // 8 pipes (2 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 19, 233, 329, 105, } , // 8 pipes (2 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 15, 139, 266, 18, } , // 4 pipes (4 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 16, 140, 214, 20, } , // 4 pipes (4 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 17, 216, 267, 20, } , // 4 pipes (4 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 18, 227, 303, 81, } , // 4 pipes (4 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 19, 234, 330, 106, } , // 4 pipes (4 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 15, 144, 262, 55, } , // 8 pipes (4 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 16, 145, 218, 15, } , // 8 pipes (4 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 17, 217, 268, 56, } , // 8 pipes (4 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 18, 228, 305, 83, } , // 8 pipes (4 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 19, 235, 331, 107, } , // 8 pipes (4 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 15, 146, 271, 41, } , // 16 pipes (4 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 16, 146, 272, 58, } , // 16 pipes (4 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 17, 146, 273, 59, } , // 16 pipes (4 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 18, 236, 332, 108, } , // 16 pipes (4 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 19, 237, 333, 109, } , // 16 pipes (4 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 15, 218, 275, 61, } , // 8 pipes (8 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 16, 168, 228, 87, } , // 8 pipes (8 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 17, 238, 276, 110, } , // 8 pipes (8 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 18, 239, 308, 111, } , // 8 pipes (8 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 19, 239, 334, 112, } , // 8 pipes (8 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 15, 152, 278, 41, } , // 16 pipes (8 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 16, 152, 230, 27, } , // 16 pipes (8 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 17, 152, 279, 63, } , // 16 pipes (8 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 18, 240, 309, 89, } , // 16 pipes (8 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 19, 241, 335, 113, } , // 16 pipes (8 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 15, 152, 281, 41, } , // 32 pipes (8 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 16, 152, 282, 64, } , // 32 pipes (8 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 17, 152, 283, 65, } , // 32 pipes (8 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 18, 240, 311, 91, } , // 32 pipes (8 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 19, 241, 336, 89, } , // 32 pipes (8 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 15, 154, 239, 66, } , // 16 pipes (16 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 16, 154, 240, 92, } , // 16 pipes (16 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 17, 154, 273, 63, } , // 16 pipes (16 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 18, 242, 313, 94, } , // 16 pipes (16 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 19, 243, 337, 114, } , // 16 pipes (16 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 15, 154, 281, 41, } , // 32 pipes (16 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 16, 154, 314, 42, } , // 32 pipes (16 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 17, 154, 338, 68, } , // 32 pipes (16 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 18, 242, 316, 96, } , // 32 pipes (16 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 19, 243, 339, 115, } , // 32 pipes (16 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 15, 154, 286, 43, } , // 64 pipes (16 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 16, 154, 317, 44, } , // 64 pipes (16 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 17, 154, 340, 68, } , // 64 pipes (16 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 18, 242, 341, 116, } , // 64 pipes (16 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 19, 243, 342, 115, } , // 64 pipes (16 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 15, 157, 289, 71, } , // 32 pipes (32 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 16, 157, 320, 98, } , // 32 pipes (32 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 17, 157, 343, 117, } , // 32 pipes (32 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 18, 244, 322, 100, } , // 32 pipes (32 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 19, 245, 344, 118, } , // 32 pipes (32 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 15, 157, 292, 43, } , // 64 pipes (32 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 16, 157, 323, 50, } , // 64 pipes (32 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 17, 157, 345, 119, } , // 64 pipes (32 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 18, 244, 325, 101, } , // 64 pipes (32 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa + { 3, 19, 245, 346, 120, } , // 64 pipes (32 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa +}; + +const ADDR_SW_PATINFO GFX11_SW_4K_S3_PATINFO[] = +{ + { 1, 20, 246, 0, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_4K_S3 + { 1, 21, 247, 0, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_4K_S3 + { 1, 22, 248, 0, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_4K_S3 + { 1, 23, 249, 0, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_4K_S3 + { 1, 24, 250, 0, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_4K_S3 + { 1, 20, 246, 0, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_4K_S3 + { 1, 21, 247, 0, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_4K_S3 + { 1, 22, 248, 0, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_4K_S3 + { 1, 23, 249, 0, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_4K_S3 + { 1, 24, 250, 0, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_4K_S3 + { 1, 20, 246, 0, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_4K_S3 + { 1, 21, 247, 0, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_4K_S3 + { 1, 22, 248, 0, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_4K_S3 + { 1, 23, 249, 0, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_4K_S3 + { 1, 24, 250, 0, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_4K_S3 + { 1, 20, 246, 0, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_4K_S3 + { 1, 21, 247, 0, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_4K_S3 + { 1, 22, 248, 0, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_4K_S3 + { 1, 23, 249, 0, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_4K_S3 + { 1, 24, 250, 0, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_4K_S3 + { 1, 20, 246, 0, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_4K_S3 + { 1, 21, 247, 0, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_4K_S3 + { 1, 22, 248, 0, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_4K_S3 + { 1, 23, 249, 0, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_4K_S3 + { 1, 24, 250, 0, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_4K_S3 + { 1, 20, 246, 0, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_4K_S3 + { 1, 21, 247, 0, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_4K_S3 + { 1, 22, 248, 0, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_4K_S3 + { 1, 23, 249, 0, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_4K_S3 + { 1, 24, 250, 0, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_4K_S3 + { 1, 20, 246, 0, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_4K_S3 + { 1, 21, 247, 0, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_4K_S3 + { 1, 22, 248, 0, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_4K_S3 + { 1, 23, 249, 0, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_4K_S3 + { 1, 24, 250, 0, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_4K_S3 + { 1, 20, 246, 0, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_4K_S3 + { 1, 21, 247, 0, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_4K_S3 + { 1, 22, 248, 0, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_4K_S3 + { 1, 23, 249, 0, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_4K_S3 + { 1, 24, 250, 0, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_4K_S3 + { 1, 20, 246, 0, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_4K_S3 + { 1, 21, 247, 0, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_4K_S3 + { 1, 22, 248, 0, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_4K_S3 + { 1, 23, 249, 0, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_4K_S3 + { 1, 24, 250, 0, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_4K_S3 + { 1, 20, 246, 0, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_4K_S3 + { 1, 21, 247, 0, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_4K_S3 + { 1, 22, 248, 0, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_4K_S3 + { 1, 23, 249, 0, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_4K_S3 + { 1, 24, 250, 0, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_4K_S3 + { 1, 20, 246, 0, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_4K_S3 + { 1, 21, 247, 0, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_4K_S3 + { 1, 22, 248, 0, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_4K_S3 + { 1, 23, 249, 0, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_4K_S3 + { 1, 24, 250, 0, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_4K_S3 + { 1, 20, 246, 0, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_4K_S3 + { 1, 21, 247, 0, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_4K_S3 + { 1, 22, 248, 0, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_4K_S3 + { 1, 23, 249, 0, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_4K_S3 + { 1, 24, 250, 0, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_4K_S3 + { 1, 20, 246, 0, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_4K_S3 + { 1, 21, 247, 0, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_4K_S3 + { 1, 22, 248, 0, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_4K_S3 + { 1, 23, 249, 0, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_4K_S3 + { 1, 24, 250, 0, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_4K_S3 + { 1, 20, 246, 0, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_4K_S3 + { 1, 21, 247, 0, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_4K_S3 + { 1, 22, 248, 0, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_4K_S3 + { 1, 23, 249, 0, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_4K_S3 + { 1, 24, 250, 0, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_4K_S3 + { 1, 20, 246, 0, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_4K_S3 + { 1, 21, 247, 0, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_4K_S3 + { 1, 22, 248, 0, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_4K_S3 + { 1, 23, 249, 0, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_4K_S3 + { 1, 24, 250, 0, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_4K_S3 +}; + +const ADDR_SW_PATINFO GFX11_SW_4K_S3_X_PATINFO[] = +{ + { 1, 20, 246, 0, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_4K_S3_X + { 1, 21, 247, 0, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_4K_S3_X + { 1, 22, 248, 0, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_4K_S3_X + { 1, 23, 249, 0, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_4K_S3_X + { 1, 24, 250, 0, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_4K_S3_X + { 3, 20, 251, 0, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_4K_S3_X + { 3, 21, 252, 0, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_4K_S3_X + { 3, 22, 253, 0, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_4K_S3_X + { 3, 23, 254, 0, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_4K_S3_X + { 3, 24, 255, 0, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_4K_S3_X + { 3, 20, 256, 0, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_4K_S3_X + { 3, 21, 257, 0, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_4K_S3_X + { 3, 22, 258, 0, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_4K_S3_X + { 3, 23, 259, 0, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_4K_S3_X + { 3, 24, 260, 0, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_4K_S3_X + { 3, 20, 261, 0, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_4K_S3_X + { 3, 21, 262, 0, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_4K_S3_X + { 3, 22, 263, 0, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_4K_S3_X + { 3, 23, 264, 0, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_4K_S3_X + { 3, 24, 265, 0, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_4K_S3_X + { 3, 20, 256, 0, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_4K_S3_X + { 3, 21, 257, 0, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_4K_S3_X + { 3, 22, 258, 0, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_4K_S3_X + { 3, 23, 259, 0, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_4K_S3_X + { 3, 24, 260, 0, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_4K_S3_X + { 3, 20, 261, 0, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_4K_S3_X + { 3, 21, 262, 0, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_4K_S3_X + { 3, 22, 263, 0, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_4K_S3_X + { 3, 23, 264, 0, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_4K_S3_X + { 3, 24, 265, 0, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_4K_S3_X + { 3, 20, 266, 0, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_4K_S3_X + { 3, 21, 267, 0, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_4K_S3_X + { 3, 22, 268, 0, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_4K_S3_X + { 3, 23, 269, 0, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_4K_S3_X + { 3, 24, 270, 0, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_4K_S3_X + { 3, 20, 261, 0, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_4K_S3_X + { 3, 21, 262, 0, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_4K_S3_X + { 3, 22, 263, 0, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_4K_S3_X + { 3, 23, 264, 0, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_4K_S3_X + { 3, 24, 265, 0, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_4K_S3_X + { 3, 20, 266, 0, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_4K_S3_X + { 3, 21, 267, 0, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_4K_S3_X + { 3, 22, 268, 0, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_4K_S3_X + { 3, 23, 269, 0, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_4K_S3_X + { 3, 24, 270, 0, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_4K_S3_X + { 3, 20, 266, 0, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_4K_S3_X + { 3, 21, 267, 0, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_4K_S3_X + { 3, 22, 268, 0, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_4K_S3_X + { 3, 23, 269, 0, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_4K_S3_X + { 3, 24, 270, 0, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_4K_S3_X + { 3, 20, 266, 0, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_4K_S3_X + { 3, 21, 267, 0, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_4K_S3_X + { 3, 22, 268, 0, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_4K_S3_X + { 3, 23, 269, 0, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_4K_S3_X + { 3, 24, 270, 0, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_4K_S3_X + { 3, 20, 266, 0, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_4K_S3_X + { 3, 21, 267, 0, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_4K_S3_X + { 3, 22, 268, 0, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_4K_S3_X + { 3, 23, 269, 0, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_4K_S3_X + { 3, 24, 270, 0, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_4K_S3_X + { 3, 20, 266, 0, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_4K_S3_X + { 3, 21, 267, 0, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_4K_S3_X + { 3, 22, 268, 0, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_4K_S3_X + { 3, 23, 269, 0, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_4K_S3_X + { 3, 24, 270, 0, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_4K_S3_X + { 3, 20, 266, 0, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_4K_S3_X + { 3, 21, 267, 0, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_4K_S3_X + { 3, 22, 268, 0, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_4K_S3_X + { 3, 23, 269, 0, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_4K_S3_X + { 3, 24, 270, 0, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_4K_S3_X + { 3, 20, 266, 0, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_4K_S3_X + { 3, 21, 267, 0, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_4K_S3_X + { 3, 22, 268, 0, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_4K_S3_X + { 3, 23, 269, 0, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_4K_S3_X + { 3, 24, 270, 0, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_4K_S3_X +}; + +const ADDR_SW_PATINFO GFX11_SW_64K_S3_PATINFO[] = +{ + { 1, 20, 246, 347, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_S3 + { 1, 21, 247, 348, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_S3 + { 1, 22, 248, 349, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_S3 + { 1, 23, 249, 350, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_S3 + { 1, 24, 250, 351, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_S3 + { 1, 20, 246, 347, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_S3 + { 1, 21, 247, 348, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_S3 + { 1, 22, 248, 349, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_S3 + { 1, 23, 249, 350, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_S3 + { 1, 24, 250, 351, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_S3 + { 1, 20, 246, 347, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_S3 + { 1, 21, 247, 348, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_S3 + { 1, 22, 248, 349, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_S3 + { 1, 23, 249, 350, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_S3 + { 1, 24, 250, 351, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_S3 + { 1, 20, 246, 347, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_S3 + { 1, 21, 247, 348, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_S3 + { 1, 22, 248, 349, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_S3 + { 1, 23, 249, 350, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_S3 + { 1, 24, 250, 351, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_S3 + { 1, 20, 246, 347, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_S3 + { 1, 21, 247, 348, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_S3 + { 1, 22, 248, 349, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_S3 + { 1, 23, 249, 350, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_S3 + { 1, 24, 250, 351, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_S3 + { 1, 20, 246, 347, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_S3 + { 1, 21, 247, 348, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_S3 + { 1, 22, 248, 349, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_S3 + { 1, 23, 249, 350, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_S3 + { 1, 24, 250, 351, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_S3 + { 1, 20, 246, 347, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_S3 + { 1, 21, 247, 348, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_S3 + { 1, 22, 248, 349, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_S3 + { 1, 23, 249, 350, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_S3 + { 1, 24, 250, 351, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_S3 + { 1, 20, 246, 347, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_S3 + { 1, 21, 247, 348, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_S3 + { 1, 22, 248, 349, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_S3 + { 1, 23, 249, 350, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_S3 + { 1, 24, 250, 351, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_S3 + { 1, 20, 246, 347, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_S3 + { 1, 21, 247, 348, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_S3 + { 1, 22, 248, 349, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_S3 + { 1, 23, 249, 350, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_S3 + { 1, 24, 250, 351, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_S3 + { 1, 20, 246, 347, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_S3 + { 1, 21, 247, 348, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_S3 + { 1, 22, 248, 349, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_S3 + { 1, 23, 249, 350, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_S3 + { 1, 24, 250, 351, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_S3 + { 1, 20, 246, 347, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_S3 + { 1, 21, 247, 348, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_S3 + { 1, 22, 248, 349, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_S3 + { 1, 23, 249, 350, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_S3 + { 1, 24, 250, 351, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_S3 + { 1, 20, 246, 347, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_S3 + { 1, 21, 247, 348, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_S3 + { 1, 22, 248, 349, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_S3 + { 1, 23, 249, 350, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_S3 + { 1, 24, 250, 351, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_S3 + { 1, 20, 246, 347, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_S3 + { 1, 21, 247, 348, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_S3 + { 1, 22, 248, 349, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_S3 + { 1, 23, 249, 350, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_S3 + { 1, 24, 250, 351, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_S3 + { 1, 20, 246, 347, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_S3 + { 1, 21, 247, 348, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_S3 + { 1, 22, 248, 349, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_S3 + { 1, 23, 249, 350, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_S3 + { 1, 24, 250, 351, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_S3 + { 1, 20, 246, 347, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_S3 + { 1, 21, 247, 348, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_S3 + { 1, 22, 248, 349, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_S3 + { 1, 23, 249, 350, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_S3 + { 1, 24, 250, 351, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_S3 +}; + +const ADDR_SW_PATINFO GFX11_SW_64K_S3_X_PATINFO[] = +{ + { 1, 20, 246, 347, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_S3_X + { 1, 21, 247, 348, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_S3_X + { 1, 22, 248, 349, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_S3_X + { 1, 23, 249, 350, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_S3_X + { 1, 24, 250, 351, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_S3_X + { 3, 20, 251, 347, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_S3_X + { 3, 21, 252, 348, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_S3_X + { 3, 22, 253, 349, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_S3_X + { 3, 23, 254, 350, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_S3_X + { 3, 24, 255, 351, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_S3_X + { 3, 20, 256, 347, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_S3_X + { 3, 21, 257, 348, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_S3_X + { 3, 22, 258, 349, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_S3_X + { 3, 23, 259, 350, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_S3_X + { 3, 24, 260, 351, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_S3_X + { 3, 20, 261, 347, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_S3_X + { 3, 21, 262, 348, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_S3_X + { 3, 22, 263, 349, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_S3_X + { 3, 23, 264, 350, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_S3_X + { 3, 24, 265, 351, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_S3_X + { 3, 20, 256, 347, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_S3_X + { 3, 21, 257, 348, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_S3_X + { 3, 22, 258, 349, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_S3_X + { 3, 23, 259, 350, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_S3_X + { 3, 24, 260, 351, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_S3_X + { 3, 20, 261, 347, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_S3_X + { 3, 21, 262, 348, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_S3_X + { 3, 22, 263, 349, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_S3_X + { 3, 23, 264, 350, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_S3_X + { 3, 24, 265, 351, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_S3_X + { 3, 20, 266, 347, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_S3_X + { 3, 21, 267, 348, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_S3_X + { 3, 22, 268, 349, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_S3_X + { 3, 23, 269, 350, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_S3_X + { 3, 24, 270, 351, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_S3_X + { 3, 20, 261, 347, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_S3_X + { 3, 21, 262, 348, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_S3_X + { 3, 22, 263, 349, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_S3_X + { 3, 23, 264, 350, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_S3_X + { 3, 24, 265, 351, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_S3_X + { 3, 20, 266, 347, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_S3_X + { 3, 21, 267, 348, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_S3_X + { 3, 22, 268, 349, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_S3_X + { 3, 23, 269, 350, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_S3_X + { 3, 24, 270, 351, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_S3_X + { 3, 20, 271, 352, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_S3_X + { 3, 21, 272, 353, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_S3_X + { 3, 22, 273, 354, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_S3_X + { 3, 23, 274, 355, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_S3_X + { 3, 24, 275, 356, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_S3_X + { 3, 20, 266, 347, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_S3_X + { 3, 21, 267, 348, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_S3_X + { 3, 22, 268, 349, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_S3_X + { 3, 23, 269, 350, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_S3_X + { 3, 24, 270, 351, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_S3_X + { 3, 20, 271, 352, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_S3_X + { 3, 21, 272, 353, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_S3_X + { 3, 22, 273, 354, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_S3_X + { 3, 23, 274, 355, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_S3_X + { 3, 24, 275, 356, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_S3_X + { 3, 20, 276, 357, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_S3_X + { 3, 21, 277, 358, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_S3_X + { 3, 22, 278, 359, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_S3_X + { 3, 23, 279, 360, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_S3_X + { 3, 24, 280, 361, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_S3_X + { 3, 20, 271, 352, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_S3_X + { 3, 21, 272, 353, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_S3_X + { 3, 22, 273, 354, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_S3_X + { 3, 23, 274, 355, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_S3_X + { 3, 24, 275, 356, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_S3_X + { 3, 20, 276, 357, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_S3_X + { 3, 21, 277, 358, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_S3_X + { 3, 22, 278, 359, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_S3_X + { 3, 23, 279, 360, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_S3_X + { 3, 24, 280, 361, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_S3_X +}; + +const ADDR_SW_PATINFO GFX11_SW_64K_S3_T_PATINFO[] = +{ + { 1, 20, 246, 347, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_S3_T + { 1, 21, 247, 348, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_S3_T + { 1, 22, 248, 349, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_S3_T + { 1, 23, 249, 350, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_S3_T + { 1, 24, 250, 351, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_S3_T + { 3, 20, 251, 347, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_S3_T + { 3, 21, 252, 348, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_S3_T + { 3, 22, 253, 349, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_S3_T + { 3, 23, 254, 350, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_S3_T + { 3, 24, 255, 351, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_S3_T + { 3, 20, 256, 347, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_S3_T + { 3, 21, 257, 348, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_S3_T + { 3, 22, 258, 349, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_S3_T + { 3, 23, 259, 350, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_S3_T + { 3, 24, 260, 351, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_S3_T + { 3, 20, 281, 347, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_S3_T + { 3, 21, 282, 348, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_S3_T + { 3, 22, 283, 349, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_S3_T + { 3, 23, 284, 350, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_S3_T + { 3, 24, 285, 351, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_S3_T + { 3, 20, 256, 347, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_S3_T + { 3, 21, 257, 348, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_S3_T + { 3, 22, 258, 349, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_S3_T + { 3, 23, 259, 350, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_S3_T + { 3, 24, 260, 351, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_S3_T + { 3, 20, 281, 347, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_S3_T + { 3, 21, 282, 348, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_S3_T + { 3, 22, 283, 349, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_S3_T + { 3, 23, 284, 350, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_S3_T + { 3, 24, 285, 351, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_S3_T + { 3, 20, 286, 347, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_S3_T + { 3, 21, 287, 348, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_S3_T + { 3, 22, 288, 349, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_S3_T + { 3, 23, 289, 350, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_S3_T + { 3, 24, 290, 351, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_S3_T + { 3, 20, 281, 347, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_S3_T + { 3, 21, 282, 348, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_S3_T + { 3, 22, 283, 349, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_S3_T + { 3, 23, 284, 350, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_S3_T + { 3, 24, 285, 351, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_S3_T + { 3, 20, 286, 347, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_S3_T + { 3, 21, 287, 348, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_S3_T + { 3, 22, 288, 349, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_S3_T + { 3, 23, 289, 350, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_S3_T + { 3, 24, 290, 351, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_S3_T + { 3, 20, 291, 352, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_S3_T + { 3, 21, 292, 353, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_S3_T + { 3, 22, 293, 354, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_S3_T + { 3, 23, 294, 355, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_S3_T + { 3, 24, 295, 356, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_S3_T + { 3, 20, 286, 347, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_S3_T + { 3, 21, 287, 348, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_S3_T + { 3, 22, 288, 349, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_S3_T + { 3, 23, 289, 350, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_S3_T + { 3, 24, 290, 351, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_S3_T + { 3, 20, 291, 352, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_S3_T + { 3, 21, 292, 353, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_S3_T + { 3, 22, 293, 354, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_S3_T + { 3, 23, 294, 355, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_S3_T + { 3, 24, 295, 356, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_S3_T + { 3, 20, 246, 362, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_S3_T + { 3, 21, 247, 363, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_S3_T + { 3, 22, 248, 364, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_S3_T + { 3, 23, 249, 365, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_S3_T + { 3, 24, 250, 366, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_S3_T + { 3, 20, 291, 352, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_S3_T + { 3, 21, 292, 353, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_S3_T + { 3, 22, 293, 354, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_S3_T + { 3, 23, 294, 355, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_S3_T + { 3, 24, 295, 356, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_S3_T + { 3, 20, 246, 362, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_S3_T + { 3, 21, 247, 363, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_S3_T + { 3, 22, 248, 364, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_S3_T + { 3, 23, 249, 365, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_S3_T + { 3, 24, 250, 366, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_S3_T +}; + +const ADDR_SW_PATINFO GFX11_SW_256K_S3_X_PATINFO[] = +{ + { 1, 20, 246, 347, 121, } , // 1 pipes (1 PKRs) 1 bpe @ SW_256K_S3_X + { 1, 21, 247, 348, 121, } , // 1 pipes (1 PKRs) 2 bpe @ SW_256K_S3_X + { 1, 22, 248, 349, 122, } , // 1 pipes (1 PKRs) 4 bpe @ SW_256K_S3_X + { 1, 23, 249, 350, 123, } , // 1 pipes (1 PKRs) 8 bpe @ SW_256K_S3_X + { 1, 24, 250, 351, 123, } , // 1 pipes (1 PKRs) 16 bpe @ SW_256K_S3_X + { 3, 20, 251, 347, 121, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_256K_S3_X + { 3, 21, 252, 348, 121, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_256K_S3_X + { 3, 22, 253, 349, 122, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_256K_S3_X + { 3, 23, 254, 350, 123, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_256K_S3_X + { 3, 24, 255, 351, 123, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_256K_S3_X + { 3, 20, 256, 347, 121, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_256K_S3_X + { 3, 21, 257, 348, 121, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_256K_S3_X + { 3, 22, 258, 349, 122, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_256K_S3_X + { 3, 23, 259, 350, 123, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_256K_S3_X + { 3, 24, 260, 351, 123, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_256K_S3_X + { 3, 20, 261, 347, 121, } , // 8 pipes (2 PKRs) 1 bpe @ SW_256K_S3_X + { 3, 21, 262, 348, 121, } , // 8 pipes (2 PKRs) 2 bpe @ SW_256K_S3_X + { 3, 22, 263, 349, 122, } , // 8 pipes (2 PKRs) 4 bpe @ SW_256K_S3_X + { 3, 23, 264, 350, 123, } , // 8 pipes (2 PKRs) 8 bpe @ SW_256K_S3_X + { 3, 24, 265, 351, 123, } , // 8 pipes (2 PKRs) 16 bpe @ SW_256K_S3_X + { 3, 20, 256, 347, 121, } , // 4 pipes (4 PKRs) 1 bpe @ SW_256K_S3_X + { 3, 21, 257, 348, 121, } , // 4 pipes (4 PKRs) 2 bpe @ SW_256K_S3_X + { 3, 22, 258, 349, 122, } , // 4 pipes (4 PKRs) 4 bpe @ SW_256K_S3_X + { 3, 23, 259, 350, 123, } , // 4 pipes (4 PKRs) 8 bpe @ SW_256K_S3_X + { 3, 24, 260, 351, 123, } , // 4 pipes (4 PKRs) 16 bpe @ SW_256K_S3_X + { 3, 20, 261, 347, 121, } , // 8 pipes (4 PKRs) 1 bpe @ SW_256K_S3_X + { 3, 21, 262, 348, 121, } , // 8 pipes (4 PKRs) 2 bpe @ SW_256K_S3_X + { 3, 22, 263, 349, 122, } , // 8 pipes (4 PKRs) 4 bpe @ SW_256K_S3_X + { 3, 23, 264, 350, 123, } , // 8 pipes (4 PKRs) 8 bpe @ SW_256K_S3_X + { 3, 24, 265, 351, 123, } , // 8 pipes (4 PKRs) 16 bpe @ SW_256K_S3_X + { 3, 20, 266, 347, 121, } , // 16 pipes (4 PKRs) 1 bpe @ SW_256K_S3_X + { 3, 21, 267, 348, 121, } , // 16 pipes (4 PKRs) 2 bpe @ SW_256K_S3_X + { 3, 22, 268, 349, 122, } , // 16 pipes (4 PKRs) 4 bpe @ SW_256K_S3_X + { 3, 23, 269, 350, 123, } , // 16 pipes (4 PKRs) 8 bpe @ SW_256K_S3_X + { 3, 24, 270, 351, 123, } , // 16 pipes (4 PKRs) 16 bpe @ SW_256K_S3_X + { 3, 20, 261, 347, 121, } , // 8 pipes (8 PKRs) 1 bpe @ SW_256K_S3_X + { 3, 21, 262, 348, 121, } , // 8 pipes (8 PKRs) 2 bpe @ SW_256K_S3_X + { 3, 22, 263, 349, 122, } , // 8 pipes (8 PKRs) 4 bpe @ SW_256K_S3_X + { 3, 23, 264, 350, 123, } , // 8 pipes (8 PKRs) 8 bpe @ SW_256K_S3_X + { 3, 24, 265, 351, 123, } , // 8 pipes (8 PKRs) 16 bpe @ SW_256K_S3_X + { 3, 20, 266, 347, 121, } , // 16 pipes (8 PKRs) 1 bpe @ SW_256K_S3_X + { 3, 21, 267, 348, 121, } , // 16 pipes (8 PKRs) 2 bpe @ SW_256K_S3_X + { 3, 22, 268, 349, 122, } , // 16 pipes (8 PKRs) 4 bpe @ SW_256K_S3_X + { 3, 23, 269, 350, 123, } , // 16 pipes (8 PKRs) 8 bpe @ SW_256K_S3_X + { 3, 24, 270, 351, 123, } , // 16 pipes (8 PKRs) 16 bpe @ SW_256K_S3_X + { 3, 20, 271, 352, 121, } , // 32 pipes (8 PKRs) 1 bpe @ SW_256K_S3_X + { 3, 21, 272, 353, 121, } , // 32 pipes (8 PKRs) 2 bpe @ SW_256K_S3_X + { 3, 22, 273, 354, 122, } , // 32 pipes (8 PKRs) 4 bpe @ SW_256K_S3_X + { 3, 23, 274, 355, 123, } , // 32 pipes (8 PKRs) 8 bpe @ SW_256K_S3_X + { 3, 24, 275, 356, 123, } , // 32 pipes (8 PKRs) 16 bpe @ SW_256K_S3_X + { 3, 20, 266, 347, 121, } , // 16 pipes (16 PKRs) 1 bpe @ SW_256K_S3_X + { 3, 21, 267, 348, 121, } , // 16 pipes (16 PKRs) 2 bpe @ SW_256K_S3_X + { 3, 22, 268, 349, 122, } , // 16 pipes (16 PKRs) 4 bpe @ SW_256K_S3_X + { 3, 23, 269, 350, 123, } , // 16 pipes (16 PKRs) 8 bpe @ SW_256K_S3_X + { 3, 24, 270, 351, 123, } , // 16 pipes (16 PKRs) 16 bpe @ SW_256K_S3_X + { 3, 20, 271, 352, 121, } , // 32 pipes (16 PKRs) 1 bpe @ SW_256K_S3_X + { 3, 21, 272, 353, 121, } , // 32 pipes (16 PKRs) 2 bpe @ SW_256K_S3_X + { 3, 22, 273, 354, 122, } , // 32 pipes (16 PKRs) 4 bpe @ SW_256K_S3_X + { 3, 23, 274, 355, 123, } , // 32 pipes (16 PKRs) 8 bpe @ SW_256K_S3_X + { 3, 24, 275, 356, 123, } , // 32 pipes (16 PKRs) 16 bpe @ SW_256K_S3_X + { 3, 20, 276, 357, 121, } , // 64 pipes (16 PKRs) 1 bpe @ SW_256K_S3_X + { 3, 21, 277, 358, 121, } , // 64 pipes (16 PKRs) 2 bpe @ SW_256K_S3_X + { 3, 22, 278, 359, 122, } , // 64 pipes (16 PKRs) 4 bpe @ SW_256K_S3_X + { 3, 23, 279, 360, 123, } , // 64 pipes (16 PKRs) 8 bpe @ SW_256K_S3_X + { 3, 24, 280, 361, 123, } , // 64 pipes (16 PKRs) 16 bpe @ SW_256K_S3_X + { 3, 20, 271, 352, 121, } , // 32 pipes (32 PKRs) 1 bpe @ SW_256K_S3_X + { 3, 21, 272, 353, 121, } , // 32 pipes (32 PKRs) 2 bpe @ SW_256K_S3_X + { 3, 22, 273, 354, 122, } , // 32 pipes (32 PKRs) 4 bpe @ SW_256K_S3_X + { 3, 23, 274, 355, 123, } , // 32 pipes (32 PKRs) 8 bpe @ SW_256K_S3_X + { 3, 24, 275, 356, 123, } , // 32 pipes (32 PKRs) 16 bpe @ SW_256K_S3_X + { 3, 20, 276, 357, 121, } , // 64 pipes (32 PKRs) 1 bpe @ SW_256K_S3_X + { 3, 21, 277, 358, 121, } , // 64 pipes (32 PKRs) 2 bpe @ SW_256K_S3_X + { 3, 22, 278, 359, 122, } , // 64 pipes (32 PKRs) 4 bpe @ SW_256K_S3_X + { 3, 23, 279, 360, 123, } , // 64 pipes (32 PKRs) 8 bpe @ SW_256K_S3_X + { 3, 24, 280, 361, 123, } , // 64 pipes (32 PKRs) 16 bpe @ SW_256K_S3_X +}; + +const ADDR_SW_PATINFO GFX11_SW_64K_D3_X_PATINFO[] = +{ + { 1, 20, 246, 347, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_D3_X + { 1, 21, 247, 348, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_D3_X + { 1, 22, 248, 349, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_D3_X + { 1, 23, 249, 350, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_D3_X + { 1, 24, 250, 351, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_D3_X + { 2, 20, 296, 367, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_D3_X + { 2, 21, 296, 368, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_D3_X + { 2, 22, 297, 369, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_D3_X + { 2, 23, 298, 351, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_D3_X + { 3, 24, 299, 351, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_D3_X + { 3, 20, 300, 370, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_D3_X + { 3, 21, 300, 371, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_D3_X + { 3, 22, 301, 372, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_D3_X + { 4, 23, 302, 373, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_D3_X + { 4, 24, 303, 373, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_D3_X + { 3, 20, 304, 370, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_D3_X + { 3, 21, 304, 371, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_D3_X + { 3, 22, 305, 372, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_D3_X + { 4, 23, 306, 373, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_D3_X + { 4, 24, 307, 373, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_D3_X + { 3, 20, 308, 374, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_D3_X + { 3, 21, 309, 375, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_D3_X + { 3, 22, 310, 376, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_D3_X + { 4, 23, 311, 377, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_D3_X + { 4, 24, 312, 378, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_D3_X + { 3, 20, 313, 379, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_D3_X + { 3, 21, 314, 371, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_D3_X + { 3, 22, 315, 372, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_D3_X + { 4, 23, 316, 373, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_D3_X + { 4, 24, 317, 373, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_D3_X + { 3, 20, 318, 380, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_D3_X + { 3, 21, 319, 371, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_D3_X + { 3, 22, 320, 372, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_D3_X + { 4, 23, 321, 373, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_D3_X + { 4, 24, 322, 373, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_D3_X + { 3, 20, 323, 381, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_D3_X + { 3, 21, 323, 382, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_D3_X + { 3, 22, 323, 383, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_D3_X + { 4, 23, 324, 384, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_D3_X + { 4, 24, 325, 384, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_D3_X + { 3, 20, 326, 379, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_D3_X + { 3, 21, 327, 371, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_D3_X + { 3, 22, 328, 372, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_D3_X + { 4, 23, 329, 373, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_D3_X + { 4, 24, 330, 373, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_D3_X + { 3, 20, 326, 385, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_D3_X + { 3, 21, 331, 386, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_D3_X + { 3, 22, 331, 387, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_D3_X + { 4, 23, 332, 388, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_D3_X + { 4, 24, 333, 388, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_D3_X + { 3, 20, 334, 389, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_D3_X + { 3, 21, 335, 390, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_D3_X + { 3, 22, 336, 391, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_D3_X + { 4, 23, 337, 392, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_D3_X + { 4, 24, 338, 392, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_D3_X + { 3, 20, 334, 393, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_D3_X + { 3, 21, 335, 394, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_D3_X + { 3, 22, 336, 395, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_D3_X + { 4, 23, 337, 396, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_D3_X + { 4, 24, 338, 396, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_D3_X + { 3, 20, 334, 397, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_D3_X + { 3, 21, 339, 398, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_D3_X + { 3, 22, 339, 399, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_D3_X + { 4, 23, 340, 400, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_D3_X + { 4, 24, 341, 400, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_D3_X + { 3, 20, 342, 401, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_D3_X + { 3, 21, 343, 402, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_D3_X + { 3, 22, 344, 403, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_D3_X + { 4, 23, 345, 404, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_D3_X + { 4, 24, 346, 404, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_D3_X + { 3, 20, 342, 405, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_D3_X + { 3, 21, 343, 406, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_D3_X + { 3, 22, 344, 407, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_D3_X + { 4, 23, 345, 408, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_D3_X + { 4, 24, 346, 408, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_D3_X +}; + + +const UINT_64 GFX11_SW_PATTERN_NIBBLE01[][8] = +{ + {X0, X1, Y0, X2, Y1, Y2, X3, Y3, }, // 0 + {0, X0, Y0, X1, Y1, X2, Y2, X3, }, // 1 + {0, 0, X0, Y0, X1, Y1, X2, Y2, }, // 2 + {0, 0, 0, X0, Y0, X1, X2, Y1, }, // 3 + {0, 0, 0, 0, X0, Y0, X1, Y1, }, // 4 + {S0, X0, Y0, X1, Y1, X2, Y2, X3, }, // 5 + {0, S0, X0, Y0, X1, Y1, X2, Y2, }, // 6 + {0, 0, S0, X0, Y0, X1, Y1, X2, }, // 7 + {0, 0, 0, S0, X0, Y0, X1, Y1, }, // 8 + {0, 0, 0, 0, S0, X0, Y0, X1, }, // 9 + {S0, S1, X0, Y0, X1, Y1, X2, Y2, }, // 10 + {0, S0, S1, X0, Y0, X1, Y1, X2, }, // 11 + {0, 0, S0, S1, X0, Y0, X1, Y1, }, // 12 + {0, 0, 0, S0, S1, X0, Y0, X1, }, // 13 + {0, 0, 0, 0, S0, S1, X0, Y0, }, // 14 + {S0, S1, S2, X0, Y0, X1, Y1, X2, }, // 15 + {0, S0, S1, S2, X0, Y0, X1, Y1, }, // 16 + {0, 0, S0, S1, S2, X0, Y0, X1, }, // 17 + {0, 0, 0, S0, S1, S2, X0, Y0, }, // 18 + {0, 0, 0, 0, S0, S1, S2, X0, }, // 19 + {X0, X1, Z0, Y0, Y1, Z1, X2, Z2, }, // 20 + {0, X0, Z0, Y0, X1, Z1, Y1, Z2, }, // 21 + {0, 0, X0, Y0, X1, Z0, Y1, Z1, }, // 22 + {0, 0, 0, X0, Y0, Z0, X1, Z1, }, // 23 + {0, 0, 0, 0, X0, Z0, Y0, Z1, }, // 24 +}; + +const UINT_64 GFX11_SW_PATTERN_NIBBLE2[][4] = +{ + {0, 0, 0, 0, }, // 0 + {Y4, X4, Y5, X5, }, // 1 + {Y3, X4, Y4, X5, }, // 2 + {Y3, X3, Y4, X4, }, // 3 + {Y2, X3, Y3, X4, }, // 4 + {Y2, X2, Y3, X3, }, // 5 + {Z0^X4^Y4, X4, Y5, X5, }, // 6 + {Z0^Y3^X4, X4, Y4, X5, }, // 7 + {Z0^X3^Y3, X3, Y4, X4, }, // 8 + {Z0^Y2^X3, X3, Y3, X4, }, // 9 + {Z0^X2^Y2, X2, Y3, X3, }, // 10 + {Y4^X5, Z0^X4^Y5, Y5, X5, }, // 11 + {Y3^X5, Z0^X4^Y4, Y4, X5, }, // 12 + {Y3^X4, Z0^X3^Y4, Y4, X4, }, // 13 + {Y2^X4, Z0^X3^Y3, Y3, X4, }, // 14 + {Y2^X3, Z0^X2^Y3, Y3, X3, }, // 15 + {Y4^X6, X4^Y6, Z0^X5^Y5, X5, }, // 16 + {Y3^X6, X4^Y5, Z0^Y4^X5, X5, }, // 17 + {Y3^X5, X3^Y5, Z0^X4^Y4, X4, }, // 18 + {Y2^X5, X3^Y4, Z0^Y3^X4, X4, }, // 19 + {Y2^X4, X2^Y4, Z0^X3^Y3, X3, }, // 20 + {Z1^Y4^X5, Z0^X4^Y5, Y5, X5, }, // 21 + {Z1^Y3^X5, Z0^X4^Y4, Y4, X5, }, // 22 + {Z1^Y3^X4, Z0^X3^Y4, Y4, X4, }, // 23 + {Z1^Y2^X4, Z0^X3^Y3, Y3, X4, }, // 24 + {Z1^Y2^X3, Z0^X2^Y3, Y3, X3, }, // 25 + {Y4^X6, Z1^X4^Y6, Z0^X5^Y5, X5, }, // 26 + {Y3^X6, Z1^X4^Y5, Z0^Y4^X5, X5, }, // 27 + {Y3^X5, Z1^X3^Y5, Z0^X4^Y4, X4, }, // 28 + {Y2^X5, Z1^X3^Y4, Z0^Y3^X4, X4, }, // 29 + {Y2^X4, Z1^X2^Y4, Z0^X3^Y3, X3, }, // 30 + {Y4^X7, X4^Y7, Z1^Y5^X6, Z0^X5^Y6, }, // 31 + {Y3^X7, X4^Y6, Z1^Y4^X6, Z0^X5^Y5, }, // 32 + {Y3^X6, X3^Y6, Z1^Y4^X5, Z0^X4^Y5, }, // 33 + {Y2^X6, X3^Y5, Z1^Y3^X5, Z0^X4^Y4, }, // 34 + {Y2^X5, X2^Y5, Z1^Y3^X4, Z0^X3^Y4, }, // 35 + {Z2^Y4^X6, Z1^X4^Y6, Z0^X5^Y5, X5, }, // 36 + {Z2^Y3^X6, Z1^X4^Y5, Z0^Y4^X5, X5, }, // 37 + {Z2^Y3^X5, Z1^X3^Y5, Z0^X4^Y4, X4, }, // 38 + {Y2^Z2^X5, Z1^X3^Y4, Z0^Y3^X4, X4, }, // 39 + {Y2^Z2^X4, Z1^X2^Y4, Z0^X3^Y3, X3, }, // 40 + {Y4^X7, Z2^X4^Y7, Z1^Y5^X6, Z0^X5^Y6, }, // 41 + {Y3^X7, Z2^X4^Y6, Z1^Y4^X6, Z0^X5^Y5, }, // 42 + {Y3^X6, Z2^X3^Y6, Z1^Y4^X5, Z0^X4^Y5, }, // 43 + {Y2^X6, Z2^X3^Y5, Z1^Y3^X5, Z0^X4^Y4, }, // 44 + {Y2^X5, X2^Z2^Y5, Z1^Y3^X4, Z0^X3^Y4, }, // 45 + {Y4^X7, X4^Y7, Z2^Y5^X6, Z1^X5^Y6, }, // 46 + {Y3^X7, X4^Y6, Z2^Y4^X6, Z1^X5^Y5, }, // 47 + {Y3^X6, X3^Y6, Z2^Y4^X5, Z1^X4^Y5, }, // 48 + {Y2^X6, X3^Y5, Z2^Y3^X5, Z1^X4^Y4, }, // 49 + {Y2^X5, X2^Y5, Z2^Y3^X4, Z1^X3^Y4, }, // 50 + {Z3^Y4^X7, Z2^X4^Y7, Z1^Y5^X6, Z0^X5^Y6, }, // 51 + {Y3^Z3^X7, Z2^X4^Y6, Z1^Y4^X6, Z0^X5^Y5, }, // 52 + {Y3^Z3^X6, Z2^X3^Y6, Z1^Y4^X5, Z0^X4^Y5, }, // 53 + {Y2^Z3^X6, Z2^X3^Y5, Z1^Y3^X5, Z0^X4^Y4, }, // 54 + {Y2^Z3^X5, X2^Z2^Y5, Z1^Y3^X4, Z0^X3^Y4, }, // 55 + {Y4^X7, Z3^X4^Y7, Z2^Y5^X6, Z1^X5^Y6, }, // 56 + {Y3^X7, Z3^X4^Y6, Z2^Y4^X6, Z1^X5^Y5, }, // 57 + {Y3^X6, X3^Z3^Y6, Z2^Y4^X5, Z1^X4^Y5, }, // 58 + {Y2^X6, X3^Z3^Y5, Z2^Y3^X5, Z1^X4^Y4, }, // 59 + {Y2^X5, X2^Z3^Y5, Z2^Y3^X4, Z1^X3^Y4, }, // 60 + {Y4^X7, X4^Y7, Z3^Y5^X6, Z2^X5^Y6, }, // 61 + {Y3^X7, X4^Y6, Z3^Y4^X6, Z2^X5^Y5, }, // 62 + {Y3^X6, X3^Y6, Z3^Y4^X5, Z2^X4^Y5, }, // 63 + {Y2^X6, X3^Y5, Y3^Z3^X5, Z2^X4^Y4, }, // 64 + {Y2^X5, X2^Y5, Y3^Z3^X4, Z2^X3^Y4, }, // 65 + {Y4^X8, X4^Y8, Z2^Y5^X7, Z1^X5^Y7, }, // 66 + {Y3^X8, X4^Y7, Z2^Y4^X7, Z1^X5^Y6, }, // 67 + {Y3^X7, X3^Y7, Z2^Y4^X6, Z1^X4^Y6, }, // 68 + {Y2^X7, X3^Y6, Z2^Y3^X6, Z1^X4^Y5, }, // 69 + {Y2^X6, X2^Y6, Z2^Y3^X5, Z1^X3^Y5, }, // 70 + {Y4^X8, Z3^X4^Y8, Z2^Y5^X7, Z1^X5^Y7, }, // 71 + {Y3^X8, Z3^X4^Y7, Z2^Y4^X7, Z1^X5^Y6, }, // 72 + {Y3^X7, X3^Z3^Y7, Z2^Y4^X6, Z1^X4^Y6, }, // 73 + {Y2^X7, X3^Z3^Y6, Z2^Y3^X6, Z1^X4^Y5, }, // 74 + {Y2^X6, X2^Z3^Y6, Z2^Y3^X5, Z1^X3^Y5, }, // 75 + {Y4^X9, X4^Y9, Z3^Y5^X8, Z2^X5^Y8, }, // 76 + {Y3^X9, X4^Y8, Z3^Y4^X8, Z2^X5^Y7, }, // 77 + {Y3^X8, X3^Y8, Z3^Y4^X7, Z2^X4^Y7, }, // 78 + {Y2^X8, X3^Y7, Y3^Z3^X7, Z2^X4^Y6, }, // 79 + {Y2^X7, X2^Y7, Y3^Z3^X6, Z2^X3^Y6, }, // 80 + {Y4^Z4^X8, Z3^X4^Y8, Z2^Y5^X7, Z1^X5^Y7, }, // 81 + {Y3^Z4^X8, Z3^X4^Y7, Z2^Y4^X7, Z1^X5^Y6, }, // 82 + {Y3^Z4^X7, X3^Z3^Y7, Z2^Y4^X6, Z1^X4^Y6, }, // 83 + {Y2^Z4^X7, X3^Z3^Y6, Z2^Y3^X6, Z1^X4^Y5, }, // 84 + {Y2^Z4^X6, X2^Z3^Y6, Z2^Y3^X5, Z1^X3^Y5, }, // 85 + {Y4^X9, X4^Z4^Y9, Z3^Y5^X8, Z2^X5^Y8, }, // 86 + {Y3^X9, X4^Z4^Y8, Z3^Y4^X8, Z2^X5^Y7, }, // 87 + {Y3^X8, X3^Z4^Y8, Z3^Y4^X7, Z2^X4^Y7, }, // 88 + {Y2^X8, X3^Z4^Y7, Y3^Z3^X7, Z2^X4^Y6, }, // 89 + {Y2^X7, X2^Z4^Y7, Y3^Z3^X6, Z2^X3^Y6, }, // 90 + {X4^Y4, X4, Y5, X5, }, // 91 + {Y3^X4, X4, Y4, X5, }, // 92 + {X3^Y3, X3, Y4, X4, }, // 93 + {Y2^X3, X3, Y3, X4, }, // 94 + {X2^Y2, X2, Y3, X3, }, // 95 + {Y4^X5, X4^Y5, Y5, X5, }, // 96 + {Y3^X5, X4^Y4, Y4, X5, }, // 97 + {Y3^X4, X3^Y4, Y4, X4, }, // 98 + {Y2^X4, X3^Y3, Y3, X4, }, // 99 + {Y2^X3, X2^Y3, Y3, X3, }, // 100 + {Y4^X6, X4^Y6, X5^Y5, X5, }, // 101 + {Y3^X6, X4^Y5, Y4^X5, X5, }, // 102 + {Y3^X5, X3^Y5, X4^Y4, X4, }, // 103 + {Y2^X5, X3^Y4, Y3^X4, X4, }, // 104 + {Y2^X4, X2^Y4, X3^Y3, X3, }, // 105 + {Y4^X7, X4^Y7, Y5^X6, X5^Y6, }, // 106 + {Y3^X7, X4^Y6, Y4^X6, X5^Y5, }, // 107 + {Y3^X6, X3^Y6, Y4^X5, X4^Y5, }, // 108 + {Y2^X6, X3^Y5, Y3^X5, X4^Y4, }, // 109 + {Y2^X5, X2^Y5, Y3^X4, X3^Y4, }, // 110 + {Y4, X4, Y5^X7, X5^Y7, }, // 111 + {Y3, X4, Y4^X7, X5^Y6, }, // 112 + {Y3, X3, Y4^X6, X4^Y6, }, // 113 + {Y2, X3, Y3^X6, X4^Y5, }, // 114 + {Y2, X2, Y3^X5, X3^Y5, }, // 115 + {X4, Y4, X5^Y8, Y5^X8, }, // 116 + {Y3, X4, Y4^X8, X5^Y7, }, // 117 + {X3, Y3, X4^Y7, Y4^X7, }, // 118 + {Y2, X3, Y3^X7, X4^Y7, }, // 119 + {X2, Y2, X3^Y7, Y3^X6, }, // 120 + {Z0^X4^Y4, Y4, X5, Y5^X9, }, // 121 + {Z0^X4^Y4, Y3, Y4, X5^Y8, }, // 122 + {Z0^X4^Y4, X3, Y3, Y4^X8, }, // 123 + {Z0^X4^Y4, Y2, X3, Y3^X8, }, // 124 + {Z0^X4^Y4, X2, Y2, Y3^X7, }, // 125 + {Y4^X5^Y5, Z0^X4^Y4, X5, Y5, }, // 126 + {Y4^X5^Y5, Z0^X4^Y4, Y3, X5, }, // 127 + {Y4^X5^Y5, Z0^X4^Y4, X3, Y3, }, // 128 + {Y4^X5^Y5, Z0^X4^Y4, Y2, X3, }, // 129 + {Y4^X5^Y5, Z0^X4^Y4, X2, Y2, }, // 130 + {Y4^X5^Y5, Z0^X4^Y4, X5^Y5, Y5, }, // 131 + {Y4^X5^Y5, Z0^X4^Y4, X5^Y5, Y3, }, // 132 + {Y4^X5^Y5, Z0^X4^Y4, X5^Y5, X3, }, // 133 + {Y4^X5^Y5, Z0^X4^Y4, X5^Y5, Y2, }, // 134 + {Y4^X5^Y5, Z0^X4^Y4, X5^Y5, X2, }, // 135 + {Y4^X6^Y6, Z1^X4^Y4, X5, X6, }, // 136 + {Y4^X6^Y6, Z1^X4^Y4, Y3, X5, }, // 137 + {Y4^X6^Y6, Z1^X4^Y4, X3, Y3, }, // 138 + {Y4^X6^Y6, Z1^X4^Y4, Y2, X3, }, // 139 + {Y4^X6^Y6, Z1^X4^Y4, X2, Y2, }, // 140 + {Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, X5, }, // 141 + {Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, Y3, }, // 142 + {Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, X3, }, // 143 + {Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, Y2, }, // 144 + {Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, X2, }, // 145 + {Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, X5^Y6, }, // 146 + {Y4^X7^Y7, Z1^X4^Y4, Z0^Y5^X6, X6, }, // 147 + {Y4^X7^Y7, Z1^X4^Y4, Z0^Y5^X6, Y3, }, // 148 + {Y4^X7^Y7, Z1^X4^Y4, Z0^Y5^X6, X3, }, // 149 + {Y4^X7^Y7, Z2^X4^Y4, Z1^Y5^X6, Y2, }, // 150 + {Y4^X7^Y7, Z2^X4^Y4, Z1^Y5^X6, X2, }, // 151 + {Y4^X7^Y7, Z1^X4^Y4, Z0^Y5^X6, X5^Y6, }, // 152 + {Y4^X7^Y7, Z2^X4^Y4, Z1^Y5^X6, Z0^X5^Y6, }, // 153 + {Y4^X8^Y8, Z1^X4^Y4, Z0^Y5^X7, X5^Y7, }, // 154 + {Y4^X8^Y8, Z3^X4^Y4, Z2^Y5^X7, Z1^X5^Y7, }, // 155 + {Y4^X8^Y8, Z2^X4^Y4, Z1^Y5^X7, Z0^X5^Y7, }, // 156 + {Y4^X9^Y9, Z1^X4^Y4, Z0^Y5^X8, X5^Y8, }, // 157 + {Y4^X9^Y9, Z3^X4^Y4, Z2^Y5^X8, Z1^X5^Y8, }, // 158 + {Y4^X9^Y9, Z2^X4^Y4, Z1^Y5^X8, Z0^X5^Y8, }, // 159 + {Y3, X4, Y4^X8, Y5^X7, }, // 160 + {X3, Y3, Y4^X7, X4^Y7, }, // 161 + {X2, Y2, Y3^X6, X3^Y7, }, // 162 + {Z0^X4^Y4, Y3, Y4, Y5^X8, }, // 163 + {Z0^X4^Y4, X2, X3, Y3^X8, }, // 164 + {Y4^X5^Y5, Z0^X4^Y4, X2, X3, }, // 165 + {Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, X2^X5^Y6, }, // 166 + {Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, Y1^X5^Y6, }, // 167 + {Y4^X7^Y7, Z1^X4^Y4, Z0^Y5^X6, X2, }, // 168 + {Y4^X7^Y7, Z1^X4^Y4, Z0^Y5^X6, Y1^X5^Y6, }, // 169 + {Y4^X8^Y8, Z1^X4^Y4, Z0^Y5^X7, Y1^X5^Y7, }, // 170 + {Y4^X9^Y9, Z1^X4^Y4, Z0^Y5^X8, Y1^X5^Y8, }, // 171 + {Z0^X4^Y4, X3, Y3, X5^Y7, }, // 172 + {Y4^X5^Y5, Z0^X4^Y4, Y1^X5^Y5, X2, }, // 173 + {Y4^X6^Y6, Z1^X4^Y4, X2, X3, }, // 174 + {Y4^X6^Y6, Z0^X4^Y4, X2, X3, }, // 175 + {Y4^X6^Y6, Z0^X4^Y4, Y1^X5^Y5, X2, }, // 176 + {Y4^X6^Y6, Z0^X4^Y4, Y1^X5^Y5, X1^X5^Y6, }, // 177 + {Y4^X7^Y7, Z1^X4^Y4, Y1^Y5^X6, X3, }, // 178 + {Y4^X7^Y7, Z0^X4^Y4, Y1^Y5^X6, X3, }, // 179 + {Y4^X7^Y7, Z1^X4^Y4, Y1^Y5^X6, Z0^X5^Y6, }, // 180 + {Y4^X7^Y7, Z0^X4^Y4, Y1^Y5^X6, X1^X5^Y6, }, // 181 + {Y4^X8^Y8, Z1^X4^Y4, Y1^Y5^X7, Z0^X5^Y7, }, // 182 + {Y4^X8^Y8, Z0^X4^Y4, Y1^Y5^X7, X1^X5^Y7, }, // 183 + {Y4^X9^Y9, Z1^X4^Y4, Y1^Y5^X8, Z0^X5^Y8, }, // 184 + {Y4^X9^Y9, Z0^X4^Y4, Y1^Y5^X8, X1^X5^Y8, }, // 185 + {X3, Y3, Y4^X6, X4^Y7, }, // 186 + {Y2, X3, Y3^X6, X4^Y7, }, // 187 + {Z0^X4^Y4, X3, Y3, Y4^X6, }, // 188 + {Z0^X4^Y4, X2, X3, Y3^X7, }, // 189 + {Z0^X4^Y4, X2, Y2, X3^Y7, }, // 190 + {Y4^X5^Y5, Y0^X4^Y4, X2, X3, }, // 191 + {Y4^X5^Y5, Z0^X4^Y4, Y2^X5^Y5, X2, }, // 192 + {Y4^X5^Y5, Y0^X4^Y4, X1^X5^Y5, X2, }, // 193 + {Y4^X6^Y6, Z0^X4^Y4, X3, Y3, }, // 194 + {Y4^X6^Y6, Y0^X4^Y4, X3, Y3, }, // 195 + {Y4^X6^Y6, Z0^X4^Y4, Y1^X5^Y5, X3, }, // 196 + {Y4^X6^Y6, Y0^X4^Y4, Y1^X5^Y5, X3, }, // 197 + {Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, Y2^X5^Y6, }, // 198 + {Y4^X6^Y6, Z0^X4^Y4, Y1^X5^Y5, X2^X5^Y6, }, // 199 + {Y4^X6^Y6, Y0^X4^Y4, Y1^X5^Y5, Y2^X5^Y6, }, // 200 + {Y4^X7^Y7, Y0^X4^Y4, Y1^Y5^X6, X3, }, // 201 + {Y4^X7^Y7, Z1^X4^Y4, Z0^Y5^X6, Y2^X5^Y6, }, // 202 + {Y4^X7^Y7, Y0^X4^Y4, Y1^Y5^X6, X1^X5^Y6, }, // 203 + {Y4^X8^Y8, Z1^X4^Y4, Z0^Y5^X7, Y2^X5^Y7, }, // 204 + {Y4^X8^Y8, Y0^X4^Y4, Y1^Y5^X7, X1^X5^Y7, }, // 205 + {Y4^X8^Y8, Z1^X4^Y4, Z0^Y5^X7, X2^X5^Y7, }, // 206 + {Y4^X9^Y9, Z1^X4^Y4, Z0^Y5^X8, X2^X5^Y8, }, // 207 + {Y4^X9^Y9, Y0^X4^Y4, Y1^Y5^X8, X1^X5^Y8, }, // 208 + {Y4^X9^Y9, X4^Y4^Z4, Z3^Y5^X8, Z2^X5^Y8, }, // 209 + {Y2, X3, Y3^X7, Y4^X6, }, // 210 + {Y1, X2, Y2^X7, Y3^X6, }, // 211 + {Z0^X4^Y4, Y2, Y3, Y4^X7, }, // 212 + {Z0^X4^Y4, Y1, Y2, Y3^X6, }, // 213 + {Y4^X5^Y5, Z0^X4^Y4, Y1, Y2, }, // 214 + {Y4^X5^Y5, Z0^X4^Y4, X5^Y5, Y1, }, // 215 + {Y4^X6^Y6, Z1^X4^Y4, Y1, X2, }, // 216 + {Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, Y1, }, // 217 + {Y4^X7^Y7, Z1^X4^Y4, Z0^Y5^X6, Y2, }, // 218 + {Y4^X7^Y7, Z2^X4^Y4, Z1^Y5^X6, Y1, }, // 219 + {Y1, X2, Y2^X6, X3^Y7, }, // 220 + {X1, Y1, X2^Y7, Y2^X6, }, // 221 + {Z0^X4^Y4, Y1, X2, Y2^X7, }, // 222 + {Z0^X4^Y4, X1, Y1, Y2^X6, }, // 223 + {Y4^X5^Y5, Z0^X4^Y4, Y1, X2, }, // 224 + {Y4^X5^Y5, Z0^X4^Y4, X1, Y1, }, // 225 + {Y4^X5^Y5, Z0^X4^Y4, X5^Y5, X1, }, // 226 + {Y4^X6^Y6, Z1^X4^Y4, X1, Y1, }, // 227 + {Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, X1, }, // 228 + {Y4^X7^Y7, Z2^X4^Y4, Z1^Y5^X6, X1, }, // 229 + {Y0, X1, Y1^X7, Y2^X6, }, // 230 + {Z0^X4^Y4, Y0, Y1, Y2^X6, }, // 231 + {Y4^X5^Y5, Z0^X4^Y4, Y0, Y1, }, // 232 + {Y4^X5^Y5, Z0^X4^Y4, X5^Y5, Y0, }, // 233 + {Y4^X6^Y6, Z1^X4^Y4, Y0, X1, }, // 234 + {Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, Y0, }, // 235 + {Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, Y3^X5, }, // 236 + {Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, X3^Y5, }, // 237 + {Y4^X7^Y7, Z1^X4^Y4, Z0^Y5^X6, Y1, }, // 238 + {Y4^X7^Y7, Z1^X4^Y4, Z0^Y5^X6, X1, }, // 239 + {Y4^X7^Y7, Z1^X4^Y4, Z0^Y5^X6, Z2^X5^Y6, }, // 240 + {Y4^X7^Y7, Z1^X4^Y4, Z0^Y5^X6, Y0^X5^Y6, }, // 241 + {Y4^X8^Y8, Z1^X4^Y4, Z0^Y5^X7, Z2^X5^Y7, }, // 242 + {Y4^X8^Y8, Z1^X4^Y4, Z0^Y5^X7, Y0^X5^Y7, }, // 243 + {Y4^X9^Y9, Z1^X4^Y4, Z0^Y5^X8, Z2^X5^Y8, }, // 244 + {Y4^X9^Y9, Z1^X4^Y4, Z0^Y5^X8, Y0^X5^Y8, }, // 245 + {Y2, X3, Z3, Y3, }, // 246 + {Y2, X2, Z3, Y3, }, // 247 + {Y2, X2, Z2, Y3, }, // 248 + {Y1, X2, Z2, Y2, }, // 249 + {Y1, X1, Z2, Y2, }, // 250 + {Y2^X3^Z3, X3, Z3, Y3, }, // 251 + {X2^Y2^Z3, X2, Z3, Y3, }, // 252 + {X2^Y2^Z2, X2, Z2, Y3, }, // 253 + {Y1^X2^Z2, X2, Z2, Y2, }, // 254 + {X1^Y1^Z2, X1, Z2, Y2, }, // 255 + {Y2^X4^Z4, X3^Y3^Z3, Z3, Y3, }, // 256 + {Y2^X3^Z4, X2^Y3^Z3, Z3, Y3, }, // 257 + {Y2^X3^Z3, X2^Z2^Y3, Z2, Y3, }, // 258 + {Y1^X3^Z3, X2^Y2^Z2, Z2, Y2, }, // 259 + {Y1^X2^Z3, X1^Y2^Z2, Z2, Y2, }, // 260 + {Y2^X5^Z5, X3^Y4^Z4, Y3^Z3^X4, Y3, }, // 261 + {Y2^X4^Z5, X2^Y4^Z4, X3^Y3^Z3, Y3, }, // 262 + {Y2^X4^Z4, X2^Z3^Y4, Z2^X3^Y3, Y3, }, // 263 + {Y1^X4^Z4, X2^Y3^Z3, Y2^Z2^X3, Y2, }, // 264 + {Y1^X3^Z4, X1^Y3^Z3, X2^Y2^Z2, Y2, }, // 265 + {Y2^X6^Z6, X3^Y5^Z5, Z3^Y4^X5, Y3^X4^Z4, }, // 266 + {Y2^X5^Z6, X2^Y5^Z5, Z3^X4^Y4, X3^Y3^Z4, }, // 267 + {Y2^X5^Z5, X2^Z4^Y5, Z2^X4^Y4, X3^Y3^Z3, }, // 268 + {Y1^X5^Z5, X2^Y4^Z4, Z2^Y3^X4, Y2^X3^Z3, }, // 269 + {Y1^X4^Z5, X1^Y4^Z4, Z2^X3^Y3, X2^Y2^Z3, }, // 270 + {Y2^X7^Z7, X3^Y6^Z6, Z3^Y5^X6, Y3^X5^Z5, }, // 271 + {Y2^X6^Z7, X2^Y6^Z6, Z3^X5^Y5, Y3^X4^Z5, }, // 272 + {Y2^X6^Z6, X2^Z5^Y6, Z2^X5^Y5, Y3^X4^Z4, }, // 273 + {Y1^X6^Z6, X2^Y5^Z5, Z2^Y4^X5, Y2^X4^Z4, }, // 274 + {Y1^X5^Z6, X1^Y5^Z5, Z2^X4^Y4, Y2^X3^Z4, }, // 275 + {Y2^X8^Z8, X3^Y7^Z7, Z3^Y6^X7, Y3^X6^Z6, }, // 276 + {Y2^X7^Z8, X2^Y7^Z7, Z3^X6^Y6, Y3^X5^Z6, }, // 277 + {Y2^X7^Z7, X2^Z6^Y7, Z2^X6^Y6, Y3^X5^Z5, }, // 278 + {Y1^X7^Z7, X2^Y6^Z6, Z2^Y5^X6, Y2^X5^Z5, }, // 279 + {Y1^X6^Z7, X1^Y6^Z6, Z2^X5^Y5, Y2^X4^Z5, }, // 280 + {Y2^X5, X3^Y4^Z4, Y3^Z3^X4, Y3, }, // 281 + {Y2^X4, X2^Y4^Z4, X3^Y3^Z3, Y3, }, // 282 + {Y2^X4, X2^Z3^Y4, Z2^X3^Y3, Y3, }, // 283 + {Y1^X4, X2^Y3^Z3, Y2^Z2^X3, Y2, }, // 284 + {Y1^X3, X1^Y3^Z3, X2^Y2^Z2, Y2, }, // 285 + {Y2, X3, Z3^Y4^X5, Y3^X4^Z4, }, // 286 + {Y2, X2, Z3^X4^Y4, X3^Y3^Z4, }, // 287 + {Y2, X2, Z2^X4^Y4, X3^Y3^Z3, }, // 288 + {Y1, X2, Z2^Y3^X4, Y2^X3^Z3, }, // 289 + {Y1, X1, Z2^X3^Y3, X2^Y2^Z3, }, // 290 + {Y2, X3, Z3, Y3^X5, }, // 291 + {Y2, X2, Z3, Y3^X4, }, // 292 + {Y2, X2, Z2, Y3^X4, }, // 293 + {Y1, X2, Z2, Y2^X4, }, // 294 + {Y1, X1, Z2, Y2^X3, }, // 295 + {X4^Y4, Y2, Z3, Y3, }, // 296 + {X4^Y4, Y2, Z2, Y3, }, // 297 + {X4^Y4, Y1, Z2, Y2, }, // 298 + {Y1^X4^Y4, X1, Z2, Y2, }, // 299 + {Y4^X5^Y5, X4^Y4, Y2, Z3, }, // 300 + {Y4^X5^Y5, X4^Y4, Y2, Z2, }, // 301 + {Z3^Y4^X5^Y5, X4^Y4, Y1, Z2, }, // 302 + {Z3^Y4^X5^Y5, Y1^X4^Y4, X1, Z2, }, // 303 + {Y4^X5^Y5, X4^Y4, Z3^X5, Y2, }, // 304 + {Y4^X5^Y5, X4^Y4, Z2^X5, Y2, }, // 305 + {Z3^Y4^X5^Y5, X4^Y4, Z2^X5, Y1, }, // 306 + {Z3^Y4^X5^Y5, Y1^X4^Y4, Z2^X5, X1, }, // 307 + {Y4^X6^Y6, X4^Y4, Y2, Y3, }, // 308 + {Y4^X6^Y6, X4^Y4, Z3, Y3, }, // 309 + {Y4^X6^Y6, X4^Y4, Z2, Y3, }, // 310 + {Z3^Y4^X6^Y6, X4^Y4, Z2, Y2, }, // 311 + {Z3^Y4^X6^Y6, Y1^X4^Y4, Z2, Y2, }, // 312 + {Y4^X6^Y6, X4^Y4, X5^Y5, Y2, }, // 313 + {Y4^X6^Y6, X4^Y4, Y2^X5^Y5, Z3, }, // 314 + {Y4^X6^Y6, X4^Y4, Y2^X5^Y5, Z2, }, // 315 + {Z3^Y4^X6^Y6, X4^Y4, Y1^X5^Y5, Z2, }, // 316 + {Z3^Y4^X6^Y6, Y1^X4^Y4, X1^X5^Y5, Z2, }, // 317 + {Y4^X6^Y6, X4^Y4, X5^Y5, Z3^X6, }, // 318 + {Y4^X6^Y6, X4^Y4, Y2^X5^Y5, Z3^X6, }, // 319 + {Y4^X6^Y6, X4^Y4, Y2^X5^Y5, Z2^X6, }, // 320 + {Z3^Y4^X6^Y6, X4^Y4, Y1^X5^Y5, Z2^X6, }, // 321 + {Z3^Y4^X6^Y6, Y1^X4^Y4, X1^X5^Y5, Z2^X6, }, // 322 + {Y4^X7^Y7, X4^Y4, Y2^Y5^X6, Y3, }, // 323 + {Z3^Y4^X7^Y7, X4^Y4, Y1^Y5^X6, Y2, }, // 324 + {Z3^Y4^X7^Y7, Y1^X4^Y4, X1^Y5^X6, Y2, }, // 325 + {Y4^X7^Y7, X4^Y4, Y2^Y5^X6, X5^Y6, }, // 326 + {Y4^X7^Y7, X4^Y4, Y2^Y5^X6, Z3^X5^Y6, }, // 327 + {Y4^X7^Y7, X4^Y4, Y2^Y5^X6, Z2^X5^Y6, }, // 328 + {Z3^Y4^X7^Y7, X4^Y4, Y1^Y5^X6, Z2^X5^Y6, }, // 329 + {Z3^Y4^X7^Y7, Y1^X4^Y4, X1^Y5^X6, Z2^X5^Y6, }, // 330 + {Y4^X7^Y7, X4^Y4, Y2^Y5^X6, Y3^X5^Y6, }, // 331 + {Z3^Y4^X7^Y7, X4^Y4, Y1^Y5^X6, Y2^X5^Y6, }, // 332 + {Z3^Y4^X7^Y7, Y1^X4^Y4, X1^Y5^X6, Y2^X5^Y6, }, // 333 + {Y4^X8^Y8, X4^Y4, Y2^Y5^X7, X5^Y7, }, // 334 + {Y4^X8^Y8, X4^Y4, Y2^Y5^X7, Z3^X5^Y7, }, // 335 + {Y4^X8^Y8, X4^Y4, Y2^Y5^X7, Z2^X5^Y7, }, // 336 + {Z3^Y4^X8^Y8, X4^Y4, Y1^Y5^X7, Z2^X5^Y7, }, // 337 + {Z3^Y4^X8^Y8, Y1^X4^Y4, X1^Y5^X7, Z2^X5^Y7, }, // 338 + {Y4^X8^Y8, X4^Y4, Y2^Y5^X7, Y3^X5^Y7, }, // 339 + {Z3^Y4^X8^Y8, X4^Y4, Y1^Y5^X7, Y2^X5^Y7, }, // 340 + {Z3^Y4^X8^Y8, Y1^X4^Y4, X1^Y5^X7, Y2^X5^Y7, }, // 341 + {Y4^X9^Y9, X4^Y4, Y2^Y5^X8, X5^Y8, }, // 342 + {Y4^X9^Y9, X4^Y4, Y2^Y5^X8, Z3^X5^Y8, }, // 343 + {Y4^X9^Y9, X4^Y4, Y2^Y5^X8, Z2^X5^Y8, }, // 344 + {Z3^Y4^X9^Y9, X4^Y4, Y1^Y5^X8, Z2^X5^Y8, }, // 345 + {Z3^Y4^X9^Y9, Y1^X4^Y4, X1^Y5^X8, Z2^X5^Y8, }, // 346 +}; + +const UINT_64 GFX11_SW_PATTERN_NIBBLE3[][4] = +{ + {0, 0, 0, 0, }, // 0 + {Y6, X6, Y7, X7, }, // 1 + {Y5, X6, Y6, X7, }, // 2 + {Y5, X5, Y6, X6, }, // 3 + {Y4, X5, Y5, X6, }, // 4 + {Y4, X4, Y5, X5, }, // 5 + {Z0^X6^Y6, X6, Y7, X7, }, // 6 + {Z0^Y5^X6, X6, Y6, X7, }, // 7 + {Z0^X5^Y5, X5, Y6, X6, }, // 8 + {Z0^Y4^X5, X5, Y5, X6, }, // 9 + {Z0^X4^Y4, X4, Y5, X5, }, // 10 + {Z1^Y6^X7, Z0^X6^Y7, Y7, X7, }, // 11 + {Z1^Y5^X7, Z0^X6^Y6, Y6, X7, }, // 12 + {Z1^Y5^X6, Z0^X5^Y6, Y6, X6, }, // 13 + {Z1^Y4^X6, Z0^X5^Y5, Y5, X6, }, // 14 + {Z1^Y4^X5, Z0^X4^Y5, Y5, X5, }, // 15 + {X6^Y6, X6, Y7, X7, }, // 16 + {Y5^X6, X6, Y6, X7, }, // 17 + {X5^Y5, X5, Y6, X6, }, // 18 + {Y4^X5, X5, Y5, X6, }, // 19 + {X4^Y4, X4, Y5, X5, }, // 20 + {Y6^X7, X6^Y7, Y7, X7, }, // 21 + {Y5^X7, X6^Y6, Y6, X7, }, // 22 + {Y5^X6, X5^Y6, Y6, X6, }, // 23 + {Y4^X6, X5^Y5, Y5, X6, }, // 24 + {Y4^X5, X4^Y5, Y5, X5, }, // 25 + {X6^Y7, Y6^X7, X7, Y7, }, // 26 + {X5^Y6, Y5^X6, X6, Y6, }, // 27 + {Y4^X6, X5^Y6, Y5, X6, }, // 28 + {X4^Y6, Y4^X5, X5, Y5, }, // 29 + {X6^Y8, Y6^X8, X7^Y7, Y7, }, // 30 + {X6^Y7, Y5^X8, Y6^X7, Y6, }, // 31 + {X5^Y7, Y5^X7, X6^Y6, Y6, }, // 32 + {X5^Y7, Y4^X7, X6^Y6, Y5, }, // 33 + {X3^Y7, Y4^X6, X5^Y6, Y5, }, // 34 + {X6^Y9, Y6^X9, X7^Y8, Y7^X8, }, // 35 + {X6^Y8, Y5^X9, X7^Y7, Y6^X8, }, // 36 + {X5^Y8, Y5^X8, X6^Y7, Y6^X7, }, // 37 + {Y3^X8, X5^Y7, X6^Y6, Y5^X7, }, // 38 + {Y3^X7, X3^Y7, X5^Y6, Y5^X6, }, // 39 + {X6, Y6^X9, X7^Y8, Y7^X8, }, // 40 + {Y5, X6^Y8, X7^Y7, Y6^X8, }, // 41 + {Y3, Y5^X8, X6^Y7, Y6^X7, }, // 42 + {X3, Y3^X8, X6^Y6, Y5^X7, }, // 43 + {Y2, Y3^X7, X3^Y6, Y5^X6, }, // 44 + {Y6^X9, X7^Y8, Y7^X8, Z0^X5^Y5, }, // 45 + {X6^Y8, Y6^X8, X7^Y7, Z0^X5^Y5, }, // 46 + {X5^Y8, X6^Y7, Y6^X7, Z0^X5^Y5, }, // 47 + {Y3^X7, X5^Y7, X6^Y6, Z0^X5^Y5, }, // 48 + {X3^Y7, Y3^X6, X5^Y6, Z0^X5^Y5, }, // 49 + {X5, X6^Y8, Y6^X8, X7^Y7, }, // 50 + {Y3, X5^Y8, X6^Y7, Y6^X7, }, // 51 + {X3, Y3^X7, X5^Y7, X6^Y6, }, // 52 + {Y2, X3^Y7, Y3^X6, X5^Y6, }, // 53 + {X6, Y6, X7^Y8, Y7^X8, }, // 54 + {Y3, X6, Y6^X8, X7^Y7, }, // 55 + {X3, Y3, X6^Y7, Y6^X7, }, // 56 + {Y2, X3, Y3^X7, X6^Y6, }, // 57 + {X2, Y2, X3^Y6, Y3^X6, }, // 58 + {Y6, X7^Y8, Y7^X8, X5^Y6, }, // 59 + {X6, X7^Y7, Y6^X8, X5^Y6, }, // 60 + {Y3, X6^Y7, Y6^X7, X5^Y6, }, // 61 + {X3, Y3^X7, X6^Y6, Z0^X5^Y6, }, // 62 + {Y2, Y3^X6, X3^Y6, Z0^X5^Y6, }, // 63 + {Y3, X6, X7^Y7, Y6^X8, }, // 64 + {X2, Y2, Y3^X6, X3^Y6, }, // 65 + {X6^Y6, Y6, X7, Y7^X8, }, // 66 + {X6^Y6, Y3, Y6, X7^Y7, }, // 67 + {X6^Y6, X3, Y3, Y6^X7, }, // 68 + {X6^Y6, Y2, X3, Y3^X7, }, // 69 + {X3^Y6, X2, Y2, Y3^X6, }, // 70 + {X6, X7, Y7^X8, X6^Y6, }, // 71 + {Y3, X6, X7^Y7, X6^Y6, }, // 72 + {X3, Y3, X6^Y7, X6^Y6, }, // 73 + {Y2, X3, Y3^X7, Z0^X6^Y6, }, // 74 + {X2, X3, Y3^X6, Y2^X6^Y6, }, // 75 + {X6^Y6, X6, X7, Y7^X8, }, // 76 + {X6^Y6, Y3, X6, X7^Y7, }, // 77 + {X6^Y6, X3, Y3, X6^Y7, }, // 78 + {Z0^X6^Y6, Y2, X3, Y3^X7, }, // 79 + {Y2^X6^Y6, X2, X3, Y3^X6, }, // 80 + {X6^Y6, X6^Y8, X7, Y7, }, // 81 + {X6^Y6, X6^Y8, Y3, X7, }, // 82 + {X6^Y6, X6^Y8, X3, Y3, }, // 83 + {Z0^X6^Y6, X3^Y8, Y2, Y3, }, // 84 + {Y2^X6^Y6, X3^Y8, X2, Y3, }, // 85 + {Y6^X7, X7, Y7, X6^Y7, }, // 86 + {Y6^X7, Y3, X7, X6^Y7, }, // 87 + {Y6^X7, X3, Y3, X6^Y7, }, // 88 + {Y2^Y6^X7, X3, Y3, Z0^X6^Y7, }, // 89 + {Y2^Y6^X7, X3, Y3, X2^X6^Y7, }, // 90 + {Y6^X7, X6^Y7, X7, Y7, }, // 91 + {Y6^X7, X6^Y7, Y3, X7, }, // 92 + {Y6^X7, X6^Y7, X3, Y3, }, // 93 + {Y2^Y6^X7, Z0^X6^Y7, X3, Y3, }, // 94 + {Y2^Y6^X7, X2^X6^Y7, X3, Y3, }, // 95 + {X5^Y7, X6^Y6, X6, Y7, }, // 96 + {Y5^X6, X5^Y6, Y6, Y2^X6, }, // 97 + {Y4^X6, X5^Y6, Y5, X2^X6, }, // 98 + {Y4^X5, X4^Y6, Y5, Y1^X5, }, // 99 + {X5^Y8, Y6^X7, X6^Y7, Y7, }, // 100 + {Y5^X7, X5^Y7, X6^Y6, Y2^X6, }, // 101 + {Y4^X7, X5^Y6, Y5^X6, Y2^X6, }, // 102 + {Y4^X6, X3^Y6, X5^Y5, Y1^X5, }, // 103 + {Y5^X9, Y6^X8, X6^Y8, X7^Y7, }, // 104 + {Y5^X8, X5^Y8, Y6^X7, Y2^X6^Y7, }, // 105 + {Y3^X8, X5^Y7, Y5^X7, Y2^X6^Y6, }, // 106 + {Y3^X7, X3^Y7, Y5^X6, Y1^X5^Y6, }, // 107 + {X5, Y6^X8, X6^Y8, X7^Y7, }, // 108 + {Y3, X5^Y8, Y6^X7, Y2^X6^Y7, }, // 109 + {X3, Y3^X7, X5^Y7, Y2^X6^Y6, }, // 110 + {Y2, Y3^X6, X3^Y7, Y1^X5^Y6, }, // 111 + {Y6^X8, X6^Y8, X7^Y7, Z0^X5^Y5, }, // 112 + {X5^Y8, Y6^X7, Y2^X6^Y7, Z0^X5^Y5, }, // 113 + {Y3^X7, X5^Y7, X2^X6^Y6, Z0^X5^Y5, }, // 114 + {Y3^X6, X3^Y7, Y1^X5^Y6, Z0^X5^Y5, }, // 115 + {X3, Y3^X7, X5^Y7, X2^X6^Y6, }, // 116 + {Y3, X5, X6^Y8, X7^Y7, }, // 117 + {X3, Y3, X5^Y8, X6^Y7, }, // 118 + {X3, Y3, X5^Y8, Y2^X6^Y7, }, // 119 + {Y2, X3, Y3^X6, X5^Y6, }, // 120 + {X2, Y2, Y3^X5, X3^Y6, }, // 121 + {X6, Y6^X8, X7^Y7, X5^Y6, }, // 122 + {Y3, Y6^X7, Y2^X6^Y7, X5^Y6, }, // 123 + {X3, Y3^X7, Y2^X6^Y6, Z0^X5^Y6, }, // 124 + {X3, Y3^X7, Y2^X6^Y6, Y1^X5^Y6, }, // 125 + {X3, Y3, Y6^X7, Y2^X6^Y7, }, // 126 + {X2, X3, Y3^X7, Y2^X6^Y6, }, // 127 + {X6^Y6, X3, Y3, Y2^X6^Y7, }, // 128 + {X3, Y3, Y2^X6^Y7, X6^Y6, }, // 129 + {X3, Y3, X2^X6^Y7, Y2^X6^Y6, }, // 130 + {Y2^X6^Y6, X3, Y3, X2^X6^Y7, }, // 131 + {X6^Y6, X6^Y8, Y3, Y7, }, // 132 + {X6^Y6, Y2^X6^Y8, X3, Y3, }, // 133 + {Y2^X6^Y6, X2^X6^Y8, X3, Y3, }, // 134 + {Y6^X7, Y3, Y7, X6^Y7, }, // 135 + {Y6^X7, X3, Y3, Y2^X6^Y7, }, // 136 + {Y6^X7, X6^Y7, Y3, Y7, }, // 137 + {Y6^X7, Y2^X6^Y7, X3, Y3, }, // 138 + {X5^Y6, Y5^X6, X6, Y2^Y6, }, // 139 + {X5^Y6, Y5^X6, X2^X6, Y2^Y6, }, // 140 + {Y4^X6, X5^Y6, X2^X6, Y1^Y5, }, // 141 + {X4^Y6, Y4^X5, X1^X5, Y1^Y5, }, // 142 + {Y4^X8, X6^Y6, Y5^X7, Y2^X7, }, // 143 + {X5^Y6, Y5^X7, X2^X6^Y6, Y2^X6, }, // 144 + {X5^Y6, Y4^X7, X2^Y5^X6, Y1^X6, }, // 145 + {X3^Y6, Y4^X6, X1^X5^Y5, Y1^X5, }, // 146 + {X5^Y8, X6^Y7, Y5^X8, Y2^Y6^X7, }, // 147 + {X5^Y8, Y5^X8, X2^Y6^X7, Y2^X6^Y7, }, // 148 + {Y3^X8, X5^Y7, X2^Y5^X7, Y1^X6^Y6, }, // 149 + {Y3^X7, X3^Y7, X1^Y5^X6, Y1^X5^Y6, }, // 150 + {Y3, X6^Y7, Y5^X8, Y2^Y6^X7, }, // 151 + {Y3, Y5^X8, X2^Y6^X7, Y2^X6^Y7, }, // 152 + {X3, Y3^X8, X2^Y5^X7, Y1^X6^Y6, }, // 153 + {Y2, Y3^X6, X3^Y6, X1^X5^Y5, }, // 154 + {X5^Y8, X6^Y7, Y2^Y6^X7, Z0^X5^Y5, }, // 155 + {X5^Y8, X2^X6^Y7, Y2^Y6^X7, Z0^X5^Y5, }, // 156 + {Y3^X8, Y2^Y5^X7, Y1^X6^Y6, Z0^X5^Y5, }, // 157 + {Y3^X7, Y2^X6^Y6, X1^X5^Y7, Y1^X5^Y5, }, // 158 + {Y3, X5^Y8, X6^Y7, Y2^Y6^X7, }, // 159 + {Y3, X5^Y8, X2^X6^Y7, Y2^Y6^X7, }, // 160 + {X3, Y3^X8, Y2^Y5^X7, Y1^X6^Y6, }, // 161 + {X3, Y3^X7, Y2^X6^Y6, X1^X5^Y7, }, // 162 + {X3, Y3, X6^Y7, Y2^Y6^X7, }, // 163 + {X3, Y3, X2^X6^Y7, Y2^Y6^X7, }, // 164 + {X2, X3, Y3^X7, Y2^Y5^X6, }, // 165 + {X2, X3, Y3^X6, Y2^X5^Y6, }, // 166 + {Y3, X6^Y7, Y2^Y6^X7, X5^Y6, }, // 167 + {Y3, X2^Y6^X7, Y2^X6^Y7, X5^Y6, }, // 168 + {Y3, X2^Y6^X7, Y2^X6^Y7, Z0^X5^Y6, }, // 169 + {Y3, X2^Y6^X7, Y2^X6^Y7, X1^X5^Y6, }, // 170 + {X3, Y3, X2^Y6^X7, Y2^X6^Y7, }, // 171 + {X6^Y6, X3, Y3, Y2^Y6^X7, }, // 172 + {Y2^X6^Y6, X3, Y3, X2^X6^Y6, }, // 173 + {X3, Y3, Y2^Y6^X7, X6^Y6, }, // 174 + {Y2^Y6^X7, X3, Y3, X6^Y7, }, // 175 + {Y2^Y6^X7, X6^Y7, X3, Y3, }, // 176 + {X5^Y5, Y1^X5^Y6, X2^X6, Y2^Y6, }, // 177 + {Y4^X5, X1^X5^Y6, Y1^Y5, X2^X6, }, // 178 + {Y4^X5, Y0^X4^Y6, X1^X5, Y1^Y5, }, // 179 + {X5^Y5, Y1^X5^Y7, X2^X6^Y6, Y2^Y6, }, // 180 + {Y4^X6, Y1^X5^Y6, X1^X5^Y5, Y2^X6, }, // 181 + {Y3^X6, Y0^X4^Y6, X1^Y4^X5, Y1^X5, }, // 182 + {Y5^X8, Y1^X5^Y8, X2^X6^Y7, Y2^Y6^X7, }, // 183 + {Y3^X8, Y1^X5^Y7, X1^Y5^X7, Y2^X6^Y6, }, // 184 + {Y3^X7, Y1^X4^Y7, Y2^X5^Y6, X1^Y5^X6, }, // 185 + {Y3, X5^Y8, X2^Y6^X7, Y2^X6^Y7, }, // 186 + {Y3, Y1^X5^Y8, X2^X6^Y7, Y2^Y6^X7, }, // 187 + {X3, Y3^X7, Y1^X5^Y6, X1^Y5^X6, }, // 188 + {X3, Y3^X6, Y1^X4^Y6, Y2^X5^Y5, }, // 189 + {Y1^X5^Y8, X2^X6^Y7, Y2^Y6^X7, Z0^X5^Y5, }, // 190 + {X1^X5^Y8, Y2^Y6^X7, X2^X6^Y7, Y1^X5^Y5, }, // 191 + {X1^X5^Y8, X2^X6^Y7, Y2^Y6^X7, Y1^X5^Y5, }, // 192 + {Y3, X1^X5^Y8, Y2^Y6^X7, X2^X6^Y7, }, // 193 + {Y3, X1^X5^Y8, X2^X6^Y7, Y2^Y6^X7, }, // 194 + {X3, Y3, Y1^X5^Y7, X2^X6^Y6, }, // 195 + {X3, Y3, X1^X5^Y7, Y2^X6^Y6, }, // 196 + {X3, Y3, X1^X5^Y7, X2^X6^Y6, }, // 197 + {Y3, X2^Y6^X7, Y1^X6^Y7, Y2^X5^Y6, }, // 198 + {X3, Y3, X2^Y6^X7, Y1^X6^Y7, }, // 199 + {X2^X6^Y6, X3, Y3, Y1^X6^Y6, }, // 200 + {X2^X6^Y6, X3, Y3, Y2^X6^Y6, }, // 201 + {X3, Y3, Y1^X6^Y7, X2^X6^Y6, }, // 202 + {Y2^X6^Y6, X3, Y3, Y1^X6^Y7, }, // 203 + {Y2^X6^Y6, Y1^X6^Y8, X3, Y3, }, // 204 + {Y2^Y6^X7, X3, Y3, Y1^X6^Y7, }, // 205 + {X6, Y6^X10, X7^Y9, Y7^X9, }, // 206 + {Y5, X6^Y9, X7^Y8, Y6^X9, }, // 207 + {Y3, Y5^X9, X6^Y8, Y6^X8, }, // 208 + {X3, Y3^X9, X6^Y7, Y5^X8, }, // 209 + {Y2, Y3^X8, X3^Y7, Y5^X7, }, // 210 + {Y6^X10, X7^Y9, Y7^X9, X8^Y8, }, // 211 + {X5^Y9, X6^Y8, Y6^X8, X7^Y7, }, // 212 + {Y3^X8, X5^Y8, X6^Y7, Y6^X7, }, // 213 + {X3^Y8, Y3^X7, X5^Y7, X6^Y6, }, // 214 + {X5, X6^Y9, Y6^X9, X7^Y8, }, // 215 + {Y3, X5^Y9, X6^Y8, Y6^X8, }, // 216 + {X3, Y3^X8, X5^Y8, X6^Y7, }, // 217 + {Y2, X3^Y8, Y3^X7, X5^Y7, }, // 218 + {X6, Y6, X7^Y10, Y7^X10, }, // 219 + {Y3, X6, Y6^X10, X7^Y9, }, // 220 + {X3, Y3, X6^Y9, Y6^X9, }, // 221 + {Y2, X3, Y3^X9, X6^Y8, }, // 222 + {X2, Y2, X3^Y8, Y3^X8, }, // 223 + {Y6, X7^Y10, Y7^X10, X8^Y9, }, // 224 + {X6, X7^Y9, Y6^X10, X8^Y8, }, // 225 + {Y3, X6^Y9, Y6^X9, X7^Y8, }, // 226 + {X3, Y3^X9, X6^Y8, X7^Y7, }, // 227 + {Y2, Y3^X8, X3^Y8, X6^Y7, }, // 228 + {Y3, X6, X7^Y9, Y6^X10, }, // 229 + {X2, Y2, Y3^X8, X3^Y8, }, // 230 + {X6^Y6, Y6, X7, Y7^X10, }, // 231 + {X6^Y6, Y3, Y6, X7^Y9, }, // 232 + {X6^Y6, X3, Y3, Y6^X9, }, // 233 + {X6^Y6, Y2, X3, Y3^X9, }, // 234 + {X6^Y6, X2, Y2, Y3^X8, }, // 235 + {X6, X7, Y7^X10, X8^Y9, }, // 236 + {Y3, X6, X7^Y9, Y7^X9, }, // 237 + {X3, Y3, X6^Y9, X7^Y8, }, // 238 + {Y2, X3, Y3^X8, X6^Y8, }, // 239 + {X2, Y2, X3^Y8, Y3^X7, }, // 240 + {X6^Y6, X6, X7, Y7^X10, }, // 241 + {X6^Y6, Y3, X6, X7^Y9, }, // 242 + {X6^Y6, X3, Y3, X6^Y9, }, // 243 + {Z0^X6^Y6, Y2, X3, Y3^X8, }, // 244 + {Z0^X6^Y6, X2, Y2, X3^Y8, }, // 245 + {Z0^X6^Y6, X6^Y8, Y2, X3, }, // 246 + {Z0^X6^Y6, X6^Y8, X2, Y2, }, // 247 + {Y6^X7, X7, Y7, X8^Y9, }, // 248 + {Y6^X7, Y3, X7, X8^Y8, }, // 249 + {Y6^X7, X3, Y3, X7^Y8, }, // 250 + {Z1^Y6^X7, Y2, X3, Y3^X8, }, // 251 + {Z1^Y6^X7, X2, Y2, Y3^X7, }, // 252 + {Z1^Y6^X7, Z0^X6^Y7, Y2, X3, }, // 253 + {Z1^Y6^X7, Z0^X6^Y7, X2, Y2, }, // 254 + {X4^Y6, X5^Y5, X5, Y6, }, // 255 + {X3^Y6, Y4^X5, X4, Y5, }, // 256 + {X3^Y7, Y5^X6, X5^Y6, Y6, }, // 257 + {X2^Y7, Y4^X5, X3^Y6, Y5, }, // 258 + {Y3^X8, Y5^X7, X5^Y7, X6^Y6, }, // 259 + {Y3^X6, X2^Y7, X3^Y6, X5^Y5, }, // 260 + {X5, Y6^X9, X6^Y9, Y7^X8, }, // 261 + {X3, Y3^X8, X5^Y8, Y6^X7, }, // 262 + {Y2, Y3^X7, X3^Y8, X5^Y7, }, // 263 + {Y2, Y3^X6, X2^Y8, X3^Y7, }, // 264 + {Y6^X9, X6^Y9, Y7^X8, X7^Y8, }, // 265 + {Y3^X8, X5^Y8, Y6^X7, X6^Y7, }, // 266 + {Y2^X7, Y3^X6, X3^Y7, X5^Y6, }, // 267 + {X2, Y2^X7, Y3^X6, X3^Y7, }, // 268 + {Y3, X5, X6^Y10, Y7^X9, }, // 269 + {X3, Y3, X5^Y10, X6^Y9, }, // 270 + {Y2, X3, Y3^X8, X5^Y9, }, // 271 + {X2, Y2, X3^Y9, Y3^X7, }, // 272 + {Y1, X2, Y2^X7, Y3^X6, }, // 273 + {X6, Y6^X10, Y7^X9, X7^Y9, }, // 274 + {X3, Y3^X9, Y6^X8, X6^Y8, }, // 275 + {Y2, Y3^X7, X2^Y8, X3^Y7, }, // 276 + {Y3, X6, Y6^X10, Y7^X9, }, // 277 + {Y2, X3, Y3^X9, Y6^X8, }, // 278 + {Y1, Y2, Y3^X7, X2^Y8, }, // 279 + {X6^Y6, Y3, X6, Y7^X9, }, // 280 + {X6^Y6, Y2, X3, Y3^X8, }, // 281 + {X6^Y6, X2, Y2, Y3^X7, }, // 282 + {X6^Y6, Y1, Y2, Y3^X6, }, // 283 + {Y3, X6, Y7^X9, X7^Y9, }, // 284 + {Z0^X6^Y6, Y1, X2, Y2^X7, }, // 285 + {X6^Y6, X6^Y8, Y2, X3, }, // 286 + {Z0^X6^Y6, X3^Y8, Y1, X2, }, // 287 + {Y6^X7, Y3, X7, Y7^X9, }, // 288 + {Y6^X7, Y2, X3, Y3^X8, }, // 289 + {Z0^Y6^X7, X2, Y2, Y3^X7, }, // 290 + {Z0^Y6^X7, X2, X3, Y3^X8, }, // 291 + {Y6^X7, X6^Y7, Y2, X3, }, // 292 + {Z0^Y6^X7, Z4^X6^Y7, X2, Y2, }, // 293 + {Z0^Y6^X7, Y1^X6^Y7, X2, X3, }, // 294 + {Y3^X5, X4^Y6, Y4, X5, }, // 295 + {X3^Y6, Y3^X5, X4, Y4, }, // 296 + {X3^Y7, Y3^X6, X5^Y6, Y4, }, // 297 + {X2^Y7, Y3^X5, X3^Y6, Y4, }, // 298 + {Y2^X7, X3^Y7, Y3^X6, X5^Y6, }, // 299 + {Y2^X6, X2^Y7, Y3^X5, X3^Y6, }, // 300 + {X2, Y2^X8, X3^Y7, Y3^X7, }, // 301 + {Y1, Y2^X6, X2^Y7, Y3^X5, }, // 302 + {X2^Y7, Y2^X6, X3^Y6, Y3^X5, }, // 303 + {X2, Y2^X7, X3^Y7, Y3^X6, }, // 304 + {Y1, X2^Y7, Y2^X6, X3^Y6, }, // 305 + {Y1, X2, Y2^X8, X3^Y7, }, // 306 + {X1, Y1, X2^Y7, Y2^X7, }, // 307 + {Y1, Y2^X7, X2^Y7, Y3^X6, }, // 308 + {X1, Y1, Y2^X7, X2^Y7, }, // 309 + {X6^Y6, Y1, X2, Y2^X8, }, // 310 + {X3^Y6, X1, Y1, Y2^X7, }, // 311 + {Y1, X2, Y2^X8, Y3^X7, }, // 312 + {X2, Y2, Y3^X7, X3^Y8, }, // 313 + {X6^Y6, X2, Y2, X3^Y8, }, // 314 + {Z3^X6^Y6, Y1, X2, Y2^X8, }, // 315 + {Y1^X6^Y6, X2, Y2, Y3^X7, }, // 316 + {X6^Y6, X6^Y8, X2, Y2, }, // 317 + {Z3^X6^Y6, X3^Y8, Y1, X2, }, // 318 + {Y1^X6^Y6, X1^X6^Y8, X2, Y2, }, // 319 + {Y6^X7, X2, Y2, Y3^X7, }, // 320 + {Y1^Y6^X7, X2, X3, Y3^X8, }, // 321 + {Y1^Y6^X7, X3, Y3, X2^Y7^X8, }, // 322 + {Y6^X7, X6^Y7, X2, Y2, }, // 323 + {Y1^Y6^X7, Z3^X6^Y7, X2, X3, }, // 324 + {Y1^Y6^X7, X1^X6^Y7, X3, Y3, }, // 325 + {X2^Y6, Y3^X5, X3, Y4, }, // 326 + {X1^Y7, Y3^X5, X2^Y6, Y4, }, // 327 + {Y2^X6, X1^Y7, Y3^X5, X2^Y6, }, // 328 + {Y1, Y2^X6, X1^Y7, Y3^X5, }, // 329 + {Y1^X7, Y2^X6, X2^Y6, Y3^X5, }, // 330 + {X1, Y1^X7, Y2^X6, X2^Y6, }, // 331 + {X1, Y1, X2^Y8, Y2^X6, }, // 332 + {Y0, X1, Y1^X7, Y2^X6, }, // 333 + {X2, Y2^X8, Y3^X7, X3^Y7, }, // 334 + {X1, X2, Y2^X8, Y3^X7, }, // 335 + {Y1^X6^Y6, X1, X2, Y2^X7, }, // 336 + {X2, X3, Y3^X8, Y2^X7^Y7, }, // 337 + {X6^Y6, Y1, X2, Y2^X7, }, // 338 + {Y1^X6^Y6, X2, X3, Y3^X8, }, // 339 + {X6^Y6, Y2^X6^Y8, Y1, X2, }, // 340 + {Y1^X6^Y6, X2^X6^Y8, Y2, X3, }, // 341 + {Y1^X6^Y6, Y3^X8, X2, X3, }, // 342 + {Y6^X7, X2, X3, Y3^X8, }, // 343 + {Y1^Y6^X7, X3, Y2, Y3^X8^Y8, }, // 344 + {Y6^X7, Y2^X6^Y7, X2, X3, }, // 345 + {Y1^Y6^X7, X1^X6^Y7, X3, Y2, }, // 346 + {X4, Z4, Y4, X5, }, // 347 + {X3, Z4, Y4, X4, }, // 348 + {X3, Z3, Y4, X4, }, // 349 + {X3, Z3, Y3, X4, }, // 350 + {X2, Z3, Y3, X3, }, // 351 + {X4^Y4^Z4, Z4, Y4, X5, }, // 352 + {X3^Y4^Z4, Z4, Y4, X4, }, // 353 + {X3^Z3^Y4, Z3, Y4, X4, }, // 354 + {X3^Y3^Z3, Z3, Y3, X4, }, // 355 + {X2^Y3^Z3, Z3, Y3, X3, }, // 356 + {X4^Y5^Z5, Y4^Z4^X5, Y4, X5, }, // 357 + {X3^Y5^Z5, X4^Y4^Z4, Y4, X4, }, // 358 + {X3^Z4^Y5, Z3^X4^Y4, Y4, X4, }, // 359 + {X3^Y4^Z4, Y3^Z3^X4, Y3, X4, }, // 360 + {X2^Y4^Z4, X3^Y3^Z3, Y3, X3, }, // 361 + {X4, Y4^Z4^X5, Y4, X5, }, // 362 + {X3, X4^Y4^Z4, Y4, X4, }, // 363 + {X3, Z3^X4^Y4, Y4, X4, }, // 364 + {X3, Y3^Z3^X4, Y3, X4, }, // 365 + {X2, X3^Y3^Z3, Y3, X3, }, // 366 + {X3, Z4, Y4, X5, }, // 367 + {X2, Z4, Y4, X3, }, // 368 + {X2, Z3, Y4, X3, }, // 369 + {Y3, X3, Z4, X5, }, // 370 + {Y3, X2, Z4, X3, }, // 371 + {Y3, X2, Z3, X3, }, // 372 + {Y2, X2, Y3, X3, }, // 373 + {Z3, X3, Z4, X5^Y5, }, // 374 + {X2, Z4, X3, Y2^X5^Y5, }, // 375 + {X2, Z3, X3, Y2^X5^Y5, }, // 376 + {X2, Y3, X3, Y1^X5^Y5, }, // 377 + {X2, Y3, X3, X1^X5^Y5, }, // 378 + {Y3, Z3, X3, Z4, }, // 379 + {Y2, Y3, X3, Z4, }, // 380 + {Z3, X3, Z4, X5^Y6, }, // 381 + {X2, Z4, X3, Z3^X5^Y6, }, // 382 + {X2, Z3, X3, Z2^X5^Y6, }, // 383 + {X2, Y3, X3, Z2^X5^Y6, }, // 384 + {Z3^X7, Y3, X3, Z4, }, // 385 + {Z3^X7, X2, Z4, X3, }, // 386 + {Z2^X7, X2, Z3, X3, }, // 387 + {Z2^X7, X2, Y3, X3, }, // 388 + {Z3, X3, Z4, Y3^X6^Y6, }, // 389 + {X2, Z4, X3, Y3^X6^Y6, }, // 390 + {X2, Z3, X3, Y3^X6^Y6, }, // 391 + {X2, Y3, X3, Y2^X6^Y6, }, // 392 + {Y3^X6^Y6, Z3, X3, Z4, }, // 393 + {Y3^X6^Y6, X2, Z4, X3, }, // 394 + {Y3^X6^Y6, X2, Z3, X3, }, // 395 + {Y2^X6^Y6, X2, Y3, X3, }, // 396 + {Y3^X6^Y6, Z3^X8, X3, Z4, }, // 397 + {X2^X6^Y6, Z3^X8, Z4, X3, }, // 398 + {X2^X6^Y6, Z2^X8, Z3, X3, }, // 399 + {X2^X6^Y6, Z2^X8, Y3, X3, }, // 400 + {Y3^Y6^X7, X3, Z4, Z3^X6^Y7, }, // 401 + {Y3^Y6^X7, Z4, X3, X2^X6^Y7, }, // 402 + {Y3^Y6^X7, Z3, X3, X2^X6^Y7, }, // 403 + {Y2^Y6^X7, Y3, X3, X2^X6^Y7, }, // 404 + {Y3^Y6^X7, Z3^X6^Y7, X3, Z4, }, // 405 + {Y3^Y6^X7, X2^X6^Y7, Z4, X3, }, // 406 + {Y3^Y6^X7, X2^X6^Y7, Z3, X3, }, // 407 + {Y2^Y6^X7, X2^X6^Y7, Y3, X3, }, // 408 +}; + +const UINT_64 GFX11_SW_PATTERN_NIBBLE4[][4] = +{ + {0, 0, 0, 0, }, // 0 + {Y8, X8, 0, 0, }, // 1 + {Y7, X8, 0, 0, }, // 2 + {Y7, X7, 0, 0, }, // 3 + {Y6, X7, 0, 0, }, // 4 + {Y6, X6, 0, 0, }, // 5 + {X8, Y8, 0, 0, }, // 6 + {X7, Y7, 0, 0, }, // 7 + {X6, Y6, 0, 0, }, // 8 + {X8, Y7, 0, 0, }, // 9 + {X7, Y6, 0, 0, }, // 10 + {X8^Y8, Y8, 0, 0, }, // 11 + {Y7^X8, Y7, 0, 0, }, // 12 + {X7^Y7, Y7, 0, 0, }, // 13 + {Y6^X7, Y6, 0, 0, }, // 14 + {X6^Y6, Y6, 0, 0, }, // 15 + {Y8, Z0^X5^Y5, 0, 0, }, // 16 + {X8, Z0^X5^Y5, 0, 0, }, // 17 + {Y7, Z0^X5^Y5, 0, 0, }, // 18 + {X7, Z0^X5^Y5, 0, 0, }, // 19 + {Y6, Z0^X5^Y5, 0, 0, }, // 20 + {Y7^X8, X8, 0, 0, }, // 21 + {Y6^X7, X7, 0, 0, }, // 22 + {X8^Y9, Y8^X9, 0, 0, }, // 23 + {Y7^X9, X8^Y8, 0, 0, }, // 24 + {X7^Y8, Y7^X8, 0, 0, }, // 25 + {Y6^X8, X7^Y7, 0, 0, }, // 26 + {X6^Y7, Y6^X7, 0, 0, }, // 27 + {Y8^X9, X5^Y6, 0, 0, }, // 28 + {Y7^X9, X5^Y6, 0, 0, }, // 29 + {Y7^X8, X5^Y6, 0, 0, }, // 30 + {Y6^X8, Z0^X5^Y6, 0, 0, }, // 31 + {Y6^X7, Z0^X5^Y6, 0, 0, }, // 32 + {X8^Y8, Y7^X9, 0, 0, }, // 33 + {X7^Y7, Y6^X8, 0, 0, }, // 34 + {X3^Y7, Y6^X7, 0, 0, }, // 35 + {Y8^X9, X6^Y6, 0, 0, }, // 36 + {X8^Y8, X6^Y6, 0, 0, }, // 37 + {Y7^X8, X6^Y6, 0, 0, }, // 38 + {X7^Y7, Z0^X6^Y6, 0, 0, }, // 39 + {X6^Y7, Z0^X6^Y6, 0, 0, }, // 40 + {X6^Y8, X7^Y7, 0, 0, }, // 41 + {Y3^X7, X6^Y7, 0, 0, }, // 42 + {Y3^X8, X7^Y7, 0, 0, }, // 43 + {X3^Y7, Y3^X7, 0, 0, }, // 44 + {Y8^X9, X6^Y7, 0, 0, }, // 45 + {Y7^X9, X6^Y7, 0, 0, }, // 46 + {Y7^X8, X6^Y7, 0, 0, }, // 47 + {X7^Y7, Z0^X6^Y7, 0, 0, }, // 48 + {X3^Y7, Z0^X6^Y7, 0, 0, }, // 49 + {Y3^X7, X3^Y7, 0, 0, }, // 50 + {X7, Y8, 0, 0, }, // 51 + {X6, Y7, 0, 0, }, // 52 + {X5, Y6, 0, 0, }, // 53 + {X7^Y8, Y8, 0, 0, }, // 54 + {X6^Y7, Y7, 0, 0, }, // 55 + {X5^Y6, Y6, 0, 0, }, // 56 + {X7^Y9, X8^Y8, 0, 0, }, // 57 + {X5^Y8, X6^Y7, 0, 0, }, // 58 + {X3^Y8, X5^Y7, 0, 0, }, // 59 + {X8^Y8, X5^Y6, 0, 0, }, // 60 + {X7^Y7, X5^Y6, 0, 0, }, // 61 + {X6^Y6, Z0^X5^Y6, 0, 0, }, // 62 + {X3^Y7, X6^Y6, 0, 0, }, // 63 + {X3^Y8, X6^Y7, 0, 0, }, // 64 + {X2^Y8, X3^Y7, 0, 0, }, // 65 + {X7^Y7, X6^Y6, 0, 0, }, // 66 + {X3^Y7, Z0^X6^Y6, 0, 0, }, // 67 + {Y3^X6, X3^Y7, 0, 0, }, // 68 + {Y2^X7, Y3^X6, 0, 0, }, // 69 + {X8^Y8, X6^Y7, 0, 0, }, // 70 + {X7^Y7, X6^Y7, 0, 0, }, // 71 + {X3^Y7, Z4^X6^Y7, 0, 0, }, // 72 + {Y2^X7^Y7, Y1^X6^Y7, 0, 0, }, // 73 + {Y3^X8, Y2^X7^Y7, 0, 0, }, // 74 + {Y5, X6, 0, 0, }, // 75 + {X5, Y5, 0, 0, }, // 76 + {X6, Y5, 0, 0, }, // 77 + {X6^Y6, Y5, 0, 0, }, // 78 + {X3^Y6, Y5, 0, 0, }, // 79 + {X6, Z0^X5^Y5, 0, 0, }, // 80 + {X5, Z0^X5^Y5, 0, 0, }, // 81 + {X5^Y6, X6, 0, 0, }, // 82 + {Y3^X5, X5, 0, 0, }, // 83 + {Y3^X7, X6^Y6, 0, 0, }, // 84 + {X3^Y6, Y3^X6, 0, 0, }, // 85 + {Y6^X8, X5^Y6, 0, 0, }, // 86 + {Y6^X7, X5^Y6, 0, 0, }, // 87 + {X3^Y6, Z0^X5^Y6, 0, 0, }, // 88 + {Y3^X6, X3^Y6, 0, 0, }, // 89 + {X3^Y6, Y3^X7, 0, 0, }, // 90 + {X2^Y6, Y3^X6, 0, 0, }, // 91 + {X6^Y7, X6^Y6, 0, 0, }, // 92 + {X3^Y6, Z3^X6^Y6, 0, 0, }, // 93 + {X1^X6^Y7, Y1^X6^Y6, 0, 0, }, // 94 + {Y3^X7, X3^Y6, 0, 0, }, // 95 + {X3^Y8, X1^X6^Y7, 0, 0, }, // 96 + {Y2^X8, Y3^X7, 0, 0, }, // 97 + {X3^Y7, X6^Y7, 0, 0, }, // 98 + {Y2^X7^Y7, Z3^X6^Y7, 0, 0, }, // 99 + {Y2^X7^Y8, X1^X6^Y7, 0, 0, }, // 100 + {X2^Y7^X8, Y2^X7^Y8, 0, 0, }, // 101 + {X4, Y5, 0, 0, }, // 102 + {X3, Y5, 0, 0, }, // 103 + {X3^Y6, X5, 0, 0, }, // 104 + {X2^Y6, X3, 0, 0, }, // 105 + {X3, Z0^X5^Y5, 0, 0, }, // 106 + {Y3^X5, X3, 0, 0, }, // 107 + {X3^Y7, X5^Y6, 0, 0, }, // 108 + {X2^Y6, Y3^X5, 0, 0, }, // 109 + {X6^Y6, X5^Y6, 0, 0, }, // 110 + {X3^Y6, Z2^X5^Y6, 0, 0, }, // 111 + {Y1^X6^Y6, Y0^X5^Y6, 0, 0, }, // 112 + {X3^Y7, Y1^X6^Y6, 0, 0, }, // 113 + {X1^X6^Y8, Y1^X6^Y6, 0, 0, }, // 114 + {Y2^X7^Y7, X1^X6^Y8, 0, 0, }, // 115 + {Y3^X7, X1^X6^Y7, 0, 0, }, // 116 + {Y1^X7^Y7, Y2^X6^Y7, 0, 0, }, // 117 + {X2^Y7^X9, X1^X6^Y7, 0, 0, }, // 118 + {Y3^X8, Y1^X7^Y7, 0, 0, }, // 119 + {Y3^X8^Y8, X2^Y7^X9, 0, 0, }, // 120 + {Z5, Y5, 0, 0, }, // 121 + {Z4, Y5, 0, 0, }, // 122 + {Z4, Y4, 0, 0, }, // 123 +}; + +const UINT_8 GFX11_DCC_64K_R_X_PATIDX[] = +{ + 0, // 1 bpe ua @ SW_64K_{Z,R}_X 1xaa + 1, // 2 bpe ua @ SW_64K_{Z,R}_X 1xaa + 2, // 4 bpe ua @ SW_64K_{Z,R}_X 1xaa + 3, // 8 bpe ua @ SW_64K_{Z,R}_X 1xaa + 4, // 16 bpe ua @ SW_64K_{Z,R}_X 1xaa + 0, // 1 pipes (1 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa + 1, // 1 pipes (1 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa + 2, // 1 pipes (1 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa + 3, // 1 pipes (1 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa + 4, // 1 pipes (1 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa + 5, // 2 pipes (1-2 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa + 6, // 2 pipes (1-2 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa + 7, // 2 pipes (1-2 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa + 8, // 2 pipes (1-2 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa + 9, // 2 pipes (1-2 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa + 10, // 4 pipes (1-2 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa + 11, // 4 pipes (1-2 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa + 12, // 4 pipes (1-2 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa + 13, // 4 pipes (1-2 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa + 14, // 4 pipes (1-2 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa + 15, // 8 pipes (2 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa + 16, // 8 pipes (2 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa + 17, // 8 pipes (2 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa + 18, // 8 pipes (2 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa + 19, // 8 pipes (2 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa + 20, // 4 pipes (4 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa + 21, // 4 pipes (4 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa + 22, // 4 pipes (4 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa + 23, // 4 pipes (4 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa + 24, // 4 pipes (4 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa + 25, // 8 pipes (4 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa + 26, // 8 pipes (4 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa + 27, // 8 pipes (4 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa + 28, // 8 pipes (4 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa + 29, // 8 pipes (4 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa + 30, // 16 pipes (4 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa + 31, // 16 pipes (4 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa + 32, // 16 pipes (4 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa + 33, // 16 pipes (4 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa + 34, // 16 pipes (4 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa + 35, // 8 pipes (8 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa + 36, // 8 pipes (8 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa + 37, // 8 pipes (8 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa + 38, // 8 pipes (8 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa + 39, // 8 pipes (8 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa + 35, // 16 pipes (8 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa + 36, // 16 pipes (8 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa + 37, // 16 pipes (8 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa + 40, // 16 pipes (8 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa + 41, // 16 pipes (8 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa + 42, // 32 pipes (8 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa + 43, // 32 pipes (8 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa + 44, // 32 pipes (8 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa + 45, // 32 pipes (8 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa + 46, // 32 pipes (8 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa + 47, // 16 pipes (16 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa + 48, // 16 pipes (16 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa + 49, // 16 pipes (16 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa + 50, // 16 pipes (16 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa + 51, // 16 pipes (16 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa + 47, // 32 pipes (16 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa + 48, // 32 pipes (16 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa + 49, // 32 pipes (16 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa + 52, // 32 pipes (16 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa + 53, // 32 pipes (16 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa + 54, // 64 pipes (16 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa + 55, // 64 pipes (16 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa + 56, // 64 pipes (16 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa + 57, // 64 pipes (16 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa + 58, // 64 pipes (16 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa + 59, // 32 pipes (32 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa + 60, // 32 pipes (32 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa + 61, // 32 pipes (32 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa + 62, // 32 pipes (32 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa + 63, // 32 pipes (32 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa + 59, // 64 pipes (32 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa + 60, // 64 pipes (32 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa + 61, // 64 pipes (32 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa + 64, // 64 pipes (32 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa + 65, // 64 pipes (32 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa +}; + +const UINT_8 GFX11_DCC_256K_R_X_PATIDX[] = +{ + 0, // 1 bpe ua @ SW_256K_{Z,R}_X 1xaa + 1, // 2 bpe ua @ SW_256K_{Z,R}_X 1xaa + 2, // 4 bpe ua @ SW_256K_{Z,R}_X 1xaa + 3, // 8 bpe ua @ SW_256K_{Z,R}_X 1xaa + 4, // 16 bpe ua @ SW_256K_{Z,R}_X 1xaa + 0, // 1 pipes (1 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa + 1, // 1 pipes (1 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa + 2, // 1 pipes (1 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa + 3, // 1 pipes (1 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa + 4, // 1 pipes (1 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa + 5, // 2 pipes (1-2 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa + 6, // 2 pipes (1-2 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa + 7, // 2 pipes (1-2 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa + 8, // 2 pipes (1-2 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa + 9, // 2 pipes (1-2 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa + 10, // 4 pipes (1-2 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa + 11, // 4 pipes (1-2 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa + 12, // 4 pipes (1-2 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa + 13, // 4 pipes (1-2 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa + 14, // 4 pipes (1-2 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa + 15, // 8 pipes (2 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa + 16, // 8 pipes (2 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa + 17, // 8 pipes (2 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa + 18, // 8 pipes (2 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa + 19, // 8 pipes (2 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa + 20, // 4 pipes (4 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa + 21, // 4 pipes (4 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa + 22, // 4 pipes (4 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa + 23, // 4 pipes (4 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa + 24, // 4 pipes (4 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa + 25, // 8 pipes (4 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa + 26, // 8 pipes (4 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa + 27, // 8 pipes (4 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa + 28, // 8 pipes (4 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa + 29, // 8 pipes (4 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa + 30, // 16 pipes (4 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa + 31, // 16 pipes (4 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa + 32, // 16 pipes (4 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa + 33, // 16 pipes (4 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa + 34, // 16 pipes (4 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa + 35, // 8 pipes (8 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa + 36, // 8 pipes (8 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa + 37, // 8 pipes (8 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa + 38, // 8 pipes (8 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa + 39, // 8 pipes (8 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa + 35, // 16 pipes (8 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa + 36, // 16 pipes (8 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa + 37, // 16 pipes (8 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa + 40, // 16 pipes (8 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa + 41, // 16 pipes (8 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa + 42, // 32 pipes (8 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa + 43, // 32 pipes (8 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa + 44, // 32 pipes (8 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa + 45, // 32 pipes (8 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa + 66, // 32 pipes (8 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa + 47, // 16 pipes (16 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa + 48, // 16 pipes (16 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa + 49, // 16 pipes (16 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa + 50, // 16 pipes (16 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa + 67, // 16 pipes (16 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa + 47, // 32 pipes (16 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa + 48, // 32 pipes (16 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa + 49, // 32 pipes (16 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa + 52, // 32 pipes (16 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa + 68, // 32 pipes (16 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa + 54, // 64 pipes (16 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa + 55, // 64 pipes (16 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa + 56, // 64 pipes (16 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa + 69, // 64 pipes (16 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa + 70, // 64 pipes (16 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa + 59, // 32 pipes (32 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa + 60, // 32 pipes (32 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa + 61, // 32 pipes (32 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa + 71, // 32 pipes (32 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa + 72, // 32 pipes (32 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa + 59, // 64 pipes (32 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa + 60, // 64 pipes (32 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa + 61, // 64 pipes (32 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa + 73, // 64 pipes (32 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa + 74, // 64 pipes (32 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa +}; + +const UINT_8 GFX11_HTILE_PATIDX[] = +{ + 0, // 1xaa ua @ HTILE_64K + 0, // 2xaa ua @ HTILE_64K + 0, // 4xaa ua @ HTILE_64K + 0, // 8xaa ua @ HTILE_64K + 0, // 1 pipes (1-2 PKRs) 1xaa pa @ HTILE_64K + 0, // 1 pipes (1-2 PKRs) 2xaa pa @ HTILE_64K + 0, // 1 pipes (1-2 PKRs) 4xaa pa @ HTILE_64K + 0, // 1 pipes (1-2 PKRs) 8xaa pa @ HTILE_64K + 1, // 2 pipes (1-2 PKRs) 1xaa pa @ HTILE_64K + 1, // 2 pipes (1-2 PKRs) 2xaa pa @ HTILE_64K + 1, // 2 pipes (1-2 PKRs) 4xaa pa @ HTILE_64K + 1, // 2 pipes (1-2 PKRs) 8xaa pa @ HTILE_64K + 2, // 4 pipes (1-2 PKRs) 1xaa pa @ HTILE_64K + 2, // 4 pipes (1-2 PKRs) 2xaa pa @ HTILE_64K + 2, // 4 pipes (1-2 PKRs) 4xaa pa @ HTILE_64K + 2, // 4 pipes (1-2 PKRs) 8xaa pa @ HTILE_64K + 3, // 8 pipes (1-2 PKRs) 1xaa pa @ HTILE_64K + 3, // 8 pipes (1-2 PKRs) 2xaa pa @ HTILE_64K + 3, // 8 pipes (1-2 PKRs) 4xaa pa @ HTILE_64K + 3, // 8 pipes (1-2 PKRs) 8xaa pa @ HTILE_64K + 1, // 2 pipes (4 PKRs) 1xaa pa @ HTILE_64K + 1, // 2 pipes (4 PKRs) 2xaa pa @ HTILE_64K + 1, // 2 pipes (4 PKRs) 4xaa pa @ HTILE_64K + 1, // 2 pipes (4 PKRs) 8xaa pa @ HTILE_64K + 4, // 4 pipes (4 PKRs) 1xaa pa @ HTILE_64K + 4, // 4 pipes (4 PKRs) 2xaa pa @ HTILE_64K + 4, // 4 pipes (4 PKRs) 4xaa pa @ HTILE_64K + 4, // 4 pipes (4 PKRs) 8xaa pa @ HTILE_64K + 5, // 8 pipes (4 PKRs) 1xaa pa @ HTILE_64K + 5, // 8 pipes (4 PKRs) 2xaa pa @ HTILE_64K + 5, // 8 pipes (4 PKRs) 4xaa pa @ HTILE_64K + 5, // 8 pipes (4 PKRs) 8xaa pa @ HTILE_64K + 6, // 16 pipes (4 PKRs) 1xaa pa @ HTILE_64K + 6, // 16 pipes (4 PKRs) 2xaa pa @ HTILE_64K + 6, // 16 pipes (4 PKRs) 4xaa pa @ HTILE_64K + 6, // 16 pipes (4 PKRs) 8xaa pa @ HTILE_64K + 7, // 4 pipes (8 PKRs) 1xaa pa @ HTILE_64K + 7, // 4 pipes (8 PKRs) 2xaa pa @ HTILE_64K + 7, // 4 pipes (8 PKRs) 4xaa pa @ HTILE_64K + 7, // 4 pipes (8 PKRs) 8xaa pa @ HTILE_64K + 8, // 8 pipes (8 PKRs) 1xaa pa @ HTILE_64K + 8, // 8 pipes (8 PKRs) 2xaa pa @ HTILE_64K + 8, // 8 pipes (8 PKRs) 4xaa pa @ HTILE_64K + 8, // 8 pipes (8 PKRs) 8xaa pa @ HTILE_64K + 9, // 16 pipes (8 PKRs) 1xaa pa @ HTILE_64K + 9, // 16 pipes (8 PKRs) 2xaa pa @ HTILE_64K + 9, // 16 pipes (8 PKRs) 4xaa pa @ HTILE_64K + 9, // 16 pipes (8 PKRs) 8xaa pa @ HTILE_64K + 10, // 32 pipes (8 PKRs) 1xaa pa @ HTILE_64K + 10, // 32 pipes (8 PKRs) 2xaa pa @ HTILE_64K + 10, // 32 pipes (8 PKRs) 4xaa pa @ HTILE_64K + 10, // 32 pipes (8 PKRs) 8xaa pa @ HTILE_64K + 11, // 8 pipes (16 PKRs) 1xaa pa @ HTILE_64K + 11, // 8 pipes (16 PKRs) 2xaa pa @ HTILE_64K + 11, // 8 pipes (16 PKRs) 4xaa pa @ HTILE_64K + 11, // 8 pipes (16 PKRs) 8xaa pa @ HTILE_64K + 12, // 16 pipes (16 PKRs) 1xaa pa @ HTILE_64K + 12, // 16 pipes (16 PKRs) 2xaa pa @ HTILE_64K + 12, // 16 pipes (16 PKRs) 4xaa pa @ HTILE_64K + 12, // 16 pipes (16 PKRs) 8xaa pa @ HTILE_64K + 13, // 32 pipes (16 PKRs) 1xaa pa @ HTILE_64K + 13, // 32 pipes (16 PKRs) 2xaa pa @ HTILE_64K + 13, // 32 pipes (16 PKRs) 4xaa pa @ HTILE_64K + 13, // 32 pipes (16 PKRs) 8xaa pa @ HTILE_64K + 14, // 64 pipes (16 PKRs) 1xaa pa @ HTILE_64K + 14, // 64 pipes (16 PKRs) 2xaa pa @ HTILE_64K + 14, // 64 pipes (16 PKRs) 4xaa pa @ HTILE_64K + 14, // 64 pipes (16 PKRs) 8xaa pa @ HTILE_64K + 15, // 16 pipes (32 PKRs) 1xaa pa @ HTILE_64K + 15, // 16 pipes (32 PKRs) 2xaa pa @ HTILE_64K + 15, // 16 pipes (32 PKRs) 4xaa pa @ HTILE_64K + 15, // 16 pipes (32 PKRs) 8xaa pa @ HTILE_64K + 16, // 32 pipes (32 PKRs) 1xaa pa @ HTILE_64K + 16, // 32 pipes (32 PKRs) 2xaa pa @ HTILE_64K + 16, // 32 pipes (32 PKRs) 4xaa pa @ HTILE_64K + 16, // 32 pipes (32 PKRs) 8xaa pa @ HTILE_64K + 17, // 64 pipes (32 PKRs) 1xaa pa @ HTILE_64K + 17, // 64 pipes (32 PKRs) 2xaa pa @ HTILE_64K + 17, // 64 pipes (32 PKRs) 4xaa pa @ HTILE_64K + 17, // 64 pipes (32 PKRs) 8xaa pa @ HTILE_64K +}; + +const UINT_64 GFX11_DCC_R_X_SW_PATTERN[][17] = +{ + {0, X4, Y4, X5, Y5, X6, Y6, X7, Y7, X8, Y8, X9, Y9, 0, 0, 0, 0, }, //0 + {0, Y3, X4, Y4, X5, Y5, X6, Y6, X7, Y7, X8, Y8, X9, 0, 0, 0, 0, }, //1 + {0, X3, Y3, X4, Y4, X5, Y5, X6, Y6, X7, Y7, X8, Y8, 0, 0, 0, 0, }, //2 + {0, Y2, X3, Y3, X4, Y4, X5, Y5, X6, Y6, X7, Y7, X8, 0, 0, 0, 0, }, //3 + {0, X2, Y2, X3, Y3, X4, Y4, X5, Y5, X6, Y6, X7, Y7, 0, 0, 0, 0, }, //4 + {0, Y4, X5, Y5, X6, Y6, X7, Y7, X8, Z0^X4^Y4, Y8, X9, Y9, 0, 0, 0, 0, }, //5 + {0, Y3, Y4, X5, Y5, X6, Y6, X7, Y7, Z0^X4^Y4, X8, Y8, X9, 0, 0, 0, 0, }, //6 + {0, X3, Y3, Y4, X5, Y5, X6, Y6, X7, Z0^X4^Y4, Y7, X8, Y8, 0, 0, 0, 0, }, //7 + {0, Y2, X3, Y3, Y4, X5, Y5, X6, Y6, Z0^X4^Y4, X7, Y7, X8, 0, 0, 0, 0, }, //8 + {0, X2, Y2, X3, Y3, Y4, X5, Y5, X6, Z0^X4^Y4, Y6, X7, Y7, 0, 0, 0, 0, }, //9 + {0, X5, Y5, X6, Y6, X7, Y7, X8, Y8, Y4^X5^Y5, Z0^X4^Y4, X9, Y9, 0, 0, 0, 0, }, //10 + {0, Y3, X5, Y5, X6, Y6, X7, Y7, X8, Y4^X5^Y5, Z0^X4^Y4, Y8, X9, 0, 0, 0, 0, }, //11 + {0, X3, Y3, X5, Y5, X6, Y6, X7, Y7, Y4^X5^Y5, Z0^X4^Y4, X8, Y8, 0, 0, 0, 0, }, //12 + {0, Y2, X3, Y3, X5, Y5, X6, Y6, X7, Y4^X5^Y5, Z0^X4^Y4, Y7, X8, 0, 0, 0, 0, }, //13 + {0, X2, Y2, X3, Y3, X5, Y5, X6, Y6, Y4^X5^Y5, Z0^X4^Y4, X7, Y7, 0, 0, 0, 0, }, //14 + {0, Y5, X6, Y6, X7, Y7, X8, Y8, X9, Y4^X5^Y5, Z0^X4^Y4, X5^Y5, Y9, 0, 0, 0, 0, }, //15 + {0, Y3, Y5, X6, Y6, X7, Y7, X8, Y8, Y4^X5^Y5, Z0^X4^Y4, X5^Y5, X9, 0, 0, 0, 0, }, //16 + {0, X3, Y3, Y5, X6, Y6, X7, Y7, X8, Y4^X5^Y5, Z0^X4^Y4, X5^Y5, Y8, 0, 0, 0, 0, }, //17 + {0, Y2, X3, Y3, Y5, X6, Y6, X7, Y7, Y4^X5^Y5, Z0^X4^Y4, X5^Y5, X8, 0, 0, 0, 0, }, //18 + {0, X2, Y2, X3, Y3, Y5, X6, Y6, X7, Y4^X5^Y5, Z0^X4^Y4, X5^Y5, Y7, 0, 0, 0, 0, }, //19 + {0, X5, X6, Y6, X7, Y7, X8, Y8, X9, Y4^X6^Y6, Z1^X4^Y4, X5^Y5, Y9, 0, 0, 0, 0, }, //20 + {0, Y3, X5, X6, Y6, X7, Y7, X8, Y8, Y4^X6^Y6, Z1^X4^Y4, X5^Y5, X9, 0, 0, 0, 0, }, //21 + {0, X3, Y3, X5, X6, Y6, X7, Y7, X8, Y4^X6^Y6, Z1^X4^Y4, X5^Y5, Y8, 0, 0, 0, 0, }, //22 + {0, Y2, X3, Y3, X5, X6, Y6, X7, Y7, Y4^X6^Y6, Z1^X4^Y4, X5^Y5, X8, 0, 0, 0, 0, }, //23 + {0, X2, Y2, X3, Y3, X5, X6, Y6, X7, Y4^X6^Y6, Z1^X4^Y4, X5^Y5, Y7, 0, 0, 0, 0, }, //24 + {0, X5, X6, Y6, X7, Y7, X8, Y8, X9, Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, Y9, 0, 0, 0, 0, }, //25 + {0, Y3, X5, X6, Y6, X7, Y7, X8, Y8, Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, X9, 0, 0, 0, 0, }, //26 + {0, X3, Y3, X5, X6, Y6, X7, Y7, X8, Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, Y8, 0, 0, 0, 0, }, //27 + {0, Y2, X3, Y3, X5, X6, Y6, X7, Y7, Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, X8, 0, 0, 0, 0, }, //28 + {0, X2, Y2, X3, Y3, X5, X6, Y6, X7, Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, Y7, 0, 0, 0, 0, }, //29 + {0, X6, Y6, X7, Y7, X8, Y8, X9, Y9, Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, X5^Y6, 0, 0, 0, 0, }, //30 + {0, Y3, X6, Y6, X7, Y7, X8, Y8, X9, Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, X5^Y6, 0, 0, 0, 0, }, //31 + {0, X3, Y3, X6, Y6, X7, Y7, X8, Y8, Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, X5^Y6, 0, 0, 0, 0, }, //32 + {0, Y2, X3, Y3, X6, Y6, X7, Y7, X8, Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, X5^Y6, 0, 0, 0, 0, }, //33 + {0, X2, Y2, X3, Y3, X6, Y6, X7, Y7, Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, X5^Y6, 0, 0, 0, 0, }, //34 + {0, X6, Y6, X7, Y7, X8, Y8, X9, Y9, Y4^X7^Y7, Z1^X4^Y4, Z0^Y5^X6, X5^Y6, 0, 0, 0, 0, }, //35 + {0, Y3, X6, Y6, X7, Y7, X8, Y8, X9, Y4^X7^Y7, Z1^X4^Y4, Z0^Y5^X6, X5^Y6, 0, 0, 0, 0, }, //36 + {0, X3, Y3, X6, Y6, X7, Y7, X8, Y8, Y4^X7^Y7, Z1^X4^Y4, Z0^Y5^X6, X5^Y6, 0, 0, 0, 0, }, //37 + {0, Y2, X3, Y3, X6, Y6, X7, Y7, X8, Y4^X7^Y7, Z2^X4^Y4, Z1^Y5^X6, X5^Y6, 0, 0, 0, 0, }, //38 + {0, X2, Y2, X3, Y3, X6, Y6, X7, Y7, Y4^X7^Y7, Z2^X4^Y4, Z1^Y5^X6, X5^Y6, 0, 0, 0, 0, }, //39 + {0, Y2, X3, Y3, X6, Y6, X7, Y7, X8, Y4^X7^Y7, Z2^X4^Y4, Z1^Y5^X6, Z0^X5^Y6, 0, 0, 0, 0, }, //40 + {0, X2, Y2, X3, Y3, X6, Y6, X7, Y7, Y4^X7^Y7, Z2^X4^Y4, Z1^Y5^X6, Z0^X5^Y6, 0, 0, 0, 0, }, //41 + {0, Y6, X7, Y7, X8, Y8, X9, Y9, X10, Y4^X7^Y7, Z1^X4^Y4, Z0^Y5^X6, X5^Y6, X6^Y6, 0, 0, 0, }, //42 + {0, Y3, Y6, X7, Y7, X8, Y8, X9, Y9, Y4^X7^Y7, Z1^X4^Y4, Z0^Y5^X6, X5^Y6, X6^Y6, 0, 0, 0, }, //43 + {0, X3, Y3, Y6, X7, Y7, X8, Y8, X9, Y4^X7^Y7, Z1^X4^Y4, Z0^Y5^X6, X5^Y6, X6^Y6, 0, 0, 0, }, //44 + {0, Y2, X3, Y3, Y6, X7, Y7, X8, Y8, Y4^X7^Y7, Z2^X4^Y4, Z1^Y5^X6, Z0^X5^Y6, X6^Y6, 0, 0, 0, }, //45 + {0, X2, Y2, Y3, X6, Y6, X7, Y7, X8, Y4^X7^Y7, Z2^X4^Y4, Z1^Y5^X6, Z0^X5^Y6, X3^Y6, 0, 0, 0, }, //46 + {0, X6, X7, Y7, X8, Y8, X9, Y9, X10, Y4^X8^Y8, Z1^X4^Y4, Z0^Y5^X7, X5^Y7, X6^Y6, 0, 0, 0, }, //47 + {0, Y3, X6, X7, Y7, X8, Y8, X9, Y9, Y4^X8^Y8, Z1^X4^Y4, Z0^Y5^X7, X5^Y7, X6^Y6, 0, 0, 0, }, //48 + {0, X3, Y3, X6, X7, Y7, X8, Y8, X9, Y4^X8^Y8, Z1^X4^Y4, Z0^Y5^X7, X5^Y7, X6^Y6, 0, 0, 0, }, //49 + {0, Y2, X3, Y3, X6, X7, Y7, X8, Y8, Y4^X8^Y8, Z3^X4^Y4, Z2^Y5^X7, Z1^X5^Y7, X6^Y6, 0, 0, 0, }, //50 + {0, X2, X3, Y3, X6, X7, Y7, Y2, X8, Y4^X8^Y8, Z2^X4^Y4, Z1^Y5^X7, Z0^X5^Y7, X6^Y6, 0, 0, 0, }, //51 + {0, Y2, X3, Y3, X6, X7, Y7, X8, Y8, Y4^X8^Y8, Z3^X4^Y4, Z2^Y5^X7, Z1^X5^Y7, Z0^X6^Y6, 0, 0, 0, }, //52 + {0, X2, X3, Y3, X6, X7, Y7, Y2, X8, Y4^X8^Y8, Z2^X4^Y4, Z1^Y5^X7, Z0^X5^Y7, Y2^X6^Y6, 0, 0, 0, }, //53 + {0, X7, Y7, X8, Y8, X9, Y9, X10, Y10, Y4^X8^Y8, Z1^X4^Y4, Z0^Y5^X7, X5^Y7, X6^Y6, X6^Y8, 0, 0, }, //54 + {0, Y3, X7, Y7, X8, Y8, X9, Y9, X10, Y4^X8^Y8, Z1^X4^Y4, Z0^Y5^X7, X5^Y7, X6^Y6, X6^Y8, 0, 0, }, //55 + {0, X3, Y3, X7, Y7, X8, Y8, X9, Y9, Y4^X8^Y8, Z1^X4^Y4, Z0^Y5^X7, X5^Y7, X6^Y6, X6^Y8, 0, 0, }, //56 + {0, Y2, Y3, X6, X7, Y7, X8, Y8, X9, Y4^X8^Y8, Z3^X4^Y4, Z2^Y5^X7, Z1^X5^Y7, Z0^X6^Y6, X3^Y8, 0, 0, }, //57 + {0, X2, Y3, X6, X7, Y7, X8, Y2, Y8, Y4^X8^Y8, Z2^X4^Y4, Z1^Y5^X7, Z0^X5^Y7, Y2^X6^Y6, X3^Y8, 0, 0, }, //58 + {0, X7, Y7, X8, Y8, X9, Y9, X10, Y10, Y4^X9^Y9, Z1^X4^Y4, Z0^Y5^X8, X5^Y8, Y6^X7, X6^Y7, 0, 0, }, //59 + {0, Y3, X7, Y7, X8, Y8, X9, Y9, X10, Y4^X9^Y9, Z1^X4^Y4, Z0^Y5^X8, X5^Y8, Y6^X7, X6^Y7, 0, 0, }, //60 + {0, X3, Y3, X7, Y7, X8, Y8, X9, Y9, Y4^X9^Y9, Z1^X4^Y4, Z0^Y5^X8, X5^Y8, Y6^X7, X6^Y7, 0, 0, }, //61 + {0, X3, Y3, X7, Y7, X8, Y8, Y2, X9, Y4^X9^Y9, Z3^X4^Y4, Z2^Y5^X8, Z1^X5^Y8, Y2^Y6^X7, X6^Y7, 0, 0, }, //62 + {0, X3, Y3, X7, Y7, X8, Y8, X2, Y2, Y4^X9^Y9, Z2^X4^Y4, Z1^Y5^X8, Z0^X5^Y8, Y2^Y6^X7, X6^Y7, 0, 0, }, //63 + {0, X3, Y3, X7, Y7, X8, Y8, Y2, X9, Y4^X9^Y9, Z3^X4^Y4, Z2^Y5^X8, Z1^X5^Y8, Y2^Y6^X7, Z0^X6^Y7, 0, 0, }, //64 + {0, X3, Y3, X7, Y7, X8, Y8, X2, Y2, Y4^X9^Y9, Z2^X4^Y4, Z1^Y5^X8, Z0^X5^Y8, Y2^Y6^X7, X2^X6^Y7, 0, 0, }, //65 + {0, X2, Y2, X3, Y3, Y6, X7, Y7, X8, Y4^X7^Y7, Z2^X4^Y4, Z1^Y5^X6, Z0^X5^Y6, X6^Y6, 0, 0, 0, }, //66 + {0, X2, Y2, X3, Y3, X6, X7, Y7, X8, Y4^X8^Y8, Z3^X4^Y4, Z2^Y5^X7, Z1^X5^Y7, X6^Y6, 0, 0, 0, }, //67 + {0, X2, Y2, X3, Y3, X6, X7, Y7, X8, Y4^X8^Y8, Z3^X4^Y4, Z2^Y5^X7, Z1^X5^Y7, Z0^X6^Y6, 0, 0, 0, }, //68 + {0, Y2, X3, Y3, X7, Y7, X8, Y8, X9, Y4^X8^Y8, Z3^X4^Y4, Z2^Y5^X7, Z1^X5^Y7, Z0^X6^Y6, X6^Y8, 0, 0, }, //69 + {0, X2, Y2, X3, Y3, X7, Y7, X8, Y8, Y4^X8^Y8, Z3^X4^Y4, Z2^Y5^X7, Z1^X5^Y7, Z0^X6^Y6, X6^Y8, 0, 0, }, //70 + {0, Y2, X3, Y3, X7, Y7, X8, Y8, X9, Y4^X9^Y9, X4^Y4^Z4, Z3^Y5^X8, Z2^X5^Y8, Z1^Y6^X7, X6^Y7, 0, 0, }, //71 + {0, X2, Y2, X3, Y3, X7, Y7, X8, Y8, Y4^X9^Y9, X4^Y4^Z4, Z3^Y5^X8, Z2^X5^Y8, Z1^Y6^X7, X6^Y7, 0, 0, }, //72 + {0, Y2, X3, Y3, X7, Y7, X8, Y8, X9, Y4^X9^Y9, X4^Y4^Z4, Z3^Y5^X8, Z2^X5^Y8, Z1^Y6^X7, Z0^X6^Y7, 0, 0, }, //73 + {0, X2, Y2, X3, Y3, X7, Y7, X8, Y8, Y4^X9^Y9, X4^Y4^Z4, Z3^Y5^X8, Z2^X5^Y8, Z1^Y6^X7, Z0^X6^Y7, 0, 0, }, //74 +}; + +const UINT_64 GFX11_HTILE_SW_PATTERN[][18] = +{ + {0, 0, 0, X3, Y3, X4, Y4, X5, Y5, X6, Y6, X7, Y7, 0, 0, 0, 0, 0, }, //0 + {0, 0, 0, X3, Y3, Y4, X5, Y5, X6, Z0^X4^Y4, Y6, X7, Y7, 0, 0, 0, 0, 0, }, //1 + {0, 0, 0, X3, Y3, X5, Y5, X6, Y6, Y4^X5^Y5, Z0^X4^Y4, X7, Y7, X8, 0, 0, 0, 0, }, //2 + {0, 0, 0, X3, Y3, Y5, X6, Y6, X7, Y4^X5^Y5, Z0^X4^Y4, X5^Y5, Y7, X8, Y8, 0, 0, 0, }, //3 + {0, 0, 0, X3, Y3, X5, X6, Y6, X7, Y4^X6^Y6, Z1^X4^Y4, Y7, X8, Y8, X5^Y5, 0, 0, 0, }, //4 + {0, 0, 0, X3, Y3, X5, X6, Y6, X7, Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, Y7, X8, Y8, 0, 0, 0, }, //5 + {0, 0, 0, X3, Y3, X6, Y6, X7, Y7, Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, X5^Y6, X8, Y8, X9, 0, 0, }, //6 + {0, 0, 0, X3, Y3, Y4, X5, X6, Y6, Z1^X4^Y4, Z0^X5^Y5, X7, Y7, X8, 0, 0, 0, 0, }, //7 + {0, 0, 0, X3, Y3, X6, Y6, X7, Y7, Y4^X7^Y7, Z1^X4^Y4, Z0^Y5^X6, X8, Y8, X9, X5^Y6, 0, 0, }, //8 + {0, 0, 0, X3, Y3, X6, Y6, X7, Y7, Y4^X7^Y7, Z1^X4^Y4, Z0^Y5^X6, X5^Y6, X8, Y8, X9, 0, 0, }, //9 + {0, 0, 0, X3, Y3, Y6, X7, Y7, X8, Y4^X7^Y7, Z1^X4^Y4, Z0^Y5^X6, X5^Y6, X6^Y6, Y8, X9, Y9, 0, }, //10 + {0, 0, 0, X3, Y3, Y4, X6, Y6, X7, Z1^X4^Y4, Z0^Y5^X6, X5^Y6, Y7, X8, Y8, 0, 0, 0, }, //11 + {0, 0, 0, X3, Y3, X6, X7, Y7, X8, Y4^X8^Y8, Z1^X4^Y4, Z0^Y5^X7, X5^Y7, Y8, X9, Y9, X6^Y6, 0, }, //12 + {0, 0, 0, X3, Y3, X6, X7, Y7, X8, Y4^X8^Y8, Z1^X4^Y4, Z0^Y5^X7, X5^Y7, X6^Y6, Y8, X9, Y9, 0, }, //13 + {0, 0, 0, X3, Y3, X7, Y7, X8, Y8, Y4^X8^Y8, Z1^X4^Y4, Z0^Y5^X7, X5^Y7, X6^Y6, X6^Y8, X9, Y9, X10, }, //14 + {0, 0, 0, X3, Y3, Y4, X6, X7, Y7, Z1^X4^Y4, Z0^Y5^X7, X5^Y7, X6^Y6, X8, Y8, X9, 0, 0, }, //15 + {0, 0, 0, X3, Y3, X7, Y7, X8, Y8, Y4^X9^Y9, Z1^X4^Y4, Z0^Y5^X8, X5^Y8, Y6^X7, X9, Y9, X10, X6^Y7, }, //16 + {0, 0, 0, X3, Y3, X7, Y7, X8, Y8, Y4^X9^Y9, Z1^X4^Y4, Z0^Y5^X8, X5^Y8, Y6^X7, X6^Y7, X9, Y9, X10, }, //17 +}; + +} // V2 +} // Addr +} // rocr +#endif diff --git a/runtime/hsa-runtime/image/addrlib/src/gfx11/gfx11addrlib.cpp b/runtime/hsa-runtime/image/addrlib/src/gfx11/gfx11addrlib.cpp new file mode 100644 index 0000000000..f3aa3001f7 --- /dev/null +++ b/runtime/hsa-runtime/image/addrlib/src/gfx11/gfx11addrlib.cpp @@ -0,0 +1,4251 @@ +/* +************************************************************************************************************************ +* +* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +* OTHER DEALINGS IN THE SOFTWARE +* +***********************************************************************************************************************/ + +/** +************************************************************************************************************************ +* @file gfx11addrlib.cpp +* @brief Contain the implementation for the Gfx11Lib class. +************************************************************************************************************************ +*/ + +#include "gfx11addrlib.h" +#include "gfx11_gb_reg.h" + +#include "amdgpu_asic_addr.h" + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// + +namespace rocr { +namespace Addr { +/** +************************************************************************************************************************ +* Gfx11HwlInit +* +* @brief +* Creates an Gfx11Lib object. +* +* @return +* Returns an Gfx11Lib object pointer. +************************************************************************************************************************ +*/ +Addr::Lib* Gfx11HwlInit(const Client* pClient) +{ + return V2::Gfx11Lib::CreateObj(pClient); +} + +namespace V2 +{ + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// Static Const Member +//////////////////////////////////////////////////////////////////////////////////////////////////// + +const SwizzleModeFlags Gfx11Lib::SwizzleModeTable[ADDR_SW_MAX_TYPE] = +{//Linear 256B 4KB 64KB 256KB Z Std Disp Rot XOR T RtOpt Reserved + {{1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // ADDR_SW_LINEAR + {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved + {{0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0}}, // ADDR_SW_256B_D + {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved + + {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved + {{0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0}}, // ADDR_SW_4KB_S + {{0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0}}, // ADDR_SW_4KB_D + {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved + + {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved + {{0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0}}, // ADDR_SW_64KB_S + {{0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0}}, // ADDR_SW_64KB_D + {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved + + {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved + {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved + {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved + {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved + + {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved + {{0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 1, 0, 0}}, // ADDR_SW_64KB_S_T + {{0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 0, 0}}, // ADDR_SW_64KB_D_T + {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved + + {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved + {{0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0}}, // ADDR_SW_4KB_S_X + {{0, 0, 1, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0}}, // ADDR_SW_4KB_D_X + {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved + + {{0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0}}, // ADDR_SW_64KB_Z_X + {{0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0}}, // ADDR_SW_64KB_S_X + {{0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 0, 0, 0}}, // ADDR_SW_64KB_D_X + {{0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0}}, // ADDR_SW_64KB_R_X + + {{0, 0, 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0}}, // ADDR_SW_256KB_Z_X + {{0, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0}}, // ADDR_SW_256KB_S_X + {{0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0}}, // ADDR_SW_256KB_D_X + {{0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 1, 0}}, // ADDR_SW_256KB_R_X + {{1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // ADDR_SW_LINEAR_GENERAL +}; + +const Dim3d Gfx11Lib::Block256_3d[] = {{8, 4, 8}, {4, 4, 8}, {4, 4, 4}, {4, 2, 4}, {2, 2, 4}}; + +const Dim3d Gfx11Lib::Block256K_Log2_3d[] = {{6, 6, 6}, {5, 6, 6}, {5, 6, 5}, {5, 5, 5}, {4, 5, 5}}; +const Dim3d Gfx11Lib::Block64K_Log2_3d[] = {{6, 5, 5}, {5, 5, 5}, {5, 5, 4}, {5, 4, 4}, {4, 4, 4}}; +const Dim3d Gfx11Lib::Block4K_Log2_3d[] = {{4, 4, 4}, {3, 4, 4}, {3, 4, 3}, {3, 3, 3}, {2, 3, 3}}; + +/** +************************************************************************************************************************ +* Gfx11Lib::Gfx11Lib +* +* @brief +* Constructor +* +************************************************************************************************************************ +*/ +Gfx11Lib::Gfx11Lib(const Client* pClient) + : + Lib(pClient), + m_numPkrLog2(0), + m_numSaLog2(0), + m_colorBaseIndex(0), + m_htileBaseIndex(0), + m_dccBaseIndex(0) +{ + memset(&m_settings, 0, sizeof(m_settings)); + memcpy(m_swizzleModeTable, SwizzleModeTable, sizeof(SwizzleModeTable)); +} + +/** +************************************************************************************************************************ +* Gfx11Lib::~Gfx11Lib +* +* @brief +* Destructor +************************************************************************************************************************ +*/ +Gfx11Lib::~Gfx11Lib() +{ +} + +/** +************************************************************************************************************************ +* Gfx11Lib::HwlComputeHtileInfo +* +* @brief +* Interface function stub of AddrComputeHtilenfo +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx11Lib::HwlComputeHtileInfo( + const ADDR2_COMPUTE_HTILE_INFO_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_HTILE_INFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE ret = ADDR_OK; + + if ((pIn->swizzleMode != ADDR_SW_64KB_Z_X) && + (pIn->swizzleMode != ADDR_SW_256KB_Z_X) && + (pIn->hTileFlags.pipeAligned != TRUE)) + { + ret = ADDR_INVALIDPARAMS; + } + else + { + Dim3d metaBlk = {}; + const UINT_32 metaBlkSize = GetMetaBlkSize(Gfx11DataDepthStencil, + ADDR_RSRC_TEX_2D, + pIn->swizzleMode, + 0, + 0, + TRUE, + &metaBlk); + + pOut->pitch = PowTwoAlign(pIn->unalignedWidth, metaBlk.w); + pOut->height = PowTwoAlign(pIn->unalignedHeight, metaBlk.h); + pOut->baseAlign = Max(metaBlkSize, 1u << (m_pipesLog2 + 11u)); + pOut->metaBlkWidth = metaBlk.w; + pOut->metaBlkHeight = metaBlk.h; + + if (pIn->numMipLevels > 1) + { + ADDR_ASSERT(pIn->firstMipIdInTail <= pIn->numMipLevels); + + UINT_32 offset = (pIn->firstMipIdInTail == pIn->numMipLevels) ? 0 : metaBlkSize; + + for (INT_32 i = static_cast(pIn->firstMipIdInTail) - 1; i >=0; i--) + { + UINT_32 mipWidth, mipHeight; + + GetMipSize(pIn->unalignedWidth, pIn->unalignedHeight, 1, i, &mipWidth, &mipHeight); + + mipWidth = PowTwoAlign(mipWidth, metaBlk.w); + mipHeight = PowTwoAlign(mipHeight, metaBlk.h); + + const UINT_32 pitchInM = mipWidth / metaBlk.w; + const UINT_32 heightInM = mipHeight / metaBlk.h; + const UINT_32 mipSliceSize = pitchInM * heightInM * metaBlkSize; + + if (pOut->pMipInfo != NULL) + { + pOut->pMipInfo[i].inMiptail = FALSE; + pOut->pMipInfo[i].offset = offset; + pOut->pMipInfo[i].sliceSize = mipSliceSize; + } + + offset += mipSliceSize; + } + + pOut->sliceSize = offset; + pOut->metaBlkNumPerSlice = offset / metaBlkSize; + pOut->htileBytes = pOut->sliceSize * pIn->numSlices; + + if (pOut->pMipInfo != NULL) + { + for (UINT_32 i = pIn->firstMipIdInTail; i < pIn->numMipLevels; i++) + { + pOut->pMipInfo[i].inMiptail = TRUE; + pOut->pMipInfo[i].offset = 0; + pOut->pMipInfo[i].sliceSize = 0; + } + + if (pIn->firstMipIdInTail != pIn->numMipLevels) + { + pOut->pMipInfo[pIn->firstMipIdInTail].sliceSize = metaBlkSize; + } + } + } + else + { + const UINT_32 pitchInM = pOut->pitch / metaBlk.w; + const UINT_32 heightInM = pOut->height / metaBlk.h; + + pOut->metaBlkNumPerSlice = pitchInM * heightInM; + pOut->sliceSize = pOut->metaBlkNumPerSlice * metaBlkSize; + pOut->htileBytes = pOut->sliceSize * pIn->numSlices; + + if (pOut->pMipInfo != NULL) + { + pOut->pMipInfo[0].inMiptail = FALSE; + pOut->pMipInfo[0].offset = 0; + pOut->pMipInfo[0].sliceSize = pOut->sliceSize; + } + } + + // Get the HTILE address equation (copied from HtileAddrFromCoord). + // HTILE addressing depends on the number of samples, but this code doesn't support it yet. + const UINT_32 index = m_htileBaseIndex; + const UINT_8* patIdxTable = GFX11_HTILE_PATIDX; + + ADDR_C_ASSERT(sizeof(GFX11_HTILE_SW_PATTERN[patIdxTable[index]]) == 72 * 2); + pOut->equation.gfx10_bits = (UINT_16 *)GFX11_HTILE_SW_PATTERN[patIdxTable[index]]; + } + + return ret; +} + +/** +************************************************************************************************************************ +* Gfx11Lib::HwlComputeDccInfo +* +* @brief +* Interface function to compute DCC key info +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx11Lib::HwlComputeDccInfo( + const ADDR2_COMPUTE_DCCINFO_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_DCCINFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE ret = ADDR_OK; + + if (IsLinear(pIn->swizzleMode) || IsBlock256b(pIn->swizzleMode)) + { + ret = ADDR_INVALIDPARAMS; + } + else + { + const UINT_32 elemLog2 = Log2(pIn->bpp >> 3); + + const BOOL_32 isThick = IsThick(pIn->resourceType, pIn->swizzleMode); + + pOut->compressBlkWidth = isThick ? Block256_3d[elemLog2].w : Block256_2d[elemLog2].w; + pOut->compressBlkHeight = isThick ? Block256_3d[elemLog2].h : Block256_2d[elemLog2].h; + pOut->compressBlkDepth = isThick ? Block256_3d[elemLog2].d : 1; + + if (ret == ADDR_OK) + { + Dim3d metaBlk = {}; + const UINT_32 numFragLog2 = Log2(Max(pIn->numFrags, 1u)); + const UINT_32 metaBlkSize = GetMetaBlkSize(Gfx11DataColor, + pIn->resourceType, + pIn->swizzleMode, + elemLog2, + numFragLog2, + pIn->dccKeyFlags.pipeAligned, + &metaBlk); + + pOut->dccRamBaseAlign = metaBlkSize; + pOut->metaBlkWidth = metaBlk.w; + pOut->metaBlkHeight = metaBlk.h; + pOut->metaBlkDepth = metaBlk.d; + pOut->metaBlkSize = metaBlkSize; + + pOut->pitch = PowTwoAlign(pIn->unalignedWidth, metaBlk.w); + pOut->height = PowTwoAlign(pIn->unalignedHeight, metaBlk.h); + pOut->depth = PowTwoAlign(Max(pIn->numSlices, 1u), metaBlk.d); + + if (pIn->numMipLevels > 1) + { + ADDR_ASSERT(pIn->firstMipIdInTail <= pIn->numMipLevels); + + UINT_32 offset = (pIn->firstMipIdInTail == pIn->numMipLevels) ? 0 : metaBlkSize; + + for (INT_32 i = static_cast(pIn->firstMipIdInTail) - 1; i >= 0; i--) + { + UINT_32 mipWidth, mipHeight; + + GetMipSize(pIn->unalignedWidth, pIn->unalignedHeight, 1, i, &mipWidth, &mipHeight); + + mipWidth = PowTwoAlign(mipWidth, metaBlk.w); + mipHeight = PowTwoAlign(mipHeight, metaBlk.h); + + const UINT_32 pitchInM = mipWidth / metaBlk.w; + const UINT_32 heightInM = mipHeight / metaBlk.h; + const UINT_32 mipSliceSize = pitchInM * heightInM * metaBlkSize; + + if (pOut->pMipInfo != NULL) + { + pOut->pMipInfo[i].inMiptail = FALSE; + pOut->pMipInfo[i].offset = offset; + pOut->pMipInfo[i].sliceSize = mipSliceSize; + } + + offset += mipSliceSize; + } + + pOut->dccRamSliceSize = offset; + pOut->metaBlkNumPerSlice = offset / metaBlkSize; + pOut->dccRamSize = pOut->dccRamSliceSize * (pOut->depth / metaBlk.d); + + if (pOut->pMipInfo != NULL) + { + for (UINT_32 i = pIn->firstMipIdInTail; i < pIn->numMipLevels; i++) + { + pOut->pMipInfo[i].inMiptail = TRUE; + pOut->pMipInfo[i].offset = 0; + pOut->pMipInfo[i].sliceSize = 0; + } + + if (pIn->firstMipIdInTail != pIn->numMipLevels) + { + pOut->pMipInfo[pIn->firstMipIdInTail].sliceSize = metaBlkSize; + } + } + } + else + { + const UINT_32 pitchInM = pOut->pitch / metaBlk.w; + const UINT_32 heightInM = pOut->height / metaBlk.h; + + pOut->metaBlkNumPerSlice = pitchInM * heightInM; + pOut->dccRamSliceSize = pOut->metaBlkNumPerSlice * metaBlkSize; + pOut->dccRamSize = pOut->dccRamSliceSize * (pOut->depth / metaBlk.d); + + if (pOut->pMipInfo != NULL) + { + pOut->pMipInfo[0].inMiptail = FALSE; + pOut->pMipInfo[0].offset = 0; + pOut->pMipInfo[0].sliceSize = pOut->dccRamSliceSize; + } + } + + // Get the DCC address equation (copied from DccAddrFromCoord) + const UINT_32 elemLog2 = Log2(pIn->bpp >> 3); + const UINT_32 numPipeLog2 = m_pipesLog2; + UINT_32 index = m_dccBaseIndex + elemLog2; + const UINT_8* patIdxTable = (pIn->swizzleMode == ADDR_SW_64KB_R_X) ? + GFX11_DCC_64K_R_X_PATIDX : GFX11_DCC_256K_R_X_PATIDX; + + if (pIn->dccKeyFlags.pipeAligned) + { + index += MaxNumOfBpp; + + if (m_numPkrLog2 < 2) + { + index += m_pipesLog2 * MaxNumOfBpp; + } + else + { + // 4 groups for "m_numPkrLog2 < 2" case + index += 4 * MaxNumOfBpp; + + const UINT_32 dccPipePerPkr = 3; + + index += (m_numPkrLog2 - 2) * dccPipePerPkr * MaxNumOfBpp + + (m_pipesLog2 - m_numPkrLog2) * MaxNumOfBpp; + } + } + + ADDR_C_ASSERT(sizeof(GFX11_DCC_R_X_SW_PATTERN[patIdxTable[index]]) == 68 * 2); + pOut->equation.gfx10_bits = (UINT_16*)GFX11_DCC_R_X_SW_PATTERN[patIdxTable[index]]; + } + } + + return ret; +} + +/** +************************************************************************************************************************ +* Gfx11Lib::HwlComputeHtileAddrFromCoord +* +* @brief +* Interface function stub of AddrComputeHtileAddrFromCoord +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx11Lib::HwlComputeHtileAddrFromCoord( + const ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut) ///< [out] output structure +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pIn->numMipLevels > 1) + { + returnCode = ADDR_NOTIMPLEMENTED; + } + else + { + ADDR2_COMPUTE_HTILE_INFO_INPUT input = {}; + input.size = sizeof(input); + input.hTileFlags = pIn->hTileFlags; + input.depthFlags = pIn->depthflags; + input.swizzleMode = pIn->swizzleMode; + input.unalignedWidth = Max(pIn->unalignedWidth, 1u); + input.unalignedHeight = Max(pIn->unalignedHeight, 1u); + input.numSlices = Max(pIn->numSlices, 1u); + input.numMipLevels = 1; + + ADDR2_COMPUTE_HTILE_INFO_OUTPUT output = {}; + output.size = sizeof(output); + + returnCode = ComputeHtileInfo(&input, &output); + + if (returnCode == ADDR_OK) + { + const UINT_32 numSampleLog2 = Log2(pIn->numSamples); + const UINT_32 pipeMask = (1 << m_pipesLog2) - 1; + const UINT_32 index = m_htileBaseIndex + numSampleLog2; + const UINT_8* patIdxTable = GFX11_HTILE_PATIDX; + const UINT_32 blkSizeLog2 = Log2(output.metaBlkWidth) + Log2(output.metaBlkHeight) - 4; + const UINT_32 blkMask = (1 << blkSizeLog2) - 1; + const UINT_32 blkOffset = ComputeOffsetFromSwizzlePattern(GFX11_HTILE_SW_PATTERN[patIdxTable[index]], + blkSizeLog2 + 1, // +1 for nibble offset + pIn->x, + pIn->y, + pIn->slice, + 0); + const UINT_32 xb = pIn->x / output.metaBlkWidth; + const UINT_32 yb = pIn->y / output.metaBlkHeight; + const UINT_32 pb = output.pitch / output.metaBlkWidth; + const UINT_32 blkIndex = (yb * pb) + xb; + const UINT_32 pipeXor = ((pIn->pipeXor & pipeMask) << m_pipeInterleaveLog2) & blkMask; + + pOut->addr = (static_cast(output.sliceSize) * pIn->slice) + + (blkIndex * (1 << blkSizeLog2)) + + ((blkOffset >> 1) ^ pipeXor); + } + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Gfx11Lib::HwlComputeHtileCoordFromAddr +* +* @brief +* Interface function stub of AddrComputeHtileCoordFromAddr +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx11Lib::HwlComputeHtileCoordFromAddr( + const ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut) ///< [out] output structure +{ + ADDR_NOT_IMPLEMENTED(); + + return ADDR_OK; +} + +/** +************************************************************************************************************************ +* Gfx11Lib::HwlSupportComputeDccAddrFromCoord +* +* @brief +* Check whether HwlComputeDccAddrFromCoord() can be done for the input parameter +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx11Lib::HwlSupportComputeDccAddrFromCoord( + const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn) +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if ((pIn->resourceType != ADDR_RSRC_TEX_2D) || + ((pIn->swizzleMode != ADDR_SW_64KB_R_X) && + (pIn->swizzleMode != ADDR_SW_256KB_R_X)) || + (pIn->dccKeyFlags.linear == TRUE) || + (pIn->numFrags > 1) || + (pIn->numMipLevels > 1) || + (pIn->mipId > 0)) + { + returnCode = ADDR_NOTSUPPORTED; + } + else if ((pIn->pitch == 0) || + (pIn->metaBlkWidth == 0) || + (pIn->metaBlkHeight == 0) || + (pIn->slice > 0 && pIn->dccRamSliceSize == 0)) + { + returnCode = ADDR_NOTSUPPORTED; + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Gfx11Lib::HwlComputeDccAddrFromCoord +* +* @brief +* Interface function stub of AddrComputeDccAddrFromCoord +* +* @return +* N/A +************************************************************************************************************************ +*/ +VOID Gfx11Lib::HwlComputeDccAddrFromCoord( + const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT* pOut) ///< [out] output structure +{ + const UINT_32 elemLog2 = Log2(pIn->bpp >> 3); + const UINT_32 numPipeLog2 = m_pipesLog2; + const UINT_32 pipeMask = (1 << numPipeLog2) - 1; + UINT_32 index = m_dccBaseIndex + elemLog2; + const UINT_8* patIdxTable = (pIn->swizzleMode == ADDR_SW_64KB_R_X) ? + GFX11_DCC_64K_R_X_PATIDX : GFX11_DCC_256K_R_X_PATIDX; + + if (pIn->dccKeyFlags.pipeAligned) + { + index += MaxNumOfBpp; + + if (m_numPkrLog2 < 2) + { + index += m_pipesLog2 * MaxNumOfBpp; + } + else + { + // 4 groups for "m_numPkrLog2 < 2" case + index += 4 * MaxNumOfBpp; + + const UINT_32 dccPipePerPkr = 3; + + index += (m_numPkrLog2 - 2) * dccPipePerPkr * MaxNumOfBpp + + (m_pipesLog2 - m_numPkrLog2) * MaxNumOfBpp; + } + } + + const UINT_32 blkSizeLog2 = Log2(pIn->metaBlkWidth) + Log2(pIn->metaBlkHeight) + elemLog2 - 8; + const UINT_32 blkMask = (1 << blkSizeLog2) - 1; + const UINT_32 blkOffset = ComputeOffsetFromSwizzlePattern(GFX11_DCC_R_X_SW_PATTERN[patIdxTable[index]], + blkSizeLog2 + 1, // +1 for nibble offset + pIn->x, + pIn->y, + pIn->slice, + 0); + const UINT_32 xb = pIn->x / pIn->metaBlkWidth; + const UINT_32 yb = pIn->y / pIn->metaBlkHeight; + const UINT_32 pb = pIn->pitch / pIn->metaBlkWidth; + const UINT_32 blkIndex = (yb * pb) + xb; + const UINT_32 pipeXor = ((pIn->pipeXor & pipeMask) << m_pipeInterleaveLog2) & blkMask; + + pOut->addr = (static_cast(pIn->dccRamSliceSize) * pIn->slice) + + (blkIndex * (1 << blkSizeLog2)) + + ((blkOffset >> 1) ^ pipeXor); +} + +/** +************************************************************************************************************************ +* Gfx11Lib::HwlInitGlobalParams +* +* @brief +* Initializes global parameters +* +* @return +* TRUE if all settings are valid +* +************************************************************************************************************************ +*/ +BOOL_32 Gfx11Lib::HwlInitGlobalParams( + const ADDR_CREATE_INPUT* pCreateIn) ///< [in] create input +{ + BOOL_32 valid = TRUE; + GB_ADDR_CONFIG_GFX11 gbAddrConfig; + + gbAddrConfig.u32All = pCreateIn->regValue.gbAddrConfig; + + switch (gbAddrConfig.bits.NUM_PIPES) + { + case ADDR_CONFIG_1_PIPE: + m_pipes = 1; + m_pipesLog2 = 0; + break; + case ADDR_CONFIG_2_PIPE: + m_pipes = 2; + m_pipesLog2 = 1; + break; + case ADDR_CONFIG_4_PIPE: + m_pipes = 4; + m_pipesLog2 = 2; + break; + case ADDR_CONFIG_8_PIPE: + m_pipes = 8; + m_pipesLog2 = 3; + break; + case ADDR_CONFIG_16_PIPE: + m_pipes = 16; + m_pipesLog2 = 4; + break; + case ADDR_CONFIG_32_PIPE: + m_pipes = 32; + m_pipesLog2 = 5; + break; + case ADDR_CONFIG_64_PIPE: + m_pipes = 64; + m_pipesLog2 = 6; + break; + default: + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + break; + } + + switch (gbAddrConfig.bits.PIPE_INTERLEAVE_SIZE) + { + case ADDR_CONFIG_PIPE_INTERLEAVE_256B: + m_pipeInterleaveBytes = ADDR_PIPEINTERLEAVE_256B; + m_pipeInterleaveLog2 = 8; + break; + case ADDR_CONFIG_PIPE_INTERLEAVE_512B: + m_pipeInterleaveBytes = ADDR_PIPEINTERLEAVE_512B; + m_pipeInterleaveLog2 = 9; + break; + case ADDR_CONFIG_PIPE_INTERLEAVE_1KB: + m_pipeInterleaveBytes = ADDR_PIPEINTERLEAVE_1KB; + m_pipeInterleaveLog2 = 10; + break; + case ADDR_CONFIG_PIPE_INTERLEAVE_2KB: + m_pipeInterleaveBytes = ADDR_PIPEINTERLEAVE_2KB; + m_pipeInterleaveLog2 = 11; + break; + default: + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + break; + } + + // Addr::V2::Lib::ComputePipeBankXor()/ComputeSlicePipeBankXor() requires pipe interleave to be exactly 8 bits, and + // any larger value requires a post-process (left shift) on the output pipeBankXor bits. + // And more importantly, SW AddrLib doesn't support sw equation/pattern for PI != 256 case. + ADDR_ASSERT(m_pipeInterleaveBytes == ADDR_PIPEINTERLEAVE_256B); + + // These fields are deprecated on GFX11; they do nothing on HW. + m_maxCompFrag = 1; + m_maxCompFragLog2 = 0; + + // Skip unaligned case + m_htileBaseIndex += MaxNumOfAA; + + m_htileBaseIndex += m_pipesLog2 * MaxNumOfAA; + m_colorBaseIndex += m_pipesLog2 * MaxNumOfBpp; + + m_numPkrLog2 = gbAddrConfig.bits.NUM_PKRS; + m_numSaLog2 = (m_numPkrLog2 > 0) ? (m_numPkrLog2 - 1) : 0; + + ADDR_ASSERT((m_numPkrLog2 <= m_pipesLog2) && ((m_pipesLog2 - m_numPkrLog2) <= 2)); + + if (m_numPkrLog2 >= 2) + { + m_colorBaseIndex += (2 * m_numPkrLog2 - 2) * MaxNumOfBpp; + m_htileBaseIndex += (m_numPkrLog2 - 1) * 3 * MaxNumOfAA; + } + + // There is no so-called VAR swizzle mode on GFX11 and instead there are 4 256KB swizzle modes. Here we treat 256KB + // swizzle mode as "VAR" swizzle mode for reusing exising facilities (e.g GetBlockSizeLog2()) provided by base class + m_blockVarSizeLog2 = 18; + + if (valid) + { + InitEquationTable(); + } + + return valid; +} + +/** +************************************************************************************************************************ +* Gfx11Lib::HwlConvertChipFamily +* +* @brief +* Convert familyID defined in atiid.h to ChipFamily and set m_chipFamily/m_chipRevision +* @return +* ChipFamily +************************************************************************************************************************ +*/ +ChipFamily Gfx11Lib::HwlConvertChipFamily( + UINT_32 chipFamily, ///< [in] chip family defined in atiih.h + UINT_32 chipRevision) ///< [in] chip revision defined in "asic_family"_id.h +{ + ChipFamily family = ADDR_CHIP_FAMILY_NAVI; + + switch (chipFamily) + { + case FAMILY_GFX1100: + if (ASICREV_IS_GFX1100(chipRevision)) + { + } + if (ASICREV_IS_GFX1101(chipRevision)) + { + } + if (ASICREV_IS_GFX1102(chipRevision)) + { + } + break; + case FAMILY_GFX1103: + if (ASICREV_IS_GFX1103(chipRevision)) + { + } + break; + default: + ADDR_ASSERT(!"Unknown chip family"); + break; + } + + m_configFlags.use32bppFor422Fmt = TRUE; + + return family; +} + +/** +************************************************************************************************************************ +* Gfx11Lib::GetBlk256SizeLog2 +* +* @brief +* Get block 256 size +* +* @return +* N/A +************************************************************************************************************************ +*/ +void Gfx11Lib::GetBlk256SizeLog2( + AddrResourceType resourceType, ///< [in] Resource type + AddrSwizzleMode swizzleMode, ///< [in] Swizzle mode + UINT_32 elemLog2, ///< [in] element size log2 + UINT_32 numSamplesLog2, ///< [in] number of samples + Dim3d* pBlock ///< [out] block size + ) const +{ + if (IsThin(resourceType, swizzleMode)) + { + UINT_32 blockBits = 8 - elemLog2; + + // On GFX11, Z and R modes are the same thing. + if (IsZOrderSwizzle(swizzleMode) || IsRtOptSwizzle(swizzleMode)) + { + blockBits -= numSamplesLog2; + } + + pBlock->w = (blockBits >> 1) + (blockBits & 1); + pBlock->h = (blockBits >> 1); + pBlock->d = 0; + } + else + { + ADDR_ASSERT(IsThick(resourceType, swizzleMode)); + + UINT_32 blockBits = 8 - elemLog2; + + pBlock->d = (blockBits / 3) + (((blockBits % 3) > 0) ? 1 : 0); + pBlock->w = (blockBits / 3) + (((blockBits % 3) > 1) ? 1 : 0); + pBlock->h = (blockBits / 3); + } +} + +/** +************************************************************************************************************************ +* Gfx11Lib::GetCompressedBlockSizeLog2 +* +* @brief +* Get compress block size +* +* @return +* N/A +************************************************************************************************************************ +*/ +void Gfx11Lib::GetCompressedBlockSizeLog2( + Gfx11DataType dataType, ///< [in] Data type + AddrResourceType resourceType, ///< [in] Resource type + AddrSwizzleMode swizzleMode, ///< [in] Swizzle mode + UINT_32 elemLog2, ///< [in] element size log2 + UINT_32 numSamplesLog2, ///< [in] number of samples + Dim3d* pBlock ///< [out] block size + ) const +{ + if (dataType == Gfx11DataColor) + { + GetBlk256SizeLog2(resourceType, swizzleMode, elemLog2, numSamplesLog2, pBlock); + } + else + { + ADDR_ASSERT(dataType == Gfx11DataDepthStencil); + pBlock->w = 3; + pBlock->h = 3; + pBlock->d = 0; + } +} + +/** +************************************************************************************************************************ +* Gfx11Lib::GetMetaOverlapLog2 +* +* @brief +* Get meta block overlap +* +* @return +* N/A +************************************************************************************************************************ +*/ +INT_32 Gfx11Lib::GetMetaOverlapLog2( + Gfx11DataType dataType, ///< [in] Data type + AddrResourceType resourceType, ///< [in] Resource type + AddrSwizzleMode swizzleMode, ///< [in] Swizzle mode + UINT_32 elemLog2, ///< [in] element size log2 + UINT_32 numSamplesLog2 ///< [in] number of samples + ) const +{ + Dim3d compBlock; + Dim3d microBlock; + + GetCompressedBlockSizeLog2(dataType, resourceType, swizzleMode, elemLog2, numSamplesLog2, &compBlock); + GetBlk256SizeLog2(resourceType, swizzleMode, elemLog2, numSamplesLog2, µBlock); + + const INT_32 compSizeLog2 = compBlock.w + compBlock.h + compBlock.d; + const INT_32 blk256SizeLog2 = microBlock.w + microBlock.h + microBlock.d; + const INT_32 maxSizeLog2 = Max(compSizeLog2, blk256SizeLog2); + const INT_32 numPipesLog2 = GetEffectiveNumPipes(); + INT_32 overlap = numPipesLog2 - maxSizeLog2; + + if (numPipesLog2 > 1) + { + overlap++; + } + + // In 16Bpp 8xaa, we lose 1 overlap bit because the block size reduction eats into a pipe anchor bit (y4) + if ((elemLog2 == 4) && (numSamplesLog2 == 3)) + { + overlap--; + } + overlap = Max(overlap, 0); + return overlap; +} + +/** +************************************************************************************************************************ +* Gfx11Lib::Get3DMetaOverlapLog2 +* +* @brief +* Get 3d meta block overlap +* +* @return +* N/A +************************************************************************************************************************ +*/ +INT_32 Gfx11Lib::Get3DMetaOverlapLog2( + AddrResourceType resourceType, ///< [in] Resource type + AddrSwizzleMode swizzleMode, ///< [in] Swizzle mode + UINT_32 elemLog2 ///< [in] element size log2 + ) const +{ + Dim3d microBlock; + GetBlk256SizeLog2(resourceType, swizzleMode, elemLog2, 0, µBlock); + + INT_32 overlap = GetEffectiveNumPipes() - static_cast(microBlock.w); + + overlap++; + + if ((overlap < 0) || (IsStandardSwizzle(resourceType, swizzleMode) == TRUE)) + { + overlap = 0; + } + return overlap; +} + +/** +************************************************************************************************************************ +* Gfx11Lib::GetPipeRotateAmount +* +* @brief +* Get pipe rotate amount +* +* @return +* Pipe rotate amount +************************************************************************************************************************ +*/ + +INT_32 Gfx11Lib::GetPipeRotateAmount( + AddrResourceType resourceType, ///< [in] Resource type + AddrSwizzleMode swizzleMode ///< [in] Swizzle mode + ) const +{ + INT_32 amount = 0; + + if ((m_pipesLog2 >= (m_numSaLog2 + 1)) && (m_pipesLog2 > 1)) + { + amount = ((m_pipesLog2 == (m_numSaLog2 + 1)) && IsRbAligned(resourceType, swizzleMode)) ? + 1 : m_pipesLog2 - (m_numSaLog2 + 1); + } + + return amount; +} + +/** +************************************************************************************************************************ +* Gfx11Lib::GetMetaBlkSize +* +* @brief +* Get metadata block size +* +* @return +* Meta block size +************************************************************************************************************************ +*/ +UINT_32 Gfx11Lib::GetMetaBlkSize( + Gfx11DataType dataType, ///< [in] Data type + AddrResourceType resourceType, ///< [in] Resource type + AddrSwizzleMode swizzleMode, ///< [in] Swizzle mode + UINT_32 elemLog2, ///< [in] element size log2 + UINT_32 numSamplesLog2, ///< [in] number of samples + BOOL_32 pipeAlign, ///< [in] pipe align + Dim3d* pBlock ///< [out] block size + ) const +{ + INT_32 metablkSizeLog2; + + const INT_32 metaElemSizeLog2 = GetMetaElementSizeLog2(dataType); + const INT_32 metaCacheSizeLog2 = GetMetaCacheSizeLog2(dataType); + const INT_32 compBlkSizeLog2 = (dataType == Gfx11DataColor) ? 8 : 6 + numSamplesLog2 + elemLog2; + const INT_32 metaBlkSamplesLog2 = numSamplesLog2; + const INT_32 dataBlkSizeLog2 = GetBlockSizeLog2(swizzleMode); + INT_32 numPipesLog2 = m_pipesLog2; + + if (IsThin(resourceType, swizzleMode)) + { + if ((pipeAlign == FALSE) || + (IsStandardSwizzle(resourceType, swizzleMode) == TRUE) || + (IsDisplaySwizzle(resourceType, swizzleMode) == TRUE)) + { + if (pipeAlign) + { + metablkSizeLog2 = Max(static_cast(m_pipeInterleaveLog2) + numPipesLog2, 12); + metablkSizeLog2 = Min(metablkSizeLog2, dataBlkSizeLog2); + } + else + { + metablkSizeLog2 = Min(dataBlkSizeLog2, 12); + } + } + else + { + if ((m_pipesLog2 == m_numSaLog2 + 1) && (m_pipesLog2 > 1)) + { + numPipesLog2++; + } + + INT_32 pipeRotateLog2 = GetPipeRotateAmount(resourceType, swizzleMode); + + if (numPipesLog2 >= 4) + { + INT_32 overlapLog2 = GetMetaOverlapLog2(dataType, resourceType, swizzleMode, elemLog2, numSamplesLog2); + + // In 16Bpe 8xaa, we have an extra overlap bit + if ((pipeRotateLog2 > 0) && + (elemLog2 == 4) && + (numSamplesLog2 == 3) && + (IsZOrderSwizzle(swizzleMode) || (GetEffectiveNumPipes() > 3))) + { + overlapLog2++; + } + + metablkSizeLog2 = metaCacheSizeLog2 + overlapLog2 + numPipesLog2; + metablkSizeLog2 = Max(metablkSizeLog2, static_cast(m_pipeInterleaveLog2) + numPipesLog2); + } + else + { + metablkSizeLog2 = Max(static_cast(m_pipeInterleaveLog2) + numPipesLog2, 12); + } + + if (dataType == Gfx11DataDepthStencil) + { + // For htile surfaces, pad meta block size to 2K * num_pipes + metablkSizeLog2 = Max(metablkSizeLog2, 11 + numPipesLog2); + } + + const INT_32 compFragLog2 = numSamplesLog2; + + if (IsRtOptSwizzle(swizzleMode) && (compFragLog2 > 1) && (pipeRotateLog2 >= 1)) + { + const INT_32 tmp = 8 + m_pipesLog2 + Max(pipeRotateLog2, compFragLog2 - 1); + + metablkSizeLog2 = Max(metablkSizeLog2, tmp); + } + } + + const INT_32 metablkBitsLog2 = + metablkSizeLog2 + compBlkSizeLog2 - elemLog2 - metaBlkSamplesLog2 - metaElemSizeLog2; + pBlock->w = 1 << ((metablkBitsLog2 >> 1) + (metablkBitsLog2 & 1)); + pBlock->h = 1 << (metablkBitsLog2 >> 1); + pBlock->d = 1; + } + else + { + ADDR_ASSERT(IsThick(resourceType, swizzleMode)); + + if (pipeAlign) + { + if ((m_pipesLog2 == m_numSaLog2 + 1) && + (m_pipesLog2 > 1) && + IsRbAligned(resourceType, swizzleMode)) + { + numPipesLog2++; + } + + const INT_32 overlapLog2 = Get3DMetaOverlapLog2(resourceType, swizzleMode, elemLog2); + + metablkSizeLog2 = metaCacheSizeLog2 + overlapLog2 + numPipesLog2; + metablkSizeLog2 = Max(metablkSizeLog2, static_cast(m_pipeInterleaveLog2) + numPipesLog2); + metablkSizeLog2 = Max(metablkSizeLog2, 12); + } + else + { + metablkSizeLog2 = 12; + } + + const INT_32 metablkBitsLog2 = + metablkSizeLog2 + compBlkSizeLog2 - elemLog2 - metaBlkSamplesLog2 - metaElemSizeLog2; + pBlock->w = 1 << ((metablkBitsLog2 / 3) + (((metablkBitsLog2 % 3) > 0) ? 1 : 0)); + pBlock->h = 1 << ((metablkBitsLog2 / 3) + (((metablkBitsLog2 % 3) > 1) ? 1 : 0)); + pBlock->d = 1 << (metablkBitsLog2 / 3); + } + + return (1 << static_cast(metablkSizeLog2)); +} + +/** +************************************************************************************************************************ +* Gfx11Lib::ConvertSwizzlePatternToEquation +* +* @brief +* Convert swizzle pattern to equation. +* +* @return +* N/A +************************************************************************************************************************ +*/ +VOID Gfx11Lib::ConvertSwizzlePatternToEquation( + UINT_32 elemLog2, ///< [in] element bytes log2 + AddrResourceType rsrcType, ///< [in] resource type + AddrSwizzleMode swMode, ///< [in] swizzle mode + const ADDR_SW_PATINFO* pPatInfo, ///< [in] swizzle pattern infor + ADDR_EQUATION* pEquation) ///< [out] equation converted from swizzle pattern + const +{ + ADDR_BIT_SETTING fullSwizzlePattern[20]; + GetSwizzlePatternFromPatternInfo(pPatInfo, fullSwizzlePattern); + + const ADDR_BIT_SETTING* pSwizzle = fullSwizzlePattern; + const UINT_32 blockSizeLog2 = GetBlockSizeLog2(swMode); + + pEquation->numBits = blockSizeLog2; + pEquation->stackedDepthSlices = FALSE; + + for (UINT_32 i = 0; i < elemLog2; i++) + { + pEquation->addr[i].channel = 0; + pEquation->addr[i].valid = 1; + pEquation->addr[i].index = i; + } + + if (IsXor(swMode) == FALSE) + { + for (UINT_32 i = elemLog2; i < blockSizeLog2; i++) + { + ADDR_ASSERT(IsPow2(pSwizzle[i].value)); + + if (pSwizzle[i].x != 0) + { + ADDR_ASSERT(IsPow2(static_cast(pSwizzle[i].x))); + + pEquation->addr[i].channel = 0; + pEquation->addr[i].valid = 1; + pEquation->addr[i].index = Log2(pSwizzle[i].x) + elemLog2; + } + else if (pSwizzle[i].y != 0) + { + ADDR_ASSERT(IsPow2(static_cast(pSwizzle[i].y))); + + pEquation->addr[i].channel = 1; + pEquation->addr[i].valid = 1; + pEquation->addr[i].index = Log2(pSwizzle[i].y); + } + else + { + ADDR_ASSERT(pSwizzle[i].z != 0); + ADDR_ASSERT(IsPow2(static_cast(pSwizzle[i].z))); + + pEquation->addr[i].channel = 2; + pEquation->addr[i].valid = 1; + pEquation->addr[i].index = Log2(pSwizzle[i].z); + } + + pEquation->xor1[i].value = 0; + pEquation->xor2[i].value = 0; + } + } + else if (IsThin(rsrcType, swMode)) + { + Dim3d dim; + ComputeThinBlockDimension(&dim.w, &dim.h, &dim.d, 8u << elemLog2, 0, rsrcType, swMode); + + const UINT_32 blkXLog2 = Log2(dim.w); + const UINT_32 blkYLog2 = Log2(dim.h); + const UINT_32 blkXMask = dim.w - 1; + const UINT_32 blkYMask = dim.h - 1; + + ADDR_BIT_SETTING swizzle[ADDR_MAX_EQUATION_BIT]; + UINT_32 xMask = 0; + UINT_32 yMask = 0; + UINT_32 bMask = (1 << elemLog2) - 1; + + for (UINT_32 i = elemLog2; i < blockSizeLog2; i++) + { + if (IsPow2(pSwizzle[i].value)) + { + if (pSwizzle[i].x != 0) + { + ADDR_ASSERT((xMask & pSwizzle[i].x) == 0); + xMask |= pSwizzle[i].x; + + const UINT_32 xLog2 = Log2(pSwizzle[i].x); + + ADDR_ASSERT(xLog2 < blkXLog2); + + pEquation->addr[i].channel = 0; + pEquation->addr[i].valid = 1; + pEquation->addr[i].index = xLog2 + elemLog2; + } + else + { + ADDR_ASSERT(pSwizzle[i].y != 0); + ADDR_ASSERT((yMask & pSwizzle[i].y) == 0); + yMask |= pSwizzle[i].y; + + pEquation->addr[i].channel = 1; + pEquation->addr[i].valid = 1; + pEquation->addr[i].index = Log2(pSwizzle[i].y); + + ADDR_ASSERT(pEquation->addr[i].index < blkYLog2); + } + + swizzle[i].value = 0; + bMask |= 1 << i; + } + else + { + if (pSwizzle[i].z != 0) + { + ADDR_ASSERT(IsPow2(static_cast(pSwizzle[i].z))); + + pEquation->xor2[i].channel = 2; + pEquation->xor2[i].valid = 1; + pEquation->xor2[i].index = Log2(pSwizzle[i].z); + } + + swizzle[i].x = pSwizzle[i].x; + swizzle[i].y = pSwizzle[i].y; + swizzle[i].z = swizzle[i].s = 0; + + ADDR_ASSERT(IsPow2(swizzle[i].value) == FALSE); + + const UINT_32 xHi = swizzle[i].x & (~blkXMask); + + if (xHi != 0) + { + ADDR_ASSERT(IsPow2(xHi)); + ADDR_ASSERT(pEquation->xor1[i].value == 0); + + pEquation->xor1[i].channel = 0; + pEquation->xor1[i].valid = 1; + pEquation->xor1[i].index = Log2(xHi) + elemLog2; + + swizzle[i].x &= blkXMask; + } + + const UINT_32 yHi = swizzle[i].y & (~blkYMask); + + if (yHi != 0) + { + ADDR_ASSERT(IsPow2(yHi)); + + if (xHi == 0) + { + ADDR_ASSERT(pEquation->xor1[i].value == 0); + pEquation->xor1[i].channel = 1; + pEquation->xor1[i].valid = 1; + pEquation->xor1[i].index = Log2(yHi); + } + else + { + ADDR_ASSERT(pEquation->xor2[i].value == 0); + pEquation->xor2[i].channel = 1; + pEquation->xor2[i].valid = 1; + pEquation->xor2[i].index = Log2(yHi); + } + + swizzle[i].y &= blkYMask; + } + + if (swizzle[i].value == 0) + { + bMask |= 1 << i; + } + } + } + + const UINT_32 pipeIntMask = (1 << m_pipeInterleaveLog2) - 1; + const UINT_32 blockMask = (1 << blockSizeLog2) - 1; + + ADDR_ASSERT((bMask & pipeIntMask) == pipeIntMask); + + while (bMask != blockMask) + { + for (UINT_32 i = m_pipeInterleaveLog2; i < blockSizeLog2; i++) + { + if ((bMask & (1 << i)) == 0) + { + if (IsPow2(swizzle[i].value)) + { + if (swizzle[i].x != 0) + { + ADDR_ASSERT((xMask & swizzle[i].x) == 0); + xMask |= swizzle[i].x; + + const UINT_32 xLog2 = Log2(swizzle[i].x); + + ADDR_ASSERT(xLog2 < blkXLog2); + + pEquation->addr[i].channel = 0; + pEquation->addr[i].valid = 1; + pEquation->addr[i].index = xLog2 + elemLog2; + } + else + { + ADDR_ASSERT(swizzle[i].y != 0); + ADDR_ASSERT((yMask & swizzle[i].y) == 0); + yMask |= swizzle[i].y; + + pEquation->addr[i].channel = 1; + pEquation->addr[i].valid = 1; + pEquation->addr[i].index = Log2(swizzle[i].y); + + ADDR_ASSERT(pEquation->addr[i].index < blkYLog2); + } + + swizzle[i].value = 0; + bMask |= 1 << i; + } + else + { + const UINT_32 x = swizzle[i].x & xMask; + const UINT_32 y = swizzle[i].y & yMask; + + if (x != 0) + { + ADDR_ASSERT(IsPow2(x)); + + if (pEquation->xor1[i].value == 0) + { + pEquation->xor1[i].channel = 0; + pEquation->xor1[i].valid = 1; + pEquation->xor1[i].index = Log2(x) + elemLog2; + } + else + { + ADDR_ASSERT(pEquation->xor2[i].value == 0); + pEquation->xor2[i].channel = 0; + pEquation->xor2[i].valid = 1; + pEquation->xor2[i].index = Log2(x) + elemLog2; + } + } + + if (y != 0) + { + ADDR_ASSERT(IsPow2(y)); + + if (pEquation->xor1[i].value == 0) + { + pEquation->xor1[i].channel = 1; + pEquation->xor1[i].valid = 1; + pEquation->xor1[i].index = Log2(y); + } + else + { + ADDR_ASSERT(pEquation->xor2[i].value == 0); + pEquation->xor2[i].channel = 1; + pEquation->xor2[i].valid = 1; + pEquation->xor2[i].index = Log2(y); + } + } + + swizzle[i].x &= ~x; + swizzle[i].y &= ~y; + } + } + } + } + + ADDR_ASSERT((xMask == blkXMask) && (yMask == blkYMask)); + } + else + { + const Dim3d& blkDim = (blockSizeLog2 == Log2Size256K) ? + Block256K_Log2_3d[elemLog2] : + ((blockSizeLog2 == Log2Size4K) ? Block4K_Log2_3d[elemLog2] : Block64K_Log2_3d[elemLog2]); + + const UINT_32 blkXLog2 = blkDim.w; + const UINT_32 blkYLog2 = blkDim.h; + const UINT_32 blkZLog2 = blkDim.d; + const UINT_32 blkXMask = (1 << blkXLog2) - 1; + const UINT_32 blkYMask = (1 << blkYLog2) - 1; + const UINT_32 blkZMask = (1 << blkZLog2) - 1; + + ADDR_BIT_SETTING swizzle[ADDR_MAX_EQUATION_BIT] = {}; + UINT_32 xMask = 0; + UINT_32 yMask = 0; + UINT_32 zMask = 0; + UINT_32 bMask = (1 << elemLog2) - 1; + + for (UINT_32 i = elemLog2; i < blockSizeLog2; i++) + { + if (IsPow2(pSwizzle[i].value)) + { + if (pSwizzle[i].x != 0) + { + ADDR_ASSERT((xMask & pSwizzle[i].x) == 0); + xMask |= pSwizzle[i].x; + + const UINT_32 xLog2 = Log2(pSwizzle[i].x); + + ADDR_ASSERT(xLog2 < blkXLog2); + + pEquation->addr[i].channel = 0; + pEquation->addr[i].valid = 1; + pEquation->addr[i].index = xLog2 + elemLog2; + } + else if (pSwizzle[i].y != 0) + { + ADDR_ASSERT((yMask & pSwizzle[i].y) == 0); + yMask |= pSwizzle[i].y; + + pEquation->addr[i].channel = 1; + pEquation->addr[i].valid = 1; + pEquation->addr[i].index = Log2(pSwizzle[i].y); + + ADDR_ASSERT(pEquation->addr[i].index < blkYLog2); + } + else + { + ADDR_ASSERT(pSwizzle[i].z != 0); + ADDR_ASSERT((zMask & pSwizzle[i].z) == 0); + zMask |= pSwizzle[i].z; + + pEquation->addr[i].channel = 2; + pEquation->addr[i].valid = 1; + pEquation->addr[i].index = Log2(pSwizzle[i].z); + + ADDR_ASSERT(pEquation->addr[i].index < blkZLog2); + } + + swizzle[i].value = 0; + bMask |= 1 << i; + } + else + { + swizzle[i].x = pSwizzle[i].x; + swizzle[i].y = pSwizzle[i].y; + swizzle[i].z = pSwizzle[i].z; + swizzle[i].s = 0; + + ADDR_ASSERT(IsPow2(swizzle[i].value) == FALSE); + + const UINT_32 xHi = swizzle[i].x & (~blkXMask); + const UINT_32 yHi = swizzle[i].y & (~blkYMask); + const UINT_32 zHi = swizzle[i].z & (~blkZMask); + + ADDR_ASSERT((xHi == 0) || (yHi== 0) || (zHi == 0)); + + if (xHi != 0) + { + ADDR_ASSERT(IsPow2(xHi)); + ADDR_ASSERT(pEquation->xor1[i].value == 0); + + pEquation->xor1[i].channel = 0; + pEquation->xor1[i].valid = 1; + pEquation->xor1[i].index = Log2(xHi) + elemLog2; + + swizzle[i].x &= blkXMask; + } + + if (yHi != 0) + { + ADDR_ASSERT(IsPow2(yHi)); + + if (pEquation->xor1[i].value == 0) + { + pEquation->xor1[i].channel = 1; + pEquation->xor1[i].valid = 1; + pEquation->xor1[i].index = Log2(yHi); + } + else + { + ADDR_ASSERT(pEquation->xor2[i].value == 0); + pEquation->xor2[i].channel = 1; + pEquation->xor2[i].valid = 1; + pEquation->xor2[i].index = Log2(yHi); + } + + swizzle[i].y &= blkYMask; + } + + if (zHi != 0) + { + ADDR_ASSERT(IsPow2(zHi)); + + if (pEquation->xor1[i].value == 0) + { + pEquation->xor1[i].channel = 2; + pEquation->xor1[i].valid = 1; + pEquation->xor1[i].index = Log2(zHi); + } + else + { + ADDR_ASSERT(pEquation->xor2[i].value == 0); + pEquation->xor2[i].channel = 2; + pEquation->xor2[i].valid = 1; + pEquation->xor2[i].index = Log2(zHi); + } + + swizzle[i].z &= blkZMask; + } + + if (swizzle[i].value == 0) + { + bMask |= 1 << i; + } + } + } + + const UINT_32 pipeIntMask = (1 << m_pipeInterleaveLog2) - 1; + const UINT_32 blockMask = (1 << blockSizeLog2) - 1; + + ADDR_ASSERT((bMask & pipeIntMask) == pipeIntMask); + + while (bMask != blockMask) + { + for (UINT_32 i = m_pipeInterleaveLog2; i < blockSizeLog2; i++) + { + if ((bMask & (1 << i)) == 0) + { + if (IsPow2(swizzle[i].value)) + { + if (swizzle[i].x != 0) + { + ADDR_ASSERT((xMask & swizzle[i].x) == 0); + xMask |= swizzle[i].x; + + const UINT_32 xLog2 = Log2(swizzle[i].x); + + ADDR_ASSERT(xLog2 < blkXLog2); + + pEquation->addr[i].channel = 0; + pEquation->addr[i].valid = 1; + pEquation->addr[i].index = xLog2 + elemLog2; + } + else if (swizzle[i].y != 0) + { + ADDR_ASSERT((yMask & swizzle[i].y) == 0); + yMask |= swizzle[i].y; + + pEquation->addr[i].channel = 1; + pEquation->addr[i].valid = 1; + pEquation->addr[i].index = Log2(swizzle[i].y); + + ADDR_ASSERT(pEquation->addr[i].index < blkYLog2); + } + else + { + ADDR_ASSERT(swizzle[i].z != 0); + ADDR_ASSERT((zMask & swizzle[i].z) == 0); + zMask |= swizzle[i].z; + + pEquation->addr[i].channel = 2; + pEquation->addr[i].valid = 1; + pEquation->addr[i].index = Log2(swizzle[i].z); + + ADDR_ASSERT(pEquation->addr[i].index < blkZLog2); + } + + swizzle[i].value = 0; + bMask |= 1 << i; + } + else + { + const UINT_32 x = swizzle[i].x & xMask; + const UINT_32 y = swizzle[i].y & yMask; + const UINT_32 z = swizzle[i].z & zMask; + + if (x != 0) + { + ADDR_ASSERT(IsPow2(x)); + + if (pEquation->xor1[i].value == 0) + { + pEquation->xor1[i].channel = 0; + pEquation->xor1[i].valid = 1; + pEquation->xor1[i].index = Log2(x) + elemLog2; + } + else + { + ADDR_ASSERT(pEquation->xor2[i].value == 0); + pEquation->xor2[i].channel = 0; + pEquation->xor2[i].valid = 1; + pEquation->xor2[i].index = Log2(x) + elemLog2; + } + } + + if (y != 0) + { + ADDR_ASSERT(IsPow2(y)); + + if (pEquation->xor1[i].value == 0) + { + pEquation->xor1[i].channel = 1; + pEquation->xor1[i].valid = 1; + pEquation->xor1[i].index = Log2(y); + } + else + { + ADDR_ASSERT(pEquation->xor2[i].value == 0); + pEquation->xor2[i].channel = 1; + pEquation->xor2[i].valid = 1; + pEquation->xor2[i].index = Log2(y); + } + } + + if (z != 0) + { + ADDR_ASSERT(IsPow2(z)); + + if (pEquation->xor1[i].value == 0) + { + pEquation->xor1[i].channel = 2; + pEquation->xor1[i].valid = 1; + pEquation->xor1[i].index = Log2(z); + } + else + { + ADDR_ASSERT(pEquation->xor2[i].value == 0); + pEquation->xor2[i].channel = 2; + pEquation->xor2[i].valid = 1; + pEquation->xor2[i].index = Log2(z); + } + } + + swizzle[i].x &= ~x; + swizzle[i].y &= ~y; + swizzle[i].z &= ~z; + } + } + } + } + + ADDR_ASSERT((xMask == blkXMask) && (yMask == blkYMask) && (zMask == blkZMask)); + } +} + +/** +************************************************************************************************************************ +* Gfx11Lib::InitEquationTable +* +* @brief +* Initialize Equation table. +* +* @return +* N/A +************************************************************************************************************************ +*/ +VOID Gfx11Lib::InitEquationTable() +{ + memset(m_equationTable, 0, sizeof(m_equationTable)); + + for (UINT_32 rsrcTypeIdx = 0; rsrcTypeIdx < MaxRsrcType; rsrcTypeIdx++) + { + const AddrResourceType rsrcType = static_cast(rsrcTypeIdx + ADDR_RSRC_TEX_2D); + + for (UINT_32 swModeIdx = 0; swModeIdx < MaxSwModeType; swModeIdx++) + { + const AddrSwizzleMode swMode = static_cast(swModeIdx); + + for (UINT_32 elemLog2 = 0; elemLog2 < MaxElementBytesLog2; elemLog2++) + { + UINT_32 equationIndex = ADDR_INVALID_EQUATION_INDEX; + const ADDR_SW_PATINFO* pPatInfo = GetSwizzlePatternInfo(swMode, rsrcType, elemLog2, 1); + + if (pPatInfo != NULL) + { + ADDR_ASSERT(IsValidSwMode(swMode)); + + if (pPatInfo->maxItemCount <= 3) + { + ADDR_EQUATION equation = {}; + + ConvertSwizzlePatternToEquation(elemLog2, rsrcType, swMode, pPatInfo, &equation); + + equationIndex = m_numEquations; + ADDR_ASSERT(equationIndex < EquationTableSize); + + m_equationTable[equationIndex] = equation; + + m_numEquations++; + } + else + { + // We only see "ill" equation from 64/128 BPE + 3D resource + SW_64KB_D_X + ADDR_ASSERT((elemLog2 == 3) || (elemLog2 == 4)); + ADDR_ASSERT(rsrcType == ADDR_RSRC_TEX_3D); + ADDR_ASSERT(swMode == ADDR_SW_64KB_D_X); + } + } + + m_equationLookupTable[rsrcTypeIdx][swModeIdx][elemLog2] = equationIndex; + } + } + } +} + +/** +************************************************************************************************************************ +* Gfx11Lib::HwlGetEquationIndex +* +* @brief +* Interface function stub of GetEquationIndex +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +UINT_32 Gfx11Lib::HwlGetEquationIndex( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + UINT_32 equationIdx = ADDR_INVALID_EQUATION_INDEX; + + if ((pIn->resourceType == ADDR_RSRC_TEX_2D) || + (pIn->resourceType == ADDR_RSRC_TEX_3D)) + { + const UINT_32 rsrcTypeIdx = static_cast(pIn->resourceType) - 1; + const UINT_32 swModeIdx = static_cast(pIn->swizzleMode); + const UINT_32 elemLog2 = Log2(pIn->bpp >> 3); + + equationIdx = m_equationLookupTable[rsrcTypeIdx][swModeIdx][elemLog2]; + } + + if (pOut->pMipInfo != NULL) + { + for (UINT_32 i = 0; i < pIn->numMipLevels; i++) + { + pOut->pMipInfo[i].equationIndex = equationIdx; + } + } + + return equationIdx; +} + +/** +************************************************************************************************************************ +* Gfx11Lib::GetValidDisplaySwizzleModes +* +* @brief +* Get valid swizzle modes mask for displayable surface +* +* @return +* Valid swizzle modes mask for displayable surface +************************************************************************************************************************ +*/ +UINT_32 Gfx11Lib::GetValidDisplaySwizzleModes( + UINT_32 bpp + ) const +{ + UINT_32 swModeMask = 0; + + if (bpp <= 64) + { + swModeMask = Dcn32SwModeMask; + } + + return swModeMask; +} + +/** +************************************************************************************************************************ +* Gfx11Lib::IsValidDisplaySwizzleMode +* +* @brief +* Check if a swizzle mode is supported by display engine +* +* @return +* TRUE is swizzle mode is supported by display engine +************************************************************************************************************************ +*/ +BOOL_32 Gfx11Lib::IsValidDisplaySwizzleMode( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn ///< [in] input structure + ) const +{ + ADDR_ASSERT(pIn->resourceType == ADDR_RSRC_TEX_2D); + + return (GetValidDisplaySwizzleModes(pIn->bpp) & (1 << pIn->swizzleMode)) ? TRUE : FALSE; +} + +/** +************************************************************************************************************************ +* Gfx11Lib::GetMaxNumMipsInTail +* +* @brief +* Return max number of mips in tails +* +* @return +* Max number of mips in tails +************************************************************************************************************************ +*/ +UINT_32 Gfx11Lib::GetMaxNumMipsInTail( + UINT_32 blockSizeLog2, ///< block size log2 + BOOL_32 isThin ///< is thin or thick + ) const +{ + UINT_32 effectiveLog2 = blockSizeLog2; + + if (isThin == FALSE) + { + effectiveLog2 -= (blockSizeLog2 - 8) / 3; + } + + return (effectiveLog2 <= 11) ? (1 + (1 << (effectiveLog2 - 9))) : (effectiveLog2 - 4); +} + +/** +************************************************************************************************************************ +* Gfx11Lib::HwlComputePipeBankXor +* +* @brief +* Generate a PipeBankXor value to be ORed into bits above pipeInterleaveBits of address +* +* @return +* PipeBankXor value +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx11Lib::HwlComputePipeBankXor( + const ADDR2_COMPUTE_PIPEBANKXOR_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_PIPEBANKXOR_OUTPUT* pOut ///< [out] output structure + ) const +{ + if (IsNonPrtXor(pIn->swizzleMode)) + { + pOut->pipeBankXor = 0; + } + else + { + pOut->pipeBankXor = 0; + } + + return ADDR_OK; +} + +/** +************************************************************************************************************************ +* Gfx11Lib::HwlComputeSlicePipeBankXor +* +* @brief +* Generate slice PipeBankXor value based on base PipeBankXor value and slice id +* +* @return +* PipeBankXor value +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx11Lib::HwlComputeSlicePipeBankXor( + const ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_SLICE_PIPEBANKXOR_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (IsNonPrtXor(pIn->swizzleMode)) + { + if (pIn->bpe == 0) + { + ADDR_ASSERT_ALWAYS(); + + // Require a valid bytes-per-element value passed from client... + returnCode = ADDR_INVALIDPARAMS; + } + else + { + const ADDR_SW_PATINFO* pPatInfo = GetSwizzlePatternInfo(pIn->swizzleMode, + pIn->resourceType, + Log2(pIn->bpe >> 3), + 1); + + if (pPatInfo != NULL) + { + ADDR_BIT_SETTING fullSwizzlePattern[20]; + GetSwizzlePatternFromPatternInfo(pPatInfo, fullSwizzlePattern); + + const UINT_32 pipeBankXorOffset = + ComputeOffsetFromSwizzlePattern(reinterpret_cast(fullSwizzlePattern), + GetBlockSizeLog2(pIn->swizzleMode), + 0, + 0, + pIn->slice, + 0); + + const UINT_32 pipeBankXor = pipeBankXorOffset >> m_pipeInterleaveLog2; + + // Should have no bit set under pipe interleave + ADDR_ASSERT((pipeBankXor << m_pipeInterleaveLog2) == pipeBankXorOffset); + + pOut->pipeBankXor = pIn->basePipeBankXor ^ pipeBankXor; + } + else + { + // Should never come here... + ADDR_NOT_IMPLEMENTED(); + + returnCode = ADDR_NOTSUPPORTED; + } + } + } + else + { + pOut->pipeBankXor = 0; + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Gfx11Lib::HwlComputeSubResourceOffsetForSwizzlePattern +* +* @brief +* Compute sub resource offset to support swizzle pattern +* +* @return +* Offset +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx11Lib::HwlComputeSubResourceOffsetForSwizzlePattern( + const ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_ASSERT(IsThin(pIn->resourceType, pIn->swizzleMode)); + + pOut->offset = pIn->slice * pIn->sliceSize + pIn->macroBlockOffset; + + return ADDR_OK; +} + +/** +************************************************************************************************************************ +* Gfx11Lib::HwlComputeNonBlockCompressedView +* +* @brief +* Compute non-block-compressed view for a given mipmap level/slice. +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx11Lib::HwlComputeNonBlockCompressedView( + const ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pIn->resourceType != ADDR_RSRC_TEX_2D) + { + // Only 2D resource can have a NonBC view... + returnCode = ADDR_INVALIDPARAMS; + } + else if ((pIn->format != ADDR_FMT_ASTC_8x8) && + ((pIn->format < ADDR_FMT_BC1) || (pIn->format > ADDR_FMT_BC7))) + { + // Only support BC1~BC7 or ASTC_8x8 for now... + returnCode = ADDR_NOTSUPPORTED; + } + else + { + UINT_32 bcWidth, bcHeight; + UINT_32 bpp = GetElemLib()->GetBitsPerPixel(pIn->format, NULL, &bcWidth, &bcHeight); + + ADDR2_COMPUTE_SURFACE_INFO_INPUT infoIn = {}; + infoIn.flags = pIn->flags; + infoIn.swizzleMode = pIn->swizzleMode; + infoIn.resourceType = pIn->resourceType; + infoIn.bpp = bpp; + infoIn.width = PowTwoAlign(pIn->width, bcWidth) / bcWidth; + infoIn.height = PowTwoAlign(pIn->height, bcHeight) / bcHeight; + infoIn.numSlices = pIn->numSlices; + infoIn.numMipLevels = pIn->numMipLevels; + infoIn.numSamples = 1; + infoIn.numFrags = 1; + + ADDR2_MIP_INFO mipInfo[MaxMipLevels] = {}; + + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT infoOut = {}; + infoOut.pMipInfo = mipInfo; + + const BOOL_32 tiled = (pIn->swizzleMode != ADDR_SW_LINEAR) ? TRUE : FALSE; + + if (tiled) + { + returnCode = HwlComputeSurfaceInfoTiled(&infoIn, &infoOut); + } + else + { + returnCode = HwlComputeSurfaceInfoLinear(&infoIn, &infoOut); + } + + if (returnCode == ADDR_OK) + { + ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT subOffIn = {}; + subOffIn.swizzleMode = infoIn.swizzleMode; + subOffIn.resourceType = infoIn.resourceType; + subOffIn.slice = pIn->slice; + subOffIn.sliceSize = infoOut.sliceSize; + subOffIn.macroBlockOffset = mipInfo[pIn->mipId].macroBlockOffset; + subOffIn.mipTailOffset = mipInfo[pIn->mipId].mipTailOffset; + + ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT subOffOut = {}; + + // For any mipmap level, move nonBc view base address by offset + HwlComputeSubResourceOffsetForSwizzlePattern(&subOffIn, &subOffOut); + pOut->offset = subOffOut.offset; + + ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT slicePbXorIn = {}; + slicePbXorIn.bpe = infoIn.bpp; + slicePbXorIn.swizzleMode = infoIn.swizzleMode; + slicePbXorIn.resourceType = infoIn.resourceType; + slicePbXorIn.basePipeBankXor = pIn->pipeBankXor; + slicePbXorIn.slice = pIn->slice; + + ADDR2_COMPUTE_SLICE_PIPEBANKXOR_OUTPUT slicePbXorOut = {}; + + // For any mipmap level, nonBc view should use computed pbXor + HwlComputeSlicePipeBankXor(&slicePbXorIn, &slicePbXorOut); + pOut->pipeBankXor = slicePbXorOut.pipeBankXor; + + const BOOL_32 inTail = tiled && (pIn->mipId >= infoOut.firstMipIdInTail) ? TRUE : FALSE; + const UINT_32 requestMipWidth = PowTwoAlign(Max(pIn->width >> pIn->mipId, 1u), bcWidth) / bcWidth; + const UINT_32 requestMipHeight = PowTwoAlign(Max(pIn->height >> pIn->mipId, 1u), bcHeight) / bcHeight; + + if (inTail) + { + // For mipmap level that is in mip tail block, hack a lot of things... + // Basically all mipmap levels in tail block will be viewed as a small mipmap chain that all levels + // are fit in tail block: + + // - mipId = relative mip id (which is counted from first mip ID in tail in original mip chain) + pOut->mipId = pIn->mipId - infoOut.firstMipIdInTail; + + // - at least 2 mipmap levels (since only 1 mipmap level will not be viewed as mipmap!) + pOut->numMipLevels = Max(infoIn.numMipLevels - infoOut.firstMipIdInTail, 2u); + + // - (mip0) width = requestMipWidth << mipId, the value can't exceed mip tail dimension threshold + pOut->unalignedWidth = Min(requestMipWidth << pOut->mipId, infoOut.blockWidth / 2); + + // - (mip0) height = requestMipHeight << mipId, the value can't exceed mip tail dimension threshold + pOut->unalignedHeight = Min(requestMipHeight << pOut->mipId, infoOut.blockHeight); + } + // This check should cover at least mipId == 0 + else if (requestMipWidth << pIn->mipId == infoIn.width) + { + // For mipmap level [N] that is not in mip tail block and downgraded without losing element: + // - only one mipmap level and mipId = 0 + pOut->mipId = 0; + pOut->numMipLevels = 1; + + // (mip0) width = requestMipWidth + pOut->unalignedWidth = requestMipWidth; + + // (mip0) height = requestMipHeight + pOut->unalignedHeight = requestMipHeight; + } + else + { + // For mipmap level [N] that is not in mip tail block and downgraded with element losing, + // We have to make it a multiple mipmap view (2 levels view here), add one extra element if needed, + // because single mip view may have different pitch value than original (multiple) mip view... + // A simple case would be: + // - 64KB block swizzle mode, 8 Bytes-Per-Element. Block dim = [0x80, 0x40] + // - 2 mipmap levels with API mip0 width = 0x401/mip1 width = 0x200 and non-BC view + // mip0 width = 0x101/mip1 width = 0x80 + // By multiple mip view, the pitch for mip level 1 would be 0x100 bytes, due to rounding up logic in + // GetMipSize(), and by single mip level view the pitch will only be 0x80 bytes. + + // - 2 levels and mipId = 1 + pOut->mipId = 1; + pOut->numMipLevels = 2; + + const UINT_32 upperMipWidth = + PowTwoAlign(Max(pIn->width >> (pIn->mipId - 1), 1u), bcWidth) / bcWidth; + const UINT_32 upperMipHeight = + PowTwoAlign(Max(pIn->height >> (pIn->mipId - 1), 1u), bcHeight) / bcHeight; + + const BOOL_32 needToAvoidInTail = + tiled && (requestMipWidth <= infoOut.blockWidth / 2) && (requestMipHeight <= infoOut.blockHeight) ? + TRUE : FALSE; + + const UINT_32 hwMipWidth = PowTwoAlign(ShiftCeil(infoIn.width, pIn->mipId), infoOut.blockWidth); + const UINT_32 hwMipHeight = PowTwoAlign(ShiftCeil(infoIn.height, pIn->mipId), infoOut.blockHeight); + + const BOOL_32 needExtraWidth = + ((upperMipWidth < requestMipWidth * 2) || + ((upperMipWidth == requestMipWidth * 2) && + ((needToAvoidInTail == TRUE) || + (hwMipWidth > PowTwoAlign(requestMipWidth, infoOut.blockWidth))))) ? TRUE : FALSE; + + const BOOL_32 needExtraHeight = + ((upperMipHeight < requestMipHeight * 2) || + ((upperMipHeight == requestMipHeight * 2) && + ((needToAvoidInTail == TRUE) || + (hwMipHeight > PowTwoAlign(requestMipHeight, infoOut.blockHeight))))) ? TRUE : FALSE; + + // (mip0) width = requestLastMipLevelWidth + pOut->unalignedWidth = upperMipWidth + (needExtraWidth ? 1: 0); + + // (mip0) height = requestLastMipLevelHeight + pOut->unalignedHeight = upperMipHeight + (needExtraHeight ? 1: 0); + } + + // Assert the downgrading from this mip[0] width would still generate correct mip[N] width + ADDR_ASSERT(ShiftRight(pOut->unalignedWidth, pOut->mipId) == requestMipWidth); + // Assert the downgrading from this mip[0] height would still generate correct mip[N] height + ADDR_ASSERT(ShiftRight(pOut->unalignedHeight, pOut->mipId) == requestMipHeight); + } + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Gfx11Lib::ValidateNonSwModeParams +* +* @brief +* Validate compute surface info params except swizzle mode +* +* @return +* TRUE if parameters are valid, FALSE otherwise +************************************************************************************************************************ +*/ +BOOL_32 Gfx11Lib::ValidateNonSwModeParams( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const +{ + BOOL_32 valid = TRUE; + + if ((pIn->bpp == 0) || (pIn->bpp > 128) || (pIn->width == 0) || (pIn->numFrags > 8)) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + else if (pIn->flags.fmask == 1) + { + // There is no FMASK for GFX11 ASICs + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + else if (pIn->numSamples > 8) + { + // There is no EQAA support for GFX11 ASICs, so the max number of sample is 8 + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + else if ((pIn->numFrags != 0) && (pIn->numSamples != pIn->numFrags)) + { + // There is no EQAA support for GFX11 ASICs, so the number of sample has to be same as number of fragment + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + + const ADDR2_SURFACE_FLAGS flags = pIn->flags; + const AddrResourceType rsrcType = pIn->resourceType; + const BOOL_32 mipmap = (pIn->numMipLevels > 1); + const BOOL_32 msaa = (pIn->numSamples > 1); + const BOOL_32 display = flags.display; + const BOOL_32 tex3d = IsTex3d(rsrcType); + const BOOL_32 tex2d = IsTex2d(rsrcType); + const BOOL_32 tex1d = IsTex1d(rsrcType); + const BOOL_32 stereo = flags.qbStereo; + + // Resource type check + if (tex1d) + { + if (msaa || display || stereo) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + } + else if (tex2d) + { + if ((msaa && mipmap) || (stereo && msaa) || (stereo && mipmap)) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + } + else if (tex3d) + { + if (msaa || display || stereo) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + } + else + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + + return valid; +} + +/** +************************************************************************************************************************ +* Gfx11Lib::ValidateSwModeParams +* +* @brief +* Validate compute surface info related to swizzle mode +* +* @return +* TRUE if parameters are valid, FALSE otherwise +************************************************************************************************************************ +*/ +BOOL_32 Gfx11Lib::ValidateSwModeParams( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const +{ + BOOL_32 valid = TRUE; + + if (pIn->swizzleMode >= ADDR_SW_MAX_TYPE) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + else if (IsValidSwMode(pIn->swizzleMode) == FALSE) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + + const ADDR2_SURFACE_FLAGS flags = pIn->flags; + const AddrResourceType rsrcType = pIn->resourceType; + const AddrSwizzleMode swizzle = pIn->swizzleMode; + const BOOL_32 msaa = (pIn->numSamples > 1); + const BOOL_32 zbuffer = flags.depth || flags.stencil; + const BOOL_32 color = flags.color; + const BOOL_32 display = flags.display; + const BOOL_32 tex3d = IsTex3d(rsrcType); + const BOOL_32 tex2d = IsTex2d(rsrcType); + const BOOL_32 tex1d = IsTex1d(rsrcType); + const BOOL_32 thin3d = flags.view3dAs2dArray; + const BOOL_32 linear = IsLinear(swizzle); + const BOOL_32 blk256B = IsBlock256b(swizzle); + const BOOL_32 isNonPrtXor = IsNonPrtXor(swizzle); + const BOOL_32 prt = flags.prt; + + // Misc check + if (msaa && (GetBlockSize(swizzle) < (m_pipeInterleaveBytes * pIn->numSamples))) + { + // MSAA surface must have blk_bytes/pipe_interleave >= num_samples + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + + if (display && (IsValidDisplaySwizzleMode(pIn) == FALSE)) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + + if ((pIn->bpp == 96) && (linear == FALSE)) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + + const UINT_32 swizzleMask = 1 << swizzle; + + // Resource type check + if (tex1d) + { + if ((swizzleMask & Gfx11Rsrc1dSwModeMask) == 0) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + } + else if (tex2d) + { + if ((swizzleMask & Gfx11Rsrc2dSwModeMask) == 0) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + else if (prt && ((swizzleMask & Gfx11Rsrc2dPrtSwModeMask) == 0)) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + } + else if (tex3d) + { + if (((swizzleMask & Gfx11Rsrc3dSwModeMask) == 0) || + (prt && ((swizzleMask & Gfx11Rsrc3dPrtSwModeMask) == 0)) || + (thin3d && ((swizzleMask & Gfx11Rsrc3dThinSwModeMask) == 0))) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + } + + // Swizzle type check + if (linear) + { + if (zbuffer || msaa || (pIn->bpp == 0) || ((pIn->bpp % 8) != 0)) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + } + else if (IsZOrderSwizzle(swizzle)) + { + if ((pIn->bpp > 64) || + (msaa && (color || (pIn->bpp > 32))) || + ElemLib::IsBlockCompressed(pIn->format) || + ElemLib::IsMacroPixelPacked(pIn->format)) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + } + else if (IsStandardSwizzle(rsrcType, swizzle)) + { + if (zbuffer || msaa) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + } + else if (IsDisplaySwizzle(rsrcType, swizzle)) + { + if (zbuffer || msaa) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + } + else if (IsRtOptSwizzle(swizzle)) + { + if (zbuffer) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + } + else + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + + // Block type check + if (blk256B) + { + if (zbuffer || tex3d || msaa) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + } + + return valid; +} + +/** +************************************************************************************************************************ +* Gfx11Lib::HwlComputeSurfaceInfoSanityCheck +* +* @brief +* Compute surface info sanity check +* +* @return +* Offset +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx11Lib::HwlComputeSurfaceInfoSanityCheck( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn ///< [in] input structure + ) const +{ + return ValidateNonSwModeParams(pIn) && ValidateSwModeParams(pIn) ? ADDR_OK : ADDR_INVALIDPARAMS; +} + +/** +************************************************************************************************************************ +* Gfx11Lib::HwlGetPreferredSurfaceSetting +* +* @brief +* Internal function to get suggested surface information for cliet to use +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx11Lib::HwlGetPreferredSurfaceSetting( + const ADDR2_GET_PREFERRED_SURF_SETTING_INPUT* pIn, ///< [in] input structure + ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pIn->flags.fmask) + { + // There is no FMASK for GFX11 ASICs. + ADDR_ASSERT_ALWAYS(); + + returnCode = ADDR_INVALIDPARAMS; + } + else + { + UINT_32 bpp = pIn->bpp; + UINT_32 width = Max(pIn->width, 1u); + UINT_32 height = Max(pIn->height, 1u); + + // Set format to INVALID will skip this conversion + if (pIn->format != ADDR_FMT_INVALID) + { + ElemMode elemMode = ADDR_UNCOMPRESSED; + UINT_32 expandX, expandY; + + // Get compression/expansion factors and element mode which indicates compression/expansion + bpp = GetElemLib()->GetBitsPerPixel(pIn->format, + &elemMode, + &expandX, + &expandY); + + UINT_32 basePitch = 0; + GetElemLib()->AdjustSurfaceInfo(elemMode, + expandX, + expandY, + &bpp, + &basePitch, + &width, + &height); + } + + const UINT_32 numSlices = Max(pIn->numSlices, 1u); + const UINT_32 numMipLevels = Max(pIn->numMipLevels, 1u); + const UINT_32 numSamples = Max(pIn->numSamples, 1u); + const BOOL_32 msaa = numSamples > 1; + + // Pre sanity check on non swizzle mode parameters + ADDR2_COMPUTE_SURFACE_INFO_INPUT localIn = {}; + localIn.flags = pIn->flags; + localIn.resourceType = pIn->resourceType; + localIn.format = pIn->format; + localIn.bpp = bpp; + localIn.width = width; + localIn.height = height; + localIn.numSlices = numSlices; + localIn.numMipLevels = numMipLevels; + localIn.numSamples = numSamples; + localIn.numFrags = numSamples; + + if (ValidateNonSwModeParams(&localIn)) + { + // Forbid swizzle mode(s) by client setting + ADDR2_SWMODE_SET allowedSwModeSet = {}; + allowedSwModeSet.value |= pIn->forbiddenBlock.linear ? 0 : Gfx11LinearSwModeMask; + allowedSwModeSet.value |= pIn->forbiddenBlock.micro ? 0 : Gfx11Blk256BSwModeMask; + allowedSwModeSet.value |= + pIn->forbiddenBlock.macroThin4KB ? 0 : + ((pIn->resourceType == ADDR_RSRC_TEX_3D) ? 0 : Gfx11Blk4KBSwModeMask); + allowedSwModeSet.value |= + pIn->forbiddenBlock.macroThick4KB ? 0 : + ((pIn->resourceType == ADDR_RSRC_TEX_3D) ? Gfx11Rsrc3dThick4KBSwModeMask : 0); + allowedSwModeSet.value |= + pIn->forbiddenBlock.macroThin64KB ? 0 : + ((pIn->resourceType == ADDR_RSRC_TEX_3D) ? Gfx11Rsrc3dThin64KBSwModeMask : Gfx11Blk64KBSwModeMask); + allowedSwModeSet.value |= + pIn->forbiddenBlock.macroThick64KB ? 0 : + ((pIn->resourceType == ADDR_RSRC_TEX_3D) ? Gfx11Rsrc3dThick64KBSwModeMask : 0); + allowedSwModeSet.value |= + pIn->forbiddenBlock.gfx11.thin256KB ? 0 : + ((pIn->resourceType == ADDR_RSRC_TEX_3D) ? Gfx11Rsrc3dThin256KBSwModeMask : Gfx11Blk256KBSwModeMask); + allowedSwModeSet.value |= + pIn->forbiddenBlock.gfx11.thick256KB ? 0 : + ((pIn->resourceType == ADDR_RSRC_TEX_3D) ? Gfx11Rsrc3dThick256KBSwModeMask : 0); + + if (pIn->preferredSwSet.value != 0) + { + allowedSwModeSet.value &= pIn->preferredSwSet.sw_Z ? ~0 : ~Gfx11ZSwModeMask; + allowedSwModeSet.value &= pIn->preferredSwSet.sw_S ? ~0 : ~Gfx11StandardSwModeMask; + allowedSwModeSet.value &= pIn->preferredSwSet.sw_D ? ~0 : ~Gfx11DisplaySwModeMask; + allowedSwModeSet.value &= pIn->preferredSwSet.sw_R ? ~0 : ~Gfx11RenderSwModeMask; + } + + if (pIn->noXor) + { + allowedSwModeSet.value &= ~Gfx11XorSwModeMask; + } + + if (pIn->maxAlign > 0) + { + if (pIn->maxAlign < Size256K) + { + allowedSwModeSet.value &= ~Gfx11Blk256KBSwModeMask; + } + + if (pIn->maxAlign < Size64K) + { + allowedSwModeSet.value &= ~Gfx11Blk64KBSwModeMask; + } + + if (pIn->maxAlign < Size4K) + { + allowedSwModeSet.value &= ~Gfx11Blk4KBSwModeMask; + } + + if (pIn->maxAlign < Size256) + { + allowedSwModeSet.value &= ~Gfx11Blk256BSwModeMask; + } + } + + // Filter out invalid swizzle mode(s) by image attributes and HW restrictions + switch (pIn->resourceType) + { + case ADDR_RSRC_TEX_1D: + allowedSwModeSet.value &= Gfx11Rsrc1dSwModeMask; + break; + + case ADDR_RSRC_TEX_2D: + allowedSwModeSet.value &= pIn->flags.prt ? Gfx11Rsrc2dPrtSwModeMask : Gfx11Rsrc2dSwModeMask; + break; + + case ADDR_RSRC_TEX_3D: + allowedSwModeSet.value &= pIn->flags.prt ? Gfx11Rsrc3dPrtSwModeMask : Gfx11Rsrc3dSwModeMask; + + if (pIn->flags.view3dAs2dArray) + { + allowedSwModeSet.value &= Gfx11Rsrc3dThinSwModeMask; + } + break; + + default: + ADDR_ASSERT_ALWAYS(); + allowedSwModeSet.value = 0; + break; + } + + if (ElemLib::IsBlockCompressed(pIn->format) || + ElemLib::IsMacroPixelPacked(pIn->format) || + (bpp > 64) || + (msaa && ((bpp > 32) || pIn->flags.color || pIn->flags.unordered))) + { + allowedSwModeSet.value &= ~Gfx11ZSwModeMask; + } + + if (pIn->format == ADDR_FMT_32_32_32) + { + allowedSwModeSet.value &= Gfx11LinearSwModeMask; + } + + if (msaa) + { + allowedSwModeSet.value &= Gfx11MsaaSwModeMask; + } + + if (pIn->flags.depth || pIn->flags.stencil) + { + allowedSwModeSet.value &= Gfx11ZSwModeMask; + } + + if (pIn->flags.display) + { + allowedSwModeSet.value &= GetValidDisplaySwizzleModes(bpp); + } + + if (allowedSwModeSet.value != 0) + { +#if DEBUG + // Post sanity check, at least AddrLib should accept the output generated by its own + UINT_32 validateSwModeSet = allowedSwModeSet.value; + + for (UINT_32 i = 0; validateSwModeSet != 0; i++) + { + if (validateSwModeSet & 1) + { + localIn.swizzleMode = static_cast(i); + ADDR_ASSERT(ValidateSwModeParams(&localIn)); + } + + validateSwModeSet >>= 1; + } +#endif + + pOut->resourceType = pIn->resourceType; + pOut->validSwModeSet = allowedSwModeSet; + pOut->canXor = (allowedSwModeSet.value & Gfx11XorSwModeMask) ? TRUE : FALSE; + pOut->validBlockSet = GetAllowedBlockSet(allowedSwModeSet, pOut->resourceType); + pOut->validSwTypeSet = GetAllowedSwSet(allowedSwModeSet); + + pOut->clientPreferredSwSet = pIn->preferredSwSet; + + if (pOut->clientPreferredSwSet.value == 0) + { + pOut->clientPreferredSwSet.value = AddrSwSetAll; + } + + // Apply optional restrictions + if (pIn->flags.needEquation) + { + FilterInvalidEqSwizzleMode(allowedSwModeSet, pIn->resourceType, Log2(bpp >> 3)); + } + + if (allowedSwModeSet.value == Gfx11LinearSwModeMask) + { + pOut->swizzleMode = ADDR_SW_LINEAR; + } + else + { + const BOOL_32 computeMinSize = (pIn->flags.minimizeAlign == 1) || (pIn->memoryBudget >= 1.0); + + if ((height > 1) && (computeMinSize == FALSE)) + { + // Always ignore linear swizzle mode if: + // 1. This is a (2D/3D) resource with height > 1 + // 2. Client doesn't require computing minimize size + allowedSwModeSet.swLinear = 0; + } + + ADDR2_BLOCK_SET allowedBlockSet = GetAllowedBlockSet(allowedSwModeSet, pOut->resourceType); + + // Determine block size if there are 2 or more block type candidates + if (IsPow2(allowedBlockSet.value) == FALSE) + { + AddrSwizzleMode swMode[AddrBlockMaxTiledType] = {}; + + swMode[AddrBlockLinear] = ADDR_SW_LINEAR; + + if (pOut->resourceType == ADDR_RSRC_TEX_3D) + { + swMode[AddrBlockThick4KB] = ADDR_SW_4KB_S_X; + swMode[AddrBlockThin64KB] = ADDR_SW_64KB_R_X; + swMode[AddrBlockThick64KB] = ADDR_SW_64KB_S_X; + swMode[AddrBlockThin256KB] = ADDR_SW_256KB_R_X; + swMode[AddrBlockThick256KB] = ADDR_SW_256KB_S_X; + } + else + { + swMode[AddrBlockMicro] = ADDR_SW_256B_D; + swMode[AddrBlockThin4KB] = ADDR_SW_4KB_D_X; + swMode[AddrBlockThin64KB] = ADDR_SW_64KB_D_X; + swMode[AddrBlockThin256KB] = ADDR_SW_256KB_D_X; + } + + UINT_64 padSize[AddrBlockMaxTiledType] = {}; + + const UINT_32 ratioLow = computeMinSize ? 1 : (pIn->flags.opt4space ? 3 : 2); + const UINT_32 ratioHi = computeMinSize ? 1 : (pIn->flags.opt4space ? 2 : 1); + const UINT_64 sizeAlignInElement = Max(NextPow2(pIn->minSizeAlign) / (bpp >> 3), 1u); + UINT_32 minSizeBlk = AddrBlockMicro; + UINT_64 minSize = 0; + + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT localOut = {}; + + for (UINT_32 i = AddrBlockLinear; i < AddrBlockMaxTiledType; i++) + { + if (IsBlockTypeAvaiable(allowedBlockSet, static_cast(i))) + { + localIn.swizzleMode = swMode[i]; + + if (localIn.swizzleMode == ADDR_SW_LINEAR) + { + returnCode = HwlComputeSurfaceInfoLinear(&localIn, &localOut); + } + else + { + returnCode = HwlComputeSurfaceInfoTiled(&localIn, &localOut); + } + + if (returnCode == ADDR_OK) + { + padSize[i] = localOut.surfSize; + + if ((minSize == 0) || + BlockTypeWithinMemoryBudget(minSize, padSize[i], ratioLow, ratioHi)) + { + minSize = padSize[i]; + minSizeBlk = i; + } + } + else + { + ADDR_ASSERT_ALWAYS(); + break; + } + } + } + + if (pIn->memoryBudget > 1.0) + { + // If minimum size is given by swizzle mode with bigger-block type, then don't ever check + // smaller-block type again in coming loop + switch (minSizeBlk) + { + case AddrBlockThick256KB: + allowedBlockSet.gfx11.thin256KB = 0; + case AddrBlockThin256KB: + allowedBlockSet.macroThick64KB = 0; + case AddrBlockThick64KB: + allowedBlockSet.macroThin64KB = 0; + case AddrBlockThin64KB: + allowedBlockSet.macroThick4KB = 0; + case AddrBlockThick4KB: + allowedBlockSet.macroThin4KB = 0; + case AddrBlockThin4KB: + allowedBlockSet.micro = 0; + case AddrBlockMicro: + allowedBlockSet.linear = 0; + case AddrBlockLinear: + break; + + default: + ADDR_ASSERT_ALWAYS(); + break; + } + + for (UINT_32 i = AddrBlockMicro; i < AddrBlockMaxTiledType; i++) + { + if ((i != minSizeBlk) && + IsBlockTypeAvaiable(allowedBlockSet, static_cast(i))) + { + if (BlockTypeWithinMemoryBudget(minSize, padSize[i], 0, 0, pIn->memoryBudget) == FALSE) + { + // Clear the block type if the memory waste is unacceptable + allowedBlockSet.value &= ~(1u << (i - 1)); + } + } + } + + // Remove linear block type if 2 or more block types are allowed + if (IsPow2(allowedBlockSet.value) == FALSE) + { + allowedBlockSet.linear = 0; + } + + // Select the biggest allowed block type + minSizeBlk = Log2NonPow2(allowedBlockSet.value) + 1; + + if (minSizeBlk == static_cast(AddrBlockMaxTiledType)) + { + minSizeBlk = AddrBlockLinear; + } + } + + switch (minSizeBlk) + { + case AddrBlockLinear: + allowedSwModeSet.value &= Gfx11LinearSwModeMask; + break; + + case AddrBlockMicro: + ADDR_ASSERT(pOut->resourceType != ADDR_RSRC_TEX_3D); + allowedSwModeSet.value &= Gfx11Blk256BSwModeMask; + break; + + case AddrBlockThin4KB: + ADDR_ASSERT(pOut->resourceType != ADDR_RSRC_TEX_3D); + allowedSwModeSet.value &= Gfx11Blk4KBSwModeMask; + break; + + case AddrBlockThick4KB: + ADDR_ASSERT(pOut->resourceType == ADDR_RSRC_TEX_3D); + allowedSwModeSet.value &= Gfx11Rsrc3dThick4KBSwModeMask; + break; + + case AddrBlockThin64KB: + allowedSwModeSet.value &= (pOut->resourceType == ADDR_RSRC_TEX_3D) ? + Gfx11Rsrc3dThin64KBSwModeMask : Gfx11Blk64KBSwModeMask; + break; + + case AddrBlockThick64KB: + ADDR_ASSERT(pOut->resourceType == ADDR_RSRC_TEX_3D); + allowedSwModeSet.value &= Gfx11Rsrc3dThick64KBSwModeMask; + break; + + case AddrBlockThin256KB: + allowedSwModeSet.value &= (pOut->resourceType == ADDR_RSRC_TEX_3D) ? + Gfx11Rsrc3dThin256KBSwModeMask : Gfx11Blk256KBSwModeMask; + break; + + case AddrBlockThick256KB: + ADDR_ASSERT(pOut->resourceType == ADDR_RSRC_TEX_3D); + allowedSwModeSet.value &= Gfx11Rsrc3dThick256KBSwModeMask; + break; + + default: + ADDR_ASSERT_ALWAYS(); + allowedSwModeSet.value = 0; + break; + } + } + + // Block type should be determined. + ADDR_ASSERT(IsPow2(GetAllowedBlockSet(allowedSwModeSet, pOut->resourceType).value)); + + ADDR2_SWTYPE_SET allowedSwSet = GetAllowedSwSet(allowedSwModeSet); + + // Determine swizzle type if there are 2 or more swizzle type candidates + if ((allowedSwSet.value != 0) && (IsPow2(allowedSwSet.value) == FALSE)) + { + if (ElemLib::IsBlockCompressed(pIn->format)) + { + if (allowedSwSet.sw_D) + { + allowedSwModeSet.value &= Gfx11DisplaySwModeMask; + } + else if (allowedSwSet.sw_S) + { + allowedSwModeSet.value &= Gfx11StandardSwModeMask; + } + else + { + ADDR_ASSERT(allowedSwSet.sw_R); + allowedSwModeSet.value &= Gfx11RenderSwModeMask; + } + } + else if (ElemLib::IsMacroPixelPacked(pIn->format)) + { + if (allowedSwSet.sw_S) + { + allowedSwModeSet.value &= Gfx11StandardSwModeMask; + } + else if (allowedSwSet.sw_D) + { + allowedSwModeSet.value &= Gfx11DisplaySwModeMask; + } + else + { + ADDR_ASSERT(allowedSwSet.sw_R); + allowedSwModeSet.value &= Gfx11RenderSwModeMask; + } + } + else if (pIn->resourceType == ADDR_RSRC_TEX_3D) + { + if (pIn->flags.color && allowedSwSet.sw_R) + { + allowedSwModeSet.value &= Gfx11DisplaySwModeMask; + } + else if (allowedSwSet.sw_S) + { + allowedSwModeSet.value &= Gfx11StandardSwModeMask; + } + else if (allowedSwSet.sw_D) + { + allowedSwModeSet.value &= Gfx11RenderSwModeMask; + } + else + { + ADDR_ASSERT(allowedSwSet.sw_Z); + allowedSwModeSet.value &= Gfx11ZSwModeMask; + } + } + else + { + if (allowedSwSet.sw_R) + { + allowedSwModeSet.value &= Gfx11RenderSwModeMask; + } + else if (allowedSwSet.sw_D) + { + allowedSwModeSet.value &= Gfx11DisplaySwModeMask; + } + else if (allowedSwSet.sw_Z) + { + allowedSwModeSet.value &= Gfx11ZSwModeMask; + } + else + { + ADDR_ASSERT_ALWAYS(); + } + } + + // Swizzle type should be determined. + ADDR_ASSERT(IsPow2(GetAllowedSwSet(allowedSwModeSet).value)); + } + + // Determine swizzle mode now. Always select the "largest" swizzle mode for a given block type + + // swizzle type combination. E.g, for AddrBlockThin64KB + ADDR_SW_S, select SW_64KB_S_X(25) if it's + // available, or otherwise select SW_64KB_S_T(17) if it's available, or otherwise select SW_64KB_S(9). + pOut->swizzleMode = static_cast(Log2NonPow2(allowedSwModeSet.value)); + } + } + else + { + // Invalid combination... + ADDR_ASSERT_ALWAYS(); + returnCode = ADDR_INVALIDPARAMS; + } + } + else + { + // Invalid combination... + ADDR_ASSERT_ALWAYS(); + returnCode = ADDR_INVALIDPARAMS; + } + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Gfx11Lib::ComputeStereoInfo +* +* @brief +* Compute height alignment and right eye pipeBankXor for stereo surface +* +* @return +* Error code +* +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx11Lib::ComputeStereoInfo( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< Compute surface info + UINT_32* pAlignY, ///< Stereo requested additional alignment in Y + UINT_32* pRightXor ///< Right eye xor + ) const +{ + ADDR_E_RETURNCODE ret = ADDR_OK; + + *pRightXor = 0; + + if (IsNonPrtXor(pIn->swizzleMode)) + { + const UINT_32 blkSizeLog2 = GetBlockSizeLog2(pIn->swizzleMode); + const UINT_32 elemLog2 = Log2(pIn->bpp >> 3); + const UINT_32 rsrcType = static_cast(pIn->resourceType) - 1; + const UINT_32 swMode = static_cast(pIn->swizzleMode); + const UINT_32 eqIndex = m_equationLookupTable[rsrcType][swMode][elemLog2]; + + if (eqIndex != ADDR_INVALID_EQUATION_INDEX) + { + UINT_32 yMax = 0; + UINT_32 yPosMask = 0; + + // First get "max y bit" + for (UINT_32 i = m_pipeInterleaveLog2; i < blkSizeLog2; i++) + { + ADDR_ASSERT(m_equationTable[eqIndex].addr[i].valid == 1); + + if ((m_equationTable[eqIndex].addr[i].channel == 1) && + (m_equationTable[eqIndex].addr[i].index > yMax)) + { + yMax = m_equationTable[eqIndex].addr[i].index; + } + + if ((m_equationTable[eqIndex].xor1[i].valid == 1) && + (m_equationTable[eqIndex].xor1[i].channel == 1) && + (m_equationTable[eqIndex].xor1[i].index > yMax)) + { + yMax = m_equationTable[eqIndex].xor1[i].index; + } + + if ((m_equationTable[eqIndex].xor2[i].valid == 1) && + (m_equationTable[eqIndex].xor2[i].channel == 1) && + (m_equationTable[eqIndex].xor2[i].index > yMax)) + { + yMax = m_equationTable[eqIndex].xor2[i].index; + } + } + + // Then loop again for populating a position mask of "max Y bit" + for (UINT_32 i = m_pipeInterleaveLog2; i < blkSizeLog2; i++) + { + if ((m_equationTable[eqIndex].addr[i].channel == 1) && + (m_equationTable[eqIndex].addr[i].index == yMax)) + { + yPosMask |= 1u << i; + } + else if ((m_equationTable[eqIndex].xor1[i].valid == 1) && + (m_equationTable[eqIndex].xor1[i].channel == 1) && + (m_equationTable[eqIndex].xor1[i].index == yMax)) + { + yPosMask |= 1u << i; + } + else if ((m_equationTable[eqIndex].xor2[i].valid == 1) && + (m_equationTable[eqIndex].xor2[i].channel == 1) && + (m_equationTable[eqIndex].xor2[i].index == yMax)) + { + yPosMask |= 1u << i; + } + } + + const UINT_32 additionalAlign = 1 << yMax; + + if (additionalAlign >= *pAlignY) + { + *pAlignY = additionalAlign; + + const UINT_32 alignedHeight = PowTwoAlign(pIn->height, additionalAlign); + + if ((alignedHeight >> yMax) & 1) + { + *pRightXor = yPosMask >> m_pipeInterleaveLog2; + } + } + } + else + { + ret = ADDR_INVALIDPARAMS; + } + } + + return ret; +} + +/** +************************************************************************************************************************ +* Gfx11Lib::HwlComputeSurfaceInfoTiled +* +* @brief +* Internal function to calculate alignment for tiled surface +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx11Lib::HwlComputeSurfaceInfoTiled( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE ret; + + // Mip chain dimesion and epitch has no meaning in GFX11, set to default value + pOut->mipChainPitch = 0; + pOut->mipChainHeight = 0; + pOut->mipChainSlice = 0; + pOut->epitchIsHeight = FALSE; + + // Following information will be provided in ComputeSurfaceInfoMacroTiled() if necessary + pOut->mipChainInTail = FALSE; + pOut->firstMipIdInTail = pIn->numMipLevels; + + if (IsBlock256b(pIn->swizzleMode)) + { + ret = ComputeSurfaceInfoMicroTiled(pIn, pOut); + } + else + { + ret = ComputeSurfaceInfoMacroTiled(pIn, pOut); + } + + return ret; +} + +/** +************************************************************************************************************************ +* Gfx11Lib::ComputeSurfaceInfoMicroTiled +* +* @brief +* Internal function to calculate alignment for micro tiled surface +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx11Lib::ComputeSurfaceInfoMicroTiled( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE ret = ComputeBlockDimensionForSurf(&pOut->blockWidth, + &pOut->blockHeight, + &pOut->blockSlices, + pIn->bpp, + pIn->numSamples, + pIn->resourceType, + pIn->swizzleMode); + + if (ret == ADDR_OK) + { + const UINT_32 blockSize = GetBlockSize(pIn->swizzleMode); + + pOut->pitch = PowTwoAlign(pIn->width, pOut->blockWidth); + pOut->height = PowTwoAlign(pIn->height, pOut->blockHeight); + pOut->numSlices = pIn->numSlices; + pOut->baseAlign = blockSize; + + if (pIn->numMipLevels > 1) + { + const UINT_32 mip0Width = pIn->width; + const UINT_32 mip0Height = pIn->height; + UINT_64 mipSliceSize = 0; + + for (INT_32 i = static_cast(pIn->numMipLevels) - 1; i >= 0; i--) + { + UINT_32 mipWidth, mipHeight; + + GetMipSize(mip0Width, mip0Height, 1, i, &mipWidth, &mipHeight); + + const UINT_32 mipActualWidth = PowTwoAlign(mipWidth, pOut->blockWidth); + const UINT_32 mipActualHeight = PowTwoAlign(mipHeight, pOut->blockHeight); + + if (pOut->pMipInfo != NULL) + { + pOut->pMipInfo[i].pitch = mipActualWidth; + pOut->pMipInfo[i].height = mipActualHeight; + pOut->pMipInfo[i].depth = 1; + pOut->pMipInfo[i].offset = mipSliceSize; + pOut->pMipInfo[i].mipTailOffset = 0; + pOut->pMipInfo[i].macroBlockOffset = mipSliceSize; + } + + mipSliceSize += mipActualWidth * mipActualHeight * (pIn->bpp >> 3); + } + + pOut->sliceSize = mipSliceSize; + pOut->surfSize = mipSliceSize * pOut->numSlices; + } + else + { + pOut->sliceSize = static_cast(pOut->pitch) * pOut->height * (pIn->bpp >> 3); + pOut->surfSize = pOut->sliceSize * pOut->numSlices; + + if (pOut->pMipInfo != NULL) + { + pOut->pMipInfo[0].pitch = pOut->pitch; + pOut->pMipInfo[0].height = pOut->height; + pOut->pMipInfo[0].depth = 1; + pOut->pMipInfo[0].offset = 0; + pOut->pMipInfo[0].mipTailOffset = 0; + pOut->pMipInfo[0].macroBlockOffset = 0; + } + } + + } + + return ret; +} + +/** +************************************************************************************************************************ +* Gfx11Lib::ComputeSurfaceInfoMacroTiled +* +* @brief +* Internal function to calculate alignment for macro tiled surface +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx11Lib::ComputeSurfaceInfoMacroTiled( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ComputeBlockDimensionForSurf(&pOut->blockWidth, + &pOut->blockHeight, + &pOut->blockSlices, + pIn->bpp, + pIn->numSamples, + pIn->resourceType, + pIn->swizzleMode); + + if (returnCode == ADDR_OK) + { + UINT_32 heightAlign = pOut->blockHeight; + + if (pIn->flags.qbStereo) + { + UINT_32 rightXor = 0; + + returnCode = ComputeStereoInfo(pIn, &heightAlign, &rightXor); + + if (returnCode == ADDR_OK) + { + pOut->pStereoInfo->rightSwizzle = rightXor; + } + } + + if (returnCode == ADDR_OK) + { + const UINT_32 blockSizeLog2 = GetBlockSizeLog2(pIn->swizzleMode); + const UINT_32 blockSize = 1 << blockSizeLog2; + + pOut->pitch = PowTwoAlign(pIn->width, pOut->blockWidth); + pOut->height = PowTwoAlign(pIn->height, heightAlign); + pOut->numSlices = PowTwoAlign(pIn->numSlices, pOut->blockSlices); + pOut->baseAlign = blockSize; + + if (pIn->numMipLevels > 1) + { + const Dim3d tailMaxDim = GetMipTailDim(pIn->resourceType, + pIn->swizzleMode, + pOut->blockWidth, + pOut->blockHeight, + pOut->blockSlices); + const UINT_32 mip0Width = pIn->width; + const UINT_32 mip0Height = pIn->height; + const BOOL_32 isThin = IsThin(pIn->resourceType, pIn->swizzleMode); + const UINT_32 mip0Depth = isThin ? 1 : pIn->numSlices; + const UINT_32 maxMipsInTail = GetMaxNumMipsInTail(blockSizeLog2, isThin); + const UINT_32 index = Log2(pIn->bpp >> 3); + UINT_32 firstMipInTail = pIn->numMipLevels; + UINT_64 mipChainSliceSize = 0; + UINT_64 mipSize[MaxMipLevels]; + UINT_64 mipSliceSize[MaxMipLevels]; + + Dim3d fixedTailMaxDim = tailMaxDim; + + if ((IsZOrderSwizzle(pIn->swizzleMode) || IsRtOptSwizzle(pIn->swizzleMode)) && (index <= 1)) + { + fixedTailMaxDim.w /= Block256_2d[index].w / Block256_2d[2].w; + fixedTailMaxDim.h /= Block256_2d[index].h / Block256_2d[2].h; + } + + for (UINT_32 i = 0; i < pIn->numMipLevels; i++) + { + UINT_32 mipWidth, mipHeight, mipDepth; + + GetMipSize(mip0Width, mip0Height, mip0Depth, i, &mipWidth, &mipHeight, &mipDepth); + + if (IsInMipTail(fixedTailMaxDim, maxMipsInTail, mipWidth, mipHeight, pIn->numMipLevels - i)) + { + firstMipInTail = i; + mipChainSliceSize += blockSize / pOut->blockSlices; + break; + } + else + { + const UINT_32 pitch = PowTwoAlign(mipWidth, pOut->blockWidth); + const UINT_32 height = PowTwoAlign(mipHeight, pOut->blockHeight); + const UINT_32 depth = PowTwoAlign(mipDepth, pOut->blockSlices); + const UINT_64 sliceSize = static_cast(pitch) * height * (pIn->bpp >> 3); + + mipSize[i] = sliceSize * depth; + mipSliceSize[i] = sliceSize * pOut->blockSlices; + mipChainSliceSize += sliceSize; + + if (pOut->pMipInfo != NULL) + { + pOut->pMipInfo[i].pitch = pitch; + pOut->pMipInfo[i].height = height; + pOut->pMipInfo[i].depth = depth; + } + } + } + + pOut->sliceSize = mipChainSliceSize; + pOut->surfSize = mipChainSliceSize * pOut->numSlices; + pOut->mipChainInTail = (firstMipInTail == 0) ? TRUE : FALSE; + pOut->firstMipIdInTail = firstMipInTail; + + if (pOut->pMipInfo != NULL) + { + UINT_64 offset = 0; + UINT_64 macroBlkOffset = 0; + UINT_32 tailMaxDepth = 0; + + if (firstMipInTail != pIn->numMipLevels) + { + UINT_32 mipWidth, mipHeight; + + GetMipSize(mip0Width, mip0Height, mip0Depth, firstMipInTail, + &mipWidth, &mipHeight, &tailMaxDepth); + + offset = blockSize * PowTwoAlign(tailMaxDepth, pOut->blockSlices) / pOut->blockSlices; + macroBlkOffset = blockSize; + } + + for (INT_32 i = firstMipInTail - 1; i >= 0; i--) + { + pOut->pMipInfo[i].offset = offset; + pOut->pMipInfo[i].macroBlockOffset = macroBlkOffset; + pOut->pMipInfo[i].mipTailOffset = 0; + + offset += mipSize[i]; + macroBlkOffset += mipSliceSize[i]; + } + + UINT_32 pitch = tailMaxDim.w; + UINT_32 height = tailMaxDim.h; + UINT_32 depth = isThin ? 1 : PowTwoAlign(tailMaxDepth, Block256_3d[index].d); + + tailMaxDepth = isThin ? 1 : (depth / Block256_3d[index].d); + + for (UINT_32 i = firstMipInTail; i < pIn->numMipLevels; i++) + { + const UINT_32 m = maxMipsInTail - 1 - (i - firstMipInTail); + const UINT_32 mipOffset = (m > 6) ? (16 << m) : (m << 8); + + pOut->pMipInfo[i].offset = mipOffset * tailMaxDepth; + pOut->pMipInfo[i].mipTailOffset = mipOffset; + pOut->pMipInfo[i].macroBlockOffset = 0; + + pOut->pMipInfo[i].pitch = pitch; + pOut->pMipInfo[i].height = height; + pOut->pMipInfo[i].depth = depth; + + UINT_32 mipX = ((mipOffset >> 9) & 1) | + ((mipOffset >> 10) & 2) | + ((mipOffset >> 11) & 4) | + ((mipOffset >> 12) & 8) | + ((mipOffset >> 13) & 16) | + ((mipOffset >> 14) & 32); + UINT_32 mipY = ((mipOffset >> 8) & 1) | + ((mipOffset >> 9) & 2) | + ((mipOffset >> 10) & 4) | + ((mipOffset >> 11) & 8) | + ((mipOffset >> 12) & 16) | + ((mipOffset >> 13) & 32); + + if (blockSizeLog2 & 1) + { + const UINT_32 temp = mipX; + mipX = mipY; + mipY = temp; + + if (index & 1) + { + mipY = (mipY << 1) | (mipX & 1); + mipX = mipX >> 1; + } + } + + if (isThin) + { + pOut->pMipInfo[i].mipTailCoordX = mipX * Block256_2d[index].w; + pOut->pMipInfo[i].mipTailCoordY = mipY * Block256_2d[index].h; + pOut->pMipInfo[i].mipTailCoordZ = 0; + + pitch = Max(pitch >> 1, Block256_2d[index].w); + height = Max(height >> 1, Block256_2d[index].h); + depth = 1; + } + else + { + pOut->pMipInfo[i].mipTailCoordX = mipX * Block256_3d[index].w; + pOut->pMipInfo[i].mipTailCoordY = mipY * Block256_3d[index].h; + pOut->pMipInfo[i].mipTailCoordZ = 0; + + pitch = Max(pitch >> 1, Block256_3d[index].w); + height = Max(height >> 1, Block256_3d[index].h); + depth = PowTwoAlign(Max(depth >> 1, 1u), Block256_3d[index].d); + } + } + } + } + else + { + pOut->sliceSize = static_cast(pOut->pitch) * pOut->height * (pIn->bpp >> 3) * pIn->numSamples; + pOut->surfSize = pOut->sliceSize * pOut->numSlices; + + if (pOut->pMipInfo != NULL) + { + pOut->pMipInfo[0].pitch = pOut->pitch; + pOut->pMipInfo[0].height = pOut->height; + pOut->pMipInfo[0].depth = IsTex3d(pIn->resourceType)? pOut->numSlices : 1; + pOut->pMipInfo[0].offset = 0; + pOut->pMipInfo[0].mipTailOffset = 0; + pOut->pMipInfo[0].macroBlockOffset = 0; + pOut->pMipInfo[0].mipTailCoordX = 0; + pOut->pMipInfo[0].mipTailCoordY = 0; + pOut->pMipInfo[0].mipTailCoordZ = 0; + } + } + } + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Gfx11Lib::HwlComputeSurfaceAddrFromCoordTiled +* +* @brief +* Internal function to calculate address from coord for tiled swizzle surface +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx11Lib::HwlComputeSurfaceAddrFromCoordTiled( + const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE ret; + + if (IsBlock256b(pIn->swizzleMode)) + { + ret = ComputeSurfaceAddrFromCoordMicroTiled(pIn, pOut); + } + else + { + ret = ComputeSurfaceAddrFromCoordMacroTiled(pIn, pOut); + } + + return ret; +} + +/** +************************************************************************************************************************ +* Gfx11Lib::ComputeOffsetFromEquation +* +* @brief +* Compute offset from equation +* +* @return +* Offset +************************************************************************************************************************ +*/ +UINT_32 Gfx11Lib::ComputeOffsetFromEquation( + const ADDR_EQUATION* pEq, ///< Equation + UINT_32 x, ///< x coord in bytes + UINT_32 y, ///< y coord in pixel + UINT_32 z ///< z coord in slice + ) const +{ + UINT_32 offset = 0; + + for (UINT_32 i = 0; i < pEq->numBits; i++) + { + UINT_32 v = 0; + + if (pEq->addr[i].valid) + { + if (pEq->addr[i].channel == 0) + { + v ^= (x >> pEq->addr[i].index) & 1; + } + else if (pEq->addr[i].channel == 1) + { + v ^= (y >> pEq->addr[i].index) & 1; + } + else + { + ADDR_ASSERT(pEq->addr[i].channel == 2); + v ^= (z >> pEq->addr[i].index) & 1; + } + } + + if (pEq->xor1[i].valid) + { + if (pEq->xor1[i].channel == 0) + { + v ^= (x >> pEq->xor1[i].index) & 1; + } + else if (pEq->xor1[i].channel == 1) + { + v ^= (y >> pEq->xor1[i].index) & 1; + } + else + { + ADDR_ASSERT(pEq->xor1[i].channel == 2); + v ^= (z >> pEq->xor1[i].index) & 1; + } + } + + if (pEq->xor2[i].valid) + { + if (pEq->xor2[i].channel == 0) + { + v ^= (x >> pEq->xor2[i].index) & 1; + } + else if (pEq->xor2[i].channel == 1) + { + v ^= (y >> pEq->xor2[i].index) & 1; + } + else + { + ADDR_ASSERT(pEq->xor2[i].channel == 2); + v ^= (z >> pEq->xor2[i].index) & 1; + } + } + + offset |= (v << i); + } + + return offset; +} + +/** +************************************************************************************************************************ +* Gfx11Lib::ComputeOffsetFromSwizzlePattern +* +* @brief +* Compute offset from swizzle pattern +* +* @return +* Offset +************************************************************************************************************************ +*/ +UINT_32 Gfx11Lib::ComputeOffsetFromSwizzlePattern( + const UINT_64* pPattern, ///< Swizzle pattern + UINT_32 numBits, ///< Number of bits in pattern + UINT_32 x, ///< x coord in pixel + UINT_32 y, ///< y coord in pixel + UINT_32 z, ///< z coord in slice + UINT_32 s ///< sample id + ) const +{ + UINT_32 offset = 0; + const ADDR_BIT_SETTING* pSwizzlePattern = reinterpret_cast(pPattern); + + for (UINT_32 i = 0; i < numBits; i++) + { + UINT_32 v = 0; + + if (pSwizzlePattern[i].x != 0) + { + UINT_16 mask = pSwizzlePattern[i].x; + UINT_32 xBits = x; + + while (mask != 0) + { + if (mask & 1) + { + v ^= xBits & 1; + } + + xBits >>= 1; + mask >>= 1; + } + } + + if (pSwizzlePattern[i].y != 0) + { + UINT_16 mask = pSwizzlePattern[i].y; + UINT_32 yBits = y; + + while (mask != 0) + { + if (mask & 1) + { + v ^= yBits & 1; + } + + yBits >>= 1; + mask >>= 1; + } + } + + if (pSwizzlePattern[i].z != 0) + { + UINT_16 mask = pSwizzlePattern[i].z; + UINT_32 zBits = z; + + while (mask != 0) + { + if (mask & 1) + { + v ^= zBits & 1; + } + + zBits >>= 1; + mask >>= 1; + } + } + + if (pSwizzlePattern[i].s != 0) + { + UINT_16 mask = pSwizzlePattern[i].s; + UINT_32 sBits = s; + + while (mask != 0) + { + if (mask & 1) + { + v ^= sBits & 1; + } + + sBits >>= 1; + mask >>= 1; + } + } + + offset |= (v << i); + } + + return offset; +} + +/** +************************************************************************************************************************ +* Gfx11Lib::GetSwizzlePatternInfo +* +* @brief +* Get swizzle pattern +* +* @return +* Swizzle pattern information +************************************************************************************************************************ +*/ +const ADDR_SW_PATINFO* Gfx11Lib::GetSwizzlePatternInfo( + AddrSwizzleMode swizzleMode, ///< Swizzle mode + AddrResourceType resourceType, ///< Resource type + UINT_32 elemLog2, ///< Element size in bytes log2 + UINT_32 numFrag ///< Number of fragment + ) const +{ + const UINT_32 index = IsXor(swizzleMode) ? (m_colorBaseIndex + elemLog2) : elemLog2; + const ADDR_SW_PATINFO* patInfo = NULL; + const UINT_32 swizzleMask = 1 << swizzleMode; + const BOOL_32 isBlock256k = IsBlock256kb(swizzleMode); + const BOOL_32 isBlock64K = IsBlock64kb(swizzleMode); + + if (IsLinear(swizzleMode) == FALSE) + { + if (resourceType == ADDR_RSRC_TEX_3D) + { + ADDR_ASSERT(numFrag == 1); + + if ((swizzleMask & Gfx11Rsrc3dSwModeMask) != 0) + { + if (IsZOrderSwizzle(swizzleMode) || IsRtOptSwizzle(swizzleMode)) + { + if (isBlock256k) + { + ADDR_ASSERT((swizzleMode == ADDR_SW_256KB_Z_X) || (swizzleMode == ADDR_SW_256KB_R_X)); + patInfo = GFX11_SW_256K_ZR_X_1xaa_PATINFO; + } + else if (isBlock64K) + { + ADDR_ASSERT((swizzleMode == ADDR_SW_64KB_Z_X) || (swizzleMode == ADDR_SW_64KB_R_X)); + patInfo = GFX11_SW_64K_ZR_X_1xaa_PATINFO; + } + else + { + ADDR_ASSERT_ALWAYS(); + } + } + else if (IsDisplaySwizzle(resourceType, swizzleMode)) + { + if (isBlock256k) + { + ADDR_ASSERT(swizzleMode == ADDR_SW_256KB_D_X); + // patInfo = GFX11_SW_256K_D3_X_PATINFO; + } + else if (isBlock64K) + { + ADDR_ASSERT(swizzleMode == ADDR_SW_64KB_D_X); + patInfo = GFX11_SW_64K_D3_X_PATINFO; + } + else + { + ADDR_ASSERT_ALWAYS(); + } + } + else + { + ADDR_ASSERT(IsStandardSwizzle(resourceType, swizzleMode)); + + if (isBlock256k) + { + ADDR_ASSERT(swizzleMode == ADDR_SW_256KB_S_X); + patInfo = GFX11_SW_256K_S3_X_PATINFO; + } + else if (isBlock64K) + { + if (swizzleMode == ADDR_SW_64KB_S) + { + patInfo = GFX11_SW_64K_S3_PATINFO; + } + else if (swizzleMode == ADDR_SW_64KB_S_X) + { + patInfo = GFX11_SW_64K_S3_X_PATINFO; + } + else if (swizzleMode == ADDR_SW_64KB_S_T) + { + patInfo = GFX11_SW_64K_S3_T_PATINFO; + } + else + { + ADDR_ASSERT_ALWAYS(); + } + } + else if (IsBlock4kb(swizzleMode)) + { + if (swizzleMode == ADDR_SW_4KB_S) + { + patInfo = GFX11_SW_4K_S3_PATINFO; + } + else if (swizzleMode == ADDR_SW_4KB_S_X) + { + patInfo = GFX11_SW_4K_S3_X_PATINFO; + } + else + { + ADDR_ASSERT_ALWAYS(); + } + } + else + { + ADDR_ASSERT_ALWAYS(); + } + } + } + } + else + { + if ((swizzleMask & Gfx11Rsrc2dSwModeMask) != 0) + { + if (IsBlock256b(swizzleMode)) + { + ADDR_ASSERT(swizzleMode == ADDR_SW_256B_D); + patInfo = GFX11_SW_256_D_PATINFO; + } + else if (IsBlock4kb(swizzleMode)) + { + if (swizzleMode == ADDR_SW_4KB_D) + { + patInfo = GFX11_SW_4K_D_PATINFO; + } + else if (swizzleMode == ADDR_SW_4KB_D_X) + { + patInfo = GFX11_SW_4K_D_X_PATINFO; + } + else + { + ADDR_ASSERT_ALWAYS(); + } + } + else if (isBlock64K) + { + if (IsZOrderSwizzle(swizzleMode) || IsRtOptSwizzle(swizzleMode)) + { + if (numFrag == 1) + { + patInfo = GFX11_SW_64K_ZR_X_1xaa_PATINFO; + } + else if (numFrag == 2) + { + patInfo = GFX11_SW_64K_ZR_X_2xaa_PATINFO; + } + else if (numFrag == 4) + { + patInfo = GFX11_SW_64K_ZR_X_4xaa_PATINFO; + } + else if (numFrag == 8) + { + patInfo = GFX11_SW_64K_ZR_X_8xaa_PATINFO; + } + else + { + ADDR_ASSERT_ALWAYS(); + } + } + else if (IsDisplaySwizzle(resourceType, swizzleMode)) + { + if (swizzleMode == ADDR_SW_64KB_D) + { + patInfo = GFX11_SW_64K_D_PATINFO; + } + else if (swizzleMode == ADDR_SW_64KB_D_X) + { + patInfo = GFX11_SW_64K_D_X_PATINFO; + } + else if (swizzleMode == ADDR_SW_64KB_D_T) + { + patInfo = GFX11_SW_64K_D_T_PATINFO; + } + else + { + ADDR_ASSERT_ALWAYS(); + } + } + else + { + ADDR_ASSERT_ALWAYS(); + } + } + else if (isBlock256k) + { + if (IsZOrderSwizzle(swizzleMode) || IsRtOptSwizzle(swizzleMode)) + { + if (numFrag == 1) + { + patInfo = GFX11_SW_256K_ZR_X_1xaa_PATINFO; + } + else if (numFrag == 2) + { + patInfo = GFX11_SW_256K_ZR_X_2xaa_PATINFO; + } + else if (numFrag == 4) + { + patInfo = GFX11_SW_256K_ZR_X_4xaa_PATINFO; + } + else if (numFrag == 8) + { + patInfo = GFX11_SW_256K_ZR_X_8xaa_PATINFO; + } + else + { + ADDR_ASSERT_ALWAYS(); + } + } + else if (IsDisplaySwizzle(resourceType, swizzleMode)) + { + ADDR_ASSERT(swizzleMode == ADDR_SW_256KB_D_X); + patInfo = GFX11_SW_256K_D_X_PATINFO; + } + else + { + ADDR_ASSERT_ALWAYS(); + } + } + else + { + ADDR_ASSERT_ALWAYS(); + } + } + } + } + + return (patInfo != NULL) ? &patInfo[index] : NULL; +} + +/** +************************************************************************************************************************ +* Gfx11Lib::ComputeSurfaceAddrFromCoordMicroTiled +* +* @brief +* Internal function to calculate address from coord for micro tiled swizzle surface +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx11Lib::ComputeSurfaceAddrFromCoordMicroTiled( + const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR2_COMPUTE_SURFACE_INFO_INPUT localIn = {}; + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT localOut = {}; + ADDR2_MIP_INFO mipInfo[MaxMipLevels]; + + localIn.swizzleMode = pIn->swizzleMode; + localIn.flags = pIn->flags; + localIn.resourceType = pIn->resourceType; + localIn.bpp = pIn->bpp; + localIn.width = Max(pIn->unalignedWidth, 1u); + localIn.height = Max(pIn->unalignedHeight, 1u); + localIn.numSlices = Max(pIn->numSlices, 1u); + localIn.numMipLevels = Max(pIn->numMipLevels, 1u); + localIn.numSamples = Max(pIn->numSamples, 1u); + localIn.numFrags = localIn.numSamples; + localOut.pMipInfo = mipInfo; + + ADDR_E_RETURNCODE ret = ComputeSurfaceInfoMicroTiled(&localIn, &localOut); + + if (ret == ADDR_OK) + { + const UINT_32 elemLog2 = Log2(pIn->bpp >> 3); + const UINT_32 rsrcType = static_cast(pIn->resourceType) - 1; + const UINT_32 swMode = static_cast(pIn->swizzleMode); + const UINT_32 eqIndex = m_equationLookupTable[rsrcType][swMode][elemLog2]; + + if (eqIndex != ADDR_INVALID_EQUATION_INDEX) + { + const UINT_32 pb = mipInfo[pIn->mipId].pitch / localOut.blockWidth; + const UINT_32 yb = pIn->y / localOut.blockHeight; + const UINT_32 xb = pIn->x / localOut.blockWidth; + const UINT_32 blockIndex = yb * pb + xb; + const UINT_32 blockSize = 256; + const UINT_32 blk256Offset = ComputeOffsetFromEquation(&m_equationTable[eqIndex], + pIn->x << elemLog2, + pIn->y, + 0); + pOut->addr = localOut.sliceSize * pIn->slice + + mipInfo[pIn->mipId].macroBlockOffset + + (blockIndex * blockSize) + + blk256Offset; + } + else + { + ret = ADDR_INVALIDPARAMS; + } + } + + return ret; +} + +/** +************************************************************************************************************************ +* Gfx11Lib::ComputeSurfaceAddrFromCoordMacroTiled +* +* @brief +* Internal function to calculate address from coord for macro tiled swizzle surface +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx11Lib::ComputeSurfaceAddrFromCoordMacroTiled( + const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR2_COMPUTE_SURFACE_INFO_INPUT localIn = {}; + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT localOut = {}; + ADDR2_MIP_INFO mipInfo[MaxMipLevels]; + + localIn.swizzleMode = pIn->swizzleMode; + localIn.flags = pIn->flags; + localIn.resourceType = pIn->resourceType; + localIn.bpp = pIn->bpp; + localIn.width = Max(pIn->unalignedWidth, 1u); + localIn.height = Max(pIn->unalignedHeight, 1u); + localIn.numSlices = Max(pIn->numSlices, 1u); + localIn.numMipLevels = Max(pIn->numMipLevels, 1u); + localIn.numSamples = Max(pIn->numSamples, 1u); + localIn.numFrags = localIn.numSamples; + localOut.pMipInfo = mipInfo; + + ADDR_E_RETURNCODE ret = ComputeSurfaceInfoMacroTiled(&localIn, &localOut); + + if (ret == ADDR_OK) + { + const UINT_32 elemLog2 = Log2(pIn->bpp >> 3); + const UINT_32 blkSizeLog2 = GetBlockSizeLog2(pIn->swizzleMode); + const UINT_32 blkMask = (1 << blkSizeLog2) - 1; + const UINT_32 pipeMask = (1 << m_pipesLog2) - 1; + const UINT_32 bankMask = ((1 << GetBankXorBits(blkSizeLog2)) - 1) << (m_pipesLog2 + ColumnBits); + const UINT_32 pipeBankXor = IsXor(pIn->swizzleMode) ? + (((pIn->pipeBankXor & (pipeMask | bankMask)) << m_pipeInterleaveLog2) & blkMask) : 0; + + if (localIn.numSamples > 1) + { + const ADDR_SW_PATINFO* pPatInfo = GetSwizzlePatternInfo(pIn->swizzleMode, + pIn->resourceType, + elemLog2, + localIn.numSamples); + + if (pPatInfo != NULL) + { + const UINT_32 pb = localOut.pitch / localOut.blockWidth; + const UINT_32 yb = pIn->y / localOut.blockHeight; + const UINT_32 xb = pIn->x / localOut.blockWidth; + const UINT_64 blkIdx = yb * pb + xb; + + ADDR_BIT_SETTING fullSwizzlePattern[20]; + GetSwizzlePatternFromPatternInfo(pPatInfo, fullSwizzlePattern); + + const UINT_32 blkOffset = + ComputeOffsetFromSwizzlePattern(reinterpret_cast(fullSwizzlePattern), + blkSizeLog2, + pIn->x, + pIn->y, + pIn->slice, + pIn->sample); + + pOut->addr = (localOut.sliceSize * pIn->slice) + + (blkIdx << blkSizeLog2) + + (blkOffset ^ pipeBankXor); + } + else + { + ret = ADDR_INVALIDPARAMS; + } + } + else + { + const UINT_32 rsrcIdx = (pIn->resourceType == ADDR_RSRC_TEX_3D) ? 1 : 0; + const UINT_32 swMode = static_cast(pIn->swizzleMode); + const UINT_32 eqIndex = m_equationLookupTable[rsrcIdx][swMode][elemLog2]; + + if (eqIndex != ADDR_INVALID_EQUATION_INDEX) + { + const BOOL_32 inTail = (mipInfo[pIn->mipId].mipTailOffset != 0) ? TRUE : FALSE; + const BOOL_32 isThin = IsThin(pIn->resourceType, pIn->swizzleMode); + const UINT_64 sliceSize = isThin ? localOut.sliceSize : (localOut.sliceSize * localOut.blockSlices); + const UINT_32 sliceId = isThin ? pIn->slice : (pIn->slice / localOut.blockSlices); + const UINT_32 x = inTail ? (pIn->x + mipInfo[pIn->mipId].mipTailCoordX) : pIn->x; + const UINT_32 y = inTail ? (pIn->y + mipInfo[pIn->mipId].mipTailCoordY) : pIn->y; + const UINT_32 z = inTail ? (pIn->slice + mipInfo[pIn->mipId].mipTailCoordZ) : pIn->slice; + const UINT_32 pb = mipInfo[pIn->mipId].pitch / localOut.blockWidth; + const UINT_32 yb = pIn->y / localOut.blockHeight; + const UINT_32 xb = pIn->x / localOut.blockWidth; + const UINT_64 blkIdx = yb * pb + xb; + const UINT_32 blkOffset = ComputeOffsetFromEquation(&m_equationTable[eqIndex], + x << elemLog2, + y, + z); + pOut->addr = sliceSize * sliceId + + mipInfo[pIn->mipId].macroBlockOffset + + (blkIdx << blkSizeLog2) + + (blkOffset ^ pipeBankXor); + } + else + { + ret = ADDR_INVALIDPARAMS; + } + } + } + + return ret; +} + +/** +************************************************************************************************************************ +* Gfx11Lib::HwlComputeMaxBaseAlignments +* +* @brief +* Gets maximum alignments +* @return +* maximum alignments +************************************************************************************************************************ +*/ +UINT_32 Gfx11Lib::HwlComputeMaxBaseAlignments() const +{ + return Size256K; +} + +/** +************************************************************************************************************************ +* Gfx11Lib::HwlComputeMaxMetaBaseAlignments +* +* @brief +* Gets maximum alignments for metadata +* @return +* maximum alignments for metadata +************************************************************************************************************************ +*/ +UINT_32 Gfx11Lib::HwlComputeMaxMetaBaseAlignments() const +{ + Dim3d metaBlk; + + // Max base alignment for Htile + const AddrSwizzleMode ValidSwizzleModeForHtile[] = + { + ADDR_SW_64KB_Z_X, + ADDR_SW_256KB_Z_X, + }; + + UINT_32 maxBaseAlignHtile = 0; + + for (UINT_32 swIdx = 0; swIdx < sizeof(ValidSwizzleModeForHtile) / sizeof(ValidSwizzleModeForHtile[0]); swIdx++) + { + for (UINT_32 bppLog2 = 0; bppLog2 < 3; bppLog2++) + { + for (UINT_32 numFragLog2 = 0; numFragLog2 < 4; numFragLog2++) + { + const UINT_32 metaBlkSizeHtile = GetMetaBlkSize(Gfx11DataDepthStencil, + ADDR_RSRC_TEX_2D, + ValidSwizzleModeForHtile[swIdx], + bppLog2, + numFragLog2, + TRUE, + &metaBlk); + + maxBaseAlignHtile = Max(maxBaseAlignHtile, metaBlkSizeHtile); + } + } + } + + // Max base alignment for 2D Dcc + const AddrSwizzleMode ValidSwizzleModeForDcc2D[] = + { + ADDR_SW_64KB_R_X, + ADDR_SW_256KB_R_X, + }; + + UINT_32 maxBaseAlignDcc2D = 0; + + for (UINT_32 swIdx = 0; swIdx < sizeof(ValidSwizzleModeForDcc2D) / sizeof(ValidSwizzleModeForDcc2D[0]); swIdx++) + { + for (UINT_32 bppLog2 = 0; bppLog2 < MaxNumOfBpp; bppLog2++) + { + for (UINT_32 numFragLog2 = 0; numFragLog2 < 4; numFragLog2++) + { + const UINT_32 metaBlkSize2D = GetMetaBlkSize(Gfx11DataColor, + ADDR_RSRC_TEX_2D, + ValidSwizzleModeForDcc2D[swIdx], + bppLog2, + numFragLog2, + TRUE, + &metaBlk); + + maxBaseAlignDcc2D = Max(maxBaseAlignDcc2D, metaBlkSize2D); + } + } + } + + // Max base alignment for 3D Dcc + const AddrSwizzleMode ValidSwizzleModeForDcc3D[] = + { + ADDR_SW_64KB_S_X, + ADDR_SW_64KB_D_X, + ADDR_SW_64KB_R_X, + ADDR_SW_256KB_S_X, + ADDR_SW_256KB_D_X, + ADDR_SW_256KB_R_X, + }; + + UINT_32 maxBaseAlignDcc3D = 0; + + for (UINT_32 swIdx = 0; swIdx < sizeof(ValidSwizzleModeForDcc3D) / sizeof(ValidSwizzleModeForDcc3D[0]); swIdx++) + { + for (UINT_32 bppLog2 = 0; bppLog2 < MaxNumOfBpp; bppLog2++) + { + const UINT_32 metaBlkSize3D = GetMetaBlkSize(Gfx11DataColor, + ADDR_RSRC_TEX_3D, + ValidSwizzleModeForDcc3D[swIdx], + bppLog2, + 0, + TRUE, + &metaBlk); + + maxBaseAlignDcc3D = Max(maxBaseAlignDcc3D, metaBlkSize3D); + } + } + + return Max(maxBaseAlignHtile, Max(maxBaseAlignDcc2D, maxBaseAlignDcc3D)); +} + +/** +************************************************************************************************************************ +* Gfx11Lib::GetMetaElementSizeLog2 +* +* @brief +* Gets meta data element size log2 +* @return +* Meta data element size log2 +************************************************************************************************************************ +*/ +INT_32 Gfx11Lib::GetMetaElementSizeLog2( + Gfx11DataType dataType) ///< Data surface type +{ + INT_32 elemSizeLog2 = 0; + + if (dataType == Gfx11DataColor) + { + elemSizeLog2 = 0; + } + else + { + ADDR_ASSERT(dataType == Gfx11DataDepthStencil); + elemSizeLog2 = 2; + } + + return elemSizeLog2; +} + +/** +************************************************************************************************************************ +* Gfx11Lib::GetMetaCacheSizeLog2 +* +* @brief +* Gets meta data cache line size log2 +* @return +* Meta data cache line size log2 +************************************************************************************************************************ +*/ +INT_32 Gfx11Lib::GetMetaCacheSizeLog2( + Gfx11DataType dataType) ///< Data surface type +{ + INT_32 cacheSizeLog2 = 0; + + if (dataType == Gfx11DataColor) + { + cacheSizeLog2 = 6; + } + else + { + ADDR_ASSERT(dataType == Gfx11DataDepthStencil); + cacheSizeLog2 = 8; + } + + return cacheSizeLog2; +} + +/** +************************************************************************************************************************ +* Gfx11Lib::HwlComputeSurfaceInfoLinear +* +* @brief +* Internal function to calculate alignment for linear surface +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx11Lib::HwlComputeSurfaceInfoLinear( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (IsTex1d(pIn->resourceType) && (pIn->height > 1)) + { + returnCode = ADDR_INVALIDPARAMS; + } + else + { + const UINT_32 elementBytes = pIn->bpp >> 3; + const UINT_32 pitchAlign = (pIn->swizzleMode == ADDR_SW_LINEAR_GENERAL) ? 1 : (256 / elementBytes); + const UINT_32 mipDepth = (pIn->resourceType == ADDR_RSRC_TEX_3D) ? pIn->numSlices : 1; + UINT_32 pitch = PowTwoAlign(pIn->width, pitchAlign); + UINT_32 actualHeight = pIn->height; + UINT_64 sliceSize = 0; + + if (pIn->numMipLevels > 1) + { + for (INT_32 i = static_cast(pIn->numMipLevels) - 1; i >= 0; i--) + { + UINT_32 mipWidth, mipHeight; + + GetMipSize(pIn->width, pIn->height, 1, i, &mipWidth, &mipHeight); + + const UINT_32 mipActualWidth = PowTwoAlign(mipWidth, pitchAlign); + + if (pOut->pMipInfo != NULL) + { + pOut->pMipInfo[i].pitch = mipActualWidth; + pOut->pMipInfo[i].height = mipHeight; + pOut->pMipInfo[i].depth = mipDepth; + pOut->pMipInfo[i].offset = sliceSize; + pOut->pMipInfo[i].mipTailOffset = 0; + pOut->pMipInfo[i].macroBlockOffset = sliceSize; + } + + sliceSize += static_cast(mipActualWidth) * mipHeight * elementBytes; + } + } + else + { + returnCode = ApplyCustomizedPitchHeight(pIn, elementBytes, pitchAlign, &pitch, &actualHeight); + + if (returnCode == ADDR_OK) + { + sliceSize = static_cast(pitch) * actualHeight * elementBytes; + + if (pOut->pMipInfo != NULL) + { + pOut->pMipInfo[0].pitch = pitch; + pOut->pMipInfo[0].height = actualHeight; + pOut->pMipInfo[0].depth = mipDepth; + pOut->pMipInfo[0].offset = 0; + pOut->pMipInfo[0].mipTailOffset = 0; + pOut->pMipInfo[0].macroBlockOffset = 0; + } + } + } + + if (returnCode == ADDR_OK) + { + pOut->pitch = pitch; + pOut->height = actualHeight; + pOut->numSlices = pIn->numSlices; + pOut->sliceSize = sliceSize; + pOut->surfSize = sliceSize * pOut->numSlices; + pOut->baseAlign = (pIn->swizzleMode == ADDR_SW_LINEAR_GENERAL) ? elementBytes : 256; + pOut->blockWidth = pitchAlign; + pOut->blockHeight = 1; + pOut->blockSlices = 1; + + // Following members are useless on GFX11 + pOut->mipChainPitch = 0; + pOut->mipChainHeight = 0; + pOut->mipChainSlice = 0; + pOut->epitchIsHeight = FALSE; + + // Post calculation validate + ADDR_ASSERT(pOut->sliceSize > 0); + } + } + + return returnCode; +} + +} // V2 +} // Addr +} // rocr diff --git a/runtime/hsa-runtime/image/addrlib/src/gfx11/gfx11addrlib.h b/runtime/hsa-runtime/image/addrlib/src/gfx11/gfx11addrlib.h new file mode 100644 index 0000000000..391eda2cbc --- /dev/null +++ b/runtime/hsa-runtime/image/addrlib/src/gfx11/gfx11addrlib.h @@ -0,0 +1,559 @@ +/* +************************************************************************************************************************ +* +* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +* OTHER DEALINGS IN THE SOFTWARE +* +***********************************************************************************************************************/ + +/** +************************************************************************************************************************ +* @file gfx11addrlib.h +* @brief Contains the Gfx11Lib class definition. +************************************************************************************************************************ +*/ + +#ifndef __GFX11_ADDR_LIB_H__ +#define __GFX11_ADDR_LIB_H__ + +#include "addrlib2.h" +#include "coord.h" +#include "gfx11SwizzlePattern.h" + +namespace rocr { +namespace Addr { +namespace V2 { + +/** +************************************************************************************************************************ +* @brief GFX11 specific settings structure. +************************************************************************************************************************ +*/ +struct Gfx11ChipSettings +{ + struct + { + UINT_32 reserved1 : 32; + + // Misc configuration bits + UINT_32 reserved2 : 32; + }; +}; + +/** +************************************************************************************************************************ +* @brief GFX11 data surface type. +************************************************************************************************************************ +*/ +enum Gfx11DataType +{ + Gfx11DataColor, + Gfx11DataDepthStencil, +}; + +const UINT_32 Gfx11LinearSwModeMask = (1u << ADDR_SW_LINEAR); + +const UINT_32 Gfx11Blk256BSwModeMask = (1u << ADDR_SW_256B_D); + +const UINT_32 Gfx11Blk4KBSwModeMask = (1u << ADDR_SW_4KB_S) | + (1u << ADDR_SW_4KB_D) | + (1u << ADDR_SW_4KB_S_X) | + (1u << ADDR_SW_4KB_D_X); + +const UINT_32 Gfx11Blk64KBSwModeMask = (1u << ADDR_SW_64KB_S) | + (1u << ADDR_SW_64KB_D) | + (1u << ADDR_SW_64KB_S_T) | + (1u << ADDR_SW_64KB_D_T) | + (1u << ADDR_SW_64KB_Z_X) | + (1u << ADDR_SW_64KB_S_X) | + (1u << ADDR_SW_64KB_D_X) | + (1u << ADDR_SW_64KB_R_X); + +const UINT_32 Gfx11Blk256KBSwModeMask = (1u << ADDR_SW_256KB_Z_X) | + (1u << ADDR_SW_256KB_S_X) | + (1u << ADDR_SW_256KB_D_X) | + (1u << ADDR_SW_256KB_R_X); + +const UINT_32 Gfx11ZSwModeMask = (1u << ADDR_SW_64KB_Z_X) | + (1u << ADDR_SW_256KB_Z_X); + +const UINT_32 Gfx11StandardSwModeMask = (1u << ADDR_SW_4KB_S) | + (1u << ADDR_SW_64KB_S) | + (1u << ADDR_SW_64KB_S_T) | + (1u << ADDR_SW_4KB_S_X) | + (1u << ADDR_SW_64KB_S_X) | + (1u << ADDR_SW_256KB_S_X); + +const UINT_32 Gfx11DisplaySwModeMask = (1u << ADDR_SW_256B_D) | + (1u << ADDR_SW_4KB_D) | + (1u << ADDR_SW_64KB_D) | + (1u << ADDR_SW_64KB_D_T) | + (1u << ADDR_SW_4KB_D_X) | + (1u << ADDR_SW_64KB_D_X) | + (1u << ADDR_SW_256KB_D_X); + +const UINT_32 Gfx11RenderSwModeMask = (1u << ADDR_SW_64KB_R_X) | + (1u << ADDR_SW_256KB_R_X); + +const UINT_32 Gfx11XSwModeMask = (1u << ADDR_SW_4KB_S_X) | + (1u << ADDR_SW_4KB_D_X) | + (1u << ADDR_SW_64KB_Z_X) | + (1u << ADDR_SW_64KB_S_X) | + (1u << ADDR_SW_64KB_D_X) | + (1u << ADDR_SW_64KB_R_X) | + Gfx11Blk256KBSwModeMask; + +const UINT_32 Gfx11TSwModeMask = (1u << ADDR_SW_64KB_S_T) | + (1u << ADDR_SW_64KB_D_T); + +const UINT_32 Gfx11XorSwModeMask = Gfx11XSwModeMask | + Gfx11TSwModeMask; + +const UINT_32 Gfx11Rsrc1dSwModeMask = (1u << ADDR_SW_LINEAR) | + (1u << ADDR_SW_64KB_R_X) | + (1u << ADDR_SW_64KB_Z_X) ; + +const UINT_32 Gfx11Rsrc2dSwModeMask = Gfx11LinearSwModeMask | + Gfx11DisplaySwModeMask | + Gfx11ZSwModeMask | + Gfx11RenderSwModeMask; + +const UINT_32 Gfx11Rsrc3dSwModeMask = Gfx11LinearSwModeMask | + Gfx11StandardSwModeMask | + Gfx11ZSwModeMask | + Gfx11RenderSwModeMask | + (1u << ADDR_SW_64KB_D_X) | + (1u << ADDR_SW_256KB_D_X); + +const UINT_32 Gfx11Rsrc2dPrtSwModeMask = + (Gfx11Blk4KBSwModeMask | Gfx11Blk64KBSwModeMask) & ~Gfx11XSwModeMask & Gfx11Rsrc2dSwModeMask; + +const UINT_32 Gfx11Rsrc3dPrtSwModeMask = + (Gfx11Blk4KBSwModeMask | Gfx11Blk64KBSwModeMask) & ~Gfx11XSwModeMask & Gfx11Rsrc3dSwModeMask; + +const UINT_32 Gfx11Rsrc3dThin64KBSwModeMask = (1u << ADDR_SW_64KB_Z_X) | + (1u << ADDR_SW_64KB_R_X); + +const UINT_32 Gfx11Rsrc3dThin256KBSwModeMask = (1u << ADDR_SW_256KB_Z_X) | + (1u << ADDR_SW_256KB_R_X); + +const UINT_32 Gfx11Rsrc3dThinSwModeMask = Gfx11Rsrc3dThin64KBSwModeMask | Gfx11Rsrc3dThin256KBSwModeMask; + +const UINT_32 Gfx11Rsrc3dThickSwModeMask = Gfx11Rsrc3dSwModeMask & ~(Gfx11Rsrc3dThinSwModeMask | Gfx11LinearSwModeMask); + +const UINT_32 Gfx11Rsrc3dThick4KBSwModeMask = Gfx11Rsrc3dThickSwModeMask & Gfx11Blk4KBSwModeMask; + +const UINT_32 Gfx11Rsrc3dThick64KBSwModeMask = Gfx11Rsrc3dThickSwModeMask & Gfx11Blk64KBSwModeMask; + +const UINT_32 Gfx11Rsrc3dThick256KBSwModeMask = Gfx11Rsrc3dThickSwModeMask & Gfx11Blk256KBSwModeMask; + +const UINT_32 Gfx11MsaaSwModeMask = Gfx11ZSwModeMask | + Gfx11RenderSwModeMask; + +const UINT_32 Dcn32SwModeMask = (1u << ADDR_SW_LINEAR) | + (1u << ADDR_SW_64KB_D) | + (1u << ADDR_SW_64KB_D_T) | + (1u << ADDR_SW_64KB_D_X) | + (1u << ADDR_SW_64KB_R_X) | + (1u << ADDR_SW_256KB_D_X) | + (1u << ADDR_SW_256KB_R_X); + +const UINT_32 Size256K = 262144u; +const UINT_32 Log2Size256K = 18u; + +/** +************************************************************************************************************************ +* @brief This class is the GFX11 specific address library +* function set. +************************************************************************************************************************ +*/ +class Gfx11Lib : public Lib +{ +public: + /// Creates Gfx11Lib object + static Addr::Lib* CreateObj(const Client* pClient) + { + VOID* pMem = Object::ClientAlloc(sizeof(Gfx11Lib), pClient); + return (pMem != NULL) ? new (pMem) Gfx11Lib(pClient) : NULL; + } + +protected: + Gfx11Lib(const Client* pClient); + virtual ~Gfx11Lib(); + + virtual BOOL_32 HwlIsStandardSwizzle( + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode) const + { + return m_swizzleModeTable[swizzleMode].isStd; + } + + virtual BOOL_32 HwlIsDisplaySwizzle( + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode) const + { + return m_swizzleModeTable[swizzleMode].isDisp; + } + + virtual BOOL_32 HwlIsThin( + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode) const + { + return ((IsTex1d(resourceType) == TRUE) || + (IsTex2d(resourceType) == TRUE) || + ((IsTex3d(resourceType) == TRUE) && + (m_swizzleModeTable[swizzleMode].isStd == FALSE) && + (m_swizzleModeTable[swizzleMode].isDisp == FALSE))); + } + + virtual BOOL_32 HwlIsThick( + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode) const + { + return ((IsTex3d(resourceType) == TRUE) && + (m_swizzleModeTable[swizzleMode].isStd || m_swizzleModeTable[swizzleMode].isDisp)); + } + + virtual ADDR_E_RETURNCODE HwlComputeHtileInfo( + const ADDR2_COMPUTE_HTILE_INFO_INPUT* pIn, + ADDR2_COMPUTE_HTILE_INFO_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlComputeDccInfo( + const ADDR2_COMPUTE_DCCINFO_INPUT* pIn, + ADDR2_COMPUTE_DCCINFO_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlComputeHtileAddrFromCoord( + const ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn, + ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut); + + virtual ADDR_E_RETURNCODE HwlComputeHtileCoordFromAddr( + const ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn, + ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut); + + virtual ADDR_E_RETURNCODE HwlSupportComputeDccAddrFromCoord( + const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn); + + virtual VOID HwlComputeDccAddrFromCoord( + const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn, + ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT* pOut); + + virtual UINT_32 HwlGetEquationIndex( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + + virtual UINT_32 HwlGetEquationTableInfo(const ADDR_EQUATION** ppEquationTable) const + { + *ppEquationTable = m_equationTable; + + return m_numEquations; + } + + virtual ADDR_E_RETURNCODE HwlComputePipeBankXor( + const ADDR2_COMPUTE_PIPEBANKXOR_INPUT* pIn, + ADDR2_COMPUTE_PIPEBANKXOR_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlComputeSlicePipeBankXor( + const ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT* pIn, + ADDR2_COMPUTE_SLICE_PIPEBANKXOR_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlComputeSubResourceOffsetForSwizzlePattern( + const ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT* pIn, + ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlComputeNonBlockCompressedView( + const ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_INPUT* pIn, + ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlGetPreferredSurfaceSetting( + const ADDR2_GET_PREFERRED_SURF_SETTING_INPUT* pIn, + ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfoSanityCheck( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const; + + virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfoTiled( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfoLinear( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlComputeSurfaceAddrFromCoordTiled( + const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, + ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const; + + virtual UINT_32 HwlComputeMaxBaseAlignments() const; + + virtual UINT_32 HwlComputeMaxMetaBaseAlignments() const; + + virtual BOOL_32 HwlInitGlobalParams(const ADDR_CREATE_INPUT* pCreateIn); + + virtual ChipFamily HwlConvertChipFamily(UINT_32 uChipFamily, UINT_32 uChipRevision); + +private: + // Initialize equation table + VOID InitEquationTable(); + + ADDR_E_RETURNCODE ComputeSurfaceInfoMacroTiled( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeSurfaceInfoMicroTiled( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeSurfaceAddrFromCoordMacroTiled( + const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, + ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeSurfaceAddrFromCoordMicroTiled( + const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, + ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const; + + UINT_32 ComputeOffsetFromSwizzlePattern( + const UINT_64* pPattern, + UINT_32 numBits, + UINT_32 x, + UINT_32 y, + UINT_32 z, + UINT_32 s) const; + + UINT_32 ComputeOffsetFromEquation( + const ADDR_EQUATION* pEq, + UINT_32 x, + UINT_32 y, + UINT_32 z) const; + + ADDR_E_RETURNCODE ComputeStereoInfo( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, + UINT_32* pAlignY, + UINT_32* pRightXor) const; + + static void GetMipSize( + UINT_32 mip0Width, + UINT_32 mip0Height, + UINT_32 mip0Depth, + UINT_32 mipId, + UINT_32* pMipWidth, + UINT_32* pMipHeight, + UINT_32* pMipDepth = NULL) + { + *pMipWidth = ShiftCeil(Max(mip0Width, 1u), mipId); + *pMipHeight = ShiftCeil(Max(mip0Height, 1u), mipId); + + if (pMipDepth != NULL) + { + *pMipDepth = ShiftCeil(Max(mip0Depth, 1u), mipId); + } + } + + const ADDR_SW_PATINFO* GetSwizzlePatternInfo( + AddrSwizzleMode swizzleMode, + AddrResourceType resourceType, + UINT_32 log2Elem, + UINT_32 numFrag) const; + + VOID GetSwizzlePatternFromPatternInfo( + const ADDR_SW_PATINFO* pPatInfo, + ADDR_BIT_SETTING (&pSwizzle)[20]) const + { + memcpy(pSwizzle, + GFX11_SW_PATTERN_NIBBLE01[pPatInfo->nibble01Idx], + sizeof(GFX11_SW_PATTERN_NIBBLE01[pPatInfo->nibble01Idx])); + + memcpy(&pSwizzle[8], + GFX11_SW_PATTERN_NIBBLE2[pPatInfo->nibble2Idx], + sizeof(GFX11_SW_PATTERN_NIBBLE2[pPatInfo->nibble2Idx])); + + memcpy(&pSwizzle[12], + GFX11_SW_PATTERN_NIBBLE3[pPatInfo->nibble3Idx], + sizeof(GFX11_SW_PATTERN_NIBBLE3[pPatInfo->nibble3Idx])); + + memcpy(&pSwizzle[16], + GFX11_SW_PATTERN_NIBBLE4[pPatInfo->nibble4Idx], + sizeof(GFX11_SW_PATTERN_NIBBLE4[pPatInfo->nibble4Idx])); + } + + VOID ConvertSwizzlePatternToEquation( + UINT_32 elemLog2, + AddrResourceType rsrcType, + AddrSwizzleMode swMode, + const ADDR_SW_PATINFO* pPatInfo, + ADDR_EQUATION* pEquation) const; + + static INT_32 GetMetaElementSizeLog2(Gfx11DataType dataType); + + static INT_32 GetMetaCacheSizeLog2(Gfx11DataType dataType); + + void GetBlk256SizeLog2( + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode, + UINT_32 elemLog2, + UINT_32 numSamplesLog2, + Dim3d* pBlock) const; + + void GetCompressedBlockSizeLog2( + Gfx11DataType dataType, + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode, + UINT_32 elemLog2, + UINT_32 numSamplesLog2, + Dim3d* pBlock) const; + + INT_32 GetMetaOverlapLog2( + Gfx11DataType dataType, + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode, + UINT_32 elemLog2, + UINT_32 numSamplesLog2) const; + + INT_32 Get3DMetaOverlapLog2( + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode, + UINT_32 elemLog2) const; + + UINT_32 GetMetaBlkSize( + Gfx11DataType dataType, + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode, + UINT_32 elemLog2, + UINT_32 numSamplesLog2, + BOOL_32 pipeAlign, + Dim3d* pBlock) const; + + INT_32 GetPipeRotateAmount( + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode) const; + + INT_32 GetEffectiveNumPipes() const + { + return ((m_numSaLog2 + 1) >= m_pipesLog2) ? m_pipesLog2 : m_numSaLog2 + 1; + } + + BOOL_32 IsRbAligned( + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode) const + { + const BOOL_32 isRtopt = IsRtOptSwizzle(swizzleMode); + const BOOL_32 isZ = IsZOrderSwizzle(swizzleMode); + const BOOL_32 isDisplay = IsDisplaySwizzle(swizzleMode); + + return (IsTex2d(resourceType) && (isRtopt || isZ)) || + (IsTex3d(resourceType) && isDisplay); + + } + + UINT_32 GetValidDisplaySwizzleModes(UINT_32 bpp) const; + + BOOL_32 IsValidDisplaySwizzleMode(const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const; + + UINT_32 GetMaxNumMipsInTail(UINT_32 blockSizeLog2, BOOL_32 isThin) const; + + static ADDR2_BLOCK_SET GetAllowedBlockSet(ADDR2_SWMODE_SET allowedSwModeSet, AddrResourceType rsrcType) + { + ADDR2_BLOCK_SET allowedBlockSet = {}; + + allowedBlockSet.micro = (allowedSwModeSet.value & Gfx11Blk256BSwModeMask) ? TRUE : FALSE; + allowedBlockSet.linear = (allowedSwModeSet.value & Gfx11LinearSwModeMask) ? TRUE : FALSE; + + if (rsrcType == ADDR_RSRC_TEX_3D) + { + allowedBlockSet.macroThick4KB = (allowedSwModeSet.value & Gfx11Rsrc3dThick4KBSwModeMask) ? TRUE : FALSE; + allowedBlockSet.macroThin64KB = (allowedSwModeSet.value & Gfx11Rsrc3dThin64KBSwModeMask) ? TRUE : FALSE; + allowedBlockSet.macroThick64KB = (allowedSwModeSet.value & Gfx11Rsrc3dThick64KBSwModeMask) ? TRUE : FALSE; + allowedBlockSet.gfx11.thin256KB = (allowedSwModeSet.value & Gfx11Rsrc3dThin256KBSwModeMask) ? TRUE : FALSE; + allowedBlockSet.gfx11.thick256KB = (allowedSwModeSet.value & Gfx11Rsrc3dThick256KBSwModeMask) ? TRUE : FALSE; + } + else + { + allowedBlockSet.macroThin4KB = (allowedSwModeSet.value & Gfx11Blk4KBSwModeMask) ? TRUE : FALSE; + allowedBlockSet.macroThin64KB = (allowedSwModeSet.value & Gfx11Blk64KBSwModeMask) ? TRUE : FALSE; + allowedBlockSet.gfx11.thin256KB = (allowedSwModeSet.value & Gfx11Blk256KBSwModeMask) ? TRUE : FALSE; + } + + return allowedBlockSet; + } + + static ADDR2_SWTYPE_SET GetAllowedSwSet(ADDR2_SWMODE_SET allowedSwModeSet) + { + ADDR2_SWTYPE_SET allowedSwSet = {}; + + allowedSwSet.sw_Z = (allowedSwModeSet.value & Gfx11ZSwModeMask) ? TRUE : FALSE; + allowedSwSet.sw_S = (allowedSwModeSet.value & Gfx11StandardSwModeMask) ? TRUE : FALSE; + allowedSwSet.sw_D = (allowedSwModeSet.value & Gfx11DisplaySwModeMask) ? TRUE : FALSE; + allowedSwSet.sw_R = (allowedSwModeSet.value & Gfx11RenderSwModeMask) ? TRUE : FALSE; + + return allowedSwSet; + } + + BOOL_32 IsInMipTail( + Dim3d mipTailDim, + UINT_32 maxNumMipsInTail, + UINT_32 mipWidth, + UINT_32 mipHeight, + UINT_32 numMipsToTheEnd) const + { + BOOL_32 inTail = ((mipWidth <= mipTailDim.w) && + (mipHeight <= mipTailDim.h) && + (numMipsToTheEnd <= maxNumMipsInTail)); + + return inTail; + } + + UINT_32 GetBankXorBits(UINT_32 blockBits) const + { + return (blockBits > m_pipeInterleaveLog2 + m_pipesLog2 + ColumnBits) ? + Min(blockBits - m_pipeInterleaveLog2 - m_pipesLog2 - ColumnBits, BankBits) : 0; + } + + BOOL_32 ValidateNonSwModeParams(const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const; + BOOL_32 ValidateSwModeParams(const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const; + + BOOL_32 IsBlock256kb(AddrSwizzleMode swizzleMode) const { return IsBlockVariable(swizzleMode); } + + // TODO: figure out if there is any Column bits on GFX11... + static const UINT_32 ColumnBits = 2; + static const UINT_32 BankBits = 4; + static const UINT_32 UnalignedDccType = 3; + + static const Dim3d Block256_3d[MaxNumOfBpp]; + static const Dim3d Block256K_Log2_3d[MaxNumOfBpp]; + static const Dim3d Block64K_Log2_3d[MaxNumOfBpp]; + static const Dim3d Block4K_Log2_3d[MaxNumOfBpp]; + + static const SwizzleModeFlags SwizzleModeTable[ADDR_SW_MAX_TYPE]; + + // Number of packers log2 + UINT_32 m_numPkrLog2; + // Number of shader array log2 + UINT_32 m_numSaLog2; + + Gfx11ChipSettings m_settings; + + UINT_32 m_colorBaseIndex; + UINT_32 m_htileBaseIndex; + UINT_32 m_dccBaseIndex; +}; + +} // V2 +} // Addr +} // rocr +#endif diff --git a/runtime/hsa-runtime/image/addrlib/src/gfx9/gfx9addrlib.cpp b/runtime/hsa-runtime/image/addrlib/src/gfx9/gfx9addrlib.cpp index df00791d8e..ef3f7dbf54 100644 --- a/runtime/hsa-runtime/image/addrlib/src/gfx9/gfx9addrlib.cpp +++ b/runtime/hsa-runtime/image/addrlib/src/gfx9/gfx9addrlib.cpp @@ -1,28 +1,27 @@ /* - * Copyright © 2007-2019 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ +************************************************************************************************************************ +* +* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +* OTHER DEALINGS IN THE SOFTWARE +* +***********************************************************************************************************************/ /** ************************************************************************************************************************ @@ -37,13 +36,11 @@ #include "amdgpu_asic_addr.h" -#include "util/macros.h" +//////////////////////////////////////////////////////////////////////////////////////////////////// +//////////////////////////////////////////////////////////////////////////////////////////////////// -//////////////////////////////////////////////////////////////////////////////////////////////////// -//////////////////////////////////////////////////////////////////////////////////////////////////// namespace rocr { -namespace Addr -{ +namespace Addr { /** ************************************************************************************************************************ @@ -70,46 +67,46 @@ namespace V2 const SwizzleModeFlags Gfx9Lib::SwizzleModeTable[ADDR_SW_MAX_TYPE] = {//Linear 256B 4KB 64KB Var Z Std Disp Rot XOR T RtOpt Reserved - {1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // ADDR_SW_LINEAR - {0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0}, // ADDR_SW_256B_S - {0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0}, // ADDR_SW_256B_D - {0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0}, // ADDR_SW_256B_R + {{1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // ADDR_SW_LINEAR + {{0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0}}, // ADDR_SW_256B_S + {{0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0}}, // ADDR_SW_256B_D + {{0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0}}, // ADDR_SW_256B_R - {0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0}, // ADDR_SW_4KB_Z - {0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0}, // ADDR_SW_4KB_S - {0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0}, // ADDR_SW_4KB_D - {0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0}, // ADDR_SW_4KB_R + {{0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0}}, // ADDR_SW_4KB_Z + {{0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0}}, // ADDR_SW_4KB_S + {{0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0}}, // ADDR_SW_4KB_D + {{0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0}}, // ADDR_SW_4KB_R - {0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0}, // ADDR_SW_64KB_Z - {0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0}, // ADDR_SW_64KB_S - {0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0}, // ADDR_SW_64KB_D - {0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0}, // ADDR_SW_64KB_R + {{0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0}}, // ADDR_SW_64KB_Z + {{0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0}}, // ADDR_SW_64KB_S + {{0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0}}, // ADDR_SW_64KB_D + {{0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0}}, // ADDR_SW_64KB_R - {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved - {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved - {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved - {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved + {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved + {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved + {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved + {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved - {0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 1, 0, 0}, // ADDR_SW_64KB_Z_T - {0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 1, 0, 0}, // ADDR_SW_64KB_S_T - {0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 0, 0}, // ADDR_SW_64KB_D_T - {0, 0, 0, 1, 0, 0, 0, 0, 1, 1, 1, 0, 0}, // ADDR_SW_64KB_R_T + {{0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 1, 0, 0}}, // ADDR_SW_64KB_Z_T + {{0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 1, 0, 0}}, // ADDR_SW_64KB_S_T + {{0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 0, 0}}, // ADDR_SW_64KB_D_T + {{0, 0, 0, 1, 0, 0, 0, 0, 1, 1, 1, 0, 0}}, // ADDR_SW_64KB_R_T - {0, 0, 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0}, // ADDR_SW_4KB_Z_x - {0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0}, // ADDR_SW_4KB_S_x - {0, 0, 1, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0}, // ADDR_SW_4KB_D_x - {0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0}, // ADDR_SW_4KB_R_x + {{0, 0, 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0}}, // ADDR_SW_4KB_Z_x + {{0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0}}, // ADDR_SW_4KB_S_x + {{0, 0, 1, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0}}, // ADDR_SW_4KB_D_x + {{0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0}}, // ADDR_SW_4KB_R_x - {0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0}, // ADDR_SW_64KB_Z_X - {0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0}, // ADDR_SW_64KB_S_X - {0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 0, 0, 0}, // ADDR_SW_64KB_D_X - {0, 0, 0, 1, 0, 0, 0, 0, 1, 1, 0, 0, 0}, // ADDR_SW_64KB_R_X + {{0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0}}, // ADDR_SW_64KB_Z_X + {{0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0}}, // ADDR_SW_64KB_S_X + {{0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 0, 0, 0}}, // ADDR_SW_64KB_D_X + {{0, 0, 0, 1, 0, 0, 0, 0, 1, 1, 0, 0, 0}}, // ADDR_SW_64KB_R_X - {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved - {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved - {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved - {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved - {1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // ADDR_SW_LINEAR_GENERAL + {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved + {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved + {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved + {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved + {{1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // ADDR_SW_LINEAR_GENERAL }; const UINT_32 Gfx9Lib::MipTailOffset256B[] = {2048, 1024, 512, 256, 128, 64, 32, 16, 8, 6, 5, 4, 3, 2, 1, 0}; @@ -131,7 +128,6 @@ Gfx9Lib::Gfx9Lib(const Client* pClient) : Lib(pClient) { - m_class = AI_ADDRLIB; memset(&m_settings, 0, sizeof(m_settings)); memcpy(m_swizzleModeTable, SwizzleModeTable, sizeof(SwizzleModeTable)); memset(m_cachedMetaEqKey, 0, sizeof(m_cachedMetaEqKey)); @@ -353,6 +349,50 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlComputeCmaskInfo( pOut->metaBlkNumPerSlice = numMetaBlkX * numMetaBlkY; + // Get the CMASK address equation (copied from CmaskAddrFromCoord) + UINT_32 fmaskBpp = GetFmaskBpp(1, 1); + UINT_32 fmaskElementBytesLog2 = Log2(fmaskBpp >> 3); + UINT_32 metaBlkWidthLog2 = Log2(pOut->metaBlkWidth); + UINT_32 metaBlkHeightLog2 = Log2(pOut->metaBlkHeight); + + MetaEqParams metaEqParams = {0, fmaskElementBytesLog2, 0, pIn->cMaskFlags, + Gfx9DataFmask, pIn->swizzleMode, pIn->resourceType, + metaBlkWidthLog2, metaBlkHeightLog2, 0, 3, 3, 0}; + + CoordEq *eq = (CoordEq *)((Gfx9Lib *)this)->GetMetaEquation(metaEqParams); + + // Generate the CMASK address equation. + pOut->equation.gfx9.num_bits = Min(32u, eq->getsize()); + bool checked = false; + for (unsigned b = 0; b < pOut->equation.gfx9.num_bits; b++) { + CoordTerm &bit = (*eq)[b]; + + unsigned c; + for (c = 0; c < bit.getsize(); c++) { + Coordinate &coord = bit[c]; + pOut->equation.gfx9.bit[b].coord[c].dim = coord.getdim(); + pOut->equation.gfx9.bit[b].coord[c].ord = coord.getord(); + } + for (; c < 5; c++) + pOut->equation.gfx9.bit[b].coord[c].dim = 5; /* meaning invalid */ + } + + // Reduce num_bits because DIM_M fills the rest of the bits monotonically. + for (int b = pOut->equation.gfx9.num_bits - 1; b >= 1; b--) { + CoordTerm &prev = (*eq)[b - 1]; + CoordTerm &cur = (*eq)[b]; + + if (cur.getsize() == 1 && cur[0].getdim() == DIM_M && + prev.getsize() == 1 && prev[0].getdim() == DIM_M && + prev[0].getord() + 1 == cur[0].getord()) + pOut->equation.gfx9.num_bits = b; + else + break; + } + + pOut->equation.gfx9.numPipeBits = GetPipeLog2ForMetaAddressing(pIn->cMaskFlags.pipeAligned, + pIn->swizzleMode); + return ADDR_OK; } @@ -663,10 +703,60 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlComputeDccInfo( pOut->metaBlkWidth = metaBlkDim.w; pOut->metaBlkHeight = metaBlkDim.h; pOut->metaBlkDepth = metaBlkDim.d; + pOut->metaBlkSize = numCompressBlkPerMetaBlk * numFrags; pOut->metaBlkNumPerSlice = numMetaBlkX * numMetaBlkY; pOut->fastClearSizePerSlice = pOut->metaBlkNumPerSlice * numCompressBlkPerMetaBlk * Min(numFrags, m_maxCompFrag); + + // Get the DCC address equation (copied from DccAddrFromCoord) + UINT_32 elementBytesLog2 = Log2(pIn->bpp >> 3); + UINT_32 numSamplesLog2 = Log2(pIn->numFrags); + UINT_32 metaBlkWidthLog2 = Log2(pOut->metaBlkWidth); + UINT_32 metaBlkHeightLog2 = Log2(pOut->metaBlkHeight); + UINT_32 metaBlkDepthLog2 = Log2(pOut->metaBlkDepth); + UINT_32 compBlkWidthLog2 = Log2(pOut->compressBlkWidth); + UINT_32 compBlkHeightLog2 = Log2(pOut->compressBlkHeight); + UINT_32 compBlkDepthLog2 = Log2(pOut->compressBlkDepth); + + MetaEqParams metaEqParams = {0, elementBytesLog2, numSamplesLog2, pIn->dccKeyFlags, + Gfx9DataColor, pIn->swizzleMode, pIn->resourceType, + metaBlkWidthLog2, metaBlkHeightLog2, metaBlkDepthLog2, + compBlkWidthLog2, compBlkHeightLog2, compBlkDepthLog2}; + + CoordEq *eq = (CoordEq *)((Gfx9Lib *)this)->GetMetaEquation(metaEqParams); + + // Generate the DCC address equation. + pOut->equation.gfx9.num_bits = Min(32u, eq->getsize()); + bool checked = false; + for (unsigned b = 0; b < pOut->equation.gfx9.num_bits; b++) { + CoordTerm &bit = (*eq)[b]; + + unsigned c; + for (c = 0; c < bit.getsize(); c++) { + Coordinate &coord = bit[c]; + pOut->equation.gfx9.bit[b].coord[c].dim = coord.getdim(); + pOut->equation.gfx9.bit[b].coord[c].ord = coord.getord(); + } + for (; c < 5; c++) + pOut->equation.gfx9.bit[b].coord[c].dim = 5; /* meaning invalid */ + } + + // Reduce num_bits because DIM_M fills the rest of the bits monotonically. + for (int b = pOut->equation.gfx9.num_bits - 1; b >= 1; b--) { + CoordTerm &prev = (*eq)[b - 1]; + CoordTerm &cur = (*eq)[b]; + + if (cur.getsize() == 1 && cur[0].getdim() == DIM_M && + prev.getsize() == 1 && prev[0].getdim() == DIM_M && + prev[0].getord() + 1 == cur[0].getord()) + pOut->equation.gfx9.num_bits = b; + else + break; + } + + pOut->equation.gfx9.numPipeBits = GetPipeLog2ForMetaAddressing(pIn->dccKeyFlags.pipeAligned, + pIn->swizzleMode); } return ADDR_OK; @@ -799,12 +889,13 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlComputeCmaskAddrFromCoord( UINT_32 sliceSizeInBlock = (output.height / output.metaBlkHeight) * pitchInBlock; UINT_32 blockIndex = zb * sliceSizeInBlock + yb * pitchInBlock + xb; - UINT_32 coords[] = { pIn->x, pIn->y, pIn->slice, 0, blockIndex }; - UINT_64 address = pMetaEq->solve(coords); + UINT_32 coords[] = {pIn->x, pIn->y, pIn->slice, 0, blockIndex}; + UINT_64 address = pMetaEq->solve(coords); pOut->addr = address >> 1; pOut->bitPosition = static_cast((address & 1) << 2); + UINT_32 numPipeBits = GetPipeLog2ForMetaAddressing(pIn->cMaskFlags.pipeAligned, pIn->swizzleMode); @@ -875,8 +966,8 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlComputeHtileAddrFromCoord( UINT_32 sliceSizeInBlock = (output.height / output.metaBlkHeight) * pitchInBlock; UINT_32 blockIndex = zb * sliceSizeInBlock + yb * pitchInBlock + xb; - UINT_32 coords[] = { pIn->x, pIn->y, pIn->slice, 0, blockIndex }; - UINT_64 address = pMetaEq->solve(coords); + UINT_32 coords[] = {pIn->x, pIn->y, pIn->slice, 0, blockIndex}; + UINT_64 address = pMetaEq->solve(coords); pOut->addr = address >> 1; @@ -964,6 +1055,42 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlComputeHtileCoordFromAddr( return returnCode; } +/** +************************************************************************************************************************ +* Gfx9Lib::HwlSupportComputeDccAddrFromCoord +* +* @brief +* Check whether HwlComputeDccAddrFromCoord() can be done for the input parameter +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx9Lib::HwlSupportComputeDccAddrFromCoord( + const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn) +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if ((pIn->numMipLevels > 1) || (pIn->mipId > 1) || pIn->dccKeyFlags.linear) + { + returnCode = ADDR_NOTSUPPORTED; + } + else if ((pIn->pitch == 0) || + (pIn->height == 0) || + (pIn->compressBlkWidth == 0) || + (pIn->compressBlkHeight == 0) || + (pIn->compressBlkDepth == 0) || + (pIn->metaBlkWidth == 0) || + (pIn->metaBlkHeight == 0) || + (pIn->metaBlkDepth == 0) || + (pIn->slice > 0 && pIn->dccRamSliceSize == 0)) + { + returnCode = ADDR_NOTSUPPORTED; + } + + return returnCode; +} + /** ************************************************************************************************************************ * Gfx9Lib::HwlComputeDccAddrFromCoord @@ -972,59 +1099,48 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlComputeHtileCoordFromAddr( * Interface function stub of AddrComputeDccAddrFromCoord * * @return -* ADDR_E_RETURNCODE +* N/A ************************************************************************************************************************ */ -ADDR_E_RETURNCODE Gfx9Lib::HwlComputeDccAddrFromCoord( +VOID Gfx9Lib::HwlComputeDccAddrFromCoord( const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn, ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT* pOut) { - ADDR_E_RETURNCODE returnCode = ADDR_OK; + UINT_32 elementBytesLog2 = Log2(pIn->bpp >> 3); + UINT_32 numSamplesLog2 = Log2(pIn->numFrags); + UINT_32 metaBlkWidthLog2 = Log2(pIn->metaBlkWidth); + UINT_32 metaBlkHeightLog2 = Log2(pIn->metaBlkHeight); + UINT_32 metaBlkDepthLog2 = Log2(pIn->metaBlkDepth); + UINT_32 compBlkWidthLog2 = Log2(pIn->compressBlkWidth); + UINT_32 compBlkHeightLog2 = Log2(pIn->compressBlkHeight); + UINT_32 compBlkDepthLog2 = Log2(pIn->compressBlkDepth); - if ((pIn->numMipLevels > 1) || (pIn->mipId > 1) || pIn->dccKeyFlags.linear) - { - returnCode = ADDR_NOTIMPLEMENTED; - } - else - { - UINT_32 elementBytesLog2 = Log2(pIn->bpp >> 3); - UINT_32 numSamplesLog2 = Log2(pIn->numFrags); - UINT_32 metaBlkWidthLog2 = Log2(pIn->metaBlkWidth); - UINT_32 metaBlkHeightLog2 = Log2(pIn->metaBlkHeight); - UINT_32 metaBlkDepthLog2 = Log2(pIn->metaBlkDepth); - UINT_32 compBlkWidthLog2 = Log2(pIn->compressBlkWidth); - UINT_32 compBlkHeightLog2 = Log2(pIn->compressBlkHeight); - UINT_32 compBlkDepthLog2 = Log2(pIn->compressBlkDepth); + MetaEqParams metaEqParams = {pIn->mipId, elementBytesLog2, numSamplesLog2, pIn->dccKeyFlags, + Gfx9DataColor, pIn->swizzleMode, pIn->resourceType, + metaBlkWidthLog2, metaBlkHeightLog2, metaBlkDepthLog2, + compBlkWidthLog2, compBlkHeightLog2, compBlkDepthLog2}; - MetaEqParams metaEqParams = {pIn->mipId, elementBytesLog2, numSamplesLog2, pIn->dccKeyFlags, - Gfx9DataColor, pIn->swizzleMode, pIn->resourceType, - metaBlkWidthLog2, metaBlkHeightLog2, metaBlkDepthLog2, - compBlkWidthLog2, compBlkHeightLog2, compBlkDepthLog2}; + const CoordEq* pMetaEq = GetMetaEquation(metaEqParams); - const CoordEq* pMetaEq = GetMetaEquation(metaEqParams); + UINT_32 xb = pIn->x / pIn->metaBlkWidth; + UINT_32 yb = pIn->y / pIn->metaBlkHeight; + UINT_32 zb = pIn->slice / pIn->metaBlkDepth; - UINT_32 xb = pIn->x / pIn->metaBlkWidth; - UINT_32 yb = pIn->y / pIn->metaBlkHeight; - UINT_32 zb = pIn->slice / pIn->metaBlkDepth; + UINT_32 pitchInBlock = pIn->pitch / pIn->metaBlkWidth; + UINT_32 sliceSizeInBlock = (pIn->height / pIn->metaBlkHeight) * pitchInBlock; + UINT_32 blockIndex = zb * sliceSizeInBlock + yb * pitchInBlock + xb; - UINT_32 pitchInBlock = pIn->pitch / pIn->metaBlkWidth; - UINT_32 sliceSizeInBlock = (pIn->height / pIn->metaBlkHeight) * pitchInBlock; - UINT_32 blockIndex = zb * sliceSizeInBlock + yb * pitchInBlock + xb; + UINT_32 coords[] = {pIn->x, pIn->y, pIn->slice, pIn->sample, blockIndex}; + UINT_64 address = pMetaEq->solve(coords); - UINT_32 coords[] = { pIn->x, pIn->y, pIn->slice, pIn->sample, blockIndex }; - UINT_64 address = pMetaEq->solve(coords); + pOut->addr = address >> 1; - pOut->addr = address >> 1; + UINT_32 numPipeBits = GetPipeLog2ForMetaAddressing(pIn->dccKeyFlags.pipeAligned, + pIn->swizzleMode); - UINT_32 numPipeBits = GetPipeLog2ForMetaAddressing(pIn->dccKeyFlags.pipeAligned, - pIn->swizzleMode); + UINT_64 pipeXor = static_cast(pIn->pipeXor & ((1 << numPipeBits) - 1)); - UINT_64 pipeXor = static_cast(pIn->pipeXor & ((1 << numPipeBits) - 1)); - - pOut->addr ^= (pipeXor << m_pipeInterleaveLog2); - } - - return returnCode; + pOut->addr ^= (pipeXor << m_pipeInterleaveLog2); } /** @@ -1046,7 +1162,7 @@ BOOL_32 Gfx9Lib::HwlInitGlobalParams( if (m_settings.isArcticIsland) { - GB_ADDR_CONFIG_gfx9 gbAddrConfig; + GB_ADDR_CONFIG_GFX9 gbAddrConfig; gbAddrConfig.u32All = pCreateIn->regValue.gbAddrConfig; @@ -1206,6 +1322,7 @@ BOOL_32 Gfx9Lib::HwlInitGlobalParams( ((m_pipesLog2 == 2) && ((m_seLog2 == 1) || (m_seLog2 == 2))))) { ADDR_ASSERT(m_settings.isVega10 == FALSE); + ADDR_ASSERT(m_settings.isRaven == FALSE); ADDR_ASSERT(m_settings.isVega20 == FALSE); @@ -1289,18 +1406,19 @@ ChipFamily Gfx9Lib::HwlConvertChipFamily( m_settings.applyAliasFix = 1; } + m_settings.isDcn1 = m_settings.isRaven; + if (ASICREV_IS_RENOIR(uChipRevision)) { m_settings.isRaven = 1; + m_settings.isDcn2 = 1; } - m_settings.isDcn1 = m_settings.isRaven; - m_settings.metaBaseAlignFix = 1; break; default: - ADDR_ASSERT(!"This should be a Fusion"); + ADDR_ASSERT(!"No Chip found"); break; } @@ -2466,7 +2584,7 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlComputeBlock256Equation( // Post validation if (ret == ADDR_OK) { - ASSERTED Dim2d microBlockDim = Block256_2d[elementBytesLog2]; + Dim2d microBlockDim = Block256_2d[elementBytesLog2]; ADDR_ASSERT((2u << GetMaxValidChannelIndex(pEquation->addr, 8, 0)) == (microBlockDim.w * (1 << elementBytesLog2))); ADDR_ASSERT((2u << GetMaxValidChannelIndex(pEquation->addr, 8, 1)) == microBlockDim.h); @@ -2918,54 +3036,39 @@ BOOL_32 Gfx9Lib::IsValidDisplaySwizzleMode( { BOOL_32 support = FALSE; + const UINT_32 swizzleMask = 1 << pIn->swizzleMode; + if (m_settings.isDce12) { - switch (pIn->swizzleMode) + if (pIn->bpp == 32) { - case ADDR_SW_256B_D: - case ADDR_SW_256B_R: - support = (pIn->bpp == 32); - break; - - case ADDR_SW_LINEAR: - case ADDR_SW_4KB_D: - case ADDR_SW_4KB_R: - case ADDR_SW_64KB_D: - case ADDR_SW_64KB_R: - case ADDR_SW_4KB_D_X: - case ADDR_SW_4KB_R_X: - case ADDR_SW_64KB_D_X: - case ADDR_SW_64KB_R_X: - support = (pIn->bpp <= 64); - break; - - default: - break; + support = (Dce12Bpp32SwModeMask & swizzleMask) ? TRUE : FALSE; + } + else if (pIn->bpp <= 64) + { + support = (Dce12NonBpp32SwModeMask & swizzleMask) ? TRUE : FALSE; } } else if (m_settings.isDcn1) { - switch (pIn->swizzleMode) + if (pIn->bpp < 64) { - case ADDR_SW_4KB_D: - case ADDR_SW_64KB_D: - case ADDR_SW_64KB_D_T: - case ADDR_SW_4KB_D_X: - case ADDR_SW_64KB_D_X: - support = (pIn->bpp == 64); - break; - - case ADDR_SW_LINEAR: - case ADDR_SW_4KB_S: - case ADDR_SW_64KB_S: - case ADDR_SW_64KB_S_T: - case ADDR_SW_4KB_S_X: - case ADDR_SW_64KB_S_X: - support = (pIn->bpp <= 64); - break; - - default: - break; + support = (Dcn1NonBpp64SwModeMask & swizzleMask) ? TRUE : FALSE; + } + else if (pIn->bpp == 64) + { + support = (Dcn1Bpp64SwModeMask & swizzleMask) ? TRUE : FALSE; + } + } + else if (m_settings.isDcn2) + { + if (pIn->bpp < 64) + { + support = (Dcn2NonBpp64SwModeMask & swizzleMask) ? TRUE : FALSE; + } + else if (pIn->bpp == 64) + { + support = (Dcn2Bpp64SwModeMask & swizzleMask) ? TRUE : FALSE; } } else @@ -3578,6 +3681,10 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlGetPreferredSurfaceSetting( { allowedSwModeSet.value &= (bpp == 64) ? Dcn1Bpp64SwModeMask : Dcn1NonBpp64SwModeMask; } + else if (m_settings.isDcn2) + { + allowedSwModeSet.value &= (bpp == 64) ? Dcn2Bpp64SwModeMask : Dcn2NonBpp64SwModeMask; + } else { ADDR_NOT_IMPLEMENTED(); @@ -3626,16 +3733,24 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlGetPreferredSurfaceSetting( } else { - // Always ignore linear swizzle mode if there is other choice. - allowedSwModeSet.swLinear = 0; + const BOOL_32 computeMinSize = (pIn->flags.minimizeAlign == 1) || (pIn->memoryBudget >= 1.0); + + if ((height > 1) && (computeMinSize == FALSE)) + { + // Always ignore linear swizzle mode if: + // 1. This is a (2D/3D) resource with height > 1 + // 2. Client doesn't require computing minimize size + allowedSwModeSet.swLinear = 0; + } ADDR2_BLOCK_SET allowedBlockSet = GetAllowedBlockSet(allowedSwModeSet, pOut->resourceType); - // Determine block size if there is 2 or more block type candidates + // Determine block size if there are 2 or more block type candidates if (IsPow2(allowedBlockSet.value) == FALSE) { - AddrSwizzleMode swMode[AddrBlockMaxTiledType] = { ADDR_SW_LINEAR }; + AddrSwizzleMode swMode[AddrBlockMaxTiledType] = {}; + swMode[AddrBlockLinear] = ADDR_SW_LINEAR; swMode[AddrBlockMicro] = ADDR_SW_256B_D; swMode[AddrBlockThin4KB] = ADDR_SW_4KB_D; swMode[AddrBlockThin64KB] = ADDR_SW_64KB_D; @@ -3646,78 +3761,137 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlGetPreferredSurfaceSetting( swMode[AddrBlockThick64KB] = ADDR_SW_64KB_S; } - Dim3d blkDim[AddrBlockMaxTiledType] = {{0}, {0}, {0}, {0}, {0}, {0}}; - Dim3d padDim[AddrBlockMaxTiledType] = {{0}, {0}, {0}, {0}, {0}, {0}}; - UINT_64 padSize[AddrBlockMaxTiledType] = {0}; + UINT_64 padSize[AddrBlockMaxTiledType] = {}; - const UINT_32 ratioLow = pIn->flags.minimizeAlign ? 1 : (pIn->flags.opt4space ? 3 : 2); - const UINT_32 ratioHi = pIn->flags.minimizeAlign ? 1 : (pIn->flags.opt4space ? 2 : 1); + const UINT_32 ratioLow = computeMinSize ? 1 : (pIn->flags.opt4space ? 3 : 2); + const UINT_32 ratioHi = computeMinSize ? 1 : (pIn->flags.opt4space ? 2 : 1); const UINT_64 sizeAlignInElement = Max(NextPow2(pIn->minSizeAlign) / (bpp >> 3), 1u); UINT_32 minSizeBlk = AddrBlockMicro; UINT_64 minSize = 0; - for (UINT_32 i = AddrBlockMicro; i < AddrBlockMaxTiledType; i++) - { - if (allowedBlockSet.value & (1 << i)) - { - ComputeBlockDimensionForSurf(&blkDim[i].w, - &blkDim[i].h, - &blkDim[i].d, - bpp, - numFrags, - pOut->resourceType, - swMode[i]); + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT localOut = {}; - if (displayRsrc) + for (UINT_32 i = AddrBlockLinear; i < AddrBlockMaxTiledType; i++) + { + if (IsBlockTypeAvaiable(allowedBlockSet, static_cast(i))) + { + localIn.swizzleMode = swMode[i]; + + if (localIn.swizzleMode == ADDR_SW_LINEAR) { - blkDim[i].w = PowTwoAlign(blkDim[i].w, 32); + returnCode = HwlComputeSurfaceInfoLinear(&localIn, &localOut); + } + else + { + returnCode = HwlComputeSurfaceInfoTiled(&localIn, &localOut); } - padSize[i] = ComputePadSize(&blkDim[i], width, height, numSlices, &padDim[i]); - padSize[i] = PowTwoAlign(padSize[i] * numFrags, sizeAlignInElement); - - if ((minSize == 0) || - ((padSize[i] * ratioHi) <= (minSize * ratioLow))) + if (returnCode == ADDR_OK) { - minSize = padSize[i]; - minSizeBlk = i; + padSize[i] = localOut.surfSize; + + if ((minSize == 0) || + BlockTypeWithinMemoryBudget(minSize, padSize[i], ratioLow, ratioHi)) + { + minSize = padSize[i]; + minSizeBlk = i; + } + } + else + { + ADDR_ASSERT_ALWAYS(); + break; } } } - if ((allowedBlockSet.micro == TRUE) && - (width <= blkDim[AddrBlockMicro].w) && - (height <= blkDim[AddrBlockMicro].h) && - (NextPow2(pIn->minSizeAlign) <= Size256)) + if (pIn->memoryBudget > 1.0) { - minSizeBlk = AddrBlockMicro; + // If minimum size is given by swizzle mode with bigger-block type, then don't ever check + // smaller-block type again in coming loop + switch (minSizeBlk) + { + case AddrBlockThick64KB: + allowedBlockSet.macroThin64KB = 0; + case AddrBlockThin64KB: + allowedBlockSet.macroThick4KB = 0; + case AddrBlockThick4KB: + allowedBlockSet.macroThin4KB = 0; + case AddrBlockThin4KB: + allowedBlockSet.micro = 0; + case AddrBlockMicro: + allowedBlockSet.linear = 0; + case AddrBlockLinear: + break; + + default: + ADDR_ASSERT_ALWAYS(); + break; + } + + for (UINT_32 i = AddrBlockMicro; i < AddrBlockMaxTiledType; i++) + { + if ((i != minSizeBlk) && + IsBlockTypeAvaiable(allowedBlockSet, static_cast(i))) + { + if (BlockTypeWithinMemoryBudget(minSize, padSize[i], 0, 0, pIn->memoryBudget) == FALSE) + { + // Clear the block type if the memory waste is unacceptable + allowedBlockSet.value &= ~(1u << (i - 1)); + } + } + } + + // Remove linear block type if 2 or more block types are allowed + if (IsPow2(allowedBlockSet.value) == FALSE) + { + allowedBlockSet.linear = 0; + } + + // Select the biggest allowed block type + minSizeBlk = Log2NonPow2(allowedBlockSet.value) + 1; + + if (minSizeBlk == static_cast(AddrBlockMaxTiledType)) + { + minSizeBlk = AddrBlockLinear; + } } - if (minSizeBlk == AddrBlockMicro) + switch (minSizeBlk) { - ADDR_ASSERT(pOut->resourceType != ADDR_RSRC_TEX_3D); - allowedSwModeSet.value &= Gfx9Blk256BSwModeMask; - } - else if (minSizeBlk == AddrBlockThick4KB) - { - ADDR_ASSERT(pOut->resourceType == ADDR_RSRC_TEX_3D); - allowedSwModeSet.value &= Gfx9Rsrc3dThick4KBSwModeMask; - } - else if (minSizeBlk == AddrBlockThin4KB) - { - allowedSwModeSet.value &= (pOut->resourceType == ADDR_RSRC_TEX_3D) ? - Gfx9Rsrc3dThin4KBSwModeMask : Gfx9Blk4KBSwModeMask; - } - else if (minSizeBlk == AddrBlockThick64KB) - { - ADDR_ASSERT(pOut->resourceType == ADDR_RSRC_TEX_3D); - allowedSwModeSet.value &= Gfx9Rsrc3dThick64KBSwModeMask; - } - else - { - ADDR_ASSERT(minSizeBlk == AddrBlockThin64KB); - allowedSwModeSet.value &= (pOut->resourceType == ADDR_RSRC_TEX_3D) ? - Gfx9Rsrc3dThin64KBSwModeMask : Gfx9Blk64KBSwModeMask; + case AddrBlockLinear: + allowedSwModeSet.value &= Gfx9LinearSwModeMask; + break; + + case AddrBlockMicro: + ADDR_ASSERT(pOut->resourceType != ADDR_RSRC_TEX_3D); + allowedSwModeSet.value &= Gfx9Blk256BSwModeMask; + break; + + case AddrBlockThin4KB: + allowedSwModeSet.value &= (pOut->resourceType == ADDR_RSRC_TEX_3D) ? + Gfx9Rsrc3dThin4KBSwModeMask : Gfx9Blk4KBSwModeMask; + break; + + case AddrBlockThick4KB: + ADDR_ASSERT(pOut->resourceType == ADDR_RSRC_TEX_3D); + allowedSwModeSet.value &= Gfx9Rsrc3dThick4KBSwModeMask; + break; + + case AddrBlockThin64KB: + allowedSwModeSet.value &= (pOut->resourceType == ADDR_RSRC_TEX_3D) ? + Gfx9Rsrc3dThin64KBSwModeMask : Gfx9Blk64KBSwModeMask; + break; + + case AddrBlockThick64KB: + ADDR_ASSERT(pOut->resourceType == ADDR_RSRC_TEX_3D); + allowedSwModeSet.value &= Gfx9Rsrc3dThick64KBSwModeMask; + break; + + default: + ADDR_ASSERT_ALWAYS(); + allowedSwModeSet.value = 0; + break; } } @@ -3726,8 +3900,8 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlGetPreferredSurfaceSetting( ADDR2_SWTYPE_SET allowedSwSet = GetAllowedSwSet(allowedSwModeSet); - // Determine swizzle type if there is 2 or more swizzle type candidates - if (IsPow2(allowedSwSet.value) == FALSE) + // Determine swizzle type if there are 2 or more swizzle type candidates + if ((allowedSwSet.value != 0) && (IsPow2(allowedSwSet.value) == FALSE)) { if (ElemLib::IsBlockCompressed(pIn->format)) { @@ -3793,10 +3967,10 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlGetPreferredSurfaceSetting( allowedSwModeSet.value &= Gfx9ZSwModeMask; } } - } - // Swizzle type should be determined. - ADDR_ASSERT(IsPow2(GetAllowedSwSet(allowedSwModeSet).value)); + // Swizzle type should be determined. + ADDR_ASSERT(IsPow2(GetAllowedSwSet(allowedSwModeSet).value)); + } // Determine swizzle mode now. Always select the "largest" swizzle mode for a given block type + swizzle // type combination. For example, for AddrBlockThin64KB + ADDR_SW_S, select SW_64KB_S_X(25) if it's @@ -5056,5 +5230,4 @@ VOID Gfx9Lib::ComputeThinBlockDimension( } // V2 } // Addr -} // rocr - +} // rocr \ No newline at end of file diff --git a/runtime/hsa-runtime/image/addrlib/src/gfx9/gfx9addrlib.h b/runtime/hsa-runtime/image/addrlib/src/gfx9/gfx9addrlib.h index a620223fd0..10ea35139c 100644 --- a/runtime/hsa-runtime/image/addrlib/src/gfx9/gfx9addrlib.h +++ b/runtime/hsa-runtime/image/addrlib/src/gfx9/gfx9addrlib.h @@ -1,28 +1,27 @@ /* - * Copyright © 2007-2019 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ +************************************************************************************************************************ +* +* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +* OTHER DEALINGS IN THE SOFTWARE +* +***********************************************************************************************************************/ /** ************************************************************************************************************************ @@ -38,10 +37,8 @@ #include "coord.h" namespace rocr { -namespace Addr -{ -namespace V2 -{ +namespace Addr { +namespace V2 { /** ************************************************************************************************************************ @@ -63,7 +60,8 @@ struct Gfx9ChipSettings // Display engine IP version name UINT_32 isDce12 : 1; UINT_32 isDcn1 : 1; - UINT_32 reserved1 : 30; + UINT_32 isDcn2 : 1; + UINT_32 reserved1 : 29; // Misc configuration bits UINT_32 metaBaseAlignFix : 1; @@ -216,6 +214,16 @@ const UINT_32 Dcn1Bpp64SwModeMask = (1u << ADDR_SW_4KB_D) | (1u << ADDR_SW_64KB_D_X) | Dcn1NonBpp64SwModeMask; +const UINT_32 Dcn2NonBpp64SwModeMask = (1u << ADDR_SW_LINEAR) | + (1u << ADDR_SW_64KB_S) | + (1u << ADDR_SW_64KB_S_T) | + (1u << ADDR_SW_64KB_S_X); + +const UINT_32 Dcn2Bpp64SwModeMask = (1u << ADDR_SW_64KB_D) | + (1u << ADDR_SW_64KB_D_T) | + (1u << ADDR_SW_64KB_D_X) | + Dcn2NonBpp64SwModeMask; + /** ************************************************************************************************************************ * @brief GFX9 meta equation parameters @@ -315,7 +323,10 @@ protected: const ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn, ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut); - virtual ADDR_E_RETURNCODE HwlComputeDccAddrFromCoord( + virtual ADDR_E_RETURNCODE HwlSupportComputeDccAddrFromCoord( + const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn); + + virtual VOID HwlComputeDccAddrFromCoord( const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn, ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT* pOut); @@ -638,6 +649,5 @@ private: } // Addr } // rocr - #endif diff --git a/runtime/hsa-runtime/image/addrlib/src/r800/ciaddrlib.cpp b/runtime/hsa-runtime/image/addrlib/src/r800/ciaddrlib.cpp index 29ac53fe64..200f71589e 100644 --- a/runtime/hsa-runtime/image/addrlib/src/r800/ciaddrlib.cpp +++ b/runtime/hsa-runtime/image/addrlib/src/r800/ciaddrlib.cpp @@ -1,28 +1,27 @@ /* - * Copyright © 2007-2019 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ +************************************************************************************************************************ +* +* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +* OTHER DEALINGS IN THE SOFTWARE +* +***********************************************************************************************************************/ /** **************************************************************************************************** @@ -39,10 +38,8 @@ //////////////////////////////////////////////////////////////////////////////////////////////////// //////////////////////////////////////////////////////////////////////////////////////////////////// - namespace rocr { -namespace Addr -{ +namespace Addr { /** **************************************************************************************************** @@ -180,7 +177,6 @@ CiLib::CiLib(const Client* pClient) m_noOfMacroEntries(0), m_allowNonDispThickModes(FALSE) { - m_class = CI_ADDRLIB; } /** @@ -411,7 +407,7 @@ ChipFamily CiLib::HwlConvertChipFamily( family = ADDR_CHIP_FAMILY_VI; break; default: - ADDR_ASSERT(!"This should be a unexpected Fusion"); + ADDR_ASSERT(!"No Chip found"); break; } @@ -1589,7 +1585,14 @@ VOID CiLib::ReadGbTileMode( gbTileMode.val = regValue; pCfg->type = static_cast(gbTileMode.f.micro_tile_mode_new); - pCfg->info.pipeConfig = static_cast(gbTileMode.f.pipe_config + 1); + if (AltTilingEnabled() == TRUE) + { + pCfg->info.pipeConfig = static_cast(gbTileMode.f.alt_pipe_config + 1); + } + else + { + pCfg->info.pipeConfig = static_cast(gbTileMode.f.pipe_config + 1); + } if (pCfg->type == ADDR_DEPTH_SAMPLE_ORDER) { @@ -1731,10 +1734,19 @@ VOID CiLib::ReadGbMacroTileCfg( GB_MACROTILE_MODE gbTileMode; gbTileMode.val = regValue; - pCfg->bankHeight = 1 << gbTileMode.f.bank_height; + if (AltTilingEnabled() == TRUE) + { + pCfg->bankHeight = 1 << gbTileMode.f.alt_bank_height; + pCfg->banks = 1 << (gbTileMode.f.alt_num_banks + 1); + pCfg->macroAspectRatio = 1 << gbTileMode.f.alt_macro_tile_aspect; + } + else + { + pCfg->bankHeight = 1 << gbTileMode.f.bank_height; + pCfg->banks = 1 << (gbTileMode.f.num_banks + 1); + pCfg->macroAspectRatio = 1 << gbTileMode.f.macro_tile_aspect; + } pCfg->bankWidth = 1 << gbTileMode.f.bank_width; - pCfg->banks = 1 << (gbTileMode.f.num_banks + 1); - pCfg->macroAspectRatio = 1 << gbTileMode.f.macro_tile_aspect; } /** @@ -2033,6 +2045,7 @@ UINT_64 CiLib::HwlComputeMetadataNibbleAddress( /// NOTE *2 because we are converting to Nibble address in this step UINT_64 metaAddressInPipe = blockInBankpipeWithBankBits * 2 * metadataBitSize / 8; + ///-------------------------------------------------------------------------------------------- /// Reinsert pipe bits back into the final address ///-------------------------------------------------------------------------------------------- @@ -2338,5 +2351,4 @@ BOOL_32 CiLib::CheckTcCompatibility( } // V1 } // Addr -} // rocr - +} // rocr \ No newline at end of file diff --git a/runtime/hsa-runtime/image/addrlib/src/r800/ciaddrlib.h b/runtime/hsa-runtime/image/addrlib/src/r800/ciaddrlib.h index f77189822c..894ddd321c 100644 --- a/runtime/hsa-runtime/image/addrlib/src/r800/ciaddrlib.h +++ b/runtime/hsa-runtime/image/addrlib/src/r800/ciaddrlib.h @@ -1,28 +1,27 @@ /* - * Copyright © 2007-2019 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ +************************************************************************************************************************ +* +* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +* OTHER DEALINGS IN THE SOFTWARE +* +***********************************************************************************************************************/ /** **************************************************************************************************** @@ -38,10 +37,8 @@ #include "siaddrlib.h" namespace rocr { -namespace Addr -{ -namespace V1 -{ +namespace Addr { +namespace V1 { /** **************************************************************************************************** @@ -189,6 +186,11 @@ private: return ((m_settings.isVolcanicIslands == TRUE) || (m_configFlags.forceDccAndTcCompat == TRUE)); } + BOOL_32 AltTilingEnabled() const + { + return (m_configFlags.enableAltTiling == TRUE); + } + static const UINT_32 MacroTileTableSize = 16; static const UINT_32 PrtMacroModeOffset = MacroTileTableSize / 2; static const INT_32 MinDepth2DThinIndex = 0; @@ -203,6 +205,4 @@ private: } // V1 } // Addr } // rocr - - #endif diff --git a/runtime/hsa-runtime/image/addrlib/src/r800/egbaddrlib.cpp b/runtime/hsa-runtime/image/addrlib/src/r800/egbaddrlib.cpp index 6a558c7b10..c762ab9347 100644 --- a/runtime/hsa-runtime/image/addrlib/src/r800/egbaddrlib.cpp +++ b/runtime/hsa-runtime/image/addrlib/src/r800/egbaddrlib.cpp @@ -1,28 +1,27 @@ /* - * Copyright © 2007-2019 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ +************************************************************************************************************************ +* +* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +* OTHER DEALINGS IN THE SOFTWARE +* +***********************************************************************************************************************/ /** **************************************************************************************************** * @file egbaddrlib.cpp @@ -32,13 +31,9 @@ #include "egbaddrlib.h" -#include "util/macros.h" - namespace rocr { -namespace Addr -{ -namespace V1 -{ +namespace Addr { +namespace V1 { /** **************************************************************************************************** @@ -436,6 +431,7 @@ BOOL_32 EgBasedLib::ComputeSurfaceInfoMicroTiled( &expPitch, &expHeight); + pOut->pitch = expPitch; pOut->height = expHeight; pOut->depth = expNumSlices; @@ -447,6 +443,7 @@ BOOL_32 EgBasedLib::ComputeSurfaceInfoMicroTiled( return valid; } + /** **************************************************************************************************** * EgBasedLib::ComputeSurfaceInfoMacroTiled @@ -751,6 +748,7 @@ BOOL_32 EgBasedLib::ComputeSurfaceAlignmentsMicroTiled( return valid; } + /** **************************************************************************************************** * EgBasedLib::HwlReduceBankWidthHeight @@ -976,7 +974,7 @@ BOOL_32 EgBasedLib::SanityCheckMacroTiled( ) const { BOOL_32 valid = TRUE; - ASSERTED UINT_32 numPipes = HwlGetPipes(pTileInfo); + UINT_32 numPipes = HwlGetPipes(pTileInfo); switch (pTileInfo->banks) { @@ -1090,7 +1088,6 @@ AddrTileMode EgBasedLib::ComputeSurfaceMipLevelTileMode( ) const { UINT_64 bytesPerSlice; - (void)bytesPerSlice; UINT_32 bytesPerTile; AddrTileMode expTileMode = baseTileMode; @@ -1812,6 +1809,7 @@ UINT_64 EgBasedLib::ComputeSurfaceAddrFromCoordMacroTiled( tileSplitSlice, pTileInfo); + // // Split the offset to put some bits below the pipe+bank bits and some above. // @@ -2155,6 +2153,7 @@ VOID EgBasedLib::HwlComputePixelCoordFromOffset( *pSlice += z; } + /** **************************************************************************************************** * EgBasedLib::DispatchComputeSurfaceCoordFromAddrDispatch @@ -2299,6 +2298,7 @@ VOID EgBasedLib::DispatchComputeSurfaceCoordFromAddr( } } + /** **************************************************************************************************** * EgBasedLib::ComputeSurfaceCoordFromAddrMacroTiled @@ -2343,6 +2343,7 @@ VOID EgBasedLib::ComputeSurfaceCoordFromAddrMacroTiled( UINT_32 tileIndex; UINT_64 totalOffset; + UINT_32 bank; UINT_32 pipe; UINT_32 groupBits = m_pipeInterleaveBytes << 3; @@ -2664,6 +2665,7 @@ ADDR_E_RETURNCODE EgBasedLib::HwlExtractBankPipeSwizzle( return ADDR_OK; } + /** **************************************************************************************************** * EgBasedLib::HwlCombineBankPipeSwizzle @@ -2725,7 +2727,6 @@ ADDR_E_RETURNCODE EgBasedLib::HwlComputeBaseSwizzle( }; UINT_32 pipes = HwlGetPipes(pTileInfo); - (void)pipes; UINT_32 banks = pTileInfo ? pTileInfo->banks : 2; UINT_32 hwNumBanks; @@ -3033,6 +3034,7 @@ UINT_32 EgBasedLib::ComputeBankFromCoord( break; } + // // Compute bank rotation for the tile split slice. // @@ -3130,6 +3132,7 @@ UINT_32 EgBasedLib::ComputePipeRotation( return rotation; } + /** **************************************************************************************************** * EgBasedLib::ComputeBankRotation @@ -3172,6 +3175,7 @@ UINT_32 EgBasedLib::ComputeBankRotation( return rotation; } + /** **************************************************************************************************** * EgBasedLib::ComputeHtileBytes @@ -4096,7 +4100,7 @@ UINT_64 EgBasedLib::HwlGetSizeAdjustmentMicroTiled( ) const { UINT_64 logicalSliceSize; - ASSERTED UINT_64 physicalSliceSize; + UINT_64 physicalSliceSize; UINT_32 pitch = *pPitch; UINT_32 height = *pHeight; @@ -4153,4 +4157,3 @@ UINT_32 EgBasedLib::HwlStereoCheckRightOffsetPadding( } // V1 } // Addr } // rocr - diff --git a/runtime/hsa-runtime/image/addrlib/src/r800/egbaddrlib.h b/runtime/hsa-runtime/image/addrlib/src/r800/egbaddrlib.h index 19c19ee98a..ebae1ad6dd 100644 --- a/runtime/hsa-runtime/image/addrlib/src/r800/egbaddrlib.h +++ b/runtime/hsa-runtime/image/addrlib/src/r800/egbaddrlib.h @@ -1,28 +1,27 @@ /* - * Copyright © 2007-2019 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ +************************************************************************************************************************ +* +* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +* OTHER DEALINGS IN THE SOFTWARE +* +***********************************************************************************************************************/ /** **************************************************************************************************** @@ -37,10 +36,8 @@ #include "addrlib1.h" namespace rocr { -namespace Addr -{ -namespace V1 -{ +namespace Addr { +namespace V1 { /// Structures for functions struct CoordFromBankPipe { @@ -428,6 +425,5 @@ protected: } // Addr } // rocr - #endif diff --git a/runtime/hsa-runtime/image/addrlib/src/r800/siaddrlib.cpp b/runtime/hsa-runtime/image/addrlib/src/r800/siaddrlib.cpp index 02a4e103e1..cb37605597 100644 --- a/runtime/hsa-runtime/image/addrlib/src/r800/siaddrlib.cpp +++ b/runtime/hsa-runtime/image/addrlib/src/r800/siaddrlib.cpp @@ -1,28 +1,27 @@ /* - * Copyright © 2007-2019 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ +************************************************************************************************************************ +* +* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +* OTHER DEALINGS IN THE SOFTWARE +* +***********************************************************************************************************************/ /** **************************************************************************************************** @@ -39,8 +38,7 @@ //////////////////////////////////////////////////////////////////////////////////////////////////// //////////////////////////////////////////////////////////////////////////////////////////////////// namespace rocr { -namespace Addr -{ +namespace Addr { /** **************************************************************************************************** @@ -113,7 +111,6 @@ SiLib::SiLib(const Client* pClient) m_noOfEntries(0), m_numEquations(0) { - m_class = SI_ADDRLIB; memset(&m_settings, 0, sizeof(m_settings)); } @@ -1931,7 +1928,7 @@ ChipFamily SiLib::HwlConvertChipFamily( m_settings.isHainan = ASICREV_IS_HAINAN_V(uChipRevision); break; default: - ADDR_ASSERT(!"This should be a Fusion"); + ADDR_ASSERT(!"No Chip found"); break; } @@ -3873,4 +3870,3 @@ BOOL_32 SiLib::IsEquationSupported( } // V1 } // Addr } // rocr - diff --git a/runtime/hsa-runtime/image/addrlib/src/r800/siaddrlib.h b/runtime/hsa-runtime/image/addrlib/src/r800/siaddrlib.h index f6db0de33c..d5f23d80a7 100644 --- a/runtime/hsa-runtime/image/addrlib/src/r800/siaddrlib.h +++ b/runtime/hsa-runtime/image/addrlib/src/r800/siaddrlib.h @@ -1,28 +1,27 @@ /* - * Copyright © 2007-2019 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ +************************************************************************************************************************ +* +* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +* OTHER DEALINGS IN THE SOFTWARE +* +***********************************************************************************************************************/ /** **************************************************************************************************** @@ -38,10 +37,8 @@ #include "egbaddrlib.h" namespace rocr { -namespace Addr -{ -namespace V1 -{ +namespace Addr { +namespace V1 { /** **************************************************************************************************** @@ -343,7 +340,5 @@ private: } // V1 } // Addr } // rocr - - #endif diff --git a/runtime/hsa-runtime/image/addrlib/util/macros.h b/runtime/hsa-runtime/image/addrlib/util/macros.h deleted file mode 100644 index 6bd2cdec2c..0000000000 --- a/runtime/hsa-runtime/image/addrlib/util/macros.h +++ /dev/null @@ -1,328 +0,0 @@ -/* - * Copyright © 2014 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - */ - -#ifndef UTIL_MACROS_H -#define UTIL_MACROS_H - -#include - -/* Compute the size of an array */ -#ifndef ARRAY_SIZE -# define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) -#endif - -/* For compatibility with Clang's __has_builtin() */ -#ifndef __has_builtin -# define __has_builtin(x) 0 -#endif - -/** - * __builtin_expect macros - */ -#if !defined(HAVE___BUILTIN_EXPECT) -# define __builtin_expect(x, y) (x) -#endif - -#ifndef likely -# ifdef HAVE___BUILTIN_EXPECT -# define likely(x) __builtin_expect(!!(x), 1) -# define unlikely(x) __builtin_expect(!!(x), 0) -# else -# define likely(x) (x) -# define unlikely(x) (x) -# endif -#endif - - -/** - * Static (compile-time) assertion. - */ -#define STATIC_ASSERT(COND) do { \ - static_assert(COND, "Addrlib legacy static_assert failure."); \ -} while(false) - -/** - * Unreachable macro. Useful for suppressing "control reaches end of non-void - * function" warnings. - */ -#if defined(HAVE___BUILTIN_UNREACHABLE) || __has_builtin(__builtin_unreachable) -#define unreachable(str) \ -do { \ - assert(!str); \ - __builtin_unreachable(); \ -} while (0) -#elif defined (_MSC_VER) -#define unreachable(str) \ -do { \ - assert(!str); \ - __assume(0); \ -} while (0) -#else -#define unreachable(str) assert(!str) -#endif - -/** - * Assume macro. Useful for expressing our assumptions to the compiler, - * typically for purposes of silencing warnings. - */ -#if __has_builtin(__builtin_assume) -#define assume(expr) \ -do { \ - assert(expr); \ - __builtin_assume(expr); \ -} while (0) -#elif defined HAVE___BUILTIN_UNREACHABLE -#define assume(expr) ((expr) ? ((void) 0) \ - : (assert(!"assumption failed"), \ - __builtin_unreachable())) -#elif defined (_MSC_VER) -#define assume(expr) __assume(expr) -#else -#define assume(expr) assert(expr) -#endif - -/* Attribute const is used for functions that have no effects other than their - * return value, and only rely on the argument values to compute the return - * value. As a result, calls to it can be CSEed. Note that using memory - * pointed to by the arguments is not allowed for const functions. - */ -#ifdef HAVE_FUNC_ATTRIBUTE_CONST -#define ATTRIBUTE_CONST __attribute__((__const__)) -#else -#define ATTRIBUTE_CONST -#endif - -#ifdef HAVE_FUNC_ATTRIBUTE_FLATTEN -#define FLATTEN __attribute__((__flatten__)) -#else -#define FLATTEN -#endif - -#ifdef HAVE_FUNC_ATTRIBUTE_FORMAT -#define PRINTFLIKE(f, a) __attribute__ ((format(__printf__, f, a))) -#else -#define PRINTFLIKE(f, a) -#endif - -#ifdef HAVE_FUNC_ATTRIBUTE_MALLOC -#define MALLOCLIKE __attribute__((__malloc__)) -#else -#define MALLOCLIKE -#endif - -/* Forced function inlining */ -/* Note: Clang also sets __GNUC__ (see other cases below) */ -#ifndef ALWAYS_INLINE -# if defined(__GNUC__) -# define ALWAYS_INLINE inline __attribute__((always_inline)) -# elif defined(_MSC_VER) -# define ALWAYS_INLINE __forceinline -# else -# define ALWAYS_INLINE inline -# endif -#endif - -/* Used to optionally mark structures with misaligned elements or size as - * packed, to trade off performance for space. - */ -#ifdef HAVE_FUNC_ATTRIBUTE_PACKED -#define PACKED __attribute__((__packed__)) -#else -#define PACKED -#endif - -/* Attribute pure is used for functions that have no effects other than their - * return value. As a result, calls to it can be dead code eliminated. - */ -#ifdef HAVE_FUNC_ATTRIBUTE_PURE -#define ATTRIBUTE_PURE __attribute__((__pure__)) -#else -#define ATTRIBUTE_PURE -#endif - -#ifdef HAVE_FUNC_ATTRIBUTE_RETURNS_NONNULL -#define ATTRIBUTE_RETURNS_NONNULL __attribute__((__returns_nonnull__)) -#else -#define ATTRIBUTE_RETURNS_NONNULL -#endif - -#ifndef NORETURN -# ifdef _MSC_VER -# define NORETURN __declspec(noreturn) -# elif defined HAVE_FUNC_ATTRIBUTE_NORETURN -# define NORETURN __attribute__((__noreturn__)) -# else -# define NORETURN -# endif -#endif - -#ifdef __cplusplus -/** - * Macro function that evaluates to true if T is a trivially - * destructible type -- that is, if its (non-virtual) destructor - * performs no action and all member variables and base classes are - * trivially destructible themselves. - */ -# if (defined(__clang__) && defined(__has_feature)) -# if __has_feature(has_trivial_destructor) -# define HAS_TRIVIAL_DESTRUCTOR(T) __has_trivial_destructor(T) -# endif -# elif defined(__GNUC__) -# if ((__GNUC__ > 4) || ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 3))) -# define HAS_TRIVIAL_DESTRUCTOR(T) __has_trivial_destructor(T) -# endif -# elif defined(_MSC_VER) && !defined(__INTEL_COMPILER) -# define HAS_TRIVIAL_DESTRUCTOR(T) __has_trivial_destructor(T) -# endif -# ifndef HAS_TRIVIAL_DESTRUCTOR - /* It's always safe (if inefficient) to assume that a - * destructor is non-trivial. - */ -# define HAS_TRIVIAL_DESTRUCTOR(T) (false) -# endif -#endif - -/** - * PUBLIC/USED macros - * - * If we build the library with gcc's -fvisibility=hidden flag, we'll - * use the PUBLIC macro to mark functions that are to be exported. - * - * We also need to define a USED attribute, so the optimizer doesn't - * inline a static function that we later use in an alias. - ajax - */ -#ifndef PUBLIC -# if defined(__GNUC__) -# define PUBLIC __attribute__((visibility("default"))) -# define USED __attribute__((used)) -# elif defined(_MSC_VER) -# define PUBLIC __declspec(dllexport) -# define USED -# else -# define PUBLIC -# define USED -# endif -#endif - -/** - * UNUSED marks variables (or sometimes functions) that have to be defined, - * but are sometimes (or always) unused beyond that. A common case is for - * a function parameter to be used in some build configurations but not others. - * Another case is fallback vfuncs that don't do anything with their params. - * - * Note that this should not be used for identifiers used in `assert()`; - * see ASSERTED below. - */ -#ifdef HAVE_FUNC_ATTRIBUTE_UNUSED -#define UNUSED __attribute__((unused)) -#else -#define UNUSED -#endif - -/** - * Use ASSERTED to indicate that an identifier is unused outside of an `assert()`, - * so that assert-free builds don't get "unused variable" warnings. - */ -#ifdef NDEBUG -#define ASSERTED UNUSED -#else -#define ASSERTED -#endif - -#ifdef HAVE_FUNC_ATTRIBUTE_WARN_UNUSED_RESULT -#define MUST_CHECK __attribute__((warn_unused_result)) -#else -#define MUST_CHECK -#endif - -#if defined(__GNUC__) -#define ATTRIBUTE_NOINLINE __attribute__((noinline)) -#else -#define ATTRIBUTE_NOINLINE -#endif - - -/** - * Check that STRUCT::FIELD can hold MAXVAL. We use a lot of bitfields - * in Mesa/gallium. We have to be sure they're of sufficient size to - * hold the largest expected value. - * Note that with MSVC, enums are signed and enum bitfields need one extra - * high bit (always zero) to ensure the max value is handled correctly. - * This macro will detect that with MSVC, but not GCC. - */ -#define ASSERT_BITFIELD_SIZE(STRUCT, FIELD, MAXVAL) \ - do { \ - ASSERTED STRUCT s; \ - s.FIELD = (MAXVAL); \ - assert((int) s.FIELD == (MAXVAL) && "Insufficient bitfield size!"); \ - } while (0) - - -/** Compute ceiling of integer quotient of A divided by B. */ -#define DIV_ROUND_UP( A, B ) ( ((A) + (B) - 1) / (B) ) - -/** Clamp X to [MIN,MAX]. Turn NaN into MIN, arbitrarily. */ -#define CLAMP( X, MIN, MAX ) ( (X)>(MIN) ? ((X)>(MAX) ? (MAX) : (X)) : (MIN) ) - -/** Minimum of two values: */ -#define MIN2( A, B ) ( (A)<(B) ? (A) : (B) ) - -/** Maximum of two values: */ -#define MAX2( A, B ) ( (A)>(B) ? (A) : (B) ) - -/** Minimum and maximum of three values: */ -#define MIN3( A, B, C ) ((A) < (B) ? MIN2(A, C) : MIN2(B, C)) -#define MAX3( A, B, C ) ((A) > (B) ? MAX2(A, C) : MAX2(B, C)) - -/** Align a value to a power of two */ -#define ALIGN_POT(x, pot_align) (((x) + (pot_align) - 1) & ~((pot_align) - 1)) - -/** - * Macro for declaring an explicit conversion operator. Defaults to an - * implicit conversion if C++11 is not supported. - */ -#if __cplusplus >= 201103L -#define EXPLICIT_CONVERSION explicit -#elif defined(__cplusplus) -#define EXPLICIT_CONVERSION -#endif - -/** Set a single bit */ -#define BITFIELD_BIT(b) (1u << (b)) -/** Set all bits up to excluding bit b */ -#define BITFIELD_MASK(b) \ - ((b) == 32 ? (~0u) : BITFIELD_BIT((b) % 32) - 1) -/** Set count bits starting from bit b */ -#define BITFIELD_RANGE(b, count) \ - (BITFIELD_MASK((b) + (count)) & ~BITFIELD_MASK(b)) - -/** Set a single bit */ -#define BITFIELD64_BIT(b) (1ull << (b)) -/** Set all bits up to excluding bit b */ -#define BITFIELD64_MASK(b) \ - ((b) == 64 ? (~0ull) : BITFIELD64_BIT(b) - 1) -/** Set count bits starting from bit b */ -#define BITFIELD64_RANGE(b, count) \ - (BITFIELD64_MASK((b) + (count)) & ~BITFIELD64_MASK(b)) - -#endif /* UTIL_MACROS_H */ diff --git a/runtime/hsa-runtime/image/image_manager_gfx11.h b/runtime/hsa-runtime/image/image_manager_gfx11.h index 1b34bc751e..a9cd786c7e 100755 --- a/runtime/hsa-runtime/image/image_manager_gfx11.h +++ b/runtime/hsa-runtime/image/image_manager_gfx11.h @@ -43,7 +43,7 @@ #ifndef EXT_IMAGE_IMAGE_MANAGER_GFX11_H_ #define EXT_IMAGE_IMAGE_MANAGER_GFX11_H_ -#include "addrlib/inc/addrinterface.h" //DYSDEBUG TODO: replace with new addrLib +#include "addrlib/inc/addrinterface.h" #include "image_manager_kv.h" namespace rocr { diff --git a/runtime/hsa-runtime/image/resource_gfx11.h b/runtime/hsa-runtime/image/resource_gfx11.h index bc9d094ed6..658dbdb460 100755 --- a/runtime/hsa-runtime/image/resource_gfx11.h +++ b/runtime/hsa-runtime/image/resource_gfx11.h @@ -700,31 +700,6 @@ TYPE_SRGB = 0x00000009, TYPE_UNORM_UINT = 0x0000000a, TYPE_REVERSED_UNORM = 0x0000000b, TYPE_FLOAT_CLAMP = 0x0000000c, -TYPE_F1 = 0x0000000d, -TYPE_F2 = 0x0000000e, -TYPE_F4 = 0x0000000f, -TYPE_F8 = 0x00000010, -TYPE_4X4 = 0x00000011, -TYPE_5X4 = 0x00000012, -TYPE_5X5 = 0x00000013, -TYPE_6X5 = 0x00000014, -TYPE_6X6 = 0x00000015, -TYPE_8X5 = 0x00000016, -TYPE_8X6 = 0x00000017, -TYPE_8X8 = 0x00000018, -TYPE_10X5 = 0x00000019, -TYPE_10X6 = 0x0000001a, -TYPE_10X8 = 0x0000001b, -TYPE_10X10 = 0x0000001c, -TYPE_12X10 = 0x0000001d, -TYPE_12X12 = 0x0000001e, -TYPE_3X3X3 = 0x0000001f, -TYPE_4X4X3 = 0x00000020, -TYPE_4X4X4 = 0x00000021, -TYPE_5X4X4 = 0x00000022, -TYPE_5X5X4 = 0x00000023, -TYPE_6X5X5 = 0x00000024, -TYPE_6X6X6 = 0x00000025 } type; enum FORMAT { diff --git a/runtime/hsa-runtime/image/resource_nv.h b/runtime/hsa-runtime/image/resource_nv.h index 1e9f5d2507..dc613b2e39 100755 --- a/runtime/hsa-runtime/image/resource_nv.h +++ b/runtime/hsa-runtime/image/resource_nv.h @@ -717,31 +717,6 @@ TYPE_SRGB = 0x00000009, TYPE_UNORM_UINT = 0x0000000a, TYPE_REVERSED_UNORM = 0x0000000b, TYPE_FLOAT_CLAMP = 0x0000000c, -TYPE_F1 = 0x0000000d, -TYPE_F2 = 0x0000000e, -TYPE_F4 = 0x0000000f, -TYPE_F8 = 0x00000010, -TYPE_4X4 = 0x00000011, -TYPE_5X4 = 0x00000012, -TYPE_5X5 = 0x00000013, -TYPE_6X5 = 0x00000014, -TYPE_6X6 = 0x00000015, -TYPE_8X5 = 0x00000016, -TYPE_8X6 = 0x00000017, -TYPE_8X8 = 0x00000018, -TYPE_10X5 = 0x00000019, -TYPE_10X6 = 0x0000001a, -TYPE_10X8 = 0x0000001b, -TYPE_10X10 = 0x0000001c, -TYPE_12X10 = 0x0000001d, -TYPE_12X12 = 0x0000001e, -TYPE_3X3X3 = 0x0000001f, -TYPE_4X4X3 = 0x00000020, -TYPE_4X4X4 = 0x00000021, -TYPE_5X4X4 = 0x00000022, -TYPE_5X5X4 = 0x00000023, -TYPE_6X5X5 = 0x00000024, -TYPE_6X6X6 = 0x00000025 } type; enum FORMAT {