diff --git a/projects/clr/rocclr/compiler/lib/backends/common/linker.cpp b/projects/clr/rocclr/compiler/lib/backends/common/linker.cpp
index d742c12e01..f914d945d1 100644
--- a/projects/clr/rocclr/compiler/lib/backends/common/linker.cpp
+++ b/projects/clr/rocclr/compiler/lib/backends/common/linker.cpp
@@ -122,12 +122,6 @@
 #endif
 #define DEBUG_TYPE "ocl_linker"
 
-#if !defined(LEGACY_COMPLIB)
-namespace llvm {
-  extern unsigned HLC_Max_WG_Size;
-}
-#endif
-
 namespace AMDSpir {
   extern void replaceTrivialFunc(llvm::Module& M);
 }
@@ -599,7 +593,6 @@ amdcl::OCLLinker::link(llvm::Module* input, std::vector<llvm::Module*> &libs)
   setFP32RoundDivideSqrt(Options()->oVariables->FP32RoundDivideSqrt);
   setUseNative(Options()->oVariables->OptUseNative);
   setDenormsAreZero(Options()->oVariables->DenormsAreZero);
-  llvm::HLC_Max_WG_Size = 2048; // Maximum HW supported workgroup size
   setUniformWorkGroupSize(Options()->oVariables->UniformWorkGroupSize);
   setHaveFastFMA32(chip == "Cypress"
                 || chip == "Cayman"
diff --git a/projects/clr/rocclr/compiler/lib/backends/common/v0_8/if_acl.cpp b/projects/clr/rocclr/compiler/lib/backends/common/v0_8/if_acl.cpp
index 172214cb74..c5fe2bcda7 100644
--- a/projects/clr/rocclr/compiler/lib/backends/common/v0_8/if_acl.cpp
+++ b/projects/clr/rocclr/compiler/lib/backends/common/v0_8/if_acl.cpp
@@ -610,7 +610,8 @@ OCLLinkPhase(
   }
   const char* argv[] = { "",
     "-loop-unswitch-threshold=0",
-    "-binomial-coefficient-limit-bitwidth=64"
+    "-binomial-coefficient-limit-bitwidth=64",
+    "-hsail-max-wg-size=2048"
   };
 
   aclLink->setContext(ctx);