From ab029df2e0ae7e82df85e62856ca183a7dbd705f Mon Sep 17 00:00:00 2001 From: foreman Date: Wed, 4 Oct 2017 16:45:05 -0400 Subject: [PATCH] P4 to Git Change 1466505 by wchau@wchau_OCL_boltzmann on 2017/10/04 16:34:02 SWDEV-134554 - OCLPerfConcurrency is failed on Vega10 Lnx Pro after CL#1465654 - fixed the issue by limit the number of asyn queues to 8, which matches the number of pipes. Affected files ... ... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/rocdefs.hpp#12 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/rocdevice.cpp#68 edit [ROCm/clr commit: 051ffe4780a0001e6521dc04e6da3ff56e46a11b] --- projects/clr/rocclr/runtime/device/rocm/rocdefs.hpp | 2 ++ projects/clr/rocclr/runtime/device/rocm/rocdevice.cpp | 5 +---- 2 files changed, 3 insertions(+), 4 deletions(-) diff --git a/projects/clr/rocclr/runtime/device/rocm/rocdefs.hpp b/projects/clr/rocclr/runtime/device/rocm/rocdefs.hpp index 9afe03f86d..954b42977e 100644 --- a/projects/clr/rocclr/runtime/device/rocm/rocdefs.hpp +++ b/projects/clr/rocclr/runtime/device/rocm/rocdefs.hpp @@ -58,4 +58,6 @@ static const AMDDeviceInfo DeviceInfo[] = { /* TARGET VEGA10 */ {HSA_VEGA10_ID, "", "gfx900", "gfx900", 4, 16, 1, 256, 64 * Ki, 32, 0, 0}, /* TARGET VEGA10_HBCC */ {HSA_VEGA10_HBCC_ID, "", "gfx901", "gfx901", 4, 16, 1, 256, 64 * Ki, 32, 0, 0}}; } + +const uint kMaxAsyncQueues = 8; // set to match the number of pipes, which is 8 #endif diff --git a/projects/clr/rocclr/runtime/device/rocm/rocdevice.cpp b/projects/clr/rocclr/runtime/device/rocm/rocdevice.cpp index 34d78a2581..23672330e7 100644 --- a/projects/clr/rocclr/runtime/device/rocm/rocdevice.cpp +++ b/projects/clr/rocclr/runtime/device/rocm/rocdevice.cpp @@ -1113,10 +1113,7 @@ bool Device::populateOCLDeviceConstants() { info_.localMemSizePerCU_ = deviceInfo_.localMemSizePerCU_; info_.localMemBanks_ = deviceInfo_.localMemBanks_; info_.gfxipVersion_ = deviceInfo_.gfxipVersion_; - if (HSA_STATUS_SUCCESS != - hsa_agent_get_info(_bkendDevice, HSA_AGENT_INFO_QUEUES_MAX, &info_.numAsyncQueues_)) { - return false; - } + info_.numAsyncQueues_ = kMaxAsyncQueues; info_.numRTQueues_ = info_.numAsyncQueues_; if (HSA_STATUS_SUCCESS != hsa_agent_get_info(_bkendDevice, (hsa_agent_info_t)HSA_AMD_AGENT_INFO_COMPUTE_UNIT_COUNT, &info_.numRTCUs_)) {