Query UBB/OAM temperature API (#581)
Add support to Query UBB/OAM temperature. * Updated Python API with new temperature metrics enum --------- Co-authored-by: Bill Liu <shuzhliu@amd.com> Co-authored-by: gabrpham_amdeng <Gabriel.Pham@amd.com>
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Liu, Shuzhou (Bill)
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@@ -532,7 +532,64 @@ typedef enum {
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RSMI_TEMP_TYPE_HBM_1, //!< HBM temperature instance 1
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RSMI_TEMP_TYPE_HBM_2, //!< HBM temperature instance 2
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RSMI_TEMP_TYPE_HBM_3, //!< HBM temperature instance 3
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RSMI_TEMP_TYPE_LAST = RSMI_TEMP_TYPE_HBM_3,
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RSMI_TEMP_TYPE_PLX, //!< PLX temperature
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// GPU Board Node temperature
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RSMI_TEMP_TYPE_GPUBOARD_NODE_FIRST = 100,
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RSMI_TEMP_TYPE_GPUBOARD_NODE_RETIMER_X = RSMI_TEMP_TYPE_GPUBOARD_NODE_FIRST, //!< Retimer X temperature
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RSMI_TEMP_TYPE_GPUBOARD_NODE_OAM_X_IBC, //!< OAM X IBC temperature
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RSMI_TEMP_TYPE_GPUBOARD_NODE_OAM_X_IBC_2, //!< OAM X IBC 2 temperature
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RSMI_TEMP_TYPE_GPUBOARD_NODE_OAM_X_VDD18_VR, //!< OAM X VDD 1.8V voltage regulator temperature
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RSMI_TEMP_TYPE_GPUBOARD_NODE_OAM_X_04_HBM_B_VR, //!< OAM X 0.4V HBM B voltage regulator temperature
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RSMI_TEMP_TYPE_GPUBOARD_NODE_OAM_X_04_HBM_D_VR, //!< OAM X 0.4V HBM D voltage regulator temperature
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// GPU Board VR (Voltage Regulator) temperature
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RSMI_TEMP_TYPE_GPUBOARD_VR_FIRST = 150,
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RSMI_TEMP_TYPE_GPUBOARD_VDDCR_VDD0 = RSMI_TEMP_TYPE_GPUBOARD_VR_FIRST, //!< VDDCR VDD0 voltage regulator temperature
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RSMI_TEMP_TYPE_GPUBOARD_VDDCR_VDD1, //!< VDDCR VDD1 voltage regulator temperature
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RSMI_TEMP_TYPE_GPUBOARD_VDDCR_VDD2, //!< VDDCR VDD2 voltage regulator temperature
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RSMI_TEMP_TYPE_GPUBOARD_VDDCR_VDD3, //!< VDDCR VDD3 voltage regulator temperature
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RSMI_TEMP_TYPE_GPUBOARD_VDDCR_SOC_A, //!< VDDCR SOC A voltage regulator temperature
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RSMI_TEMP_TYPE_GPUBOARD_VDDCR_SOC_C, //!< VDDCR SOC C voltage regulator temperature
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RSMI_TEMP_TYPE_GPUBOARD_VDDCR_SOCIO_A, //!< VDDCR SOCIO A voltage regulator temperature
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RSMI_TEMP_TYPE_GPUBOARD_VDDCR_SOCIO_C, //!< VDDCR SOCIO C voltage regulator temperature
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RSMI_TEMP_TYPE_GPUBOARD_VDD_085_HBM, //!< VDD 0.85V HBM voltage regulator temperature
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RSMI_TEMP_TYPE_GPUBOARD_VDDCR_11_HBM_B, //!< VDDCR 1.1V HBM B voltage regulator temperature
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RSMI_TEMP_TYPE_GPUBOARD_VDDCR_11_HBM_D, //!< VDDCR 1.1V HBM D voltage regulator temperature
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RSMI_TEMP_TYPE_GPUBOARD_VDD_USR, //!< VDD USR voltage regulator temperature
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RSMI_TEMP_TYPE_GPUBOARD_VDDIO_11_E32, //!< VDDIO 1.1V E32 voltage regulator temperature
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RSMI_TEMP_TYPE_GPUBOARD_LAST = 199,
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// Baseboard System temperature
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RSMI_TEMP_TYPE_BASEBOARD_FIRST = 200,
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RSMI_TEMP_TYPE_BASEBOARD_UBB_FPGA = RSMI_TEMP_TYPE_BASEBOARD_FIRST, //!< UBB FPGA temperature
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RSMI_TEMP_TYPE_BASEBOARD_UBB_FRONT, //!< UBB front temperature
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RSMI_TEMP_TYPE_BASEBOARD_UBB_BACK, //!< UBB back temperature
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RSMI_TEMP_TYPE_BASEBOARD_UBB_OAM7, //!< UBB OAM7 temperature
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RSMI_TEMP_TYPE_BASEBOARD_UBB_IBC, //!< UBB IBC temperature
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RSMI_TEMP_TYPE_BASEBOARD_UBB_UFPGA, //!< UBB UFPGA temperature
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RSMI_TEMP_TYPE_BASEBOARD_UBB_OAM1, //!< UBB OAM1 temperature
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RSMI_TEMP_TYPE_BASEBOARD_OAM_0_1_HSC, //!< OAM 0-1 HSC temperature
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RSMI_TEMP_TYPE_BASEBOARD_OAM_2_3_HSC, //!< OAM 2-3 HSC temperature
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RSMI_TEMP_TYPE_BASEBOARD_OAM_4_5_HSC, //!< OAM 4-5 HSC temperature
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RSMI_TEMP_TYPE_BASEBOARD_OAM_6_7_HSC, //!< OAM 6-7 HSC temperature
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RSMI_TEMP_TYPE_BASEBOARD_UBB_FPGA_0V72_VR, //!< UBB FPGA 0.72V voltage regulator temperature
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RSMI_TEMP_TYPE_BASEBOARD_UBB_FPGA_3V3_VR, //!< UBB FPGA 3.3V voltage regulator temperature
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RSMI_TEMP_TYPE_BASEBOARD_RETIMER_0_1_2_3_1V2_VR, //!< Retimer 0-1-2-3 1.2V voltage regulator temperature
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RSMI_TEMP_TYPE_BASEBOARD_RETIMER_4_5_6_7_1V2_VR, //!< Retimer 4-5-6-7 1.2V voltage regulator temperature
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RSMI_TEMP_TYPE_BASEBOARD_RETIMER_0_1_0V9_VR, //!< Retimer 0-1 0.9V voltage regulator temperature
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RSMI_TEMP_TYPE_BASEBOARD_RETIMER_4_5_0V9_VR, //!< Retimer 4-5 0.9V voltage regulator temperature
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RSMI_TEMP_TYPE_BASEBOARD_RETIMER_2_3_0V9_VR, //!< Retimer 2-3 0.9V voltage regulator temperature
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RSMI_TEMP_TYPE_BASEBOARD_RETIMER_6_7_0V9_VR, //!< Retimer 6-7 0.9V voltage regulator temperature
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RSMI_TEMP_TYPE_BASEBOARD_OAM_0_1_2_3_3V3_VR, //!< OAM 0-1-2-3 3.3V voltage regulator temperature
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RSMI_TEMP_TYPE_BASEBOARD_OAM_4_5_6_7_3V3_VR, //!< OAM 4-5-6-7 3.3V voltage regulator temperature
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RSMI_TEMP_TYPE_BASEBOARD_IBC_HSC, //!< IBC HSC temperature
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RSMI_TEMP_TYPE_BASEBOARD_IBC, //!< IBC temperature
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RSMI_TEMP_TYPE_BASEBOARD_LAST = 249,
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RSMI_TEMP_TYPE_LAST = RSMI_TEMP_TYPE_BASEBOARD_LAST, //!< Last of per GPU temperature types
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RSMI_TEMP_TYPE_INVALID = 0xFFFFFFFF //!< Invalid type
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} rsmi_temperature_type_t;
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@@ -0,0 +1,117 @@
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/*
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* Copyright (c) Advanced Micro Devices, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef ROCM_SMI_INCLUDE_ROCM_SMI_ROCM_SMI_BOARD_TEMP_H_
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#define ROCM_SMI_INCLUDE_ROCM_SMI_ROCM_SMI_BOARD_TEMP_H_
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#include "rocm_smi/rocm_smi.h"
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// Headers from the driver
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namespace amd::smi {
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enum amdgpu_vr_temp {
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AMDGPU_VDDCR_VDD0_TEMP,
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AMDGPU_VDDCR_VDD1_TEMP,
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AMDGPU_VDDCR_VDD2_TEMP,
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AMDGPU_VDDCR_VDD3_TEMP,
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AMDGPU_VDDCR_SOC_A_TEMP,
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AMDGPU_VDDCR_SOC_C_TEMP,
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AMDGPU_VDDCR_SOCIO_A_TEMP,
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AMDGPU_VDDCR_SOCIO_C_TEMP,
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AMDGPU_VDD_085_HBM_TEMP,
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AMDGPU_VDDCR_11_HBM_B_TEMP,
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AMDGPU_VDDCR_11_HBM_D_TEMP,
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AMDGPU_VDD_USR_TEMP,
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AMDGPU_VDDIO_11_E32_TEMP,
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AMDGPU_VR_MAX_TEMP_ENTRIES,
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};
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enum amdgpu_system_temp {
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AMDGPU_UBB_FPGA_TEMP,
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AMDGPU_UBB_FRONT_TEMP,
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AMDGPU_UBB_BACK_TEMP,
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AMDGPU_UBB_OAM7_TEMP,
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AMDGPU_UBB_IBC_TEMP,
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AMDGPU_UBB_UFPGA_TEMP,
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AMDGPU_UBB_OAM1_TEMP,
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AMDGPU_OAM_0_1_HSC_TEMP,
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AMDGPU_OAM_2_3_HSC_TEMP,
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AMDGPU_OAM_4_5_HSC_TEMP,
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AMDGPU_OAM_6_7_HSC_TEMP,
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AMDGPU_UBB_FPGA_0V72_VR_TEMP,
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AMDGPU_UBB_FPGA_3V3_VR_TEMP,
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AMDGPU_RETIMER_0_1_2_3_1V2_VR_TEMP,
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AMDGPU_RETIMER_4_5_6_7_1V2_VR_TEMP,
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AMDGPU_RETIMER_0_1_0V9_VR_TEMP,
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AMDGPU_RETIMER_4_5_0V9_VR_TEMP,
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AMDGPU_RETIMER_2_3_0V9_VR_TEMP,
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AMDGPU_RETIMER_6_7_0V9_VR_TEMP,
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AMDGPU_OAM_0_1_2_3_3V3_VR_TEMP,
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AMDGPU_OAM_4_5_6_7_3V3_VR_TEMP,
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AMDGPU_IBC_HSC_TEMP,
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AMDGPU_IBC_TEMP,
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AMDGPU_SYSTEM_MAX_TEMP_ENTRIES = 32,
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};
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enum amdgpu_node_temp {
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AMDGPU_RETIMER_X_TEMP,
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AMDGPU_OAM_X_IBC_TEMP,
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AMDGPU_OAM_X_IBC_2_TEMP,
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AMDGPU_OAM_X_VDD18_VR_TEMP,
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AMDGPU_OAM_X_04_HBM_B_VR_TEMP,
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AMDGPU_OAM_X_04_HBM_D_VR_TEMP,
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AMDGPU_NODE_MAX_TEMP_ENTRIES = 12,
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};
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struct amdgpu_gpuboard_temp_metrics_v1_0 {
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struct metrics_table_header_t common_header;
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uint16_t label_version;
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uint16_t node_id;
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uint64_t accumulation_counter;
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/* Encoded temperature in Celcius, 24:31 is sensor id 0:23 is temp value */
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uint32_t node_temp[AMDGPU_NODE_MAX_TEMP_ENTRIES];
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uint32_t vr_temp[AMDGPU_VR_MAX_TEMP_ENTRIES];
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};
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struct amdgpu_baseboard_temp_metrics_v1_0 {
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struct metrics_table_header_t common_header;
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uint16_t label_version;
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uint16_t node_id;
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uint64_t accumulation_counter;
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/* Encoded temperature in Celcius, 24:31 is sensor id 0:23 is temp value */
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uint32_t system_temp[AMDGPU_SYSTEM_MAX_TEMP_ENTRIES];
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};
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rsmi_status_t read_gpuboard_temp_metrics(const char* filename, amdgpu_gpuboard_temp_metrics_v1_0& metrics);
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rsmi_status_t read_baseboard_temp_metrics(const char* filename, amdgpu_baseboard_temp_metrics_v1_0& metrics);
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rsmi_status_t get_baseboard_temp_value(const amdgpu_baseboard_temp_metrics_v1_0& metrics,
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rsmi_temperature_type_t temperature_type,
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int64_t* value);
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rsmi_status_t get_gpuboard_temp_value(const amdgpu_gpuboard_temp_metrics_v1_0& metrics,
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rsmi_temperature_type_t temperature_type,
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int64_t* value);
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}
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#endif // ROCM_SMI_INCLUDE_ROCM_SMI_ROCM_SMI_BOARD_TEMP_H_
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@@ -160,6 +160,8 @@ enum DevInfoTypes {
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kDevGpuMetrics,
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kDevPmMetrics,
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kDevRegMetrics,
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kDevBaseBoardTempMetrics,
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kDevGpuBoardTempMetrics,
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kDevGpuReset,
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kDevAvailableComputePartition,
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kDevComputePartition,
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