From b1cd519cc943c3ac1dd39b60487f1ddca805e841 Mon Sep 17 00:00:00 2001
From: Alex Xie <AlexBin.Xie@amd.com>
Date: Thu, 16 May 2024 17:18:01 -0400
Subject: [PATCH] SWDEV-462635 - 256 byte image memory alignment

Change-Id: I1d21368ff460477d3238d71e4e2a0a7d6b9167ac


[ROCm/clr commit: 80011685b2e3ab6f97725a022dc2ff600ede02d9]
---
 projects/clr/rocclr/device/rocm/rocdevice.cpp | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/projects/clr/rocclr/device/rocm/rocdevice.cpp b/projects/clr/rocclr/device/rocm/rocdevice.cpp
index a5f5c4ab0b..a6864610c9 100644
--- a/projects/clr/rocclr/device/rocm/rocdevice.cpp
+++ b/projects/clr/rocclr/device/rocm/rocdevice.cpp
@@ -1473,8 +1473,8 @@ bool Device::populateOCLDeviceConstants() {
     info_.hostUnifiedMemory_ = 1;
     info_.iommuv2_ = true;
   }
-  info_.memBaseAddrAlign_ =
-      8 * (flagIsDefault(MEMOBJ_BASE_ADDR_ALIGN) ? sizeof(int64_t[16]) : MEMOBJ_BASE_ADDR_ALIGN);
+  info_.memBaseAddrAlign_ = 8 * (flagIsDefault(MEMOBJ_BASE_ADDR_ALIGN) ?
+      sizeof(int64_t[16]) * 2 : MEMOBJ_BASE_ADDR_ALIGN);
   info_.minDataTypeAlignSize_ = sizeof(int64_t[16]);
 
   info_.maxConstantArgs_ = 8;