P4 to Git Change 1077444 by gandryey@gera-dev-w7 on 2014/09/16 14:31:35
ECR #304775 - Add capability to enable large allocations >4GB - Update the blit kernels to consider a buffer size >4GB Affected files ... ... //depot/stg/opencl/drivers/opencl/runtime/device/blitcl.cpp#4 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gpublit.cpp#110 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gpusettings.cpp#280 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/hsa/hsablit.cpp#8 edit ... //depot/stg/opencl/drivers/opencl/runtime/utils/flags.hpp#214 edit
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@@ -566,7 +566,7 @@ HsaBlitManager::importExportImage(
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static void
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CalcRowSlicePitches(
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cl_int* pitch, const cl_int* copySize,
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cl_ulong* pitch, const cl_int* copySize,
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size_t rowPitch, size_t slicePitch, const Memory& mem)
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{
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const oclhsa::Image &hsaImage = static_cast< const oclhsa::Image &>(mem);
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@@ -1067,14 +1067,14 @@ KernelBlitManager::copyBuffer(
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clmem = ((cl_mem) as_cl<amd::Memory>(dstMemory.owner()));
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kernels_[blitType]->parameters().set(1, sizeof(cl_mem), &clmem);
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// Program source origin
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cl_int srcOffset = srcOrigin[0] / CopyBuffAlignment[i];
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cl_ulong srcOffset = srcOrigin[0] / CopyBuffAlignment[i];
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kernels_[blitType]->parameters().set(2, sizeof(srcOffset), &srcOffset);
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// Program destinaiton origin
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cl_int dstOffset = dstOrigin[0] / CopyBuffAlignment[i];
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cl_ulong dstOffset = dstOrigin[0] / CopyBuffAlignment[i];
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kernels_[blitType]->parameters().set(3, sizeof(dstOffset), &dstOffset);
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cl_int copySize = size[0];
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cl_ulong copySize = size[0];
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kernels_[blitType]->parameters().set(4, sizeof(copySize), ©Size);
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if (blitType == BlitCopyBufferAligned) {
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@@ -1187,18 +1187,18 @@ KernelBlitManager::copyBufferRect(
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kernels_[blitType]->parameters().set(0, sizeof(cl_mem), &clmem);
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clmem = ((cl_mem) as_cl<amd::Memory>(dstMemory.owner()));
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kernels_[blitType]->parameters().set(1, sizeof(cl_mem), &clmem);
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cl_uint src[4] = { (cl_uint)srcRect.rowPitch_,
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(cl_uint)srcRect.slicePitch_,
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(cl_uint)srcRect.start_, 0 };
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cl_ulong src[4] = { srcRect.rowPitch_,
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srcRect.slicePitch_,
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srcRect.start_, 0 };
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kernels_[blitType]->parameters().set(2, sizeof(src), src);
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cl_uint dst[4] = { (cl_uint)dstRect.rowPitch_,
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(cl_uint)dstRect.slicePitch_,
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(cl_uint)dstRect.start_, 0 };
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cl_ulong dst[4] = { dstRect.rowPitch_,
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dstRect.slicePitch_,
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dstRect.start_, 0 };
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kernels_[blitType]->parameters().set(3, sizeof(dst), dst);
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cl_int copySize[4] = { (cl_int)size[0],
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(cl_int)size[1],
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(cl_int)size[2],
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(cl_int)CopyRectAlignment[i] };
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cl_ulong copySize[4] = { size[0],
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size[1],
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size[2],
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CopyRectAlignment[i] };
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kernels_[blitType]->parameters().set(4, sizeof(copySize), copySize);
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// Create ND range object for the kernel's execution
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@@ -1311,23 +1311,23 @@ KernelBlitManager::copyImageToBuffer(
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granularity = 4;
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}
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CondLog(((dstOrigin[0] % granularity) != 0), "Unaligned offset in blit!");
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cl_int dstOrg[4] = { (cl_int)dstOrigin[0] / granularity,
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(cl_int)dstOrigin[1],
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(cl_int)dstOrigin[2],
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0 };
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cl_ulong dstOrg[4] = { dstOrigin[0] / granularity,
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dstOrigin[1],
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dstOrigin[2],
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0 };
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kernels_[blitType]->parameters().set(5, sizeof(dstOrg), dstOrg);
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kernels_[blitType]->parameters().set(6, sizeof(copySize), copySize);
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// Program memory format
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uint multiplier = elementSize / sizeof(uint32_t);
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multiplier = (multiplier == 0) ? 1 : multiplier;
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cl_int format[4] = { (cl_int)numChannels,
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(cl_int)elementSize / (cl_int)numChannels,
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(cl_int)multiplier, 0 };
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cl_uint format[4] = { (cl_uint)numChannels,
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(cl_uint)(elementSize / numChannels),
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multiplier, 0 };
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kernels_[blitType]->parameters().set(7, sizeof(format), format);
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// Program row and slice pitches
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cl_int pitch[4] = { 0 };
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cl_ulong pitch[4] = { 0 };
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CalcRowSlicePitches(pitch, copySize, rowPitch, slicePitch, srcImage);
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kernels_[blitType]->parameters().set(8, sizeof(pitch), pitch);
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@@ -1429,9 +1429,9 @@ KernelBlitManager::copyBufferToImage(
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granularity = 4;
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}
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CondLog(((srcOrigin[0] % granularity) != 0), "Unaligned offset in blit!");
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cl_int srcOrg[4] = { (cl_int)srcOrigin[0] / granularity,
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(cl_int)srcOrigin[1],
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(cl_int)srcOrigin[2], 0 };
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cl_ulong srcOrg[4] = { srcOrigin[0] / granularity,
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srcOrigin[1],
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srcOrigin[2], 0 };
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kernels_[blitType]->parameters().set(2, sizeof(srcOrg), srcOrg);
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cl_int dstOrg[4] = { (cl_int)dstOrigin[0],
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@@ -1447,13 +1447,13 @@ KernelBlitManager::copyBufferToImage(
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// Program memory format
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uint multiplier = elementSize / sizeof(uint32_t);
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multiplier = (multiplier == 0) ? 1 : multiplier;
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cl_int format[4] = { (cl_int)numChannels,
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(cl_int)elementSize / (cl_int)numChannels,
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(cl_int)multiplier, 0 };
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cl_uint format[4] = { (cl_uint)numChannels,
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(cl_uint)(elementSize / numChannels),
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multiplier, 0 };
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kernels_[blitType]->parameters().set(5, sizeof(format), format);
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// Program row and slice pitches
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cl_int pitch[4] = { 0 };
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cl_ulong pitch[4] = { 0 };
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CalcRowSlicePitches(pitch, copySize, rowPitch, slicePitch, dstImage);
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kernels_[blitType]->parameters().set(6, sizeof(pitch), pitch);
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@@ -1617,7 +1617,7 @@ KernelBlitManager::fillBuffer(
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uint fillType = FillBuffer;
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size_t globalWorkOffset[3] = { 0, 0, 0 };
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cl_int fillSize = size[0] / patternSize;
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cl_ulong fillSize = size[0] / patternSize;
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size_t globalWorkSize = amd::alignUp(fillSize, 256);
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size_t localWorkSize = 256;
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bool dwordAligned =
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@@ -1650,14 +1650,14 @@ KernelBlitManager::fillBuffer(
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cl_mem clmem = ((cl_mem) as_cl<amd::Memory>(fillMemory));
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kernels_[fillType]->parameters().set(2, sizeof(cl_mem), &clmem);
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cl_int offset = origin[0];
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cl_ulong offset = origin[0];
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if (dwordAligned) {
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patternSize /= sizeof(uint32_t);
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offset /= sizeof(uint32_t);
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}
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kernels_[fillType]->parameters().set(3, sizeof(cl_uint), &patternSize);
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kernels_[fillType]->parameters().set(4, sizeof(offset), &offset);
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kernels_[fillType]->parameters().set(5, sizeof(cl_mem), &fillSize);
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kernels_[fillType]->parameters().set(5, sizeof(fillSize), &fillSize);
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// Create ND range object for the kernel's execution
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amd::NDRangeContainer ndrange(1,
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