P4 to Git Change 1094113 by gandryey@gera-dev-w7 on 2014/11/05 18:22:34
ECR #304775 - CL-GL depth buffer interop - Make the changes necessary for the depth buffer interop support. Currently the extension is disabled, because the conformance tests have multiple bugs. Affected files ... ... //depot/stg/opencl/drivers/opencl/api/opencl/amdocl/cl_gl.cpp#45 edit ... //depot/stg/opencl/drivers/opencl/api/opencl/amdocl/cl_memobj.cpp#71 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/device.hpp#231 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gpuresource.cpp#197 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gpusettings.cpp#292 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gslbe/src/rt/GSLContext.cpp#66 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gslbe/src/rt/GSLDevice.cpp#101 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gslbe/src/rt/GSLDeviceGL.cpp#20 edit ... //depot/stg/opencl/drivers/opencl/runtime/platform/memory.cpp#113 edit ... //depot/stg/opencl/drivers/opencl/runtime/utils/flags.hpp#217 edit
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@@ -243,8 +243,12 @@ static uint32_t GetHSAILImageFormatType(cmSurfFmt format)
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case CM_SURF_FMT_RG32F:
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case CM_SURF_FMT_RGBA32F:
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case CM_SURF_FMT_DEPTH32F:
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case CM_SURF_FMT_DEPTH32F_X24_STEN8:
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formatType = HSA_EXT_IMAGE_CHANNEL_TYPE_FLOAT;
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break;
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case CM_SURF_FMT_DEPTH24_STEN8:
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formatType = HSA_EXT_IMAGE_CHANNEL_TYPE_UNORM_INT24;
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break;
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default:
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assert(false);
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}
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@@ -252,7 +256,7 @@ static uint32_t GetHSAILImageFormatType(cmSurfFmt format)
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return formatType;
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}
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static uint32_t GetHSAILImageOrderType(gslChannelOrder chOrder)
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static uint32_t GetHSAILImageOrderType(gslChannelOrder chOrder, cmSurfFmt format)
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{
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uint32_t orderType = HSA_EXT_IMAGE_CHANNEL_ORDER_A;
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@@ -301,7 +305,13 @@ static uint32_t GetHSAILImageOrderType(gslChannelOrder chOrder)
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orderType = HSA_EXT_IMAGE_CHANNEL_ORDER_LUMINANCE;
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break;
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case GSL_CHANNEL_ORDER_REPLICATE_R:
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orderType = HSA_EXT_IMAGE_CHANNEL_ORDER_DEPTH;
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if ((format == CM_SURF_FMT_DEPTH32F_X24_STEN8) ||
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(format == CM_SURF_FMT_DEPTH24_STEN8)) {
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orderType = HSA_EXT_IMAGE_CHANNEL_ORDER_DEPTH_STENCIL;
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}
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else {
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orderType = HSA_EXT_IMAGE_CHANNEL_ORDER_DEPTH;
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}
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break;
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default:
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assert(false);
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@@ -976,7 +986,7 @@ Resource::create(MemoryType memType, CreateParams* params, bool heap)
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}
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dev().fillImageHwState(gslResource, hwState_, 8 * sizeof(uint32_t));
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hwState_[8] = GetHSAILImageFormatType(cal()->format_);
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hwState_[9] = GetHSAILImageOrderType(cal()->channelOrder_);
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hwState_[9] = GetHSAILImageOrderType(cal()->channelOrder_, cal()->format_);
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hwState_[10] = static_cast<uint32_t>(cal()->width_);
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// Workaround for depth view, change tileIndex to 0 for depth view
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if ((memoryType() == ImageView) &&
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@@ -345,9 +345,8 @@ Settings::create(
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rectLinearDMA_ = true;
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if (AMD_DEPTH_MSAA_INTEROP) {
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enableExtension(ClKhrGLDepthImages);
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depthMSAAInterop_ = true;
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if (oclVersion_ >= OpenCL20) {
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//enableExtension(ClKhrGLDepthImages);
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}
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if (AMD_THREAD_TRACE_ENABLE) {
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threadTraceEnable_ = true;
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@@ -445,7 +444,7 @@ Settings::create(
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if (apuSystem_ &&
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((calAttr.totalVisibleHeap + calAttr.totalInvisibleHeap) < 150)) {
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remoteAlloc_ = true;
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remoteAlloc_ = true;
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}
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// Override current device settings
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@@ -300,6 +300,7 @@ CALGSLContext::setInput(uint32 physUnit, gslMemObject mem)
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m_textureResources[physUnit], physUnit);
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}
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m_textureResources[physUnit]->updateDepthTextureParam(mem);
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m_textureResources[physUnit]->setMemObject(m_cs, GSL_COMPUTE_PROGRAM, mem);
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if (mem != NULL)
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@@ -1701,6 +1701,7 @@ CALGSLDevice::fillImageHwState(gslMemObject mem, void* hwState, uint32 hwStateSi
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amd::ScopedLock k(gslDeviceOps());
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intp channelOrder = mem->getAttribs().channelOrder;
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convertInputChannelOrder(&channelOrder);
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m_textureResource->updateDepthTextureParam(mem);
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m_textureResource->getTextureSrd(m_cs, mem, reinterpret_cast<const char*>(&channelOrder),
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hwState, hwStateSize);
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}
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@@ -82,8 +82,8 @@ static const cmFormatXlateParams cmFormatXlateTable [] = {
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{CM_SURF_FMT_DEPTH24F_X8, (cmSurfFmt)500, GSL_CHANNEL_ORDER_R},
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{CM_SURF_FMT_DEPTH24_STEN8, CM_SURF_FMT_DEPTH24_STEN8, GSL_CHANNEL_ORDER_REPLICATE_R},
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{CM_SURF_FMT_DEPTH24F_STEN8, (cmSurfFmt)500, GSL_CHANNEL_ORDER_R},
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{CM_SURF_FMT_DEPTH32F_X24_STEN8, CM_SURF_FMT_RG32I, GSL_CHANNEL_ORDER_REPLICATE_R},
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{CM_SURF_FMT_DEPTH32F, CM_SURF_FMT_R32F, GSL_CHANNEL_ORDER_REPLICATE_R},
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{CM_SURF_FMT_DEPTH32F_X24_STEN8, CM_SURF_FMT_DEPTH32F_X24_STEN8, GSL_CHANNEL_ORDER_REPLICATE_R},
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{CM_SURF_FMT_DEPTH32F, CM_SURF_FMT_DEPTH32F, GSL_CHANNEL_ORDER_REPLICATE_R},
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{CM_SURF_FMT_sR11_sG11_sB10, (cmSurfFmt)500, GSL_CHANNEL_ORDER_R},
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{CM_SURF_FMT_sU16, CM_SURF_FMT_sU16, GSL_CHANNEL_ORDER_R},
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{CM_SURF_FMT_sUV16, CM_SURF_FMT_sUV16, GSL_CHANNEL_ORDER_RG},
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