From b815322dd6dcfa0a1b75ad6c62c1c234e600ce8f Mon Sep 17 00:00:00 2001 From: jujiang Date: Tue, 9 Jun 2020 11:03:28 -0400 Subject: [PATCH] To fix a format in hip_porting_guide.md Change-Id: I5faa4ec9b3d17625b7cb5cea86b9f44766b1cfa9 [ROCm/clr commit: 06c6951205221408313b0e4e75eee7af9e13542b] --- projects/clr/hipamd/docs/markdown/hip_porting_guide.md | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/projects/clr/hipamd/docs/markdown/hip_porting_guide.md b/projects/clr/hipamd/docs/markdown/hip_porting_guide.md index 816802fc79..9806d841a5 100644 --- a/projects/clr/hipamd/docs/markdown/hip_porting_guide.md +++ b/projects/clr/hipamd/docs/markdown/hip_porting_guide.md @@ -512,7 +512,7 @@ Compute programs sometimes use textures either to access dedicated texture cache point samples. AMD hardware, as well as recent competing hardware, has a unified texture/L1 cache, so it no longer has a dedicated texture cache. But the nvcc path often caches global loads in the L2 cache, and some programs may benefit from explicit control of the L1 cache contents. We recommend the __ldg instruction for this purpose. -AMD compilers currently load all data into both the L1 and L2 caches, so __ldg is treated as a no-op. +AMD compilers currently load all data into both the L1 and L2 caches, so __ldg is treated as a no-op. We recommend the following for functional portability: @@ -520,13 +520,11 @@ We recommend the following for functional portability: - Programs that use texture object and reference APIs, work well on HIP -``` - ## More Tips ### HIPTRACE Mode On an hcc/AMD platform, set the HIP_TRACE_API environment variable to see a textural API trace. Use the following bit mask: - + - 0x1 = trace APIs - 0x2 = trace synchronization operations - 0x4 = trace memory allocation / deallocation