From b8af814467f920a6c4ecc228703be175cb21d52e Mon Sep 17 00:00:00 2001
From: coleramos425 <colramos@amd.com>
Date: Wed, 29 May 2024 18:53:11 +0000
Subject: [PATCH] Add CI workloads for MI300A_A1 and MI300X_A1

Signed-off-by: coleramos425 <colramos@amd.com>
---
 .../MI300A_A1/SQ_IFETCH_LEVEL.csv             |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_LDS.csv           |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_SMEM.csv          |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_VMEM.csv          |   4 +
 .../MI300A_A1/SQ_LEVEL_WAVES.csv              |   4 +
 .../workloads/device_filter/MI300A_A1/log.txt | 247 +++++++++++++
 .../MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt     |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt  |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt  |   5 +
 .../MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt      |   5 +
 .../MI300A_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_10.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_11.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_12.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_13.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_14.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_15.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_16.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_17.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_9.txt          |   5 +
 .../MI300A_A1/perfmon/timestamps.txt          |   5 +
 .../device_filter/MI300A_A1/pmc_perf.csv      |   4 +
 .../device_filter/MI300A_A1/sysinfo.csv       |   2 +
 .../device_filter/MI300A_A1/timestamps.csv    |   4 +
 .../MI300X_A1/SQ_IFETCH_LEVEL.csv             |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_LDS.csv           |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_SMEM.csv          |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_VMEM.csv          |   4 +
 .../MI300X_A1/SQ_LEVEL_WAVES.csv              |   4 +
 .../workloads/device_filter/MI300X_A1/log.txt | 157 +++++++++
 .../MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt     |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt  |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt  |   5 +
 .../MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt      |   5 +
 .../MI300X_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_10.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_11.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_12.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_13.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_14.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_15.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_16.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_17.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_9.txt          |   5 +
 .../MI300X_A1/perfmon/timestamps.txt          |   5 +
 .../device_filter/MI300X_A1/pmc_perf.csv      |   4 +
 .../device_filter/MI300X_A1/sysinfo.csv       |   2 +
 .../device_filter/MI300X_A1/timestamps.csv    |   4 +
 .../MI300A_A1/SQ_IFETCH_LEVEL.csv             |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_LDS.csv           |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_SMEM.csv          |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_VMEM.csv          |   4 +
 .../MI300A_A1/SQ_LEVEL_WAVES.csv              |   4 +
 .../device_inv_int/MI300A_A1/log.txt          | 280 +++++++++++++++
 .../MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt     |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt  |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt  |   5 +
 .../MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt      |   5 +
 .../MI300A_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_10.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_11.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_12.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_13.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_14.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_15.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_16.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_17.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_9.txt          |   5 +
 .../MI300A_A1/perfmon/timestamps.txt          |   5 +
 .../device_inv_int/MI300A_A1/pmc_perf.csv     |   4 +
 .../device_inv_int/MI300A_A1/sysinfo.csv      |   2 +
 .../device_inv_int/MI300A_A1/timestamps.csv   |   4 +
 .../MI300X_A1/SQ_IFETCH_LEVEL.csv             |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_LDS.csv           |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_SMEM.csv          |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_VMEM.csv          |   4 +
 .../MI300X_A1/SQ_LEVEL_WAVES.csv              |   4 +
 .../device_inv_int/MI300X_A1/log.txt          | 158 +++++++++
 .../MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt     |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt  |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt  |   5 +
 .../MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt      |   5 +
 .../MI300X_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_10.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_11.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_12.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_13.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_14.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_15.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_16.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_17.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_9.txt          |   5 +
 .../MI300X_A1/perfmon/timestamps.txt          |   5 +
 .../device_inv_int/MI300X_A1/pmc_perf.csv     |   4 +
 .../device_inv_int/MI300X_A1/sysinfo.csv      |   2 +
 .../device_inv_int/MI300X_A1/timestamps.csv   |   4 +
 .../dispatch_0/MI300A_A1/SQ_IFETCH_LEVEL.csv  |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_LDS.csv           |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_SMEM.csv          |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_VMEM.csv          |   4 +
 .../dispatch_0/MI300A_A1/SQ_LEVEL_WAVES.csv   |   4 +
 tests/workloads/dispatch_0/MI300A_A1/log.txt  | 259 ++++++++++++++
 .../MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt     |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt  |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt  |   5 +
 .../MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt      |   5 +
 .../MI300A_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_10.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_11.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_12.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_13.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_14.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_15.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_16.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_17.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_9.txt          |   5 +
 .../MI300A_A1/perfmon/timestamps.txt          |   5 +
 .../dispatch_0/MI300A_A1/pmc_perf.csv         |   4 +
 .../dispatch_0/MI300A_A1/sysinfo.csv          |   2 +
 .../dispatch_0/MI300A_A1/timestamps.csv       |   4 +
 .../dispatch_0/MI300X_A1/SQ_IFETCH_LEVEL.csv  |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_LDS.csv           |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_SMEM.csv          |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_VMEM.csv          |   4 +
 .../dispatch_0/MI300X_A1/SQ_LEVEL_WAVES.csv   |   4 +
 tests/workloads/dispatch_0/MI300X_A1/log.txt  | 226 ++++++++++++
 .../MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt     |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt  |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt  |   5 +
 .../MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt      |   5 +
 .../MI300X_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_10.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_11.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_12.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_13.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_14.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_15.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_16.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_17.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_9.txt          |   5 +
 .../MI300X_A1/perfmon/timestamps.txt          |   5 +
 .../dispatch_0/MI300X_A1/pmc_perf.csv         |   4 +
 .../dispatch_0/MI300X_A1/sysinfo.csv          |   2 +
 .../dispatch_0/MI300X_A1/timestamps.csv       |   4 +
 .../MI300A_A1/SQ_IFETCH_LEVEL.csv             |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_LDS.csv           |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_SMEM.csv          |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_VMEM.csv          |   4 +
 .../dispatch_0_1/MI300A_A1/SQ_LEVEL_WAVES.csv |   4 +
 .../workloads/dispatch_0_1/MI300A_A1/log.txt  | 223 ++++++++++++
 .../MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt     |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt  |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt  |   5 +
 .../MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt      |   5 +
 .../MI300A_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_10.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_11.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_12.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_13.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_14.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_15.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_16.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_17.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_9.txt          |   5 +
 .../MI300A_A1/perfmon/timestamps.txt          |   5 +
 .../dispatch_0_1/MI300A_A1/pmc_perf.csv       |   4 +
 .../dispatch_0_1/MI300A_A1/sysinfo.csv        |   2 +
 .../dispatch_0_1/MI300A_A1/timestamps.csv     |   4 +
 .../MI300X_A1/SQ_IFETCH_LEVEL.csv             |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_LDS.csv           |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_SMEM.csv          |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_VMEM.csv          |   4 +
 .../dispatch_0_1/MI300X_A1/SQ_LEVEL_WAVES.csv |   4 +
 .../workloads/dispatch_0_1/MI300X_A1/log.txt  | 229 ++++++++++++
 .../MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt     |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt  |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt  |   5 +
 .../MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt      |   5 +
 .../MI300X_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_10.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_11.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_12.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_13.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_14.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_15.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_16.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_17.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_9.txt          |   5 +
 .../MI300X_A1/perfmon/timestamps.txt          |   5 +
 .../dispatch_0_1/MI300X_A1/pmc_perf.csv       |   4 +
 .../dispatch_0_1/MI300X_A1/sysinfo.csv        |   2 +
 .../dispatch_0_1/MI300X_A1/timestamps.csv     |   4 +
 .../dispatch_2/MI300A_A1/SQ_IFETCH_LEVEL.csv  |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_LDS.csv           |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_SMEM.csv          |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_VMEM.csv          |   4 +
 .../dispatch_2/MI300A_A1/SQ_LEVEL_WAVES.csv   |   4 +
 tests/workloads/dispatch_2/MI300A_A1/log.txt  | 267 ++++++++++++++
 .../MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt     |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt  |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt  |   5 +
 .../MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt      |   5 +
 .../MI300A_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_10.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_11.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_12.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_13.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_14.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_15.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_16.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_17.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_9.txt          |   5 +
 .../MI300A_A1/perfmon/timestamps.txt          |   5 +
 .../dispatch_2/MI300A_A1/pmc_perf.csv         |   4 +
 .../dispatch_2/MI300A_A1/sysinfo.csv          |   2 +
 .../dispatch_2/MI300A_A1/timestamps.csv       |   4 +
 .../dispatch_2/MI300X_A1/SQ_IFETCH_LEVEL.csv  |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_LDS.csv           |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_SMEM.csv          |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_VMEM.csv          |   4 +
 .../dispatch_2/MI300X_A1/SQ_LEVEL_WAVES.csv   |   4 +
 tests/workloads/dispatch_2/MI300X_A1/log.txt  | 230 ++++++++++++
 .../MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt     |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt  |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt  |   5 +
 .../MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt      |   5 +
 .../MI300X_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_10.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_11.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_12.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_13.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_14.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_15.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_16.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_17.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_9.txt          |   5 +
 .../MI300X_A1/perfmon/timestamps.txt          |   5 +
 .../dispatch_2/MI300X_A1/pmc_perf.csv         |   4 +
 .../dispatch_2/MI300X_A1/sysinfo.csv          |   2 +
 .../dispatch_2/MI300X_A1/timestamps.csv       |   4 +
 .../MI300A_A1/SQ_IFETCH_LEVEL.csv             |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_LDS.csv           |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_SMEM.csv          |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_VMEM.csv          |   4 +
 .../dispatch_6_8/MI300A_A1/SQ_LEVEL_WAVES.csv |   4 +
 .../workloads/dispatch_6_8/MI300A_A1/log.txt  | 234 +++++++++++++
 .../MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt     |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt  |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt  |   5 +
 .../MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt      |   5 +
 .../MI300A_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_10.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_11.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_12.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_13.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_14.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_15.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_16.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_17.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_9.txt          |   5 +
 .../MI300A_A1/perfmon/timestamps.txt          |   5 +
 .../dispatch_6_8/MI300A_A1/pmc_perf.csv       |   4 +
 .../dispatch_6_8/MI300A_A1/sysinfo.csv        |   2 +
 .../dispatch_6_8/MI300A_A1/timestamps.csv     |   4 +
 .../MI300X_A1/SQ_IFETCH_LEVEL.csv             |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_LDS.csv           |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_SMEM.csv          |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_VMEM.csv          |   4 +
 .../dispatch_6_8/MI300X_A1/SQ_LEVEL_WAVES.csv |   4 +
 .../workloads/dispatch_6_8/MI300X_A1/log.txt  | 210 +++++++++++
 .../MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt     |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt  |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt  |   5 +
 .../MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt      |   5 +
 .../MI300X_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_10.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_11.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_12.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_13.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_14.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_15.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_16.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_17.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_9.txt          |   5 +
 .../MI300X_A1/perfmon/timestamps.txt          |   5 +
 .../dispatch_6_8/MI300X_A1/pmc_perf.csv       |   4 +
 .../dispatch_6_8/MI300X_A1/sysinfo.csv        |   2 +
 .../dispatch_6_8/MI300X_A1/timestamps.csv     |   4 +
 .../dispatch_7/MI300A_A1/SQ_IFETCH_LEVEL.csv  |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_LDS.csv           |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_SMEM.csv          |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_VMEM.csv          |   4 +
 .../dispatch_7/MI300A_A1/SQ_LEVEL_WAVES.csv   |   4 +
 tests/workloads/dispatch_7/MI300A_A1/log.txt  | 234 +++++++++++++
 .../MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt     |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt  |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt  |   5 +
 .../MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt      |   5 +
 .../MI300A_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_10.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_11.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_12.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_13.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_14.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_15.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_16.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_17.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_9.txt          |   5 +
 .../MI300A_A1/perfmon/timestamps.txt          |   5 +
 .../dispatch_7/MI300A_A1/pmc_perf.csv         |   4 +
 .../dispatch_7/MI300A_A1/sysinfo.csv          |   2 +
 .../dispatch_7/MI300A_A1/timestamps.csv       |   4 +
 .../dispatch_7/MI300X_A1/SQ_IFETCH_LEVEL.csv  |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_LDS.csv           |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_SMEM.csv          |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_VMEM.csv          |   4 +
 .../dispatch_7/MI300X_A1/SQ_LEVEL_WAVES.csv   |   4 +
 tests/workloads/dispatch_7/MI300X_A1/log.txt  | 215 ++++++++++++
 .../MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt     |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt  |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt  |   5 +
 .../MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt      |   5 +
 .../MI300X_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_10.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_11.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_12.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_13.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_14.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_15.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_16.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_17.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_9.txt          |   5 +
 .../MI300X_A1/perfmon/timestamps.txt          |   5 +
 .../dispatch_7/MI300X_A1/pmc_perf.csv         |   4 +
 .../dispatch_7/MI300X_A1/sysinfo.csv          |   2 +
 .../dispatch_7/MI300X_A1/timestamps.csv       |   4 +
 .../MI300A_A1/SQ_IFETCH_LEVEL.csv             |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_LDS.csv           |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_SMEM.csv          |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_VMEM.csv          |   4 +
 .../dispatch_inv/MI300A_A1/SQ_LEVEL_WAVES.csv |   4 +
 .../workloads/dispatch_inv/MI300A_A1/log.txt  | 233 +++++++++++++
 .../MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt     |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt  |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt  |   5 +
 .../MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt      |   5 +
 .../MI300A_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_10.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_11.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_12.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_13.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_14.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_15.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_16.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_17.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_9.txt          |   5 +
 .../MI300A_A1/perfmon/timestamps.txt          |   5 +
 .../dispatch_inv/MI300A_A1/pmc_perf.csv       |   4 +
 .../dispatch_inv/MI300A_A1/sysinfo.csv        |   2 +
 .../dispatch_inv/MI300A_A1/timestamps.csv     |   4 +
 .../MI300X_A1/SQ_IFETCH_LEVEL.csv             |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_LDS.csv           |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_SMEM.csv          |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_VMEM.csv          |   4 +
 .../dispatch_inv/MI300X_A1/SQ_LEVEL_WAVES.csv |   4 +
 .../workloads/dispatch_inv/MI300X_A1/log.txt  | 202 +++++++++++
 .../MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt     |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt  |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt  |   5 +
 .../MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt      |   5 +
 .../MI300X_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_10.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_11.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_12.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_13.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_14.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_15.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_16.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_17.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_9.txt          |   5 +
 .../MI300X_A1/perfmon/timestamps.txt          |   5 +
 .../dispatch_inv/MI300X_A1/pmc_perf.csv       |   4 +
 .../dispatch_inv/MI300X_A1/sysinfo.csv        |   2 +
 .../dispatch_inv/MI300X_A1/timestamps.csv     |   4 +
 .../workloads/ipblocks_CPC/MI300A_A1/log.txt  |  67 ++++
 .../MI300A_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300A_A1/perfmon/timestamps.txt          |   5 +
 .../ipblocks_CPC/MI300A_A1/pmc_perf.csv       |   4 +
 .../ipblocks_CPC/MI300A_A1/sysinfo.csv        |   2 +
 .../ipblocks_CPC/MI300A_A1/timestamps.csv     |   4 +
 .../workloads/ipblocks_CPC/MI300X_A1/log.txt  |  60 ++++
 .../MI300X_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300X_A1/perfmon/timestamps.txt          |   5 +
 .../ipblocks_CPC/MI300X_A1/pmc_perf.csv       |   4 +
 .../ipblocks_CPC/MI300X_A1/sysinfo.csv        |   2 +
 .../ipblocks_CPC/MI300X_A1/timestamps.csv     |   4 +
 .../workloads/ipblocks_CPF/MI300A_A1/log.txt  |  68 ++++
 .../MI300A_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300A_A1/perfmon/timestamps.txt          |   5 +
 .../ipblocks_CPF/MI300A_A1/pmc_perf.csv       |   4 +
 .../ipblocks_CPF/MI300A_A1/sysinfo.csv        |   2 +
 .../ipblocks_CPF/MI300A_A1/timestamps.csv     |   4 +
 .../workloads/ipblocks_CPF/MI300X_A1/log.txt  |  54 +++
 .../MI300X_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300X_A1/perfmon/timestamps.txt          |   5 +
 .../ipblocks_CPF/MI300X_A1/pmc_perf.csv       |   4 +
 .../ipblocks_CPF/MI300X_A1/sysinfo.csv        |   2 +
 .../ipblocks_CPF/MI300X_A1/timestamps.csv     |   4 +
 .../workloads/ipblocks_SPI/MI300A_A1/log.txt  | 105 ++++++
 .../MI300A_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300A_A1/perfmon/timestamps.txt          |   5 +
 .../ipblocks_SPI/MI300A_A1/pmc_perf.csv       |   4 +
 .../ipblocks_SPI/MI300A_A1/sysinfo.csv        |   2 +
 .../ipblocks_SPI/MI300A_A1/timestamps.csv     |   4 +
 .../workloads/ipblocks_SPI/MI300X_A1/log.txt  |  85 +++++
 .../MI300X_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300X_A1/perfmon/timestamps.txt          |   5 +
 .../ipblocks_SPI/MI300X_A1/pmc_perf.csv       |   4 +
 .../ipblocks_SPI/MI300X_A1/sysinfo.csv        |   2 +
 .../ipblocks_SPI/MI300X_A1/timestamps.csv     |   4 +
 .../ipblocks_SQ/MI300A_A1/SQ_IFETCH_LEVEL.csv |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_LDS.csv           |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_SMEM.csv          |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_VMEM.csv          |   4 +
 .../ipblocks_SQ/MI300A_A1/SQ_LEVEL_WAVES.csv  |   4 +
 tests/workloads/ipblocks_SQ/MI300A_A1/log.txt | 191 ++++++++++
 .../MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt     |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt  |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt  |   5 +
 .../MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt      |   5 +
 .../MI300A_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_10.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_11.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_12.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_9.txt          |   5 +
 .../MI300A_A1/perfmon/timestamps.txt          |   5 +
 .../ipblocks_SQ/MI300A_A1/pmc_perf.csv        |   4 +
 .../ipblocks_SQ/MI300A_A1/sysinfo.csv         |   2 +
 .../ipblocks_SQ/MI300A_A1/timestamps.csv      |   4 +
 .../ipblocks_SQ/MI300X_A1/SQ_IFETCH_LEVEL.csv |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_LDS.csv           |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_SMEM.csv          |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_VMEM.csv          |   4 +
 .../ipblocks_SQ/MI300X_A1/SQ_LEVEL_WAVES.csv  |   4 +
 tests/workloads/ipblocks_SQ/MI300X_A1/log.txt | 121 +++++++
 .../MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt     |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt  |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt  |   5 +
 .../MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt      |   5 +
 .../MI300X_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_10.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_11.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_12.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_9.txt          |   5 +
 .../MI300X_A1/perfmon/timestamps.txt          |   5 +
 .../ipblocks_SQ/MI300X_A1/pmc_perf.csv        |   4 +
 .../ipblocks_SQ/MI300X_A1/sysinfo.csv         |   2 +
 .../ipblocks_SQ/MI300X_A1/timestamps.csv      |   4 +
 .../workloads/ipblocks_SQC/MI300A_A1/log.txt  |  61 ++++
 .../MI300A_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300A_A1/perfmon/timestamps.txt          |   5 +
 .../ipblocks_SQC/MI300A_A1/pmc_perf.csv       |   4 +
 .../ipblocks_SQC/MI300A_A1/sysinfo.csv        |   2 +
 .../ipblocks_SQC/MI300A_A1/timestamps.csv     |   4 +
 .../workloads/ipblocks_SQC/MI300X_A1/log.txt  |  46 +++
 .../MI300X_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300X_A1/perfmon/timestamps.txt          |   5 +
 .../ipblocks_SQC/MI300X_A1/pmc_perf.csv       |   4 +
 .../ipblocks_SQC/MI300X_A1/sysinfo.csv        |   2 +
 .../ipblocks_SQC/MI300X_A1/timestamps.csv     |   4 +
 .../MI300A_A1/SQ_IFETCH_LEVEL.csv             |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_LDS.csv           |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_SMEM.csv          |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_VMEM.csv          |   4 +
 .../MI300A_A1/SQ_LEVEL_WAVES.csv              |   4 +
 .../ipblocks_SQ_CPC/MI300A_A1/log.txt         | 175 ++++++++++
 .../MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt     |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt  |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt  |   5 +
 .../MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt      |   5 +
 .../MI300A_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_10.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_11.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_12.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_9.txt          |   5 +
 .../MI300A_A1/perfmon/timestamps.txt          |   5 +
 .../ipblocks_SQ_CPC/MI300A_A1/pmc_perf.csv    |   4 +
 .../ipblocks_SQ_CPC/MI300A_A1/sysinfo.csv     |   2 +
 .../ipblocks_SQ_CPC/MI300A_A1/timestamps.csv  |   4 +
 .../MI300X_A1/SQ_IFETCH_LEVEL.csv             |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_LDS.csv           |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_SMEM.csv          |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_VMEM.csv          |   4 +
 .../MI300X_A1/SQ_LEVEL_WAVES.csv              |   4 +
 .../ipblocks_SQ_CPC/MI300X_A1/log.txt         | 141 ++++++++
 .../MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt     |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt  |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt  |   5 +
 .../MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt      |   5 +
 .../MI300X_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_10.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_11.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_12.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_9.txt          |   5 +
 .../MI300X_A1/perfmon/timestamps.txt          |   5 +
 .../ipblocks_SQ_CPC/MI300X_A1/pmc_perf.csv    |   4 +
 .../ipblocks_SQ_CPC/MI300X_A1/sysinfo.csv     |   2 +
 .../ipblocks_SQ_CPC/MI300X_A1/timestamps.csv  |   4 +
 .../MI300A_A1/SQ_IFETCH_LEVEL.csv             |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_LDS.csv           |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_SMEM.csv          |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_VMEM.csv          |   4 +
 .../MI300A_A1/SQ_LEVEL_WAVES.csv              |   4 +
 .../ipblocks_SQ_SPI/MI300A_A1/log.txt         | 244 +++++++++++++
 .../MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt     |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt  |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt  |   5 +
 .../MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt      |   5 +
 .../MI300A_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_10.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_11.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_12.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_9.txt          |   5 +
 .../MI300A_A1/perfmon/timestamps.txt          |   5 +
 .../ipblocks_SQ_SPI/MI300A_A1/pmc_perf.csv    |   4 +
 .../ipblocks_SQ_SPI/MI300A_A1/sysinfo.csv     |   2 +
 .../ipblocks_SQ_SPI/MI300A_A1/timestamps.csv  |   4 +
 .../MI300X_A1/SQ_IFETCH_LEVEL.csv             |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_LDS.csv           |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_SMEM.csv          |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_VMEM.csv          |   4 +
 .../MI300X_A1/SQ_LEVEL_WAVES.csv              |   4 +
 .../ipblocks_SQ_SPI/MI300X_A1/log.txt         | 154 ++++++++
 .../MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt     |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt  |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt  |   5 +
 .../MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt      |   5 +
 .../MI300X_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_10.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_11.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_12.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_9.txt          |   5 +
 .../MI300X_A1/perfmon/timestamps.txt          |   5 +
 .../ipblocks_SQ_SPI/MI300X_A1/pmc_perf.csv    |   4 +
 .../ipblocks_SQ_SPI/MI300X_A1/sysinfo.csv     |   2 +
 .../ipblocks_SQ_SPI/MI300X_A1/timestamps.csv  |   4 +
 .../MI300A_A1/SQ_IFETCH_LEVEL.csv             |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_LDS.csv           |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_SMEM.csv          |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_VMEM.csv          |   4 +
 .../MI300A_A1/SQ_LEVEL_WAVES.csv              |   4 +
 .../MI300A_A1/log.txt                         | 197 +++++++++++
 .../MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt     |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt  |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt  |   5 +
 .../MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt      |   5 +
 .../MI300A_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_10.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_11.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_12.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_9.txt          |   5 +
 .../MI300A_A1/perfmon/timestamps.txt          |   5 +
 .../MI300A_A1/pmc_perf.csv                    |   4 +
 .../MI300A_A1/sysinfo.csv                     |   2 +
 .../MI300A_A1/timestamps.csv                  |   4 +
 .../MI300X_A1/SQ_IFETCH_LEVEL.csv             |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_LDS.csv           |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_SMEM.csv          |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_VMEM.csv          |   4 +
 .../MI300X_A1/SQ_LEVEL_WAVES.csv              |   4 +
 .../MI300X_A1/log.txt                         | 140 ++++++++
 .../MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt     |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt  |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt  |   5 +
 .../MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt      |   5 +
 .../MI300X_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_10.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_11.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_12.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_9.txt          |   5 +
 .../MI300X_A1/perfmon/timestamps.txt          |   5 +
 .../MI300X_A1/pmc_perf.csv                    |   4 +
 .../MI300X_A1/sysinfo.csv                     |   2 +
 .../MI300X_A1/timestamps.csv                  |   4 +
 .../MI300A_A1/SQ_IFETCH_LEVEL.csv             |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_LDS.csv           |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_SMEM.csv          |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_VMEM.csv          |   4 +
 .../MI300A_A1/SQ_LEVEL_WAVES.csv              |   4 +
 .../ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/log.txt | 159 +++++++++
 .../MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt     |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt  |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt  |   5 +
 .../MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt      |   5 +
 .../MI300A_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_10.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_11.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_12.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_9.txt          |   5 +
 .../MI300A_A1/perfmon/timestamps.txt          |   5 +
 .../MI300A_A1/pmc_perf.csv                    |   4 +
 .../MI300A_A1/sysinfo.csv                     |   2 +
 .../MI300A_A1/timestamps.csv                  |   4 +
 .../MI300X_A1/SQ_IFETCH_LEVEL.csv             |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_LDS.csv           |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_SMEM.csv          |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_VMEM.csv          |   4 +
 .../MI300X_A1/SQ_LEVEL_WAVES.csv              |   4 +
 .../ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/log.txt | 132 +++++++
 .../MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt     |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt  |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt  |   5 +
 .../MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt      |   5 +
 .../MI300X_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_10.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_11.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_12.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_9.txt          |   5 +
 .../MI300X_A1/perfmon/timestamps.txt          |   5 +
 .../MI300X_A1/pmc_perf.csv                    |   4 +
 .../MI300X_A1/sysinfo.csv                     |   2 +
 .../MI300X_A1/timestamps.csv                  |   4 +
 .../MI300A_A1/SQ_IFETCH_LEVEL.csv             |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_LDS.csv           |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_SMEM.csv          |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_VMEM.csv          |   4 +
 .../MI300A_A1/SQ_LEVEL_WAVES.csv              |   4 +
 .../ipblocks_SQ_TA/MI300A_A1/log.txt          | 175 ++++++++++
 .../MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt     |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt  |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt  |   5 +
 .../MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt      |   5 +
 .../MI300A_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_10.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_11.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_12.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_9.txt          |   5 +
 .../MI300A_A1/perfmon/timestamps.txt          |   5 +
 .../ipblocks_SQ_TA/MI300A_A1/pmc_perf.csv     |   4 +
 .../ipblocks_SQ_TA/MI300A_A1/sysinfo.csv      |   2 +
 .../ipblocks_SQ_TA/MI300A_A1/timestamps.csv   |   4 +
 .../MI300X_A1/SQ_IFETCH_LEVEL.csv             |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_LDS.csv           |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_SMEM.csv          |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_VMEM.csv          |   4 +
 .../MI300X_A1/SQ_LEVEL_WAVES.csv              |   4 +
 .../ipblocks_SQ_TA/MI300X_A1/log.txt          | 141 ++++++++
 .../MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt     |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt  |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt  |   5 +
 .../MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt      |   5 +
 .../MI300X_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_10.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_11.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_12.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_9.txt          |   5 +
 .../MI300X_A1/perfmon/timestamps.txt          |   5 +
 .../ipblocks_SQ_TA/MI300X_A1/pmc_perf.csv     |   4 +
 .../ipblocks_SQ_TA/MI300X_A1/sysinfo.csv      |   2 +
 .../ipblocks_SQ_TA/MI300X_A1/timestamps.csv   |   4 +
 tests/workloads/ipblocks_TA/MI300A_A1/log.txt | 114 ++++++
 .../MI300A_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300A_A1/perfmon/timestamps.txt          |   5 +
 .../ipblocks_TA/MI300A_A1/pmc_perf.csv        |   4 +
 .../ipblocks_TA/MI300A_A1/sysinfo.csv         |   2 +
 .../ipblocks_TA/MI300A_A1/timestamps.csv      |   4 +
 tests/workloads/ipblocks_TA/MI300X_A1/log.txt |  69 ++++
 .../MI300X_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300X_A1/perfmon/timestamps.txt          |   5 +
 .../ipblocks_TA/MI300X_A1/pmc_perf.csv        |   4 +
 .../ipblocks_TA/MI300X_A1/sysinfo.csv         |   2 +
 .../ipblocks_TA/MI300X_A1/timestamps.csv      |   4 +
 .../workloads/ipblocks_TCC/MI300A_A1/log.txt  |  98 ++++++
 .../MI300A_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300A_A1/perfmon/timestamps.txt          |   5 +
 .../ipblocks_TCC/MI300A_A1/pmc_perf.csv       |   4 +
 .../ipblocks_TCC/MI300A_A1/sysinfo.csv        |   2 +
 .../ipblocks_TCC/MI300A_A1/timestamps.csv     |   4 +
 .../workloads/ipblocks_TCC/MI300X_A1/log.txt  |  79 +++++
 .../MI300X_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300X_A1/perfmon/timestamps.txt          |   5 +
 .../ipblocks_TCC/MI300X_A1/pmc_perf.csv       |   4 +
 .../ipblocks_TCC/MI300X_A1/sysinfo.csv        |   2 +
 .../ipblocks_TCC/MI300X_A1/timestamps.csv     |   4 +
 .../workloads/ipblocks_TCP/MI300A_A1/log.txt  | 219 ++++++++++++
 .../MI300A_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_9.txt          |   5 +
 .../MI300A_A1/perfmon/timestamps.txt          |   5 +
 .../ipblocks_TCP/MI300A_A1/pmc_perf.csv       |   4 +
 .../ipblocks_TCP/MI300A_A1/sysinfo.csv        |   2 +
 .../ipblocks_TCP/MI300A_A1/timestamps.csv     |   4 +
 .../workloads/ipblocks_TCP/MI300X_A1/log.txt  | 102 ++++++
 .../MI300X_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_9.txt          |   5 +
 .../MI300X_A1/perfmon/timestamps.txt          |   5 +
 .../ipblocks_TCP/MI300X_A1/pmc_perf.csv       |   4 +
 .../ipblocks_TCP/MI300X_A1/sysinfo.csv        |   2 +
 .../ipblocks_TCP/MI300X_A1/timestamps.csv     |   4 +
 tests/workloads/ipblocks_TD/MI300A_A1/log.txt |  54 +++
 .../MI300A_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300A_A1/perfmon/timestamps.txt          |   5 +
 .../ipblocks_TD/MI300A_A1/pmc_perf.csv        |   4 +
 .../ipblocks_TD/MI300A_A1/sysinfo.csv         |   2 +
 .../ipblocks_TD/MI300A_A1/timestamps.csv      |   4 +
 tests/workloads/ipblocks_TD/MI300X_A1/log.txt |  45 +++
 .../MI300X_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300X_A1/perfmon/timestamps.txt          |   5 +
 .../ipblocks_TD/MI300X_A1/pmc_perf.csv        |   4 +
 .../ipblocks_TD/MI300X_A1/sysinfo.csv         |   2 +
 .../ipblocks_TD/MI300X_A1/timestamps.csv      |   4 +
 .../MI300A_A1/SQ_IFETCH_LEVEL.csv             |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_LDS.csv           |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_SMEM.csv          |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_VMEM.csv          |   4 +
 .../MI300A_A1/SQ_LEVEL_WAVES.csv              |   4 +
 .../join_type_grid/MI300A_A1/log.txt          | 212 +++++++++++
 .../MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt     |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt  |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt  |   5 +
 .../MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt      |   5 +
 .../MI300A_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_10.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_11.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_12.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_13.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_14.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_15.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_16.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_17.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_9.txt          |   5 +
 .../MI300A_A1/perfmon/timestamps.txt          |   5 +
 .../join_type_grid/MI300A_A1/pmc_perf.csv     |   4 +
 .../join_type_grid/MI300A_A1/sysinfo.csv      |   2 +
 .../join_type_grid/MI300A_A1/timestamps.csv   |   4 +
 .../MI300X_A1/SQ_IFETCH_LEVEL.csv             |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_LDS.csv           |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_SMEM.csv          |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_VMEM.csv          |   4 +
 .../MI300X_A1/SQ_LEVEL_WAVES.csv              |   4 +
 .../join_type_grid/MI300X_A1/log.txt          | 180 ++++++++++
 .../MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt     |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt  |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt  |   5 +
 .../MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt      |   5 +
 .../MI300X_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_10.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_11.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_12.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_13.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_14.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_15.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_16.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_17.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_9.txt          |   5 +
 .../MI300X_A1/perfmon/timestamps.txt          |   5 +
 .../join_type_grid/MI300X_A1/pmc_perf.csv     |   4 +
 .../join_type_grid/MI300X_A1/sysinfo.csv      |   2 +
 .../join_type_grid/MI300X_A1/timestamps.csv   |   4 +
 .../MI300A_A1/SQ_IFETCH_LEVEL.csv             |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_LDS.csv           |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_SMEM.csv          |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_VMEM.csv          |   4 +
 .../MI300A_A1/SQ_LEVEL_WAVES.csv              |   4 +
 .../join_type_kernel/MI300A_A1/log.txt        | 274 +++++++++++++++
 .../MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt     |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt  |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt  |   5 +
 .../MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt      |   5 +
 .../MI300A_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_10.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_11.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_12.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_13.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_14.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_15.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_16.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_17.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_9.txt          |   5 +
 .../MI300A_A1/perfmon/timestamps.txt          |   5 +
 .../join_type_kernel/MI300A_A1/pmc_perf.csv   |   4 +
 .../join_type_kernel/MI300A_A1/sysinfo.csv    |   2 +
 .../join_type_kernel/MI300A_A1/timestamps.csv |   4 +
 .../MI300X_A1/SQ_IFETCH_LEVEL.csv             |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_LDS.csv           |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_SMEM.csv          |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_VMEM.csv          |   4 +
 .../MI300X_A1/SQ_LEVEL_WAVES.csv              |   4 +
 .../join_type_kernel/MI300X_A1/log.txt        | 173 +++++++++
 .../MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt     |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt  |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt  |   5 +
 .../MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt      |   5 +
 .../MI300X_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_10.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_11.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_12.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_13.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_14.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_15.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_16.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_17.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_9.txt          |   5 +
 .../MI300X_A1/perfmon/timestamps.txt          |   5 +
 .../join_type_kernel/MI300X_A1/pmc_perf.csv   |   4 +
 .../join_type_kernel/MI300X_A1/sysinfo.csv    |   2 +
 .../join_type_kernel/MI300X_A1/timestamps.csv |   4 +
 .../kernel/MI300A_A1/SQ_IFETCH_LEVEL.csv      |   4 +
 .../kernel/MI300A_A1/SQ_INST_LEVEL_LDS.csv    |   4 +
 .../kernel/MI300A_A1/SQ_INST_LEVEL_SMEM.csv   |   4 +
 .../kernel/MI300A_A1/SQ_INST_LEVEL_VMEM.csv   |   4 +
 .../kernel/MI300A_A1/SQ_LEVEL_WAVES.csv       |   4 +
 tests/workloads/kernel/MI300A_A1/log.txt      | 215 ++++++++++++
 .../MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt     |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt  |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt  |   5 +
 .../MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt      |   5 +
 .../kernel/MI300A_A1/perfmon/pmc_perf_0.txt   |   5 +
 .../kernel/MI300A_A1/perfmon/pmc_perf_1.txt   |   5 +
 .../kernel/MI300A_A1/perfmon/pmc_perf_10.txt  |   5 +
 .../kernel/MI300A_A1/perfmon/pmc_perf_11.txt  |   5 +
 .../kernel/MI300A_A1/perfmon/pmc_perf_12.txt  |   5 +
 .../kernel/MI300A_A1/perfmon/pmc_perf_13.txt  |   5 +
 .../kernel/MI300A_A1/perfmon/pmc_perf_14.txt  |   5 +
 .../kernel/MI300A_A1/perfmon/pmc_perf_15.txt  |   5 +
 .../kernel/MI300A_A1/perfmon/pmc_perf_16.txt  |   5 +
 .../kernel/MI300A_A1/perfmon/pmc_perf_17.txt  |   5 +
 .../kernel/MI300A_A1/perfmon/pmc_perf_2.txt   |   5 +
 .../kernel/MI300A_A1/perfmon/pmc_perf_3.txt   |   5 +
 .../kernel/MI300A_A1/perfmon/pmc_perf_4.txt   |   5 +
 .../kernel/MI300A_A1/perfmon/pmc_perf_5.txt   |   5 +
 .../kernel/MI300A_A1/perfmon/pmc_perf_6.txt   |   5 +
 .../kernel/MI300A_A1/perfmon/pmc_perf_7.txt   |   5 +
 .../kernel/MI300A_A1/perfmon/pmc_perf_8.txt   |   5 +
 .../kernel/MI300A_A1/perfmon/pmc_perf_9.txt   |   5 +
 .../kernel/MI300A_A1/perfmon/timestamps.txt   |   5 +
 tests/workloads/kernel/MI300A_A1/pmc_perf.csv |   4 +
 tests/workloads/kernel/MI300A_A1/sysinfo.csv  |   2 +
 .../workloads/kernel/MI300A_A1/timestamps.csv |   4 +
 .../kernel/MI300X_A1/SQ_IFETCH_LEVEL.csv      |   4 +
 .../kernel/MI300X_A1/SQ_INST_LEVEL_LDS.csv    |   4 +
 .../kernel/MI300X_A1/SQ_INST_LEVEL_SMEM.csv   |   4 +
 .../kernel/MI300X_A1/SQ_INST_LEVEL_VMEM.csv   |   4 +
 .../kernel/MI300X_A1/SQ_LEVEL_WAVES.csv       |   4 +
 tests/workloads/kernel/MI300X_A1/log.txt      | 229 ++++++++++++
 .../MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt     |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt  |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt  |   5 +
 .../MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt      |   5 +
 .../kernel/MI300X_A1/perfmon/pmc_perf_0.txt   |   5 +
 .../kernel/MI300X_A1/perfmon/pmc_perf_1.txt   |   5 +
 .../kernel/MI300X_A1/perfmon/pmc_perf_10.txt  |   5 +
 .../kernel/MI300X_A1/perfmon/pmc_perf_11.txt  |   5 +
 .../kernel/MI300X_A1/perfmon/pmc_perf_12.txt  |   5 +
 .../kernel/MI300X_A1/perfmon/pmc_perf_13.txt  |   5 +
 .../kernel/MI300X_A1/perfmon/pmc_perf_14.txt  |   5 +
 .../kernel/MI300X_A1/perfmon/pmc_perf_15.txt  |   5 +
 .../kernel/MI300X_A1/perfmon/pmc_perf_16.txt  |   5 +
 .../kernel/MI300X_A1/perfmon/pmc_perf_17.txt  |   5 +
 .../kernel/MI300X_A1/perfmon/pmc_perf_2.txt   |   5 +
 .../kernel/MI300X_A1/perfmon/pmc_perf_3.txt   |   5 +
 .../kernel/MI300X_A1/perfmon/pmc_perf_4.txt   |   5 +
 .../kernel/MI300X_A1/perfmon/pmc_perf_5.txt   |   5 +
 .../kernel/MI300X_A1/perfmon/pmc_perf_6.txt   |   5 +
 .../kernel/MI300X_A1/perfmon/pmc_perf_7.txt   |   5 +
 .../kernel/MI300X_A1/perfmon/pmc_perf_8.txt   |   5 +
 .../kernel/MI300X_A1/perfmon/pmc_perf_9.txt   |   5 +
 .../kernel/MI300X_A1/perfmon/timestamps.txt   |   5 +
 tests/workloads/kernel/MI300X_A1/pmc_perf.csv |   4 +
 tests/workloads/kernel/MI300X_A1/sysinfo.csv  |   2 +
 .../workloads/kernel/MI300X_A1/timestamps.csv |   4 +
 .../MI300A_A1/SQ_IFETCH_LEVEL.csv             |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_LDS.csv           |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_SMEM.csv          |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_VMEM.csv          |   4 +
 .../MI300A_A1/SQ_LEVEL_WAVES.csv              |   4 +
 .../kernel_inv_int/MI300A_A1/log.txt          | 281 +++++++++++++++
 .../MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt     |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt  |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt  |   5 +
 .../MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt      |   5 +
 .../MI300A_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_10.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_11.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_12.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_13.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_14.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_15.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_16.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_17.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_9.txt          |   5 +
 .../MI300A_A1/perfmon/timestamps.txt          |   5 +
 .../kernel_inv_int/MI300A_A1/pmc_perf.csv     |   4 +
 .../kernel_inv_int/MI300A_A1/sysinfo.csv      |   2 +
 .../kernel_inv_int/MI300A_A1/timestamps.csv   |   4 +
 .../MI300X_A1/SQ_IFETCH_LEVEL.csv             |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_LDS.csv           |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_SMEM.csv          |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_VMEM.csv          |   4 +
 .../MI300X_A1/SQ_LEVEL_WAVES.csv              |   4 +
 .../kernel_inv_int/MI300X_A1/log.txt          | 205 +++++++++++
 .../MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt     |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt  |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt  |   5 +
 .../MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt      |   5 +
 .../MI300X_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_10.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_11.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_12.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_13.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_14.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_15.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_16.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_17.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_9.txt          |   5 +
 .../MI300X_A1/perfmon/timestamps.txt          |   5 +
 .../kernel_inv_int/MI300X_A1/pmc_perf.csv     |   4 +
 .../kernel_inv_int/MI300X_A1/sysinfo.csv      |   2 +
 .../kernel_inv_int/MI300X_A1/timestamps.csv   |   4 +
 .../MI300A_A1/SQ_IFETCH_LEVEL.csv             |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_LDS.csv           |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_SMEM.csv          |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_VMEM.csv          |   4 +
 .../MI300A_A1/SQ_LEVEL_WAVES.csv              |   4 +
 .../kernel_inv_str/MI300A_A1/log.txt          | 244 +++++++++++++
 .../MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt     |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt  |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt  |   5 +
 .../MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt      |   5 +
 .../MI300A_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_10.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_11.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_12.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_13.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_14.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_15.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_16.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_17.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_9.txt          |   5 +
 .../MI300A_A1/perfmon/timestamps.txt          |   5 +
 .../kernel_inv_str/MI300A_A1/pmc_perf.csv     |   4 +
 .../kernel_inv_str/MI300A_A1/sysinfo.csv      |   2 +
 .../kernel_inv_str/MI300A_A1/timestamps.csv   |   4 +
 .../MI300X_A1/SQ_IFETCH_LEVEL.csv             |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_LDS.csv           |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_SMEM.csv          |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_VMEM.csv          |   4 +
 .../MI300X_A1/SQ_LEVEL_WAVES.csv              |   4 +
 .../kernel_inv_str/MI300X_A1/log.txt          | 210 +++++++++++
 .../MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt     |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt  |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt  |   5 +
 .../MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt      |   5 +
 .../MI300X_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_10.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_11.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_12.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_13.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_14.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_15.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_16.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_17.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_9.txt          |   5 +
 .../MI300X_A1/perfmon/timestamps.txt          |   5 +
 .../kernel_inv_str/MI300X_A1/pmc_perf.csv     |   4 +
 .../kernel_inv_str/MI300X_A1/sysinfo.csv      |   2 +
 .../kernel_inv_str/MI300X_A1/timestamps.csv   |   4 +
 .../MI300A_A1/SQ_IFETCH_LEVEL.csv             |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_LDS.csv           |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_SMEM.csv          |   4 +
 .../MI300A_A1/SQ_INST_LEVEL_VMEM.csv          |   4 +
 .../MI300A_A1/SQ_LEVEL_WAVES.csv              |   4 +
 .../workloads/kernel_substr/MI300A_A1/log.txt | 329 ++++++++++++++++++
 .../MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt     |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt  |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt  |   5 +
 .../MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt      |   5 +
 .../MI300A_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_10.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_11.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_12.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_13.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_14.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_15.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_16.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_17.txt         |   5 +
 .../MI300A_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300A_A1/perfmon/pmc_perf_9.txt          |   5 +
 .../MI300A_A1/perfmon/timestamps.txt          |   5 +
 .../kernel_substr/MI300A_A1/pmc_perf.csv      |   4 +
 .../kernel_substr/MI300A_A1/sysinfo.csv       |   2 +
 .../kernel_substr/MI300A_A1/timestamps.csv    |   4 +
 .../MI300X_A1/SQ_IFETCH_LEVEL.csv             |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_LDS.csv           |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_SMEM.csv          |   4 +
 .../MI300X_A1/SQ_INST_LEVEL_VMEM.csv          |   4 +
 .../MI300X_A1/SQ_LEVEL_WAVES.csv              |   4 +
 .../workloads/kernel_substr/MI300X_A1/log.txt | 234 +++++++++++++
 .../MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt     |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt  |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt  |   5 +
 .../MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt      |   5 +
 .../MI300X_A1/perfmon/pmc_perf_0.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_1.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_10.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_11.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_12.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_13.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_14.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_15.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_16.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_17.txt         |   5 +
 .../MI300X_A1/perfmon/pmc_perf_2.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_3.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_4.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_5.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_6.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_7.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_8.txt          |   5 +
 .../MI300X_A1/perfmon/pmc_perf_9.txt          |   5 +
 .../MI300X_A1/perfmon/timestamps.txt          |   5 +
 .../kernel_substr/MI300X_A1/pmc_perf.csv      |   4 +
 .../kernel_substr/MI300X_A1/sysinfo.csv       |   2 +
 .../kernel_substr/MI300X_A1/timestamps.csv    |   4 +
 .../no_roof/MI300A_A1/SQ_IFETCH_LEVEL.csv     |   4 +
 .../no_roof/MI300A_A1/SQ_INST_LEVEL_LDS.csv   |   4 +
 .../no_roof/MI300A_A1/SQ_INST_LEVEL_SMEM.csv  |   4 +
 .../no_roof/MI300A_A1/SQ_INST_LEVEL_VMEM.csv  |   4 +
 .../no_roof/MI300A_A1/SQ_LEVEL_WAVES.csv      |   4 +
 tests/workloads/no_roof/MI300A_A1/log.txt     | 227 ++++++++++++
 .../MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt     |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt  |   5 +
 .../MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt  |   5 +
 .../MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt      |   5 +
 .../no_roof/MI300A_A1/perfmon/pmc_perf_0.txt  |   5 +
 .../no_roof/MI300A_A1/perfmon/pmc_perf_1.txt  |   5 +
 .../no_roof/MI300A_A1/perfmon/pmc_perf_10.txt |   5 +
 .../no_roof/MI300A_A1/perfmon/pmc_perf_11.txt |   5 +
 .../no_roof/MI300A_A1/perfmon/pmc_perf_12.txt |   5 +
 .../no_roof/MI300A_A1/perfmon/pmc_perf_13.txt |   5 +
 .../no_roof/MI300A_A1/perfmon/pmc_perf_14.txt |   5 +
 .../no_roof/MI300A_A1/perfmon/pmc_perf_15.txt |   5 +
 .../no_roof/MI300A_A1/perfmon/pmc_perf_16.txt |   5 +
 .../no_roof/MI300A_A1/perfmon/pmc_perf_17.txt |   5 +
 .../no_roof/MI300A_A1/perfmon/pmc_perf_2.txt  |   5 +
 .../no_roof/MI300A_A1/perfmon/pmc_perf_3.txt  |   5 +
 .../no_roof/MI300A_A1/perfmon/pmc_perf_4.txt  |   5 +
 .../no_roof/MI300A_A1/perfmon/pmc_perf_5.txt  |   5 +
 .../no_roof/MI300A_A1/perfmon/pmc_perf_6.txt  |   5 +
 .../no_roof/MI300A_A1/perfmon/pmc_perf_7.txt  |   5 +
 .../no_roof/MI300A_A1/perfmon/pmc_perf_8.txt  |   5 +
 .../no_roof/MI300A_A1/perfmon/pmc_perf_9.txt  |   5 +
 .../no_roof/MI300A_A1/perfmon/timestamps.txt  |   5 +
 .../workloads/no_roof/MI300A_A1/pmc_perf.csv  |   4 +
 tests/workloads/no_roof/MI300A_A1/sysinfo.csv |   2 +
 .../no_roof/MI300A_A1/timestamps.csv          |   4 +
 .../no_roof/MI300X_A1/SQ_IFETCH_LEVEL.csv     |   4 +
 .../no_roof/MI300X_A1/SQ_INST_LEVEL_LDS.csv   |   4 +
 .../no_roof/MI300X_A1/SQ_INST_LEVEL_SMEM.csv  |   4 +
 .../no_roof/MI300X_A1/SQ_INST_LEVEL_VMEM.csv  |   4 +
 .../no_roof/MI300X_A1/SQ_LEVEL_WAVES.csv      |   4 +
 tests/workloads/no_roof/MI300X_A1/log.txt     | 177 ++++++++++
 .../MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt     |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt  |   5 +
 .../MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt  |   5 +
 .../MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt      |   5 +
 .../no_roof/MI300X_A1/perfmon/pmc_perf_0.txt  |   5 +
 .../no_roof/MI300X_A1/perfmon/pmc_perf_1.txt  |   5 +
 .../no_roof/MI300X_A1/perfmon/pmc_perf_10.txt |   5 +
 .../no_roof/MI300X_A1/perfmon/pmc_perf_11.txt |   5 +
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 .../workloads/no_roof/MI300X_A1/pmc_perf.csv  |   4 +
 tests/workloads/no_roof/MI300X_A1/sysinfo.csv |   2 +
 .../no_roof/MI300X_A1/timestamps.csv          |   4 +
 .../path/MI300A_A1/SQ_IFETCH_LEVEL.csv        |   4 +
 .../path/MI300A_A1/SQ_INST_LEVEL_LDS.csv      |   4 +
 .../path/MI300A_A1/SQ_INST_LEVEL_SMEM.csv     |   4 +
 .../path/MI300A_A1/SQ_INST_LEVEL_VMEM.csv     |   4 +
 .../path/MI300A_A1/SQ_LEVEL_WAVES.csv         |   4 +
 tests/workloads/path/MI300A_A1/log.txt        | 229 ++++++++++++
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 tests/workloads/path/MI300A_A1/pmc_perf.csv   |   4 +
 tests/workloads/path/MI300A_A1/sysinfo.csv    |   2 +
 tests/workloads/path/MI300A_A1/timestamps.csv |   4 +
 .../path/MI300X_A1/SQ_IFETCH_LEVEL.csv        |   4 +
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 .../path/MI300X_A1/SQ_LEVEL_WAVES.csv         |   4 +
 tests/workloads/path/MI300X_A1/log.txt        | 149 ++++++++
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 .../MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt   |   5 +
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 tests/workloads/path/MI300X_A1/pmc_perf.csv   |   4 +
 tests/workloads/path/MI300X_A1/sysinfo.csv    |   2 +
 tests/workloads/path/MI300X_A1/timestamps.csv |   4 +
 1580 files changed, 17548 insertions(+)
 create mode 100644 tests/workloads/device_filter/MI300A_A1/SQ_IFETCH_LEVEL.csv
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 create mode 100644 tests/workloads/device_filter/MI300A_A1/log.txt
 create mode 100644 tests/workloads/device_filter/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
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 create mode 100644 tests/workloads/device_filter/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
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 create mode 100644 tests/workloads/device_inv_int/MI300A_A1/SQ_IFETCH_LEVEL.csv
 create mode 100644 tests/workloads/device_inv_int/MI300A_A1/SQ_INST_LEVEL_LDS.csv
 create mode 100644 tests/workloads/device_inv_int/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
 create mode 100644 tests/workloads/device_inv_int/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
 create mode 100644 tests/workloads/device_inv_int/MI300A_A1/SQ_LEVEL_WAVES.csv
 create mode 100644 tests/workloads/device_inv_int/MI300A_A1/log.txt
 create mode 100644 tests/workloads/device_inv_int/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
 create mode 100644 tests/workloads/device_inv_int/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
 create mode 100644 tests/workloads/device_inv_int/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
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 create mode 100644 tests/workloads/device_inv_int/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
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 create mode 100644 tests/workloads/device_inv_int/MI300X_A1/SQ_IFETCH_LEVEL.csv
 create mode 100644 tests/workloads/device_inv_int/MI300X_A1/SQ_INST_LEVEL_LDS.csv
 create mode 100644 tests/workloads/device_inv_int/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
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 create mode 100644 tests/workloads/device_inv_int/MI300X_A1/log.txt
 create mode 100644 tests/workloads/device_inv_int/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
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 create mode 100644 tests/workloads/path/MI300X_A1/perfmon/pmc_perf_13.txt
 create mode 100644 tests/workloads/path/MI300X_A1/perfmon/pmc_perf_14.txt
 create mode 100644 tests/workloads/path/MI300X_A1/perfmon/pmc_perf_15.txt
 create mode 100644 tests/workloads/path/MI300X_A1/perfmon/pmc_perf_16.txt
 create mode 100644 tests/workloads/path/MI300X_A1/perfmon/pmc_perf_17.txt
 create mode 100644 tests/workloads/path/MI300X_A1/perfmon/pmc_perf_2.txt
 create mode 100644 tests/workloads/path/MI300X_A1/perfmon/pmc_perf_3.txt
 create mode 100644 tests/workloads/path/MI300X_A1/perfmon/pmc_perf_4.txt
 create mode 100644 tests/workloads/path/MI300X_A1/perfmon/pmc_perf_5.txt
 create mode 100644 tests/workloads/path/MI300X_A1/perfmon/pmc_perf_6.txt
 create mode 100644 tests/workloads/path/MI300X_A1/perfmon/pmc_perf_7.txt
 create mode 100644 tests/workloads/path/MI300X_A1/perfmon/pmc_perf_8.txt
 create mode 100644 tests/workloads/path/MI300X_A1/perfmon/pmc_perf_9.txt
 create mode 100644 tests/workloads/path/MI300X_A1/perfmon/timestamps.txt
 create mode 100644 tests/workloads/path/MI300X_A1/pmc_perf.csv
 create mode 100644 tests/workloads/path/MI300X_A1/sysinfo.csv
 create mode 100644 tests/workloads/path/MI300X_A1/timestamps.csv

diff --git a/tests/workloads/device_filter/MI300A_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/device_filter/MI300A_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..13ff33da0f
--- /dev/null
+++ b/tests/workloads/device_filter/MI300A_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,11995,1,148337,148337,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73843971992178,73843971999909,0,218990.0,218990.0,16384.0,65536.0,28159.0,2249984.0
+1,11995,1,148337,148337,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73843972017897,73843972024226,0,194419.0,194419.0,16384.0,65536.0,13100.0,1048608.0
+2,11995,1,148337,148337,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73843972039650,73843972045859,0,166313.0,166313.0,16384.0,65536.0,13087.0,1048708.0
diff --git a/tests/workloads/device_filter/MI300A_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/device_filter/MI300A_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..e054bf484a
--- /dev/null
+++ b/tests/workloads/device_filter/MI300A_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,11995,1,148348,148348,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73843971992178,73843971999909,0,0.0,0.0,0.0
+1,11995,1,148348,148348,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73843972017897,73843972024226,0,0.0,0.0,0.0
+2,11995,1,148348,148348,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73843972039650,73843972045859,0,0.0,0.0,0.0
diff --git a/tests/workloads/device_filter/MI300A_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/device_filter/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..fb932bf36f
--- /dev/null
+++ b/tests/workloads/device_filter/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,148359,148359,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73843971992178,73843971999909,0,65536.0,359830.0,28775024.0
+1,11995,1,148359,148359,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73843972017897,73843972024226,0,65536.0,279626.0,22368848.0
+2,11995,1,148359,148359,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73843972039650,73843972045859,0,65536.0,212150.0,16965480.0
diff --git a/tests/workloads/device_filter/MI300A_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/device_filter/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..78adf86f25
--- /dev/null
+++ b/tests/workloads/device_filter/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,148370,148370,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73843971992178,73843971999909,0,32768.0,540654.0,43241432.0
+1,11995,1,148370,148370,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73843972017897,73843972024226,0,32768.0,423717.0,33892596.0
+2,11995,1,148370,148370,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73843972039650,73843972045859,0,32768.0,421757.0,33736452.0
diff --git a/tests/workloads/device_filter/MI300A_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/device_filter/MI300A_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..cc64bc31d6
--- /dev/null
+++ b/tests/workloads/device_filter/MI300A_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,11995,1,148381,148381,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73843971992178,73843971999909,0,215077.0,215077.0,120524.0,860308.0,16384.0,14073357.0,258076.0,0.0,56727488.0
+1,11995,1,148381,148381,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73843972017897,73843972024226,0,186817.0,186817.0,103332.0,747268.0,16384.0,10901162.0,200092.0,0.0,43996920.0
+2,11995,1,148381,148381,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73843972039650,73843972045859,0,183393.0,183393.0,102287.0,733572.0,16384.0,10354964.0,192829.0,0.0,41809560.0
diff --git a/tests/workloads/device_filter/MI300A_A1/log.txt b/tests/workloads/device_filter/MI300A_A1/log.txt
new file mode 100644
index 0000000000..5823741b04
--- /dev/null
+++ b/tests/workloads/device_filter/MI300A_A1/log.txt
@@ -0,0 +1,247 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/device_filter/MI300A_A1
+Target: MI300A_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: None
+Hardware Blocks: All
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+[profiling] Current input file: tests/workloads/device_filter/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH_LEVEL
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+[profiling] Current input file: tests/workloads/device_filter/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+[profiling] Current input file: tests/workloads/device_filter/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+[profiling] Current input file: tests/workloads/device_filter/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying the output vector from the GPU to the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Releasing GPU memory
+   |-> [/opt/rocm/bin/rocprofv2] Releasing CPU memory
+   |-> [/opt/rocm/bin/rocprofv2] Results File: "tests/workloads/device_filter/MI300A_A1/out/pmc_1/results_SQ_INST_LEVEL_VMEM.csv"
+   |-> [/opt/rocm/bin/rocprofv2] 
+   |-> [/opt/rocm/bin/rocprofv2] The output path for the following counters: tests/workloads/device_filter/MI300A_A1/out/pmc_1
+[profiling] Current input file: tests/workloads/device_filter/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LEVEL_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+[profiling] Current input file: tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_CVT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_WR
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_RD
+[profiling] Current input file: tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F16
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_SPI_BUSY
+[profiling] Current input file: tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+[profiling] Current input file: tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+[profiling] Current input file: tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_13.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[0]
+[profiling] Current input file: tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_14.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[1]
+[profiling] Current input file: tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_15.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[1]
+[profiling] Current input file: tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_16.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[1]
+[profiling] Current input file: tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_17.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[2]
+[profiling] Current input file: tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F64
+[profiling] Current input file: tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_GDS
+[profiling] Current input file: tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
+[profiling] Current input file: tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_SCA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_MISC
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_WR
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_RD
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_SMEM
+[profiling] Current input file: tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_THREAD_CYCLES_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ADDR_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_UNALIGNED_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_EQ_64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_64
+[profiling] Current input file: tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ITEMS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_MEM_VIOLATIONS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ATOMIC_RETURN
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_IDX_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_RESTORED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_SAVED
+[profiling] Current input file: tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F64
+[profiling] Current input file: tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_INST_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_READ_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_WRITE_REQ
+[profiling] Current input file: tests/workloads/device_filter/MI300A_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/device_filter/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/device_filter/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..293092f641
--- /dev/null
+++ b/tests/workloads/device_filter/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/device_filter/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..08439eedce
--- /dev/null
+++ b/tests/workloads/device_filter/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/device_filter/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..6cca322d4e
--- /dev/null
+++ b/tests/workloads/device_filter/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/device_filter/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..e527ad31ba
--- /dev/null
+++ b/tests/workloads/device_filter/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/device_filter/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..3f8e04adb3
--- /dev/null
+++ b/tests/workloads/device_filter/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_0.txt b/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..ebc550fbfe
--- /dev/null
+++ b/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD GRBM_COUNT GRBM_GUI_ACTIVE TCP_GATE_EN1_sum TCP_GATE_EN2_sum TCP_TD_TCP_STALL_CYCLES_sum TCP_TCR_TCP_STALL_CYCLES_sum TA_TA_BUSY_sum TA_BUFFER_WAVEFRONTS_sum TD_TD_BUSY_sum TD_TC_STALL_sum SPI_CSN_WINDOW_VALID SPI_CSN_BUSY CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE CPF_CPF_STAT_BUSY CPF_CPF_STAT_STALL TCC_CYCLE_sum TCC_BUSY_sum TCC_PROBE_sum TCC_PROBE_ALL_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_1.txt b/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..9ad887ddbb
--- /dev/null
+++ b/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 GRBM_SPI_BUSY TCP_READ_TAGCONFLICT_STALL_CYCLES_sum TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum TCP_TA_TCP_STATE_READ_sum TA_BUFFER_READ_WAVEFRONTS_sum TA_BUFFER_WRITE_WAVEFRONTS_sum TD_SPI_STALL_sum TD_LOAD_WAVEFRONT_sum SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE CPC_CPC_TCIU_BUSY CPC_CPC_TCIU_IDLE CPF_CPF_TCIU_BUSY CPF_CPF_TCIU_STALL TCC_NC_REQ_sum TCC_UC_REQ_sum TCC_CC_REQ_sum TCC_RW_REQ_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_10.txt b/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..21c59688f7
--- /dev/null
+++ b/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_11.txt b/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..df6d67d7b7
--- /dev/null
+++ b/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_12.txt b/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..6e5320c11c
--- /dev/null
+++ b/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_13.txt b/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_13.txt
new file mode 100644
index 0000000000..d95492c1cd
--- /dev/null
+++ b/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_13.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_ATOMIC[0] TCC_BUBBLE[0] TCC_CYCLE[0] TCC_EA0_ATOMIC[0] TCC_ATOMIC[1] TCC_BUBBLE[1] TCC_CYCLE[1] TCC_EA0_ATOMIC[1] TCC_ATOMIC[2] TCC_BUBBLE[2] TCC_CYCLE[2] TCC_EA0_ATOMIC[2] TCC_ATOMIC[3] TCC_BUBBLE[3] TCC_CYCLE[3] TCC_EA0_ATOMIC[3] TCC_ATOMIC[4] TCC_BUBBLE[4] TCC_CYCLE[4] TCC_EA0_ATOMIC[4] TCC_ATOMIC[5] TCC_BUBBLE[5] TCC_CYCLE[5] TCC_EA0_ATOMIC[5] TCC_ATOMIC[6] TCC_BUBBLE[6] TCC_CYCLE[6] TCC_EA0_ATOMIC[6] TCC_ATOMIC[7] TCC_BUBBLE[7] TCC_CYCLE[7] TCC_EA0_ATOMIC[7] TCC_ATOMIC[8] TCC_BUBBLE[8] TCC_CYCLE[8] TCC_EA0_ATOMIC[8] TCC_ATOMIC[9] TCC_BUBBLE[9] TCC_CYCLE[9] TCC_EA0_ATOMIC[9] TCC_ATOMIC[10] TCC_BUBBLE[10] TCC_CYCLE[10] TCC_EA0_ATOMIC[10] TCC_ATOMIC[11] TCC_BUBBLE[11] TCC_CYCLE[11] TCC_EA0_ATOMIC[11] TCC_ATOMIC[12] TCC_BUBBLE[12] TCC_CYCLE[12] TCC_EA0_ATOMIC[12] TCC_ATOMIC[13] TCC_BUBBLE[13] TCC_CYCLE[13] TCC_EA0_ATOMIC[13] TCC_ATOMIC[14] TCC_BUBBLE[14] TCC_CYCLE[14] TCC_EA0_ATOMIC[14] TCC_ATOMIC[15] TCC_BUBBLE[15] TCC_CYCLE[15] TCC_EA0_ATOMIC[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_14.txt b/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_14.txt
new file mode 100644
index 0000000000..28327b86d3
--- /dev/null
+++ b/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_14.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_ATOMIC_LEVEL[0] TCC_EA0_RDREQ[0] TCC_EA0_RDREQ_32B[0] TCC_EA0_RDREQ_LEVEL[0] TCC_EA0_ATOMIC_LEVEL[1] TCC_EA0_RDREQ[1] TCC_EA0_RDREQ_32B[1] TCC_EA0_RDREQ_LEVEL[1] TCC_EA0_ATOMIC_LEVEL[2] TCC_EA0_RDREQ[2] TCC_EA0_RDREQ_32B[2] TCC_EA0_RDREQ_LEVEL[2] TCC_EA0_ATOMIC_LEVEL[3] TCC_EA0_RDREQ[3] TCC_EA0_RDREQ_32B[3] TCC_EA0_RDREQ_LEVEL[3] TCC_EA0_ATOMIC_LEVEL[4] TCC_EA0_RDREQ[4] TCC_EA0_RDREQ_32B[4] TCC_EA0_RDREQ_LEVEL[4] TCC_EA0_ATOMIC_LEVEL[5] TCC_EA0_RDREQ[5] TCC_EA0_RDREQ_32B[5] TCC_EA0_RDREQ_LEVEL[5] TCC_EA0_ATOMIC_LEVEL[6] TCC_EA0_RDREQ[6] TCC_EA0_RDREQ_32B[6] TCC_EA0_RDREQ_LEVEL[6] TCC_EA0_ATOMIC_LEVEL[7] TCC_EA0_RDREQ[7] TCC_EA0_RDREQ_32B[7] TCC_EA0_RDREQ_LEVEL[7] TCC_EA0_ATOMIC_LEVEL[8] TCC_EA0_RDREQ[8] TCC_EA0_RDREQ_32B[8] TCC_EA0_RDREQ_LEVEL[8] TCC_EA0_ATOMIC_LEVEL[9] TCC_EA0_RDREQ[9] TCC_EA0_RDREQ_32B[9] TCC_EA0_RDREQ_LEVEL[9] TCC_EA0_ATOMIC_LEVEL[10] TCC_EA0_RDREQ[10] TCC_EA0_RDREQ_32B[10] TCC_EA0_RDREQ_LEVEL[10] TCC_EA0_ATOMIC_LEVEL[11] TCC_EA0_RDREQ[11] TCC_EA0_RDREQ_32B[11] TCC_EA0_RDREQ_LEVEL[11] TCC_EA0_ATOMIC_LEVEL[12] TCC_EA0_RDREQ[12] TCC_EA0_RDREQ_32B[12] TCC_EA0_RDREQ_LEVEL[12] TCC_EA0_ATOMIC_LEVEL[13] TCC_EA0_RDREQ[13] TCC_EA0_RDREQ_32B[13] TCC_EA0_RDREQ_LEVEL[13] TCC_EA0_ATOMIC_LEVEL[14] TCC_EA0_RDREQ[14] TCC_EA0_RDREQ_32B[14] TCC_EA0_RDREQ_LEVEL[14] TCC_EA0_ATOMIC_LEVEL[15] TCC_EA0_RDREQ[15] TCC_EA0_RDREQ_32B[15] TCC_EA0_RDREQ_LEVEL[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_15.txt b/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_15.txt
new file mode 100644
index 0000000000..033ae877ed
--- /dev/null
+++ b/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_15.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_WRREQ[0] TCC_EA0_WRREQ_64B[0] TCC_EA0_WRREQ_LEVEL[0] TCC_HIT[0] TCC_EA0_WRREQ[1] TCC_EA0_WRREQ_64B[1] TCC_EA0_WRREQ_LEVEL[1] TCC_HIT[1] TCC_EA0_WRREQ[2] TCC_EA0_WRREQ_64B[2] TCC_EA0_WRREQ_LEVEL[2] TCC_HIT[2] TCC_EA0_WRREQ[3] TCC_EA0_WRREQ_64B[3] TCC_EA0_WRREQ_LEVEL[3] TCC_HIT[3] TCC_EA0_WRREQ[4] TCC_EA0_WRREQ_64B[4] TCC_EA0_WRREQ_LEVEL[4] TCC_HIT[4] TCC_EA0_WRREQ[5] TCC_EA0_WRREQ_64B[5] TCC_EA0_WRREQ_LEVEL[5] TCC_HIT[5] TCC_EA0_WRREQ[6] TCC_EA0_WRREQ_64B[6] TCC_EA0_WRREQ_LEVEL[6] TCC_HIT[6] TCC_EA0_WRREQ[7] TCC_EA0_WRREQ_64B[7] TCC_EA0_WRREQ_LEVEL[7] TCC_HIT[7] TCC_EA0_WRREQ[8] TCC_EA0_WRREQ_64B[8] TCC_EA0_WRREQ_LEVEL[8] TCC_HIT[8] TCC_EA0_WRREQ[9] TCC_EA0_WRREQ_64B[9] TCC_EA0_WRREQ_LEVEL[9] TCC_HIT[9] TCC_EA0_WRREQ[10] TCC_EA0_WRREQ_64B[10] TCC_EA0_WRREQ_LEVEL[10] TCC_HIT[10] TCC_EA0_WRREQ[11] TCC_EA0_WRREQ_64B[11] TCC_EA0_WRREQ_LEVEL[11] TCC_HIT[11] TCC_EA0_WRREQ[12] TCC_EA0_WRREQ_64B[12] TCC_EA0_WRREQ_LEVEL[12] TCC_HIT[12] TCC_EA0_WRREQ[13] TCC_EA0_WRREQ_64B[13] TCC_EA0_WRREQ_LEVEL[13] TCC_HIT[13] TCC_EA0_WRREQ[14] TCC_EA0_WRREQ_64B[14] TCC_EA0_WRREQ_LEVEL[14] TCC_HIT[14] TCC_EA0_WRREQ[15] TCC_EA0_WRREQ_64B[15] TCC_EA0_WRREQ_LEVEL[15] TCC_HIT[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_16.txt b/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_16.txt
new file mode 100644
index 0000000000..123269c3f9
--- /dev/null
+++ b/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_16.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_MISS[0] TCC_READ[0] TCC_REQ[0] TCC_RW_REQ[0] TCC_MISS[1] TCC_READ[1] TCC_REQ[1] TCC_RW_REQ[1] TCC_MISS[2] TCC_READ[2] TCC_REQ[2] TCC_RW_REQ[2] TCC_MISS[3] TCC_READ[3] TCC_REQ[3] TCC_RW_REQ[3] TCC_MISS[4] TCC_READ[4] TCC_REQ[4] TCC_RW_REQ[4] TCC_MISS[5] TCC_READ[5] TCC_REQ[5] TCC_RW_REQ[5] TCC_MISS[6] TCC_READ[6] TCC_REQ[6] TCC_RW_REQ[6] TCC_MISS[7] TCC_READ[7] TCC_REQ[7] TCC_RW_REQ[7] TCC_MISS[8] TCC_READ[8] TCC_REQ[8] TCC_RW_REQ[8] TCC_MISS[9] TCC_READ[9] TCC_REQ[9] TCC_RW_REQ[9] TCC_MISS[10] TCC_READ[10] TCC_REQ[10] TCC_RW_REQ[10] TCC_MISS[11] TCC_READ[11] TCC_REQ[11] TCC_RW_REQ[11] TCC_MISS[12] TCC_READ[12] TCC_REQ[12] TCC_RW_REQ[12] TCC_MISS[13] TCC_READ[13] TCC_REQ[13] TCC_RW_REQ[13] TCC_MISS[14] TCC_READ[14] TCC_REQ[14] TCC_RW_REQ[14] TCC_MISS[15] TCC_READ[15] TCC_REQ[15] TCC_RW_REQ[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_17.txt b/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_17.txt
new file mode 100644
index 0000000000..102fb795bd
--- /dev/null
+++ b/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_17.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_TAG_STALL[0] TCC_TOO_MANY_EA_WRREQS_STALL[0] TCC_WRITE[0] TCC_TAG_STALL[1] TCC_TOO_MANY_EA_WRREQS_STALL[1] TCC_WRITE[1] TCC_TAG_STALL[2] TCC_TOO_MANY_EA_WRREQS_STALL[2] TCC_WRITE[2] TCC_TAG_STALL[3] TCC_TOO_MANY_EA_WRREQS_STALL[3] TCC_WRITE[3] TCC_TAG_STALL[4] TCC_TOO_MANY_EA_WRREQS_STALL[4] TCC_WRITE[4] TCC_TAG_STALL[5] TCC_TOO_MANY_EA_WRREQS_STALL[5] TCC_WRITE[5] TCC_TAG_STALL[6] TCC_TOO_MANY_EA_WRREQS_STALL[6] TCC_WRITE[6] TCC_TAG_STALL[7] TCC_TOO_MANY_EA_WRREQS_STALL[7] TCC_WRITE[7] TCC_TAG_STALL[8] TCC_TOO_MANY_EA_WRREQS_STALL[8] TCC_WRITE[8] TCC_TAG_STALL[9] TCC_TOO_MANY_EA_WRREQS_STALL[9] TCC_WRITE[9] TCC_TAG_STALL[10] TCC_TOO_MANY_EA_WRREQS_STALL[10] TCC_WRITE[10] TCC_TAG_STALL[11] TCC_TOO_MANY_EA_WRREQS_STALL[11] TCC_WRITE[11] TCC_TAG_STALL[12] TCC_TOO_MANY_EA_WRREQS_STALL[12] TCC_WRITE[12] TCC_TAG_STALL[13] TCC_TOO_MANY_EA_WRREQS_STALL[13] TCC_WRITE[13] TCC_TAG_STALL[14] TCC_TOO_MANY_EA_WRREQS_STALL[14] TCC_WRITE[14] TCC_TAG_STALL[15] TCC_TOO_MANY_EA_WRREQS_STALL[15] TCC_WRITE[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_2.txt b/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..8ff8201c5a
--- /dev/null
+++ b/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 TCP_VOLATILE_sum TCP_TOTAL_ACCESSES_sum TCP_TOTAL_READ_sum TCP_TOTAL_WRITE_sum TA_BUFFER_ATOMIC_WAVEFRONTS_sum TA_BUFFER_TOTAL_CYCLES_sum TD_ATOMIC_WAVEFRONT_sum TD_STORE_WAVEFRONT_sum SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION CPF_CPF_STAT_IDLE CPF_CPF_TCIU_IDLE TCC_REQ_sum TCC_STREAMING_REQ_sum TCC_HIT_sum TCC_MISS_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_3.txt b/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..cb10e4801d
--- /dev/null
+++ b/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS TCP_TOTAL_ATOMIC_WITH_RET_sum TCP_TOTAL_ATOMIC_WITHOUT_RET_sum TCP_TOTAL_WRITEBACK_INVALIDATES_sum TCP_TOTAL_CACHE_ACCESSES_sum TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES_sum TD_COALESCABLE_WAVEFRONT_sum SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE CPF_CMP_UTCL1_STALL_ON_TRANSLATION TCC_READ_sum TCC_WRITE_sum TCC_ATOMIC_sum TCC_WRITEBACK_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_4.txt b/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..e4e6069e38
--- /dev/null
+++ b/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAIT_ANY SQ_WAIT_INST_ANY SQ_ACTIVE_INST_ANY SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU TCP_UTCL1_TRANSLATION_MISS_sum TCP_UTCL1_TRANSLATION_HIT_sum TCP_UTCL1_PERMISSION_MISS_sum TCP_UTCL1_REQUEST_sum TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_TOTAL_WAVEFRONTS_sum SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE TCC_EA0_WRREQ_sum TCC_EA0_WRREQ_64B_sum TCC_EA0_WR_UNCACHED_32B_sum TCC_EA0_WRREQ_DRAM_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_5.txt b/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..77bd288232
--- /dev/null
+++ b/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_SCA SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU TCP_TCC_READ_REQ_sum TCP_TCC_WRITE_REQ_sum TCP_TCC_ATOMIC_WITH_RET_REQ_sum TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN CPC_ME1_DC0_SPI_BUSY TCC_EA0_RDREQ_sum TCC_EA0_RDREQ_32B_sum TCC_BUBBLE_sum TCC_EA0_RD_UNCACHED_32B_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_6.txt b/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..609c184df8
--- /dev/null
+++ b/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_THREAD_CYCLES_VALU SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 TCP_TCC_NC_READ_REQ_sum TCP_TCC_NC_WRITE_REQ_sum TCP_TCC_NC_ATOMIC_REQ_sum TCP_TCC_UC_READ_REQ_sum TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN TCC_EA0_RDREQ_DRAM_sum TCC_TAG_STALL_sum TCC_NORMAL_WRITEBACK_sum TCC_ALL_TC_OP_WB_WRITEBACK_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_7.txt b/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..5881e5fb8f
--- /dev/null
+++ b/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED TCP_TCC_UC_WRITE_REQ_sum TCP_TCC_UC_ATOMIC_REQ_sum TCP_TCC_CC_READ_REQ_sum TCP_TCC_CC_WRITE_REQ_sum TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR TCC_NORMAL_EVICT_sum TCC_ALL_TC_OP_INV_EVICT_sum TCC_TOO_MANY_EA_WRREQS_STALL_sum TCC_EA0_ATOMIC_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_8.txt b/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..66317384f5
--- /dev/null
+++ b/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES TCP_TCC_CC_ATOMIC_REQ_sum TCP_TCC_RW_READ_REQ_sum TCP_TCC_RW_WRITE_REQ_sum TCP_TCC_RW_ATOMIC_REQ_sum SPI_VWC_CSC_WR SPI_RA_BULKY_CU_FULL_CSN TCC_EA0_RDREQ_LEVEL_sum TCC_EA0_WRREQ_LEVEL_sum TCC_EA0_ATOMIC_LEVEL_sum TCC_EA0_WRREQ_STALL_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_9.txt b/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..60ceab315a
--- /dev/null
+++ b/tests/workloads/device_filter/MI300A_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ TCP_PENDING_STALL_CYCLES_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300A_A1/perfmon/timestamps.txt b/tests/workloads/device_filter/MI300A_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..676cca1b80
--- /dev/null
+++ b/tests/workloads/device_filter/MI300A_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300A_A1/pmc_perf.csv b/tests/workloads/device_filter/MI300A_A1/pmc_perf.csv
new file mode 100644
index 0000000000..64174b4b87
--- /dev/null
+++ b/tests/workloads/device_filter/MI300A_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SQ_INSTS_BRANCH,SQ_INSTS_SENDMSG,SQ_WAIT_ANY,SQ_WAIT_INST_ANY,SQ_ACTIVE_INST_ANY,SQ_ACTIVE_INST_VMEM,SQ_ACTIVE_INST_LDS,SQ_ACTIVE_INST_VALU,SPI_RA_WAVE_SIMD_FULL_CSN,SPI_RA_VGPR_SIMD_FULL_CSN,CPC_CPC_UTCL2IU_STALL,CPC_ME1_BUSY_FOR_PACKET_DECODE,TA_ADDR_STALLED_BY_TC_CYCLES_sum,TA_TOTAL_WAVEFRONTS_sum,TCC_EA0_WRREQ_64B_sum,TCC_EA0_WRREQ_DRAM_sum,TCC_EA0_WRREQ_sum,TCC_EA0_WR_UNCACHED_32B_sum,TCP_UTCL1_PERMISSION_MISS_sum,TCP_UTCL1_REQUEST_sum,TCP_UTCL1_TRANSLATION_HIT_sum,TCP_UTCL1_TRANSLATION_MISS_sum,Wave_Size_1,Correlation_ID_1,XCC_Index,TCC_EA0_WRREQ[0],TCC_EA0_WRREQ_64B[0],TCC_EA0_WRREQ_LEVEL[0],TCC_HIT[0],TCC_EA0_WRREQ[1],TCC_EA0_WRREQ_64B[1],TCC_EA0_WRREQ_LEVEL[1],TCC_HIT[1],TCC_EA0_WRREQ[2],TCC_EA0_WRREQ_64B[2],TCC_EA0_WRREQ_LEVEL[2],TCC_HIT[2],TCC_EA0_WRREQ[3],TCC_EA0_WRREQ_64B[3],TCC_EA0_WRREQ_LEVEL[3],TCC_HIT[3],TCC_EA0_WRREQ[4],TCC_EA0_WRREQ_64B[4],TCC_EA0_WRREQ_LEVEL[4],TCC_HIT[4],TCC_EA0_WRREQ[5],TCC_EA0_WRREQ_64B[5],TCC_EA0_WRREQ_LEVEL[5],TCC_HIT[5],TCC_EA0_WRREQ[6],TCC_EA0_WRREQ_64B[6],TCC_EA0_WRREQ_LEVEL[6],TCC_HIT[6],TCC_EA0_WRREQ[7],TCC_EA0_WRREQ_64B[7],TCC_EA0_WRREQ_LEVEL[7],TCC_HIT[7],TCC_EA0_WRREQ[8],TCC_EA0_WRREQ_64B[8],TCC_EA0_WRREQ_LEVEL[8],TCC_HIT[8],TCC_EA0_WRREQ[9],TCC_EA0_WRREQ_64B[9],TCC_EA0_WRREQ_LEVEL[9],TCC_HIT[9],TCC_EA0_WRREQ[10],TCC_EA0_WRREQ_64B[10],TCC_EA0_WRREQ_LEVEL[10],TCC_HIT[10],TCC_EA0_WRREQ[11],TCC_EA0_WRREQ_64B[11],TCC_EA0_WRREQ_LEVEL[11],TCC_HIT[11],TCC_EA0_WRREQ[12],TCC_EA0_WRREQ_64B[12],TCC_EA0_WRREQ_LEVEL[12],TCC_HIT[12],TCC_EA0_WRREQ[13],TCC_EA0_WRREQ_64B[13],TCC_EA0_WRREQ_LEVEL[13],TCC_HIT[13],TCC_EA0_WRREQ[14],TCC_EA0_WRREQ_64B[14],TCC_EA0_WRREQ_LEVEL[14],TCC_HIT[14],TCC_EA0_WRREQ[15],TCC_EA0_WRREQ_64B[15],TCC_EA0_WRREQ_LEVEL[15],TCC_HIT[15],TCC_EA0_WRREQ[16],TCC_EA0_WRREQ_64B[16],TCC_EA0_WRREQ_LEVEL[16],TCC_HIT[16],TCC_EA0_WRREQ[17],TCC_EA0_WRREQ_64B[17],TCC_EA0_WRREQ_LEVEL[17],TCC_HIT[17],TCC_EA0_WRREQ[18],TCC_EA0_WRREQ_64B[18],TCC_EA0_WRREQ_LEVEL[18],TCC_HIT[18],TCC_EA0_WRREQ[19],TCC_EA0_WRREQ_64B[19],TCC_EA0_WRREQ_LEVEL[19],TCC_HIT[19],TCC_EA0_WRREQ[20],TCC_EA0_WRREQ_64B[20],TCC_EA0_WRREQ_LEVEL[20],TCC_HIT[20],TCC_EA0_WRREQ[21],TCC_EA0_WRREQ_64B[21],TCC_EA0_WRREQ_LEVEL[21],TCC_HIT[21],TCC_EA0_WRREQ[22],TCC_EA0_WRREQ_64B[22],TCC_EA0_WRREQ_LEVEL[22],TCC_HIT[22],TCC_EA0_WRREQ[23],TCC_EA0_WRREQ_64B[23],TCC_EA0_WRREQ_LEVEL[23],TCC_HIT[23],TCC_EA0_WRREQ[24],TCC_EA0_WRREQ_64B[24],TCC_EA0_WRREQ_LEVEL[24],TCC_HIT[24],TCC_EA0_WRREQ[25],TCC_EA0_WRREQ_64B[25],TCC_EA0_WRREQ_LEVEL[25],TCC_HIT[25],TCC_EA0_WRREQ[26],TCC_EA0_WRREQ_64B[26],TCC_EA0_WRREQ_LEVEL[26],TCC_HIT[26],TCC_EA0_WRREQ[27],TCC_EA0_WRREQ_64B[27],TCC_EA0_WRREQ_LEVEL[27],TCC_HIT[27],TCC_EA0_WRREQ[28],TCC_EA0_WRREQ_64B[28],TCC_EA0_WRREQ_LEVEL[28],TCC_HIT[28],TCC_EA0_WRREQ[29],TCC_EA0_WRREQ_64B[29],TCC_EA0_WRREQ_LEVEL[29],TCC_HIT[29],TCC_EA0_WRREQ[30],TCC_EA0_WRREQ_64B[30],TCC_EA0_WRREQ_LEVEL[30],TCC_HIT[30],TCC_EA0_WRREQ[31],TCC_EA0_WRREQ_64B[31],TCC_EA0_WRREQ_LEVEL[31],TCC_HIT[31],TCC_EA0_WRREQ[32],TCC_EA0_WRREQ_64B[32],TCC_EA0_WRREQ_LEVEL[32],TCC_HIT[32],TCC_EA0_WRREQ[33],TCC_EA0_WRREQ_64B[33],TCC_EA0_WRREQ_LEVEL[33],TCC_HIT[33],TCC_EA0_WRREQ[34],TCC_EA0_WRREQ_64B[34],TCC_EA0_WRREQ_LEVEL[34],TCC_HIT[34],TCC_EA0_WRREQ[35],TCC_EA0_WRREQ_64B[35],TCC_EA0_WRREQ_LEVEL[35],TCC_HIT[35],TCC_EA0_WRREQ[36],TCC_EA0_WRREQ_64B[36],TCC_EA0_WRREQ_LEVEL[36],TCC_HIT[36],TCC_EA0_WRREQ[37],TCC_EA0_WRREQ_64B[37],TCC_EA0_WRREQ_LEVEL[37],TCC_HIT[37],TCC_EA0_WRREQ[38],TCC_EA0_WRREQ_64B[38],TCC_EA0_WRREQ_LEVEL[38],TCC_HIT[38],TCC_EA0_WRREQ[39],TCC_EA0_WRREQ_64B[39],TCC_EA0_WRREQ_LEVEL[39],TCC_HIT[39],TCC_EA0_WRREQ[40],TCC_EA0_WRREQ_64B[40],TCC_EA0_WRREQ_LEVEL[40],TCC_HIT[40],TCC_EA0_WRREQ[41],TCC_EA0_WRREQ_64B[41],TCC_EA0_WRREQ_LEVEL[41],TCC_HIT[41],TCC_EA0_WRREQ[42],TCC_EA0_WRREQ_64B[42],TCC_EA0_WRREQ_LEVEL[42],TCC_HIT[42],TCC_EA0_WRREQ[43],TCC_EA0_WRREQ_64B[43],TCC_EA0_WRREQ_LEVEL[43],TCC_HIT[43],TCC_EA0_WRREQ[44],TCC_EA0_WRREQ_64B[44],TCC_EA0_WRREQ_LEVEL[44],TCC_HIT[44],TCC_EA0_WRREQ[45],TCC_EA0_WRREQ_64B[45],TCC_EA0_WRREQ_LEVEL[45],TCC_HIT[45],TCC_EA0_WRREQ[46],TCC_EA0_WRREQ_64B[46],TCC_EA0_WRREQ_LEVEL[46],TCC_HIT[46],TCC_EA0_WRREQ[47],TCC_EA0_WRREQ_64B[47],TCC_EA0_WRREQ_LEVEL[47],TCC_HIT[47],TCC_EA0_WRREQ[48],TCC_EA0_WRREQ_64B[48],TCC_EA0_WRREQ_LEVEL[48],TCC_HIT[48],TCC_EA0_WRREQ[49],TCC_EA0_WRREQ_64B[49],TCC_EA0_WRREQ_LEVEL[49],TCC_HIT[49],TCC_EA0_WRREQ[50],TCC_EA0_WRREQ_64B[50],TCC_EA0_WRREQ_LEVEL[50],TCC_HIT[50],TCC_EA0_WRREQ[51],TCC_EA0_WRREQ_64B[51],TCC_EA0_WRREQ_LEVEL[51],TCC_HIT[51],TCC_EA0_WRREQ[52],TCC_EA0_WRREQ_64B[52],TCC_EA0_WRREQ_LEVEL[52],TCC_HIT[52],TCC_EA0_WRREQ[53],TCC_EA0_WRREQ_64B[53],TCC_EA0_WRREQ_LEVEL[53],TCC_HIT[53],TCC_EA0_WRREQ[54],TCC_EA0_WRREQ_64B[54],TCC_EA0_WRREQ_LEVEL[54],TCC_HIT[54],TCC_EA0_WRREQ[55],TCC_EA0_WRREQ_64B[55],TCC_EA0_WRREQ_LEVEL[55],TCC_HIT[55],TCC_EA0_WRREQ[56],TCC_EA0_WRREQ_64B[56],TCC_EA0_WRREQ_LEVEL[56],TCC_HIT[56],TCC_EA0_WRREQ[57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CED_WRITE_CYCLES_sum,TCC_ATOMIC_sum,TCC_READ_sum,TCC_WRITEBACK_sum,TCC_WRITE_sum,TCP_TOTAL_ATOMIC_WITHOUT_RET_sum,TCP_TOTAL_ATOMIC_WITH_RET_sum,TCP_TOTAL_CACHE_ACCESSES_sum,TCP_TOTAL_WRITEBACK_INVALIDATES_sum,TD_COALESCABLE_WAVEFRONT_sum,Wave_Size_5,Correlation_ID_5,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,TA_FLAT_ATOMIC_WAVEFRONTS_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,TCC_ALL_TC_OP_INV_EVICT_sum,TCC_EA0_ATOMIC_sum,TCC_NORMAL_EVICT_sum,TCC_TOO_MANY_EA_WRREQS_STALL_sum,TCP_TCC_CC_READ_REQ_sum,TCP_TCC_CC_WRITE_REQ_sum,TCP_TCC_UC_ATOMIC_REQ_sum,TCP_TCC_UC_WRITE_REQ_sum,Wave_Size_6,Correlation_ID_6,XCC_Index_6,TCC_MISS[0],TCC_READ[0],TCC_REQ[0],TCC_RW_REQ[0],TCC_MISS[1],TCC_READ[1],TCC_REQ[1],TCC_RW_REQ[1],TCC_MISS[2],TCC_READ[2],TCC_REQ[2],TCC_RW_REQ[2],TCC_MISS[3],TCC_READ[3],TCC_REQ[3],TCC_RW_REQ[3],TCC_MISS[4],TCC_READ[4],TCC_REQ[4],TCC_RW_REQ[4],TCC_MISS[5],TCC_READ[5],TCC_REQ[5],TCC_RW_REQ[5],TCC_MISS[6],TCC_READ[6],TCC_REQ[6],TCC_RW_REQ[6],TCC_MISS[7],TCC_READ[7],TCC_REQ[7],TCC_RW_REQ[7],TCC_MISS[8],TCC_READ[8],TCC_REQ[8],TCC_RW_REQ[8],TCC_MISS[9],TCC_READ[9],TCC_REQ[9],TCC_RW_REQ[9],TCC_MISS[10],TCC_READ[10],TCC_REQ[10],TCC_RW_REQ[10],TCC_MISS[11],TCC_READ[11],TCC_REQ[11],TCC_RW_REQ[11],TCC_MISS[12],TCC_READ[12],TCC_REQ[12],TCC_RW_REQ[12],TCC_MISS[13],TCC_READ[13],TCC_REQ[13],TCC_RW_REQ[13],TCC_MISS[14],TCC_READ[14],TCC_REQ[14],TCC_RW_REQ[14],TCC_MISS[15],TCC_READ[15],TCC_REQ[15],TCC_RW_REQ[15],TCC_MISS[16],TCC_READ[16],TCC_REQ[16],TCC_RW_REQ[16],TCC_MISS[17],TCC_READ[17],TCC_REQ[17],TCC_RW_REQ[17],TCC_MISS[18],TCC_READ[18],TCC_REQ[18],TCC_RW_REQ[18],TCC_MISS[19],TCC_READ[19],TCC_REQ[19],TCC_RW_REQ[19],TCC_MISS[20],TCC_READ[20],TCC_REQ[20],TCC_RW_REQ[20],TCC_MISS[21],TCC_READ[21],TCC_REQ[21],TCC_RW_REQ[21],TCC_MISS[22],TCC_READ[22],TCC_REQ[22],TCC_RW_REQ[22],TCC_MISS[23],TCC_READ[23],TCC_REQ[23],TCC_RW_REQ[23],TCC_MISS[24],TCC_READ[24],TCC_REQ[24],TCC_RW_REQ[24],TCC_MISS[25],TCC_READ[25],TCC_REQ[25],TCC_RW_REQ[25],TCC_MISS[26],TCC_READ[26],TCC_REQ[26],TCC_RW_REQ[26],TCC_MISS[27],TCC_READ[27],TCC_REQ[27],TCC_RW_REQ[27],TCC_MISS[28],TCC_READ[28],TCC_REQ[28],TCC_RW_REQ[28],TCC_MISS[29],TCC_READ[29],TCC_REQ[29],TCC_RW_REQ[29],TCC_MISS[30],TCC_READ[30],TCC_REQ[30],TCC_RW_REQ[30],TCC_MISS[31],TCC_READ[31],TCC_REQ[31],TCC_RW_REQ[31],TCC_MISS[32],TCC_READ[32],TCC_REQ[32],TCC_RW_REQ[32],TCC_MISS[33],TCC_READ[33],TCC_REQ[33],TCC_RW_REQ[33],TCC_MISS[34],TCC_READ[34],TCC_REQ[34],TCC_RW_REQ[34],TCC_MISS[35],TCC_READ[35],TCC_REQ[35],TCC_RW_REQ[35],TCC_MISS[36],TCC_READ[36],TCC_REQ[36],TCC_RW_REQ[36],TCC_MISS[37],TCC_READ[37],TCC_REQ[37],TCC_RW_REQ[37],TCC_MISS[38],TCC_READ[38],TCC_REQ[38],TCC_RW_REQ[38],TCC_MISS[39],TCC_READ[39],TCC_REQ[39],TCC_RW_REQ[39],TCC_MISS[40],TCC_READ[40],TCC_REQ[40],TCC_RW_REQ[40],TCC_MISS[41],TCC_READ[41],TCC_REQ[41],TCC_RW_REQ[41],TCC_MISS[42],TCC_READ[42],TCC_REQ[42],TCC_RW_REQ[42],TCC_MISS[43],TCC_READ[43],TCC_REQ[43],TCC_RW_REQ[43],TCC_MISS[44],TCC_READ[44],TCC_REQ[44],TCC_RW_REQ[44],TCC_MISS[45],TCC_READ[45],TCC_REQ[45],TCC_RW_REQ[45],TCC_MISS[46],TCC_READ[46],TCC_REQ[46],TCC_RW_REQ[46],TCC_MISS[47],TCC_READ[47],TCC_REQ[47],TCC_RW_REQ[47],TCC_MISS[48],TCC_READ[48],TCC_REQ[48],TCC_RW_REQ[48],TCC_MISS[49],TCC_READ[49],TCC_REQ[49],TCC_RW_REQ[49],TCC_MISS[50],TCC_READ[50],TCC_REQ[50],TCC_RW_REQ[50],TCC_MISS[51],TCC_READ[51],TCC_REQ[51],TCC_RW_REQ[51],TCC_MISS[52],TCC_READ[52],TCC_REQ[52],TCC_RW_REQ[52],TCC_MISS[53],TCC_READ[53],TCC_REQ[53],TCC_RW_REQ[53],TCC_MISS[54],TCC_READ[54],TCC_REQ[54],TCC_RW_REQ[54],TCC_MISS[55],TCC_READ[55],TCC_REQ[55],TCC_RW_REQ[55],TCC_MISS[56],TCC_READ[56],TCC_REQ[56],TCC_RW_REQ[56],TCC_MISS[57],TCC_READ[57],TCC_REQ[57],TCC_RW_REQ[57],TCC_MISS[58],TCC_READ[58],TCC_REQ[58],TCC_RW_REQ[58],TCC_MISS[59],TCC_READ[59],TCC_REQ[59],TCC_RW_REQ[59],TCC_MISS[60],TCC_READ[60],TCC_REQ[60],TCC_RW_REQ[60],TCC_MISS[61],TCC_READ[61],TCC_REQ[61],TCC_RW_REQ[61],TCC_MISS[62],TCC_READ[62],TCC_REQ[62],TCC_RW_REQ[62],TCC_MISS[63],TCC_READ[63],TCC_REQ[63],TCC_RW_REQ[63],TCC_MISS[64],TCC_READ[64],TCC_REQ[64],TCC_RW_REQ[64],TCC_MISS[65],TCC_READ[65],TCC_REQ[65],TCC_RW_REQ[65],TCC_MISS[66],TCC_READ[66],TCC_REQ[66],TCC_RW_REQ[66],TCC_MISS[67],TCC_READ[67],TCC_REQ[67],TCC_RW_REQ[67],TCC_MISS[68],TCC_READ[68],TCC_REQ[68],TCC_RW_REQ[68],TCC_MISS[69],TCC_READ[69],TCC_REQ[69],TCC_RW_REQ[69],TCC_MISS[70],TCC_READ[70],TCC_REQ[70],TCC_RW_REQ[70],TCC_MISS[71],TCC_READ[71],TCC_REQ[71],TCC_RW_REQ[71],TCC_MISS[72],TCC_READ[72],TCC_REQ[72],TCC_RW_REQ[72],TCC_MISS[73],TCC_READ[73],TCC_REQ[73],TCC_RW_REQ[73],TCC_MISS[74],TCC_READ[74],TCC_REQ[74],TCC_RW_REQ[74],TCC_MISS[75],TCC_READ[75],TCC_REQ[75],TCC_RW_REQ[75],TCC_MISS[76],TCC_READ[76],TCC_REQ[76],TCC_RW_REQ[76],TCC_MISS[77],TCC_READ[77],TCC_REQ[77],TCC_RW_REQ[77],TCC_MISS[78],TCC_READ[78],TCC_REQ[78],TCC_RW_REQ[78],TCC_MISS[79],TCC_READ[79],TCC_REQ[79],TCC_RW_REQ[79],TCC_MISS[80],TCC_READ[80],TCC_REQ[80],TCC_RW_REQ[80],TCC_MISS[81],TCC_READ[81],TCC_REQ[81],TCC_RW_REQ[81],TCC_MISS[82],TCC_READ[82],TCC_REQ[82],TCC_RW_REQ[82],TCC_MISS[83],TCC_READ[83],TCC_REQ[83],TCC_RW_REQ[83],TCC_MISS[84],TCC_READ[84],TCC_REQ[84],TCC_RW_REQ[84],TCC_MISS[85],TCC_READ[85],TCC_REQ[85],TCC_RW_REQ[85],TCC_MISS[86],TCC_READ[86],TCC_REQ[86],TCC_RW_REQ[86],TCC_MISS[87],TCC_READ[87],TCC_REQ[87],TCC_RW_REQ[87],TCC_MISS[88],TCC_READ[88],TCC_REQ[88],TCC_RW_REQ[88],TCC_MISS[89],TCC_READ[89],TCC_REQ[89],TCC_RW_REQ[89],TCC_MISS[90],TCC_READ[90],TCC_REQ[90],TCC_RW_REQ[90],TCC_MISS[91],TCC_READ[91],TCC_REQ[91],TCC_RW_REQ[91],TCC_MISS[92],TCC_READ[92],TCC_REQ[92],TCC_RW_REQ[92],TCC_MISS[93],TCC_READ[93],TCC_REQ[93],TCC_RW_REQ[93],TCC_MISS[94],TCC_READ[94],TCC_REQ[94],TCC_RW_REQ[94],TCC_MISS[95],TCC_READ[95],TCC_REQ[95],TCC_RW_REQ[95],Wave_Size_7,Correlation_ID_7,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SPI_RA_REQ_NO_ALLOC,SPI_RA_REQ_NO_ALLOC_CSN,CPC_CPC_STAT_STALL,CPC_UTCL1_STALL_ON_TRANSLATION,CPF_CPF_STAT_IDLE,CPF_CPF_TCIU_IDLE,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,TA_BUFFER_TOTAL_CYCLES_sum,TCC_HIT_sum,TCC_MISS_sum,TCC_REQ_sum,TCC_STREAMING_REQ_sum,TCP_TOTAL_ACCESSES_sum,TCP_TOTAL_READ_sum,TCP_TOTAL_WRITE_sum,TCP_VOLATILE_sum,TD_ATOMIC_WAVEFRONT_sum,TD_STORE_WAVEFRONT_sum,Wave_Size_8,Correlation_ID_8,XCC_Index_8,TCC_ATOMIC[0],TCC_BUBBLE[0],TCC_CYCLE[0],TCC_EA0_ATOMIC[0],TCC_ATOMIC[1],TCC_BUBBLE[1],TCC_CYCLE[1],TCC_EA0_ATOMIC[1],TCC_ATOMIC[2],TCC_BUBBLE[2],TCC_CYCLE[2],TCC_EA0_ATOMIC[2],TCC_ATOMIC[3],TCC_BUBBLE[3],TCC_CYCLE[3],TCC_EA0_ATOMIC[3],TCC_ATOMIC[4],TCC_BUBBLE[4],TCC_CYCLE[4],TCC_EA0_ATOMIC[4],TCC_ATOMIC[5],TCC_BUBBLE[5],TCC_CYCLE[5],TCC_EA0_ATOMIC[5],TCC_ATOMIC[6],TCC_BUBBLE[6],TCC_CYCLE[6],TCC_EA0_ATOMIC[6],TCC_ATOMIC[7],TCC_BUBBLE[7],TCC_CYCLE[7],TCC_EA0_ATOMIC[7],TCC_ATOMIC[8],TCC_BUBBLE[8],TCC_CYCLE[8],TCC_EA0_ATOMIC[8],TCC_ATOMIC[9],TCC_BUBBLE[9],TCC_CYCLE[9],TCC_EA0_ATOMIC[9],TCC_ATOMIC[10],TCC_BUBBLE[10],TCC_CYCLE[10],TCC_EA0_ATOMIC[10],TCC_ATOMIC[11],TCC_BUBBLE[11],TCC_CYCLE[11],TCC_EA0_ATOMIC[11],TCC_ATOMIC[12],TCC_BUBBLE[12],TCC_CYCLE[12],TCC_EA0_ATOMIC[12],TCC_ATOMIC[13],TCC_BUBBLE[13],TCC_CYCLE[13],TCC_EA0_ATOMIC[13],TCC_ATOMIC[14],TCC_BUBBLE[14],TCC_CYCLE[14],TCC_EA0_ATOMIC[14],TCC_ATOMIC[15],TCC_BUBBLE[15],TCC_CYCLE[15],TCC_EA0_ATOMIC[15],TCC_ATOMIC[16],TCC_BUBBLE[16],TCC_CYCLE[16],TCC_EA0_ATOMIC[16],TCC_ATOMIC[17],TCC_BUBBLE[17],TCC_CYCLE[17],TCC_EA0_ATOMIC[17],TCC_ATOMIC[18],TCC_BUBBLE[18],TCC_CYCLE[18],TCC_EA0_ATOMIC[18],TCC_ATOMIC[19],TCC_BUBBLE[19],TCC_CYCLE[19],TCC_EA0_ATOMIC[19],TCC_ATOMIC[20],TCC_BUBBLE[20],TCC_CYCLE[20],TCC_EA0_ATOMIC[20],TCC_ATOMIC[21],TCC_BUBBLE[21],TCC_CYCLE[21],TCC_EA0_ATOMIC[21],TCC_ATOMIC[22],TCC_BUBBLE[22],TCC_CYCLE[22],TCC_EA0_ATOMIC[22],TCC_ATOMIC[23],TCC_BUBBLE[23],TCC_CYCLE[23],TCC_EA0_ATOMIC[23],TCC_ATOMIC[24],TCC_BUBBLE[24],TCC_CYCLE[24],TCC_EA0_ATOMIC[24],TCC_ATOMIC[25],TCC_BUBBLE[25],TCC_CYCLE[25],TCC_EA0_ATOMIC[25],TCC_ATOMIC[26],TCC_BUBBLE[26],TCC_CYCLE[26],TCC_EA0_ATOMIC[26],TCC_ATOMIC[27],TCC_BUBBLE[27],TCC_CYCLE[27],TCC_EA0_ATOMIC[27],TCC_ATOMIC[28],TCC_BUBBLE[28],TCC_CYCLE[28],TCC_EA0_ATOMIC[28],TCC_ATOMIC[29],TCC_BUBBLE[29],TCC_CYCLE[29],TCC_EA0_ATOMIC[29],TCC_ATOMIC[30],TCC_BUBBLE[30],TCC_CYCLE[30],TCC_EA0_ATOMIC[30],TCC_ATOMIC[31],TCC_BUBBLE[31],TCC_CYCLE[31],TCC_EA0_ATOMIC[31],TCC_ATOMIC[32],TCC_BUBBLE[32],TCC_CYCLE[32],TCC_EA0_ATOMIC[32],TCC_ATOMIC[33],TCC_BUBBLE[33],TCC_CYCLE[33],TCC_EA0_ATOMIC[33],TCC_ATOMIC[34],TCC_BUBBLE[34],TCC_CYCLE[34],TCC_EA0_ATOMIC[34],TCC_ATOMIC[35],TCC_BUBBLE[35],TCC_CYCLE[35],TCC_EA0_ATOMIC[35],TCC_ATOMIC[36],TCC_BUBBLE[36],TCC_CYCLE[36],TCC_EA0_ATOMIC[36],TCC_ATOMIC[37],TCC_BUBBLE[37],TCC_CYCLE[37],TCC_EA0_ATOMIC[37],TCC_ATOMIC[38],TCC_BUBBLE[38],TCC_CYCLE[38],TCC_EA0_ATOMIC[38],TCC_ATOMIC[39],TCC_BUBBLE[39],TCC_CYCLE[39],TCC_EA0_ATOMIC[39],TCC_ATOMIC[40],TCC_BUBBLE[40],TCC_CYCLE[40],TCC_EA0_ATOMIC[40],TCC_ATOMIC[41],TCC_BUBBLE[41],TCC_CYCLE[41],TCC_EA0_ATOMIC[41],TCC_ATOMIC[42],TCC_BUBBLE[42],TCC_CYCLE[42],TCC_EA0_ATOMIC[42],TCC_ATOMIC[43],TCC_BUBBLE[43],TCC_CYCLE[43],TCC_EA0_ATOMIC[43],TCC_ATOMIC[44],TCC_BUBBLE[44],TCC_CYCLE[44],TCC_EA0_ATOMIC[44],TCC_ATOMIC[45],TCC_BUBBLE[45],TCC_CYCLE[45],TCC_EA0_ATOMIC[45],TCC_ATOMIC[46],TCC_BUBBLE[46],TCC_CYCLE[46],TCC_EA0_ATOMIC[46],TCC_ATOMIC[47],TCC_BUBBLE[47],TCC_CYCLE[47],TCC_EA0_ATOMIC[47],TCC_ATOMIC[48],TCC_BUBBLE[48],TCC_CYCLE[48],TCC_EA0_ATOMIC[48],TCC_ATOMIC[49],TCC_BUBBLE[49],TCC_CYCLE[49],TCC_EA0_ATOMIC[49],TCC_ATOMIC[50],TCC_BUBBLE[50],TCC_CYCLE[50],TCC_EA0_ATOMIC[50],TCC_ATOMIC[51],TCC_BUBBLE[51],TCC_CYCLE[51],TCC_EA0_ATOMIC[51],TCC_ATOMIC[52],TCC_BUBBLE[52],TCC_CYCLE[52],TCC_EA0_ATOMIC[52],TCC_ATOMIC[53],TCC_BUBBLE[53],TCC_CYCLE[53],TCC_EA0_ATOMIC[53],TCC_ATOMIC[54],TCC_BUBBLE[54],TCC_CYCLE[54],TCC_EA0_ATOMIC[54],TCC_ATOMIC[55],TCC_BUBBLE[55],TCC_CYCLE[55],TCC_EA0_ATOMIC[55],TCC_ATOMIC[56],TCC_BUBBLE[56],TCC_CYCLE[56],TCC_EA0_ATOMIC[56],TCC_ATOMIC[57],TCC_BUBBLE[57],TCC_CYCLE[57],TCC_EA0_ATOMIC[57],TCC_ATOMIC[58],TCC_BUBBLE[58],TCC_CYCLE[58],TCC_EA0_ATOMIC[58],TCC_ATOMIC[59],TCC_BUBBLE[59],TCC_CYCLE[59],TCC_EA0_ATOMIC[59],TCC_ATOMIC[60],TCC_BUBBLE[60],TCC_CYCLE[60],TCC_EA0_ATOMIC[60],TCC_ATOMIC[61],TCC_BUBBLE[61],TCC_CYCLE[61],TCC_EA0_ATOMIC[61],TCC_ATOMIC[62],TCC_BUBBLE[62],TCC_CYCLE[62],TCC_EA0_ATOMIC[62],TCC_ATOMIC[63],TCC_BUBBLE[63],TCC_CYCLE[63],TCC_EA0_ATOMIC[63],TCC_ATOMIC[64],TCC_BUBBLE[64],TCC_CYCLE[64],TCC_EA0_ATOMIC[64],TCC_ATOMIC[65],TCC_BUBBLE[65],TCC_CYCLE[65],TCC_EA0_ATOMIC[65],TCC_ATOMIC[66],TCC_BUBBLE[66],TCC_CYCLE[66],TCC_EA0_ATOMIC[66],TCC_ATOMIC[67],TCC_BUBBLE[67],TCC_CYCLE[67],TCC_EA0_ATOMIC[67],TCC_ATOMIC[68],TCC_BUBBLE[68],TCC_CYCLE[68],TCC_EA0_ATOMIC[68],TCC_ATOMIC[69],TCC_BUBBLE[69],TCC_CYCLE[69],TCC_EA0_ATOMIC[69],TCC_ATOMIC[70],TCC_BUBBLE[70],TCC_CYCLE[70],TCC_EA0_ATOMIC[70],TCC_ATOMIC[71],TCC_BUBBLE[71],TCC_CYCLE[71],TCC_EA0_ATOMIC[71],TCC_ATOMIC[72],TCC_BUBBLE[72],TCC_CYCLE[72],TCC_EA0_ATOMIC[72],TCC_ATOMIC[73],TCC_BUBBLE[73],TCC_CYCLE[73],TCC_EA0_ATOMIC[73],TCC_ATOMIC[74],TCC_BUBBLE[74],TCC_CYCLE[74],TCC_EA0_ATOMIC[74],TCC_ATOMIC[75],TCC_BUBBLE[75],TCC_CYCLE[75],TCC_EA0_ATOMIC[75],TCC_ATOMIC[76],TCC_BUBBLE[76],TCC_CYCLE[76],TCC_EA0_ATOMIC[76],TCC_ATOMIC[77],TCC_BUBBLE[77],TCC_CYCLE[77],TCC_EA0_ATOMIC[77],TCC_ATOMIC[78],TCC_BUBBLE[78],TCC_CYCLE[78],TCC_EA0_ATOMIC[78],TCC_ATOMIC[79],TCC_BUBBLE[79],TCC_CYCLE[79],TCC_EA0_ATOMIC[79],TCC_ATOMIC[80],TCC_BUBBLE[80],TCC_CYCLE[80],TCC_EA0_ATOMIC[80],TCC_ATOMIC[81],TCC_BUBBLE[81],TCC_CYCLE[81],TCC_EA0_ATOMIC[81],TCC_ATOMIC[82],TCC_BUBBLE[82],TCC_CYCLE[82],TCC_EA0_ATOMIC[82],TCC_ATOMIC[83],TCC_BUBBLE[83],TCC_CYCLE[83],TCC_EA0_ATOMIC[83],TCC_ATOMIC[84],TCC_BUBBLE[84],TCC_CYCLE[84],TCC_EA0_ATOMIC[84],TCC_ATOMIC[85],TCC_BUBBLE[85],TCC_CYCLE[85],TCC_EA0_ATOMIC[85],TCC_ATOMIC[86],TCC_BUBBLE[86],TCC_CYCLE[86],TCC_EA0_ATOMIC[86],TCC_ATOMIC[87],TCC_BUBBLE[87],TCC_CYCLE[87],TCC_EA0_ATOMIC[87],TCC_ATOMIC[88],TCC_BUBBLE[88],TCC_CYCLE[88],TCC_EA0_ATOMIC[88],TCC_ATOMIC[89],TCC_BUBBLE[89],TCC_CYCLE[89],TCC_EA0_ATOMIC[89],TCC_ATOMIC[90],TCC_BUBBLE[90],TCC_CYCLE[90],TCC_EA0_ATOMIC[90],TCC_ATOMIC[91],TCC_BUBBLE[91],TCC_CYCLE[91],TCC_EA0_ATOMIC[91],TCC_ATOMIC[92],TCC_BUBBLE[92],TCC_CYCLE[92],TCC_EA0_ATOMIC[92],TCC_ATOMIC[93],TCC_BUBBLE[93],TCC_CYCLE[93],TCC_EA0_ATOMIC[93],TCC_ATOMIC[94],TCC_BUBBLE[94],TCC_CYCLE[94],TCC_EA0_ATOMIC[94],TCC_ATOMIC[95],TCC_BUBBLE[95],TCC_CYCLE[95],TCC_EA0_ATOMIC[95],Wave_Size_9,Correlation_ID_9,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_10,Correlation_ID_10,SQC_TC_DATA_ATOMIC_REQ,SQC_TC_STALL,SQC_TC_REQ,SQC_DCACHE_REQ_READ_16,SQC_ICACHE_REQ,SQC_ICACHE_HITS,SQC_ICACHE_MISSES,SQC_ICACHE_MISSES_DUPLICATE,Wave_Size_11,Correlation_ID_11,SQ_INSTS_VALU_MFMA_MOPS_I8,SQ_INSTS_VALU_MFMA_MOPS_F16,SQ_INSTS_VALU_MFMA_MOPS_BF16,SQ_INSTS_VALU_MFMA_MOPS_F32,SQ_INSTS_VALU_MFMA_MOPS_F64,SQC_TC_INST_REQ,SQC_TC_DATA_READ_REQ,SQC_TC_DATA_WRITE_REQ,TCP_PENDING_STALL_CYCLES_sum,Wave_Size_12,Correlation_ID_12,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,TCC_EA0_ATOMIC_LEVEL_sum,TCC_EA0_RDREQ_LEVEL_sum,TCC_EA0_WRREQ_LEVEL_sum,TCC_EA0_WRREQ_STALL_sum,TCP_TCC_CC_ATOMIC_REQ_sum,TCP_TCC_RW_ATOMIC_REQ_sum,TCP_TCC_RW_READ_REQ_sum,TCP_TCC_RW_WRITE_REQ_sum,Wave_Size_13,Correlation_ID_13,SQC_DCACHE_REQ_READ_2,SQC_DCACHE_REQ_READ_4,Wave_Size_14,Correlation_ID_14,SQ_ACTIVE_INST_SCA,SQ_ACTIVE_INST_EXP_GDS,SQ_ACTIVE_INST_MISC,SQ_ACTIVE_INST_FLAT,SQ_INST_CYCLES_VMEM_WR,SQ_INST_CYCLES_VMEM_RD,SQ_INST_CYCLES_SMEM,SQ_INST_CYCLES_SALU,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,CPC_ME1_DC0_SPI_BUSY,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,TCC_BUBBLE_sum,TCC_EA0_RDREQ_32B_sum,TCC_EA0_RDREQ_sum,TCC_EA0_RD_UNCACHED_32B_sum,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,TCP_TCC_READ_REQ_sum,TCP_TCC_WRITE_REQ_sum,Wave_Size_15,Correlation_ID_15,XCC_Index_15,TCC_EA0_ATOMIC_LEVEL[0],TCC_EA0_RDREQ[0],TCC_EA0_RDREQ_32B[0],TCC_EA0_RDREQ_LEVEL[0],TCC_EA0_ATOMIC_LEVEL[1],TCC_EA0_RDREQ[1],TCC_EA0_RDREQ_32B[1],TCC_EA0_RDREQ_LEVEL[1],TCC_EA0_ATOMIC_LEVEL[2],TCC_EA0_RDREQ[2],TCC_EA0_RDREQ_32B[2],TCC_EA0_RDREQ_LEVEL[2],TCC_EA0_ATOMIC_LEVEL[3],TCC_EA0_RDREQ[3],TCC_EA0_RDREQ_32B[3],TCC_EA0_RDREQ_LEVEL[3],TCC_EA0_ATOMIC_LEVEL[4],TCC_EA0_RDREQ[4],TCC_EA0_RDREQ_32B[4],TCC_EA0_RDREQ_LEVEL[4],TCC_EA0_ATOMIC_LEVEL[5],TCC_EA0_RDREQ[5],TCC_EA0_RDREQ_32B[5],TCC_EA0_RDREQ_LEVEL[5],TCC_EA0_ATOMIC_LEVEL[6],TCC_EA0_RDREQ[6],TCC_EA0_RDREQ_32B[6],TCC_EA0_RDREQ_LEVEL[6],TCC_EA0_ATOMIC_LEVEL[7],TCC_EA0_RDREQ[7],TCC_EA0_RDREQ_32B[7],TCC_EA0_RDREQ_LEVEL[7],TCC_EA0_ATOMIC_LEVEL[8],TCC_EA0_RDREQ[8],TCC_EA0_RDREQ_32B[8],TCC_EA0_RDREQ_LEVEL[8],TCC_EA0_ATOMIC_LEVEL[9],TCC_EA0_RDREQ[9],TCC_EA0_RDREQ_32B[9],TCC_EA0_RDREQ_LEVEL[9],TCC_EA0_ATOMIC_LEVEL[10],TCC_EA0_RDREQ[10],TCC_EA0_RDREQ_32B[10],TCC_EA0_RDREQ_LEVEL[10],TCC_EA0_ATOMIC_LEVEL[11],TCC_EA0_RDREQ[11],TCC_EA0_RDREQ_32B[11],TCC_EA0_RDREQ_LEVEL[11],TCC_EA0_ATOMIC_LEVEL[12],TCC_EA0_RDREQ[12],TCC_EA0_RDREQ_32B[12],TCC_EA0_RDREQ_LEVEL[12],TCC_EA0_ATOMIC_LEVEL[13],TCC_EA0_RDREQ[13],TCC_EA0_RDREQ_32B[13],TCC_EA0_RDREQ_LEVEL[13],TCC_EA0_ATOMIC_LEVEL[14],TCC_EA0_RDREQ[14],TCC_EA0_RDREQ_32B[14],TCC_EA0_RDREQ_LEVEL[14],TCC_EA0_ATOMIC_LEVEL[15],TCC_EA0_RDREQ[15],TCC_EA0_RDREQ_32B[15],TCC_EA0_RDREQ_LEVEL[15],TCC_EA0_ATOMIC_LEVEL[16],TCC_EA0_RDREQ[16],TCC_EA0_RDREQ_32B[16],TCC_EA0_RDREQ_LEVEL[16],TCC_EA0_ATOMIC_LEVEL[17],TCC_EA0_RDREQ[17],TCC_EA0_RDREQ_32B[17],TCC_EA0_RDREQ_LEVEL[17],TCC_EA0_ATOMIC_LEVEL[18],TCC_EA0_RDREQ[18],TCC_EA0_RDREQ_32B[18],TCC_EA0_RDREQ_LEVEL[18],TCC_EA0_ATOMIC_LEVEL[19],TCC_EA0_RDREQ[19],TCC_EA0_RDREQ_32B[19],TCC_EA0_RDREQ_LEVEL[19],TCC_EA0_ATOMIC_LEVEL[20],TCC_EA0_RDREQ[20],TCC_EA0_RDREQ_32B[20],TCC_EA0_RDREQ_LEVEL[20],TCC_EA0_ATOMIC_LEVEL[21],TCC_EA0_RDREQ[21],TCC_EA0_RDREQ_32B[21],TCC_EA0_RDREQ_LEVEL[21],TCC_EA0_ATOMIC_LEVEL[22],TCC_EA0_RDREQ[22],TCC_EA0_RDREQ_32B[22],TCC_EA0_RDREQ_LEVEL[22],TCC_EA0_ATOMIC_LEVEL[23],TCC_EA0_RDREQ[23],TCC_EA0_RDREQ_32B[23],TCC_EA0_RDREQ_LEVEL[23],TCC_EA0_ATOMIC_LEVEL[24],TCC_EA0_RDREQ[24],TCC_EA0_RDREQ_32B[24],TCC_EA0_RDREQ_LEVEL[24],TCC_EA0_ATOMIC_LEVEL[25],TCC_EA0_RDREQ[25],TCC_EA0_RDREQ_32B[25],TCC_EA0_RDREQ_LEVEL[25],TCC_EA0_ATOMIC_LEVEL[26],TCC_EA0_RDREQ[26],TCC_EA0_RDREQ_32B[26],TCC_EA0_RDREQ_LEVEL[26],TCC_EA0_ATOMIC_LEVEL[27],TCC_EA0_RDREQ[27],TCC_EA0_RDREQ_32B[27],TCC_EA0_RDREQ_LEVEL[27],TCC_EA0_ATOMIC_LEVEL[28],TCC_EA0_RDREQ[28],TCC_EA0_RDREQ_32B[28],TCC_EA0_RDREQ_LEVEL[28],TCC_EA0_ATOMIC_LEVEL[29],TCC_EA0_RDREQ[29],TCC_EA0_RDREQ_32B[29],TCC_EA0_RDREQ_LEVEL[29],TCC_EA0_ATOMIC_LEVEL[30],TCC_EA0_RDREQ[30],TCC_EA0_RDREQ_32B[30],TCC_EA0_RDREQ_LEVEL[30],TCC_EA0_ATOMIC_LEVEL[31],TCC_EA0_RDREQ[31],TCC_EA0_RDREQ_32B[31],TCC_EA0_RDREQ_LEVEL[31],TCC_EA0_ATOMIC_LEVEL[32],TCC_EA0_RDREQ[32],TCC_EA0_RDREQ_32B[32],TCC_EA0_RDREQ_LEVEL[32],TCC_EA0_ATOMIC_LEVEL[33],TCC_EA0_RDREQ[33],TCC_EA0_RDREQ_32B[33],TCC_EA0_RDREQ_LEVEL[33],TCC_EA0_ATOMIC_LEVEL[34],TCC_EA0_RDREQ[34],TCC_EA0_RDREQ_32B[34],TCC_EA0_RDREQ_LEVEL[34],TCC_EA0_ATOMIC_LEVEL[35],TCC_EA0_RDREQ[35],TCC_EA0_RDREQ_32B[35],TCC_EA0_RDREQ_LEVEL[35],TCC_EA0_ATOMIC_LEVEL[36],TCC_EA0_RDREQ[36],TCC_EA0_RDREQ_32B[36],TCC_EA0_RDREQ_LEVEL[36],TCC_EA0_ATOMIC_LEVEL[37],TCC_EA0_RDREQ[37],TCC_EA0_RDREQ_32B[37],TCC_EA0_RDREQ_LEVEL[37],TCC_EA0_ATOMIC_LEVEL[38],TCC_EA0_RDREQ[38],TCC_EA0_RDREQ_32B[38],TCC_EA0_RDREQ_LEVEL[38],TCC_EA0_ATOMIC_LEVEL[39],TCC_EA0_RDREQ[39],TCC_EA0_RDREQ_32B[39],TCC_EA0_RDREQ_LEVEL[39],TCC_EA0_ATOMIC_LEVEL[40],TCC_EA0_RDREQ[40],TCC_EA0_RDREQ_32B[40],TCC_EA0_RDREQ_LEVEL[40],TCC_EA0_ATOMIC_LEVEL[41],TCC_EA0_RDREQ[41],TCC_EA0_RDREQ_32B[41],TCC_EA0_RDREQ_LEVEL[41],TCC_EA0_ATOMIC_LEVEL[42],TCC_EA0_RDREQ[42],TCC_EA0_RDREQ_32B[42],TCC_EA0_RDREQ_LEVEL[42],TCC_EA0_ATOMIC_LEVEL[43],TCC_EA0_RDREQ[43],TCC_EA0_RDREQ_32B[43],TCC_EA0_RDREQ_LEVEL[43],TCC_EA0_ATOMIC_LEVEL[44],TCC_EA0_RDREQ[44],TCC_EA0_RDREQ_32B[44],TCC_EA0_RDREQ_LEVEL[44],TCC_EA0_ATOMIC_LEVEL[45],TCC_EA0_RDREQ[45],TCC_EA0_RDREQ_32B[45],TCC_EA0_RDREQ_LEVEL[45],TCC_EA0_ATOMIC_LEVEL[46],TCC_EA0_RDREQ[46],TCC_EA0_RDREQ_32B[46],TCC_EA0_RDREQ_LEVEL[46],TCC_EA0_ATOMIC_LEVEL[47],TCC_EA0_RDREQ[47],TCC_EA0_RDREQ_32B[47],TCC_EA0_RDREQ_LEVEL[47],TCC_EA0_ATOMIC_LEVEL[48],TCC_EA0_RDREQ[48],TCC_EA0_RDREQ_32B[48],TCC_EA0_RDREQ_LEVEL[48],TCC_EA0_ATOMIC_LEVEL[49],TCC_EA0_RDREQ[49],TCC_EA0_RDREQ_32B[49],TCC_EA0_RDREQ_LEVEL[49],TCC_EA0_ATOMIC_LEVEL[50],TCC_EA0_RDREQ[50],TCC_EA0_RDREQ_32B[50],TCC_EA0_RDREQ_LEVEL[50],TCC_EA0_ATOMIC_LEVEL[51],TCC_EA0_RDREQ[51],TCC_EA0_RDREQ_32B[51],TCC_EA0_RDREQ_LEVEL[51],TCC_EA0_ATOMIC_LEVEL[52],TCC_EA0_RDREQ[52],TCC_EA0_RDREQ_32B[52],TCC_EA0_RDREQ_LEVEL[52],TCC_EA0_ATOMIC_LEVEL[53],TCC_EA0_RDREQ[53],TCC_EA0_RDREQ_32B[53],TCC_EA0_RDREQ_LEVEL[53],TCC_EA0_ATOMIC_LEVEL[54],TCC_EA0_RDREQ[54],TCC_EA0_RDREQ_32B[54],TCC_EA0_RDREQ_LEVEL[54],TCC_EA0_ATOMIC_LEVEL[55],TCC_EA0_RDREQ[55],TCC_EA0_RDREQ_32B[55],TCC_EA0_RDREQ_LEVEL[55],TCC_EA0_ATOMIC_LEVEL[56],TCC_EA0_RDREQ[56],TCC_EA0_RDREQ_32B[56],TCC_EA0_RDREQ_LEVEL[56],TCC_EA0_ATOMIC_LEVEL[57],TCC_EA0_RDREQ[57],TCC_EA0_RDREQ_32B[57],TCC_EA0_RDREQ_LEVEL[57],TCC_EA0_ATOMIC_LEVEL[58],TCC_EA0_RDREQ[58],TCC_EA0_RDREQ_32B[58],TCC_EA0_RDREQ_LEVEL[58],TCC_EA0_ATOMIC_LEVEL[59],TCC_EA0_RDREQ[59],TCC_EA0_RDREQ_32B[59],TCC_EA0_RDREQ_LEVEL[59],TCC_EA0_ATOMIC_LEVEL[60],TCC_EA0_RDREQ[60],TCC_EA0_RDREQ_32B[60],TCC_EA0_RDREQ_LEVEL[60],TCC_EA0_ATOMIC_LEVEL[61],TCC_EA0_RDREQ[61],TCC_EA0_RDREQ_32B[61],TCC_EA0_RDREQ_LEVEL[61],TCC_EA0_ATOMIC_LEVEL[62],TCC_EA0_RDREQ[62],TCC_EA0_RDREQ_32B[62],TCC_EA0_RDREQ_LEVEL[62],TCC_EA0_ATOMIC_LEVEL[63],TCC_EA0_RDREQ[63],TCC_EA0_RDREQ_32B[63],TCC_EA0_RDREQ_LEVEL[63],TCC_EA0_ATOMIC_LEVEL[64],TCC_EA0_RDREQ[64],TCC_EA0_RDREQ_32B[64],TCC_EA0_RDREQ_LEVEL[64],TCC_EA0_ATOMIC_LEVEL[65],TCC_EA0_RDREQ[65],TCC_EA0_RDREQ_32B[65],TCC_EA0_RDREQ_LEVEL[65],TCC_EA0_ATOMIC_LEVEL[66],TCC_EA0_RDREQ[66],TCC_EA0_RDREQ_32B[66],TCC_EA0_RDREQ_LEVEL[66],TCC_EA0_ATOMIC_LEVEL[67],TCC_EA0_RDREQ[67],TCC_EA0_RDREQ_32B[67],TCC_EA0_RDREQ_LEVEL[67],TCC_EA0_ATOMIC_LEVEL[68],TCC_EA0_RDREQ[68],TCC_EA0_RDREQ_32B[68],TCC_EA0_RDREQ_LEVEL[68],TCC_EA0_ATOMIC_LEVEL[69],TCC_EA0_RDREQ[69],TCC_EA0_RDREQ_32B[69],TCC_EA0_RDREQ_LEVEL[69],TCC_EA0_ATOMIC_LEVEL[70],TCC_EA0_RDREQ[70],TCC_EA0_RDREQ_32B[70],TCC_EA0_RDREQ_LEVEL[70],TCC_EA0_ATOMIC_LEVEL[71],TCC_EA0_RDREQ[71],TCC_EA0_RDREQ_32B[71],TCC_EA0_RDREQ_LEVEL[71],TCC_EA0_ATOMIC_LEVEL[72],TCC_EA0_RDREQ[72],TCC_EA0_RDREQ_32B[72],TCC_EA0_RDREQ_LEVEL[72],TCC_EA0_ATOMIC_LEVEL[73],TCC_EA0_RDREQ[73],TCC_EA0_RDREQ_32B[73],TCC_EA0_RDREQ_LEVEL[73],TCC_EA0_ATOMIC_LEVEL[74],TCC_EA0_RDREQ[74],TCC_EA0_RDREQ_32B[74],TCC_EA0_RDREQ_LEVEL[74],TCC_EA0_ATOMIC_LEVEL[75],TCC_EA0_RDREQ[75],TCC_EA0_RDREQ_32B[75],TCC_EA0_RDREQ_LEVEL[75],TCC_EA0_ATOMIC_LEVEL[76],TCC_EA0_RDREQ[76],TCC_EA0_RDREQ_32B[76],TCC_EA0_RDREQ_LEVEL[76],TCC_EA0_ATOMIC_LEVEL[77],TCC_EA0_RDREQ[77],TCC_EA0_RDREQ_32B[77],TCC_EA0_RDREQ_LEVEL[77],TCC_EA0_ATOMIC_LEVEL[78],TCC_EA0_RDREQ[78],TCC_EA0_RDREQ_32B[78],TCC_EA0_RDREQ_LEVEL[78],TCC_EA0_ATOMIC_LEVEL[79],TCC_EA0_RDREQ[79],TCC_EA0_RDREQ_32B[79],TCC_EA0_RDREQ_LEVEL[79],TCC_EA0_ATOMIC_LEVEL[80],TCC_EA0_RDREQ[80],TCC_EA0_RDREQ_32B[80],TCC_EA0_RDREQ_LEVEL[80],TCC_EA0_ATOMIC_LEVEL[81],TCC_EA0_RDREQ[81],TCC_EA0_RDREQ_32B[81],TCC_EA0_RDREQ_LEVEL[81],TCC_EA0_ATOMIC_LEVEL[82],TCC_EA0_RDREQ[82],TCC_EA0_RDREQ_32B[82],TCC_EA0_RDREQ_LEVEL[82],TCC_EA0_ATOMIC_LEVEL[83],TCC_EA0_RDREQ[83],TCC_EA0_RDREQ_32B[83],TCC_EA0_RDREQ_LEVEL[83],TCC_EA0_ATOMIC_LEVEL[84],TCC_EA0_RDREQ[84],TCC_EA0_RDREQ_32B[84],TCC_EA0_RDREQ_LEVEL[84],TCC_EA0_ATOMIC_LEVEL[85],TCC_EA0_RDREQ[85],TCC_EA0_RDREQ_32B[85],TCC_EA0_RDREQ_LEVEL[85],TCC_EA0_ATOMIC_LEVEL[86],TCC_EA0_RDREQ[86],TCC_EA0_RDREQ_32B[86],TCC_EA0_RDREQ_LEVEL[86],TCC_EA0_ATOMIC_LEVEL[87],TCC_EA0_RDREQ[87],TCC_EA0_RDREQ_32B[87],TCC_EA0_RDREQ_LEVEL[87],TCC_EA0_ATOMIC_LEVEL[88],TCC_EA0_RDREQ[88],TCC_EA0_RDREQ_32B[88],TCC_EA0_RDREQ_LEVEL[88],TCC_EA0_ATOMIC_LEVEL[89],TCC_EA0_RDREQ[89],TCC_EA0_RDREQ_32B[89],TCC_EA0_RDREQ_LEVEL[89],TCC_EA0_ATOMIC_LEVEL[90],TCC_EA0_RDREQ[90],TCC_EA0_RDREQ_32B[90],TCC_EA0_RDREQ_LEVEL[90],TCC_EA0_ATOMIC_LEVEL[91],TCC_EA0_RDREQ[91],TCC_EA0_RDREQ_32B[91],TCC_EA0_RDREQ_LEVEL[91],TCC_EA0_ATOMIC_LEVEL[92],TCC_EA0_RDREQ[92],TCC_EA0_RDREQ_32B[92],TCC_EA0_RDREQ_LEVEL[92],TCC_EA0_ATOMIC_LEVEL[93],TCC_EA0_RDREQ[93],TCC_EA0_RDREQ_32B[93],TCC_EA0_RDREQ_LEVEL[93],TCC_EA0_ATOMIC_LEVEL[94],TCC_EA0_RDREQ[94],TCC_EA0_RDREQ_32B[94],TCC_EA0_RDREQ_LEVEL[94],TCC_EA0_ATOMIC_LEVEL[95],TCC_EA0_RDREQ[95],TCC_EA0_RDREQ_32B[95],TCC_EA0_RDREQ_LEVEL[95],Wave_Size_16,Correlation_ID_16,SQ_INSTS_VMEM,SQ_INSTS_SALU,SQ_INSTS_VSKIPPED,SQ_INSTS,SQ_INSTS_VALU,SQ_INSTS_VALU_ADD_F16,SQ_INSTS_VALU_MUL_F16,SQ_INSTS_VALU_FMA_F16,GRBM_SPI_BUSY,SPI_CSN_NUM_THREADGROUPS,SPI_CSN_WAVE,CPC_CPC_TCIU_BUSY,CPC_CPC_TCIU_IDLE,CPF_CPF_TCIU_BUSY,CPF_CPF_TCIU_STALL,TA_BUFFER_READ_WAVEFRONTS_sum,TA_BUFFER_WRITE_WAVEFRONTS_sum,TCC_CC_REQ_sum,TCC_NC_REQ_sum,TCC_RW_REQ_sum,TCC_UC_REQ_sum,TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum,TCP_READ_TAGCONFLICT_STALL_CYCLES_sum,TCP_TA_TCP_STATE_READ_sum,TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum,TD_LOAD_WAVEFRONT_sum,TD_SPI_STALL_sum,Wave_Size_17,Correlation_ID_17,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_BUSY_CU_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_INSTS_VALU_CVT,SQ_INSTS_VMEM_WR,SQ_INSTS_VMEM_RD,GRBM_COUNT,GRBM_GUI_ACTIVE,SPI_CSN_WINDOW_VALID,SPI_CSN_BUSY,CPC_CPC_STAT_BUSY,CPC_CPC_STAT_IDLE,CPF_CPF_STAT_BUSY,CPF_CPF_STAT_STALL,TA_BUFFER_WAVEFRONTS_sum,TA_TA_BUSY_sum,TCC_BUSY_sum,TCC_CYCLE_sum,TCC_PROBE_ALL_sum,TCC_PROBE_sum,TCP_GATE_EN1_sum,TCP_GATE_EN2_sum,TCP_TCR_TCP_STALL_CYCLES_sum,TCP_TD_TCP_STALL_CYCLES_sum,TD_TC_STALL_sum,TD_TD_BUSY_sum,Start_Timestamp,End_Timestamp
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diff --git a/tests/workloads/device_filter/MI300A_A1/sysinfo.csv b/tests/workloads/device_filter/MI300A_A1/sysinfo.csv
new file mode 100644
index 0000000000..c0f20e28fb
--- /dev/null
+++ b/tests/workloads/device_filter/MI300A_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+device_filter,./tests/vcopy -n 1048576 -b 256 -i 3,SQ|LDS|SQC|TA|TD|TCP|TCC|SPI|CPC|CPF,Wed 29 May 2024 01:39:25 PM  (CDT),2,sh5-1w300-rg3-3,AMD Instinct MI300A Accelerator,"American Megatrends International, LLC.RMO1002DS",Ubuntu 22.04.2 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,131174852,,6.1.2-110,N/A,SPX,NPS1,MI300A_A1,gfx942,32,24576,228,4,24,64,1024,32,2100,1300,2100,1300,96,32,120,4,5324.8,6
diff --git a/tests/workloads/device_filter/MI300A_A1/timestamps.csv b/tests/workloads/device_filter/MI300A_A1/timestamps.csv
new file mode 100644
index 0000000000..73da220647
--- /dev/null
+++ b/tests/workloads/device_filter/MI300A_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,11995,1,148592,148592,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73843971992178,73843971999909,0
+2,11995,1,148592,148592,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73843972017897,73843972024226,0
+3,11995,1,148592,148592,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73843972039650,73843972045859,0
diff --git a/tests/workloads/device_filter/MI300X_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/device_filter/MI300X_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..1010c34fd7
--- /dev/null
+++ b/tests/workloads/device_filter/MI300X_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,60633,1,966829,966829,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716380685145736,716380685161855,0,423448.0,423448.0,16384.0,65536.0,35074.0,2819140.0
+1,60633,1,966829,966829,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716380685184013,716380685197573,0,431311.0,431311.0,16384.0,65536.0,13102.0,1048576.0
+2,60633,1,966829,966829,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716380685217852,716380685231332,0,381273.0,381273.0,16384.0,65536.0,13173.0,1048580.0
diff --git a/tests/workloads/device_filter/MI300X_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/device_filter/MI300X_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..db686f29bf
--- /dev/null
+++ b/tests/workloads/device_filter/MI300X_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,60633,1,966840,966840,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716380685145736,716380685161855,0,0.0,0.0,0.0
+1,60633,1,966840,966840,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716380685184013,716380685197573,0,0.0,0.0,0.0
+2,60633,1,966840,966840,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716380685217852,716380685231332,0,0.0,0.0,0.0
diff --git a/tests/workloads/device_filter/MI300X_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/device_filter/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..4277b4a4ee
--- /dev/null
+++ b/tests/workloads/device_filter/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,966851,966851,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716380685145736,716380685161855,0,65536.0,3552914.0,284244392.0
+1,60633,1,966851,966851,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716380685184013,716380685197573,0,65536.0,3754770.0,300333168.0
+2,60633,1,966851,966851,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716380685217852,716380685231332,0,65536.0,3553382.0,284188504.0
diff --git a/tests/workloads/device_filter/MI300X_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/device_filter/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..ff7e475503
--- /dev/null
+++ b/tests/workloads/device_filter/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,966862,966862,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716380685145736,716380685161855,0,32768.0,514988.0,41193032.0
+1,60633,1,966862,966862,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716380685184013,716380685197573,0,32768.0,388588.0,31078292.0
+2,60633,1,966862,966862,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716380685217852,716380685231332,0,32768.0,387452.0,30980248.0
diff --git a/tests/workloads/device_filter/MI300X_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/device_filter/MI300X_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..7d726f2073
--- /dev/null
+++ b/tests/workloads/device_filter/MI300X_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,60633,1,966874,966874,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716380685145736,716380685161855,0,453185.0,453185.0,261839.0,1812740.0,16384.0,35223316.0,578033.0,0.0,141236700.0
+1,60633,1,966874,966874,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716380685184013,716380685197573,0,353470.0,353470.0,174815.0,1413880.0,16384.0,31712257.0,507967.0,0.0,127205848.0
+2,60633,1,966874,966874,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716380685217852,716380685231332,0,374628.0,374628.0,200237.0,1498512.0,16384.0,30945661.0,514530.0,0.0,124133364.0
diff --git a/tests/workloads/device_filter/MI300X_A1/log.txt b/tests/workloads/device_filter/MI300X_A1/log.txt
new file mode 100644
index 0000000000..9feec1879e
--- /dev/null
+++ b/tests/workloads/device_filter/MI300X_A1/log.txt
@@ -0,0 +1,157 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/device_filter/MI300X_A1
+Target: MI300X_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: None
+Hardware Blocks: All
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+[profiling] Current input file: tests/workloads/device_filter/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH_LEVEL
+[profiling] Current input file: tests/workloads/device_filter/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/device_filter/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/device_filter/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+[profiling] Current input file: tests/workloads/device_filter/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+[profiling] Current input file: tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+[profiling] Current input file: tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS
+[profiling] Current input file: tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_REQ
+[profiling] Current input file: tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ
+[profiling] Current input file: tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+[profiling] Current input file: tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_13.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[0]
+[profiling] Current input file: tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_14.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[1]
+[profiling] Current input file: tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_15.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[0]
+[profiling] Current input file: tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_16.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[0]
+[profiling] Current input file: tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_17.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[1]
+[profiling] Current input file: tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F32
+[profiling] Current input file: tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT64
+[profiling] Current input file: tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
+[profiling] Current input file: tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_SCA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_MISC
+[profiling] Current input file: tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_THREAD_CYCLES_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
+[profiling] Current input file: tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ITEMS
+[profiling] Current input file: tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F16
+[profiling] Current input file: tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F32
+[profiling] Current input file: tests/workloads/device_filter/MI300X_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/device_filter/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/device_filter/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..293092f641
--- /dev/null
+++ b/tests/workloads/device_filter/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/device_filter/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..08439eedce
--- /dev/null
+++ b/tests/workloads/device_filter/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/device_filter/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..6cca322d4e
--- /dev/null
+++ b/tests/workloads/device_filter/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/device_filter/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..e527ad31ba
--- /dev/null
+++ b/tests/workloads/device_filter/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/device_filter/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..3f8e04adb3
--- /dev/null
+++ b/tests/workloads/device_filter/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_0.txt b/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..ebc550fbfe
--- /dev/null
+++ b/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD GRBM_COUNT GRBM_GUI_ACTIVE TCP_GATE_EN1_sum TCP_GATE_EN2_sum TCP_TD_TCP_STALL_CYCLES_sum TCP_TCR_TCP_STALL_CYCLES_sum TA_TA_BUSY_sum TA_BUFFER_WAVEFRONTS_sum TD_TD_BUSY_sum TD_TC_STALL_sum SPI_CSN_WINDOW_VALID SPI_CSN_BUSY CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE CPF_CPF_STAT_BUSY CPF_CPF_STAT_STALL TCC_CYCLE_sum TCC_BUSY_sum TCC_PROBE_sum TCC_PROBE_ALL_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_1.txt b/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..9ad887ddbb
--- /dev/null
+++ b/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 GRBM_SPI_BUSY TCP_READ_TAGCONFLICT_STALL_CYCLES_sum TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum TCP_TA_TCP_STATE_READ_sum TA_BUFFER_READ_WAVEFRONTS_sum TA_BUFFER_WRITE_WAVEFRONTS_sum TD_SPI_STALL_sum TD_LOAD_WAVEFRONT_sum SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE CPC_CPC_TCIU_BUSY CPC_CPC_TCIU_IDLE CPF_CPF_TCIU_BUSY CPF_CPF_TCIU_STALL TCC_NC_REQ_sum TCC_UC_REQ_sum TCC_CC_REQ_sum TCC_RW_REQ_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_10.txt b/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..21c59688f7
--- /dev/null
+++ b/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_11.txt b/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..df6d67d7b7
--- /dev/null
+++ b/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_12.txt b/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..6e5320c11c
--- /dev/null
+++ b/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_13.txt b/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_13.txt
new file mode 100644
index 0000000000..d95492c1cd
--- /dev/null
+++ b/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_13.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_ATOMIC[0] TCC_BUBBLE[0] TCC_CYCLE[0] TCC_EA0_ATOMIC[0] TCC_ATOMIC[1] TCC_BUBBLE[1] TCC_CYCLE[1] TCC_EA0_ATOMIC[1] TCC_ATOMIC[2] TCC_BUBBLE[2] TCC_CYCLE[2] TCC_EA0_ATOMIC[2] TCC_ATOMIC[3] TCC_BUBBLE[3] TCC_CYCLE[3] TCC_EA0_ATOMIC[3] TCC_ATOMIC[4] TCC_BUBBLE[4] TCC_CYCLE[4] TCC_EA0_ATOMIC[4] TCC_ATOMIC[5] TCC_BUBBLE[5] TCC_CYCLE[5] TCC_EA0_ATOMIC[5] TCC_ATOMIC[6] TCC_BUBBLE[6] TCC_CYCLE[6] TCC_EA0_ATOMIC[6] TCC_ATOMIC[7] TCC_BUBBLE[7] TCC_CYCLE[7] TCC_EA0_ATOMIC[7] TCC_ATOMIC[8] TCC_BUBBLE[8] TCC_CYCLE[8] TCC_EA0_ATOMIC[8] TCC_ATOMIC[9] TCC_BUBBLE[9] TCC_CYCLE[9] TCC_EA0_ATOMIC[9] TCC_ATOMIC[10] TCC_BUBBLE[10] TCC_CYCLE[10] TCC_EA0_ATOMIC[10] TCC_ATOMIC[11] TCC_BUBBLE[11] TCC_CYCLE[11] TCC_EA0_ATOMIC[11] TCC_ATOMIC[12] TCC_BUBBLE[12] TCC_CYCLE[12] TCC_EA0_ATOMIC[12] TCC_ATOMIC[13] TCC_BUBBLE[13] TCC_CYCLE[13] TCC_EA0_ATOMIC[13] TCC_ATOMIC[14] TCC_BUBBLE[14] TCC_CYCLE[14] TCC_EA0_ATOMIC[14] TCC_ATOMIC[15] TCC_BUBBLE[15] TCC_CYCLE[15] TCC_EA0_ATOMIC[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_14.txt b/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_14.txt
new file mode 100644
index 0000000000..28327b86d3
--- /dev/null
+++ b/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_14.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_ATOMIC_LEVEL[0] TCC_EA0_RDREQ[0] TCC_EA0_RDREQ_32B[0] TCC_EA0_RDREQ_LEVEL[0] TCC_EA0_ATOMIC_LEVEL[1] TCC_EA0_RDREQ[1] TCC_EA0_RDREQ_32B[1] TCC_EA0_RDREQ_LEVEL[1] TCC_EA0_ATOMIC_LEVEL[2] TCC_EA0_RDREQ[2] TCC_EA0_RDREQ_32B[2] TCC_EA0_RDREQ_LEVEL[2] TCC_EA0_ATOMIC_LEVEL[3] TCC_EA0_RDREQ[3] TCC_EA0_RDREQ_32B[3] TCC_EA0_RDREQ_LEVEL[3] TCC_EA0_ATOMIC_LEVEL[4] TCC_EA0_RDREQ[4] TCC_EA0_RDREQ_32B[4] TCC_EA0_RDREQ_LEVEL[4] TCC_EA0_ATOMIC_LEVEL[5] TCC_EA0_RDREQ[5] TCC_EA0_RDREQ_32B[5] TCC_EA0_RDREQ_LEVEL[5] TCC_EA0_ATOMIC_LEVEL[6] TCC_EA0_RDREQ[6] TCC_EA0_RDREQ_32B[6] TCC_EA0_RDREQ_LEVEL[6] TCC_EA0_ATOMIC_LEVEL[7] TCC_EA0_RDREQ[7] TCC_EA0_RDREQ_32B[7] TCC_EA0_RDREQ_LEVEL[7] TCC_EA0_ATOMIC_LEVEL[8] TCC_EA0_RDREQ[8] TCC_EA0_RDREQ_32B[8] TCC_EA0_RDREQ_LEVEL[8] TCC_EA0_ATOMIC_LEVEL[9] TCC_EA0_RDREQ[9] TCC_EA0_RDREQ_32B[9] TCC_EA0_RDREQ_LEVEL[9] TCC_EA0_ATOMIC_LEVEL[10] TCC_EA0_RDREQ[10] TCC_EA0_RDREQ_32B[10] TCC_EA0_RDREQ_LEVEL[10] TCC_EA0_ATOMIC_LEVEL[11] TCC_EA0_RDREQ[11] TCC_EA0_RDREQ_32B[11] TCC_EA0_RDREQ_LEVEL[11] TCC_EA0_ATOMIC_LEVEL[12] TCC_EA0_RDREQ[12] TCC_EA0_RDREQ_32B[12] TCC_EA0_RDREQ_LEVEL[12] TCC_EA0_ATOMIC_LEVEL[13] TCC_EA0_RDREQ[13] TCC_EA0_RDREQ_32B[13] TCC_EA0_RDREQ_LEVEL[13] TCC_EA0_ATOMIC_LEVEL[14] TCC_EA0_RDREQ[14] TCC_EA0_RDREQ_32B[14] TCC_EA0_RDREQ_LEVEL[14] TCC_EA0_ATOMIC_LEVEL[15] TCC_EA0_RDREQ[15] TCC_EA0_RDREQ_32B[15] TCC_EA0_RDREQ_LEVEL[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_15.txt b/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_15.txt
new file mode 100644
index 0000000000..033ae877ed
--- /dev/null
+++ b/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_15.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_WRREQ[0] TCC_EA0_WRREQ_64B[0] TCC_EA0_WRREQ_LEVEL[0] TCC_HIT[0] TCC_EA0_WRREQ[1] TCC_EA0_WRREQ_64B[1] TCC_EA0_WRREQ_LEVEL[1] TCC_HIT[1] TCC_EA0_WRREQ[2] TCC_EA0_WRREQ_64B[2] TCC_EA0_WRREQ_LEVEL[2] TCC_HIT[2] TCC_EA0_WRREQ[3] TCC_EA0_WRREQ_64B[3] TCC_EA0_WRREQ_LEVEL[3] TCC_HIT[3] TCC_EA0_WRREQ[4] TCC_EA0_WRREQ_64B[4] TCC_EA0_WRREQ_LEVEL[4] TCC_HIT[4] TCC_EA0_WRREQ[5] TCC_EA0_WRREQ_64B[5] TCC_EA0_WRREQ_LEVEL[5] TCC_HIT[5] TCC_EA0_WRREQ[6] TCC_EA0_WRREQ_64B[6] TCC_EA0_WRREQ_LEVEL[6] TCC_HIT[6] TCC_EA0_WRREQ[7] TCC_EA0_WRREQ_64B[7] TCC_EA0_WRREQ_LEVEL[7] TCC_HIT[7] TCC_EA0_WRREQ[8] TCC_EA0_WRREQ_64B[8] TCC_EA0_WRREQ_LEVEL[8] TCC_HIT[8] TCC_EA0_WRREQ[9] TCC_EA0_WRREQ_64B[9] TCC_EA0_WRREQ_LEVEL[9] TCC_HIT[9] TCC_EA0_WRREQ[10] TCC_EA0_WRREQ_64B[10] TCC_EA0_WRREQ_LEVEL[10] TCC_HIT[10] TCC_EA0_WRREQ[11] TCC_EA0_WRREQ_64B[11] TCC_EA0_WRREQ_LEVEL[11] TCC_HIT[11] TCC_EA0_WRREQ[12] TCC_EA0_WRREQ_64B[12] TCC_EA0_WRREQ_LEVEL[12] TCC_HIT[12] TCC_EA0_WRREQ[13] TCC_EA0_WRREQ_64B[13] TCC_EA0_WRREQ_LEVEL[13] TCC_HIT[13] TCC_EA0_WRREQ[14] TCC_EA0_WRREQ_64B[14] TCC_EA0_WRREQ_LEVEL[14] TCC_HIT[14] TCC_EA0_WRREQ[15] TCC_EA0_WRREQ_64B[15] TCC_EA0_WRREQ_LEVEL[15] TCC_HIT[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_16.txt b/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_16.txt
new file mode 100644
index 0000000000..123269c3f9
--- /dev/null
+++ b/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_16.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_MISS[0] TCC_READ[0] TCC_REQ[0] TCC_RW_REQ[0] TCC_MISS[1] TCC_READ[1] TCC_REQ[1] TCC_RW_REQ[1] TCC_MISS[2] TCC_READ[2] TCC_REQ[2] TCC_RW_REQ[2] TCC_MISS[3] TCC_READ[3] TCC_REQ[3] TCC_RW_REQ[3] TCC_MISS[4] TCC_READ[4] TCC_REQ[4] TCC_RW_REQ[4] TCC_MISS[5] TCC_READ[5] TCC_REQ[5] TCC_RW_REQ[5] TCC_MISS[6] TCC_READ[6] TCC_REQ[6] TCC_RW_REQ[6] TCC_MISS[7] TCC_READ[7] TCC_REQ[7] TCC_RW_REQ[7] TCC_MISS[8] TCC_READ[8] TCC_REQ[8] TCC_RW_REQ[8] TCC_MISS[9] TCC_READ[9] TCC_REQ[9] TCC_RW_REQ[9] TCC_MISS[10] TCC_READ[10] TCC_REQ[10] TCC_RW_REQ[10] TCC_MISS[11] TCC_READ[11] TCC_REQ[11] TCC_RW_REQ[11] TCC_MISS[12] TCC_READ[12] TCC_REQ[12] TCC_RW_REQ[12] TCC_MISS[13] TCC_READ[13] TCC_REQ[13] TCC_RW_REQ[13] TCC_MISS[14] TCC_READ[14] TCC_REQ[14] TCC_RW_REQ[14] TCC_MISS[15] TCC_READ[15] TCC_REQ[15] TCC_RW_REQ[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_17.txt b/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_17.txt
new file mode 100644
index 0000000000..102fb795bd
--- /dev/null
+++ b/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_17.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_TAG_STALL[0] TCC_TOO_MANY_EA_WRREQS_STALL[0] TCC_WRITE[0] TCC_TAG_STALL[1] TCC_TOO_MANY_EA_WRREQS_STALL[1] TCC_WRITE[1] TCC_TAG_STALL[2] TCC_TOO_MANY_EA_WRREQS_STALL[2] TCC_WRITE[2] TCC_TAG_STALL[3] TCC_TOO_MANY_EA_WRREQS_STALL[3] TCC_WRITE[3] TCC_TAG_STALL[4] TCC_TOO_MANY_EA_WRREQS_STALL[4] TCC_WRITE[4] TCC_TAG_STALL[5] TCC_TOO_MANY_EA_WRREQS_STALL[5] TCC_WRITE[5] TCC_TAG_STALL[6] TCC_TOO_MANY_EA_WRREQS_STALL[6] TCC_WRITE[6] TCC_TAG_STALL[7] TCC_TOO_MANY_EA_WRREQS_STALL[7] TCC_WRITE[7] TCC_TAG_STALL[8] TCC_TOO_MANY_EA_WRREQS_STALL[8] TCC_WRITE[8] TCC_TAG_STALL[9] TCC_TOO_MANY_EA_WRREQS_STALL[9] TCC_WRITE[9] TCC_TAG_STALL[10] TCC_TOO_MANY_EA_WRREQS_STALL[10] TCC_WRITE[10] TCC_TAG_STALL[11] TCC_TOO_MANY_EA_WRREQS_STALL[11] TCC_WRITE[11] TCC_TAG_STALL[12] TCC_TOO_MANY_EA_WRREQS_STALL[12] TCC_WRITE[12] TCC_TAG_STALL[13] TCC_TOO_MANY_EA_WRREQS_STALL[13] TCC_WRITE[13] TCC_TAG_STALL[14] TCC_TOO_MANY_EA_WRREQS_STALL[14] TCC_WRITE[14] TCC_TAG_STALL[15] TCC_TOO_MANY_EA_WRREQS_STALL[15] TCC_WRITE[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_2.txt b/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..8ff8201c5a
--- /dev/null
+++ b/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 TCP_VOLATILE_sum TCP_TOTAL_ACCESSES_sum TCP_TOTAL_READ_sum TCP_TOTAL_WRITE_sum TA_BUFFER_ATOMIC_WAVEFRONTS_sum TA_BUFFER_TOTAL_CYCLES_sum TD_ATOMIC_WAVEFRONT_sum TD_STORE_WAVEFRONT_sum SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION CPF_CPF_STAT_IDLE CPF_CPF_TCIU_IDLE TCC_REQ_sum TCC_STREAMING_REQ_sum TCC_HIT_sum TCC_MISS_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_3.txt b/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..cb10e4801d
--- /dev/null
+++ b/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS TCP_TOTAL_ATOMIC_WITH_RET_sum TCP_TOTAL_ATOMIC_WITHOUT_RET_sum TCP_TOTAL_WRITEBACK_INVALIDATES_sum TCP_TOTAL_CACHE_ACCESSES_sum TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES_sum TD_COALESCABLE_WAVEFRONT_sum SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE CPF_CMP_UTCL1_STALL_ON_TRANSLATION TCC_READ_sum TCC_WRITE_sum TCC_ATOMIC_sum TCC_WRITEBACK_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_4.txt b/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..e4e6069e38
--- /dev/null
+++ b/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAIT_ANY SQ_WAIT_INST_ANY SQ_ACTIVE_INST_ANY SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU TCP_UTCL1_TRANSLATION_MISS_sum TCP_UTCL1_TRANSLATION_HIT_sum TCP_UTCL1_PERMISSION_MISS_sum TCP_UTCL1_REQUEST_sum TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_TOTAL_WAVEFRONTS_sum SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE TCC_EA0_WRREQ_sum TCC_EA0_WRREQ_64B_sum TCC_EA0_WR_UNCACHED_32B_sum TCC_EA0_WRREQ_DRAM_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_5.txt b/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..77bd288232
--- /dev/null
+++ b/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_SCA SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU TCP_TCC_READ_REQ_sum TCP_TCC_WRITE_REQ_sum TCP_TCC_ATOMIC_WITH_RET_REQ_sum TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN CPC_ME1_DC0_SPI_BUSY TCC_EA0_RDREQ_sum TCC_EA0_RDREQ_32B_sum TCC_BUBBLE_sum TCC_EA0_RD_UNCACHED_32B_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_6.txt b/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..609c184df8
--- /dev/null
+++ b/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_THREAD_CYCLES_VALU SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 TCP_TCC_NC_READ_REQ_sum TCP_TCC_NC_WRITE_REQ_sum TCP_TCC_NC_ATOMIC_REQ_sum TCP_TCC_UC_READ_REQ_sum TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN TCC_EA0_RDREQ_DRAM_sum TCC_TAG_STALL_sum TCC_NORMAL_WRITEBACK_sum TCC_ALL_TC_OP_WB_WRITEBACK_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_7.txt b/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..5881e5fb8f
--- /dev/null
+++ b/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED TCP_TCC_UC_WRITE_REQ_sum TCP_TCC_UC_ATOMIC_REQ_sum TCP_TCC_CC_READ_REQ_sum TCP_TCC_CC_WRITE_REQ_sum TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR TCC_NORMAL_EVICT_sum TCC_ALL_TC_OP_INV_EVICT_sum TCC_TOO_MANY_EA_WRREQS_STALL_sum TCC_EA0_ATOMIC_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_8.txt b/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..66317384f5
--- /dev/null
+++ b/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES TCP_TCC_CC_ATOMIC_REQ_sum TCP_TCC_RW_READ_REQ_sum TCP_TCC_RW_WRITE_REQ_sum TCP_TCC_RW_ATOMIC_REQ_sum SPI_VWC_CSC_WR SPI_RA_BULKY_CU_FULL_CSN TCC_EA0_RDREQ_LEVEL_sum TCC_EA0_WRREQ_LEVEL_sum TCC_EA0_ATOMIC_LEVEL_sum TCC_EA0_WRREQ_STALL_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_9.txt b/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..60ceab315a
--- /dev/null
+++ b/tests/workloads/device_filter/MI300X_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ TCP_PENDING_STALL_CYCLES_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300X_A1/perfmon/timestamps.txt b/tests/workloads/device_filter/MI300X_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..676cca1b80
--- /dev/null
+++ b/tests/workloads/device_filter/MI300X_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_filter/MI300X_A1/pmc_perf.csv b/tests/workloads/device_filter/MI300X_A1/pmc_perf.csv
new file mode 100644
index 0000000000..17d431dda0
--- /dev/null
+++ b/tests/workloads/device_filter/MI300X_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
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LE[74],TCC_CYCLE[74],TCC_EA0_ATOMIC[74],TCC_ATOMIC[75],TCC_BUBBLE[75],TCC_CYCLE[75],TCC_EA0_ATOMIC[75],TCC_ATOMIC[76],TCC_BUBBLE[76],TCC_CYCLE[76],TCC_EA0_ATOMIC[76],TCC_ATOMIC[77],TCC_BUBBLE[77],TCC_CYCLE[77],TCC_EA0_ATOMIC[77],TCC_ATOMIC[78],TCC_BUBBLE[78],TCC_CYCLE[78],TCC_EA0_ATOMIC[78],TCC_ATOMIC[79],TCC_BUBBLE[79],TCC_CYCLE[79],TCC_EA0_ATOMIC[79],TCC_ATOMIC[80],TCC_BUBBLE[80],TCC_CYCLE[80],TCC_EA0_ATOMIC[80],TCC_ATOMIC[81],TCC_BUBBLE[81],TCC_CYCLE[81],TCC_EA0_ATOMIC[81],TCC_ATOMIC[82],TCC_BUBBLE[82],TCC_CYCLE[82],TCC_EA0_ATOMIC[82],TCC_ATOMIC[83],TCC_BUBBLE[83],TCC_CYCLE[83],TCC_EA0_ATOMIC[83],TCC_ATOMIC[84],TCC_BUBBLE[84],TCC_CYCLE[84],TCC_EA0_ATOMIC[84],TCC_ATOMIC[85],TCC_BUBBLE[85],TCC_CYCLE[85],TCC_EA0_ATOMIC[85],TCC_ATOMIC[86],TCC_BUBBLE[86],TCC_CYCLE[86],TCC_EA0_ATOMIC[86],TCC_ATOMIC[87],TCC_BUBBLE[87],TCC_CYCLE[87],TCC_EA0_ATOMIC[87],TCC_ATOMIC[88],TCC_BUBBLE[88],TCC_CYCLE[88],TCC_EA0_ATOMIC[88],TCC_ATOMIC[89],TCC_BUBBLE[89],TCC_CYCLE[89],TCC_EA0_ATOMIC[89],TCC_ATOMIC[90],TCC_BUBBLE[90],TCC_CYCLE[90],TCC_EA0_ATOMIC[90],TCC_ATOMIC[91],TCC_BUBBLE[91],TCC_CYCLE[91],TCC_EA0_ATOMIC[91],TCC_ATOMIC[92],TCC_BUBBLE[92],TCC_CYCLE[92],TCC_EA0_ATOMIC[92],TCC_ATOMIC[93],TCC_BUBBLE[93],TCC_CYCLE[93],TCC_EA0_ATOMIC[93],TCC_ATOMIC[94],TCC_BUBBLE[94],TCC_CYCLE[94],TCC_EA0_ATOMIC[94],TCC_ATOMIC[95],TCC_BUBBLE[95],TCC_CYCLE[95],TCC_EA0_ATOMIC[95],TCC_ATOMIC[96],TCC_BUBBLE[96],TCC_CYCLE[96],TCC_EA0_ATOMIC[96],TCC_ATOMIC[97],TCC_BUBBLE[97],TCC_CYCLE[97],TCC_EA0_ATOMIC[97],TCC_ATOMIC[98],TCC_BUBBLE[98],TCC_CYCLE[98],TCC_EA0_ATOMIC[98],TCC_ATOMIC[99],TCC_BUBBLE[99],TCC_CYCLE[99],TCC_EA0_ATOMIC[99],TCC_ATOMIC[100],TCC_BUBBLE[100],TCC_CYCLE[100],TCC_EA0_ATOMIC[100],TCC_ATOMIC[101],TCC_BUBBLE[101],TCC_CYCLE[101],TCC_EA0_ATOMIC[101],TCC_ATOMIC[102],TCC_BUBBLE[102],TCC_CYCLE[102],TCC_EA0_ATOMIC[102],TCC_ATOMIC[103],TCC_BUBBLE[103],TCC_CYCLE[103],TCC_EA0_ATOMIC[103],TCC_ATOMIC[104],TCC_BUBBLE[104],TCC_CYCLE[104],TCC_EA0_ATOMIC[104],TCC_ATOMIC[105],TCC_BUBBLE[105],TCC_CYCLE[105],TCC_EA0_ATOMIC[105],TCC_ATOMIC[106],TCC_BUBBLE[106],TCC_CYCLE[106],TCC_EA0_ATOMIC[106],TCC_ATOMIC[107],TCC_BUBBLE[107],TCC_CYCLE[107],TCC_EA0_ATOMIC[107],TCC_ATOMIC[108],TCC_BUBBLE[108],TCC_CYCLE[108],TCC_EA0_ATOMIC[108],TCC_ATOMIC[109],TCC_BUBBLE[109],TCC_CYCLE[109],TCC_EA0_ATOMIC[109],TCC_ATOMIC[110],TCC_BUBBLE[110],TCC_CYCLE[110],TCC_EA0_ATOMIC[110],TCC_ATOMIC[111],TCC_BUBBLE[111],TCC_CYCLE[111],TCC_EA0_ATOMIC[111],TCC_ATOMIC[112],TCC_BUBBLE[112],TCC_CYCLE[112],TCC_EA0_ATOMIC[112],TCC_ATOMIC[113],TCC_BUBBLE[113],TCC_CYCLE[113],TCC_EA0_ATOMIC[113],TCC_ATOMIC[114],TCC_BUBBLE[114],TCC_CYCLE[114],TCC_EA0_ATOMIC[114],TCC_ATOMIC[115],TCC_BUBBLE[115],TCC_CYCLE[115],TCC_EA0_ATOMIC[115],TCC_ATOMIC[116],TCC_BUBBLE[116],TCC_CYCLE[116],TCC_EA0_ATOMIC[116],TCC_ATOMIC[117],TCC_BUBBLE[117],TCC_CYCLE[117],TCC_EA0_ATOMIC[117],TCC_ATOMIC[118],TCC_BUBBLE[118],TCC_CYCLE[118],TCC_EA0_ATOMIC[118],TCC_ATOMIC[119],TCC_BUBBLE[119],TCC_CYCLE[119],TCC_EA0_ATOMIC[119],TCC_ATOMIC[120],TCC_BUBBLE[120],TCC_CYCLE[120],TCC_EA0_ATOMIC[120],TCC_ATOMIC[121],TCC_BUBBLE[121],TCC_CYCLE[121],TCC_EA0_ATOMIC[121],TCC_ATOMIC[122],TCC_BUBBLE[122],TCC_CYCLE[122],TCC_EA0_ATOMIC[122],TCC_ATOMIC[123],TCC_BUBBLE[123],TCC_CYCLE[123],TCC_EA0_ATOMIC[123],TCC_ATOMIC[124],TCC_BUBBLE[124],TCC_CYCLE[124],TCC_EA0_ATOMIC[124],TCC_ATOMIC[125],TCC_BUBBLE[125],TCC_CYCLE[125],TCC_EA0_ATOMIC[125],TCC_ATOMIC[126],TCC_BUBBLE[126],TCC_CYCLE[126],TCC_EA0_ATOMIC[126],TCC_ATOMIC[127],TCC_BUBBLE[127],TCC_CYCLE[127],TCC_EA0_ATOMIC[127],Wave_Size_2,Correlation_ID_2,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,TA_FLAT_ATOMIC_WAVEFRONTS_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,TCC_ALL_TC_OP_INV_EVICT_sum,TCC_EA0_ATOMIC_sum,TCC_NORMAL_EVICT_sum,TCC_TOO_MANY_EA_WRREQS_STALL_sum,TCP_TCC_CC_READ_REQ_sum,TCP_TCC_CC_WRITE_REQ_sum,TCP_TCC_UC_ATOMIC_REQ_sum,TCP_TCC_UC_WRITE_REQ_sum,Wave_Size_3,Correlation_ID_3,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,TCC_EA0_ATOMIC_LEVEL_sum,TCC_EA0_RDREQ_LEVEL_sum,TCC_EA0_WRREQ_LEVEL_sum,TCC_EA0_WRREQ_STALL_sum,TCP_TCC_CC_ATOMIC_REQ_sum,TCP_TCC_RW_ATOMIC_REQ_sum,TCP_TCC_RW_READ_REQ_sum,TCP_TCC_RW_WRITE_REQ_sum,Wave_Size_4,Correlation_ID_4,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SPI_RA_REQ_NO_ALLOC,SPI_RA_REQ_NO_ALLOC_CSN,CPC_CPC_STAT_STALL,CPC_UTCL1_STALL_ON_TRANSLATION,CPF_CPF_STAT_IDLE,CPF_CPF_TCIU_IDLE,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,TA_BUFFER_TOTAL_CYCLES_sum,TCC_HIT_sum,TCC_MISS_sum,TCC_REQ_sum,TCC_STREAMING_REQ_sum,TCP_TOTAL_ACCESSES_sum,TCP_TOTAL_READ_sum,TCP_TOTAL_WRITE_sum,TCP_VOLATILE_sum,TD_ATOMIC_WAVEFRONT_sum,TD_STORE_WAVEFRONT_sum,Wave_Size_5,Correlation_ID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SQ_INST_CYCLES_SALU,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,CPC_ME1_DC0_SPI_BUSY,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,TCC_BUBBLE_sum,TCC_EA0_RDREQ_32B_sum,TCC_EA0_RDREQ_sum,TCC_EA0_RD_UNCACHED_32B_sum,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,TCP_TCC_READ_REQ_sum,TCP_TCC_WRITE_REQ_sum,Start_Timestamp,End_Timestamp
+0,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) 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diff --git a/tests/workloads/device_filter/MI300X_A1/sysinfo.csv b/tests/workloads/device_filter/MI300X_A1/sysinfo.csv
new file mode 100644
index 0000000000..e442600526
--- /dev/null
+++ b/tests/workloads/device_filter/MI300X_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+device_filter,./tests/vcopy -n 1048576 -b 256 -i 3,SQ|LDS|SQC|TA|TD|TCP|TCC|SPI|CPC|CPF,Wed 29 May 2024 12:03:10 PM  (CDT),2,splinter-126-wr-c6,AMD Ryzen 9 7950X 16-Core Processor,"American Megatrends International, LLC.VS2683299N.FD",Ubuntu 22.04.4 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,114656528,,6.2.0-13611,113-MI3SRIOV-001,SPX,NPS1,MI300X_A1,gfx942,32,4096,304,4,32,64,1024,32,2100,1300,2100,1300,128,32,160,4,5324.8,8
diff --git a/tests/workloads/device_filter/MI300X_A1/timestamps.csv b/tests/workloads/device_filter/MI300X_A1/timestamps.csv
new file mode 100644
index 0000000000..44af2f8420
--- /dev/null
+++ b/tests/workloads/device_filter/MI300X_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,60633,1,967084,967084,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716380685145736,716380685161855,0
+2,60633,1,967084,967084,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716380685184013,716380685197573,0
+3,60633,1,967084,967084,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716380685217852,716380685231332,0
diff --git a/tests/workloads/device_inv_int/MI300A_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/device_inv_int/MI300A_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..c8b9ee8230
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300A_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,11995,1,147631,147631,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73775713810508,73775713819482,0,198768.0,198768.0,16384.0,65536.0,30553.0,2437716.0
+1,11995,1,147631,147631,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73775713837269,73775713843599,0,185170.0,185170.0,16384.0,65536.0,13014.0,1048612.0
+2,11995,1,147631,147631,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73775713858742,73775713864711,0,166578.0,166578.0,16384.0,65536.0,13160.0,1048760.0
diff --git a/tests/workloads/device_inv_int/MI300A_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/device_inv_int/MI300A_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..e5da9e716f
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300A_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,11995,1,147642,147642,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73775713810508,73775713819482,0,0.0,0.0,0.0
+1,11995,1,147642,147642,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73775713837269,73775713843599,0,0.0,0.0,0.0
+2,11995,1,147642,147642,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73775713858742,73775713864711,0,0.0,0.0,0.0
diff --git a/tests/workloads/device_inv_int/MI300A_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/device_inv_int/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..c6d5627caf
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,147653,147653,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73775713810508,73775713819482,0,65536.0,295872.0,23626064.0
+1,11995,1,147653,147653,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73775713837269,73775713843599,0,65536.0,312782.0,24988448.0
+2,11995,1,147653,147653,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73775713858742,73775713864711,0,65536.0,210580.0,16805392.0
diff --git a/tests/workloads/device_inv_int/MI300A_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/device_inv_int/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..3d50e51e84
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,147664,147664,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73775713810508,73775713819482,0,32768.0,538994.0,43116484.0
+1,11995,1,147664,147664,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73775713837269,73775713843599,0,32768.0,402738.0,32213296.0
+2,11995,1,147664,147664,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73775713858742,73775713864711,0,32768.0,403310.0,32259720.0
diff --git a/tests/workloads/device_inv_int/MI300A_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/device_inv_int/MI300A_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..b48fd02db2
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300A_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,11995,1,147675,147675,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73775713810508,73775713819482,0,209852.0,209852.0,118131.0,839408.0,16384.0,13412399.0,248440.0,0.0,54053128.0
+1,11995,1,147675,147675,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73775713837269,73775713843599,0,195449.0,195449.0,109420.0,781796.0,16384.0,11478548.0,207429.0,0.0,46306644.0
+2,11995,1,147675,147675,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73775713858742,73775713864711,0,171967.0,171967.0,93464.0,687868.0,16384.0,10057887.0,187792.0,0.0,40635096.0
diff --git a/tests/workloads/device_inv_int/MI300A_A1/log.txt b/tests/workloads/device_inv_int/MI300A_A1/log.txt
new file mode 100644
index 0000000000..8f3140cc4c
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300A_A1/log.txt
@@ -0,0 +1,280 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/device_inv_int/MI300A_A1
+Target: MI300A_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: None
+Hardware Blocks: All
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+[profiling] Current input file: tests/workloads/device_inv_int/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH_LEVEL
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+[profiling] Current input file: tests/workloads/device_inv_int/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+[profiling] Current input file: tests/workloads/device_inv_int/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying the output vector from the GPU to the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Releasing GPU memory
+   |-> [/opt/rocm/bin/rocprofv2] Releasing CPU memory
+   |-> [/opt/rocm/bin/rocprofv2] Results File: "tests/workloads/device_inv_int/MI300A_A1/out/pmc_1/results_SQ_INST_LEVEL_SMEM.csv"
+   |-> [/opt/rocm/bin/rocprofv2] 
+   |-> [/opt/rocm/bin/rocprofv2] The output path for the following counters: tests/workloads/device_inv_int/MI300A_A1/out/pmc_1
+[profiling] Current input file: tests/workloads/device_inv_int/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+[profiling] Current input file: tests/workloads/device_inv_int/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LEVEL_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying the output vector from the GPU to the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Releasing GPU memory
+   |-> [/opt/rocm/bin/rocprofv2] Releasing CPU memory
+   |-> [/opt/rocm/bin/rocprofv2] Results File: "tests/workloads/device_inv_int/MI300A_A1/out/pmc_1/results_SQ_LEVEL_WAVES.csv"
+   |-> [/opt/rocm/bin/rocprofv2] 
+   |-> [/opt/rocm/bin/rocprofv2] The output path for the following counters: tests/workloads/device_inv_int/MI300A_A1/out/pmc_1
+[profiling] Current input file: tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_CVT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_WR
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_RD
+[profiling] Current input file: tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F16
+[profiling] Current input file: tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_HITS
+[profiling] Current input file: tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_HITS
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES_DUPLICATE
+[profiling] Current input file: tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+[profiling] Current input file: tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_13.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[1]
+[profiling] Current input file: tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_14.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[1]
+[profiling] Current input file: tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_15.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[1]
+[profiling] Current input file: tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_16.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[1]
+[profiling] Current input file: tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_17.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[2]
+[profiling] Current input file: tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F64
+[profiling] Current input file: tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_EXP_GDS
+[profiling] Current input file: tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_VALU
+[profiling] Current input file: tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_SCA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_MISC
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_WR
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_RD
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_SMEM
+[profiling] Current input file: tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_THREAD_CYCLES_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ADDR_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_UNALIGNED_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_EQ_64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_64
+[profiling] Current input file: tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ITEMS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_MEM_VIOLATIONS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ATOMIC_RETURN
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_IDX_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_RESTORED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_SAVED
+[profiling] Current input file: tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_VALU_MFMA_BUSY_CYCLES
+[profiling] Current input file: tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_INST_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_READ_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_WRITE_REQ
+[profiling] Current input file: tests/workloads/device_inv_int/MI300A_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/device_inv_int/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/device_inv_int/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..293092f641
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/device_inv_int/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..08439eedce
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/device_inv_int/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..6cca322d4e
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/device_inv_int/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..e527ad31ba
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/device_inv_int/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..3f8e04adb3
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_0.txt b/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..ebc550fbfe
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD GRBM_COUNT GRBM_GUI_ACTIVE TCP_GATE_EN1_sum TCP_GATE_EN2_sum TCP_TD_TCP_STALL_CYCLES_sum TCP_TCR_TCP_STALL_CYCLES_sum TA_TA_BUSY_sum TA_BUFFER_WAVEFRONTS_sum TD_TD_BUSY_sum TD_TC_STALL_sum SPI_CSN_WINDOW_VALID SPI_CSN_BUSY CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE CPF_CPF_STAT_BUSY CPF_CPF_STAT_STALL TCC_CYCLE_sum TCC_BUSY_sum TCC_PROBE_sum TCC_PROBE_ALL_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_1.txt b/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..9ad887ddbb
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 GRBM_SPI_BUSY TCP_READ_TAGCONFLICT_STALL_CYCLES_sum TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum TCP_TA_TCP_STATE_READ_sum TA_BUFFER_READ_WAVEFRONTS_sum TA_BUFFER_WRITE_WAVEFRONTS_sum TD_SPI_STALL_sum TD_LOAD_WAVEFRONT_sum SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE CPC_CPC_TCIU_BUSY CPC_CPC_TCIU_IDLE CPF_CPF_TCIU_BUSY CPF_CPF_TCIU_STALL TCC_NC_REQ_sum TCC_UC_REQ_sum TCC_CC_REQ_sum TCC_RW_REQ_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_10.txt b/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..21c59688f7
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_11.txt b/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..df6d67d7b7
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_12.txt b/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..6e5320c11c
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_13.txt b/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_13.txt
new file mode 100644
index 0000000000..d95492c1cd
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_13.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_ATOMIC[0] TCC_BUBBLE[0] TCC_CYCLE[0] TCC_EA0_ATOMIC[0] TCC_ATOMIC[1] TCC_BUBBLE[1] TCC_CYCLE[1] TCC_EA0_ATOMIC[1] TCC_ATOMIC[2] TCC_BUBBLE[2] TCC_CYCLE[2] TCC_EA0_ATOMIC[2] TCC_ATOMIC[3] TCC_BUBBLE[3] TCC_CYCLE[3] TCC_EA0_ATOMIC[3] TCC_ATOMIC[4] TCC_BUBBLE[4] TCC_CYCLE[4] TCC_EA0_ATOMIC[4] TCC_ATOMIC[5] TCC_BUBBLE[5] TCC_CYCLE[5] TCC_EA0_ATOMIC[5] TCC_ATOMIC[6] TCC_BUBBLE[6] TCC_CYCLE[6] TCC_EA0_ATOMIC[6] TCC_ATOMIC[7] TCC_BUBBLE[7] TCC_CYCLE[7] TCC_EA0_ATOMIC[7] TCC_ATOMIC[8] TCC_BUBBLE[8] TCC_CYCLE[8] TCC_EA0_ATOMIC[8] TCC_ATOMIC[9] TCC_BUBBLE[9] TCC_CYCLE[9] TCC_EA0_ATOMIC[9] TCC_ATOMIC[10] TCC_BUBBLE[10] TCC_CYCLE[10] TCC_EA0_ATOMIC[10] TCC_ATOMIC[11] TCC_BUBBLE[11] TCC_CYCLE[11] TCC_EA0_ATOMIC[11] TCC_ATOMIC[12] TCC_BUBBLE[12] TCC_CYCLE[12] TCC_EA0_ATOMIC[12] TCC_ATOMIC[13] TCC_BUBBLE[13] TCC_CYCLE[13] TCC_EA0_ATOMIC[13] TCC_ATOMIC[14] TCC_BUBBLE[14] TCC_CYCLE[14] TCC_EA0_ATOMIC[14] TCC_ATOMIC[15] TCC_BUBBLE[15] TCC_CYCLE[15] TCC_EA0_ATOMIC[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_14.txt b/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_14.txt
new file mode 100644
index 0000000000..28327b86d3
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_14.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_ATOMIC_LEVEL[0] TCC_EA0_RDREQ[0] TCC_EA0_RDREQ_32B[0] TCC_EA0_RDREQ_LEVEL[0] TCC_EA0_ATOMIC_LEVEL[1] TCC_EA0_RDREQ[1] TCC_EA0_RDREQ_32B[1] TCC_EA0_RDREQ_LEVEL[1] TCC_EA0_ATOMIC_LEVEL[2] TCC_EA0_RDREQ[2] TCC_EA0_RDREQ_32B[2] TCC_EA0_RDREQ_LEVEL[2] TCC_EA0_ATOMIC_LEVEL[3] TCC_EA0_RDREQ[3] TCC_EA0_RDREQ_32B[3] TCC_EA0_RDREQ_LEVEL[3] TCC_EA0_ATOMIC_LEVEL[4] TCC_EA0_RDREQ[4] TCC_EA0_RDREQ_32B[4] TCC_EA0_RDREQ_LEVEL[4] TCC_EA0_ATOMIC_LEVEL[5] TCC_EA0_RDREQ[5] TCC_EA0_RDREQ_32B[5] TCC_EA0_RDREQ_LEVEL[5] TCC_EA0_ATOMIC_LEVEL[6] TCC_EA0_RDREQ[6] TCC_EA0_RDREQ_32B[6] TCC_EA0_RDREQ_LEVEL[6] TCC_EA0_ATOMIC_LEVEL[7] TCC_EA0_RDREQ[7] TCC_EA0_RDREQ_32B[7] TCC_EA0_RDREQ_LEVEL[7] TCC_EA0_ATOMIC_LEVEL[8] TCC_EA0_RDREQ[8] TCC_EA0_RDREQ_32B[8] TCC_EA0_RDREQ_LEVEL[8] TCC_EA0_ATOMIC_LEVEL[9] TCC_EA0_RDREQ[9] TCC_EA0_RDREQ_32B[9] TCC_EA0_RDREQ_LEVEL[9] TCC_EA0_ATOMIC_LEVEL[10] TCC_EA0_RDREQ[10] TCC_EA0_RDREQ_32B[10] TCC_EA0_RDREQ_LEVEL[10] TCC_EA0_ATOMIC_LEVEL[11] TCC_EA0_RDREQ[11] TCC_EA0_RDREQ_32B[11] TCC_EA0_RDREQ_LEVEL[11] TCC_EA0_ATOMIC_LEVEL[12] TCC_EA0_RDREQ[12] TCC_EA0_RDREQ_32B[12] TCC_EA0_RDREQ_LEVEL[12] TCC_EA0_ATOMIC_LEVEL[13] TCC_EA0_RDREQ[13] TCC_EA0_RDREQ_32B[13] TCC_EA0_RDREQ_LEVEL[13] TCC_EA0_ATOMIC_LEVEL[14] TCC_EA0_RDREQ[14] TCC_EA0_RDREQ_32B[14] TCC_EA0_RDREQ_LEVEL[14] TCC_EA0_ATOMIC_LEVEL[15] TCC_EA0_RDREQ[15] TCC_EA0_RDREQ_32B[15] TCC_EA0_RDREQ_LEVEL[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_15.txt b/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_15.txt
new file mode 100644
index 0000000000..033ae877ed
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_15.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_WRREQ[0] TCC_EA0_WRREQ_64B[0] TCC_EA0_WRREQ_LEVEL[0] TCC_HIT[0] TCC_EA0_WRREQ[1] TCC_EA0_WRREQ_64B[1] TCC_EA0_WRREQ_LEVEL[1] TCC_HIT[1] TCC_EA0_WRREQ[2] TCC_EA0_WRREQ_64B[2] TCC_EA0_WRREQ_LEVEL[2] TCC_HIT[2] TCC_EA0_WRREQ[3] TCC_EA0_WRREQ_64B[3] TCC_EA0_WRREQ_LEVEL[3] TCC_HIT[3] TCC_EA0_WRREQ[4] TCC_EA0_WRREQ_64B[4] TCC_EA0_WRREQ_LEVEL[4] TCC_HIT[4] TCC_EA0_WRREQ[5] TCC_EA0_WRREQ_64B[5] TCC_EA0_WRREQ_LEVEL[5] TCC_HIT[5] TCC_EA0_WRREQ[6] TCC_EA0_WRREQ_64B[6] TCC_EA0_WRREQ_LEVEL[6] TCC_HIT[6] TCC_EA0_WRREQ[7] TCC_EA0_WRREQ_64B[7] TCC_EA0_WRREQ_LEVEL[7] TCC_HIT[7] TCC_EA0_WRREQ[8] TCC_EA0_WRREQ_64B[8] TCC_EA0_WRREQ_LEVEL[8] TCC_HIT[8] TCC_EA0_WRREQ[9] TCC_EA0_WRREQ_64B[9] TCC_EA0_WRREQ_LEVEL[9] TCC_HIT[9] TCC_EA0_WRREQ[10] TCC_EA0_WRREQ_64B[10] TCC_EA0_WRREQ_LEVEL[10] TCC_HIT[10] TCC_EA0_WRREQ[11] TCC_EA0_WRREQ_64B[11] TCC_EA0_WRREQ_LEVEL[11] TCC_HIT[11] TCC_EA0_WRREQ[12] TCC_EA0_WRREQ_64B[12] TCC_EA0_WRREQ_LEVEL[12] TCC_HIT[12] TCC_EA0_WRREQ[13] TCC_EA0_WRREQ_64B[13] TCC_EA0_WRREQ_LEVEL[13] TCC_HIT[13] TCC_EA0_WRREQ[14] TCC_EA0_WRREQ_64B[14] TCC_EA0_WRREQ_LEVEL[14] TCC_HIT[14] TCC_EA0_WRREQ[15] TCC_EA0_WRREQ_64B[15] TCC_EA0_WRREQ_LEVEL[15] TCC_HIT[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_16.txt b/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_16.txt
new file mode 100644
index 0000000000..123269c3f9
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_16.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_MISS[0] TCC_READ[0] TCC_REQ[0] TCC_RW_REQ[0] TCC_MISS[1] TCC_READ[1] TCC_REQ[1] TCC_RW_REQ[1] TCC_MISS[2] TCC_READ[2] TCC_REQ[2] TCC_RW_REQ[2] TCC_MISS[3] TCC_READ[3] TCC_REQ[3] TCC_RW_REQ[3] TCC_MISS[4] TCC_READ[4] TCC_REQ[4] TCC_RW_REQ[4] TCC_MISS[5] TCC_READ[5] TCC_REQ[5] TCC_RW_REQ[5] TCC_MISS[6] TCC_READ[6] TCC_REQ[6] TCC_RW_REQ[6] TCC_MISS[7] TCC_READ[7] TCC_REQ[7] TCC_RW_REQ[7] TCC_MISS[8] TCC_READ[8] TCC_REQ[8] TCC_RW_REQ[8] TCC_MISS[9] TCC_READ[9] TCC_REQ[9] TCC_RW_REQ[9] TCC_MISS[10] TCC_READ[10] TCC_REQ[10] TCC_RW_REQ[10] TCC_MISS[11] TCC_READ[11] TCC_REQ[11] TCC_RW_REQ[11] TCC_MISS[12] TCC_READ[12] TCC_REQ[12] TCC_RW_REQ[12] TCC_MISS[13] TCC_READ[13] TCC_REQ[13] TCC_RW_REQ[13] TCC_MISS[14] TCC_READ[14] TCC_REQ[14] TCC_RW_REQ[14] TCC_MISS[15] TCC_READ[15] TCC_REQ[15] TCC_RW_REQ[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_17.txt b/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_17.txt
new file mode 100644
index 0000000000..102fb795bd
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_17.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_TAG_STALL[0] TCC_TOO_MANY_EA_WRREQS_STALL[0] TCC_WRITE[0] TCC_TAG_STALL[1] TCC_TOO_MANY_EA_WRREQS_STALL[1] TCC_WRITE[1] TCC_TAG_STALL[2] TCC_TOO_MANY_EA_WRREQS_STALL[2] TCC_WRITE[2] TCC_TAG_STALL[3] TCC_TOO_MANY_EA_WRREQS_STALL[3] TCC_WRITE[3] TCC_TAG_STALL[4] TCC_TOO_MANY_EA_WRREQS_STALL[4] TCC_WRITE[4] TCC_TAG_STALL[5] TCC_TOO_MANY_EA_WRREQS_STALL[5] TCC_WRITE[5] TCC_TAG_STALL[6] TCC_TOO_MANY_EA_WRREQS_STALL[6] TCC_WRITE[6] TCC_TAG_STALL[7] TCC_TOO_MANY_EA_WRREQS_STALL[7] TCC_WRITE[7] TCC_TAG_STALL[8] TCC_TOO_MANY_EA_WRREQS_STALL[8] TCC_WRITE[8] TCC_TAG_STALL[9] TCC_TOO_MANY_EA_WRREQS_STALL[9] TCC_WRITE[9] TCC_TAG_STALL[10] TCC_TOO_MANY_EA_WRREQS_STALL[10] TCC_WRITE[10] TCC_TAG_STALL[11] TCC_TOO_MANY_EA_WRREQS_STALL[11] TCC_WRITE[11] TCC_TAG_STALL[12] TCC_TOO_MANY_EA_WRREQS_STALL[12] TCC_WRITE[12] TCC_TAG_STALL[13] TCC_TOO_MANY_EA_WRREQS_STALL[13] TCC_WRITE[13] TCC_TAG_STALL[14] TCC_TOO_MANY_EA_WRREQS_STALL[14] TCC_WRITE[14] TCC_TAG_STALL[15] TCC_TOO_MANY_EA_WRREQS_STALL[15] TCC_WRITE[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_2.txt b/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..8ff8201c5a
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 TCP_VOLATILE_sum TCP_TOTAL_ACCESSES_sum TCP_TOTAL_READ_sum TCP_TOTAL_WRITE_sum TA_BUFFER_ATOMIC_WAVEFRONTS_sum TA_BUFFER_TOTAL_CYCLES_sum TD_ATOMIC_WAVEFRONT_sum TD_STORE_WAVEFRONT_sum SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION CPF_CPF_STAT_IDLE CPF_CPF_TCIU_IDLE TCC_REQ_sum TCC_STREAMING_REQ_sum TCC_HIT_sum TCC_MISS_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_3.txt b/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..cb10e4801d
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS TCP_TOTAL_ATOMIC_WITH_RET_sum TCP_TOTAL_ATOMIC_WITHOUT_RET_sum TCP_TOTAL_WRITEBACK_INVALIDATES_sum TCP_TOTAL_CACHE_ACCESSES_sum TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES_sum TD_COALESCABLE_WAVEFRONT_sum SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE CPF_CMP_UTCL1_STALL_ON_TRANSLATION TCC_READ_sum TCC_WRITE_sum TCC_ATOMIC_sum TCC_WRITEBACK_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_4.txt b/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..e4e6069e38
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAIT_ANY SQ_WAIT_INST_ANY SQ_ACTIVE_INST_ANY SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU TCP_UTCL1_TRANSLATION_MISS_sum TCP_UTCL1_TRANSLATION_HIT_sum TCP_UTCL1_PERMISSION_MISS_sum TCP_UTCL1_REQUEST_sum TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_TOTAL_WAVEFRONTS_sum SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE TCC_EA0_WRREQ_sum TCC_EA0_WRREQ_64B_sum TCC_EA0_WR_UNCACHED_32B_sum TCC_EA0_WRREQ_DRAM_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_5.txt b/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..77bd288232
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_SCA SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU TCP_TCC_READ_REQ_sum TCP_TCC_WRITE_REQ_sum TCP_TCC_ATOMIC_WITH_RET_REQ_sum TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN CPC_ME1_DC0_SPI_BUSY TCC_EA0_RDREQ_sum TCC_EA0_RDREQ_32B_sum TCC_BUBBLE_sum TCC_EA0_RD_UNCACHED_32B_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_6.txt b/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..609c184df8
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_THREAD_CYCLES_VALU SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 TCP_TCC_NC_READ_REQ_sum TCP_TCC_NC_WRITE_REQ_sum TCP_TCC_NC_ATOMIC_REQ_sum TCP_TCC_UC_READ_REQ_sum TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN TCC_EA0_RDREQ_DRAM_sum TCC_TAG_STALL_sum TCC_NORMAL_WRITEBACK_sum TCC_ALL_TC_OP_WB_WRITEBACK_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_7.txt b/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..5881e5fb8f
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED TCP_TCC_UC_WRITE_REQ_sum TCP_TCC_UC_ATOMIC_REQ_sum TCP_TCC_CC_READ_REQ_sum TCP_TCC_CC_WRITE_REQ_sum TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR TCC_NORMAL_EVICT_sum TCC_ALL_TC_OP_INV_EVICT_sum TCC_TOO_MANY_EA_WRREQS_STALL_sum TCC_EA0_ATOMIC_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_8.txt b/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..66317384f5
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES TCP_TCC_CC_ATOMIC_REQ_sum TCP_TCC_RW_READ_REQ_sum TCP_TCC_RW_WRITE_REQ_sum TCP_TCC_RW_ATOMIC_REQ_sum SPI_VWC_CSC_WR SPI_RA_BULKY_CU_FULL_CSN TCC_EA0_RDREQ_LEVEL_sum TCC_EA0_WRREQ_LEVEL_sum TCC_EA0_ATOMIC_LEVEL_sum TCC_EA0_WRREQ_STALL_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_9.txt b/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..60ceab315a
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300A_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ TCP_PENDING_STALL_CYCLES_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300A_A1/perfmon/timestamps.txt b/tests/workloads/device_inv_int/MI300A_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..676cca1b80
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300A_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300A_A1/pmc_perf.csv b/tests/workloads/device_inv_int/MI300A_A1/pmc_perf.csv
new file mode 100644
index 0000000000..0061690a22
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300A_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
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CED_WRITE_CYCLES_sum,TCC_ATOMIC_sum,TCC_READ_sum,TCC_WRITEBACK_sum,TCC_WRITE_sum,TCP_TOTAL_ATOMIC_WITHOUT_RET_sum,TCP_TOTAL_ATOMIC_WITH_RET_sum,TCP_TOTAL_CACHE_ACCESSES_sum,TCP_TOTAL_WRITEBACK_INVALIDATES_sum,TD_COALESCABLE_WAVEFRONT_sum,Wave_Size_5,Correlation_ID_5,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,TA_FLAT_ATOMIC_WAVEFRONTS_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,TCC_ALL_TC_OP_INV_EVICT_sum,TCC_EA0_ATOMIC_sum,TCC_NORMAL_EVICT_sum,TCC_TOO_MANY_EA_WRREQS_STALL_sum,TCP_TCC_CC_READ_REQ_sum,TCP_TCC_CC_WRITE_REQ_sum,TCP_TCC_UC_ATOMIC_REQ_sum,TCP_TCC_UC_WRITE_REQ_sum,Wave_Size_6,Correlation_ID_6,XCC_Index_6,TCC_MISS[0],TCC_READ[0],TCC_REQ[0],TCC_RW_REQ[0],TCC_MISS[1],TCC_READ[1],TCC_REQ[1],TCC_RW_REQ[1],TCC_MISS[2],TCC_READ[2],TCC_REQ[2],TCC_RW_REQ[2],TCC_MISS[3],TCC_READ[3],TCC_REQ[3],TCC_RW_REQ[3],TCC_MISS[4],TCC_READ[4],TCC_REQ[4],TCC_RW_REQ[4],TCC_MISS[5],TCC_READ[5],TCC_REQ[5],TCC_RW_REQ[5],TCC_MISS[6],TCC_READ[6],TCC_REQ[6],TCC_RW_REQ[6],TCC_MISS[7],TCC_READ[7],TCC_REQ[7],TCC_RW_REQ[7],TCC_MISS[8],TCC_READ[8],TCC_REQ[8],TCC_RW_REQ[8],TCC_MISS[9],TCC_READ[9],TCC_REQ[9],TCC_RW_REQ[9],TCC_MISS[10],TCC_READ[10],TCC_REQ[10],TCC_RW_REQ[10],TCC_MISS[11],TCC_READ[11],TCC_REQ[11],TCC_RW_REQ[11],TCC_MISS[12],TCC_READ[12],TCC_REQ[12],TCC_RW_REQ[12],TCC_MISS[13],TCC_READ[13],TCC_REQ[13],TCC_RW_REQ[13],TCC_MISS[14],TCC_READ[14],TCC_REQ[14],TCC_RW_REQ[14],TCC_MISS[15],TCC_READ[15],TCC_REQ[15],TCC_RW_REQ[15],TCC_MISS[16],TCC_READ[16],TCC_REQ[16],TCC_RW_REQ[16],TCC_MISS[17],TCC_READ[17],TCC_REQ[17],TCC_RW_REQ[17],TCC_MISS[18],TCC_READ[18],TCC_REQ[18],TCC_RW_REQ[18],TCC_MISS[19],TCC_READ[19],TCC_REQ[19],TCC_RW_REQ[19],TCC_MISS[20],TCC_READ[20],TCC_REQ[20],TCC_RW_REQ[20],TCC_MISS[21],TCC_READ[21],TCC_REQ[21],TCC_RW_REQ[21],TCC_MISS[22],TCC_READ[22],TCC_REQ[22],TCC_RW_REQ[22],TCC_MISS[23],TCC_READ[23],TCC_REQ[23],TCC_RW_REQ[23],TCC_MISS[24],TCC_READ[24],TCC_REQ[24],TCC_RW_REQ[24],TCC_MISS[25],TCC_READ[25],TCC_REQ[25],TCC_RW_REQ[25],TCC_MISS[26],TCC_READ[26],TCC_REQ[26],TCC_RW_REQ[26],TCC_MISS[27],TCC_READ[27],TCC_REQ[27],TCC_RW_REQ[27],TCC_MISS[28],TCC_READ[28],TCC_REQ[28],TCC_RW_REQ[28],TCC_MISS[29],TCC_READ[29],TCC_REQ[29],TCC_RW_REQ[29],TCC_MISS[30],TCC_READ[30],TCC_REQ[30],TCC_RW_REQ[30],TCC_MISS[31],TCC_READ[31],TCC_REQ[31],TCC_RW_REQ[31],TCC_MISS[32],TCC_READ[32],TCC_REQ[32],TCC_RW_REQ[32],TCC_MISS[33],TCC_READ[33],TCC_REQ[33],TCC_RW_REQ[33],TCC_MISS[34],TCC_READ[34],TCC_REQ[34],TCC_RW_REQ[34],TCC_MISS[35],TCC_READ[35],TCC_REQ[35],TCC_RW_REQ[35],TCC_MISS[36],TCC_READ[36],TCC_REQ[36],TCC_RW_REQ[36],TCC_MISS[37],TCC_READ[37],TCC_REQ[37],TCC_RW_REQ[37],TCC_MISS[38],TCC_READ[38],TCC_REQ[38],TCC_RW_REQ[38],TCC_MISS[39],TCC_READ[39],TCC_REQ[39],TCC_RW_REQ[39],TCC_MISS[40],TCC_READ[40],TCC_REQ[40],TCC_RW_REQ[40],TCC_MISS[41],TCC_READ[41],TCC_REQ[41],TCC_RW_REQ[41],TCC_MISS[42],TCC_READ[42],TCC_REQ[42],TCC_RW_REQ[42],TCC_MISS[43],TCC_READ[43],TCC_REQ[43],TCC_RW_REQ[43],TCC_MISS[44],TCC_READ[44],TCC_REQ[44],TCC_RW_REQ[44],TCC_MISS[45],TCC_READ[45],TCC_REQ[45],TCC_RW_REQ[45],TCC_MISS[46],TCC_READ[46],TCC_REQ[46],TCC_RW_REQ[46],TCC_MISS[47],TCC_READ[47],TCC_REQ[47],TCC_RW_REQ[47],TCC_MISS[48],TCC_READ[48],TCC_REQ[48],TCC_RW_REQ[48],TCC_MISS[49],TCC_READ[49],TCC_REQ[49],TCC_RW_REQ[49],TCC_MISS[50],TCC_READ[50],TCC_REQ[50],TCC_RW_REQ[50],TCC_MISS[51],TCC_READ[51],TCC_REQ[51],TCC_RW_REQ[51],TCC_MISS[52],TCC_READ[52],TCC_REQ[52],TCC_RW_REQ[52],TCC_MISS[53],TCC_READ[53],TCC_REQ[53],TCC_RW_REQ[53],TCC_MISS[54],TCC_READ[54],TCC_REQ[54],TCC_RW_REQ[54],TCC_MISS[55],TCC_READ[55],TCC_REQ[55],TCC_RW_REQ[55],TCC_MISS[56],TCC_READ[56],TCC_REQ[56],TCC_RW_REQ[56],TCC_MISS[57],TCC_READ[57],TCC_REQ[57],TCC_RW_REQ[57],TCC_MISS[58],TCC_READ[58],TCC_REQ[58],TCC_RW_REQ[58],TCC_MISS[59],TCC_READ[59],TCC_REQ[59],TCC_RW_REQ[59],TCC_MISS[60],TCC_READ[60],TCC_REQ[60],TCC_RW_REQ[60],TCC_MISS[61],TCC_READ[61],TCC_REQ[61],TCC_RW_REQ[61],TCC_MISS[62],TCC_READ[62],TCC_REQ[62],TCC_RW_REQ[62],TCC_MISS[63],TCC_READ[63],TCC_REQ[63],TCC_RW_REQ[63],TCC_MISS[64],TCC_READ[64],TCC_REQ[64],TCC_RW_REQ[64],TCC_MISS[65],TCC_READ[65],TCC_REQ[65],TCC_RW_REQ[65],TCC_MISS[66],TCC_READ[66],TCC_REQ[66],TCC_RW_REQ[66],TCC_MISS[67],TCC_READ[67],TCC_REQ[67],TCC_RW_REQ[67],TCC_MISS[68],TCC_READ[68],TCC_REQ[68],TCC_RW_REQ[68],TCC_MISS[69],TCC_READ[69],TCC_REQ[69],TCC_RW_REQ[69],TCC_MISS[70],TCC_READ[70],TCC_REQ[70],TCC_RW_REQ[70],TCC_MISS[71],TCC_READ[71],TCC_REQ[71],TCC_RW_REQ[71],TCC_MISS[72],TCC_READ[72],TCC_REQ[72],TCC_RW_REQ[72],TCC_MISS[73],TCC_READ[73],TCC_REQ[73],TCC_RW_REQ[73],TCC_MISS[74],TCC_READ[74],TCC_REQ[74],TCC_RW_REQ[74],TCC_MISS[75],TCC_READ[75],TCC_REQ[75],TCC_RW_REQ[75],TCC_MISS[76],TCC_READ[76],TCC_REQ[76],TCC_RW_REQ[76],TCC_MISS[77],TCC_READ[77],TCC_REQ[77],TCC_RW_REQ[77],TCC_MISS[78],TCC_READ[78],TCC_REQ[78],TCC_RW_REQ[78],TCC_MISS[79],TCC_READ[79],TCC_REQ[79],TCC_RW_REQ[79],TCC_MISS[80],TCC_READ[80],TCC_REQ[80],TCC_RW_REQ[80],TCC_MISS[81],TCC_READ[81],TCC_REQ[81],TCC_RW_REQ[81],TCC_MISS[82],TCC_READ[82],TCC_REQ[82],TCC_RW_REQ[82],TCC_MISS[83],TCC_READ[83],TCC_REQ[83],TCC_RW_REQ[83],TCC_MISS[84],TCC_READ[84],TCC_REQ[84],TCC_RW_REQ[84],TCC_MISS[85],TCC_READ[85],TCC_REQ[85],TCC_RW_REQ[85],TCC_MISS[86],TCC_READ[86],TCC_REQ[86],TCC_RW_REQ[86],TCC_MISS[87],TCC_READ[87],TCC_REQ[87],TCC_RW_REQ[87],TCC_MISS[88],TCC_READ[88],TCC_REQ[88],TCC_RW_REQ[88],TCC_MISS[89],TCC_READ[89],TCC_REQ[89],TCC_RW_REQ[89],TCC_MISS[90],TCC_READ[90],TCC_REQ[90],TCC_RW_REQ[90],TCC_MISS[91],TCC_READ[91],TCC_REQ[91],TCC_RW_REQ[91],TCC_MISS[92],TCC_READ[92],TCC_REQ[92],TCC_RW_REQ[92],TCC_MISS[93],TCC_READ[93],TCC_REQ[93],TCC_RW_REQ[93],TCC_MISS[94],TCC_READ[94],TCC_REQ[94],TCC_RW_REQ[94],TCC_MISS[95],TCC_READ[95],TCC_REQ[95],TCC_RW_REQ[95],Wave_Size_7,Correlation_ID_7,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SPI_RA_REQ_NO_ALLOC,SPI_RA_REQ_NO_ALLOC_CSN,CPC_CPC_STAT_STALL,CPC_UTCL1_STALL_ON_TRANSLATION,CPF_CPF_STAT_IDLE,CPF_CPF_TCIU_IDLE,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,TA_BUFFER_TOTAL_CYCLES_sum,TCC_HIT_sum,TCC_MISS_sum,TCC_REQ_sum,TCC_STREAMING_REQ_sum,TCP_TOTAL_ACCESSES_sum,TCP_TOTAL_READ_sum,TCP_TOTAL_WRITE_sum,TCP_VOLATILE_sum,TD_ATOMIC_WAVEFRONT_sum,TD_STORE_WAVEFRONT_sum,Wave_Size_8,Correlation_ID_8,XCC_Index_8,TCC_ATOMIC[0],TCC_BUBBLE[0],TCC_CYCLE[0],TCC_EA0_ATOMIC[0],TCC_ATOMIC[1],TCC_BUBBLE[1],TCC_CYCLE[1],TCC_EA0_ATOMIC[1],TCC_ATOMIC[2],TCC_BUBBLE[2],TCC_CYCLE[2],TCC_EA0_ATOMIC[2],TCC_ATOMIC[3],TCC_BUBBLE[3],TCC_CYCLE[3],TCC_EA0_ATOMIC[3],TCC_ATOMIC[4],TCC_BUBBLE[4],TCC_CYCLE[4],TCC_EA0_ATOMIC[4],TCC_ATOMIC[5],TCC_BUBBLE[5],TCC_CYCLE[5],TCC_EA0_ATOMIC[5],TCC_ATOMIC[6],TCC_BUBBLE[6],TCC_CYCLE[6],TCC_EA0_ATOMIC[6],TCC_ATOMIC[7],TCC_BUBBLE[7],TCC_CYCLE[7],TCC_EA0_ATOMIC[7],TCC_ATOMIC[8],TCC_BUBBLE[8],TCC_CYCLE[8],TCC_EA0_ATOMIC[8],TCC_ATOMIC[9],TCC_BUBBLE[9],TCC_CYCLE[9],TCC_EA0_ATOMIC[9],TCC_ATOMIC[10],TCC_BUBBLE[10],TCC_CYCLE[10],TCC_EA0_ATOMIC[10],TCC_ATOMIC[11],TCC_BUBBLE[11],TCC_CYCLE[11],TCC_EA0_ATOMIC[11],TCC_ATOMIC[12],TCC_BUBBLE[12],TCC_CYCLE[12],TCC_EA0_ATOMIC[12],TCC_ATOMIC[13],TCC_BUBBLE[13],TCC_CYCLE[13],TCC_EA0_ATOMIC[13],TCC_ATOMIC[14],TCC_BUBBLE[14],TCC_CYCLE[14],TCC_EA0_ATOMIC[14],TCC_ATOMIC[15],TCC_BUBBLE[15],TCC_CYCLE[15],TCC_EA0_ATOMIC[15],TCC_ATOMIC[16],TCC_BUBBLE[16],TCC_CYCLE[16],TCC_EA0_ATOMIC[16],TCC_ATOMIC[17],TCC_BUBBLE[17],TCC_CYCLE[17],TCC_EA0_ATOMIC[17],TCC_ATOMIC[18],TCC_BUBBLE[18],TCC_CYCLE[18],TCC_EA0_ATOMIC[18],TCC_ATOMIC[19],TCC_BUBBLE[19],TCC_CYCLE[19],TCC_EA0_ATOMIC[19],TCC_ATOMIC[20],TCC_BUBBLE[20],TCC_CYCLE[20],TCC_EA0_ATOMIC[20],TCC_ATOMIC[21],TCC_BUBBLE[21],TCC_CYCLE[21],TCC_EA0_ATOMIC[21],TCC_ATOMIC[22],TCC_BUBBLE[22],TCC_CYCLE[22],TCC_EA0_ATOMIC[22],TCC_ATOMIC[23],TCC_BUBBLE[23],TCC_CYCLE[23],TCC_EA0_ATOMIC[23],TCC_ATOMIC[24],TCC_BUBBLE[24],TCC_CYCLE[24],TCC_EA0_ATOMIC[24],TCC_ATOMIC[25],TCC_BUBBLE[25],TCC_CYCLE[25],TCC_EA0_ATOMIC[25],TCC_ATOMIC[26],TCC_BUBBLE[26],TCC_CYCLE[26],TCC_EA0_ATOMIC[26],TCC_ATOMIC[27],TCC_BUBBLE[27],TCC_CYCLE[27],TCC_EA0_ATOMIC[27],TCC_ATOMIC[28],TCC_BUBBLE[28],TCC_CYCLE[28],TCC_EA0_ATOMIC[28],TCC_ATOMIC[29],TCC_BUBBLE[29],TCC_CYCLE[29],TCC_EA0_ATOMIC[29],TCC_ATOMIC[30],TCC_BUBBLE[30],TCC_CYCLE[30],TCC_EA0_ATOMIC[30],TCC_ATOMIC[31],TCC_BUBBLE[31],TCC_CYCLE[31],TCC_EA0_ATOMIC[31],TCC_ATOMIC[32],TCC_BUBBLE[32],TCC_CYCLE[32],TCC_EA0_ATOMIC[32],TCC_ATOMIC[33],TCC_BUBBLE[33],TCC_CYCLE[33],TCC_EA0_ATOMIC[33],TCC_ATOMIC[34],TCC_BUBBLE[34],TCC_CYCLE[34],TCC_EA0_ATOMIC[34],TCC_ATOMIC[35],TCC_BUBBLE[35],TCC_CYCLE[35],TCC_EA0_ATOMIC[35],TCC_ATOMIC[36],TCC_BUBBLE[36],TCC_CYCLE[36],TCC_EA0_ATOMIC[36],TCC_ATOMIC[37],TCC_BUBBLE[37],TCC_CYCLE[37],TCC_EA0_ATOMIC[37],TCC_ATOMIC[38],TCC_BUBBLE[38],TCC_CYCLE[38],TCC_EA0_ATOMIC[38],TCC_ATOMIC[39],TCC_BUBBLE[39],TCC_CYCLE[39],TCC_EA0_ATOMIC[39],TCC_ATOMIC[40],TCC_BUBBLE[40],TCC_CYCLE[40],TCC_EA0_ATOMIC[40],TCC_ATOMIC[41],TCC_BUBBLE[41],TCC_CYCLE[41],TCC_EA0_ATOMIC[41],TCC_ATOMIC[42],TCC_BUBBLE[42],TCC_CYCLE[42],TCC_EA0_ATOMIC[42],TCC_ATOMIC[43],TCC_BUBBLE[43],TCC_CYCLE[43],TCC_EA0_ATOMIC[43],TCC_ATOMIC[44],TCC_BUBBLE[44],TCC_CYCLE[44],TCC_EA0_ATOMIC[44],TCC_ATOMIC[45],TCC_BUBBLE[45],TCC_CYCLE[45],TCC_EA0_ATOMIC[45],TCC_ATOMIC[46],TCC_BUBBLE[46],TCC_CYCLE[46],TCC_EA0_ATOMIC[46],TCC_ATOMIC[47],TCC_BUBBLE[47],TCC_CYCLE[47],TCC_EA0_ATOMIC[47],TCC_ATOMIC[48],TCC_BUBBLE[48],TCC_CYCLE[48],TCC_EA0_ATOMIC[48],TCC_ATOMIC[49],TCC_BUBBLE[49],TCC_CYCLE[49],TCC_EA0_ATOMIC[49],TCC_ATOMIC[50],TCC_BUBBLE[50],TCC_CYCLE[50],TCC_EA0_ATOMIC[50],TCC_ATOMIC[51],TCC_BUBBLE[51],TCC_CYCLE[51],TCC_EA0_ATOMIC[51],TCC_ATOMIC[52],TCC_BUBBLE[52],TCC_CYCLE[52],TCC_EA0_ATOMIC[52],TCC_ATOMIC[53],TCC_BUBBLE[53],TCC_CYCLE[53],TCC_EA0_ATOMIC[53],TCC_ATOMIC[54],TCC_BUBBLE[54],TCC_CYCLE[54],TCC_EA0_ATOMIC[54],TCC_ATOMIC[55],TCC_BUBBLE[55],TCC_CYCLE[55],TCC_EA0_ATOMIC[55],TCC_ATOMIC[56],TCC_BUBBLE[56],TCC_CYCLE[56],TCC_EA0_ATOMIC[56],TCC_ATOMIC[57],TCC_BUBBLE[57],TCC_CYCLE[57],TCC_EA0_ATOMIC[57],TCC_ATOMIC[58],TCC_BUBBLE[58],TCC_CYCLE[58],TCC_EA0_ATOMIC[58],TCC_ATOMIC[59],TCC_BUBBLE[59],TCC_CYCLE[59],TCC_EA0_ATOMIC[59],TCC_ATOMIC[60],TCC_BUBBLE[60],TCC_CYCLE[60],TCC_EA0_ATOMIC[60],TCC_ATOMIC[61],TCC_BUBBLE[61],TCC_CYCLE[61],TCC_EA0_ATOMIC[61],TCC_ATOMIC[62],TCC_BUBBLE[62],TCC_CYCLE[62],TCC_EA0_ATOMIC[62],TCC_ATOMIC[63],TCC_BUBBLE[63],TCC_CYCLE[63],TCC_EA0_ATOMIC[63],TCC_ATOMIC[64],TCC_BUBBLE[64],TCC_CYCLE[64],TCC_EA0_ATOMIC[64],TCC_ATOMIC[65],TCC_BUBBLE[65],TCC_CYCLE[65],TCC_EA0_ATOMIC[65],TCC_ATOMIC[66],TCC_BUBBLE[66],TCC_CYCLE[66],TCC_EA0_ATOMIC[66],TCC_ATOMIC[67],TCC_BUBBLE[67],TCC_CYCLE[67],TCC_EA0_ATOMIC[67],TCC_ATOMIC[68],TCC_BUBBLE[68],TCC_CYCLE[68],TCC_EA0_ATOMIC[68],TCC_ATOMIC[69],TCC_BUBBLE[69],TCC_CYCLE[69],TCC_EA0_ATOMIC[69],TCC_ATOMIC[70],TCC_BUBBLE[70],TCC_CYCLE[70],TCC_EA0_ATOMIC[70],TCC_ATOMIC[71],TCC_BUBBLE[71],TCC_CYCLE[71],TCC_EA0_ATOMIC[71],TCC_ATOMIC[72],TCC_BUBBLE[72],TCC_CYCLE[72],TCC_EA0_ATOMIC[72],TCC_ATOMIC[73],TCC_BUBBLE[73],TCC_CYCLE[73],TCC_EA0_ATOMIC[73],TCC_ATOMIC[74],TCC_BUBBLE[74],TCC_CYCLE[74],TCC_EA0_ATOMIC[74],TCC_ATOMIC[75],TCC_BUBBLE[75],TCC_CYCLE[75],TCC_EA0_ATOMIC[75],TCC_ATOMIC[76],TCC_BUBBLE[76],TCC_CYCLE[76],TCC_EA0_ATOMIC[76],TCC_ATOMIC[77],TCC_BUBBLE[77],TCC_CYCLE[77],TCC_EA0_ATOMIC[77],TCC_ATOMIC[78],TCC_BUBBLE[78],TCC_CYCLE[78],TCC_EA0_ATOMIC[78],TCC_ATOMIC[79],TCC_BUBBLE[79],TCC_CYCLE[79],TCC_EA0_ATOMIC[79],TCC_ATOMIC[80],TCC_BUBBLE[80],TCC_CYCLE[80],TCC_EA0_ATOMIC[80],TCC_ATOMIC[81],TCC_BUBBLE[81],TCC_CYCLE[81],TCC_EA0_ATOMIC[81],TCC_ATOMIC[82],TCC_BUBBLE[82],TCC_CYCLE[82],TCC_EA0_ATOMIC[82],TCC_ATOMIC[83],TCC_BUBBLE[83],TCC_CYCLE[83],TCC_EA0_ATOMIC[83],TCC_ATOMIC[84],TCC_BUBBLE[84],TCC_CYCLE[84],TCC_EA0_ATOMIC[84],TCC_ATOMIC[85],TCC_BUBBLE[85],TCC_CYCLE[85],TCC_EA0_ATOMIC[85],TCC_ATOMIC[86],TCC_BUBBLE[86],TCC_CYCLE[86],TCC_EA0_ATOMIC[86],TCC_ATOMIC[87],TCC_BUBBLE[87],TCC_CYCLE[87],TCC_EA0_ATOMIC[87],TCC_ATOMIC[88],TCC_BUBBLE[88],TCC_CYCLE[88],TCC_EA0_ATOMIC[88],TCC_ATOMIC[89],TCC_BUBBLE[89],TCC_CYCLE[89],TCC_EA0_ATOMIC[89],TCC_ATOMIC[90],TCC_BUBBLE[90],TCC_CYCLE[90],TCC_EA0_ATOMIC[90],TCC_ATOMIC[91],TCC_BUBBLE[91],TCC_CYCLE[91],TCC_EA0_ATOMIC[91],TCC_ATOMIC[92],TCC_BUBBLE[92],TCC_CYCLE[92],TCC_EA0_ATOMIC[92],TCC_ATOMIC[93],TCC_BUBBLE[93],TCC_CYCLE[93],TCC_EA0_ATOMIC[93],TCC_ATOMIC[94],TCC_BUBBLE[94],TCC_CYCLE[94],TCC_EA0_ATOMIC[94],TCC_ATOMIC[95],TCC_BUBBLE[95],TCC_CYCLE[95],TCC_EA0_ATOMIC[95],Wave_Size_9,Correlation_ID_9,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_10,Correlation_ID_10,SQC_TC_DATA_ATOMIC_REQ,SQC_TC_STALL,SQC_TC_REQ,SQC_DCACHE_REQ_READ_16,SQC_ICACHE_REQ,SQC_ICACHE_HITS,SQC_ICACHE_MISSES,SQC_ICACHE_MISSES_DUPLICATE,Wave_Size_11,Correlation_ID_11,SQ_INSTS_VALU_MFMA_MOPS_I8,SQ_INSTS_VALU_MFMA_MOPS_F16,SQ_INSTS_VALU_MFMA_MOPS_BF16,SQ_INSTS_VALU_MFMA_MOPS_F32,SQ_INSTS_VALU_MFMA_MOPS_F64,SQC_TC_INST_REQ,SQC_TC_DATA_READ_REQ,SQC_TC_DATA_WRITE_REQ,TCP_PENDING_STALL_CYCLES_sum,Wave_Size_12,Correlation_ID_12,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,TCC_EA0_ATOMIC_LEVEL_sum,TCC_EA0_RDREQ_LEVEL_sum,TCC_EA0_WRREQ_LEVEL_sum,TCC_EA0_WRREQ_STALL_sum,TCP_TCC_CC_ATOMIC_REQ_sum,TCP_TCC_RW_ATOMIC_REQ_sum,TCP_TCC_RW_READ_REQ_sum,TCP_TCC_RW_WRITE_REQ_sum,Wave_Size_13,Correlation_ID_13,SQC_DCACHE_REQ_READ_2,SQC_DCACHE_REQ_READ_4,Wave_Size_14,Correlation_ID_14,SQ_ACTIVE_INST_SCA,SQ_ACTIVE_INST_EXP_GDS,SQ_ACTIVE_INST_MISC,SQ_ACTIVE_INST_FLAT,SQ_INST_CYCLES_VMEM_WR,SQ_INST_CYCLES_VMEM_RD,SQ_INST_CYCLES_SMEM,SQ_INST_CYCLES_SALU,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,CPC_ME1_DC0_SPI_BUSY,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,TCC_BUBBLE_sum,TCC_EA0_RDREQ_32B_sum,TCC_EA0_RDREQ_sum,TCC_EA0_RD_UNCACHED_32B_sum,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,TCP_TCC_READ_REQ_sum,TCP_TCC_WRITE_REQ_sum,Wave_Size_15,Correlation_ID_15,XCC_Index_15,TCC_EA0_ATOMIC_LEVEL[0],TCC_EA0_RDREQ[0],TCC_EA0_RDREQ_32B[0],TCC_EA0_RDREQ_LEVEL[0],TCC_EA0_ATOMIC_LEVEL[1],TCC_EA0_RDREQ[1],TCC_EA0_RDREQ_32B[1],TCC_EA0_RDREQ_LEVEL[1],TCC_EA0_ATOMIC_LEVEL[2],TCC_EA0_RDREQ[2],TCC_EA0_RDREQ_32B[2],TCC_EA0_RDREQ_LEVEL[2],TCC_EA0_ATOMIC_LEVEL[3],TCC_EA0_RDREQ[3],TCC_EA0_RDREQ_32B[3],TCC_EA0_RDREQ_LEVEL[3],TCC_EA0_ATOMIC_LEVEL[4],TCC_EA0_RDREQ[4],TCC_EA0_RDREQ_32B[4],TCC_EA0_RDREQ_LEVEL[4],TCC_EA0_ATOMIC_LEVEL[5],TCC_EA0_RDREQ[5],TCC_EA0_RDREQ_32B[5],TCC_EA0_RDREQ_LEVEL[5],TCC_EA0_ATOMIC_LEVEL[6],TCC_EA0_RDREQ[6],TCC_EA0_RDREQ_32B[6],TCC_EA0_RDREQ_LEVEL[6],TCC_EA0_ATOMIC_LEVEL[7],TCC_EA0_RDREQ[7],TCC_EA0_RDREQ_32B[7],TCC_EA0_RDREQ_LEVEL[7],TCC_EA0_ATOMIC_LEVEL[8],TCC_EA0_RDREQ[8],TCC_EA0_RDREQ_32B[8],TCC_EA0_RDREQ_LEVEL[8],TCC_EA0_ATOMIC_LEVEL[9],TCC_EA0_RDREQ[9],TCC_EA0_RDREQ_32B[9],TCC_EA0_RDREQ_LEVEL[9],TCC_EA0_ATOMIC_LEVEL[10],TCC_EA0_RDREQ[10],TCC_EA0_RDREQ_32B[10],TCC_EA0_RDREQ_LEVEL[10],TCC_EA0_ATOMIC_LEVEL[11],TCC_EA0_RDREQ[11],TCC_EA0_RDREQ_32B[11],TCC_EA0_RDREQ_LEVEL[11],TCC_EA0_ATOMIC_LEVEL[12],TCC_EA0_RDREQ[12],TCC_EA0_RDREQ_32B[12],TCC_EA0_RDREQ_LEVEL[12],TCC_EA0_ATOMIC_LEVEL[13],TCC_EA0_RDREQ[13],TCC_EA0_RDREQ_32B[13],TCC_EA0_RDREQ_LEVEL[13],TCC_EA0_ATOMIC_LEVEL[14],TCC_EA0_RDREQ[14],TCC_EA0_RDREQ_32B[14],TCC_EA0_RDREQ_LEVEL[14],TCC_EA0_ATOMIC_LEVEL[15],TCC_EA0_RDREQ[15],TCC_EA0_RDREQ_32B[15],TCC_EA0_RDREQ_LEVEL[15],TCC_EA0_ATOMIC_LEVEL[16],TCC_EA0_RDREQ[16],TCC_EA0_RDREQ_32B[16],TCC_EA0_RDREQ_LEVEL[16],TCC_EA0_ATOMIC_LEVEL[17],TCC_EA0_RDREQ[17],TCC_EA0_RDREQ_32B[17],TCC_EA0_RDREQ_LEVEL[17],TCC_EA0_ATOMIC_LEVEL[18],TCC_EA0_RDREQ[18],TCC_EA0_RDREQ_32B[18],TCC_EA0_RDREQ_LEVEL[18],TCC_EA0_ATOMIC_LEVEL[19],TCC_EA0_RDREQ[19],TCC_EA0_RDREQ_32B[19],TCC_EA0_RDREQ_LEVEL[19],TCC_EA0_ATOMIC_LEVEL[20],TCC_EA0_RDREQ[20],TCC_EA0_RDREQ_32B[20],TCC_EA0_RDREQ_LEVEL[20],TCC_EA0_ATOMIC_LEVEL[21],TCC_EA0_RDREQ[21],TCC_EA0_RDREQ_32B[21],TCC_EA0_RDREQ_LEVEL[21],TCC_EA0_ATOMIC_LEVEL[22],TCC_EA0_RDREQ[22],TCC_EA0_RDREQ_32B[22],TCC_EA0_RDREQ_LEVEL[22],TCC_EA0_ATOMIC_LEVEL[23],TCC_EA0_RDREQ[23],TCC_EA0_RDREQ_32B[23],TCC_EA0_RDREQ_LEVEL[23],TCC_EA0_ATOMIC_LEVEL[24],TCC_EA0_RDREQ[24],TCC_EA0_RDREQ_32B[24],TCC_EA0_RDREQ_LEVEL[24],TCC_EA0_ATOMIC_LEVEL[25],TCC_EA0_RDREQ[25],TCC_EA0_RDREQ_32B[25],TCC_EA0_RDREQ_LEVEL[25],TCC_EA0_ATOMIC_LEVEL[26],TCC_EA0_RDREQ[26],TCC_EA0_RDREQ_32B[26],TCC_EA0_RDREQ_LEVEL[26],TCC_EA0_ATOMIC_LEVEL[27],TCC_EA0_RDREQ[27],TCC_EA0_RDREQ_32B[27],TCC_EA0_RDREQ_LEVEL[27],TCC_EA0_ATOMIC_LEVEL[28],TCC_EA0_RDREQ[28],TCC_EA0_RDREQ_32B[28],TCC_EA0_RDREQ_LEVEL[28],TCC_EA0_ATOMIC_LEVEL[29],TCC_EA0_RDREQ[29],TCC_EA0_RDREQ_32B[29],TCC_EA0_RDREQ_LEVEL[29],TCC_EA0_ATOMIC_LEVEL[30],TCC_EA0_RDREQ[30],TCC_EA0_RDREQ_32B[30],TCC_EA0_RDREQ_LEVEL[30],TCC_EA0_ATOMIC_LEVEL[31],TCC_EA0_RDREQ[31],TCC_EA0_RDREQ_32B[31],TCC_EA0_RDREQ_LEVEL[31],TCC_EA0_ATOMIC_LEVEL[32],TCC_EA0_RDREQ[32],TCC_EA0_RDREQ_32B[32],TCC_EA0_RDREQ_LEVEL[32],TCC_EA0_ATOMIC_LEVEL[33],TCC_EA0_RDREQ[33],TCC_EA0_RDREQ_32B[33],TCC_EA0_RDREQ_LEVEL[33],TCC_EA0_ATOMIC_LEVEL[34],TCC_EA0_RDREQ[34],TCC_EA0_RDREQ_32B[34],TCC_EA0_RDREQ_LEVEL[34],TCC_EA0_ATOMIC_LEVEL[35],TCC_EA0_RDREQ[35],TCC_EA0_RDREQ_32B[35],TCC_EA0_RDREQ_LEVEL[35],TCC_EA0_ATOMIC_LEVEL[36],TCC_EA0_RDREQ[36],TCC_EA0_RDREQ_32B[36],TCC_EA0_RDREQ_LEVEL[36],TCC_EA0_ATOMIC_LEVEL[37],TCC_EA0_RDREQ[37],TCC_EA0_RDREQ_32B[37],TCC_EA0_RDREQ_LEVEL[37],TCC_EA0_ATOMIC_LEVEL[38],TCC_EA0_RDREQ[38],TCC_EA0_RDREQ_32B[38],TCC_EA0_RDREQ_LEVEL[38],TCC_EA0_ATOMIC_LEVEL[39],TCC_EA0_RDREQ[39],TCC_EA0_RDREQ_32B[39],TCC_EA0_RDREQ_LEVEL[39],TCC_EA0_ATOMIC_LEVEL[40],TCC_EA0_RDREQ[40],TCC_EA0_RDREQ_32B[40],TCC_EA0_RDREQ_LEVEL[40],TCC_EA0_ATOMIC_LEVEL[41],TCC_EA0_RDREQ[41],TCC_EA0_RDREQ_32B[41],TCC_EA0_RDREQ_LEVEL[41],TCC_EA0_ATOMIC_LEVEL[42],TCC_EA0_RDREQ[42],TCC_EA0_RDREQ_32B[42],TCC_EA0_RDREQ_LEVEL[42],TCC_EA0_ATOMIC_LEVEL[43],TCC_EA0_RDREQ[43],TCC_EA0_RDREQ_32B[43],TCC_EA0_RDREQ_LEVEL[43],TCC_EA0_ATOMIC_LEVEL[44],TCC_EA0_RDREQ[44],TCC_EA0_RDREQ_32B[44],TCC_EA0_RDREQ_LEVEL[44],TCC_EA0_ATOMIC_LEVEL[45],TCC_EA0_RDREQ[45],TCC_EA0_RDREQ_32B[45],TCC_EA0_RDREQ_LEVEL[45],TCC_EA0_ATOMIC_LEVEL[46],TCC_EA0_RDREQ[46],TCC_EA0_RDREQ_32B[46],TCC_EA0_RDREQ_LEVEL[46],TCC_EA0_ATOMIC_LEVEL[47],TCC_EA0_RDREQ[47],TCC_EA0_RDREQ_32B[47],TCC_EA0_RDREQ_LEVEL[47],TCC_EA0_ATOMIC_LEVEL[48],TCC_EA0_RDREQ[48],TCC_EA0_RDREQ_32B[48],TCC_EA0_RDREQ_LEVEL[48],TCC_EA0_ATOMIC_LEVEL[49],TCC_EA0_RDREQ[49],TCC_EA0_RDREQ_32B[49],TCC_EA0_RDREQ_LEVEL[49],TCC_EA0_ATOMIC_LEVEL[50],TCC_EA0_RDREQ[50],TCC_EA0_RDREQ_32B[50],TCC_EA0_RDREQ_LEVEL[50],TCC_EA0_ATOMIC_LEVEL[51],TCC_EA0_RDREQ[51],TCC_EA0_RDREQ_32B[51],TCC_EA0_RDREQ_LEVEL[51],TCC_EA0_ATOMIC_LEVEL[52],TCC_EA0_RDREQ[52],TCC_EA0_RDREQ_32B[52],TCC_EA0_RDREQ_LEVEL[52],TCC_EA0_ATOMIC_LEVEL[53],TCC_EA0_RDREQ[53],TCC_EA0_RDREQ_32B[53],TCC_EA0_RDREQ_LEVEL[53],TCC_EA0_ATOMIC_LEVEL[54],TCC_EA0_RDREQ[54],TCC_EA0_RDREQ_32B[54],TCC_EA0_RDREQ_LEVEL[54],TCC_EA0_ATOMIC_LEVEL[55],TCC_EA0_RDREQ[55],TCC_EA0_RDREQ_32B[55],TCC_EA0_RDREQ_LEVEL[55],TCC_EA0_ATOMIC_LEVEL[56],TCC_EA0_RDREQ[56],TCC_EA0_RDREQ_32B[56],TCC_EA0_RDREQ_LEVEL[56],TCC_EA0_ATOMIC_LEVEL[57],TCC_EA0_RDREQ[57],TCC_EA0_RDREQ_32B[57],TCC_EA0_RDREQ_LEVEL[57],TCC_EA0_ATOMIC_LEVEL[58],TCC_EA0_RDREQ[58],TCC_EA0_RDREQ_32B[58],TCC_EA0_RDREQ_LEVEL[58],TCC_EA0_ATOMIC_LEVEL[59],TCC_EA0_RDREQ[59],TCC_EA0_RDREQ_32B[59],TCC_EA0_RDREQ_LEVEL[59],TCC_EA0_ATOMIC_LEVEL[60],TCC_EA0_RDREQ[60],TCC_EA0_RDREQ_32B[60],TCC_EA0_RDREQ_LEVEL[60],TCC_EA0_ATOMIC_LEVEL[61],TCC_EA0_RDREQ[61],TCC_EA0_RDREQ_32B[61],TCC_EA0_RDREQ_LEVEL[61],TCC_EA0_ATOMIC_LEVEL[62],TCC_EA0_RDREQ[62],TCC_EA0_RDREQ_32B[62],TCC_EA0_RDREQ_LEVEL[62],TCC_EA0_ATOMIC_LEVEL[63],TCC_EA0_RDREQ[63],TCC_EA0_RDREQ_32B[63],TCC_EA0_RDREQ_LEVEL[63],TCC_EA0_ATOMIC_LEVEL[64],TCC_EA0_RDREQ[64],TCC_EA0_RDREQ_32B[64],TCC_EA0_RDREQ_LEVEL[64],TCC_EA0_ATOMIC_LEVEL[65],TCC_EA0_RDREQ[65],TCC_EA0_RDREQ_32B[65],TCC_EA0_RDREQ_LEVEL[65],TCC_EA0_ATOMIC_LEVEL[66],TCC_EA0_RDREQ[66],TCC_EA0_RDREQ_32B[66],TCC_EA0_RDREQ_LEVEL[66],TCC_EA0_ATOMIC_LEVEL[67],TCC_EA0_RDREQ[67],TCC_EA0_RDREQ_32B[67],TCC_EA0_RDREQ_LEVEL[67],TCC_EA0_ATOMIC_LEVEL[68],TCC_EA0_RDREQ[68],TCC_EA0_RDREQ_32B[68],TCC_EA0_RDREQ_LEVEL[68],TCC_EA0_ATOMIC_LEVEL[69],TCC_EA0_RDREQ[69],TCC_EA0_RDREQ_32B[69],TCC_EA0_RDREQ_LEVEL[69],TCC_EA0_ATOMIC_LEVEL[70],TCC_EA0_RDREQ[70],TCC_EA0_RDREQ_32B[70],TCC_EA0_RDREQ_LEVEL[70],TCC_EA0_ATOMIC_LEVEL[71],TCC_EA0_RDREQ[71],TCC_EA0_RDREQ_32B[71],TCC_EA0_RDREQ_LEVEL[71],TCC_EA0_ATOMIC_LEVEL[72],TCC_EA0_RDREQ[72],TCC_EA0_RDREQ_32B[72],TCC_EA0_RDREQ_LEVEL[72],TCC_EA0_ATOMIC_LEVEL[73],TCC_EA0_RDREQ[73],TCC_EA0_RDREQ_32B[73],TCC_EA0_RDREQ_LEVEL[73],TCC_EA0_ATOMIC_LEVEL[74],TCC_EA0_RDREQ[74],TCC_EA0_RDREQ_32B[74],TCC_EA0_RDREQ_LEVEL[74],TCC_EA0_ATOMIC_LEVEL[75],TCC_EA0_RDREQ[75],TCC_EA0_RDREQ_32B[75],TCC_EA0_RDREQ_LEVEL[75],TCC_EA0_ATOMIC_LEVEL[76],TCC_EA0_RDREQ[76],TCC_EA0_RDREQ_32B[76],TCC_EA0_RDREQ_LEVEL[76],TCC_EA0_ATOMIC_LEVEL[77],TCC_EA0_RDREQ[77],TCC_EA0_RDREQ_32B[77],TCC_EA0_RDREQ_LEVEL[77],TCC_EA0_ATOMIC_LEVEL[78],TCC_EA0_RDREQ[78],TCC_EA0_RDREQ_32B[78],TCC_EA0_RDREQ_LEVEL[78],TCC_EA0_ATOMIC_LEVEL[79],TCC_EA0_RDREQ[79],TCC_EA0_RDREQ_32B[79],TCC_EA0_RDREQ_LEVEL[79],TCC_EA0_ATOMIC_LEVEL[80],TCC_EA0_RDREQ[80],TCC_EA0_RDREQ_32B[80],TCC_EA0_RDREQ_LEVEL[80],TCC_EA0_ATOMIC_LEVEL[81],TCC_EA0_RDREQ[81],TCC_EA0_RDREQ_32B[81],TCC_EA0_RDREQ_LEVEL[81],TCC_EA0_ATOMIC_LEVEL[82],TCC_EA0_RDREQ[82],TCC_EA0_RDREQ_32B[82],TCC_EA0_RDREQ_LEVEL[82],TCC_EA0_ATOMIC_LEVEL[83],TCC_EA0_RDREQ[83],TCC_EA0_RDREQ_32B[83],TCC_EA0_RDREQ_LEVEL[83],TCC_EA0_ATOMIC_LEVEL[84],TCC_EA0_RDREQ[84],TCC_EA0_RDREQ_32B[84],TCC_EA0_RDREQ_LEVEL[84],TCC_EA0_ATOMIC_LEVEL[85],TCC_EA0_RDREQ[85],TCC_EA0_RDREQ_32B[85],TCC_EA0_RDREQ_LEVEL[85],TCC_EA0_ATOMIC_LEVEL[86],TCC_EA0_RDREQ[86],TCC_EA0_RDREQ_32B[86],TCC_EA0_RDREQ_LEVEL[86],TCC_EA0_ATOMIC_LEVEL[87],TCC_EA0_RDREQ[87],TCC_EA0_RDREQ_32B[87],TCC_EA0_RDREQ_LEVEL[87],TCC_EA0_ATOMIC_LEVEL[88],TCC_EA0_RDREQ[88],TCC_EA0_RDREQ_32B[88],TCC_EA0_RDREQ_LEVEL[88],TCC_EA0_ATOMIC_LEVEL[89],TCC_EA0_RDREQ[89],TCC_EA0_RDREQ_32B[89],TCC_EA0_RDREQ_LEVEL[89],TCC_EA0_ATOMIC_LEVEL[90],TCC_EA0_RDREQ[90],TCC_EA0_RDREQ_32B[90],TCC_EA0_RDREQ_LEVEL[90],TCC_EA0_ATOMIC_LEVEL[91],TCC_EA0_RDREQ[91],TCC_EA0_RDREQ_32B[91],TCC_EA0_RDREQ_LEVEL[91],TCC_EA0_ATOMIC_LEVEL[92],TCC_EA0_RDREQ[92],TCC_EA0_RDREQ_32B[92],TCC_EA0_RDREQ_LEVEL[92],TCC_EA0_ATOMIC_LEVEL[93],TCC_EA0_RDREQ[93],TCC_EA0_RDREQ_32B[93],TCC_EA0_RDREQ_LEVEL[93],TCC_EA0_ATOMIC_LEVEL[94],TCC_EA0_RDREQ[94],TCC_EA0_RDREQ_32B[94],TCC_EA0_RDREQ_LEVEL[94],TCC_EA0_ATOMIC_LEVEL[95],TCC_EA0_RDREQ[95],TCC_EA0_RDREQ_32B[95],TCC_EA0_RDREQ_LEVEL[95],Wave_Size_16,Correlation_ID_16,SQ_INSTS_VMEM,SQ_INSTS_SALU,SQ_INSTS_VSKIPPED,SQ_INSTS,SQ_INSTS_VALU,SQ_INSTS_VALU_ADD_F16,SQ_INSTS_VALU_MUL_F16,SQ_INSTS_VALU_FMA_F16,GRBM_SPI_BUSY,SPI_CSN_NUM_THREADGROUPS,SPI_CSN_WAVE,CPC_CPC_TCIU_BUSY,CPC_CPC_TCIU_IDLE,CPF_CPF_TCIU_BUSY,CPF_CPF_TCIU_STALL,TA_BUFFER_READ_WAVEFRONTS_sum,TA_BUFFER_WRITE_WAVEFRONTS_sum,TCC_CC_REQ_sum,TCC_NC_REQ_sum,TCC_RW_REQ_sum,TCC_UC_REQ_sum,TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum,TCP_READ_TAGCONFLICT_STALL_CYCLES_sum,TCP_TA_TCP_STATE_READ_sum,TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum,TD_LOAD_WAVEFRONT_sum,TD_SPI_STALL_sum,Wave_Size_17,Correlation_ID_17,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_BUSY_CU_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_INSTS_VALU_CVT,SQ_INSTS_VMEM_WR,SQ_INSTS_VMEM_RD,GRBM_COUNT,GRBM_GUI_ACTIVE,SPI_CSN_WINDOW_VALID,SPI_CSN_BUSY,CPC_CPC_STAT_BUSY,CPC_CPC_STAT_IDLE,CPF_CPF_STAT_BUSY,CPF_CPF_STAT_STALL,TA_BUFFER_WAVEFRONTS_sum,TA_TA_BUSY_sum,TCC_BUSY_sum,TCC_CYCLE_sum,TCC_PROBE_ALL_sum,TCC_PROBE_sum,TCP_GATE_EN1_sum,TCP_GATE_EN2_sum,TCP_TCR_TCP_STALL_CYCLES_sum,TCP_TD_TCP_STALL_CYCLES_sum,TD_TC_STALL_sum,TD_TD_BUSY_sum,Start_Timestamp,End_Timestamp
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diff --git a/tests/workloads/device_inv_int/MI300A_A1/sysinfo.csv b/tests/workloads/device_inv_int/MI300A_A1/sysinfo.csv
new file mode 100644
index 0000000000..824e74d982
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300A_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+device_inv_int,./tests/vcopy -n 1048576 -b 256 -i 3,SQ|LDS|SQC|TA|TD|TCP|TCC|SPI|CPC|CPF,Wed 29 May 2024 01:38:17 PM  (CDT),2,sh5-1w300-rg3-3,AMD Instinct MI300A Accelerator,"American Megatrends International, LLC.RMO1002DS",Ubuntu 22.04.2 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,131174852,,6.1.2-110,N/A,SPX,NPS1,MI300A_A1,gfx942,32,24576,228,4,24,64,1024,32,2100,1300,2100,1300,96,32,120,4,5324.8,6
diff --git a/tests/workloads/device_inv_int/MI300A_A1/timestamps.csv b/tests/workloads/device_inv_int/MI300A_A1/timestamps.csv
new file mode 100644
index 0000000000..51b0943964
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300A_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,11995,1,147884,147884,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73775713810508,73775713819482,0
+2,11995,1,147884,147884,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73775713837269,73775713843599,0
+3,11995,1,147884,147884,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73775713858742,73775713864711,0
diff --git a/tests/workloads/device_inv_int/MI300X_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/device_inv_int/MI300X_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..e641477c25
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300X_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,60633,1,966139,966139,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716335581813913,716335581830632,0,433757.0,433757.0,16384.0,65536.0,34988.0,2816156.0
+1,60633,1,966139,966139,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716335581852432,716335581866430,0,504905.0,504905.0,16384.0,65536.0,13133.0,1048584.0
+2,60633,1,966139,966139,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716335581886549,716335581900789,0,376743.0,376743.0,16384.0,65536.0,13119.0,1048576.0
diff --git a/tests/workloads/device_inv_int/MI300X_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/device_inv_int/MI300X_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..dbfd078874
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300X_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,60633,1,966150,966150,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716335581813913,716335581830632,0,0.0,0.0,0.0
+1,60633,1,966150,966150,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716335581852432,716335581866430,0,0.0,0.0,0.0
+2,60633,1,966150,966150,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716335581886549,716335581900789,0,0.0,0.0,0.0
diff --git a/tests/workloads/device_inv_int/MI300X_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/device_inv_int/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..54f9fc9250
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,966161,966161,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716335581813913,716335581830632,0,65536.0,4023600.0,321853728.0
+1,60633,1,966161,966161,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716335581852432,716335581866430,0,65536.0,3445030.0,275618360.0
+2,60633,1,966161,966161,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716335581886549,716335581900789,0,65536.0,3577822.0,286177208.0
diff --git a/tests/workloads/device_inv_int/MI300X_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/device_inv_int/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..4efbe2249a
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,966172,966172,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716335581813913,716335581830632,0,32768.0,513055.0,41036904.0
+1,60633,1,966172,966172,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716335581852432,716335581866430,0,32768.0,317669.0,25409388.0
+2,60633,1,966172,966172,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716335581886549,716335581900789,0,32768.0,383304.0,30657928.0
diff --git a/tests/workloads/device_inv_int/MI300X_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/device_inv_int/MI300X_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..7c77af6eb2
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300X_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,60633,1,966183,966183,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716335581813913,716335581830632,0,459455.0,459455.0,270782.0,1837820.0,16384.0,34899690.0,566586.0,0.0,139951668.0
+1,60633,1,966183,966183,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716335581852432,716335581866430,0,453100.0,453100.0,272052.0,1812400.0,16384.0,32066042.0,510062.0,0.0,128628936.0
+2,60633,1,966183,966183,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716335581886549,716335581900789,0,392733.0,392733.0,217456.0,1570932.0,16384.0,30672068.0,492946.0,0.0,123049408.0
diff --git a/tests/workloads/device_inv_int/MI300X_A1/log.txt b/tests/workloads/device_inv_int/MI300X_A1/log.txt
new file mode 100644
index 0000000000..811199dad5
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300X_A1/log.txt
@@ -0,0 +1,158 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/device_inv_int/MI300X_A1
+Target: MI300X_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: None
+Hardware Blocks: All
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+[profiling] Current input file: tests/workloads/device_inv_int/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+[profiling] Current input file: tests/workloads/device_inv_int/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+[profiling] Current input file: tests/workloads/device_inv_int/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/device_inv_int/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/device_inv_int/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+[profiling] Current input file: tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+[profiling] Current input file: tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU
+[profiling] Current input file: tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_16
+[profiling] Current input file: tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_HITS
+[profiling] Current input file: tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_13.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[1]
+[profiling] Current input file: tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_14.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[1]
+[profiling] Current input file: tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_15.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[0]
+[profiling] Current input file: tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_16.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[1]
+[profiling] Current input file: tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_17.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[0]
+[profiling] Current input file: tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
+[profiling] Current input file: tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+[profiling] Current input file: tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
+[profiling] Current input file: tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_SCA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_MISC
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_WR
+[profiling] Current input file: tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_THREAD_CYCLES_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
+[profiling] Current input file: tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ITEMS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_MEM_VIOLATIONS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ATOMIC_RETURN
+[profiling] Current input file: tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+[profiling] Current input file: tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F32
+[profiling] Current input file: tests/workloads/device_inv_int/MI300X_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/device_inv_int/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/device_inv_int/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..293092f641
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/device_inv_int/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..08439eedce
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/device_inv_int/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..6cca322d4e
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/device_inv_int/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..e527ad31ba
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/device_inv_int/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..3f8e04adb3
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_0.txt b/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..ebc550fbfe
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD GRBM_COUNT GRBM_GUI_ACTIVE TCP_GATE_EN1_sum TCP_GATE_EN2_sum TCP_TD_TCP_STALL_CYCLES_sum TCP_TCR_TCP_STALL_CYCLES_sum TA_TA_BUSY_sum TA_BUFFER_WAVEFRONTS_sum TD_TD_BUSY_sum TD_TC_STALL_sum SPI_CSN_WINDOW_VALID SPI_CSN_BUSY CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE CPF_CPF_STAT_BUSY CPF_CPF_STAT_STALL TCC_CYCLE_sum TCC_BUSY_sum TCC_PROBE_sum TCC_PROBE_ALL_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_1.txt b/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..9ad887ddbb
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 GRBM_SPI_BUSY TCP_READ_TAGCONFLICT_STALL_CYCLES_sum TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum TCP_TA_TCP_STATE_READ_sum TA_BUFFER_READ_WAVEFRONTS_sum TA_BUFFER_WRITE_WAVEFRONTS_sum TD_SPI_STALL_sum TD_LOAD_WAVEFRONT_sum SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE CPC_CPC_TCIU_BUSY CPC_CPC_TCIU_IDLE CPF_CPF_TCIU_BUSY CPF_CPF_TCIU_STALL TCC_NC_REQ_sum TCC_UC_REQ_sum TCC_CC_REQ_sum TCC_RW_REQ_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_10.txt b/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..21c59688f7
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_11.txt b/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..df6d67d7b7
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_12.txt b/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..6e5320c11c
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_13.txt b/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_13.txt
new file mode 100644
index 0000000000..d95492c1cd
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_13.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_ATOMIC[0] TCC_BUBBLE[0] TCC_CYCLE[0] TCC_EA0_ATOMIC[0] TCC_ATOMIC[1] TCC_BUBBLE[1] TCC_CYCLE[1] TCC_EA0_ATOMIC[1] TCC_ATOMIC[2] TCC_BUBBLE[2] TCC_CYCLE[2] TCC_EA0_ATOMIC[2] TCC_ATOMIC[3] TCC_BUBBLE[3] TCC_CYCLE[3] TCC_EA0_ATOMIC[3] TCC_ATOMIC[4] TCC_BUBBLE[4] TCC_CYCLE[4] TCC_EA0_ATOMIC[4] TCC_ATOMIC[5] TCC_BUBBLE[5] TCC_CYCLE[5] TCC_EA0_ATOMIC[5] TCC_ATOMIC[6] TCC_BUBBLE[6] TCC_CYCLE[6] TCC_EA0_ATOMIC[6] TCC_ATOMIC[7] TCC_BUBBLE[7] TCC_CYCLE[7] TCC_EA0_ATOMIC[7] TCC_ATOMIC[8] TCC_BUBBLE[8] TCC_CYCLE[8] TCC_EA0_ATOMIC[8] TCC_ATOMIC[9] TCC_BUBBLE[9] TCC_CYCLE[9] TCC_EA0_ATOMIC[9] TCC_ATOMIC[10] TCC_BUBBLE[10] TCC_CYCLE[10] TCC_EA0_ATOMIC[10] TCC_ATOMIC[11] TCC_BUBBLE[11] TCC_CYCLE[11] TCC_EA0_ATOMIC[11] TCC_ATOMIC[12] TCC_BUBBLE[12] TCC_CYCLE[12] TCC_EA0_ATOMIC[12] TCC_ATOMIC[13] TCC_BUBBLE[13] TCC_CYCLE[13] TCC_EA0_ATOMIC[13] TCC_ATOMIC[14] TCC_BUBBLE[14] TCC_CYCLE[14] TCC_EA0_ATOMIC[14] TCC_ATOMIC[15] TCC_BUBBLE[15] TCC_CYCLE[15] TCC_EA0_ATOMIC[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_14.txt b/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_14.txt
new file mode 100644
index 0000000000..28327b86d3
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_14.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_ATOMIC_LEVEL[0] TCC_EA0_RDREQ[0] TCC_EA0_RDREQ_32B[0] TCC_EA0_RDREQ_LEVEL[0] TCC_EA0_ATOMIC_LEVEL[1] TCC_EA0_RDREQ[1] TCC_EA0_RDREQ_32B[1] TCC_EA0_RDREQ_LEVEL[1] TCC_EA0_ATOMIC_LEVEL[2] TCC_EA0_RDREQ[2] TCC_EA0_RDREQ_32B[2] TCC_EA0_RDREQ_LEVEL[2] TCC_EA0_ATOMIC_LEVEL[3] TCC_EA0_RDREQ[3] TCC_EA0_RDREQ_32B[3] TCC_EA0_RDREQ_LEVEL[3] TCC_EA0_ATOMIC_LEVEL[4] TCC_EA0_RDREQ[4] TCC_EA0_RDREQ_32B[4] TCC_EA0_RDREQ_LEVEL[4] TCC_EA0_ATOMIC_LEVEL[5] TCC_EA0_RDREQ[5] TCC_EA0_RDREQ_32B[5] TCC_EA0_RDREQ_LEVEL[5] TCC_EA0_ATOMIC_LEVEL[6] TCC_EA0_RDREQ[6] TCC_EA0_RDREQ_32B[6] TCC_EA0_RDREQ_LEVEL[6] TCC_EA0_ATOMIC_LEVEL[7] TCC_EA0_RDREQ[7] TCC_EA0_RDREQ_32B[7] TCC_EA0_RDREQ_LEVEL[7] TCC_EA0_ATOMIC_LEVEL[8] TCC_EA0_RDREQ[8] TCC_EA0_RDREQ_32B[8] TCC_EA0_RDREQ_LEVEL[8] TCC_EA0_ATOMIC_LEVEL[9] TCC_EA0_RDREQ[9] TCC_EA0_RDREQ_32B[9] TCC_EA0_RDREQ_LEVEL[9] TCC_EA0_ATOMIC_LEVEL[10] TCC_EA0_RDREQ[10] TCC_EA0_RDREQ_32B[10] TCC_EA0_RDREQ_LEVEL[10] TCC_EA0_ATOMIC_LEVEL[11] TCC_EA0_RDREQ[11] TCC_EA0_RDREQ_32B[11] TCC_EA0_RDREQ_LEVEL[11] TCC_EA0_ATOMIC_LEVEL[12] TCC_EA0_RDREQ[12] TCC_EA0_RDREQ_32B[12] TCC_EA0_RDREQ_LEVEL[12] TCC_EA0_ATOMIC_LEVEL[13] TCC_EA0_RDREQ[13] TCC_EA0_RDREQ_32B[13] TCC_EA0_RDREQ_LEVEL[13] TCC_EA0_ATOMIC_LEVEL[14] TCC_EA0_RDREQ[14] TCC_EA0_RDREQ_32B[14] TCC_EA0_RDREQ_LEVEL[14] TCC_EA0_ATOMIC_LEVEL[15] TCC_EA0_RDREQ[15] TCC_EA0_RDREQ_32B[15] TCC_EA0_RDREQ_LEVEL[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_15.txt b/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_15.txt
new file mode 100644
index 0000000000..033ae877ed
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_15.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_WRREQ[0] TCC_EA0_WRREQ_64B[0] TCC_EA0_WRREQ_LEVEL[0] TCC_HIT[0] TCC_EA0_WRREQ[1] TCC_EA0_WRREQ_64B[1] TCC_EA0_WRREQ_LEVEL[1] TCC_HIT[1] TCC_EA0_WRREQ[2] TCC_EA0_WRREQ_64B[2] TCC_EA0_WRREQ_LEVEL[2] TCC_HIT[2] TCC_EA0_WRREQ[3] TCC_EA0_WRREQ_64B[3] TCC_EA0_WRREQ_LEVEL[3] TCC_HIT[3] TCC_EA0_WRREQ[4] TCC_EA0_WRREQ_64B[4] TCC_EA0_WRREQ_LEVEL[4] TCC_HIT[4] TCC_EA0_WRREQ[5] TCC_EA0_WRREQ_64B[5] TCC_EA0_WRREQ_LEVEL[5] TCC_HIT[5] TCC_EA0_WRREQ[6] TCC_EA0_WRREQ_64B[6] TCC_EA0_WRREQ_LEVEL[6] TCC_HIT[6] TCC_EA0_WRREQ[7] TCC_EA0_WRREQ_64B[7] TCC_EA0_WRREQ_LEVEL[7] TCC_HIT[7] TCC_EA0_WRREQ[8] TCC_EA0_WRREQ_64B[8] TCC_EA0_WRREQ_LEVEL[8] TCC_HIT[8] TCC_EA0_WRREQ[9] TCC_EA0_WRREQ_64B[9] TCC_EA0_WRREQ_LEVEL[9] TCC_HIT[9] TCC_EA0_WRREQ[10] TCC_EA0_WRREQ_64B[10] TCC_EA0_WRREQ_LEVEL[10] TCC_HIT[10] TCC_EA0_WRREQ[11] TCC_EA0_WRREQ_64B[11] TCC_EA0_WRREQ_LEVEL[11] TCC_HIT[11] TCC_EA0_WRREQ[12] TCC_EA0_WRREQ_64B[12] TCC_EA0_WRREQ_LEVEL[12] TCC_HIT[12] TCC_EA0_WRREQ[13] TCC_EA0_WRREQ_64B[13] TCC_EA0_WRREQ_LEVEL[13] TCC_HIT[13] TCC_EA0_WRREQ[14] TCC_EA0_WRREQ_64B[14] TCC_EA0_WRREQ_LEVEL[14] TCC_HIT[14] TCC_EA0_WRREQ[15] TCC_EA0_WRREQ_64B[15] TCC_EA0_WRREQ_LEVEL[15] TCC_HIT[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_16.txt b/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_16.txt
new file mode 100644
index 0000000000..123269c3f9
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_16.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_MISS[0] TCC_READ[0] TCC_REQ[0] TCC_RW_REQ[0] TCC_MISS[1] TCC_READ[1] TCC_REQ[1] TCC_RW_REQ[1] TCC_MISS[2] TCC_READ[2] TCC_REQ[2] TCC_RW_REQ[2] TCC_MISS[3] TCC_READ[3] TCC_REQ[3] TCC_RW_REQ[3] TCC_MISS[4] TCC_READ[4] TCC_REQ[4] TCC_RW_REQ[4] TCC_MISS[5] TCC_READ[5] TCC_REQ[5] TCC_RW_REQ[5] TCC_MISS[6] TCC_READ[6] TCC_REQ[6] TCC_RW_REQ[6] TCC_MISS[7] TCC_READ[7] TCC_REQ[7] TCC_RW_REQ[7] TCC_MISS[8] TCC_READ[8] TCC_REQ[8] TCC_RW_REQ[8] TCC_MISS[9] TCC_READ[9] TCC_REQ[9] TCC_RW_REQ[9] TCC_MISS[10] TCC_READ[10] TCC_REQ[10] TCC_RW_REQ[10] TCC_MISS[11] TCC_READ[11] TCC_REQ[11] TCC_RW_REQ[11] TCC_MISS[12] TCC_READ[12] TCC_REQ[12] TCC_RW_REQ[12] TCC_MISS[13] TCC_READ[13] TCC_REQ[13] TCC_RW_REQ[13] TCC_MISS[14] TCC_READ[14] TCC_REQ[14] TCC_RW_REQ[14] TCC_MISS[15] TCC_READ[15] TCC_REQ[15] TCC_RW_REQ[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_17.txt b/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_17.txt
new file mode 100644
index 0000000000..102fb795bd
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_17.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_TAG_STALL[0] TCC_TOO_MANY_EA_WRREQS_STALL[0] TCC_WRITE[0] TCC_TAG_STALL[1] TCC_TOO_MANY_EA_WRREQS_STALL[1] TCC_WRITE[1] TCC_TAG_STALL[2] TCC_TOO_MANY_EA_WRREQS_STALL[2] TCC_WRITE[2] TCC_TAG_STALL[3] TCC_TOO_MANY_EA_WRREQS_STALL[3] TCC_WRITE[3] TCC_TAG_STALL[4] TCC_TOO_MANY_EA_WRREQS_STALL[4] TCC_WRITE[4] TCC_TAG_STALL[5] TCC_TOO_MANY_EA_WRREQS_STALL[5] TCC_WRITE[5] TCC_TAG_STALL[6] TCC_TOO_MANY_EA_WRREQS_STALL[6] TCC_WRITE[6] TCC_TAG_STALL[7] TCC_TOO_MANY_EA_WRREQS_STALL[7] TCC_WRITE[7] TCC_TAG_STALL[8] TCC_TOO_MANY_EA_WRREQS_STALL[8] TCC_WRITE[8] TCC_TAG_STALL[9] TCC_TOO_MANY_EA_WRREQS_STALL[9] TCC_WRITE[9] TCC_TAG_STALL[10] TCC_TOO_MANY_EA_WRREQS_STALL[10] TCC_WRITE[10] TCC_TAG_STALL[11] TCC_TOO_MANY_EA_WRREQS_STALL[11] TCC_WRITE[11] TCC_TAG_STALL[12] TCC_TOO_MANY_EA_WRREQS_STALL[12] TCC_WRITE[12] TCC_TAG_STALL[13] TCC_TOO_MANY_EA_WRREQS_STALL[13] TCC_WRITE[13] TCC_TAG_STALL[14] TCC_TOO_MANY_EA_WRREQS_STALL[14] TCC_WRITE[14] TCC_TAG_STALL[15] TCC_TOO_MANY_EA_WRREQS_STALL[15] TCC_WRITE[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_2.txt b/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..8ff8201c5a
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 TCP_VOLATILE_sum TCP_TOTAL_ACCESSES_sum TCP_TOTAL_READ_sum TCP_TOTAL_WRITE_sum TA_BUFFER_ATOMIC_WAVEFRONTS_sum TA_BUFFER_TOTAL_CYCLES_sum TD_ATOMIC_WAVEFRONT_sum TD_STORE_WAVEFRONT_sum SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION CPF_CPF_STAT_IDLE CPF_CPF_TCIU_IDLE TCC_REQ_sum TCC_STREAMING_REQ_sum TCC_HIT_sum TCC_MISS_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_3.txt b/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..cb10e4801d
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS TCP_TOTAL_ATOMIC_WITH_RET_sum TCP_TOTAL_ATOMIC_WITHOUT_RET_sum TCP_TOTAL_WRITEBACK_INVALIDATES_sum TCP_TOTAL_CACHE_ACCESSES_sum TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES_sum TD_COALESCABLE_WAVEFRONT_sum SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE CPF_CMP_UTCL1_STALL_ON_TRANSLATION TCC_READ_sum TCC_WRITE_sum TCC_ATOMIC_sum TCC_WRITEBACK_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_4.txt b/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..e4e6069e38
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAIT_ANY SQ_WAIT_INST_ANY SQ_ACTIVE_INST_ANY SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU TCP_UTCL1_TRANSLATION_MISS_sum TCP_UTCL1_TRANSLATION_HIT_sum TCP_UTCL1_PERMISSION_MISS_sum TCP_UTCL1_REQUEST_sum TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_TOTAL_WAVEFRONTS_sum SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE TCC_EA0_WRREQ_sum TCC_EA0_WRREQ_64B_sum TCC_EA0_WR_UNCACHED_32B_sum TCC_EA0_WRREQ_DRAM_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_5.txt b/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..77bd288232
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_SCA SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU TCP_TCC_READ_REQ_sum TCP_TCC_WRITE_REQ_sum TCP_TCC_ATOMIC_WITH_RET_REQ_sum TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN CPC_ME1_DC0_SPI_BUSY TCC_EA0_RDREQ_sum TCC_EA0_RDREQ_32B_sum TCC_BUBBLE_sum TCC_EA0_RD_UNCACHED_32B_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_6.txt b/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..609c184df8
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_THREAD_CYCLES_VALU SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 TCP_TCC_NC_READ_REQ_sum TCP_TCC_NC_WRITE_REQ_sum TCP_TCC_NC_ATOMIC_REQ_sum TCP_TCC_UC_READ_REQ_sum TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN TCC_EA0_RDREQ_DRAM_sum TCC_TAG_STALL_sum TCC_NORMAL_WRITEBACK_sum TCC_ALL_TC_OP_WB_WRITEBACK_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_7.txt b/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..5881e5fb8f
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED TCP_TCC_UC_WRITE_REQ_sum TCP_TCC_UC_ATOMIC_REQ_sum TCP_TCC_CC_READ_REQ_sum TCP_TCC_CC_WRITE_REQ_sum TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR TCC_NORMAL_EVICT_sum TCC_ALL_TC_OP_INV_EVICT_sum TCC_TOO_MANY_EA_WRREQS_STALL_sum TCC_EA0_ATOMIC_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_8.txt b/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..66317384f5
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES TCP_TCC_CC_ATOMIC_REQ_sum TCP_TCC_RW_READ_REQ_sum TCP_TCC_RW_WRITE_REQ_sum TCP_TCC_RW_ATOMIC_REQ_sum SPI_VWC_CSC_WR SPI_RA_BULKY_CU_FULL_CSN TCC_EA0_RDREQ_LEVEL_sum TCC_EA0_WRREQ_LEVEL_sum TCC_EA0_ATOMIC_LEVEL_sum TCC_EA0_WRREQ_STALL_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_9.txt b/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..60ceab315a
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300X_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ TCP_PENDING_STALL_CYCLES_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300X_A1/perfmon/timestamps.txt b/tests/workloads/device_inv_int/MI300X_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..676cca1b80
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300X_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/device_inv_int/MI300X_A1/pmc_perf.csv b/tests/workloads/device_inv_int/MI300X_A1/pmc_perf.csv
new file mode 100644
index 0000000000..8f9411c5b3
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300X_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_1,Correlation_ID_1,XCC_Index,TCC_ATOMIC[0],TCC_BUBBLE[0],TCC_CYCLE[0],TCC_EA0_ATOMIC[0],TCC_ATOMIC[1],TCC_BUBBLE[1],TCC_CYCLE[1],TCC_EA0_ATOMIC[1],TCC_ATOMIC[2],TCC_BUBBLE[2],TCC_CYCLE[2],TCC_EA0_ATOMIC[2],TCC_ATOMIC[3],TCC_BUBBLE[3],TCC_CYCLE[3],TCC_EA0_ATOMIC[3],TCC_ATOMIC[4],TCC_BUBBLE[4],TCC_CYCLE[4],TCC_EA0_ATOMIC[4],TCC_ATOMIC[5],TCC_BUBBLE[5],TCC_CYCLE[5],TCC_EA0_ATOMIC[5],TCC_ATOMIC[6],TCC_BUBBLE[6],TCC_CYCLE[6],TCC_EA0_ATOMIC[6],TCC_ATOMIC[7],TCC_BUBBLE[7],TCC_CYCLE[7],TCC_EA0_ATOMIC[7],TCC_ATOMIC[8],TCC_BUBBLE[8],TCC_CYCLE[8],TCC_EA0_ATOMIC[8],TCC_ATOMIC[9],TCC_BUBBLE[9],TCC_CYCLE[9],TCC_EA0_ATOMIC[9],TCC_ATOMIC[10],TCC_BUBBLE[10],TCC_CYCLE[10],TCC_EA0_ATOMIC[10],TCC_ATOMIC[11],TCC_BUBBLE[11],TCC_CYCLE[11],TCC_EA0_ATOMIC[11],TCC_ATOMIC[12],TCC_BUBBLE[12],TCC_CYCLE[12],TCC_EA0_ATOMIC[12],TCC_ATOMIC[13],TCC_BUBBLE[13],TCC_CYCLE[13],TCC_EA0_ATOMIC[13],TCC_ATOMIC[14],TCC_BUBBLE[14],TCC_CYCLE[14],TCC_EA0_ATOMIC[14],TCC_ATOMIC[15],TCC_BUBBLE[15],TCC_CYCLE[15],TCC_EA0_ATOMIC[15],TCC_ATOMIC[16],TCC_BUBBLE[16],TCC_CYCLE[16],TCC_EA0_ATOMIC[16],TCC_ATOMIC[17],TCC_BUBBLE[17],TCC_CYCLE[17],TCC_EA0_ATOMIC[17],TCC_ATOMIC[18],TCC_BUBBLE[18],TCC_CYCLE[18],TCC_EA0_ATOMIC[18],TCC_ATOMIC[19],TCC_BUBBLE[19],TCC_CYCLE[19],TCC_EA0_ATOMIC[19],TCC_ATOMIC[20],TCC_BUBBLE[20],TCC_CYCLE[20],TCC_EA0_ATOMIC[20],TCC_ATOMIC[21],TCC_BUBBLE[21],TCC_CYCLE[21],TCC_EA0_ATOMIC[21],TCC_ATOMIC[22],TCC_BUBBLE[22],TCC_CYCLE[22],TCC_EA0_ATOMIC[22],TCC_ATOMIC[23],TCC_BUBBLE[23],TCC_CYCLE[23],TCC_EA0_ATOMIC[23],TCC_ATOMIC[24],TCC_BUBBLE[24],TCC_CYCLE[24],TCC_EA0_ATOMIC[24],TCC_ATOMIC[25],TCC_BUBBLE[25],TCC_CYCLE[25],TCC_EA0_ATOMIC[25],TCC_ATOMIC[26],TCC_BUBBLE[26],TCC_CYCLE[26],TCC_EA0_ATOMIC[26],TCC_ATOMIC[27],TCC_BUBBLE[27],TCC_CYCLE[27],TCC_EA0_ATOMIC[27],TCC_ATOMIC[28],TCC_BUBBLE[28],TCC_CYCLE[28],TCC_EA0_ATOMIC[28],TCC_ATOMIC[29],TCC_BUBBLE[29],TCC_CYCLE[29],TCC_EA0_ATOMIC[29],TCC_ATOMIC[30],TCC_BUBBLE[30],TCC_CYCLE[30],TCC_EA0_ATOMIC[30],TCC_ATOMIC[31],TCC_BUBBLE[31],TCC_CYCLE[31],TCC_EA0_ATOMIC[31],TCC_ATOMIC[32],TCC_BUBBLE[32],TCC_CYCLE[32],TCC_EA0_ATOMIC[32],TCC_ATOMIC[33],TCC_BUBBLE[33],TCC_CYCLE[33],TCC_EA0_ATOMIC[33],TCC_ATOMIC[34],TCC_BUBBLE[34],TCC_CYCLE[34],TCC_EA0_ATOMIC[34],TCC_ATOMIC[35],TCC_BUBBLE[35],TCC_CYCLE[35],TCC_EA0_ATOMIC[35],TCC_ATOMIC[36],TCC_BUBBLE[36],TCC_CYCLE[36],TCC_EA0_ATOMIC[36],TCC_ATOMIC[37],TCC_BUBBLE[37],TCC_CYCLE[37],TCC_EA0_ATOMIC[37],TCC_ATOMIC[38],TCC_BUBBLE[38],TCC_CYCLE[38],TCC_EA0_ATOMIC[38],TCC_ATOMIC[39],TCC_BUBBLE[39],TCC_CYCLE[39],TCC_EA0_ATOMIC[39],TCC_ATOMIC[40],TCC_BUBBLE[40],TCC_CYCLE[40],TCC_EA0_ATOMIC[40],TCC_ATOMIC[41],TCC_BUBBLE[41],TCC_CYCLE[41],TCC_EA0_ATOMIC[41],TCC_ATOMIC[42],TCC_BUBBLE[42],TCC_CYCLE[42],TCC_EA0_ATOMIC[42],TCC_ATOMIC[43],TCC_BUBBLE[43],TCC_CYCLE[43],TCC_EA0_ATOMIC[43],TCC_ATOMIC[44],TCC_BUBBLE[44],TCC_CYCLE[44],TCC_EA0_ATOMIC[44],TCC_ATOMIC[45],TCC_BUBBLE[45],TCC_CYCLE[45],TCC_EA0_ATOMIC[45],TCC_ATOMIC[46],TCC_BUBBLE[46],TCC_CYCLE[46],TCC_EA0_ATOMIC[46],TCC_ATOMIC[47],TCC_BUBBLE[47],TCC_CYCLE[47],TCC_EA0_ATOMIC[47],TCC_ATOMIC[48],TCC_BUBBLE[48],TCC_CYCLE[48],TCC_EA0_ATOMIC[48],TCC_ATOMIC[49],TCC_BUBBLE[49],TCC_CYCLE[49],TCC_EA0_ATOMIC[49],TCC_ATOMIC[50],TCC_BUBBLE[50],TCC_CYCLE[50],TCC_EA0_ATOMIC[50],TCC_ATOMIC[51],TCC_BUBBLE[51],TCC_CYCLE[51],TCC_EA0_ATOMIC[51],TCC_ATOMIC[52],TCC_BUBBLE[52],TCC_CYCLE[52],TCC_EA0_ATOMIC[52],TCC_ATOMIC[53],TCC_BUBBLE[53],TCC_CYCLE[53],TCC_EA0_ATOMIC[53],TCC_ATOMIC[54],TCC_BUBBLE[54],TCC_CYCLE[54],TCC_EA0_ATOMIC[54],TCC_ATOMIC[55],TCC_BUBBLE[55],TCC_CYCLE[55],TCC_EA0_ATOMIC[55],TCC_ATOMIC[56],TCC_BUBBLE[56],TCC_CYCLE[56],TCC_EA0_ATOMIC[56],TCC_ATOMIC[57],TCC_BUBBLE[57],TCC_CYCLE[57],TCC_EA0_ATOMIC[57],TCC_ATOMIC[58],TCC_BUBBLE[58],TCC_CYCLE[58],TCC_EA0_ATOMIC[58],TCC_ATOMIC[59],TCC_BUBBLE[59],TCC_CYCLE[59],TCC_EA0_ATOMIC[59],TCC_ATOMIC[60],TCC_BUBBLE[60],TCC_CYCLE[60],TCC_EA0_ATOMIC[60],TCC_ATOMIC[61],TCC_BUBBLE[61],TCC_CYCLE[61],TCC_EA0_ATOMIC[61],TCC_ATOMIC[62],TCC_BUBBLE[62],TCC_CYCLE[62],TCC_EA0_ATOMIC[62],TCC_ATOMIC[63],TCC_BUBBLE[63],TCC_CYCLE[63],TCC_EA0_ATOMIC[63],TCC_ATOMIC[64],TCC_BUBBLE[64],TCC_CYCLE[64],TCC_EA0_ATOMIC[64],TCC_ATOMIC[65],TCC_BUBBLE[65],TCC_CYCLE[65],TCC_EA0_ATOMIC[65],TCC_ATOMIC[66],TCC_BUBBLE[66],TCC_CYCLE[66],TCC_EA0_ATOMIC[66],TCC_ATOMIC[67],TCC_BUBBLE[67],TCC_CYCLE[67],TCC_EA0_ATOMIC[67],TCC_ATOMIC[68],TCC_BUBBLE[68],TCC_CYCLE[68],TCC_EA0_ATOMIC[68],TCC_ATOMIC[69],TCC_BUBBLE[69],TCC_CYCLE[69],TCC_EA0_ATOMIC[69],TCC_ATOMIC[70],TCC_BUBBLE[70],TCC_CYCLE[70],TCC_EA0_ATOMIC[70],TCC_ATOMIC[71],TCC_BUBBLE[71],TCC_CYCLE[71],TCC_EA0_ATOMIC[71],TCC_ATOMIC[72],TCC_BUBBLE[72],TCC_CYCLE[72],TCC_EA0_ATOMIC[72],TCC_ATOMIC[73],TCC_BUBBLE[73],TCC_CYCLE[73],TCC_EA0_ATOMIC[73],TCC_ATOMIC[74],TCC_BUBBLE[74],TCC_CYCLE[74],TCC_EA0_ATOMIC[74],TCC_ATOMIC[75],TCC_BUBBLE[75],TCC_CYCLE[75],TCC_EA0_ATOMIC[75],TCC_ATOMIC[76],TCC_BUBBLE[76],TCC_CYCLE[76],TCC_EA0_ATOMIC[76],TCC_ATOMIC[77],TCC_BUBBLE[77],TCC_CYCLE[77],TCC_EA0_ATOMIC[77],TCC_ATOMIC[78],TCC_BUBBLE[78],TCC_CYCLE[78],TCC_EA0_ATOMIC[78],TCC_ATOMIC[79],TCC_BUBBLE[79],TCC_CYCLE[79],TCC_EA0_ATOMIC[79],TCC_ATOMIC[80],TCC_BUBBLE[80],TCC_CYCLE[80],TCC_EA0_ATOMIC[80],TCC_ATOMIC[81],TCC_BUBBLE[81],TCC_CYCLE[81],TCC_EA0_ATOMIC[81],TCC_ATOMIC[82],TCC_BUBBLE[82],TCC_CYCLE[82],TCC_EA0_ATOMIC[82],TCC_ATOMIC[83],TCC_BUBBLE[83],TCC_CYCLE[83],TCC_EA0_ATOMIC[83],TCC_ATOMIC[84],TCC_BUBBLE[84],TCC_CYCLE[84],TCC_EA0_ATOMIC[84],TCC_ATOMIC[85],TCC_BUBBLE[85],TCC_CYCLE[85],TCC_EA0_ATOMIC[85],TCC_ATOMIC[86],TCC_BUBBLE[86],TCC_CYCLE[86],TCC_EA0_ATOMIC[86],TCC_ATOMIC[87],TCC_BUBBLE[87],TCC_CYCLE[87],TCC_EA0_ATOMIC[87],TCC_ATOMIC[88],TCC_BUBBLE[88],TCC_CYCLE[88],TCC_EA0_ATOMIC[88],TCC_ATOMIC[89],TCC_BUBBLE[89],TCC_CYCLE[89],TCC_EA0_ATOMIC[89],TCC_ATOMIC[90],TCC_BUBBLE[90],TCC_CYCLE[90],TCC_EA0_ATOMIC[90],TCC_ATOMIC[91],TCC_BUBBLE[91],TCC_CYCLE[91],TCC_EA0_ATOMIC[91],TCC_ATOMIC[92],TCC_BUBBLE[92],TCC_CYCLE[92],TCC_EA0_ATOMIC[92],TCC_ATOMIC[93],TCC_BUBBLE[93],TCC_CYCLE[93],TCC_EA0_ATOMIC[93],TCC_ATOMIC[94],TCC_BUBBLE[94],TCC_CYCLE[94],TCC_EA0_ATOMIC[94],TCC_ATOMIC[95],TCC_BUBBLE[95],TCC_CYCLE[95],TCC_EA0_ATOMIC[95],TCC_ATOMIC[96],TCC_BUBBLE[96],TCC_CYCLE[96],TCC_EA0_ATOMIC[96],TCC_ATOMIC[97],TCC_BUBBLE[97],TCC_CYCLE[97],TCC_EA0_ATOMIC[97],TCC_ATOMIC[98],TCC_BUBBLE[98],TCC_CYCLE[98],TCC_EA0_ATOMIC[98],TCC_ATOMIC[99],TCC_BUBBLE[99],TCC_CYCLE[99],TCC_EA0_ATOMIC[99],TCC_ATOMIC[100],TCC_BUBBLE[100],TCC_CYCLE[100],TCC_EA0_ATOMIC[100],TCC_ATOMIC[101],TCC_BUBBLE[101],TCC_CYCLE[101],TCC_EA0_ATOMIC[101],TCC_ATOMIC[102],TCC_BUBBLE[102],TCC_CYCLE[102],TCC_EA0_ATOMIC[102],TCC_ATOMIC[103],TCC_BUBBLE[103],TCC_CYCLE[103],TCC_EA0_ATOMIC[103],TCC_ATOMIC[104],TCC_BUBBLE[104],TCC_CYCLE[104],TCC_EA0_ATOMIC[104],TCC_ATOMIC[105],TCC_BUBBLE[105],TCC_CYCLE[105],TCC_EA0_ATOMIC[105],TCC_ATOMIC[106],TCC_BUBBLE[106],TCC_CYCLE[106],TCC_EA0_ATOMIC[106],TCC_ATOMIC[107],TCC_BUBBLE[107],TCC_CYCLE[107],TCC_EA0_ATOMIC[107],TCC_ATOMIC[108],TCC_BUBBLE[108],TCC_CYCLE[108],TCC_EA0_ATOMIC[108],TCC_ATOMIC[109],TCC_BUBBLE[109],TCC_CYCLE[109],TCC_EA0_ATOMIC[109],TCC_ATOMIC[110],TCC_BUBBLE[110],TCC_CYCLE[110],TCC_EA0_ATOMIC[110],TCC_ATOMIC[111],TCC_BUBBLE[111],TCC_CYCLE[111],TCC_EA0_ATOMIC[111],TCC_ATOMIC[112],TCC_BUBBLE[112],TCC_CYCLE[112],TCC_EA0_ATOMIC[112],TCC_ATOMIC[113],TCC_BUBBLE[113],TCC_CYCLE[113],TCC_EA0_ATOMIC[113],TCC_ATOMIC[114],TCC_BUBBLE[114],TCC_CYCLE[114],TCC_EA0_ATOMIC[114],TCC_ATOMIC[115],TCC_BUBBLE[115],TCC_CYCLE[115],TCC_EA0_ATOMIC[115],TCC_ATOMIC[116],TCC_BUBBLE[116],TCC_CYCLE[116],TCC_EA0_ATOMIC[116],TCC_ATOMIC[117],TCC_BUBBLE[117],TCC_CYCLE[117],TCC_EA0_ATOMIC[117],TCC_ATOMIC[118],TCC_BUBBLE[118],TCC_CYCLE[118],TCC_EA0_ATOMIC[118],TCC_ATOMIC[119],TCC_BUBBLE[119],TCC_CYCLE[119],TCC_EA0_ATOMIC[119],TCC_ATOMIC[120],TCC_BUBBLE[120],TCC_CYCLE[120],TCC_EA0_ATOMIC[120],TCC_ATOMIC[121],TCC_BUBBLE[121],TCC_CYCLE[121],TCC_EA0_ATOMIC[121],TCC_ATOMIC[122],TCC_BUBBLE[122],TCC_CYCLE[122],TCC_EA0_ATOMIC[122],TCC_ATOMIC[123],TCC_BUBBLE[123],TCC_CYCLE[123],TCC_EA0_ATOMIC[123],TCC_ATOMIC[124],TCC_BUBBLE[124],TCC_CYCLE[124],TCC_EA0_ATOMIC[124],TCC_ATOMIC[125],TCC_BUBBLE[125],TCC_CYCLE[125],TCC_EA0_ATOMIC[125],TCC_ATOMIC[126],TCC_BUBBLE[126],TCC_CYCLE[126],TCC_EA0_ATOMIC[126],TCC_ATOMIC[127],TCC_BUBBLE[127],TCC_CYCLE[127],TCC_EA0_ATOMIC[127],Wave_Size_2,Correlation_ID_2,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,TA_FLAT_ATOMIC_WAVEFRONTS_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,TCC_ALL_TC_OP_INV_EVICT_sum,TCC_EA0_ATOMIC_sum,TCC_NORMAL_EVICT_sum,TCC_TOO_MANY_EA_WRREQS_STALL_sum,TCP_TCC_CC_READ_REQ_sum,TCP_TCC_CC_WRITE_REQ_sum,TCP_TCC_UC_ATOMIC_REQ_sum,TCP_TCC_UC_WRITE_REQ_sum,Wave_Size_3,Correlation_ID_3,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,TCC_EA0_ATOMIC_LEVEL_sum,TCC_EA0_RDREQ_LEVEL_sum,TCC_EA0_WRREQ_LEVEL_sum,TCC_EA0_WRREQ_STALL_sum,TCP_TCC_CC_ATOMIC_REQ_sum,TCP_TCC_RW_ATOMIC_REQ_sum,TCP_TCC_RW_READ_REQ_sum,TCP_TCC_RW_WRITE_REQ_sum,Wave_Size_4,Correlation_ID_4,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SPI_RA_REQ_NO_ALLOC,SPI_RA_REQ_NO_ALLOC_CSN,CPC_CPC_STAT_STALL,CPC_UTCL1_STALL_ON_TRANSLATION,CPF_CPF_STAT_IDLE,CPF_CPF_TCIU_IDLE,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,TA_BUFFER_TOTAL_CYCLES_sum,TCC_HIT_sum,TCC_MISS_sum,TCC_REQ_sum,TCC_STREAMING_REQ_sum,TCP_TOTAL_ACCESSES_sum,TCP_TOTAL_READ_sum,TCP_TOTAL_WRITE_sum,TCP_VOLATILE_sum,TD_ATOMIC_WAVEFRONT_sum,TD_STORE_WAVEFRONT_sum,Wave_Size_5,Correlation_ID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SQ_INST_CYCLES_SALU,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,CPC_ME1_DC0_SPI_BUSY,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,TCC_BUBBLE_sum,TCC_EA0_RDREQ_32B_sum,TCC_EA0_RDREQ_sum,TCC_EA0_RD_UNCACHED_32B_sum,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,TCP_TCC_READ_REQ_sum,TCP_TCC_WRITE_REQ_sum,Start_Timestamp,End_Timestamp
+0,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) 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diff --git a/tests/workloads/device_inv_int/MI300X_A1/sysinfo.csv b/tests/workloads/device_inv_int/MI300X_A1/sysinfo.csv
new file mode 100644
index 0000000000..8398177bcb
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300X_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+device_inv_int,./tests/vcopy -n 1048576 -b 256 -i 3,SQ|LDS|SQC|TA|TD|TCP|TCC|SPI|CPC|CPF,Wed 29 May 2024 12:02:25 PM  (CDT),2,splinter-126-wr-c6,AMD Ryzen 9 7950X 16-Core Processor,"American Megatrends International, LLC.VS2683299N.FD",Ubuntu 22.04.4 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,114656528,,6.2.0-13611,113-MI3SRIOV-001,SPX,NPS1,MI300X_A1,gfx942,32,4096,304,4,32,64,1024,32,2100,1300,2100,1300,128,32,160,4,5324.8,8
diff --git a/tests/workloads/device_inv_int/MI300X_A1/timestamps.csv b/tests/workloads/device_inv_int/MI300X_A1/timestamps.csv
new file mode 100644
index 0000000000..6683a9cddd
--- /dev/null
+++ b/tests/workloads/device_inv_int/MI300X_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,60633,1,966393,966393,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716335581813913,716335581830632,0
+2,60633,1,966393,966393,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716335581852432,716335581866430,0
+3,60633,1,966393,966393,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716335581886549,716335581900789,0
diff --git a/tests/workloads/dispatch_0/MI300A_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/dispatch_0/MI300A_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..a28682cc3a
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300A_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,11995,1,146393,146393,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73680535129761,73680535137372,0,202500.0,202500.0,16384.0,65536.0,30805.0,2463572.0
+1,11995,1,146393,146393,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73680535160527,73680535166937,0,187357.0,187357.0,16384.0,65536.0,13173.0,1048640.0
+2,11995,1,146393,146393,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73680535185885,73680535192375,0,170598.0,170598.0,16384.0,65536.0,13073.0,1049580.0
diff --git a/tests/workloads/dispatch_0/MI300A_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/dispatch_0/MI300A_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..c14d924ea9
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300A_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,11995,1,146405,146405,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73680535129761,73680535137372,0,0.0,0.0,0.0
+1,11995,1,146405,146405,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73680535160527,73680535166937,0,0.0,0.0,0.0
+2,11995,1,146405,146405,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73680535185885,73680535192375,0,0.0,0.0,0.0
diff --git a/tests/workloads/dispatch_0/MI300A_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/dispatch_0/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..7a601b0d54
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,146417,146417,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73680535129761,73680535137372,0,65536.0,285822.0,22979680.0
+1,11995,1,146417,146417,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73680535160527,73680535166937,0,65536.0,272096.0,21714432.0
+2,11995,1,146417,146417,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73680535185885,73680535192375,0,65536.0,196758.0,15754744.0
diff --git a/tests/workloads/dispatch_0/MI300A_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/dispatch_0/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..f9c52ced61
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,146430,146430,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73680535129761,73680535137372,0,32768.0,534742.0,42776552.0
+1,11995,1,146430,146430,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73680535160527,73680535166937,0,32768.0,417452.0,33402672.0
+2,11995,1,146430,146430,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73680535185885,73680535192375,0,32768.0,420621.0,33641000.0
diff --git a/tests/workloads/dispatch_0/MI300A_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/dispatch_0/MI300A_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..08c2043ec8
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300A_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,11995,1,146442,146442,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73680535129761,73680535137372,0,220495.0,220495.0,124129.0,881980.0,16384.0,14778568.0,258251.0,0.0,59508956.0
+1,11995,1,146442,146442,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73680535160527,73680535166937,0,196758.0,196758.0,115387.0,787032.0,16384.0,10783368.0,200415.0,0.0,43523016.0
+2,11995,1,146442,146442,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73680535185885,73680535192375,0,179626.0,179626.0,98300.0,718504.0,16384.0,10772922.0,200430.0,0.0,43481204.0
diff --git a/tests/workloads/dispatch_0/MI300A_A1/log.txt b/tests/workloads/dispatch_0/MI300A_A1/log.txt
new file mode 100644
index 0000000000..94bba4359c
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300A_A1/log.txt
@@ -0,0 +1,259 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/dispatch_0/MI300A_A1
+Target: MI300A_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: ['0']
+Hardware Blocks: All
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH_LEVEL
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LEVEL_WAVES
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_CVT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_WR
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_RD
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F16
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_HITS
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_MISSES
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_HITS
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES_DUPLICATE
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_13.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[1]
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_14.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[1]
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_15.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[1]
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_16.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[1]
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_17.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[2]
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F64
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_GDS
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_SCA
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_THREAD_CYCLES_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ADDR_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_UNALIGNED_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_EQ_64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_64
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ITEMS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_MEM_VIOLATIONS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ATOMIC_RETURN
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_IDX_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_RESTORED
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F32
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_INST_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_READ_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_WRITE_REQ
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300A_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/dispatch_0/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/dispatch_0/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..ad08a34f3f
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/dispatch_0/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..1ea4fc1fd5
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/dispatch_0/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..9c8a738a40
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/dispatch_0/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..aacd4c0da0
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/dispatch_0/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..f2c3fa3aeb
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_0.txt b/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..20c76d6407
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD GRBM_COUNT GRBM_GUI_ACTIVE TCP_GATE_EN1_sum TCP_GATE_EN2_sum TCP_TD_TCP_STALL_CYCLES_sum TCP_TCR_TCP_STALL_CYCLES_sum TA_TA_BUSY_sum TA_BUFFER_WAVEFRONTS_sum TD_TD_BUSY_sum TD_TC_STALL_sum SPI_CSN_WINDOW_VALID SPI_CSN_BUSY CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE CPF_CPF_STAT_BUSY CPF_CPF_STAT_STALL TCC_CYCLE_sum TCC_BUSY_sum TCC_PROBE_sum TCC_PROBE_ALL_sum
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_1.txt b/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..4d29cb9b97
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 GRBM_SPI_BUSY TCP_READ_TAGCONFLICT_STALL_CYCLES_sum TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum TCP_TA_TCP_STATE_READ_sum TA_BUFFER_READ_WAVEFRONTS_sum TA_BUFFER_WRITE_WAVEFRONTS_sum TD_SPI_STALL_sum TD_LOAD_WAVEFRONT_sum SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE CPC_CPC_TCIU_BUSY CPC_CPC_TCIU_IDLE CPF_CPF_TCIU_BUSY CPF_CPF_TCIU_STALL TCC_NC_REQ_sum TCC_UC_REQ_sum TCC_CC_REQ_sum TCC_RW_REQ_sum
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_10.txt b/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..f68d64bfab
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_11.txt b/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..ee2d69e297
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_12.txt b/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..b898ee9c60
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_13.txt b/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_13.txt
new file mode 100644
index 0000000000..1fa61a5c40
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_13.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_ATOMIC[0] TCC_BUBBLE[0] TCC_CYCLE[0] TCC_EA0_ATOMIC[0] TCC_ATOMIC[1] TCC_BUBBLE[1] TCC_CYCLE[1] TCC_EA0_ATOMIC[1] TCC_ATOMIC[2] TCC_BUBBLE[2] TCC_CYCLE[2] TCC_EA0_ATOMIC[2] TCC_ATOMIC[3] TCC_BUBBLE[3] TCC_CYCLE[3] TCC_EA0_ATOMIC[3] TCC_ATOMIC[4] TCC_BUBBLE[4] TCC_CYCLE[4] TCC_EA0_ATOMIC[4] TCC_ATOMIC[5] TCC_BUBBLE[5] TCC_CYCLE[5] TCC_EA0_ATOMIC[5] TCC_ATOMIC[6] TCC_BUBBLE[6] TCC_CYCLE[6] TCC_EA0_ATOMIC[6] TCC_ATOMIC[7] TCC_BUBBLE[7] TCC_CYCLE[7] TCC_EA0_ATOMIC[7] TCC_ATOMIC[8] TCC_BUBBLE[8] TCC_CYCLE[8] TCC_EA0_ATOMIC[8] TCC_ATOMIC[9] TCC_BUBBLE[9] TCC_CYCLE[9] TCC_EA0_ATOMIC[9] TCC_ATOMIC[10] TCC_BUBBLE[10] TCC_CYCLE[10] TCC_EA0_ATOMIC[10] TCC_ATOMIC[11] TCC_BUBBLE[11] TCC_CYCLE[11] TCC_EA0_ATOMIC[11] TCC_ATOMIC[12] TCC_BUBBLE[12] TCC_CYCLE[12] TCC_EA0_ATOMIC[12] TCC_ATOMIC[13] TCC_BUBBLE[13] TCC_CYCLE[13] TCC_EA0_ATOMIC[13] TCC_ATOMIC[14] TCC_BUBBLE[14] TCC_CYCLE[14] TCC_EA0_ATOMIC[14] TCC_ATOMIC[15] TCC_BUBBLE[15] TCC_CYCLE[15] TCC_EA0_ATOMIC[15]
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_14.txt b/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_14.txt
new file mode 100644
index 0000000000..08d59e8856
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_14.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_ATOMIC_LEVEL[0] TCC_EA0_RDREQ[0] TCC_EA0_RDREQ_32B[0] TCC_EA0_RDREQ_LEVEL[0] TCC_EA0_ATOMIC_LEVEL[1] TCC_EA0_RDREQ[1] TCC_EA0_RDREQ_32B[1] TCC_EA0_RDREQ_LEVEL[1] TCC_EA0_ATOMIC_LEVEL[2] TCC_EA0_RDREQ[2] TCC_EA0_RDREQ_32B[2] TCC_EA0_RDREQ_LEVEL[2] TCC_EA0_ATOMIC_LEVEL[3] TCC_EA0_RDREQ[3] TCC_EA0_RDREQ_32B[3] TCC_EA0_RDREQ_LEVEL[3] TCC_EA0_ATOMIC_LEVEL[4] TCC_EA0_RDREQ[4] TCC_EA0_RDREQ_32B[4] TCC_EA0_RDREQ_LEVEL[4] TCC_EA0_ATOMIC_LEVEL[5] TCC_EA0_RDREQ[5] TCC_EA0_RDREQ_32B[5] TCC_EA0_RDREQ_LEVEL[5] TCC_EA0_ATOMIC_LEVEL[6] TCC_EA0_RDREQ[6] TCC_EA0_RDREQ_32B[6] TCC_EA0_RDREQ_LEVEL[6] TCC_EA0_ATOMIC_LEVEL[7] TCC_EA0_RDREQ[7] TCC_EA0_RDREQ_32B[7] TCC_EA0_RDREQ_LEVEL[7] TCC_EA0_ATOMIC_LEVEL[8] TCC_EA0_RDREQ[8] TCC_EA0_RDREQ_32B[8] TCC_EA0_RDREQ_LEVEL[8] TCC_EA0_ATOMIC_LEVEL[9] TCC_EA0_RDREQ[9] TCC_EA0_RDREQ_32B[9] TCC_EA0_RDREQ_LEVEL[9] TCC_EA0_ATOMIC_LEVEL[10] TCC_EA0_RDREQ[10] TCC_EA0_RDREQ_32B[10] TCC_EA0_RDREQ_LEVEL[10] TCC_EA0_ATOMIC_LEVEL[11] TCC_EA0_RDREQ[11] TCC_EA0_RDREQ_32B[11] TCC_EA0_RDREQ_LEVEL[11] TCC_EA0_ATOMIC_LEVEL[12] TCC_EA0_RDREQ[12] TCC_EA0_RDREQ_32B[12] TCC_EA0_RDREQ_LEVEL[12] TCC_EA0_ATOMIC_LEVEL[13] TCC_EA0_RDREQ[13] TCC_EA0_RDREQ_32B[13] TCC_EA0_RDREQ_LEVEL[13] TCC_EA0_ATOMIC_LEVEL[14] TCC_EA0_RDREQ[14] TCC_EA0_RDREQ_32B[14] TCC_EA0_RDREQ_LEVEL[14] TCC_EA0_ATOMIC_LEVEL[15] TCC_EA0_RDREQ[15] TCC_EA0_RDREQ_32B[15] TCC_EA0_RDREQ_LEVEL[15]
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_15.txt b/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_15.txt
new file mode 100644
index 0000000000..74f25a6d60
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_15.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_WRREQ[0] TCC_EA0_WRREQ_64B[0] TCC_EA0_WRREQ_LEVEL[0] TCC_HIT[0] TCC_EA0_WRREQ[1] TCC_EA0_WRREQ_64B[1] TCC_EA0_WRREQ_LEVEL[1] TCC_HIT[1] TCC_EA0_WRREQ[2] TCC_EA0_WRREQ_64B[2] TCC_EA0_WRREQ_LEVEL[2] TCC_HIT[2] TCC_EA0_WRREQ[3] TCC_EA0_WRREQ_64B[3] TCC_EA0_WRREQ_LEVEL[3] TCC_HIT[3] TCC_EA0_WRREQ[4] TCC_EA0_WRREQ_64B[4] TCC_EA0_WRREQ_LEVEL[4] TCC_HIT[4] TCC_EA0_WRREQ[5] TCC_EA0_WRREQ_64B[5] TCC_EA0_WRREQ_LEVEL[5] TCC_HIT[5] TCC_EA0_WRREQ[6] TCC_EA0_WRREQ_64B[6] TCC_EA0_WRREQ_LEVEL[6] TCC_HIT[6] TCC_EA0_WRREQ[7] TCC_EA0_WRREQ_64B[7] TCC_EA0_WRREQ_LEVEL[7] TCC_HIT[7] TCC_EA0_WRREQ[8] TCC_EA0_WRREQ_64B[8] TCC_EA0_WRREQ_LEVEL[8] TCC_HIT[8] TCC_EA0_WRREQ[9] TCC_EA0_WRREQ_64B[9] TCC_EA0_WRREQ_LEVEL[9] TCC_HIT[9] TCC_EA0_WRREQ[10] TCC_EA0_WRREQ_64B[10] TCC_EA0_WRREQ_LEVEL[10] TCC_HIT[10] TCC_EA0_WRREQ[11] TCC_EA0_WRREQ_64B[11] TCC_EA0_WRREQ_LEVEL[11] TCC_HIT[11] TCC_EA0_WRREQ[12] TCC_EA0_WRREQ_64B[12] TCC_EA0_WRREQ_LEVEL[12] TCC_HIT[12] TCC_EA0_WRREQ[13] TCC_EA0_WRREQ_64B[13] TCC_EA0_WRREQ_LEVEL[13] TCC_HIT[13] TCC_EA0_WRREQ[14] TCC_EA0_WRREQ_64B[14] TCC_EA0_WRREQ_LEVEL[14] TCC_HIT[14] TCC_EA0_WRREQ[15] TCC_EA0_WRREQ_64B[15] TCC_EA0_WRREQ_LEVEL[15] TCC_HIT[15]
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_16.txt b/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_16.txt
new file mode 100644
index 0000000000..c7a1da4893
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_16.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_MISS[0] TCC_READ[0] TCC_REQ[0] TCC_RW_REQ[0] TCC_MISS[1] TCC_READ[1] TCC_REQ[1] TCC_RW_REQ[1] TCC_MISS[2] TCC_READ[2] TCC_REQ[2] TCC_RW_REQ[2] TCC_MISS[3] TCC_READ[3] TCC_REQ[3] TCC_RW_REQ[3] TCC_MISS[4] TCC_READ[4] TCC_REQ[4] TCC_RW_REQ[4] TCC_MISS[5] TCC_READ[5] TCC_REQ[5] TCC_RW_REQ[5] TCC_MISS[6] TCC_READ[6] TCC_REQ[6] TCC_RW_REQ[6] TCC_MISS[7] TCC_READ[7] TCC_REQ[7] TCC_RW_REQ[7] TCC_MISS[8] TCC_READ[8] TCC_REQ[8] TCC_RW_REQ[8] TCC_MISS[9] TCC_READ[9] TCC_REQ[9] TCC_RW_REQ[9] TCC_MISS[10] TCC_READ[10] TCC_REQ[10] TCC_RW_REQ[10] TCC_MISS[11] TCC_READ[11] TCC_REQ[11] TCC_RW_REQ[11] TCC_MISS[12] TCC_READ[12] TCC_REQ[12] TCC_RW_REQ[12] TCC_MISS[13] TCC_READ[13] TCC_REQ[13] TCC_RW_REQ[13] TCC_MISS[14] TCC_READ[14] TCC_REQ[14] TCC_RW_REQ[14] TCC_MISS[15] TCC_READ[15] TCC_REQ[15] TCC_RW_REQ[15]
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_17.txt b/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_17.txt
new file mode 100644
index 0000000000..ca9271fb33
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_17.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_TAG_STALL[0] TCC_TOO_MANY_EA_WRREQS_STALL[0] TCC_WRITE[0] TCC_TAG_STALL[1] TCC_TOO_MANY_EA_WRREQS_STALL[1] TCC_WRITE[1] TCC_TAG_STALL[2] TCC_TOO_MANY_EA_WRREQS_STALL[2] TCC_WRITE[2] TCC_TAG_STALL[3] TCC_TOO_MANY_EA_WRREQS_STALL[3] TCC_WRITE[3] TCC_TAG_STALL[4] TCC_TOO_MANY_EA_WRREQS_STALL[4] TCC_WRITE[4] TCC_TAG_STALL[5] TCC_TOO_MANY_EA_WRREQS_STALL[5] TCC_WRITE[5] TCC_TAG_STALL[6] TCC_TOO_MANY_EA_WRREQS_STALL[6] TCC_WRITE[6] TCC_TAG_STALL[7] TCC_TOO_MANY_EA_WRREQS_STALL[7] TCC_WRITE[7] TCC_TAG_STALL[8] TCC_TOO_MANY_EA_WRREQS_STALL[8] TCC_WRITE[8] TCC_TAG_STALL[9] TCC_TOO_MANY_EA_WRREQS_STALL[9] TCC_WRITE[9] TCC_TAG_STALL[10] TCC_TOO_MANY_EA_WRREQS_STALL[10] TCC_WRITE[10] TCC_TAG_STALL[11] TCC_TOO_MANY_EA_WRREQS_STALL[11] TCC_WRITE[11] TCC_TAG_STALL[12] TCC_TOO_MANY_EA_WRREQS_STALL[12] TCC_WRITE[12] TCC_TAG_STALL[13] TCC_TOO_MANY_EA_WRREQS_STALL[13] TCC_WRITE[13] TCC_TAG_STALL[14] TCC_TOO_MANY_EA_WRREQS_STALL[14] TCC_WRITE[14] TCC_TAG_STALL[15] TCC_TOO_MANY_EA_WRREQS_STALL[15] TCC_WRITE[15]
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_2.txt b/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..9f057aa6eb
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 TCP_VOLATILE_sum TCP_TOTAL_ACCESSES_sum TCP_TOTAL_READ_sum TCP_TOTAL_WRITE_sum TA_BUFFER_ATOMIC_WAVEFRONTS_sum TA_BUFFER_TOTAL_CYCLES_sum TD_ATOMIC_WAVEFRONT_sum TD_STORE_WAVEFRONT_sum SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION CPF_CPF_STAT_IDLE CPF_CPF_TCIU_IDLE TCC_REQ_sum TCC_STREAMING_REQ_sum TCC_HIT_sum TCC_MISS_sum
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_3.txt b/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..903f7eaccd
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS TCP_TOTAL_ATOMIC_WITH_RET_sum TCP_TOTAL_ATOMIC_WITHOUT_RET_sum TCP_TOTAL_WRITEBACK_INVALIDATES_sum TCP_TOTAL_CACHE_ACCESSES_sum TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES_sum TD_COALESCABLE_WAVEFRONT_sum SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE CPF_CMP_UTCL1_STALL_ON_TRANSLATION TCC_READ_sum TCC_WRITE_sum TCC_ATOMIC_sum TCC_WRITEBACK_sum
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_4.txt b/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..483e53ba2d
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAIT_ANY SQ_WAIT_INST_ANY SQ_ACTIVE_INST_ANY SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU TCP_UTCL1_TRANSLATION_MISS_sum TCP_UTCL1_TRANSLATION_HIT_sum TCP_UTCL1_PERMISSION_MISS_sum TCP_UTCL1_REQUEST_sum TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_TOTAL_WAVEFRONTS_sum SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE TCC_EA0_WRREQ_sum TCC_EA0_WRREQ_64B_sum TCC_EA0_WR_UNCACHED_32B_sum TCC_EA0_WRREQ_DRAM_sum
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_5.txt b/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..2e81396290
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_SCA SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU TCP_TCC_READ_REQ_sum TCP_TCC_WRITE_REQ_sum TCP_TCC_ATOMIC_WITH_RET_REQ_sum TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN CPC_ME1_DC0_SPI_BUSY TCC_EA0_RDREQ_sum TCC_EA0_RDREQ_32B_sum TCC_BUBBLE_sum TCC_EA0_RD_UNCACHED_32B_sum
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_6.txt b/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..c8b8ad7f76
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_THREAD_CYCLES_VALU SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 TCP_TCC_NC_READ_REQ_sum TCP_TCC_NC_WRITE_REQ_sum TCP_TCC_NC_ATOMIC_REQ_sum TCP_TCC_UC_READ_REQ_sum TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN TCC_EA0_RDREQ_DRAM_sum TCC_TAG_STALL_sum TCC_NORMAL_WRITEBACK_sum TCC_ALL_TC_OP_WB_WRITEBACK_sum
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_7.txt b/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..34d1290944
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED TCP_TCC_UC_WRITE_REQ_sum TCP_TCC_UC_ATOMIC_REQ_sum TCP_TCC_CC_READ_REQ_sum TCP_TCC_CC_WRITE_REQ_sum TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR TCC_NORMAL_EVICT_sum TCC_ALL_TC_OP_INV_EVICT_sum TCC_TOO_MANY_EA_WRREQS_STALL_sum TCC_EA0_ATOMIC_sum
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_8.txt b/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..dd60bab718
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES TCP_TCC_CC_ATOMIC_REQ_sum TCP_TCC_RW_READ_REQ_sum TCP_TCC_RW_WRITE_REQ_sum TCP_TCC_RW_ATOMIC_REQ_sum SPI_VWC_CSC_WR SPI_RA_BULKY_CU_FULL_CSN TCC_EA0_RDREQ_LEVEL_sum TCC_EA0_WRREQ_LEVEL_sum TCC_EA0_ATOMIC_LEVEL_sum TCC_EA0_WRREQ_STALL_sum
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_9.txt b/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..fe317629ed
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300A_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ TCP_PENDING_STALL_CYCLES_sum
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300A_A1/perfmon/timestamps.txt b/tests/workloads/dispatch_0/MI300A_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..24911467fe
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300A_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300A_A1/pmc_perf.csv b/tests/workloads/dispatch_0/MI300A_A1/pmc_perf.csv
new file mode 100644
index 0000000000..ab3fade524
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300A_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SQ_INSTS_BRANCH,SQ_INSTS_SENDMSG,SQ_WAIT_ANY,SQ_WAIT_INST_ANY,SQ_ACTIVE_INST_ANY,SQ_ACTIVE_INST_VMEM,SQ_ACTIVE_INST_LDS,SQ_ACTIVE_INST_VALU,SPI_RA_WAVE_SIMD_FULL_CSN,SPI_RA_VGPR_SIMD_FULL_CSN,CPC_CPC_UTCL2IU_STALL,CPC_ME1_BUSY_FOR_PACKET_DECODE,TA_ADDR_STALLED_BY_TC_CYCLES_sum,TA_TOTAL_WAVEFRONTS_sum,TCC_EA0_WRREQ_64B_sum,TCC_EA0_WRREQ_DRAM_sum,TCC_EA0_WRREQ_sum,TCC_EA0_WR_UNCACHED_32B_sum,TCP_UTCL1_PERMISSION_MISS_sum,TCP_UTCL1_REQUEST_sum,TCP_UTCL1_TRANSLATION_HIT_sum,TCP_UTCL1_TRANSLATION_MISS_sum,Wave_Size_1,Correlation_ID_1,XCC_Index,TCC_EA0_WRREQ[0],TCC_EA0_WRREQ_64B[0],TCC_EA0_WRREQ_LEVEL[0],TCC_HIT[0],TCC_EA0_WRREQ[1],TCC_EA0_WRREQ_64B[1],TCC_EA0_WRREQ_LEVEL[1],TCC_HIT[1],TCC_EA0_WRREQ[2],TCC_EA0_WRREQ_64B[2],TCC_EA0_WRREQ_LEVEL[2],TCC_HIT[2],TCC_EA0_WRREQ[3],TCC_EA0_WRREQ_64B[3],TCC_EA0_WRREQ_LEVEL[3],TCC_HIT[3],TCC_EA0_WRREQ[4],TCC_EA0_WRREQ_64B[4],TCC_EA0_WRREQ_LEVEL[4],TCC_HIT[4],TCC_EA0_WRREQ[5],TCC_EA0_WRREQ_64B[5],TCC_EA0_WRREQ_LEVEL[5],TCC_HIT[5],TCC_EA0_WRREQ[6],TCC_EA0_WRREQ_64B[6],TCC_EA0_WRREQ_LEVEL[6],TCC_HIT[6],TCC_EA0_WRREQ[7],TCC_EA0_WRREQ_64B[7],TCC_EA0_WRREQ_LEVEL[7],TCC_HIT[7],TCC_EA0_WRREQ[8],TCC_EA0_WRREQ_64B[8],TCC_EA0_WRREQ_LEVEL[8],TCC_HIT[8],TCC_EA0_WRREQ[9],TCC_EA0_WRREQ_64B[9],TCC_EA0_WRREQ_LEVEL[9],TCC_HIT[9],TCC_EA0_WRREQ[10],TCC_EA0_WRREQ_64B[10],TCC_EA0_WRREQ_LEVEL[10],TCC_HIT[10],TCC_EA0_WRREQ[11],TCC_EA0_WRREQ_64B[11],TCC_EA0_WRREQ_LEVEL[11],TCC_HIT[11],TCC_EA0_WRREQ[12],TCC_EA0_WRREQ_64B[12],TCC_EA0_WRREQ_LEVEL[12],TCC_HIT[12],TCC_EA0_WRREQ[13],TCC_EA0_WRREQ_64B[13],TCC_EA0_WRREQ_LEVEL[13],TCC_HIT[13],TCC_EA0_WRREQ[14],TCC_EA0_WRREQ_64B[14],TCC_EA0_WRREQ_LEVEL[14],TCC_HIT[14],TCC_EA0_WRREQ[15],TCC_EA0_WRREQ_64B[15],TCC_EA0_WRREQ_LEVEL[15],TCC_HIT[15],TCC_EA0_WRREQ[16],TCC_EA0_WRREQ_64B[16],TCC_EA0_WRREQ_LEVEL[16],TCC_HIT[16],TCC_EA0_WRREQ[17],TCC_EA0_WRREQ_64B[17],TCC_EA0_WRREQ_LEVEL[17],TCC_HIT[17],TCC_EA0_WRREQ[18],TCC_EA0_WRREQ_64B[18],TCC_EA0_WRREQ_LEVEL[18],TCC_HIT[18],TCC_EA0_WRREQ[19],TCC_EA0_WRREQ_64B[19],TCC_EA0_WRREQ_LEVEL[19],TCC_HIT[19],TCC_EA0_WRREQ[20],TCC_EA0_WRREQ_64B[20],TCC_EA0_WRREQ_LEVEL[20],TCC_HIT[20],TCC_EA0_WRREQ[21],TCC_EA0_WRREQ_64B[21],TCC_EA0_WRREQ_LEVEL[21],TCC_HIT[21],TCC_EA0_WRREQ[22],TCC_EA0_WRREQ_64B[22],TCC_EA0_WRREQ_LEVEL[22],TCC_HIT[22],TCC_EA0_WRREQ[23],TCC_EA0_WRREQ_64B[23],TCC_EA0_WRREQ_LEVEL[23],TCC_HIT[23],TCC_EA0_WRREQ[24],TCC_EA0_WRREQ_64B[24],TCC_EA0_WRREQ_LEVEL[24],TCC_HIT[24],TCC_EA0_WRREQ[25],TCC_EA0_WRREQ_64B[25],TCC_EA0_WRREQ_LEVEL[25],TCC_HIT[25],TCC_EA0_WRREQ[26],TCC_EA0_WRREQ_64B[26],TCC_EA0_WRREQ_LEVEL[26],TCC_HIT[26],TCC_EA0_WRREQ[27],TCC_EA0_WRREQ_64B[27],TCC_EA0_WRREQ_LEVEL[27],TCC_HIT[27],TCC_EA0_WRREQ[28],TCC_EA0_WRREQ_64B[28],TCC_EA0_WRREQ_LEVEL[28],TCC_HIT[28],TCC_EA0_WRREQ[29],TCC_EA0_WRREQ_64B[29],TCC_EA0_WRREQ_LEVEL[29],TCC_HIT[29],TCC_EA0_WRREQ[30],TCC_EA0_WRREQ_64B[30],TCC_EA0_WRREQ_LEVEL[30],TCC_HIT[30],TCC_EA0_WRREQ[31],TCC_EA0_WRREQ_64B[31],TCC_EA0_WRREQ_LEVEL[31],TCC_HIT[31],TCC_EA0_WRREQ[32],TCC_EA0_WRREQ_64B[32],TCC_EA0_WRREQ_LEVEL[32],TCC_HIT[32],TCC_EA0_WRREQ[33],TCC_EA0_WRREQ_64B[33],TCC_EA0_WRREQ_LEVEL[33],TCC_HIT[33],TCC_EA0_WRREQ[34],TCC_EA0_WRREQ_64B[34],TCC_EA0_WRREQ_LEVEL[34],TCC_HIT[34],TCC_EA0_WRREQ[35],TCC_EA0_WRREQ_64B[35],TCC_EA0_WRREQ_LEVEL[35],TCC_HIT[35],TCC_EA0_WRREQ[36],TCC_EA0_WRREQ_64B[36],TCC_EA0_WRREQ_LEVEL[36],TCC_HIT[36],TCC_EA0_WRREQ[37],TCC_EA0_WRREQ_64B[37],TCC_EA0_WRREQ_LEVEL[37],TCC_HIT[37],TCC_EA0_WRREQ[38],TCC_EA0_WRREQ_64B[38],TCC_EA0_WRREQ_LEVEL[38],TCC_HIT[38],TCC_EA0_WRREQ[39],TCC_EA0_WRREQ_64B[39],TCC_EA0_WRREQ_LEVEL[39],TCC_HIT[39],TCC_EA0_WRREQ[40],TCC_EA0_WRREQ_64B[40],TCC_EA0_WRREQ_LEVEL[40],TCC_HIT[40],TCC_EA0_WRREQ[41],TCC_EA0_WRREQ_64B[41],TCC_EA0_WRREQ_LEVEL[41],TCC_HIT[41],TCC_EA0_WRREQ[42],TCC_EA0_WRREQ_64B[42],TCC_EA0_WRREQ_LEVEL[42],TCC_HIT[42],TCC_EA0_WRREQ[43],TCC_EA0_WRREQ_64B[43],TCC_EA0_WRREQ_LEVEL[43],TCC_HIT[43],TCC_EA0_WRREQ[44],TCC_EA0_WRREQ_64B[44],TCC_EA0_WRREQ_LEVEL[44],TCC_HIT[44],TCC_EA0_WRREQ[45],TCC_EA0_WRREQ_64B[45],TCC_EA0_WRREQ_LEVEL[45],TCC_HIT[45],TCC_EA0_WRREQ[46],TCC_EA0_WRREQ_64B[46],TCC_EA0_WRREQ_LEVEL[46],TCC_HIT[46],TCC_EA0_WRREQ[47],TCC_EA0_WRREQ_64B[47],TCC_EA0_WRREQ_LEVEL[47],TCC_HIT[47],TCC_EA0_WRREQ[48],TCC_EA0_WRREQ_64B[48],TCC_EA0_WRREQ_LEVEL[48],TCC_HIT[48],TCC_EA0_WRREQ[49],TCC_EA0_WRREQ_64B[49],TCC_EA0_WRREQ_LEVEL[49],TCC_HIT[49],TCC_EA0_WRREQ[50],TCC_EA0_WRREQ_64B[50],TCC_EA0_WRREQ_LEVEL[50],TCC_HIT[50],TCC_EA0_WRREQ[51],TCC_EA0_WRREQ_64B[51],TCC_EA0_WRREQ_LEVEL[51],TCC_HIT[51],TCC_EA0_WRREQ[52],TCC_EA0_WRREQ_64B[52],TCC_EA0_WRREQ_LEVEL[52],TCC_HIT[52],TCC_EA0_WRREQ[53],TCC_EA0_WRREQ_64B[53],TCC_EA0_WRREQ_LEVEL[53],TCC_HIT[53],TCC_EA0_WRREQ[54],TCC_EA0_WRREQ_64B[54],TCC_EA0_WRREQ_LEVEL[54],TCC_HIT[54],TCC_EA0_WRREQ[55],TCC_EA0_WRREQ_64B[55],TCC_EA0_WRREQ_LEVEL[55],TCC_HIT[55],TCC_EA0_WRREQ[56],TCC_EA0_WRREQ_64B[56],TCC_EA0_WRREQ_LEVEL[56],TCC_HIT[56],TCC_EA0_WRREQ[57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CED_WRITE_CYCLES_sum,TCC_ATOMIC_sum,TCC_READ_sum,TCC_WRITEBACK_sum,TCC_WRITE_sum,TCP_TOTAL_ATOMIC_WITHOUT_RET_sum,TCP_TOTAL_ATOMIC_WITH_RET_sum,TCP_TOTAL_CACHE_ACCESSES_sum,TCP_TOTAL_WRITEBACK_INVALIDATES_sum,TD_COALESCABLE_WAVEFRONT_sum,Wave_Size_5,Correlation_ID_5,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,TA_FLAT_ATOMIC_WAVEFRONTS_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,TCC_ALL_TC_OP_INV_EVICT_sum,TCC_EA0_ATOMIC_sum,TCC_NORMAL_EVICT_sum,TCC_TOO_MANY_EA_WRREQS_STALL_sum,TCP_TCC_CC_READ_REQ_sum,TCP_TCC_CC_WRITE_REQ_sum,TCP_TCC_UC_ATOMIC_REQ_sum,TCP_TCC_UC_WRITE_REQ_sum,Wave_Size_6,Correlation_ID_6,XCC_Index_6,TCC_MISS[0],TCC_READ[0],TCC_REQ[0],TCC_RW_REQ[0],TCC_MISS[1],TCC_READ[1],TCC_REQ[1],TCC_RW_REQ[1],TCC_MISS[2],TCC_READ[2],TCC_REQ[2],TCC_RW_REQ[2],TCC_MISS[3],TCC_READ[3],TCC_REQ[3],TCC_RW_REQ[3],TCC_MISS[4],TCC_READ[4],TCC_REQ[4],TCC_RW_REQ[4],TCC_MISS[5],TCC_READ[5],TCC_REQ[5],TCC_RW_REQ[5],TCC_MISS[6],TCC_READ[6],TCC_REQ[6],TCC_RW_REQ[6],TCC_MISS[7],TCC_READ[7],TCC_REQ[7],TCC_RW_REQ[7],TCC_MISS[8],TCC_READ[8],TCC_REQ[8],TCC_RW_REQ[8],TCC_MISS[9],TCC_READ[9],TCC_REQ[9],TCC_RW_REQ[9],TCC_MISS[10],TCC_READ[10],TCC_REQ[10],TCC_RW_REQ[10],TCC_MISS[11],TCC_READ[11],TCC_REQ[11],TCC_RW_REQ[11],TCC_MISS[12],TCC_READ[12],TCC_REQ[12],TCC_RW_REQ[12],TCC_MISS[13],TCC_READ[13],TCC_REQ[13],TCC_RW_REQ[13],TCC_MISS[14],TCC_READ[14],TCC_REQ[14],TCC_RW_REQ[14],TCC_MISS[15],TCC_READ[15],TCC_REQ[15],TCC_RW_REQ[15],TCC_MISS[16],TCC_READ[16],TCC_REQ[16],TCC_RW_REQ[16],TCC_MISS[17],TCC_READ[17],TCC_REQ[17],TCC_RW_REQ[17],TCC_MISS[18],TCC_READ[18],TCC_REQ[18],TCC_RW_REQ[18],TCC_MISS[19],TCC_READ[19],TCC_REQ[19],TCC_RW_REQ[19],TCC_MISS[20],TCC_READ[20],TCC_REQ[20],TCC_RW_REQ[20],TCC_MISS[21],TCC_READ[21],TCC_REQ[21],TCC_RW_REQ[21],TCC_MISS[22],TCC_READ[22],TCC_REQ[22],TCC_RW_REQ[22],TCC_MISS[23],TCC_READ[23],TCC_REQ[23],TCC_RW_REQ[23],TCC_MISS[24],TCC_READ[24],TCC_REQ[24],TCC_RW_REQ[24],TCC_MISS[25],TCC_READ[25],TCC_REQ[25],TCC_RW_REQ[25],TCC_MISS[26],TCC_READ[26],TCC_REQ[26],TCC_RW_REQ[26],TCC_MISS[27],TCC_READ[27],TCC_REQ[27],TCC_RW_REQ[27],TCC_MISS[28],TCC_READ[28],TCC_REQ[28],TCC_RW_REQ[28],TCC_MISS[29],TCC_READ[29],TCC_REQ[29],TCC_RW_REQ[29],TCC_MISS[30],TCC_READ[30],TCC_REQ[30],TCC_RW_REQ[30],TCC_MISS[31],TCC_READ[31],TCC_REQ[31],TCC_RW_REQ[31],TCC_MISS[32],TCC_READ[32],TCC_REQ[32],TCC_RW_REQ[32],TCC_MISS[33],TCC_READ[33],TCC_REQ[33],TCC_RW_REQ[33],TCC_MISS[34],TCC_READ[34],TCC_REQ[34],TCC_RW_REQ[34],TCC_MISS[35],TCC_READ[35],TCC_REQ[35],TCC_RW_REQ[35],TCC_MISS[36],TCC_READ[36],TCC_REQ[36],TCC_RW_REQ[36],TCC_MISS[37],TCC_READ[37],TCC_REQ[37],TCC_RW_REQ[37],TCC_MISS[38],TCC_READ[38],TCC_REQ[38],TCC_RW_REQ[38],TCC_MISS[39],TCC_READ[39],TCC_REQ[39],TCC_RW_REQ[39],TCC_MISS[40],TCC_READ[40],TCC_REQ[40],TCC_RW_REQ[40],TCC_MISS[41],TCC_READ[41],TCC_REQ[41],TCC_RW_REQ[41],TCC_MISS[42],TCC_READ[42],TCC_REQ[42],TCC_RW_REQ[42],TCC_MISS[43],TCC_READ[43],TCC_REQ[43],TCC_RW_REQ[43],TCC_MISS[44],TCC_READ[44],TCC_REQ[44],TCC_RW_REQ[44],TCC_MISS[45],TCC_READ[45],TCC_REQ[45],TCC_RW_REQ[45],TCC_MISS[46],TCC_READ[46],TCC_REQ[46],TCC_RW_REQ[46],TCC_MISS[47],TCC_READ[47],TCC_REQ[47],TCC_RW_REQ[47],TCC_MISS[48],TCC_READ[48],TCC_REQ[48],TCC_RW_REQ[48],TCC_MISS[49],TCC_READ[49],TCC_REQ[49],TCC_RW_REQ[49],TCC_MISS[50],TCC_READ[50],TCC_REQ[50],TCC_RW_REQ[50],TCC_MISS[51],TCC_READ[51],TCC_REQ[51],TCC_RW_REQ[51],TCC_MISS[52],TCC_READ[52],TCC_REQ[52],TCC_RW_REQ[52],TCC_MISS[53],TCC_READ[53],TCC_REQ[53],TCC_RW_REQ[53],TCC_MISS[54],TCC_READ[54],TCC_REQ[54],TCC_RW_REQ[54],TCC_MISS[55],TCC_READ[55],TCC_REQ[55],TCC_RW_REQ[55],TCC_MISS[56],TCC_READ[56],TCC_REQ[56],TCC_RW_REQ[56],TCC_MISS[57],TCC_READ[57],TCC_REQ[57],TCC_RW_REQ[57],TCC_MISS[58],TCC_READ[58],TCC_REQ[58],TCC_RW_REQ[58],TCC_MISS[59],TCC_READ[59],TCC_REQ[59],TCC_RW_REQ[59],TCC_MISS[60],TCC_READ[60],TCC_REQ[60],TCC_RW_REQ[60],TCC_MISS[61],TCC_READ[61],TCC_REQ[61],TCC_RW_REQ[61],TCC_MISS[62],TCC_READ[62],TCC_REQ[62],TCC_RW_REQ[62],TCC_MISS[63],TCC_READ[63],TCC_REQ[63],TCC_RW_REQ[63],TCC_MISS[64],TCC_READ[64],TCC_REQ[64],TCC_RW_REQ[64],TCC_MISS[65],TCC_READ[65],TCC_REQ[65],TCC_RW_REQ[65],TCC_MISS[66],TCC_READ[66],TCC_REQ[66],TCC_RW_REQ[66],TCC_MISS[67],TCC_READ[67],TCC_REQ[67],TCC_RW_REQ[67],TCC_MISS[68],TCC_READ[68],TCC_REQ[68],TCC_RW_REQ[68],TCC_MISS[69],TCC_READ[69],TCC_REQ[69],TCC_RW_REQ[69],TCC_MISS[70],TCC_READ[70],TCC_REQ[70],TCC_RW_REQ[70],TCC_MISS[71],TCC_READ[71],TCC_REQ[71],TCC_RW_REQ[71],TCC_MISS[72],TCC_READ[72],TCC_REQ[72],TCC_RW_REQ[72],TCC_MISS[73],TCC_READ[73],TCC_REQ[73],TCC_RW_REQ[73],TCC_MISS[74],TCC_READ[74],TCC_REQ[74],TCC_RW_REQ[74],TCC_MISS[75],TCC_READ[75],TCC_REQ[75],TCC_RW_REQ[75],TCC_MISS[76],TCC_READ[76],TCC_REQ[76],TCC_RW_REQ[76],TCC_MISS[77],TCC_READ[77],TCC_REQ[77],TCC_RW_REQ[77],TCC_MISS[78],TCC_READ[78],TCC_REQ[78],TCC_RW_REQ[78],TCC_MISS[79],TCC_READ[79],TCC_REQ[79],TCC_RW_REQ[79],TCC_MISS[80],TCC_READ[80],TCC_REQ[80],TCC_RW_REQ[80],TCC_MISS[81],TCC_READ[81],TCC_REQ[81],TCC_RW_REQ[81],TCC_MISS[82],TCC_READ[82],TCC_REQ[82],TCC_RW_REQ[82],TCC_MISS[83],TCC_READ[83],TCC_REQ[83],TCC_RW_REQ[83],TCC_MISS[84],TCC_READ[84],TCC_REQ[84],TCC_RW_REQ[84],TCC_MISS[85],TCC_READ[85],TCC_REQ[85],TCC_RW_REQ[85],TCC_MISS[86],TCC_READ[86],TCC_REQ[86],TCC_RW_REQ[86],TCC_MISS[87],TCC_READ[87],TCC_REQ[87],TCC_RW_REQ[87],TCC_MISS[88],TCC_READ[88],TCC_REQ[88],TCC_RW_REQ[88],TCC_MISS[89],TCC_READ[89],TCC_REQ[89],TCC_RW_REQ[89],TCC_MISS[90],TCC_READ[90],TCC_REQ[90],TCC_RW_REQ[90],TCC_MISS[91],TCC_READ[91],TCC_REQ[91],TCC_RW_REQ[91],TCC_MISS[92],TCC_READ[92],TCC_REQ[92],TCC_RW_REQ[92],TCC_MISS[93],TCC_READ[93],TCC_REQ[93],TCC_RW_REQ[93],TCC_MISS[94],TCC_READ[94],TCC_REQ[94],TCC_RW_REQ[94],TCC_MISS[95],TCC_READ[95],TCC_REQ[95],TCC_RW_REQ[95],Wave_Size_7,Correlation_ID_7,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SPI_RA_REQ_NO_ALLOC,SPI_RA_REQ_NO_ALLOC_CSN,CPC_CPC_STAT_STALL,CPC_UTCL1_STALL_ON_TRANSLATION,CPF_CPF_STAT_IDLE,CPF_CPF_TCIU_IDLE,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,TA_BUFFER_TOTAL_CYCLES_sum,TCC_HIT_sum,TCC_MISS_sum,TCC_REQ_sum,TCC_STREAMING_REQ_sum,TCP_TOTAL_ACCESSES_sum,TCP_TOTAL_READ_sum,TCP_TOTAL_WRITE_sum,TCP_VOLATILE_sum,TD_ATOMIC_WAVEFRONT_sum,TD_STORE_WAVEFRONT_sum,Wave_Size_8,Correlation_ID_8,XCC_Index_8,TCC_ATOMIC[0],TCC_BUBBLE[0],TCC_CYCLE[0],TCC_EA0_ATOMIC[0],TCC_ATOMIC[1],TCC_BUBBLE[1],TCC_CYCLE[1],TCC_EA0_ATOMIC[1],TCC_ATOMIC[2],TCC_BUBBLE[2],TCC_CYCLE[2],TCC_EA0_ATOMIC[2],TCC_ATOMIC[3],TCC_BUBBLE[3],TCC_CYCLE[3],TCC_EA0_ATOMIC[3],TCC_ATOMIC[4],TCC_BUBBLE[4],TCC_CYCLE[4],TCC_EA0_ATOMIC[4],TCC_ATOMIC[5],TCC_BUBBLE[5],TCC_CYCLE[5],TCC_EA0_ATOMIC[5],TCC_ATOMIC[6],TCC_BUBBLE[6],TCC_CYCLE[6],TCC_EA0_ATOMIC[6],TCC_ATOMIC[7],TCC_BUBBLE[7],TCC_CYCLE[7],TCC_EA0_ATOMIC[7],TCC_ATOMIC[8],TCC_BUBBLE[8],TCC_CYCLE[8],TCC_EA0_ATOMIC[8],TCC_ATOMIC[9],TCC_BUBBLE[9],TCC_CYCLE[9],TCC_EA0_ATOMIC[9],TCC_ATOMIC[10],TCC_BUBBLE[10],TCC_CYCLE[10],TCC_EA0_ATOMIC[10],TCC_ATOMIC[11],TCC_BUBBLE[11],TCC_CYCLE[11],TCC_EA0_ATOMIC[11],TCC_ATOMIC[12],TCC_BUBBLE[12],TCC_CYCLE[12],TCC_EA0_ATOMIC[12],TCC_ATOMIC[13],TCC_BUBBLE[13],TCC_CYCLE[13],TCC_EA0_ATOMIC[13],TCC_ATOMIC[14],TCC_BUBBLE[14],TCC_CYCLE[14],TCC_EA0_ATOMIC[14],TCC_ATOMIC[15],TCC_BUBBLE[15],TCC_CYCLE[15],TCC_EA0_ATOMIC[15],TCC_ATOMIC[16],TCC_BUBBLE[16],TCC_CYCLE[16],TCC_EA0_ATOMIC[16],TCC_ATOMIC[17],TCC_BUBBLE[17],TCC_CYCLE[17],TCC_EA0_ATOMIC[17],TCC_ATOMIC[18],TCC_BUBBLE[18],TCC_CYCLE[18],TCC_EA0_ATOMIC[18],TCC_ATOMIC[19],TCC_BUBBLE[19],TCC_CYCLE[19],TCC_EA0_ATOMIC[19],TCC_ATOMIC[20],TCC_BUBBLE[20],TCC_CYCLE[20],TCC_EA0_ATOMIC[20],TCC_ATOMIC[21],TCC_BUBBLE[21],TCC_CYCLE[21],TCC_EA0_ATOMIC[21],TCC_ATOMIC[22],TCC_BUBBLE[22],TCC_CYCLE[22],TCC_EA0_ATOMIC[22],TCC_ATOMIC[23],TCC_BUBBLE[23],TCC_CYCLE[23],TCC_EA0_ATOMIC[23],TCC_ATOMIC[24],TCC_BUBBLE[24],TCC_CYCLE[24],TCC_EA0_ATOMIC[24],TCC_ATOMIC[25],TCC_BUBBLE[25],TCC_CYCLE[25],TCC_EA0_ATOMIC[25],TCC_ATOMIC[26],TCC_BUBBLE[26],TCC_CYCLE[26],TCC_EA0_ATOMIC[26],TCC_ATOMIC[27],TCC_BUBBLE[27],TCC_CYCLE[27],TCC_EA0_ATOMIC[27],TCC_ATOMIC[28],TCC_BUBBLE[28],TCC_CYCLE[28],TCC_EA0_ATOMIC[28],TCC_ATOMIC[29],TCC_BUBBLE[29],TCC_CYCLE[29],TCC_EA0_ATOMIC[29],TCC_ATOMIC[30],TCC_BUBBLE[30],TCC_CYCLE[30],TCC_EA0_ATOMIC[30],TCC_ATOMIC[31],TCC_BUBBLE[31],TCC_CYCLE[31],TCC_EA0_ATOMIC[31],TCC_ATOMIC[32],TCC_BUBBLE[32],TCC_CYCLE[32],TCC_EA0_ATOMIC[32],TCC_ATOMIC[33],TCC_BUBBLE[33],TCC_CYCLE[33],TCC_EA0_ATOMIC[33],TCC_ATOMIC[34],TCC_BUBBLE[34],TCC_CYCLE[34],TCC_EA0_ATOMIC[34],TCC_ATOMIC[35],TCC_BUBBLE[35],TCC_CYCLE[35],TCC_EA0_ATOMIC[35],TCC_ATOMIC[36],TCC_BUBBLE[36],TCC_CYCLE[36],TCC_EA0_ATOMIC[36],TCC_ATOMIC[37],TCC_BUBBLE[37],TCC_CYCLE[37],TCC_EA0_ATOMIC[37],TCC_ATOMIC[38],TCC_BUBBLE[38],TCC_CYCLE[38],TCC_EA0_ATOMIC[38],TCC_ATOMIC[39],TCC_BUBBLE[39],TCC_CYCLE[39],TCC_EA0_ATOMIC[39],TCC_ATOMIC[40],TCC_BUBBLE[40],TCC_CYCLE[40],TCC_EA0_ATOMIC[40],TCC_ATOMIC[41],TCC_BUBBLE[41],TCC_CYCLE[41],TCC_EA0_ATOMIC[41],TCC_ATOMIC[42],TCC_BUBBLE[42],TCC_CYCLE[42],TCC_EA0_ATOMIC[42],TCC_ATOMIC[43],TCC_BUBBLE[43],TCC_CYCLE[43],TCC_EA0_ATOMIC[43],TCC_ATOMIC[44],TCC_BUBBLE[44],TCC_CYCLE[44],TCC_EA0_ATOMIC[44],TCC_ATOMIC[45],TCC_BUBBLE[45],TCC_CYCLE[45],TCC_EA0_ATOMIC[45],TCC_ATOMIC[46],TCC_BUBBLE[46],TCC_CYCLE[46],TCC_EA0_ATOMIC[46],TCC_ATOMIC[47],TCC_BUBBLE[47],TCC_CYCLE[47],TCC_EA0_ATOMIC[47],TCC_ATOMIC[48],TCC_BUBBLE[48],TCC_CYCLE[48],TCC_EA0_ATOMIC[48],TCC_ATOMIC[49],TCC_BUBBLE[49],TCC_CYCLE[49],TCC_EA0_ATOMIC[49],TCC_ATOMIC[50],TCC_BUBBLE[50],TCC_CYCLE[50],TCC_EA0_ATOMIC[50],TCC_ATOMIC[51],TCC_BUBBLE[51],TCC_CYCLE[51],TCC_EA0_ATOMIC[51],TCC_ATOMIC[52],TCC_BUBBLE[52],TCC_CYCLE[52],TCC_EA0_ATOMIC[52],TCC_ATOMIC[53],TCC_BUBBLE[53],TCC_CYCLE[53],TCC_EA0_ATOMIC[53],TCC_ATOMIC[54],TCC_BUBBLE[54],TCC_CYCLE[54],TCC_EA0_ATOMIC[54],TCC_ATOMIC[55],TCC_BUBBLE[55],TCC_CYCLE[55],TCC_EA0_ATOMIC[55],TCC_ATOMIC[56],TCC_BUBBLE[56],TCC_CYCLE[56],TCC_EA0_ATOMIC[56],TCC_ATOMIC[57],TCC_BUBBLE[57],TCC_CYCLE[57],TCC_EA0_ATOMIC[57],TCC_ATOMIC[58],TCC_BUBBLE[58],TCC_CYCLE[58],TCC_EA0_ATOMIC[58],TCC_ATOMIC[59],TCC_BUBBLE[59],TCC_CYCLE[59],TCC_EA0_ATOMIC[59],TCC_ATOMIC[60],TCC_BUBBLE[60],TCC_CYCLE[60],TCC_EA0_ATOMIC[60],TCC_ATOMIC[61],TCC_BUBBLE[61],TCC_CYCLE[61],TCC_EA0_ATOMIC[61],TCC_ATOMIC[62],TCC_BUBBLE[62],TCC_CYCLE[62],TCC_EA0_ATOMIC[62],TCC_ATOMIC[63],TCC_BUBBLE[63],TCC_CYCLE[63],TCC_EA0_ATOMIC[63],TCC_ATOMIC[64],TCC_BUBBLE[64],TCC_CYCLE[64],TCC_EA0_ATOMIC[64],TCC_ATOMIC[65],TCC_BUBBLE[65],TCC_CYCLE[65],TCC_EA0_ATOMIC[65],TCC_ATOMIC[66],TCC_BUBBLE[66],TCC_CYCLE[66],TCC_EA0_ATOMIC[66],TCC_ATOMIC[67],TCC_BUBBLE[67],TCC_CYCLE[67],TCC_EA0_ATOMIC[67],TCC_ATOMIC[68],TCC_BUBBLE[68],TCC_CYCLE[68],TCC_EA0_ATOMIC[68],TCC_ATOMIC[69],TCC_BUBBLE[69],TCC_CYCLE[69],TCC_EA0_ATOMIC[69],TCC_ATOMIC[70],TCC_BUBBLE[70],TCC_CYCLE[70],TCC_EA0_ATOMIC[70],TCC_ATOMIC[71],TCC_BUBBLE[71],TCC_CYCLE[71],TCC_EA0_ATOMIC[71],TCC_ATOMIC[72],TCC_BUBBLE[72],TCC_CYCLE[72],TCC_EA0_ATOMIC[72],TCC_ATOMIC[73],TCC_BUBBLE[73],TCC_CYCLE[73],TCC_EA0_ATOMIC[73],TCC_ATOMIC[74],TCC_BUBBLE[74],TCC_CYCLE[74],TCC_EA0_ATOMIC[74],TCC_ATOMIC[75],TCC_BUBBLE[75],TCC_CYCLE[75],TCC_EA0_ATOMIC[75],TCC_ATOMIC[76],TCC_BUBBLE[76],TCC_CYCLE[76],TCC_EA0_ATOMIC[76],TCC_ATOMIC[77],TCC_BUBBLE[77],TCC_CYCLE[77],TCC_EA0_ATOMIC[77],TCC_ATOMIC[78],TCC_BUBBLE[78],TCC_CYCLE[78],TCC_EA0_ATOMIC[78],TCC_ATOMIC[79],TCC_BUBBLE[79],TCC_CYCLE[79],TCC_EA0_ATOMIC[79],TCC_ATOMIC[80],TCC_BUBBLE[80],TCC_CYCLE[80],TCC_EA0_ATOMIC[80],TCC_ATOMIC[81],TCC_BUBBLE[81],TCC_CYCLE[81],TCC_EA0_ATOMIC[81],TCC_ATOMIC[82],TCC_BUBBLE[82],TCC_CYCLE[82],TCC_EA0_ATOMIC[82],TCC_ATOMIC[83],TCC_BUBBLE[83],TCC_CYCLE[83],TCC_EA0_ATOMIC[83],TCC_ATOMIC[84],TCC_BUBBLE[84],TCC_CYCLE[84],TCC_EA0_ATOMIC[84],TCC_ATOMIC[85],TCC_BUBBLE[85],TCC_CYCLE[85],TCC_EA0_ATOMIC[85],TCC_ATOMIC[86],TCC_BUBBLE[86],TCC_CYCLE[86],TCC_EA0_ATOMIC[86],TCC_ATOMIC[87],TCC_BUBBLE[87],TCC_CYCLE[87],TCC_EA0_ATOMIC[87],TCC_ATOMIC[88],TCC_BUBBLE[88],TCC_CYCLE[88],TCC_EA0_ATOMIC[88],TCC_ATOMIC[89],TCC_BUBBLE[89],TCC_CYCLE[89],TCC_EA0_ATOMIC[89],TCC_ATOMIC[90],TCC_BUBBLE[90],TCC_CYCLE[90],TCC_EA0_ATOMIC[90],TCC_ATOMIC[91],TCC_BUBBLE[91],TCC_CYCLE[91],TCC_EA0_ATOMIC[91],TCC_ATOMIC[92],TCC_BUBBLE[92],TCC_CYCLE[92],TCC_EA0_ATOMIC[92],TCC_ATOMIC[93],TCC_BUBBLE[93],TCC_CYCLE[93],TCC_EA0_ATOMIC[93],TCC_ATOMIC[94],TCC_BUBBLE[94],TCC_CYCLE[94],TCC_EA0_ATOMIC[94],TCC_ATOMIC[95],TCC_BUBBLE[95],TCC_CYCLE[95],TCC_EA0_ATOMIC[95],Wave_Size_9,Correlation_ID_9,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_10,Correlation_ID_10,SQC_TC_DATA_ATOMIC_REQ,SQC_TC_STALL,SQC_TC_REQ,SQC_DCACHE_REQ_READ_16,SQC_ICACHE_REQ,SQC_ICACHE_HITS,SQC_ICACHE_MISSES,SQC_ICACHE_MISSES_DUPLICATE,Wave_Size_11,Correlation_ID_11,SQ_INSTS_VALU_MFMA_MOPS_I8,SQ_INSTS_VALU_MFMA_MOPS_F16,SQ_INSTS_VALU_MFMA_MOPS_BF16,SQ_INSTS_VALU_MFMA_MOPS_F32,SQ_INSTS_VALU_MFMA_MOPS_F64,SQC_TC_INST_REQ,SQC_TC_DATA_READ_REQ,SQC_TC_DATA_WRITE_REQ,TCP_PENDING_STALL_CYCLES_sum,Wave_Size_12,Correlation_ID_12,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,TCC_EA0_ATOMIC_LEVEL_sum,TCC_EA0_RDREQ_LEVEL_sum,TCC_EA0_WRREQ_LEVEL_sum,TCC_EA0_WRREQ_STALL_sum,TCP_TCC_CC_ATOMIC_REQ_sum,TCP_TCC_RW_ATOMIC_REQ_sum,TCP_TCC_RW_READ_REQ_sum,TCP_TCC_RW_WRITE_REQ_sum,Wave_Size_13,Correlation_ID_13,SQC_DCACHE_REQ_READ_2,SQC_DCACHE_REQ_READ_4,Wave_Size_14,Correlation_ID_14,SQ_ACTIVE_INST_SCA,SQ_ACTIVE_INST_EXP_GDS,SQ_ACTIVE_INST_MISC,SQ_ACTIVE_INST_FLAT,SQ_INST_CYCLES_VMEM_WR,SQ_INST_CYCLES_VMEM_RD,SQ_INST_CYCLES_SMEM,SQ_INST_CYCLES_SALU,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,CPC_ME1_DC0_SPI_BUSY,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,TCC_BUBBLE_sum,TCC_EA0_RDREQ_32B_sum,TCC_EA0_RDREQ_sum,TCC_EA0_RD_UNCACHED_32B_sum,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,TCP_TCC_READ_REQ_sum,TCP_TCC_WRITE_REQ_sum,Wave_Size_15,Correlation_ID_15,XCC_Index_15,TCC_EA0_ATOMIC_LEVEL[0],TCC_EA0_RDREQ[0],TCC_EA0_RDREQ_32B[0],TCC_EA0_RDREQ_LEVEL[0],TCC_EA0_ATOMIC_LEVEL[1],TCC_EA0_RDREQ[1],TCC_EA0_RDREQ_32B[1],TCC_EA0_RDREQ_LEVEL[1],TCC_EA0_ATOMIC_LEVEL[2],TCC_EA0_RDREQ[2],TCC_EA0_RDREQ_32B[2],TCC_EA0_RDREQ_LEVEL[2],TCC_EA0_ATOMIC_LEVEL[3],TCC_EA0_RDREQ[3],TCC_EA0_RDREQ_32B[3],TCC_EA0_RDREQ_LEVEL[3],TCC_EA0_ATOMIC_LEVEL[4],TCC_EA0_RDREQ[4],TCC_EA0_RDREQ_32B[4],TCC_EA0_RDREQ_LEVEL[4],TCC_EA0_ATOMIC_LEVEL[5],TCC_EA0_RDREQ[5],TCC_EA0_RDREQ_32B[5],TCC_EA0_RDREQ_LEVEL[5],TCC_EA0_ATOMIC_LEVEL[6],TCC_EA0_RDREQ[6],TCC_EA0_RDREQ_32B[6],TCC_EA0_RDREQ_LEVEL[6],TCC_EA0_ATOMIC_LEVEL[7],TCC_EA0_RDREQ[7],TCC_EA0_RDREQ_32B[7],TCC_EA0_RDREQ_LEVEL[7],TCC_EA0_ATOMIC_LEVEL[8],TCC_EA0_RDREQ[8],TCC_EA0_RDREQ_32B[8],TCC_EA0_RDREQ_LEVEL[8],TCC_EA0_ATOMIC_LEVEL[9],TCC_EA0_RDREQ[9],TCC_EA0_RDREQ_32B[9],TCC_EA0_RDREQ_LEVEL[9],TCC_EA0_ATOMIC_LEVEL[10],TCC_EA0_RDREQ[10],TCC_EA0_RDREQ_32B[10],TCC_EA0_RDREQ_LEVEL[10],TCC_EA0_ATOMIC_LEVEL[11],TCC_EA0_RDREQ[11],TCC_EA0_RDREQ_32B[11],TCC_EA0_RDREQ_LEVEL[11],TCC_EA0_ATOMIC_LEVEL[12],TCC_EA0_RDREQ[12],TCC_EA0_RDREQ_32B[12],TCC_EA0_RDREQ_LEVEL[12],TCC_EA0_ATOMIC_LEVEL[13],TCC_EA0_RDREQ[13],TCC_EA0_RDREQ_32B[13],TCC_EA0_RDREQ_LEVEL[13],TCC_EA0_ATOMIC_LEVEL[14],TCC_EA0_RDREQ[14],TCC_EA0_RDREQ_32B[14],TCC_EA0_RDREQ_LEVEL[14],TCC_EA0_ATOMIC_LEVEL[15],TCC_EA0_RDREQ[15],TCC_EA0_RDREQ_32B[15],TCC_EA0_RDREQ_LEVEL[15],TCC_EA0_ATOMIC_LEVEL[16],TCC_EA0_RDREQ[16],TCC_EA0_RDREQ_32B[16],TCC_EA0_RDREQ_LEVEL[16],TCC_EA0_ATOMIC_LEVEL[17],TCC_EA0_RDREQ[17],TCC_EA0_RDREQ_32B[17],TCC_EA0_RDREQ_LEVEL[17],TCC_EA0_ATOMIC_LEVEL[18],TCC_EA0_RDREQ[18],TCC_EA0_RDREQ_32B[18],TCC_EA0_RDREQ_LEVEL[18],TCC_EA0_ATOMIC_LEVEL[19],TCC_EA0_RDREQ[19],TCC_EA0_RDREQ_32B[19],TCC_EA0_RDREQ_LEVEL[19],TCC_EA0_ATOMIC_LEVEL[20],TCC_EA0_RDREQ[20],TCC_EA0_RDREQ_32B[20],TCC_EA0_RDREQ_LEVEL[20],TCC_EA0_ATOMIC_LEVEL[21],TCC_EA0_RDREQ[21],TCC_EA0_RDREQ_32B[21],TCC_EA0_RDREQ_LEVEL[21],TCC_EA0_ATOMIC_LEVEL[22],TCC_EA0_RDREQ[22],TCC_EA0_RDREQ_32B[22],TCC_EA0_RDREQ_LEVEL[22],TCC_EA0_ATOMIC_LEVEL[23],TCC_EA0_RDREQ[23],TCC_EA0_RDREQ_32B[23],TCC_EA0_RDREQ_LEVEL[23],TCC_EA0_ATOMIC_LEVEL[24],TCC_EA0_RDREQ[24],TCC_EA0_RDREQ_32B[24],TCC_EA0_RDREQ_LEVEL[24],TCC_EA0_ATOMIC_LEVEL[25],TCC_EA0_RDREQ[25],TCC_EA0_RDREQ_32B[25],TCC_EA0_RDREQ_LEVEL[25],TCC_EA0_ATOMIC_LEVEL[26],TCC_EA0_RDREQ[26],TCC_EA0_RDREQ_32B[26],TCC_EA0_RDREQ_LEVEL[26],TCC_EA0_ATOMIC_LEVEL[27],TCC_EA0_RDREQ[27],TCC_EA0_RDREQ_32B[27],TCC_EA0_RDREQ_LEVEL[27],TCC_EA0_ATOMIC_LEVEL[28],TCC_EA0_RDREQ[28],TCC_EA0_RDREQ_32B[28],TCC_EA0_RDREQ_LEVEL[28],TCC_EA0_ATOMIC_LEVEL[29],TCC_EA0_RDREQ[29],TCC_EA0_RDREQ_32B[29],TCC_EA0_RDREQ_LEVEL[29],TCC_EA0_ATOMIC_LEVEL[30],TCC_EA0_RDREQ[30],TCC_EA0_RDREQ_32B[30],TCC_EA0_RDREQ_LEVEL[30],TCC_EA0_ATOMIC_LEVEL[31],TCC_EA0_RDREQ[31],TCC_EA0_RDREQ_32B[31],TCC_EA0_RDREQ_LEVEL[31],TCC_EA0_ATOMIC_LEVEL[32],TCC_EA0_RDREQ[32],TCC_EA0_RDREQ_32B[32],TCC_EA0_RDREQ_LEVEL[32],TCC_EA0_ATOMIC_LEVEL[33],TCC_EA0_RDREQ[33],TCC_EA0_RDREQ_32B[33],TCC_EA0_RDREQ_LEVEL[33],TCC_EA0_ATOMIC_LEVEL[34],TCC_EA0_RDREQ[34],TCC_EA0_RDREQ_32B[34],TCC_EA0_RDREQ_LEVEL[34],TCC_EA0_ATOMIC_LEVEL[35],TCC_EA0_RDREQ[35],TCC_EA0_RDREQ_32B[35],TCC_EA0_RDREQ_LEVEL[35],TCC_EA0_ATOMIC_LEVEL[36],TCC_EA0_RDREQ[36],TCC_EA0_RDREQ_32B[36],TCC_EA0_RDREQ_LEVEL[36],TCC_EA0_ATOMIC_LEVEL[37],TCC_EA0_RDREQ[37],TCC_EA0_RDREQ_32B[37],TCC_EA0_RDREQ_LEVEL[37],TCC_EA0_ATOMIC_LEVEL[38],TCC_EA0_RDREQ[38],TCC_EA0_RDREQ_32B[38],TCC_EA0_RDREQ_LEVEL[38],TCC_EA0_ATOMIC_LEVEL[39],TCC_EA0_RDREQ[39],TCC_EA0_RDREQ_32B[39],TCC_EA0_RDREQ_LEVEL[39],TCC_EA0_ATOMIC_LEVEL[40],TCC_EA0_RDREQ[40],TCC_EA0_RDREQ_32B[40],TCC_EA0_RDREQ_LEVEL[40],TCC_EA0_ATOMIC_LEVEL[41],TCC_EA0_RDREQ[41],TCC_EA0_RDREQ_32B[41],TCC_EA0_RDREQ_LEVEL[41],TCC_EA0_ATOMIC_LEVEL[42],TCC_EA0_RDREQ[42],TCC_EA0_RDREQ_32B[42],TCC_EA0_RDREQ_LEVEL[42],TCC_EA0_ATOMIC_LEVEL[43],TCC_EA0_RDREQ[43],TCC_EA0_RDREQ_32B[43],TCC_EA0_RDREQ_LEVEL[43],TCC_EA0_ATOMIC_LEVEL[44],TCC_EA0_RDREQ[44],TCC_EA0_RDREQ_32B[44],TCC_EA0_RDREQ_LEVEL[44],TCC_EA0_ATOMIC_LEVEL[45],TCC_EA0_RDREQ[45],TCC_EA0_RDREQ_32B[45],TCC_EA0_RDREQ_LEVEL[45],TCC_EA0_ATOMIC_LEVEL[46],TCC_EA0_RDREQ[46],TCC_EA0_RDREQ_32B[46],TCC_EA0_RDREQ_LEVEL[46],TCC_EA0_ATOMIC_LEVEL[47],TCC_EA0_RDREQ[47],TCC_EA0_RDREQ_32B[47],TCC_EA0_RDREQ_LEVEL[47],TCC_EA0_ATOMIC_LEVEL[48],TCC_EA0_RDREQ[48],TCC_EA0_RDREQ_32B[48],TCC_EA0_RDREQ_LEVEL[48],TCC_EA0_ATOMIC_LEVEL[49],TCC_EA0_RDREQ[49],TCC_EA0_RDREQ_32B[49],TCC_EA0_RDREQ_LEVEL[49],TCC_EA0_ATOMIC_LEVEL[50],TCC_EA0_RDREQ[50],TCC_EA0_RDREQ_32B[50],TCC_EA0_RDREQ_LEVEL[50],TCC_EA0_ATOMIC_LEVEL[51],TCC_EA0_RDREQ[51],TCC_EA0_RDREQ_32B[51],TCC_EA0_RDREQ_LEVEL[51],TCC_EA0_ATOMIC_LEVEL[52],TCC_EA0_RDREQ[52],TCC_EA0_RDREQ_32B[52],TCC_EA0_RDREQ_LEVEL[52],TCC_EA0_ATOMIC_LEVEL[53],TCC_EA0_RDREQ[53],TCC_EA0_RDREQ_32B[53],TCC_EA0_RDREQ_LEVEL[53],TCC_EA0_ATOMIC_LEVEL[54],TCC_EA0_RDREQ[54],TCC_EA0_RDREQ_32B[54],TCC_EA0_RDREQ_LEVEL[54],TCC_EA0_ATOMIC_LEVEL[55],TCC_EA0_RDREQ[55],TCC_EA0_RDREQ_32B[55],TCC_EA0_RDREQ_LEVEL[55],TCC_EA0_ATOMIC_LEVEL[56],TCC_EA0_RDREQ[56],TCC_EA0_RDREQ_32B[56],TCC_EA0_RDREQ_LEVEL[56],TCC_EA0_ATOMIC_LEVEL[57],TCC_EA0_RDREQ[57],TCC_EA0_RDREQ_32B[57],TCC_EA0_RDREQ_LEVEL[57],TCC_EA0_ATOMIC_LEVEL[58],TCC_EA0_RDREQ[58],TCC_EA0_RDREQ_32B[58],TCC_EA0_RDREQ_LEVEL[58],TCC_EA0_ATOMIC_LEVEL[59],TCC_EA0_RDREQ[59],TCC_EA0_RDREQ_32B[59],TCC_EA0_RDREQ_LEVEL[59],TCC_EA0_ATOMIC_LEVEL[60],TCC_EA0_RDREQ[60],TCC_EA0_RDREQ_32B[60],TCC_EA0_RDREQ_LEVEL[60],TCC_EA0_ATOMIC_LEVEL[61],TCC_EA0_RDREQ[61],TCC_EA0_RDREQ_32B[61],TCC_EA0_RDREQ_LEVEL[61],TCC_EA0_ATOMIC_LEVEL[62],TCC_EA0_RDREQ[62],TCC_EA0_RDREQ_32B[62],TCC_EA0_RDREQ_LEVEL[62],TCC_EA0_ATOMIC_LEVEL[63],TCC_EA0_RDREQ[63],TCC_EA0_RDREQ_32B[63],TCC_EA0_RDREQ_LEVEL[63],TCC_EA0_ATOMIC_LEVEL[64],TCC_EA0_RDREQ[64],TCC_EA0_RDREQ_32B[64],TCC_EA0_RDREQ_LEVEL[64],TCC_EA0_ATOMIC_LEVEL[65],TCC_EA0_RDREQ[65],TCC_EA0_RDREQ_32B[65],TCC_EA0_RDREQ_LEVEL[65],TCC_EA0_ATOMIC_LEVEL[66],TCC_EA0_RDREQ[66],TCC_EA0_RDREQ_32B[66],TCC_EA0_RDREQ_LEVEL[66],TCC_EA0_ATOMIC_LEVEL[67],TCC_EA0_RDREQ[67],TCC_EA0_RDREQ_32B[67],TCC_EA0_RDREQ_LEVEL[67],TCC_EA0_ATOMIC_LEVEL[68],TCC_EA0_RDREQ[68],TCC_EA0_RDREQ_32B[68],TCC_EA0_RDREQ_LEVEL[68],TCC_EA0_ATOMIC_LEVEL[69],TCC_EA0_RDREQ[69],TCC_EA0_RDREQ_32B[69],TCC_EA0_RDREQ_LEVEL[69],TCC_EA0_ATOMIC_LEVEL[70],TCC_EA0_RDREQ[70],TCC_EA0_RDREQ_32B[70],TCC_EA0_RDREQ_LEVEL[70],TCC_EA0_ATOMIC_LEVEL[71],TCC_EA0_RDREQ[71],TCC_EA0_RDREQ_32B[71],TCC_EA0_RDREQ_LEVEL[71],TCC_EA0_ATOMIC_LEVEL[72],TCC_EA0_RDREQ[72],TCC_EA0_RDREQ_32B[72],TCC_EA0_RDREQ_LEVEL[72],TCC_EA0_ATOMIC_LEVEL[73],TCC_EA0_RDREQ[73],TCC_EA0_RDREQ_32B[73],TCC_EA0_RDREQ_LEVEL[73],TCC_EA0_ATOMIC_LEVEL[74],TCC_EA0_RDREQ[74],TCC_EA0_RDREQ_32B[74],TCC_EA0_RDREQ_LEVEL[74],TCC_EA0_ATOMIC_LEVEL[75],TCC_EA0_RDREQ[75],TCC_EA0_RDREQ_32B[75],TCC_EA0_RDREQ_LEVEL[75],TCC_EA0_ATOMIC_LEVEL[76],TCC_EA0_RDREQ[76],TCC_EA0_RDREQ_32B[76],TCC_EA0_RDREQ_LEVEL[76],TCC_EA0_ATOMIC_LEVEL[77],TCC_EA0_RDREQ[77],TCC_EA0_RDREQ_32B[77],TCC_EA0_RDREQ_LEVEL[77],TCC_EA0_ATOMIC_LEVEL[78],TCC_EA0_RDREQ[78],TCC_EA0_RDREQ_32B[78],TCC_EA0_RDREQ_LEVEL[78],TCC_EA0_ATOMIC_LEVEL[79],TCC_EA0_RDREQ[79],TCC_EA0_RDREQ_32B[79],TCC_EA0_RDREQ_LEVEL[79],TCC_EA0_ATOMIC_LEVEL[80],TCC_EA0_RDREQ[80],TCC_EA0_RDREQ_32B[80],TCC_EA0_RDREQ_LEVEL[80],TCC_EA0_ATOMIC_LEVEL[81],TCC_EA0_RDREQ[81],TCC_EA0_RDREQ_32B[81],TCC_EA0_RDREQ_LEVEL[81],TCC_EA0_ATOMIC_LEVEL[82],TCC_EA0_RDREQ[82],TCC_EA0_RDREQ_32B[82],TCC_EA0_RDREQ_LEVEL[82],TCC_EA0_ATOMIC_LEVEL[83],TCC_EA0_RDREQ[83],TCC_EA0_RDREQ_32B[83],TCC_EA0_RDREQ_LEVEL[83],TCC_EA0_ATOMIC_LEVEL[84],TCC_EA0_RDREQ[84],TCC_EA0_RDREQ_32B[84],TCC_EA0_RDREQ_LEVEL[84],TCC_EA0_ATOMIC_LEVEL[85],TCC_EA0_RDREQ[85],TCC_EA0_RDREQ_32B[85],TCC_EA0_RDREQ_LEVEL[85],TCC_EA0_ATOMIC_LEVEL[86],TCC_EA0_RDREQ[86],TCC_EA0_RDREQ_32B[86],TCC_EA0_RDREQ_LEVEL[86],TCC_EA0_ATOMIC_LEVEL[87],TCC_EA0_RDREQ[87],TCC_EA0_RDREQ_32B[87],TCC_EA0_RDREQ_LEVEL[87],TCC_EA0_ATOMIC_LEVEL[88],TCC_EA0_RDREQ[88],TCC_EA0_RDREQ_32B[88],TCC_EA0_RDREQ_LEVEL[88],TCC_EA0_ATOMIC_LEVEL[89],TCC_EA0_RDREQ[89],TCC_EA0_RDREQ_32B[89],TCC_EA0_RDREQ_LEVEL[89],TCC_EA0_ATOMIC_LEVEL[90],TCC_EA0_RDREQ[90],TCC_EA0_RDREQ_32B[90],TCC_EA0_RDREQ_LEVEL[90],TCC_EA0_ATOMIC_LEVEL[91],TCC_EA0_RDREQ[91],TCC_EA0_RDREQ_32B[91],TCC_EA0_RDREQ_LEVEL[91],TCC_EA0_ATOMIC_LEVEL[92],TCC_EA0_RDREQ[92],TCC_EA0_RDREQ_32B[92],TCC_EA0_RDREQ_LEVEL[92],TCC_EA0_ATOMIC_LEVEL[93],TCC_EA0_RDREQ[93],TCC_EA0_RDREQ_32B[93],TCC_EA0_RDREQ_LEVEL[93],TCC_EA0_ATOMIC_LEVEL[94],TCC_EA0_RDREQ[94],TCC_EA0_RDREQ_32B[94],TCC_EA0_RDREQ_LEVEL[94],TCC_EA0_ATOMIC_LEVEL[95],TCC_EA0_RDREQ[95],TCC_EA0_RDREQ_32B[95],TCC_EA0_RDREQ_LEVEL[95],Wave_Size_16,Correlation_ID_16,SQ_INSTS_VMEM,SQ_INSTS_SALU,SQ_INSTS_VSKIPPED,SQ_INSTS,SQ_INSTS_VALU,SQ_INSTS_VALU_ADD_F16,SQ_INSTS_VALU_MUL_F16,SQ_INSTS_VALU_FMA_F16,GRBM_SPI_BUSY,SPI_CSN_NUM_THREADGROUPS,SPI_CSN_WAVE,CPC_CPC_TCIU_BUSY,CPC_CPC_TCIU_IDLE,CPF_CPF_TCIU_BUSY,CPF_CPF_TCIU_STALL,TA_BUFFER_READ_WAVEFRONTS_sum,TA_BUFFER_WRITE_WAVEFRONTS_sum,TCC_CC_REQ_sum,TCC_NC_REQ_sum,TCC_RW_REQ_sum,TCC_UC_REQ_sum,TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum,TCP_READ_TAGCONFLICT_STALL_CYCLES_sum,TCP_TA_TCP_STATE_READ_sum,TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum,TD_LOAD_WAVEFRONT_sum,TD_SPI_STALL_sum,Wave_Size_17,Correlation_ID_17,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_BUSY_CU_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_INSTS_VALU_CVT,SQ_INSTS_VMEM_WR,SQ_INSTS_VMEM_RD,GRBM_COUNT,GRBM_GUI_ACTIVE,SPI_CSN_WINDOW_VALID,SPI_CSN_BUSY,CPC_CPC_STAT_BUSY,CPC_CPC_STAT_IDLE,CPF_CPF_STAT_BUSY,CPF_CPF_STAT_STALL,TA_BUFFER_WAVEFRONTS_sum,TA_TA_BUSY_sum,TCC_BUSY_sum,TCC_CYCLE_sum,TCC_PROBE_ALL_sum,TCC_PROBE_sum,TCP_GATE_EN1_sum,TCP_GATE_EN2_sum,TCP_TCR_TCP_STALL_CYCLES_sum,TCP_TD_TCP_STALL_CYCLES_sum,TD_TC_STALL_sum,TD_TD_BUSY_sum,Start_Timestamp,End_Timestamp
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diff --git a/tests/workloads/dispatch_0/MI300A_A1/sysinfo.csv b/tests/workloads/dispatch_0/MI300A_A1/sysinfo.csv
new file mode 100644
index 0000000000..9bc5f9c787
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300A_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+dispatch_0,./tests/vcopy -n 1048576 -b 256 -i 3,SQ|LDS|SQC|TA|TD|TCP|TCC|SPI|CPC|CPF,Wed 29 May 2024 01:36:42 PM  (CDT),2,sh5-1w300-rg3-3,AMD Instinct MI300A Accelerator,"American Megatrends International, LLC.RMO1002DS",Ubuntu 22.04.2 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,131174852,,6.1.2-110,N/A,SPX,NPS1,MI300A_A1,gfx942,32,24576,228,4,24,64,1024,32,2100,1300,2100,1300,96,32,120,4,5324.8,6
diff --git a/tests/workloads/dispatch_0/MI300A_A1/timestamps.csv b/tests/workloads/dispatch_0/MI300A_A1/timestamps.csv
new file mode 100644
index 0000000000..d4d289ebb5
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300A_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,11995,1,146671,146671,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73680535129761,73680535137372,0
+2,11995,1,146671,146671,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73680535160527,73680535166937,0
+3,11995,1,146671,146671,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73680535185885,73680535192375,0
diff --git a/tests/workloads/dispatch_0/MI300X_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/dispatch_0/MI300X_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..d19ef0138b
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300X_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,60633,1,965001,965001,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716272603605252,716272603621412,0,444006.0,444006.0,16384.0,65536.0,41450.0,3312160.0
+1,60633,1,965001,965001,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716272603642810,716272603656490,0,353019.0,353019.0,16384.0,65536.0,12985.0,1048580.0
+2,60633,1,965001,965001,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716272603677009,716272603691169,0,369082.0,369082.0,16384.0,65536.0,12997.0,1048580.0
diff --git a/tests/workloads/dispatch_0/MI300X_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/dispatch_0/MI300X_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..ab5118cb52
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300X_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,60633,1,965013,965013,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716272603605252,716272603621412,0,0.0,0.0,0.0
+1,60633,1,965013,965013,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716272603642810,716272603656490,0,0.0,0.0,0.0
+2,60633,1,965013,965013,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716272603677009,716272603691169,0,0.0,0.0,0.0
diff --git a/tests/workloads/dispatch_0/MI300X_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/dispatch_0/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..86d9d70060
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,965025,965025,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716272603605252,716272603621412,0,65536.0,4261790.0,340921184.0
+1,60633,1,965025,965025,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716272603642810,716272603656490,0,65536.0,3891402.0,311272176.0
+2,60633,1,965025,965025,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716272603677009,716272603691169,0,65536.0,3843844.0,307502000.0
diff --git a/tests/workloads/dispatch_0/MI300X_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/dispatch_0/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..3ae56954e9
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,965037,965037,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716272603605252,716272603621412,0,32768.0,495237.0,39618736.0
+1,60633,1,965037,965037,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716272603642810,716272603656490,0,32768.0,350935.0,28065080.0
+2,60633,1,965037,965037,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716272603677009,716272603691169,0,32768.0,373947.0,29913184.0
diff --git a/tests/workloads/dispatch_0/MI300X_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/dispatch_0/MI300X_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..1dee97d489
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300X_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,60633,1,965049,965049,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716272603605252,716272603621412,0,496419.0,496419.0,296323.0,1985676.0,16384.0,38863092.0,610251.0,0.0,155796620.0
+1,60633,1,965049,965049,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716272603642810,716272603656490,0,455818.0,455818.0,270374.0,1823272.0,16384.0,33346747.0,525782.0,0.0,133745984.0
+2,60633,1,965049,965049,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716272603677009,716272603691169,0,522827.0,522827.0,270535.0,2091308.0,16384.0,31719531.0,513671.0,0.0,127230640.0
diff --git a/tests/workloads/dispatch_0/MI300X_A1/log.txt b/tests/workloads/dispatch_0/MI300X_A1/log.txt
new file mode 100644
index 0000000000..958075eb3d
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300X_A1/log.txt
@@ -0,0 +1,226 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/dispatch_0/MI300X_A1
+Target: MI300X_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: ['0']
+Hardware Blocks: All
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH_LEVEL
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_CVT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_WR
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_RD
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F16
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_16
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_HITS
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_13.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[3]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[3]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[3]
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_14.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[1]
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_15.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[1]
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_16.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[1]
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_17.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[1]
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F32
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_INST_ANY
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_SCA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_MISC
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_FLAT
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_THREAD_CYCLES_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ADDR_CONFLICT
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ITEMS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_MEM_VIOLATIONS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ATOMIC_RETURN
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_BF16
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F64
+
+[profiling] Current input file: tests/workloads/dispatch_0/MI300X_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/dispatch_0/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/dispatch_0/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..ad08a34f3f
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/dispatch_0/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..1ea4fc1fd5
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/dispatch_0/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..9c8a738a40
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/dispatch_0/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..aacd4c0da0
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/dispatch_0/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..f2c3fa3aeb
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_0.txt b/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..20c76d6407
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD GRBM_COUNT GRBM_GUI_ACTIVE TCP_GATE_EN1_sum TCP_GATE_EN2_sum TCP_TD_TCP_STALL_CYCLES_sum TCP_TCR_TCP_STALL_CYCLES_sum TA_TA_BUSY_sum TA_BUFFER_WAVEFRONTS_sum TD_TD_BUSY_sum TD_TC_STALL_sum SPI_CSN_WINDOW_VALID SPI_CSN_BUSY CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE CPF_CPF_STAT_BUSY CPF_CPF_STAT_STALL TCC_CYCLE_sum TCC_BUSY_sum TCC_PROBE_sum TCC_PROBE_ALL_sum
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_1.txt b/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..4d29cb9b97
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 GRBM_SPI_BUSY TCP_READ_TAGCONFLICT_STALL_CYCLES_sum TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum TCP_TA_TCP_STATE_READ_sum TA_BUFFER_READ_WAVEFRONTS_sum TA_BUFFER_WRITE_WAVEFRONTS_sum TD_SPI_STALL_sum TD_LOAD_WAVEFRONT_sum SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE CPC_CPC_TCIU_BUSY CPC_CPC_TCIU_IDLE CPF_CPF_TCIU_BUSY CPF_CPF_TCIU_STALL TCC_NC_REQ_sum TCC_UC_REQ_sum TCC_CC_REQ_sum TCC_RW_REQ_sum
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_10.txt b/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..f68d64bfab
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_11.txt b/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..ee2d69e297
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_12.txt b/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..b898ee9c60
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_13.txt b/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_13.txt
new file mode 100644
index 0000000000..1fa61a5c40
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_13.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_ATOMIC[0] TCC_BUBBLE[0] TCC_CYCLE[0] TCC_EA0_ATOMIC[0] TCC_ATOMIC[1] TCC_BUBBLE[1] TCC_CYCLE[1] TCC_EA0_ATOMIC[1] TCC_ATOMIC[2] TCC_BUBBLE[2] TCC_CYCLE[2] TCC_EA0_ATOMIC[2] TCC_ATOMIC[3] TCC_BUBBLE[3] TCC_CYCLE[3] TCC_EA0_ATOMIC[3] TCC_ATOMIC[4] TCC_BUBBLE[4] TCC_CYCLE[4] TCC_EA0_ATOMIC[4] TCC_ATOMIC[5] TCC_BUBBLE[5] TCC_CYCLE[5] TCC_EA0_ATOMIC[5] TCC_ATOMIC[6] TCC_BUBBLE[6] TCC_CYCLE[6] TCC_EA0_ATOMIC[6] TCC_ATOMIC[7] TCC_BUBBLE[7] TCC_CYCLE[7] TCC_EA0_ATOMIC[7] TCC_ATOMIC[8] TCC_BUBBLE[8] TCC_CYCLE[8] TCC_EA0_ATOMIC[8] TCC_ATOMIC[9] TCC_BUBBLE[9] TCC_CYCLE[9] TCC_EA0_ATOMIC[9] TCC_ATOMIC[10] TCC_BUBBLE[10] TCC_CYCLE[10] TCC_EA0_ATOMIC[10] TCC_ATOMIC[11] TCC_BUBBLE[11] TCC_CYCLE[11] TCC_EA0_ATOMIC[11] TCC_ATOMIC[12] TCC_BUBBLE[12] TCC_CYCLE[12] TCC_EA0_ATOMIC[12] TCC_ATOMIC[13] TCC_BUBBLE[13] TCC_CYCLE[13] TCC_EA0_ATOMIC[13] TCC_ATOMIC[14] TCC_BUBBLE[14] TCC_CYCLE[14] TCC_EA0_ATOMIC[14] TCC_ATOMIC[15] TCC_BUBBLE[15] TCC_CYCLE[15] TCC_EA0_ATOMIC[15]
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_14.txt b/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_14.txt
new file mode 100644
index 0000000000..08d59e8856
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_14.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_ATOMIC_LEVEL[0] TCC_EA0_RDREQ[0] TCC_EA0_RDREQ_32B[0] TCC_EA0_RDREQ_LEVEL[0] TCC_EA0_ATOMIC_LEVEL[1] TCC_EA0_RDREQ[1] TCC_EA0_RDREQ_32B[1] TCC_EA0_RDREQ_LEVEL[1] TCC_EA0_ATOMIC_LEVEL[2] TCC_EA0_RDREQ[2] TCC_EA0_RDREQ_32B[2] TCC_EA0_RDREQ_LEVEL[2] TCC_EA0_ATOMIC_LEVEL[3] TCC_EA0_RDREQ[3] TCC_EA0_RDREQ_32B[3] TCC_EA0_RDREQ_LEVEL[3] TCC_EA0_ATOMIC_LEVEL[4] TCC_EA0_RDREQ[4] TCC_EA0_RDREQ_32B[4] TCC_EA0_RDREQ_LEVEL[4] TCC_EA0_ATOMIC_LEVEL[5] TCC_EA0_RDREQ[5] TCC_EA0_RDREQ_32B[5] TCC_EA0_RDREQ_LEVEL[5] TCC_EA0_ATOMIC_LEVEL[6] TCC_EA0_RDREQ[6] TCC_EA0_RDREQ_32B[6] TCC_EA0_RDREQ_LEVEL[6] TCC_EA0_ATOMIC_LEVEL[7] TCC_EA0_RDREQ[7] TCC_EA0_RDREQ_32B[7] TCC_EA0_RDREQ_LEVEL[7] TCC_EA0_ATOMIC_LEVEL[8] TCC_EA0_RDREQ[8] TCC_EA0_RDREQ_32B[8] TCC_EA0_RDREQ_LEVEL[8] TCC_EA0_ATOMIC_LEVEL[9] TCC_EA0_RDREQ[9] TCC_EA0_RDREQ_32B[9] TCC_EA0_RDREQ_LEVEL[9] TCC_EA0_ATOMIC_LEVEL[10] TCC_EA0_RDREQ[10] TCC_EA0_RDREQ_32B[10] TCC_EA0_RDREQ_LEVEL[10] TCC_EA0_ATOMIC_LEVEL[11] TCC_EA0_RDREQ[11] TCC_EA0_RDREQ_32B[11] TCC_EA0_RDREQ_LEVEL[11] TCC_EA0_ATOMIC_LEVEL[12] TCC_EA0_RDREQ[12] TCC_EA0_RDREQ_32B[12] TCC_EA0_RDREQ_LEVEL[12] TCC_EA0_ATOMIC_LEVEL[13] TCC_EA0_RDREQ[13] TCC_EA0_RDREQ_32B[13] TCC_EA0_RDREQ_LEVEL[13] TCC_EA0_ATOMIC_LEVEL[14] TCC_EA0_RDREQ[14] TCC_EA0_RDREQ_32B[14] TCC_EA0_RDREQ_LEVEL[14] TCC_EA0_ATOMIC_LEVEL[15] TCC_EA0_RDREQ[15] TCC_EA0_RDREQ_32B[15] TCC_EA0_RDREQ_LEVEL[15]
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_15.txt b/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_15.txt
new file mode 100644
index 0000000000..74f25a6d60
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_15.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_WRREQ[0] TCC_EA0_WRREQ_64B[0] TCC_EA0_WRREQ_LEVEL[0] TCC_HIT[0] TCC_EA0_WRREQ[1] TCC_EA0_WRREQ_64B[1] TCC_EA0_WRREQ_LEVEL[1] TCC_HIT[1] TCC_EA0_WRREQ[2] TCC_EA0_WRREQ_64B[2] TCC_EA0_WRREQ_LEVEL[2] TCC_HIT[2] TCC_EA0_WRREQ[3] TCC_EA0_WRREQ_64B[3] TCC_EA0_WRREQ_LEVEL[3] TCC_HIT[3] TCC_EA0_WRREQ[4] TCC_EA0_WRREQ_64B[4] TCC_EA0_WRREQ_LEVEL[4] TCC_HIT[4] TCC_EA0_WRREQ[5] TCC_EA0_WRREQ_64B[5] TCC_EA0_WRREQ_LEVEL[5] TCC_HIT[5] TCC_EA0_WRREQ[6] TCC_EA0_WRREQ_64B[6] TCC_EA0_WRREQ_LEVEL[6] TCC_HIT[6] TCC_EA0_WRREQ[7] TCC_EA0_WRREQ_64B[7] TCC_EA0_WRREQ_LEVEL[7] TCC_HIT[7] TCC_EA0_WRREQ[8] TCC_EA0_WRREQ_64B[8] TCC_EA0_WRREQ_LEVEL[8] TCC_HIT[8] TCC_EA0_WRREQ[9] TCC_EA0_WRREQ_64B[9] TCC_EA0_WRREQ_LEVEL[9] TCC_HIT[9] TCC_EA0_WRREQ[10] TCC_EA0_WRREQ_64B[10] TCC_EA0_WRREQ_LEVEL[10] TCC_HIT[10] TCC_EA0_WRREQ[11] TCC_EA0_WRREQ_64B[11] TCC_EA0_WRREQ_LEVEL[11] TCC_HIT[11] TCC_EA0_WRREQ[12] TCC_EA0_WRREQ_64B[12] TCC_EA0_WRREQ_LEVEL[12] TCC_HIT[12] TCC_EA0_WRREQ[13] TCC_EA0_WRREQ_64B[13] TCC_EA0_WRREQ_LEVEL[13] TCC_HIT[13] TCC_EA0_WRREQ[14] TCC_EA0_WRREQ_64B[14] TCC_EA0_WRREQ_LEVEL[14] TCC_HIT[14] TCC_EA0_WRREQ[15] TCC_EA0_WRREQ_64B[15] TCC_EA0_WRREQ_LEVEL[15] TCC_HIT[15]
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_16.txt b/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_16.txt
new file mode 100644
index 0000000000..c7a1da4893
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_16.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_MISS[0] TCC_READ[0] TCC_REQ[0] TCC_RW_REQ[0] TCC_MISS[1] TCC_READ[1] TCC_REQ[1] TCC_RW_REQ[1] TCC_MISS[2] TCC_READ[2] TCC_REQ[2] TCC_RW_REQ[2] TCC_MISS[3] TCC_READ[3] TCC_REQ[3] TCC_RW_REQ[3] TCC_MISS[4] TCC_READ[4] TCC_REQ[4] TCC_RW_REQ[4] TCC_MISS[5] TCC_READ[5] TCC_REQ[5] TCC_RW_REQ[5] TCC_MISS[6] TCC_READ[6] TCC_REQ[6] TCC_RW_REQ[6] TCC_MISS[7] TCC_READ[7] TCC_REQ[7] TCC_RW_REQ[7] TCC_MISS[8] TCC_READ[8] TCC_REQ[8] TCC_RW_REQ[8] TCC_MISS[9] TCC_READ[9] TCC_REQ[9] TCC_RW_REQ[9] TCC_MISS[10] TCC_READ[10] TCC_REQ[10] TCC_RW_REQ[10] TCC_MISS[11] TCC_READ[11] TCC_REQ[11] TCC_RW_REQ[11] TCC_MISS[12] TCC_READ[12] TCC_REQ[12] TCC_RW_REQ[12] TCC_MISS[13] TCC_READ[13] TCC_REQ[13] TCC_RW_REQ[13] TCC_MISS[14] TCC_READ[14] TCC_REQ[14] TCC_RW_REQ[14] TCC_MISS[15] TCC_READ[15] TCC_REQ[15] TCC_RW_REQ[15]
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_17.txt b/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_17.txt
new file mode 100644
index 0000000000..ca9271fb33
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_17.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_TAG_STALL[0] TCC_TOO_MANY_EA_WRREQS_STALL[0] TCC_WRITE[0] TCC_TAG_STALL[1] TCC_TOO_MANY_EA_WRREQS_STALL[1] TCC_WRITE[1] TCC_TAG_STALL[2] TCC_TOO_MANY_EA_WRREQS_STALL[2] TCC_WRITE[2] TCC_TAG_STALL[3] TCC_TOO_MANY_EA_WRREQS_STALL[3] TCC_WRITE[3] TCC_TAG_STALL[4] TCC_TOO_MANY_EA_WRREQS_STALL[4] TCC_WRITE[4] TCC_TAG_STALL[5] TCC_TOO_MANY_EA_WRREQS_STALL[5] TCC_WRITE[5] TCC_TAG_STALL[6] TCC_TOO_MANY_EA_WRREQS_STALL[6] TCC_WRITE[6] TCC_TAG_STALL[7] TCC_TOO_MANY_EA_WRREQS_STALL[7] TCC_WRITE[7] TCC_TAG_STALL[8] TCC_TOO_MANY_EA_WRREQS_STALL[8] TCC_WRITE[8] TCC_TAG_STALL[9] TCC_TOO_MANY_EA_WRREQS_STALL[9] TCC_WRITE[9] TCC_TAG_STALL[10] TCC_TOO_MANY_EA_WRREQS_STALL[10] TCC_WRITE[10] TCC_TAG_STALL[11] TCC_TOO_MANY_EA_WRREQS_STALL[11] TCC_WRITE[11] TCC_TAG_STALL[12] TCC_TOO_MANY_EA_WRREQS_STALL[12] TCC_WRITE[12] TCC_TAG_STALL[13] TCC_TOO_MANY_EA_WRREQS_STALL[13] TCC_WRITE[13] TCC_TAG_STALL[14] TCC_TOO_MANY_EA_WRREQS_STALL[14] TCC_WRITE[14] TCC_TAG_STALL[15] TCC_TOO_MANY_EA_WRREQS_STALL[15] TCC_WRITE[15]
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_2.txt b/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..9f057aa6eb
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 TCP_VOLATILE_sum TCP_TOTAL_ACCESSES_sum TCP_TOTAL_READ_sum TCP_TOTAL_WRITE_sum TA_BUFFER_ATOMIC_WAVEFRONTS_sum TA_BUFFER_TOTAL_CYCLES_sum TD_ATOMIC_WAVEFRONT_sum TD_STORE_WAVEFRONT_sum SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION CPF_CPF_STAT_IDLE CPF_CPF_TCIU_IDLE TCC_REQ_sum TCC_STREAMING_REQ_sum TCC_HIT_sum TCC_MISS_sum
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_3.txt b/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..903f7eaccd
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS TCP_TOTAL_ATOMIC_WITH_RET_sum TCP_TOTAL_ATOMIC_WITHOUT_RET_sum TCP_TOTAL_WRITEBACK_INVALIDATES_sum TCP_TOTAL_CACHE_ACCESSES_sum TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES_sum TD_COALESCABLE_WAVEFRONT_sum SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE CPF_CMP_UTCL1_STALL_ON_TRANSLATION TCC_READ_sum TCC_WRITE_sum TCC_ATOMIC_sum TCC_WRITEBACK_sum
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_4.txt b/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..483e53ba2d
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAIT_ANY SQ_WAIT_INST_ANY SQ_ACTIVE_INST_ANY SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU TCP_UTCL1_TRANSLATION_MISS_sum TCP_UTCL1_TRANSLATION_HIT_sum TCP_UTCL1_PERMISSION_MISS_sum TCP_UTCL1_REQUEST_sum TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_TOTAL_WAVEFRONTS_sum SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE TCC_EA0_WRREQ_sum TCC_EA0_WRREQ_64B_sum TCC_EA0_WR_UNCACHED_32B_sum TCC_EA0_WRREQ_DRAM_sum
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_5.txt b/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..2e81396290
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_SCA SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU TCP_TCC_READ_REQ_sum TCP_TCC_WRITE_REQ_sum TCP_TCC_ATOMIC_WITH_RET_REQ_sum TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN CPC_ME1_DC0_SPI_BUSY TCC_EA0_RDREQ_sum TCC_EA0_RDREQ_32B_sum TCC_BUBBLE_sum TCC_EA0_RD_UNCACHED_32B_sum
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_6.txt b/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..c8b8ad7f76
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_THREAD_CYCLES_VALU SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 TCP_TCC_NC_READ_REQ_sum TCP_TCC_NC_WRITE_REQ_sum TCP_TCC_NC_ATOMIC_REQ_sum TCP_TCC_UC_READ_REQ_sum TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN TCC_EA0_RDREQ_DRAM_sum TCC_TAG_STALL_sum TCC_NORMAL_WRITEBACK_sum TCC_ALL_TC_OP_WB_WRITEBACK_sum
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_7.txt b/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..34d1290944
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED TCP_TCC_UC_WRITE_REQ_sum TCP_TCC_UC_ATOMIC_REQ_sum TCP_TCC_CC_READ_REQ_sum TCP_TCC_CC_WRITE_REQ_sum TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR TCC_NORMAL_EVICT_sum TCC_ALL_TC_OP_INV_EVICT_sum TCC_TOO_MANY_EA_WRREQS_STALL_sum TCC_EA0_ATOMIC_sum
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_8.txt b/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..dd60bab718
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES TCP_TCC_CC_ATOMIC_REQ_sum TCP_TCC_RW_READ_REQ_sum TCP_TCC_RW_WRITE_REQ_sum TCP_TCC_RW_ATOMIC_REQ_sum SPI_VWC_CSC_WR SPI_RA_BULKY_CU_FULL_CSN TCC_EA0_RDREQ_LEVEL_sum TCC_EA0_WRREQ_LEVEL_sum TCC_EA0_ATOMIC_LEVEL_sum TCC_EA0_WRREQ_STALL_sum
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_9.txt b/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..fe317629ed
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300X_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ TCP_PENDING_STALL_CYCLES_sum
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300X_A1/perfmon/timestamps.txt b/tests/workloads/dispatch_0/MI300X_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..24911467fe
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300X_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range: 0
+kernel:
diff --git a/tests/workloads/dispatch_0/MI300X_A1/pmc_perf.csv b/tests/workloads/dispatch_0/MI300X_A1/pmc_perf.csv
new file mode 100644
index 0000000000..fe9cf5a834
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300X_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_1,Correlation_ID_1,XCC_Index,TCC_ATOMIC[0],TCC_BUBBLE[0],TCC_CYCLE[0],TCC_EA0_ATOMIC[0],TCC_ATOMIC[1],TCC_BUBBLE[1],TCC_CYCLE[1],TCC_EA0_ATOMIC[1],TCC_ATOMIC[2],TCC_BUBBLE[2],TCC_CYCLE[2],TCC_EA0_ATOMIC[2],TCC_ATOMIC[3],TCC_BUBBLE[3],TCC_CYCLE[3],TCC_EA0_ATOMIC[3],TCC_ATOMIC[4],TCC_BUBBLE[4],TCC_CYCLE[4],TCC_EA0_ATOMIC[4],TCC_ATOMIC[5],TCC_BUBBLE[5],TCC_CYCLE[5],TCC_EA0_ATOMIC[5],TCC_ATOMIC[6],TCC_BUBBLE[6],TCC_CYCLE[6],TCC_EA0_ATOMIC[6],TCC_ATOMIC[7],TCC_BUBBLE[7],TCC_CYCLE[7],TCC_EA0_ATOMIC[7],TCC_ATOMIC[8],TCC_BUBBLE[8],TCC_CYCLE[8],TCC_EA0_ATOMIC[8],TCC_ATOMIC[9],TCC_BUBBLE[9],TCC_CYCLE[9],TCC_EA0_ATOMIC[9],TCC_ATOMIC[10],TCC_BUBBLE[10],TCC_CYCLE[10],TCC_EA0_ATOMIC[10],TCC_ATOMIC[11],TCC_BUBBLE[11],TCC_CYCLE[11],TCC_EA0_ATOMIC[11],TCC_ATOMIC[12],TCC_BUBBLE[12],TCC_CYCLE[12],TCC_EA0_ATOMIC[12],TCC_ATOMIC[13],TCC_BUBBLE[13],TCC_CYCLE[13],TCC_EA0_ATOMIC[13],TCC_ATOMIC[14],TCC_BUBBLE[14],TCC_CYCLE[14],TCC_EA0_ATOMIC[14],TCC_ATOMIC[15],TCC_BUBBLE[15],TCC_CYCLE[15],TCC_EA0_ATOMIC[15],TCC_ATOMIC[16],TCC_BUBBLE[16],TCC_CYCLE[16],TCC_EA0_ATOMIC[16],TCC_ATOMIC[17],TCC_BUBBLE[17],TCC_CYCLE[17],TCC_EA0_ATOMIC[17],TCC_ATOMIC[18],TCC_BUBBLE[18],TCC_CYCLE[18],TCC_EA0_ATOMIC[18],TCC_ATOMIC[19],TCC_BUBBLE[19],TCC_CYCLE[19],TCC_EA0_ATOMIC[19],TCC_ATOMIC[20],TCC_BUBBLE[20],TCC_CYCLE[20],TCC_EA0_ATOMIC[20],TCC_ATOMIC[21],TCC_BUBBLE[21],TCC_CYCLE[21],TCC_EA0_ATOMIC[21],TCC_ATOMIC[22],TCC_BUBBLE[22],TCC_CYCLE[22],TCC_EA0_ATOMIC[22],TCC_ATOMIC[23],TCC_BUBBLE[23],TCC_CYCLE[23],TCC_EA0_ATOMIC[23],TCC_ATOMIC[24],TCC_BUBBLE[24],TCC_CYCLE[24],TCC_EA0_ATOMIC[24],TCC_ATOMIC[25],TCC_BUBBLE[25],TCC_CYCLE[25],TCC_EA0_ATOMIC[25],TCC_ATOMIC[26],TCC_BUBBLE[26],TCC_CYCLE[26],TCC_EA0_ATOMIC[26],TCC_ATOMIC[27],TCC_BUBBLE[27],TCC_CYCLE[27],TCC_EA0_ATOMIC[27],TCC_ATOMIC[28],TCC_BUBBLE[28],TCC_CYCLE[28],TCC_EA0_ATOMIC[28],TCC_ATOMIC[29],TCC_BUBBLE[29],TCC_CYCLE[29],TCC_EA0_ATOMIC[29],TCC_ATOMIC[30],TCC_BUBBLE[30],TCC_CYCLE[30],TCC_EA0_ATOMIC[30],TCC_ATOMIC[31],TCC_BUBBLE[31],TCC_CYCLE[31],TCC_EA0_ATOMIC[31],TCC_ATOMIC[32],TCC_BUBBLE[32],TCC_CYCLE[32],TCC_EA0_ATOMIC[32],TCC_ATOMIC[33],TCC_BUBBLE[33],TCC_CYCLE[33],TCC_EA0_ATOMIC[33],TCC_ATOMIC[34],TCC_BUBBLE[34],TCC_CYCLE[34],TCC_EA0_ATOMIC[34],TCC_ATOMIC[35],TCC_BUBBLE[35],TCC_CYCLE[35],TCC_EA0_ATOMIC[35],TCC_ATOMIC[36],TCC_BUBBLE[36],TCC_CYCLE[36],TCC_EA0_ATOMIC[36],TCC_ATOMIC[37],TCC_BUBBLE[37],TCC_CYCLE[37],TCC_EA0_ATOMIC[37],TCC_ATOMIC[38],TCC_BUBBLE[38],TCC_CYCLE[38],TCC_EA0_ATOMIC[38],TCC_ATOMIC[39],TCC_BUBBLE[39],TCC_CYCLE[39],TCC_EA0_ATOMIC[39],TCC_ATOMIC[40],TCC_BUBBLE[40],TCC_CYCLE[40],TCC_EA0_ATOMIC[40],TCC_ATOMIC[41],TCC_BUBBLE[41],TCC_CYCLE[41],TCC_EA0_ATOMIC[41],TCC_ATOMIC[42],TCC_BUBBLE[42],TCC_CYCLE[42],TCC_EA0_ATOMIC[42],TCC_ATOMIC[43],TCC_BUBBLE[43],TCC_CYCLE[43],TCC_EA0_ATOMIC[43],TCC_ATOMIC[44],TCC_BUBBLE[44],TCC_CYCLE[44],TCC_EA0_ATOMIC[44],TCC_ATOMIC[45],TCC_BUBBLE[45],TCC_CYCLE[45],TCC_EA0_ATOMIC[45],TCC_ATOMIC[46],TCC_BUBBLE[46],TCC_CYCLE[46],TCC_EA0_ATOMIC[46],TCC_ATOMIC[47],TCC_BUBBLE[47],TCC_CYCLE[47],TCC_EA0_ATOMIC[47],TCC_ATOMIC[48],TCC_BUBBLE[48],TCC_CYCLE[48],TCC_EA0_ATOMIC[48],TCC_ATOMIC[49],TCC_BUBBLE[49],TCC_CYCLE[49],TCC_EA0_ATOMIC[49],TCC_ATOMIC[50],TCC_BUBBLE[50],TCC_CYCLE[50],TCC_EA0_ATOMIC[50],TCC_ATOMIC[51],TCC_BUBBLE[51],TCC_CYCLE[51],TCC_EA0_ATOMIC[51],TCC_ATOMIC[52],TCC_BUBBLE[52],TCC_CYCLE[52],TCC_EA0_ATOMIC[52],TCC_ATOMIC[53],TCC_BUBBLE[53],TCC_CYCLE[53],TCC_EA0_ATOMIC[53],TCC_ATOMIC[54],TCC_BUBBLE[54],TCC_CYCLE[54],TCC_EA0_ATOMIC[54],TCC_ATOMIC[55],TCC_BUBBLE[55],TCC_CYCLE[55],TCC_EA0_ATOMIC[55],TCC_ATOMIC[56],TCC_BUBBLE[56],TCC_CYCLE[56],TCC_EA0_ATOMIC[56],TCC_ATOMIC[57],TCC_BUBBLE[57],TCC_CYCLE[57],TCC_EA0_ATOMIC[57],TCC_ATOMIC[58],TCC_BUBBLE[58],TCC_CYCLE[58],TCC_EA0_ATOMIC[58],TCC_ATOMIC[59],TCC_BUBBLE[59],TCC_CYCLE[59],TCC_EA0_ATOMIC[59],TCC_ATOMIC[60],TCC_BUBBLE[60],TCC_CYCLE[60],TCC_EA0_ATOMIC[60],TCC_ATOMIC[61],TCC_BUBBLE[61],TCC_CYCLE[61],TCC_EA0_ATOMIC[61],TCC_ATOMIC[62],TCC_BUBBLE[62],TCC_CYCLE[62],TCC_EA0_ATOMIC[62],TCC_ATOMIC[63],TCC_BUBBLE[63],TCC_CYCLE[63],TCC_EA0_ATOMIC[63],TCC_ATOMIC[64],TCC_BUBBLE[64],TCC_CYCLE[64],TCC_EA0_ATOMIC[64],TCC_ATOMIC[65],TCC_BUBBLE[65],TCC_CYCLE[65],TCC_EA0_ATOMIC[65],TCC_ATOMIC[66],TCC_BUBBLE[66],TCC_CYCLE[66],TCC_EA0_ATOMIC[66],TCC_ATOMIC[67],TCC_BUBBLE[67],TCC_CYCLE[67],TCC_EA0_ATOMIC[67],TCC_ATOMIC[68],TCC_BUBBLE[68],TCC_CYCLE[68],TCC_EA0_ATOMIC[68],TCC_ATOMIC[69],TCC_BUBBLE[69],TCC_CYCLE[69],TCC_EA0_ATOMIC[69],TCC_ATOMIC[70],TCC_BUBBLE[70],TCC_CYCLE[70],TCC_EA0_ATOMIC[70],TCC_ATOMIC[71],TCC_BUBBLE[71],TCC_CYCLE[71],TCC_EA0_ATOMIC[71],TCC_ATOMIC[72],TCC_BUBBLE[72],TCC_CYCLE[72],TCC_EA0_ATOMIC[72],TCC_ATOMIC[73],TCC_BUBBLE[73],TCC_CYCLE[73],TCC_EA0_ATOMIC[73],TCC_ATOMIC[74],TCC_BUBBLE[74],TCC_CYCLE[74],TCC_EA0_ATOMIC[74],TCC_ATOMIC[75],TCC_BUBBLE[75],TCC_CYCLE[75],TCC_EA0_ATOMIC[75],TCC_ATOMIC[76],TCC_BUBBLE[76],TCC_CYCLE[76],TCC_EA0_ATOMIC[76],TCC_ATOMIC[77],TCC_BUBBLE[77],TCC_CYCLE[77],TCC_EA0_ATOMIC[77],TCC_ATOMIC[78],TCC_BUBBLE[78],TCC_CYCLE[78],TCC_EA0_ATOMIC[78],TCC_ATOMIC[79],TCC_BUBBLE[79],TCC_CYCLE[79],TCC_EA0_ATOMIC[79],TCC_ATOMIC[80],TCC_BUBBLE[80],TCC_CYCLE[80],TCC_EA0_ATOMIC[80],TCC_ATOMIC[81],TCC_BUBBLE[81],TCC_CYCLE[81],TCC_EA0_ATOMIC[81],TCC_ATOMIC[82],TCC_BUBBLE[82],TCC_CYCLE[82],TCC_EA0_ATOMIC[82],TCC_ATOMIC[83],TCC_BUBBLE[83],TCC_CYCLE[83],TCC_EA0_ATOMIC[83],TCC_ATOMIC[84],TCC_BUBBLE[84],TCC_CYCLE[84],TCC_EA0_ATOMIC[84],TCC_ATOMIC[85],TCC_BUBBLE[85],TCC_CYCLE[85],TCC_EA0_ATOMIC[85],TCC_ATOMIC[86],TCC_BUBBLE[86],TCC_CYCLE[86],TCC_EA0_ATOMIC[86],TCC_ATOMIC[87],TCC_BUBBLE[87],TCC_CYCLE[87],TCC_EA0_ATOMIC[87],TCC_ATOMIC[88],TCC_BUBBLE[88],TCC_CYCLE[88],TCC_EA0_ATOMIC[88],TCC_ATOMIC[89],TCC_BUBBLE[89],TCC_CYCLE[89],TCC_EA0_ATOMIC[89],TCC_ATOMIC[90],TCC_BUBBLE[90],TCC_CYCLE[90],TCC_EA0_ATOMIC[90],TCC_ATOMIC[91],TCC_BUBBLE[91],TCC_CYCLE[91],TCC_EA0_ATOMIC[91],TCC_ATOMIC[92],TCC_BUBBLE[92],TCC_CYCLE[92],TCC_EA0_ATOMIC[92],TCC_ATOMIC[93],TCC_BUBBLE[93],TCC_CYCLE[93],TCC_EA0_ATOMIC[93],TCC_ATOMIC[94],TCC_BUBBLE[94],TCC_CYCLE[94],TCC_EA0_ATOMIC[94],TCC_ATOMIC[95],TCC_BUBBLE[95],TCC_CYCLE[95],TCC_EA0_ATOMIC[95],TCC_ATOMIC[96],TCC_BUBBLE[96],TCC_CYCLE[96],TCC_EA0_ATOMIC[96],TCC_ATOMIC[97],TCC_BUBBLE[97],TCC_CYCLE[97],TCC_EA0_ATOMIC[97],TCC_ATOMIC[98],TCC_BUBBLE[98],TCC_CYCLE[98],TCC_EA0_ATOMIC[98],TCC_ATOMIC[99],TCC_BUBBLE[99],TCC_CYCLE[99],TCC_EA0_ATOMIC[99],TCC_ATOMIC[100],TCC_BUBBLE[100],TCC_CYCLE[100],TCC_EA0_ATOMIC[100],TCC_ATOMIC[101],TCC_BUBBLE[101],TCC_CYCLE[101],TCC_EA0_ATOMIC[101],TCC_ATOMIC[102],TCC_BUBBLE[102],TCC_CYCLE[102],TCC_EA0_ATOMIC[102],TCC_ATOMIC[103],TCC_BUBBLE[103],TCC_CYCLE[103],TCC_EA0_ATOMIC[103],TCC_ATOMIC[104],TCC_BUBBLE[104],TCC_CYCLE[104],TCC_EA0_ATOMIC[104],TCC_ATOMIC[105],TCC_BUBBLE[105],TCC_CYCLE[105],TCC_EA0_ATOMIC[105],TCC_ATOMIC[106],TCC_BUBBLE[106],TCC_CYCLE[106],TCC_EA0_ATOMIC[106],TCC_ATOMIC[107],TCC_BUBBLE[107],TCC_CYCLE[107],TCC_EA0_ATOMIC[107],TCC_ATOMIC[108],TCC_BUBBLE[108],TCC_CYCLE[108],TCC_EA0_ATOMIC[108],TCC_ATOMIC[109],TCC_BUBBLE[109],TCC_CYCLE[109],TCC_EA0_ATOMIC[109],TCC_ATOMIC[110],TCC_BUBBLE[110],TCC_CYCLE[110],TCC_EA0_ATOMIC[110],TCC_ATOMIC[111],TCC_BUBBLE[111],TCC_CYCLE[111],TCC_EA0_ATOMIC[111],TCC_ATOMIC[112],TCC_BUBBLE[112],TCC_CYCLE[112],TCC_EA0_ATOMIC[112],TCC_ATOMIC[113],TCC_BUBBLE[113],TCC_CYCLE[113],TCC_EA0_ATOMIC[113],TCC_ATOMIC[114],TCC_BUBBLE[114],TCC_CYCLE[114],TCC_EA0_ATOMIC[114],TCC_ATOMIC[115],TCC_BUBBLE[115],TCC_CYCLE[115],TCC_EA0_ATOMIC[115],TCC_ATOMIC[116],TCC_BUBBLE[116],TCC_CYCLE[116],TCC_EA0_ATOMIC[116],TCC_ATOMIC[117],TCC_BUBBLE[117],TCC_CYCLE[117],TCC_EA0_ATOMIC[117],TCC_ATOMIC[118],TCC_BUBBLE[118],TCC_CYCLE[118],TCC_EA0_ATOMIC[118],TCC_ATOMIC[119],TCC_BUBBLE[119],TCC_CYCLE[119],TCC_EA0_ATOMIC[119],TCC_ATOMIC[120],TCC_BUBBLE[120],TCC_CYCLE[120],TCC_EA0_ATOMIC[120],TCC_ATOMIC[121],TCC_BUBBLE[121],TCC_CYCLE[121],TCC_EA0_ATOMIC[121],TCC_ATOMIC[122],TCC_BUBBLE[122],TCC_CYCLE[122],TCC_EA0_ATOMIC[122],TCC_ATOMIC[123],TCC_BUBBLE[123],TCC_CYCLE[123],TCC_EA0_ATOMIC[123],TCC_ATOMIC[124],TCC_BUBBLE[124],TCC_CYCLE[124],TCC_EA0_ATOMIC[124],TCC_ATOMIC[125],TCC_BUBBLE[125],TCC_CYCLE[125],TCC_EA0_ATOMIC[125],TCC_ATOMIC[126],TCC_BUBBLE[126],TCC_CYCLE[126],TCC_EA0_ATOMIC[126],TCC_ATOMIC[127],TCC_BUBBLE[127],TCC_CYCLE[127],TCC_EA0_ATOMIC[127],Wave_Size_2,Correlation_ID_2,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,TA_FLAT_ATOMIC_WAVEFRONTS_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,TCC_ALL_TC_OP_INV_EVICT_sum,TCC_EA0_ATOMIC_sum,TCC_NORMAL_EVICT_sum,TCC_TOO_MANY_EA_WRREQS_STALL_sum,TCP_TCC_CC_READ_REQ_sum,TCP_TCC_CC_WRITE_REQ_sum,TCP_TCC_UC_ATOMIC_REQ_sum,TCP_TCC_UC_WRITE_REQ_sum,Wave_Size_3,Correlation_ID_3,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,TCC_EA0_ATOMIC_LEVEL_sum,TCC_EA0_RDREQ_LEVEL_sum,TCC_EA0_WRREQ_LEVEL_sum,TCC_EA0_WRREQ_STALL_sum,TCP_TCC_CC_ATOMIC_REQ_sum,TCP_TCC_RW_ATOMIC_REQ_sum,TCP_TCC_RW_READ_REQ_sum,TCP_TCC_RW_WRITE_REQ_sum,Wave_Size_4,Correlation_ID_4,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SPI_RA_REQ_NO_ALLOC,SPI_RA_REQ_NO_ALLOC_CSN,CPC_CPC_STAT_STALL,CPC_UTCL1_STALL_ON_TRANSLATION,CPF_CPF_STAT_IDLE,CPF_CPF_TCIU_IDLE,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,TA_BUFFER_TOTAL_CYCLES_sum,TCC_HIT_sum,TCC_MISS_sum,TCC_REQ_sum,TCC_STREAMING_REQ_sum,TCP_TOTAL_ACCESSES_sum,TCP_TOTAL_READ_sum,TCP_TOTAL_WRITE_sum,TCP_VOLATILE_sum,TD_ATOMIC_WAVEFRONT_sum,TD_STORE_WAVEFRONT_sum,Wave_Size_5,Correlation_ID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SQ_INST_CYCLES_SALU,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,CPC_ME1_DC0_SPI_BUSY,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,TCC_BUBBLE_sum,TCC_EA0_RDREQ_32B_sum,TCC_EA0_RDREQ_sum,TCC_EA0_RD_UNCACHED_32B_sum,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,TCP_TCC_READ_REQ_sum,TCP_TCC_WRITE_REQ_sum,Start_Timestamp,End_Timestamp
+0,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) 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diff --git a/tests/workloads/dispatch_0/MI300X_A1/sysinfo.csv b/tests/workloads/dispatch_0/MI300X_A1/sysinfo.csv
new file mode 100644
index 0000000000..5721c48f38
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300X_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+dispatch_0,./tests/vcopy -n 1048576 -b 256 -i 3,SQ|LDS|SQC|TA|TD|TCP|TCC|SPI|CPC|CPF,Wed 29 May 2024 12:01:22 PM  (CDT),2,splinter-126-wr-c6,AMD Ryzen 9 7950X 16-Core Processor,"American Megatrends International, LLC.VS2683299N.FD",Ubuntu 22.04.4 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,114656528,,6.2.0-13611,113-MI3SRIOV-001,SPX,NPS1,MI300X_A1,gfx942,32,4096,304,4,32,64,1024,32,2100,1300,2100,1300,128,32,160,4,5324.8,8
diff --git a/tests/workloads/dispatch_0/MI300X_A1/timestamps.csv b/tests/workloads/dispatch_0/MI300X_A1/timestamps.csv
new file mode 100644
index 0000000000..a06bdc4390
--- /dev/null
+++ b/tests/workloads/dispatch_0/MI300X_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,60633,1,965292,965292,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716272603605252,716272603621412,0
+2,60633,1,965292,965292,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716272603642810,716272603656490,0
+3,60633,1,965292,965292,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716272603677009,716272603691169,0
diff --git a/tests/workloads/dispatch_0_1/MI300A_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/dispatch_0_1/MI300A_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..788030f168
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300A_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,11995,1,146834,146834,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73715526473477,73715526483212,0,204394.0,204394.0,16384.0,65536.0,29028.0,2316044.0
+1,11995,1,146834,146834,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73715526500157,73715526506607,0,192709.0,192709.0,16384.0,65536.0,13069.0,1048744.0
+2,11995,1,146834,146834,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73715526521910,73715526528079,0,170064.0,170064.0,16384.0,65536.0,13171.0,1048880.0
diff --git a/tests/workloads/dispatch_0_1/MI300A_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/dispatch_0_1/MI300A_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..e4185296bf
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300A_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,11995,1,146846,146846,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73715526473477,73715526483212,0,0.0,0.0,0.0
+1,11995,1,146846,146846,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73715526500157,73715526506607,0,0.0,0.0,0.0
+2,11995,1,146846,146846,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73715526521910,73715526528079,0,0.0,0.0,0.0
diff --git a/tests/workloads/dispatch_0_1/MI300A_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/dispatch_0_1/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..6590dbf97c
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,146858,146858,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73715526473477,73715526483212,0,65536.0,284296.0,22673152.0
+1,11995,1,146858,146858,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73715526500157,73715526506607,0,65536.0,281580.0,22523904.0
+2,11995,1,146858,146858,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73715526521910,73715526528079,0,65536.0,198524.0,15893256.0
diff --git a/tests/workloads/dispatch_0_1/MI300A_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/dispatch_0_1/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..960bcb84b4
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,146870,146870,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73715526473477,73715526483212,0,32768.0,523094.0,41848468.0
+1,11995,1,146870,146870,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73715526500157,73715526506607,0,32768.0,422347.0,33780352.0
+2,11995,1,146870,146870,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73715526521910,73715526528079,0,32768.0,422139.0,33765308.0
diff --git a/tests/workloads/dispatch_0_1/MI300A_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/dispatch_0_1/MI300A_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..065ec06af2
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300A_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,11995,1,146882,146882,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73715526473477,73715526483212,0,216786.0,216786.0,124408.0,867144.0,16384.0,13416586.0,250427.0,0.0,54065188.0
+1,11995,1,146882,146882,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73715526500157,73715526506607,0,201274.0,201274.0,116536.0,805096.0,16384.0,11693138.0,211499.0,0.0,47166212.0
+2,11995,1,146882,146882,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73715526521910,73715526528079,0,172396.0,172396.0,92890.0,689584.0,16384.0,9991290.0,189615.0,0.0,40371828.0
diff --git a/tests/workloads/dispatch_0_1/MI300A_A1/log.txt b/tests/workloads/dispatch_0_1/MI300A_A1/log.txt
new file mode 100644
index 0000000000..8059355a6e
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300A_A1/log.txt
@@ -0,0 +1,223 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/dispatch_0_1/MI300A_A1
+Target: MI300A_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: ['0:2']
+Hardware Blocks: All
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_CVT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_WR
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_RD
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F16
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_HITS
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES_DUPLICATE
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_1
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_13.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[1]
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_14.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[1]
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_15.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[1]
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_16.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[0]
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_17.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[2]
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F64
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_EXP_GDS
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_SCA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_MISC
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_THREAD_CYCLES_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ITEMS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_MEM_VIOLATIONS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ATOMIC_RETURN
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_IDX_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_RESTORED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_SAVED
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_BF16
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300A_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..ad1506b7f9
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..af443a5fdf
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..8e42534e97
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..786628208e
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..c9c2bb4619
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_0.txt b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..8653371a81
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD GRBM_COUNT GRBM_GUI_ACTIVE TCP_GATE_EN1_sum TCP_GATE_EN2_sum TCP_TD_TCP_STALL_CYCLES_sum TCP_TCR_TCP_STALL_CYCLES_sum TA_TA_BUSY_sum TA_BUFFER_WAVEFRONTS_sum TD_TD_BUSY_sum TD_TC_STALL_sum SPI_CSN_WINDOW_VALID SPI_CSN_BUSY CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE CPF_CPF_STAT_BUSY CPF_CPF_STAT_STALL TCC_CYCLE_sum TCC_BUSY_sum TCC_PROBE_sum TCC_PROBE_ALL_sum
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_1.txt b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..9f994430df
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 GRBM_SPI_BUSY TCP_READ_TAGCONFLICT_STALL_CYCLES_sum TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum TCP_TA_TCP_STATE_READ_sum TA_BUFFER_READ_WAVEFRONTS_sum TA_BUFFER_WRITE_WAVEFRONTS_sum TD_SPI_STALL_sum TD_LOAD_WAVEFRONT_sum SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE CPC_CPC_TCIU_BUSY CPC_CPC_TCIU_IDLE CPF_CPF_TCIU_BUSY CPF_CPF_TCIU_STALL TCC_NC_REQ_sum TCC_UC_REQ_sum TCC_CC_REQ_sum TCC_RW_REQ_sum
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_10.txt b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..4d161126b9
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_11.txt b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..9ea5ffa581
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_12.txt b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..780ea0bfcc
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_13.txt b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_13.txt
new file mode 100644
index 0000000000..a5acb13148
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_13.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_ATOMIC[0] TCC_BUBBLE[0] TCC_CYCLE[0] TCC_EA0_ATOMIC[0] TCC_ATOMIC[1] TCC_BUBBLE[1] TCC_CYCLE[1] TCC_EA0_ATOMIC[1] TCC_ATOMIC[2] TCC_BUBBLE[2] TCC_CYCLE[2] TCC_EA0_ATOMIC[2] TCC_ATOMIC[3] TCC_BUBBLE[3] TCC_CYCLE[3] TCC_EA0_ATOMIC[3] TCC_ATOMIC[4] TCC_BUBBLE[4] TCC_CYCLE[4] TCC_EA0_ATOMIC[4] TCC_ATOMIC[5] TCC_BUBBLE[5] TCC_CYCLE[5] TCC_EA0_ATOMIC[5] TCC_ATOMIC[6] TCC_BUBBLE[6] TCC_CYCLE[6] TCC_EA0_ATOMIC[6] TCC_ATOMIC[7] TCC_BUBBLE[7] TCC_CYCLE[7] TCC_EA0_ATOMIC[7] TCC_ATOMIC[8] TCC_BUBBLE[8] TCC_CYCLE[8] TCC_EA0_ATOMIC[8] TCC_ATOMIC[9] TCC_BUBBLE[9] TCC_CYCLE[9] TCC_EA0_ATOMIC[9] TCC_ATOMIC[10] TCC_BUBBLE[10] TCC_CYCLE[10] TCC_EA0_ATOMIC[10] TCC_ATOMIC[11] TCC_BUBBLE[11] TCC_CYCLE[11] TCC_EA0_ATOMIC[11] TCC_ATOMIC[12] TCC_BUBBLE[12] TCC_CYCLE[12] TCC_EA0_ATOMIC[12] TCC_ATOMIC[13] TCC_BUBBLE[13] TCC_CYCLE[13] TCC_EA0_ATOMIC[13] TCC_ATOMIC[14] TCC_BUBBLE[14] TCC_CYCLE[14] TCC_EA0_ATOMIC[14] TCC_ATOMIC[15] TCC_BUBBLE[15] TCC_CYCLE[15] TCC_EA0_ATOMIC[15]
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_14.txt b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_14.txt
new file mode 100644
index 0000000000..5b5055136a
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_14.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_ATOMIC_LEVEL[0] TCC_EA0_RDREQ[0] TCC_EA0_RDREQ_32B[0] TCC_EA0_RDREQ_LEVEL[0] TCC_EA0_ATOMIC_LEVEL[1] TCC_EA0_RDREQ[1] TCC_EA0_RDREQ_32B[1] TCC_EA0_RDREQ_LEVEL[1] TCC_EA0_ATOMIC_LEVEL[2] TCC_EA0_RDREQ[2] TCC_EA0_RDREQ_32B[2] TCC_EA0_RDREQ_LEVEL[2] TCC_EA0_ATOMIC_LEVEL[3] TCC_EA0_RDREQ[3] TCC_EA0_RDREQ_32B[3] TCC_EA0_RDREQ_LEVEL[3] TCC_EA0_ATOMIC_LEVEL[4] TCC_EA0_RDREQ[4] TCC_EA0_RDREQ_32B[4] TCC_EA0_RDREQ_LEVEL[4] TCC_EA0_ATOMIC_LEVEL[5] TCC_EA0_RDREQ[5] TCC_EA0_RDREQ_32B[5] TCC_EA0_RDREQ_LEVEL[5] TCC_EA0_ATOMIC_LEVEL[6] TCC_EA0_RDREQ[6] TCC_EA0_RDREQ_32B[6] TCC_EA0_RDREQ_LEVEL[6] TCC_EA0_ATOMIC_LEVEL[7] TCC_EA0_RDREQ[7] TCC_EA0_RDREQ_32B[7] TCC_EA0_RDREQ_LEVEL[7] TCC_EA0_ATOMIC_LEVEL[8] TCC_EA0_RDREQ[8] TCC_EA0_RDREQ_32B[8] TCC_EA0_RDREQ_LEVEL[8] TCC_EA0_ATOMIC_LEVEL[9] TCC_EA0_RDREQ[9] TCC_EA0_RDREQ_32B[9] TCC_EA0_RDREQ_LEVEL[9] TCC_EA0_ATOMIC_LEVEL[10] TCC_EA0_RDREQ[10] TCC_EA0_RDREQ_32B[10] TCC_EA0_RDREQ_LEVEL[10] TCC_EA0_ATOMIC_LEVEL[11] TCC_EA0_RDREQ[11] TCC_EA0_RDREQ_32B[11] TCC_EA0_RDREQ_LEVEL[11] TCC_EA0_ATOMIC_LEVEL[12] TCC_EA0_RDREQ[12] TCC_EA0_RDREQ_32B[12] TCC_EA0_RDREQ_LEVEL[12] TCC_EA0_ATOMIC_LEVEL[13] TCC_EA0_RDREQ[13] TCC_EA0_RDREQ_32B[13] TCC_EA0_RDREQ_LEVEL[13] TCC_EA0_ATOMIC_LEVEL[14] TCC_EA0_RDREQ[14] TCC_EA0_RDREQ_32B[14] TCC_EA0_RDREQ_LEVEL[14] TCC_EA0_ATOMIC_LEVEL[15] TCC_EA0_RDREQ[15] TCC_EA0_RDREQ_32B[15] TCC_EA0_RDREQ_LEVEL[15]
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_15.txt b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_15.txt
new file mode 100644
index 0000000000..9d1dc82405
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_15.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_WRREQ[0] TCC_EA0_WRREQ_64B[0] TCC_EA0_WRREQ_LEVEL[0] TCC_HIT[0] TCC_EA0_WRREQ[1] TCC_EA0_WRREQ_64B[1] TCC_EA0_WRREQ_LEVEL[1] TCC_HIT[1] TCC_EA0_WRREQ[2] TCC_EA0_WRREQ_64B[2] TCC_EA0_WRREQ_LEVEL[2] TCC_HIT[2] TCC_EA0_WRREQ[3] TCC_EA0_WRREQ_64B[3] TCC_EA0_WRREQ_LEVEL[3] TCC_HIT[3] TCC_EA0_WRREQ[4] TCC_EA0_WRREQ_64B[4] TCC_EA0_WRREQ_LEVEL[4] TCC_HIT[4] TCC_EA0_WRREQ[5] TCC_EA0_WRREQ_64B[5] TCC_EA0_WRREQ_LEVEL[5] TCC_HIT[5] TCC_EA0_WRREQ[6] TCC_EA0_WRREQ_64B[6] TCC_EA0_WRREQ_LEVEL[6] TCC_HIT[6] TCC_EA0_WRREQ[7] TCC_EA0_WRREQ_64B[7] TCC_EA0_WRREQ_LEVEL[7] TCC_HIT[7] TCC_EA0_WRREQ[8] TCC_EA0_WRREQ_64B[8] TCC_EA0_WRREQ_LEVEL[8] TCC_HIT[8] TCC_EA0_WRREQ[9] TCC_EA0_WRREQ_64B[9] TCC_EA0_WRREQ_LEVEL[9] TCC_HIT[9] TCC_EA0_WRREQ[10] TCC_EA0_WRREQ_64B[10] TCC_EA0_WRREQ_LEVEL[10] TCC_HIT[10] TCC_EA0_WRREQ[11] TCC_EA0_WRREQ_64B[11] TCC_EA0_WRREQ_LEVEL[11] TCC_HIT[11] TCC_EA0_WRREQ[12] TCC_EA0_WRREQ_64B[12] TCC_EA0_WRREQ_LEVEL[12] TCC_HIT[12] TCC_EA0_WRREQ[13] TCC_EA0_WRREQ_64B[13] TCC_EA0_WRREQ_LEVEL[13] TCC_HIT[13] TCC_EA0_WRREQ[14] TCC_EA0_WRREQ_64B[14] TCC_EA0_WRREQ_LEVEL[14] TCC_HIT[14] TCC_EA0_WRREQ[15] TCC_EA0_WRREQ_64B[15] TCC_EA0_WRREQ_LEVEL[15] TCC_HIT[15]
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_16.txt b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_16.txt
new file mode 100644
index 0000000000..d63192626c
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_16.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_MISS[0] TCC_READ[0] TCC_REQ[0] TCC_RW_REQ[0] TCC_MISS[1] TCC_READ[1] TCC_REQ[1] TCC_RW_REQ[1] TCC_MISS[2] TCC_READ[2] TCC_REQ[2] TCC_RW_REQ[2] TCC_MISS[3] TCC_READ[3] TCC_REQ[3] TCC_RW_REQ[3] TCC_MISS[4] TCC_READ[4] TCC_REQ[4] TCC_RW_REQ[4] TCC_MISS[5] TCC_READ[5] TCC_REQ[5] TCC_RW_REQ[5] TCC_MISS[6] TCC_READ[6] TCC_REQ[6] TCC_RW_REQ[6] TCC_MISS[7] TCC_READ[7] TCC_REQ[7] TCC_RW_REQ[7] TCC_MISS[8] TCC_READ[8] TCC_REQ[8] TCC_RW_REQ[8] TCC_MISS[9] TCC_READ[9] TCC_REQ[9] TCC_RW_REQ[9] TCC_MISS[10] TCC_READ[10] TCC_REQ[10] TCC_RW_REQ[10] TCC_MISS[11] TCC_READ[11] TCC_REQ[11] TCC_RW_REQ[11] TCC_MISS[12] TCC_READ[12] TCC_REQ[12] TCC_RW_REQ[12] TCC_MISS[13] TCC_READ[13] TCC_REQ[13] TCC_RW_REQ[13] TCC_MISS[14] TCC_READ[14] TCC_REQ[14] TCC_RW_REQ[14] TCC_MISS[15] TCC_READ[15] TCC_REQ[15] TCC_RW_REQ[15]
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_17.txt b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_17.txt
new file mode 100644
index 0000000000..4f7f069398
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_17.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_TAG_STALL[0] TCC_TOO_MANY_EA_WRREQS_STALL[0] TCC_WRITE[0] TCC_TAG_STALL[1] TCC_TOO_MANY_EA_WRREQS_STALL[1] TCC_WRITE[1] TCC_TAG_STALL[2] TCC_TOO_MANY_EA_WRREQS_STALL[2] TCC_WRITE[2] TCC_TAG_STALL[3] TCC_TOO_MANY_EA_WRREQS_STALL[3] TCC_WRITE[3] TCC_TAG_STALL[4] TCC_TOO_MANY_EA_WRREQS_STALL[4] TCC_WRITE[4] TCC_TAG_STALL[5] TCC_TOO_MANY_EA_WRREQS_STALL[5] TCC_WRITE[5] TCC_TAG_STALL[6] TCC_TOO_MANY_EA_WRREQS_STALL[6] TCC_WRITE[6] TCC_TAG_STALL[7] TCC_TOO_MANY_EA_WRREQS_STALL[7] TCC_WRITE[7] TCC_TAG_STALL[8] TCC_TOO_MANY_EA_WRREQS_STALL[8] TCC_WRITE[8] TCC_TAG_STALL[9] TCC_TOO_MANY_EA_WRREQS_STALL[9] TCC_WRITE[9] TCC_TAG_STALL[10] TCC_TOO_MANY_EA_WRREQS_STALL[10] TCC_WRITE[10] TCC_TAG_STALL[11] TCC_TOO_MANY_EA_WRREQS_STALL[11] TCC_WRITE[11] TCC_TAG_STALL[12] TCC_TOO_MANY_EA_WRREQS_STALL[12] TCC_WRITE[12] TCC_TAG_STALL[13] TCC_TOO_MANY_EA_WRREQS_STALL[13] TCC_WRITE[13] TCC_TAG_STALL[14] TCC_TOO_MANY_EA_WRREQS_STALL[14] TCC_WRITE[14] TCC_TAG_STALL[15] TCC_TOO_MANY_EA_WRREQS_STALL[15] TCC_WRITE[15]
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_2.txt b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..9ea9d138b4
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 TCP_VOLATILE_sum TCP_TOTAL_ACCESSES_sum TCP_TOTAL_READ_sum TCP_TOTAL_WRITE_sum TA_BUFFER_ATOMIC_WAVEFRONTS_sum TA_BUFFER_TOTAL_CYCLES_sum TD_ATOMIC_WAVEFRONT_sum TD_STORE_WAVEFRONT_sum SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION CPF_CPF_STAT_IDLE CPF_CPF_TCIU_IDLE TCC_REQ_sum TCC_STREAMING_REQ_sum TCC_HIT_sum TCC_MISS_sum
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_3.txt b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..3fbfc02cbb
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS TCP_TOTAL_ATOMIC_WITH_RET_sum TCP_TOTAL_ATOMIC_WITHOUT_RET_sum TCP_TOTAL_WRITEBACK_INVALIDATES_sum TCP_TOTAL_CACHE_ACCESSES_sum TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES_sum TD_COALESCABLE_WAVEFRONT_sum SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE CPF_CMP_UTCL1_STALL_ON_TRANSLATION TCC_READ_sum TCC_WRITE_sum TCC_ATOMIC_sum TCC_WRITEBACK_sum
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_4.txt b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..32c3fba1c2
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAIT_ANY SQ_WAIT_INST_ANY SQ_ACTIVE_INST_ANY SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU TCP_UTCL1_TRANSLATION_MISS_sum TCP_UTCL1_TRANSLATION_HIT_sum TCP_UTCL1_PERMISSION_MISS_sum TCP_UTCL1_REQUEST_sum TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_TOTAL_WAVEFRONTS_sum SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE TCC_EA0_WRREQ_sum TCC_EA0_WRREQ_64B_sum TCC_EA0_WR_UNCACHED_32B_sum TCC_EA0_WRREQ_DRAM_sum
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_5.txt b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..5585830bf9
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_SCA SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU TCP_TCC_READ_REQ_sum TCP_TCC_WRITE_REQ_sum TCP_TCC_ATOMIC_WITH_RET_REQ_sum TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN CPC_ME1_DC0_SPI_BUSY TCC_EA0_RDREQ_sum TCC_EA0_RDREQ_32B_sum TCC_BUBBLE_sum TCC_EA0_RD_UNCACHED_32B_sum
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_6.txt b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..f46a54d514
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_THREAD_CYCLES_VALU SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 TCP_TCC_NC_READ_REQ_sum TCP_TCC_NC_WRITE_REQ_sum TCP_TCC_NC_ATOMIC_REQ_sum TCP_TCC_UC_READ_REQ_sum TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN TCC_EA0_RDREQ_DRAM_sum TCC_TAG_STALL_sum TCC_NORMAL_WRITEBACK_sum TCC_ALL_TC_OP_WB_WRITEBACK_sum
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_7.txt b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..60911ab220
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED TCP_TCC_UC_WRITE_REQ_sum TCP_TCC_UC_ATOMIC_REQ_sum TCP_TCC_CC_READ_REQ_sum TCP_TCC_CC_WRITE_REQ_sum TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR TCC_NORMAL_EVICT_sum TCC_ALL_TC_OP_INV_EVICT_sum TCC_TOO_MANY_EA_WRREQS_STALL_sum TCC_EA0_ATOMIC_sum
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_8.txt b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..fc7c4a8e57
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES TCP_TCC_CC_ATOMIC_REQ_sum TCP_TCC_RW_READ_REQ_sum TCP_TCC_RW_WRITE_REQ_sum TCP_TCC_RW_ATOMIC_REQ_sum SPI_VWC_CSC_WR SPI_RA_BULKY_CU_FULL_CSN TCC_EA0_RDREQ_LEVEL_sum TCC_EA0_WRREQ_LEVEL_sum TCC_EA0_ATOMIC_LEVEL_sum TCC_EA0_WRREQ_STALL_sum
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_9.txt b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..ea80d6beb1
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ TCP_PENDING_STALL_CYCLES_sum
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/timestamps.txt b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..0e97681a83
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300A_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300A_A1/pmc_perf.csv b/tests/workloads/dispatch_0_1/MI300A_A1/pmc_perf.csv
new file mode 100644
index 0000000000..b7b322df26
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300A_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SQ_INSTS_BRANCH,SQ_INSTS_SENDMSG,SQ_WAIT_ANY,SQ_WAIT_INST_ANY,SQ_ACTIVE_INST_ANY,SQ_ACTIVE_INST_VMEM,SQ_ACTIVE_INST_LDS,SQ_ACTIVE_INST_VALU,SPI_RA_WAVE_SIMD_FULL_CSN,SPI_RA_VGPR_SIMD_FULL_CSN,CPC_CPC_UTCL2IU_STALL,CPC_ME1_BUSY_FOR_PACKET_DECODE,TA_ADDR_STALLED_BY_TC_CYCLES_sum,TA_TOTAL_WAVEFRONTS_sum,TCC_EA0_WRREQ_64B_sum,TCC_EA0_WRREQ_DRAM_sum,TCC_EA0_WRREQ_sum,TCC_EA0_WR_UNCACHED_32B_sum,TCP_UTCL1_PERMISSION_MISS_sum,TCP_UTCL1_REQUEST_sum,TCP_UTCL1_TRANSLATION_HIT_sum,TCP_UTCL1_TRANSLATION_MISS_sum,Wave_Size_1,Correlation_ID_1,XCC_Index,TCC_EA0_WRREQ[0],TCC_EA0_WRREQ_64B[0],TCC_EA0_WRREQ_LEVEL[0],TCC_HIT[0],TCC_EA0_WRREQ[1],TCC_EA0_WRREQ_64B[1],TCC_EA0_WRREQ_LEVEL[1],TCC_HIT[1],TCC_EA0_WRREQ[2],TCC_EA0_WRREQ_64B[2],TCC_EA0_WRREQ_LEVEL[2],TCC_HIT[2],TCC_EA0_WRREQ[3],TCC_EA0_WRREQ_64B[3],TCC_EA0_WRREQ_LEVEL[3],TCC_HIT[3],TCC_EA0_WRREQ[4],TCC_EA0_WRREQ_64B[4],TCC_EA0_WRREQ_LEVEL[4],TCC_HIT[4],TCC_EA0_WRREQ[5],TCC_EA0_WRREQ_64B[5],TCC_EA0_WRREQ_LEVEL[5],TCC_HIT[5],TCC_EA0_WRREQ[6],TCC_EA0_WRREQ_64B[6],TCC_EA0_WRREQ_LEVEL[6],TCC_HIT[6],TCC_EA0_WRREQ[7],TCC_EA0_WRREQ_64B[7],TCC_EA0_WRREQ_LEVEL[7],TCC_HIT[7],TCC_EA0_WRREQ[8],TCC_EA0_WRREQ_64B[8],TCC_EA0_WRREQ_LEVEL[8],TCC_HIT[8],TCC_EA0_WRREQ[9],TCC_EA0_WRREQ_64B[9],TCC_EA0_WRREQ_LEVEL[9],TCC_HIT[9],TCC_EA0_WRREQ[10],TCC_EA0_WRREQ_64B[10],TCC_EA0_WRREQ_LEVEL[10],TCC_HIT[10],TCC_EA0_WRREQ[11],TCC_EA0_WRREQ_64B[11],TCC_EA0_WRREQ_LEVEL[11],TCC_HIT[11],TCC_EA0_WRREQ[12],TCC_EA0_WRREQ_64B[12],TCC_EA0_WRREQ_LEVEL[12],TCC_HIT[12],TCC_EA0_WRREQ[13],TCC_EA0_WRREQ_64B[13],TCC_EA0_WRREQ_LEVEL[13],TCC_HIT[13],TCC_EA0_WRREQ[14],TCC_EA0_WRREQ_64B[14],TCC_EA0_WRREQ_LEVEL[14],TCC_HIT[14],TCC_EA0_WRREQ[15],TCC_EA0_WRREQ_64B[15],TCC_EA0_WRREQ_LEVEL[15],TCC_HIT[15],TCC_EA0_WRREQ[16],TCC_EA0_WRREQ_64B[16],TCC_EA0_WRREQ_LEVEL[16],TCC_HIT[16],TCC_EA0_WRREQ[17],TCC_EA0_WRREQ_64B[17],TCC_EA0_WRREQ_LEVEL[17],TCC_HIT[17],TCC_EA0_WRREQ[18],TCC_EA0_WRREQ_64B[18],TCC_EA0_WRREQ_LEVEL[18],TCC_HIT[18],TCC_EA0_WRREQ[19],TCC_EA0_WRREQ_64B[19],TCC_EA0_WRREQ_LEVEL[19],TCC_HIT[19],TCC_EA0_WRREQ[20],TCC_EA0_WRREQ_64B[20],TCC_EA0_WRREQ_LEVEL[20],TCC_HIT[20],TCC_EA0_WRREQ[21],TCC_EA0_WRREQ_64B[21],TCC_EA0_WRREQ_LEVEL[21],TCC_HIT[21],TCC_EA0_WRREQ[22],TCC_EA0_WRREQ_64B[22],TCC_EA0_WRREQ_LEVEL[22],TCC_HIT[22],TCC_EA0_WRREQ[23],TCC_EA0_WRREQ_64B[23],TCC_EA0_WRREQ_LEVEL[23],TCC_HIT[23],TCC_EA0_WRREQ[24],TCC_EA0_WRREQ_64B[24],TCC_EA0_WRREQ_LEVEL[24],TCC_HIT[24],TCC_EA0_WRREQ[25],TCC_EA0_WRREQ_64B[25],TCC_EA0_WRREQ_LEVEL[25],TCC_HIT[25],TCC_EA0_WRREQ[26],TCC_EA0_WRREQ_64B[26],TCC_EA0_WRREQ_LEVEL[26],TCC_HIT[26],TCC_EA0_WRREQ[27],TCC_EA0_WRREQ_64B[27],TCC_EA0_WRREQ_LEVEL[27],TCC_HIT[27],TCC_EA0_WRREQ[28],TCC_EA0_WRREQ_64B[28],TCC_EA0_WRREQ_LEVEL[28],TCC_HIT[28],TCC_EA0_WRREQ[29],TCC_EA0_WRREQ_64B[29],TCC_EA0_WRREQ_LEVEL[29],TCC_HIT[29],TCC_EA0_WRREQ[30],TCC_EA0_WRREQ_64B[30],TCC_EA0_WRREQ_LEVEL[30],TCC_HIT[30],TCC_EA0_WRREQ[31],TCC_EA0_WRREQ_64B[31],TCC_EA0_WRREQ_LEVEL[31],TCC_HIT[31],TCC_EA0_WRREQ[32],TCC_EA0_WRREQ_64B[32],TCC_EA0_WRREQ_LEVEL[32],TCC_HIT[32],TCC_EA0_WRREQ[33],TCC_EA0_WRREQ_64B[33],TCC_EA0_WRREQ_LEVEL[33],TCC_HIT[33],TCC_EA0_WRREQ[34],TCC_EA0_WRREQ_64B[34],TCC_EA0_WRREQ_LEVEL[34],TCC_HIT[34],TCC_EA0_WRREQ[35],TCC_EA0_WRREQ_64B[35],TCC_EA0_WRREQ_LEVEL[35],TCC_HIT[35],TCC_EA0_WRREQ[36],TCC_EA0_WRREQ_64B[36],TCC_EA0_WRREQ_LEVEL[36],TCC_HIT[36],TCC_EA0_WRREQ[37],TCC_EA0_WRREQ_64B[37],TCC_EA0_WRREQ_LEVEL[37],TCC_HIT[37],TCC_EA0_WRREQ[38],TCC_EA0_WRREQ_64B[38],TCC_EA0_WRREQ_LEVEL[38],TCC_HIT[38],TCC_EA0_WRREQ[39],TCC_EA0_WRREQ_64B[39],TCC_EA0_WRREQ_LEVEL[39],TCC_HIT[39],TCC_EA0_WRREQ[40],TCC_EA0_WRREQ_64B[40],TCC_EA0_WRREQ_LEVEL[40],TCC_HIT[40],TCC_EA0_WRREQ[41],TCC_EA0_WRREQ_64B[41],TCC_EA0_WRREQ_LEVEL[41],TCC_HIT[41],TCC_EA0_WRREQ[42],TCC_EA0_WRREQ_64B[42],TCC_EA0_WRREQ_LEVEL[42],TCC_HIT[42],TCC_EA0_WRREQ[43],TCC_EA0_WRREQ_64B[43],TCC_EA0_WRREQ_LEVEL[43],TCC_HIT[43],TCC_EA0_WRREQ[44],TCC_EA0_WRREQ_64B[44],TCC_EA0_WRREQ_LEVEL[44],TCC_HIT[44],TCC_EA0_WRREQ[45],TCC_EA0_WRREQ_64B[45],TCC_EA0_WRREQ_LEVEL[45],TCC_HIT[45],TCC_EA0_WRREQ[46],TCC_EA0_WRREQ_64B[46],TCC_EA0_WRREQ_LEVEL[46],TCC_HIT[46],TCC_EA0_WRREQ[47],TCC_EA0_WRREQ_64B[47],TCC_EA0_WRREQ_LEVEL[47],TCC_HIT[47],TCC_EA0_WRREQ[48],TCC_EA0_WRREQ_64B[48],TCC_EA0_WRREQ_LEVEL[48],TCC_HIT[48],TCC_EA0_WRREQ[49],TCC_EA0_WRREQ_64B[49],TCC_EA0_WRREQ_LEVEL[49],TCC_HIT[49],TCC_EA0_WRREQ[50],TCC_EA0_WRREQ_64B[50],TCC_EA0_WRREQ_LEVEL[50],TCC_HIT[50],TCC_EA0_WRREQ[51],TCC_EA0_WRREQ_64B[51],TCC_EA0_WRREQ_LEVEL[51],TCC_HIT[51],TCC_EA0_WRREQ[52],TCC_EA0_WRREQ_64B[52],TCC_EA0_WRREQ_LEVEL[52],TCC_HIT[52],TCC_EA0_WRREQ[53],TCC_EA0_WRREQ_64B[53],TCC_EA0_WRREQ_LEVEL[53],TCC_HIT[53],TCC_EA0_WRREQ[54],TCC_EA0_WRREQ_64B[54],TCC_EA0_WRREQ_LEVEL[54],TCC_HIT[54],TCC_EA0_WRREQ[55],TCC_EA0_WRREQ_64B[55],TCC_EA0_WRREQ_LEVEL[55],TCC_HIT[55],TCC_EA0_WRREQ[56],TCC_EA0_WRREQ_64B[56],TCC_EA0_WRREQ_LEVEL[56],TCC_HIT[56],TCC_EA0_WRREQ[57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CED_WRITE_CYCLES_sum,TCC_ATOMIC_sum,TCC_READ_sum,TCC_WRITEBACK_sum,TCC_WRITE_sum,TCP_TOTAL_ATOMIC_WITHOUT_RET_sum,TCP_TOTAL_ATOMIC_WITH_RET_sum,TCP_TOTAL_CACHE_ACCESSES_sum,TCP_TOTAL_WRITEBACK_INVALIDATES_sum,TD_COALESCABLE_WAVEFRONT_sum,Wave_Size_5,Correlation_ID_5,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,TA_FLAT_ATOMIC_WAVEFRONTS_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,TCC_ALL_TC_OP_INV_EVICT_sum,TCC_EA0_ATOMIC_sum,TCC_NORMAL_EVICT_sum,TCC_TOO_MANY_EA_WRREQS_STALL_sum,TCP_TCC_CC_READ_REQ_sum,TCP_TCC_CC_WRITE_REQ_sum,TCP_TCC_UC_ATOMIC_REQ_sum,TCP_TCC_UC_WRITE_REQ_sum,Wave_Size_6,Correlation_ID_6,XCC_Index_6,TCC_MISS[0],TCC_READ[0],TCC_REQ[0],TCC_RW_REQ[0],TCC_MISS[1],TCC_READ[1],TCC_REQ[1],TCC_RW_REQ[1],TCC_MISS[2],TCC_READ[2],TCC_REQ[2],TCC_RW_REQ[2],TCC_MISS[3],TCC_READ[3],TCC_REQ[3],TCC_RW_REQ[3],TCC_MISS[4],TCC_READ[4],TCC_REQ[4],TCC_RW_REQ[4],TCC_MISS[5],TCC_READ[5],TCC_REQ[5],TCC_RW_REQ[5],TCC_MISS[6],TCC_READ[6],TCC_REQ[6],TCC_RW_REQ[6],TCC_MISS[7],TCC_READ[7],TCC_REQ[7],TCC_RW_REQ[7],TCC_MISS[8],TCC_READ[8],TCC_REQ[8],TCC_RW_REQ[8],TCC_MISS[9],TCC_READ[9],TCC_REQ[9],TCC_RW_REQ[9],TCC_MISS[10],TCC_READ[10],TCC_REQ[10],TCC_RW_REQ[10],TCC_MISS[11],TCC_READ[11],TCC_REQ[11],TCC_RW_REQ[11],TCC_MISS[12],TCC_READ[12],TCC_REQ[12],TCC_RW_REQ[12],TCC_MISS[13],TCC_READ[13],TCC_REQ[13],TCC_RW_REQ[13],TCC_MISS[14],TCC_READ[14],TCC_REQ[14],TCC_RW_REQ[14],TCC_MISS[15],TCC_READ[15],TCC_REQ[15],TCC_RW_REQ[15],TCC_MISS[16],TCC_READ[16],TCC_REQ[16],TCC_RW_REQ[16],TCC_MISS[17],TCC_READ[17],TCC_REQ[17],TCC_RW_REQ[17],TCC_MISS[18],TCC_READ[18],TCC_REQ[18],TCC_RW_REQ[18],TCC_MISS[19],TCC_READ[19],TCC_REQ[19],TCC_RW_REQ[19],TCC_MISS[20],TCC_READ[20],TCC_REQ[20],TCC_RW_REQ[20],TCC_MISS[21],TCC_READ[21],TCC_REQ[21],TCC_RW_REQ[21],TCC_MISS[22],TCC_READ[22],TCC_REQ[22],TCC_RW_REQ[22],TCC_MISS[23],TCC_READ[23],TCC_REQ[23],TCC_RW_REQ[23],TCC_MISS[24],TCC_READ[24],TCC_REQ[24],TCC_RW_REQ[24],TCC_MISS[25],TCC_READ[25],TCC_REQ[25],TCC_RW_REQ[25],TCC_MISS[26],TCC_READ[26],TCC_REQ[26],TCC_RW_REQ[26],TCC_MISS[27],TCC_READ[27],TCC_REQ[27],TCC_RW_REQ[27],TCC_MISS[28],TCC_READ[28],TCC_REQ[28],TCC_RW_REQ[28],TCC_MISS[29],TCC_READ[29],TCC_REQ[29],TCC_RW_REQ[29],TCC_MISS[30],TCC_READ[30],TCC_REQ[30],TCC_RW_REQ[30],TCC_MISS[31],TCC_READ[31],TCC_REQ[31],TCC_RW_REQ[31],TCC_MISS[32],TCC_READ[32],TCC_REQ[32],TCC_RW_REQ[32],TCC_MISS[33],TCC_READ[33],TCC_REQ[33],TCC_RW_REQ[33],TCC_MISS[34],TCC_READ[34],TCC_REQ[34],TCC_RW_REQ[34],TCC_MISS[35],TCC_READ[35],TCC_REQ[35],TCC_RW_REQ[35],TCC_MISS[36],TCC_READ[36],TCC_REQ[36],TCC_RW_REQ[36],TCC_MISS[37],TCC_READ[37],TCC_REQ[37],TCC_RW_REQ[37],TCC_MISS[38],TCC_READ[38],TCC_REQ[38],TCC_RW_REQ[38],TCC_MISS[39],TCC_READ[39],TCC_REQ[39],TCC_RW_REQ[39],TCC_MISS[40],TCC_READ[40],TCC_REQ[40],TCC_RW_REQ[40],TCC_MISS[41],TCC_READ[41],TCC_REQ[41],TCC_RW_REQ[41],TCC_MISS[42],TCC_READ[42],TCC_REQ[42],TCC_RW_REQ[42],TCC_MISS[43],TCC_READ[43],TCC_REQ[43],TCC_RW_REQ[43],TCC_MISS[44],TCC_READ[44],TCC_REQ[44],TCC_RW_REQ[44],TCC_MISS[45],TCC_READ[45],TCC_REQ[45],TCC_RW_REQ[45],TCC_MISS[46],TCC_READ[46],TCC_REQ[46],TCC_RW_REQ[46],TCC_MISS[47],TCC_READ[47],TCC_REQ[47],TCC_RW_REQ[47],TCC_MISS[48],TCC_READ[48],TCC_REQ[48],TCC_RW_REQ[48],TCC_MISS[49],TCC_READ[49],TCC_REQ[49],TCC_RW_REQ[49],TCC_MISS[50],TCC_READ[50],TCC_REQ[50],TCC_RW_REQ[50],TCC_MISS[51],TCC_READ[51],TCC_REQ[51],TCC_RW_REQ[51],TCC_MISS[52],TCC_READ[52],TCC_REQ[52],TCC_RW_REQ[52],TCC_MISS[53],TCC_READ[53],TCC_REQ[53],TCC_RW_REQ[53],TCC_MISS[54],TCC_READ[54],TCC_REQ[54],TCC_RW_REQ[54],TCC_MISS[55],TCC_READ[55],TCC_REQ[55],TCC_RW_REQ[55],TCC_MISS[56],TCC_READ[56],TCC_REQ[56],TCC_RW_REQ[56],TCC_MISS[57],TCC_READ[57],TCC_REQ[57],TCC_RW_REQ[57],TCC_MISS[58],TCC_READ[58],TCC_REQ[58],TCC_RW_REQ[58],TCC_MISS[59],TCC_READ[59],TCC_REQ[59],TCC_RW_REQ[59],TCC_MISS[60],TCC_READ[60],TCC_REQ[60],TCC_RW_REQ[60],TCC_MISS[61],TCC_READ[61],TCC_REQ[61],TCC_RW_REQ[61],TCC_MISS[62],TCC_READ[62],TCC_REQ[62],TCC_RW_REQ[62],TCC_MISS[63],TCC_READ[63],TCC_REQ[63],TCC_RW_REQ[63],TCC_MISS[64],TCC_READ[64],TCC_REQ[64],TCC_RW_REQ[64],TCC_MISS[65],TCC_READ[65],TCC_REQ[65],TCC_RW_REQ[65],TCC_MISS[66],TCC_READ[66],TCC_REQ[66],TCC_RW_REQ[66],TCC_MISS[67],TCC_READ[67],TCC_REQ[67],TCC_RW_REQ[67],TCC_MISS[68],TCC_READ[68],TCC_REQ[68],TCC_RW_REQ[68],TCC_MISS[69],TCC_READ[69],TCC_REQ[69],TCC_RW_REQ[69],TCC_MISS[70],TCC_READ[70],TCC_REQ[70],TCC_RW_REQ[70],TCC_MISS[71],TCC_READ[71],TCC_REQ[71],TCC_RW_REQ[71],TCC_MISS[72],TCC_READ[72],TCC_REQ[72],TCC_RW_REQ[72],TCC_MISS[73],TCC_READ[73],TCC_REQ[73],TCC_RW_REQ[73],TCC_MISS[74],TCC_READ[74],TCC_REQ[74],TCC_RW_REQ[74],TCC_MISS[75],TCC_READ[75],TCC_REQ[75],TCC_RW_REQ[75],TCC_MISS[76],TCC_READ[76],TCC_REQ[76],TCC_RW_REQ[76],TCC_MISS[77],TCC_READ[77],TCC_REQ[77],TCC_RW_REQ[77],TCC_MISS[78],TCC_READ[78],TCC_REQ[78],TCC_RW_REQ[78],TCC_MISS[79],TCC_READ[79],TCC_REQ[79],TCC_RW_REQ[79],TCC_MISS[80],TCC_READ[80],TCC_REQ[80],TCC_RW_REQ[80],TCC_MISS[81],TCC_READ[81],TCC_REQ[81],TCC_RW_REQ[81],TCC_MISS[82],TCC_READ[82],TCC_REQ[82],TCC_RW_REQ[82],TCC_MISS[83],TCC_READ[83],TCC_REQ[83],TCC_RW_REQ[83],TCC_MISS[84],TCC_READ[84],TCC_REQ[84],TCC_RW_REQ[84],TCC_MISS[85],TCC_READ[85],TCC_REQ[85],TCC_RW_REQ[85],TCC_MISS[86],TCC_READ[86],TCC_REQ[86],TCC_RW_REQ[86],TCC_MISS[87],TCC_READ[87],TCC_REQ[87],TCC_RW_REQ[87],TCC_MISS[88],TCC_READ[88],TCC_REQ[88],TCC_RW_REQ[88],TCC_MISS[89],TCC_READ[89],TCC_REQ[89],TCC_RW_REQ[89],TCC_MISS[90],TCC_READ[90],TCC_REQ[90],TCC_RW_REQ[90],TCC_MISS[91],TCC_READ[91],TCC_REQ[91],TCC_RW_REQ[91],TCC_MISS[92],TCC_READ[92],TCC_REQ[92],TCC_RW_REQ[92],TCC_MISS[93],TCC_READ[93],TCC_REQ[93],TCC_RW_REQ[93],TCC_MISS[94],TCC_READ[94],TCC_REQ[94],TCC_RW_REQ[94],TCC_MISS[95],TCC_READ[95],TCC_REQ[95],TCC_RW_REQ[95],Wave_Size_7,Correlation_ID_7,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SPI_RA_REQ_NO_ALLOC,SPI_RA_REQ_NO_ALLOC_CSN,CPC_CPC_STAT_STALL,CPC_UTCL1_STALL_ON_TRANSLATION,CPF_CPF_STAT_IDLE,CPF_CPF_TCIU_IDLE,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,TA_BUFFER_TOTAL_CYCLES_sum,TCC_HIT_sum,TCC_MISS_sum,TCC_REQ_sum,TCC_STREAMING_REQ_sum,TCP_TOTAL_ACCESSES_sum,TCP_TOTAL_READ_sum,TCP_TOTAL_WRITE_sum,TCP_VOLATILE_sum,TD_ATOMIC_WAVEFRONT_sum,TD_STORE_WAVEFRONT_sum,Wave_Size_8,Correlation_ID_8,XCC_Index_8,TCC_ATOMIC[0],TCC_BUBBLE[0],TCC_CYCLE[0],TCC_EA0_ATOMIC[0],TCC_ATOMIC[1],TCC_BUBBLE[1],TCC_CYCLE[1],TCC_EA0_ATOMIC[1],TCC_ATOMIC[2],TCC_BUBBLE[2],TCC_CYCLE[2],TCC_EA0_ATOMIC[2],TCC_ATOMIC[3],TCC_BUBBLE[3],TCC_CYCLE[3],TCC_EA0_ATOMIC[3],TCC_ATOMIC[4],TCC_BUBBLE[4],TCC_CYCLE[4],TCC_EA0_ATOMIC[4],TCC_ATOMIC[5],TCC_BUBBLE[5],TCC_CYCLE[5],TCC_EA0_ATOMIC[5],TCC_ATOMIC[6],TCC_BUBBLE[6],TCC_CYCLE[6],TCC_EA0_ATOMIC[6],TCC_ATOMIC[7],TCC_BUBBLE[7],TCC_CYCLE[7],TCC_EA0_ATOMIC[7],TCC_ATOMIC[8],TCC_BUBBLE[8],TCC_CYCLE[8],TCC_EA0_ATOMIC[8],TCC_ATOMIC[9],TCC_BUBBLE[9],TCC_CYCLE[9],TCC_EA0_ATOMIC[9],TCC_ATOMIC[10],TCC_BUBBLE[10],TCC_CYCLE[10],TCC_EA0_ATOMIC[10],TCC_ATOMIC[11],TCC_BUBBLE[11],TCC_CYCLE[11],TCC_EA0_ATOMIC[11],TCC_ATOMIC[12],TCC_BUBBLE[12],TCC_CYCLE[12],TCC_EA0_ATOMIC[12],TCC_ATOMIC[13],TCC_BUBBLE[13],TCC_CYCLE[13],TCC_EA0_ATOMIC[13],TCC_ATOMIC[14],TCC_BUBBLE[14],TCC_CYCLE[14],TCC_EA0_ATOMIC[14],TCC_ATOMIC[15],TCC_BUBBLE[15],TCC_CYCLE[15],TCC_EA0_ATOMIC[15],TCC_ATOMIC[16],TCC_BUBBLE[16],TCC_CYCLE[16],TCC_EA0_ATOMIC[16],TCC_ATOMIC[17],TCC_BUBBLE[17],TCC_CYCLE[17],TCC_EA0_ATOMIC[17],TCC_ATOMIC[18],TCC_BUBBLE[18],TCC_CYCLE[18],TCC_EA0_ATOMIC[18],TCC_ATOMIC[19],TCC_BUBBLE[19],TCC_CYCLE[19],TCC_EA0_ATOMIC[19],TCC_ATOMIC[20],TCC_BUBBLE[20],TCC_CYCLE[20],TCC_EA0_ATOMIC[20],TCC_ATOMIC[21],TCC_BUBBLE[21],TCC_CYCLE[21],TCC_EA0_ATOMIC[21],TCC_ATOMIC[22],TCC_BUBBLE[22],TCC_CYCLE[22],TCC_EA0_ATOMIC[22],TCC_ATOMIC[23],TCC_BUBBLE[23],TCC_CYCLE[23],TCC_EA0_ATOMIC[23],TCC_ATOMIC[24],TCC_BUBBLE[24],TCC_CYCLE[24],TCC_EA0_ATOMIC[24],TCC_ATOMIC[25],TCC_BUBBLE[25],TCC_CYCLE[25],TCC_EA0_ATOMIC[25],TCC_ATOMIC[26],TCC_BUBBLE[26],TCC_CYCLE[26],TCC_EA0_ATOMIC[26],TCC_ATOMIC[27],TCC_BUBBLE[27],TCC_CYCLE[27],TCC_EA0_ATOMIC[27],TCC_ATOMIC[28],TCC_BUBBLE[28],TCC_CYCLE[28],TCC_EA0_ATOMIC[28],TCC_ATOMIC[29],TCC_BUBBLE[29],TCC_CYCLE[29],TCC_EA0_ATOMIC[29],TCC_ATOMIC[30],TCC_BUBBLE[30],TCC_CYCLE[30],TCC_EA0_ATOMIC[30],TCC_ATOMIC[31],TCC_BUBBLE[31],TCC_CYCLE[31],TCC_EA0_ATOMIC[31],TCC_ATOMIC[32],TCC_BUBBLE[32],TCC_CYCLE[32],TCC_EA0_ATOMIC[32],TCC_ATOMIC[33],TCC_BUBBLE[33],TCC_CYCLE[33],TCC_EA0_ATOMIC[33],TCC_ATOMIC[34],TCC_BUBBLE[34],TCC_CYCLE[34],TCC_EA0_ATOMIC[34],TCC_ATOMIC[35],TCC_BUBBLE[35],TCC_CYCLE[35],TCC_EA0_ATOMIC[35],TCC_ATOMIC[36],TCC_BUBBLE[36],TCC_CYCLE[36],TCC_EA0_ATOMIC[36],TCC_ATOMIC[37],TCC_BUBBLE[37],TCC_CYCLE[37],TCC_EA0_ATOMIC[37],TCC_ATOMIC[38],TCC_BUBBLE[38],TCC_CYCLE[38],TCC_EA0_ATOMIC[38],TCC_ATOMIC[39],TCC_BUBBLE[39],TCC_CYCLE[39],TCC_EA0_ATOMIC[39],TCC_ATOMIC[40],TCC_BUBBLE[40],TCC_CYCLE[40],TCC_EA0_ATOMIC[40],TCC_ATOMIC[41],TCC_BUBBLE[41],TCC_CYCLE[41],TCC_EA0_ATOMIC[41],TCC_ATOMIC[42],TCC_BUBBLE[42],TCC_CYCLE[42],TCC_EA0_ATOMIC[42],TCC_ATOMIC[43],TCC_BUBBLE[43],TCC_CYCLE[43],TCC_EA0_ATOMIC[43],TCC_ATOMIC[44],TCC_BUBBLE[44],TCC_CYCLE[44],TCC_EA0_ATOMIC[44],TCC_ATOMIC[45],TCC_BUBBLE[45],TCC_CYCLE[45],TCC_EA0_ATOMIC[45],TCC_ATOMIC[46],TCC_BUBBLE[46],TCC_CYCLE[46],TCC_EA0_ATOMIC[46],TCC_ATOMIC[47],TCC_BUBBLE[47],TCC_CYCLE[47],TCC_EA0_ATOMIC[47],TCC_ATOMIC[48],TCC_BUBBLE[48],TCC_CYCLE[48],TCC_EA0_ATOMIC[48],TCC_ATOMIC[49],TCC_BUBBLE[49],TCC_CYCLE[49],TCC_EA0_ATOMIC[49],TCC_ATOMIC[50],TCC_BUBBLE[50],TCC_CYCLE[50],TCC_EA0_ATOMIC[50],TCC_ATOMIC[51],TCC_BUBBLE[51],TCC_CYCLE[51],TCC_EA0_ATOMIC[51],TCC_ATOMIC[52],TCC_BUBBLE[52],TCC_CYCLE[52],TCC_EA0_ATOMIC[52],TCC_ATOMIC[53],TCC_BUBBLE[53],TCC_CYCLE[53],TCC_EA0_ATOMIC[53],TCC_ATOMIC[54],TCC_BUBBLE[54],TCC_CYCLE[54],TCC_EA0_ATOMIC[54],TCC_ATOMIC[55],TCC_BUBBLE[55],TCC_CYCLE[55],TCC_EA0_ATOMIC[55],TCC_ATOMIC[56],TCC_BUBBLE[56],TCC_CYCLE[56],TCC_EA0_ATOMIC[56],TCC_ATOMIC[57],TCC_BUBBLE[57],TCC_CYCLE[57],TCC_EA0_ATOMIC[57],TCC_ATOMIC[58],TCC_BUBBLE[58],TCC_CYCLE[58],TCC_EA0_ATOMIC[58],TCC_ATOMIC[59],TCC_BUBBLE[59],TCC_CYCLE[59],TCC_EA0_ATOMIC[59],TCC_ATOMIC[60],TCC_BUBBLE[60],TCC_CYCLE[60],TCC_EA0_ATOMIC[60],TCC_ATOMIC[61],TCC_BUBBLE[61],TCC_CYCLE[61],TCC_EA0_ATOMIC[61],TCC_ATOMIC[62],TCC_BUBBLE[62],TCC_CYCLE[62],TCC_EA0_ATOMIC[62],TCC_ATOMIC[63],TCC_BUBBLE[63],TCC_CYCLE[63],TCC_EA0_ATOMIC[63],TCC_ATOMIC[64],TCC_BUBBLE[64],TCC_CYCLE[64],TCC_EA0_ATOMIC[64],TCC_ATOMIC[65],TCC_BUBBLE[65],TCC_CYCLE[65],TCC_EA0_ATOMIC[65],TCC_ATOMIC[66],TCC_BUBBLE[66],TCC_CYCLE[66],TCC_EA0_ATOMIC[66],TCC_ATOMIC[67],TCC_BUBBLE[67],TCC_CYCLE[67],TCC_EA0_ATOMIC[67],TCC_ATOMIC[68],TCC_BUBBLE[68],TCC_CYCLE[68],TCC_EA0_ATOMIC[68],TCC_ATOMIC[69],TCC_BUBBLE[69],TCC_CYCLE[69],TCC_EA0_ATOMIC[69],TCC_ATOMIC[70],TCC_BUBBLE[70],TCC_CYCLE[70],TCC_EA0_ATOMIC[70],TCC_ATOMIC[71],TCC_BUBBLE[71],TCC_CYCLE[71],TCC_EA0_ATOMIC[71],TCC_ATOMIC[72],TCC_BUBBLE[72],TCC_CYCLE[72],TCC_EA0_ATOMIC[72],TCC_ATOMIC[73],TCC_BUBBLE[73],TCC_CYCLE[73],TCC_EA0_ATOMIC[73],TCC_ATOMIC[74],TCC_BUBBLE[74],TCC_CYCLE[74],TCC_EA0_ATOMIC[74],TCC_ATOMIC[75],TCC_BUBBLE[75],TCC_CYCLE[75],TCC_EA0_ATOMIC[75],TCC_ATOMIC[76],TCC_BUBBLE[76],TCC_CYCLE[76],TCC_EA0_ATOMIC[76],TCC_ATOMIC[77],TCC_BUBBLE[77],TCC_CYCLE[77],TCC_EA0_ATOMIC[77],TCC_ATOMIC[78],TCC_BUBBLE[78],TCC_CYCLE[78],TCC_EA0_ATOMIC[78],TCC_ATOMIC[79],TCC_BUBBLE[79],TCC_CYCLE[79],TCC_EA0_ATOMIC[79],TCC_ATOMIC[80],TCC_BUBBLE[80],TCC_CYCLE[80],TCC_EA0_ATOMIC[80],TCC_ATOMIC[81],TCC_BUBBLE[81],TCC_CYCLE[81],TCC_EA0_ATOMIC[81],TCC_ATOMIC[82],TCC_BUBBLE[82],TCC_CYCLE[82],TCC_EA0_ATOMIC[82],TCC_ATOMIC[83],TCC_BUBBLE[83],TCC_CYCLE[83],TCC_EA0_ATOMIC[83],TCC_ATOMIC[84],TCC_BUBBLE[84],TCC_CYCLE[84],TCC_EA0_ATOMIC[84],TCC_ATOMIC[85],TCC_BUBBLE[85],TCC_CYCLE[85],TCC_EA0_ATOMIC[85],TCC_ATOMIC[86],TCC_BUBBLE[86],TCC_CYCLE[86],TCC_EA0_ATOMIC[86],TCC_ATOMIC[87],TCC_BUBBLE[87],TCC_CYCLE[87],TCC_EA0_ATOMIC[87],TCC_ATOMIC[88],TCC_BUBBLE[88],TCC_CYCLE[88],TCC_EA0_ATOMIC[88],TCC_ATOMIC[89],TCC_BUBBLE[89],TCC_CYCLE[89],TCC_EA0_ATOMIC[89],TCC_ATOMIC[90],TCC_BUBBLE[90],TCC_CYCLE[90],TCC_EA0_ATOMIC[90],TCC_ATOMIC[91],TCC_BUBBLE[91],TCC_CYCLE[91],TCC_EA0_ATOMIC[91],TCC_ATOMIC[92],TCC_BUBBLE[92],TCC_CYCLE[92],TCC_EA0_ATOMIC[92],TCC_ATOMIC[93],TCC_BUBBLE[93],TCC_CYCLE[93],TCC_EA0_ATOMIC[93],TCC_ATOMIC[94],TCC_BUBBLE[94],TCC_CYCLE[94],TCC_EA0_ATOMIC[94],TCC_ATOMIC[95],TCC_BUBBLE[95],TCC_CYCLE[95],TCC_EA0_ATOMIC[95],Wave_Size_9,Correlation_ID_9,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_10,Correlation_ID_10,SQC_TC_DATA_ATOMIC_REQ,SQC_TC_STALL,SQC_TC_REQ,SQC_DCACHE_REQ_READ_16,SQC_ICACHE_REQ,SQC_ICACHE_HITS,SQC_ICACHE_MISSES,SQC_ICACHE_MISSES_DUPLICATE,Wave_Size_11,Correlation_ID_11,SQ_INSTS_VALU_MFMA_MOPS_I8,SQ_INSTS_VALU_MFMA_MOPS_F16,SQ_INSTS_VALU_MFMA_MOPS_BF16,SQ_INSTS_VALU_MFMA_MOPS_F32,SQ_INSTS_VALU_MFMA_MOPS_F64,SQC_TC_INST_REQ,SQC_TC_DATA_READ_REQ,SQC_TC_DATA_WRITE_REQ,TCP_PENDING_STALL_CYCLES_sum,Wave_Size_12,Correlation_ID_12,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,TCC_EA0_ATOMIC_LEVEL_sum,TCC_EA0_RDREQ_LEVEL_sum,TCC_EA0_WRREQ_LEVEL_sum,TCC_EA0_WRREQ_STALL_sum,TCP_TCC_CC_ATOMIC_REQ_sum,TCP_TCC_RW_ATOMIC_REQ_sum,TCP_TCC_RW_READ_REQ_sum,TCP_TCC_RW_WRITE_REQ_sum,Wave_Size_13,Correlation_ID_13,SQC_DCACHE_REQ_READ_2,SQC_DCACHE_REQ_READ_4,Wave_Size_14,Correlation_ID_14,SQ_ACTIVE_INST_SCA,SQ_ACTIVE_INST_EXP_GDS,SQ_ACTIVE_INST_MISC,SQ_ACTIVE_INST_FLAT,SQ_INST_CYCLES_VMEM_WR,SQ_INST_CYCLES_VMEM_RD,SQ_INST_CYCLES_SMEM,SQ_INST_CYCLES_SALU,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,CPC_ME1_DC0_SPI_BUSY,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,TCC_BUBBLE_sum,TCC_EA0_RDREQ_32B_sum,TCC_EA0_RDREQ_sum,TCC_EA0_RD_UNCACHED_32B_sum,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,TCP_TCC_READ_REQ_sum,TCP_TCC_WRITE_REQ_sum,Wave_Size_15,Correlation_ID_15,XCC_Index_15,TCC_EA0_ATOMIC_LEVEL[0],TCC_EA0_RDREQ[0],TCC_EA0_RDREQ_32B[0],TCC_EA0_RDREQ_LEVEL[0],TCC_EA0_ATOMIC_LEVEL[1],TCC_EA0_RDREQ[1],TCC_EA0_RDREQ_32B[1],TCC_EA0_RDREQ_LEVEL[1],TCC_EA0_ATOMIC_LEVEL[2],TCC_EA0_RDREQ[2],TCC_EA0_RDREQ_32B[2],TCC_EA0_RDREQ_LEVEL[2],TCC_EA0_ATOMIC_LEVEL[3],TCC_EA0_RDREQ[3],TCC_EA0_RDREQ_32B[3],TCC_EA0_RDREQ_LEVEL[3],TCC_EA0_ATOMIC_LEVEL[4],TCC_EA0_RDREQ[4],TCC_EA0_RDREQ_32B[4],TCC_EA0_RDREQ_LEVEL[4],TCC_EA0_ATOMIC_LEVEL[5],TCC_EA0_RDREQ[5],TCC_EA0_RDREQ_32B[5],TCC_EA0_RDREQ_LEVEL[5],TCC_EA0_ATOMIC_LEVEL[6],TCC_EA0_RDREQ[6],TCC_EA0_RDREQ_32B[6],TCC_EA0_RDREQ_LEVEL[6],TCC_EA0_ATOMIC_LEVEL[7],TCC_EA0_RDREQ[7],TCC_EA0_RDREQ_32B[7],TCC_EA0_RDREQ_LEVEL[7],TCC_EA0_ATOMIC_LEVEL[8],TCC_EA0_RDREQ[8],TCC_EA0_RDREQ_32B[8],TCC_EA0_RDREQ_LEVEL[8],TCC_EA0_ATOMIC_LEVEL[9],TCC_EA0_RDREQ[9],TCC_EA0_RDREQ_32B[9],TCC_EA0_RDREQ_LEVEL[9],TCC_EA0_ATOMIC_LEVEL[10],TCC_EA0_RDREQ[10],TCC_EA0_RDREQ_32B[10],TCC_EA0_RDREQ_LEVEL[10],TCC_EA0_ATOMIC_LEVEL[11],TCC_EA0_RDREQ[11],TCC_EA0_RDREQ_32B[11],TCC_EA0_RDREQ_LEVEL[11],TCC_EA0_ATOMIC_LEVEL[12],TCC_EA0_RDREQ[12],TCC_EA0_RDREQ_32B[12],TCC_EA0_RDREQ_LEVEL[12],TCC_EA0_ATOMIC_LEVEL[13],TCC_EA0_RDREQ[13],TCC_EA0_RDREQ_32B[13],TCC_EA0_RDREQ_LEVEL[13],TCC_EA0_ATOMIC_LEVEL[14],TCC_EA0_RDREQ[14],TCC_EA0_RDREQ_32B[14],TCC_EA0_RDREQ_LEVEL[14],TCC_EA0_ATOMIC_LEVEL[15],TCC_EA0_RDREQ[15],TCC_EA0_RDREQ_32B[15],TCC_EA0_RDREQ_LEVEL[15],TCC_EA0_ATOMIC_LEVEL[16],TCC_EA0_RDREQ[16],TCC_EA0_RDREQ_32B[16],TCC_EA0_RDREQ_LEVEL[16],TCC_EA0_ATOMIC_LEVEL[17],TCC_EA0_RDREQ[17],TCC_EA0_RDREQ_32B[17],TCC_EA0_RDREQ_LEVEL[17],TCC_EA0_ATOMIC_LEVEL[18],TCC_EA0_RDREQ[18],TCC_EA0_RDREQ_32B[18],TCC_EA0_RDREQ_LEVEL[18],TCC_EA0_ATOMIC_LEVEL[19],TCC_EA0_RDREQ[19],TCC_EA0_RDREQ_32B[19],TCC_EA0_RDREQ_LEVEL[19],TCC_EA0_ATOMIC_LEVEL[20],TCC_EA0_RDREQ[20],TCC_EA0_RDREQ_32B[20],TCC_EA0_RDREQ_LEVEL[20],TCC_EA0_ATOMIC_LEVEL[21],TCC_EA0_RDREQ[21],TCC_EA0_RDREQ_32B[21],TCC_EA0_RDREQ_LEVEL[21],TCC_EA0_ATOMIC_LEVEL[22],TCC_EA0_RDREQ[22],TCC_EA0_RDREQ_32B[22],TCC_EA0_RDREQ_LEVEL[22],TCC_EA0_ATOMIC_LEVEL[23],TCC_EA0_RDREQ[23],TCC_EA0_RDREQ_32B[23],TCC_EA0_RDREQ_LEVEL[23],TCC_EA0_ATOMIC_LEVEL[24],TCC_EA0_RDREQ[24],TCC_EA0_RDREQ_32B[24],TCC_EA0_RDREQ_LEVEL[24],TCC_EA0_ATOMIC_LEVEL[25],TCC_EA0_RDREQ[25],TCC_EA0_RDREQ_32B[25],TCC_EA0_RDREQ_LEVEL[25],TCC_EA0_ATOMIC_LEVEL[26],TCC_EA0_RDREQ[26],TCC_EA0_RDREQ_32B[26],TCC_EA0_RDREQ_LEVEL[26],TCC_EA0_ATOMIC_LEVEL[27],TCC_EA0_RDREQ[27],TCC_EA0_RDREQ_32B[27],TCC_EA0_RDREQ_LEVEL[27],TCC_EA0_ATOMIC_LEVEL[28],TCC_EA0_RDREQ[28],TCC_EA0_RDREQ_32B[28],TCC_EA0_RDREQ_LEVEL[28],TCC_EA0_ATOMIC_LEVEL[29],TCC_EA0_RDREQ[29],TCC_EA0_RDREQ_32B[29],TCC_EA0_RDREQ_LEVEL[29],TCC_EA0_ATOMIC_LEVEL[30],TCC_EA0_RDREQ[30],TCC_EA0_RDREQ_32B[30],TCC_EA0_RDREQ_LEVEL[30],TCC_EA0_ATOMIC_LEVEL[31],TCC_EA0_RDREQ[31],TCC_EA0_RDREQ_32B[31],TCC_EA0_RDREQ_LEVEL[31],TCC_EA0_ATOMIC_LEVEL[32],TCC_EA0_RDREQ[32],TCC_EA0_RDREQ_32B[32],TCC_EA0_RDREQ_LEVEL[32],TCC_EA0_ATOMIC_LEVEL[33],TCC_EA0_RDREQ[33],TCC_EA0_RDREQ_32B[33],TCC_EA0_RDREQ_LEVEL[33],TCC_EA0_ATOMIC_LEVEL[34],TCC_EA0_RDREQ[34],TCC_EA0_RDREQ_32B[34],TCC_EA0_RDREQ_LEVEL[34],TCC_EA0_ATOMIC_LEVEL[35],TCC_EA0_RDREQ[35],TCC_EA0_RDREQ_32B[35],TCC_EA0_RDREQ_LEVEL[35],TCC_EA0_ATOMIC_LEVEL[36],TCC_EA0_RDREQ[36],TCC_EA0_RDREQ_32B[36],TCC_EA0_RDREQ_LEVEL[36],TCC_EA0_ATOMIC_LEVEL[37],TCC_EA0_RDREQ[37],TCC_EA0_RDREQ_32B[37],TCC_EA0_RDREQ_LEVEL[37],TCC_EA0_ATOMIC_LEVEL[38],TCC_EA0_RDREQ[38],TCC_EA0_RDREQ_32B[38],TCC_EA0_RDREQ_LEVEL[38],TCC_EA0_ATOMIC_LEVEL[39],TCC_EA0_RDREQ[39],TCC_EA0_RDREQ_32B[39],TCC_EA0_RDREQ_LEVEL[39],TCC_EA0_ATOMIC_LEVEL[40],TCC_EA0_RDREQ[40],TCC_EA0_RDREQ_32B[40],TCC_EA0_RDREQ_LEVEL[40],TCC_EA0_ATOMIC_LEVEL[41],TCC_EA0_RDREQ[41],TCC_EA0_RDREQ_32B[41],TCC_EA0_RDREQ_LEVEL[41],TCC_EA0_ATOMIC_LEVEL[42],TCC_EA0_RDREQ[42],TCC_EA0_RDREQ_32B[42],TCC_EA0_RDREQ_LEVEL[42],TCC_EA0_ATOMIC_LEVEL[43],TCC_EA0_RDREQ[43],TCC_EA0_RDREQ_32B[43],TCC_EA0_RDREQ_LEVEL[43],TCC_EA0_ATOMIC_LEVEL[44],TCC_EA0_RDREQ[44],TCC_EA0_RDREQ_32B[44],TCC_EA0_RDREQ_LEVEL[44],TCC_EA0_ATOMIC_LEVEL[45],TCC_EA0_RDREQ[45],TCC_EA0_RDREQ_32B[45],TCC_EA0_RDREQ_LEVEL[45],TCC_EA0_ATOMIC_LEVEL[46],TCC_EA0_RDREQ[46],TCC_EA0_RDREQ_32B[46],TCC_EA0_RDREQ_LEVEL[46],TCC_EA0_ATOMIC_LEVEL[47],TCC_EA0_RDREQ[47],TCC_EA0_RDREQ_32B[47],TCC_EA0_RDREQ_LEVEL[47],TCC_EA0_ATOMIC_LEVEL[48],TCC_EA0_RDREQ[48],TCC_EA0_RDREQ_32B[48],TCC_EA0_RDREQ_LEVEL[48],TCC_EA0_ATOMIC_LEVEL[49],TCC_EA0_RDREQ[49],TCC_EA0_RDREQ_32B[49],TCC_EA0_RDREQ_LEVEL[49],TCC_EA0_ATOMIC_LEVEL[50],TCC_EA0_RDREQ[50],TCC_EA0_RDREQ_32B[50],TCC_EA0_RDREQ_LEVEL[50],TCC_EA0_ATOMIC_LEVEL[51],TCC_EA0_RDREQ[51],TCC_EA0_RDREQ_32B[51],TCC_EA0_RDREQ_LEVEL[51],TCC_EA0_ATOMIC_LEVEL[52],TCC_EA0_RDREQ[52],TCC_EA0_RDREQ_32B[52],TCC_EA0_RDREQ_LEVEL[52],TCC_EA0_ATOMIC_LEVEL[53],TCC_EA0_RDREQ[53],TCC_EA0_RDREQ_32B[53],TCC_EA0_RDREQ_LEVEL[53],TCC_EA0_ATOMIC_LEVEL[54],TCC_EA0_RDREQ[54],TCC_EA0_RDREQ_32B[54],TCC_EA0_RDREQ_LEVEL[54],TCC_EA0_ATOMIC_LEVEL[55],TCC_EA0_RDREQ[55],TCC_EA0_RDREQ_32B[55],TCC_EA0_RDREQ_LEVEL[55],TCC_EA0_ATOMIC_LEVEL[56],TCC_EA0_RDREQ[56],TCC_EA0_RDREQ_32B[56],TCC_EA0_RDREQ_LEVEL[56],TCC_EA0_ATOMIC_LEVEL[57],TCC_EA0_RDREQ[57],TCC_EA0_RDREQ_32B[57],TCC_EA0_RDREQ_LEVEL[57],TCC_EA0_ATOMIC_LEVEL[58],TCC_EA0_RDREQ[58],TCC_EA0_RDREQ_32B[58],TCC_EA0_RDREQ_LEVEL[58],TCC_EA0_ATOMIC_LEVEL[59],TCC_EA0_RDREQ[59],TCC_EA0_RDREQ_32B[59],TCC_EA0_RDREQ_LEVEL[59],TCC_EA0_ATOMIC_LEVEL[60],TCC_EA0_RDREQ[60],TCC_EA0_RDREQ_32B[60],TCC_EA0_RDREQ_LEVEL[60],TCC_EA0_ATOMIC_LEVEL[61],TCC_EA0_RDREQ[61],TCC_EA0_RDREQ_32B[61],TCC_EA0_RDREQ_LEVEL[61],TCC_EA0_ATOMIC_LEVEL[62],TCC_EA0_RDREQ[62],TCC_EA0_RDREQ_32B[62],TCC_EA0_RDREQ_LEVEL[62],TCC_EA0_ATOMIC_LEVEL[63],TCC_EA0_RDREQ[63],TCC_EA0_RDREQ_32B[63],TCC_EA0_RDREQ_LEVEL[63],TCC_EA0_ATOMIC_LEVEL[64],TCC_EA0_RDREQ[64],TCC_EA0_RDREQ_32B[64],TCC_EA0_RDREQ_LEVEL[64],TCC_EA0_ATOMIC_LEVEL[65],TCC_EA0_RDREQ[65],TCC_EA0_RDREQ_32B[65],TCC_EA0_RDREQ_LEVEL[65],TCC_EA0_ATOMIC_LEVEL[66],TCC_EA0_RDREQ[66],TCC_EA0_RDREQ_32B[66],TCC_EA0_RDREQ_LEVEL[66],TCC_EA0_ATOMIC_LEVEL[67],TCC_EA0_RDREQ[67],TCC_EA0_RDREQ_32B[67],TCC_EA0_RDREQ_LEVEL[67],TCC_EA0_ATOMIC_LEVEL[68],TCC_EA0_RDREQ[68],TCC_EA0_RDREQ_32B[68],TCC_EA0_RDREQ_LEVEL[68],TCC_EA0_ATOMIC_LEVEL[69],TCC_EA0_RDREQ[69],TCC_EA0_RDREQ_32B[69],TCC_EA0_RDREQ_LEVEL[69],TCC_EA0_ATOMIC_LEVEL[70],TCC_EA0_RDREQ[70],TCC_EA0_RDREQ_32B[70],TCC_EA0_RDREQ_LEVEL[70],TCC_EA0_ATOMIC_LEVEL[71],TCC_EA0_RDREQ[71],TCC_EA0_RDREQ_32B[71],TCC_EA0_RDREQ_LEVEL[71],TCC_EA0_ATOMIC_LEVEL[72],TCC_EA0_RDREQ[72],TCC_EA0_RDREQ_32B[72],TCC_EA0_RDREQ_LEVEL[72],TCC_EA0_ATOMIC_LEVEL[73],TCC_EA0_RDREQ[73],TCC_EA0_RDREQ_32B[73],TCC_EA0_RDREQ_LEVEL[73],TCC_EA0_ATOMIC_LEVEL[74],TCC_EA0_RDREQ[74],TCC_EA0_RDREQ_32B[74],TCC_EA0_RDREQ_LEVEL[74],TCC_EA0_ATOMIC_LEVEL[75],TCC_EA0_RDREQ[75],TCC_EA0_RDREQ_32B[75],TCC_EA0_RDREQ_LEVEL[75],TCC_EA0_ATOMIC_LEVEL[76],TCC_EA0_RDREQ[76],TCC_EA0_RDREQ_32B[76],TCC_EA0_RDREQ_LEVEL[76],TCC_EA0_ATOMIC_LEVEL[77],TCC_EA0_RDREQ[77],TCC_EA0_RDREQ_32B[77],TCC_EA0_RDREQ_LEVEL[77],TCC_EA0_ATOMIC_LEVEL[78],TCC_EA0_RDREQ[78],TCC_EA0_RDREQ_32B[78],TCC_EA0_RDREQ_LEVEL[78],TCC_EA0_ATOMIC_LEVEL[79],TCC_EA0_RDREQ[79],TCC_EA0_RDREQ_32B[79],TCC_EA0_RDREQ_LEVEL[79],TCC_EA0_ATOMIC_LEVEL[80],TCC_EA0_RDREQ[80],TCC_EA0_RDREQ_32B[80],TCC_EA0_RDREQ_LEVEL[80],TCC_EA0_ATOMIC_LEVEL[81],TCC_EA0_RDREQ[81],TCC_EA0_RDREQ_32B[81],TCC_EA0_RDREQ_LEVEL[81],TCC_EA0_ATOMIC_LEVEL[82],TCC_EA0_RDREQ[82],TCC_EA0_RDREQ_32B[82],TCC_EA0_RDREQ_LEVEL[82],TCC_EA0_ATOMIC_LEVEL[83],TCC_EA0_RDREQ[83],TCC_EA0_RDREQ_32B[83],TCC_EA0_RDREQ_LEVEL[83],TCC_EA0_ATOMIC_LEVEL[84],TCC_EA0_RDREQ[84],TCC_EA0_RDREQ_32B[84],TCC_EA0_RDREQ_LEVEL[84],TCC_EA0_ATOMIC_LEVEL[85],TCC_EA0_RDREQ[85],TCC_EA0_RDREQ_32B[85],TCC_EA0_RDREQ_LEVEL[85],TCC_EA0_ATOMIC_LEVEL[86],TCC_EA0_RDREQ[86],TCC_EA0_RDREQ_32B[86],TCC_EA0_RDREQ_LEVEL[86],TCC_EA0_ATOMIC_LEVEL[87],TCC_EA0_RDREQ[87],TCC_EA0_RDREQ_32B[87],TCC_EA0_RDREQ_LEVEL[87],TCC_EA0_ATOMIC_LEVEL[88],TCC_EA0_RDREQ[88],TCC_EA0_RDREQ_32B[88],TCC_EA0_RDREQ_LEVEL[88],TCC_EA0_ATOMIC_LEVEL[89],TCC_EA0_RDREQ[89],TCC_EA0_RDREQ_32B[89],TCC_EA0_RDREQ_LEVEL[89],TCC_EA0_ATOMIC_LEVEL[90],TCC_EA0_RDREQ[90],TCC_EA0_RDREQ_32B[90],TCC_EA0_RDREQ_LEVEL[90],TCC_EA0_ATOMIC_LEVEL[91],TCC_EA0_RDREQ[91],TCC_EA0_RDREQ_32B[91],TCC_EA0_RDREQ_LEVEL[91],TCC_EA0_ATOMIC_LEVEL[92],TCC_EA0_RDREQ[92],TCC_EA0_RDREQ_32B[92],TCC_EA0_RDREQ_LEVEL[92],TCC_EA0_ATOMIC_LEVEL[93],TCC_EA0_RDREQ[93],TCC_EA0_RDREQ_32B[93],TCC_EA0_RDREQ_LEVEL[93],TCC_EA0_ATOMIC_LEVEL[94],TCC_EA0_RDREQ[94],TCC_EA0_RDREQ_32B[94],TCC_EA0_RDREQ_LEVEL[94],TCC_EA0_ATOMIC_LEVEL[95],TCC_EA0_RDREQ[95],TCC_EA0_RDREQ_32B[95],TCC_EA0_RDREQ_LEVEL[95],Wave_Size_16,Correlation_ID_16,SQ_INSTS_VMEM,SQ_INSTS_SALU,SQ_INSTS_VSKIPPED,SQ_INSTS,SQ_INSTS_VALU,SQ_INSTS_VALU_ADD_F16,SQ_INSTS_VALU_MUL_F16,SQ_INSTS_VALU_FMA_F16,GRBM_SPI_BUSY,SPI_CSN_NUM_THREADGROUPS,SPI_CSN_WAVE,CPC_CPC_TCIU_BUSY,CPC_CPC_TCIU_IDLE,CPF_CPF_TCIU_BUSY,CPF_CPF_TCIU_STALL,TA_BUFFER_READ_WAVEFRONTS_sum,TA_BUFFER_WRITE_WAVEFRONTS_sum,TCC_CC_REQ_sum,TCC_NC_REQ_sum,TCC_RW_REQ_sum,TCC_UC_REQ_sum,TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum,TCP_READ_TAGCONFLICT_STALL_CYCLES_sum,TCP_TA_TCP_STATE_READ_sum,TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum,TD_LOAD_WAVEFRONT_sum,TD_SPI_STALL_sum,Wave_Size_17,Correlation_ID_17,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_BUSY_CU_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_INSTS_VALU_CVT,SQ_INSTS_VMEM_WR,SQ_INSTS_VMEM_RD,GRBM_COUNT,GRBM_GUI_ACTIVE,SPI_CSN_WINDOW_VALID,SPI_CSN_BUSY,CPC_CPC_STAT_BUSY,CPC_CPC_STAT_IDLE,CPF_CPF_STAT_BUSY,CPF_CPF_STAT_STALL,TA_BUFFER_WAVEFRONTS_sum,TA_TA_BUSY_sum,TCC_BUSY_sum,TCC_CYCLE_sum,TCC_PROBE_ALL_sum,TCC_PROBE_sum,TCP_GATE_EN1_sum,TCP_GATE_EN2_sum,TCP_TCR_TCP_STALL_CYCLES_sum,TCP_TD_TCP_STALL_CYCLES_sum,TD_TC_STALL_sum,TD_TD_BUSY_sum,Start_Timestamp,End_Timestamp
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diff --git a/tests/workloads/dispatch_0_1/MI300A_A1/sysinfo.csv b/tests/workloads/dispatch_0_1/MI300A_A1/sysinfo.csv
new file mode 100644
index 0000000000..912d8123d9
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300A_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+dispatch_0_1,./tests/vcopy -n 1048576 -b 256 -i 3,SQ|LDS|SQC|TA|TD|TCP|TCC|SPI|CPC|CPF,Wed 29 May 2024 01:37:17 PM  (CDT),2,sh5-1w300-rg3-3,AMD Instinct MI300A Accelerator,"American Megatrends International, LLC.RMO1002DS",Ubuntu 22.04.2 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,131174852,,6.1.2-110,N/A,SPX,NPS1,MI300A_A1,gfx942,32,24576,228,4,24,64,1024,32,2100,1300,2100,1300,96,32,120,4,5324.8,6
diff --git a/tests/workloads/dispatch_0_1/MI300A_A1/timestamps.csv b/tests/workloads/dispatch_0_1/MI300A_A1/timestamps.csv
new file mode 100644
index 0000000000..2d4513e2e4
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300A_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,11995,1,147125,147125,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73715526473477,73715526483212,0
+2,11995,1,147125,147125,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73715526500157,73715526506607,0
+3,11995,1,147125,147125,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73715526521910,73715526528079,0
diff --git a/tests/workloads/dispatch_0_1/MI300X_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/dispatch_0_1/MI300X_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..c1a8f1a23f
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300X_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,60633,1,965423,965423,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716295853072008,716295853087727,0,429775.0,429775.0,16384.0,65536.0,35970.0,2885248.0
+1,60633,1,965423,965423,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716295853110167,716295853124005,0,342679.0,342679.0,16384.0,65536.0,12832.0,1048580.0
+2,60633,1,965423,965423,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716295853144605,716295853158404,0,386583.0,386583.0,16384.0,65536.0,13174.0,1048584.0
diff --git a/tests/workloads/dispatch_0_1/MI300X_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/dispatch_0_1/MI300X_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..f2c38a17e6
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300X_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,60633,1,965435,965435,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716295853072008,716295853087727,0,0.0,0.0,0.0
+1,60633,1,965435,965435,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716295853110167,716295853124005,0,0.0,0.0,0.0
+2,60633,1,965435,965435,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716295853144605,716295853158404,0,0.0,0.0,0.0
diff --git a/tests/workloads/dispatch_0_1/MI300X_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/dispatch_0_1/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..0aaddbdd19
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,965447,965447,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716295853072008,716295853087727,0,65536.0,3667646.0,293386216.0
+1,60633,1,965447,965447,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716295853110167,716295853124005,0,65536.0,3649546.0,291940368.0
+2,60633,1,965447,965447,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716295853144605,716295853158404,0,65536.0,3655802.0,292415648.0
diff --git a/tests/workloads/dispatch_0_1/MI300X_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/dispatch_0_1/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..d89dfe7970
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,965459,965459,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716295853072008,716295853087727,0,32768.0,447359.0,35782792.0
+1,60633,1,965459,965459,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716295853110167,716295853124005,0,32768.0,263496.0,21078168.0
+2,60633,1,965459,965459,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716295853144605,716295853158404,0,32768.0,285392.0,22823528.0
diff --git a/tests/workloads/dispatch_0_1/MI300X_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/dispatch_0_1/MI300X_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..0316d04a06
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300X_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,60633,1,965471,965471,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716295853072008,716295853087727,0,440774.0,440774.0,258682.0,1763096.0,16384.0,33518893.0,561396.0,0.0,134415692.0
+1,60633,1,965471,965471,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716295853110167,716295853124005,0,422603.0,422603.0,248983.0,1690412.0,16384.0,29908761.0,489788.0,0.0,119994832.0
+2,60633,1,965471,965471,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716295853144605,716295853158404,0,356448.0,356448.0,185116.0,1425792.0,16384.0,29715231.0,489637.0,0.0,119217092.0
diff --git a/tests/workloads/dispatch_0_1/MI300X_A1/log.txt b/tests/workloads/dispatch_0_1/MI300X_A1/log.txt
new file mode 100644
index 0000000000..7bf9da0f7a
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300X_A1/log.txt
@@ -0,0 +1,229 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/dispatch_0_1/MI300X_A1
+Target: MI300X_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: ['0:2']
+Hardware Blocks: All
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH_LEVEL
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_CVT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_WR
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_HITS
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_HITS
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES_DUPLICATE
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_13.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[3]
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_14.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[1]
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_15.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[0]
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_16.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[1]
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_17.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[2]
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F32
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_SCA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_MISC
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_WR
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_RD
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_THREAD_CYCLES_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ADDR_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_UNALIGNED_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_EQ_64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_48
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ITEMS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_MEM_VIOLATIONS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ATOMIC_RETURN
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_IDX_ACTIVE
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F64
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F32
+
+[profiling] Current input file: tests/workloads/dispatch_0_1/MI300X_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..ad1506b7f9
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..af443a5fdf
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..8e42534e97
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..786628208e
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..c9c2bb4619
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_0.txt b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..8653371a81
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD GRBM_COUNT GRBM_GUI_ACTIVE TCP_GATE_EN1_sum TCP_GATE_EN2_sum TCP_TD_TCP_STALL_CYCLES_sum TCP_TCR_TCP_STALL_CYCLES_sum TA_TA_BUSY_sum TA_BUFFER_WAVEFRONTS_sum TD_TD_BUSY_sum TD_TC_STALL_sum SPI_CSN_WINDOW_VALID SPI_CSN_BUSY CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE CPF_CPF_STAT_BUSY CPF_CPF_STAT_STALL TCC_CYCLE_sum TCC_BUSY_sum TCC_PROBE_sum TCC_PROBE_ALL_sum
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_1.txt b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..9f994430df
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 GRBM_SPI_BUSY TCP_READ_TAGCONFLICT_STALL_CYCLES_sum TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum TCP_TA_TCP_STATE_READ_sum TA_BUFFER_READ_WAVEFRONTS_sum TA_BUFFER_WRITE_WAVEFRONTS_sum TD_SPI_STALL_sum TD_LOAD_WAVEFRONT_sum SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE CPC_CPC_TCIU_BUSY CPC_CPC_TCIU_IDLE CPF_CPF_TCIU_BUSY CPF_CPF_TCIU_STALL TCC_NC_REQ_sum TCC_UC_REQ_sum TCC_CC_REQ_sum TCC_RW_REQ_sum
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_10.txt b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..4d161126b9
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_11.txt b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..9ea5ffa581
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_12.txt b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..780ea0bfcc
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_13.txt b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_13.txt
new file mode 100644
index 0000000000..a5acb13148
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_13.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_ATOMIC[0] TCC_BUBBLE[0] TCC_CYCLE[0] TCC_EA0_ATOMIC[0] TCC_ATOMIC[1] TCC_BUBBLE[1] TCC_CYCLE[1] TCC_EA0_ATOMIC[1] TCC_ATOMIC[2] TCC_BUBBLE[2] TCC_CYCLE[2] TCC_EA0_ATOMIC[2] TCC_ATOMIC[3] TCC_BUBBLE[3] TCC_CYCLE[3] TCC_EA0_ATOMIC[3] TCC_ATOMIC[4] TCC_BUBBLE[4] TCC_CYCLE[4] TCC_EA0_ATOMIC[4] TCC_ATOMIC[5] TCC_BUBBLE[5] TCC_CYCLE[5] TCC_EA0_ATOMIC[5] TCC_ATOMIC[6] TCC_BUBBLE[6] TCC_CYCLE[6] TCC_EA0_ATOMIC[6] TCC_ATOMIC[7] TCC_BUBBLE[7] TCC_CYCLE[7] TCC_EA0_ATOMIC[7] TCC_ATOMIC[8] TCC_BUBBLE[8] TCC_CYCLE[8] TCC_EA0_ATOMIC[8] TCC_ATOMIC[9] TCC_BUBBLE[9] TCC_CYCLE[9] TCC_EA0_ATOMIC[9] TCC_ATOMIC[10] TCC_BUBBLE[10] TCC_CYCLE[10] TCC_EA0_ATOMIC[10] TCC_ATOMIC[11] TCC_BUBBLE[11] TCC_CYCLE[11] TCC_EA0_ATOMIC[11] TCC_ATOMIC[12] TCC_BUBBLE[12] TCC_CYCLE[12] TCC_EA0_ATOMIC[12] TCC_ATOMIC[13] TCC_BUBBLE[13] TCC_CYCLE[13] TCC_EA0_ATOMIC[13] TCC_ATOMIC[14] TCC_BUBBLE[14] TCC_CYCLE[14] TCC_EA0_ATOMIC[14] TCC_ATOMIC[15] TCC_BUBBLE[15] TCC_CYCLE[15] TCC_EA0_ATOMIC[15]
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_14.txt b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_14.txt
new file mode 100644
index 0000000000..5b5055136a
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_14.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_ATOMIC_LEVEL[0] TCC_EA0_RDREQ[0] TCC_EA0_RDREQ_32B[0] TCC_EA0_RDREQ_LEVEL[0] TCC_EA0_ATOMIC_LEVEL[1] TCC_EA0_RDREQ[1] TCC_EA0_RDREQ_32B[1] TCC_EA0_RDREQ_LEVEL[1] TCC_EA0_ATOMIC_LEVEL[2] TCC_EA0_RDREQ[2] TCC_EA0_RDREQ_32B[2] TCC_EA0_RDREQ_LEVEL[2] TCC_EA0_ATOMIC_LEVEL[3] TCC_EA0_RDREQ[3] TCC_EA0_RDREQ_32B[3] TCC_EA0_RDREQ_LEVEL[3] TCC_EA0_ATOMIC_LEVEL[4] TCC_EA0_RDREQ[4] TCC_EA0_RDREQ_32B[4] TCC_EA0_RDREQ_LEVEL[4] TCC_EA0_ATOMIC_LEVEL[5] TCC_EA0_RDREQ[5] TCC_EA0_RDREQ_32B[5] TCC_EA0_RDREQ_LEVEL[5] TCC_EA0_ATOMIC_LEVEL[6] TCC_EA0_RDREQ[6] TCC_EA0_RDREQ_32B[6] TCC_EA0_RDREQ_LEVEL[6] TCC_EA0_ATOMIC_LEVEL[7] TCC_EA0_RDREQ[7] TCC_EA0_RDREQ_32B[7] TCC_EA0_RDREQ_LEVEL[7] TCC_EA0_ATOMIC_LEVEL[8] TCC_EA0_RDREQ[8] TCC_EA0_RDREQ_32B[8] TCC_EA0_RDREQ_LEVEL[8] TCC_EA0_ATOMIC_LEVEL[9] TCC_EA0_RDREQ[9] TCC_EA0_RDREQ_32B[9] TCC_EA0_RDREQ_LEVEL[9] TCC_EA0_ATOMIC_LEVEL[10] TCC_EA0_RDREQ[10] TCC_EA0_RDREQ_32B[10] TCC_EA0_RDREQ_LEVEL[10] TCC_EA0_ATOMIC_LEVEL[11] TCC_EA0_RDREQ[11] TCC_EA0_RDREQ_32B[11] TCC_EA0_RDREQ_LEVEL[11] TCC_EA0_ATOMIC_LEVEL[12] TCC_EA0_RDREQ[12] TCC_EA0_RDREQ_32B[12] TCC_EA0_RDREQ_LEVEL[12] TCC_EA0_ATOMIC_LEVEL[13] TCC_EA0_RDREQ[13] TCC_EA0_RDREQ_32B[13] TCC_EA0_RDREQ_LEVEL[13] TCC_EA0_ATOMIC_LEVEL[14] TCC_EA0_RDREQ[14] TCC_EA0_RDREQ_32B[14] TCC_EA0_RDREQ_LEVEL[14] TCC_EA0_ATOMIC_LEVEL[15] TCC_EA0_RDREQ[15] TCC_EA0_RDREQ_32B[15] TCC_EA0_RDREQ_LEVEL[15]
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_15.txt b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_15.txt
new file mode 100644
index 0000000000..9d1dc82405
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_15.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_WRREQ[0] TCC_EA0_WRREQ_64B[0] TCC_EA0_WRREQ_LEVEL[0] TCC_HIT[0] TCC_EA0_WRREQ[1] TCC_EA0_WRREQ_64B[1] TCC_EA0_WRREQ_LEVEL[1] TCC_HIT[1] TCC_EA0_WRREQ[2] TCC_EA0_WRREQ_64B[2] TCC_EA0_WRREQ_LEVEL[2] TCC_HIT[2] TCC_EA0_WRREQ[3] TCC_EA0_WRREQ_64B[3] TCC_EA0_WRREQ_LEVEL[3] TCC_HIT[3] TCC_EA0_WRREQ[4] TCC_EA0_WRREQ_64B[4] TCC_EA0_WRREQ_LEVEL[4] TCC_HIT[4] TCC_EA0_WRREQ[5] TCC_EA0_WRREQ_64B[5] TCC_EA0_WRREQ_LEVEL[5] TCC_HIT[5] TCC_EA0_WRREQ[6] TCC_EA0_WRREQ_64B[6] TCC_EA0_WRREQ_LEVEL[6] TCC_HIT[6] TCC_EA0_WRREQ[7] TCC_EA0_WRREQ_64B[7] TCC_EA0_WRREQ_LEVEL[7] TCC_HIT[7] TCC_EA0_WRREQ[8] TCC_EA0_WRREQ_64B[8] TCC_EA0_WRREQ_LEVEL[8] TCC_HIT[8] TCC_EA0_WRREQ[9] TCC_EA0_WRREQ_64B[9] TCC_EA0_WRREQ_LEVEL[9] TCC_HIT[9] TCC_EA0_WRREQ[10] TCC_EA0_WRREQ_64B[10] TCC_EA0_WRREQ_LEVEL[10] TCC_HIT[10] TCC_EA0_WRREQ[11] TCC_EA0_WRREQ_64B[11] TCC_EA0_WRREQ_LEVEL[11] TCC_HIT[11] TCC_EA0_WRREQ[12] TCC_EA0_WRREQ_64B[12] TCC_EA0_WRREQ_LEVEL[12] TCC_HIT[12] TCC_EA0_WRREQ[13] TCC_EA0_WRREQ_64B[13] TCC_EA0_WRREQ_LEVEL[13] TCC_HIT[13] TCC_EA0_WRREQ[14] TCC_EA0_WRREQ_64B[14] TCC_EA0_WRREQ_LEVEL[14] TCC_HIT[14] TCC_EA0_WRREQ[15] TCC_EA0_WRREQ_64B[15] TCC_EA0_WRREQ_LEVEL[15] TCC_HIT[15]
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_16.txt b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_16.txt
new file mode 100644
index 0000000000..d63192626c
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_16.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_MISS[0] TCC_READ[0] TCC_REQ[0] TCC_RW_REQ[0] TCC_MISS[1] TCC_READ[1] TCC_REQ[1] TCC_RW_REQ[1] TCC_MISS[2] TCC_READ[2] TCC_REQ[2] TCC_RW_REQ[2] TCC_MISS[3] TCC_READ[3] TCC_REQ[3] TCC_RW_REQ[3] TCC_MISS[4] TCC_READ[4] TCC_REQ[4] TCC_RW_REQ[4] TCC_MISS[5] TCC_READ[5] TCC_REQ[5] TCC_RW_REQ[5] TCC_MISS[6] TCC_READ[6] TCC_REQ[6] TCC_RW_REQ[6] TCC_MISS[7] TCC_READ[7] TCC_REQ[7] TCC_RW_REQ[7] TCC_MISS[8] TCC_READ[8] TCC_REQ[8] TCC_RW_REQ[8] TCC_MISS[9] TCC_READ[9] TCC_REQ[9] TCC_RW_REQ[9] TCC_MISS[10] TCC_READ[10] TCC_REQ[10] TCC_RW_REQ[10] TCC_MISS[11] TCC_READ[11] TCC_REQ[11] TCC_RW_REQ[11] TCC_MISS[12] TCC_READ[12] TCC_REQ[12] TCC_RW_REQ[12] TCC_MISS[13] TCC_READ[13] TCC_REQ[13] TCC_RW_REQ[13] TCC_MISS[14] TCC_READ[14] TCC_REQ[14] TCC_RW_REQ[14] TCC_MISS[15] TCC_READ[15] TCC_REQ[15] TCC_RW_REQ[15]
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_17.txt b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_17.txt
new file mode 100644
index 0000000000..4f7f069398
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_17.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_TAG_STALL[0] TCC_TOO_MANY_EA_WRREQS_STALL[0] TCC_WRITE[0] TCC_TAG_STALL[1] TCC_TOO_MANY_EA_WRREQS_STALL[1] TCC_WRITE[1] TCC_TAG_STALL[2] TCC_TOO_MANY_EA_WRREQS_STALL[2] TCC_WRITE[2] TCC_TAG_STALL[3] TCC_TOO_MANY_EA_WRREQS_STALL[3] TCC_WRITE[3] TCC_TAG_STALL[4] TCC_TOO_MANY_EA_WRREQS_STALL[4] TCC_WRITE[4] TCC_TAG_STALL[5] TCC_TOO_MANY_EA_WRREQS_STALL[5] TCC_WRITE[5] TCC_TAG_STALL[6] TCC_TOO_MANY_EA_WRREQS_STALL[6] TCC_WRITE[6] TCC_TAG_STALL[7] TCC_TOO_MANY_EA_WRREQS_STALL[7] TCC_WRITE[7] TCC_TAG_STALL[8] TCC_TOO_MANY_EA_WRREQS_STALL[8] TCC_WRITE[8] TCC_TAG_STALL[9] TCC_TOO_MANY_EA_WRREQS_STALL[9] TCC_WRITE[9] TCC_TAG_STALL[10] TCC_TOO_MANY_EA_WRREQS_STALL[10] TCC_WRITE[10] TCC_TAG_STALL[11] TCC_TOO_MANY_EA_WRREQS_STALL[11] TCC_WRITE[11] TCC_TAG_STALL[12] TCC_TOO_MANY_EA_WRREQS_STALL[12] TCC_WRITE[12] TCC_TAG_STALL[13] TCC_TOO_MANY_EA_WRREQS_STALL[13] TCC_WRITE[13] TCC_TAG_STALL[14] TCC_TOO_MANY_EA_WRREQS_STALL[14] TCC_WRITE[14] TCC_TAG_STALL[15] TCC_TOO_MANY_EA_WRREQS_STALL[15] TCC_WRITE[15]
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_2.txt b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..9ea9d138b4
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 TCP_VOLATILE_sum TCP_TOTAL_ACCESSES_sum TCP_TOTAL_READ_sum TCP_TOTAL_WRITE_sum TA_BUFFER_ATOMIC_WAVEFRONTS_sum TA_BUFFER_TOTAL_CYCLES_sum TD_ATOMIC_WAVEFRONT_sum TD_STORE_WAVEFRONT_sum SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION CPF_CPF_STAT_IDLE CPF_CPF_TCIU_IDLE TCC_REQ_sum TCC_STREAMING_REQ_sum TCC_HIT_sum TCC_MISS_sum
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_3.txt b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..3fbfc02cbb
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS TCP_TOTAL_ATOMIC_WITH_RET_sum TCP_TOTAL_ATOMIC_WITHOUT_RET_sum TCP_TOTAL_WRITEBACK_INVALIDATES_sum TCP_TOTAL_CACHE_ACCESSES_sum TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES_sum TD_COALESCABLE_WAVEFRONT_sum SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE CPF_CMP_UTCL1_STALL_ON_TRANSLATION TCC_READ_sum TCC_WRITE_sum TCC_ATOMIC_sum TCC_WRITEBACK_sum
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_4.txt b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..32c3fba1c2
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAIT_ANY SQ_WAIT_INST_ANY SQ_ACTIVE_INST_ANY SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU TCP_UTCL1_TRANSLATION_MISS_sum TCP_UTCL1_TRANSLATION_HIT_sum TCP_UTCL1_PERMISSION_MISS_sum TCP_UTCL1_REQUEST_sum TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_TOTAL_WAVEFRONTS_sum SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE TCC_EA0_WRREQ_sum TCC_EA0_WRREQ_64B_sum TCC_EA0_WR_UNCACHED_32B_sum TCC_EA0_WRREQ_DRAM_sum
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_5.txt b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..5585830bf9
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_SCA SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU TCP_TCC_READ_REQ_sum TCP_TCC_WRITE_REQ_sum TCP_TCC_ATOMIC_WITH_RET_REQ_sum TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN CPC_ME1_DC0_SPI_BUSY TCC_EA0_RDREQ_sum TCC_EA0_RDREQ_32B_sum TCC_BUBBLE_sum TCC_EA0_RD_UNCACHED_32B_sum
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_6.txt b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..f46a54d514
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_THREAD_CYCLES_VALU SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 TCP_TCC_NC_READ_REQ_sum TCP_TCC_NC_WRITE_REQ_sum TCP_TCC_NC_ATOMIC_REQ_sum TCP_TCC_UC_READ_REQ_sum TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN TCC_EA0_RDREQ_DRAM_sum TCC_TAG_STALL_sum TCC_NORMAL_WRITEBACK_sum TCC_ALL_TC_OP_WB_WRITEBACK_sum
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_7.txt b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..60911ab220
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED TCP_TCC_UC_WRITE_REQ_sum TCP_TCC_UC_ATOMIC_REQ_sum TCP_TCC_CC_READ_REQ_sum TCP_TCC_CC_WRITE_REQ_sum TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR TCC_NORMAL_EVICT_sum TCC_ALL_TC_OP_INV_EVICT_sum TCC_TOO_MANY_EA_WRREQS_STALL_sum TCC_EA0_ATOMIC_sum
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_8.txt b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..fc7c4a8e57
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES TCP_TCC_CC_ATOMIC_REQ_sum TCP_TCC_RW_READ_REQ_sum TCP_TCC_RW_WRITE_REQ_sum TCP_TCC_RW_ATOMIC_REQ_sum SPI_VWC_CSC_WR SPI_RA_BULKY_CU_FULL_CSN TCC_EA0_RDREQ_LEVEL_sum TCC_EA0_WRREQ_LEVEL_sum TCC_EA0_ATOMIC_LEVEL_sum TCC_EA0_WRREQ_STALL_sum
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_9.txt b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..ea80d6beb1
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ TCP_PENDING_STALL_CYCLES_sum
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/timestamps.txt b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..0e97681a83
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300X_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range: 0:2
+kernel:
diff --git a/tests/workloads/dispatch_0_1/MI300X_A1/pmc_perf.csv b/tests/workloads/dispatch_0_1/MI300X_A1/pmc_perf.csv
new file mode 100644
index 0000000000..65aa2f0f82
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300X_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_1,Correlation_ID_1,XCC_Index,TCC_ATOMIC[0],TCC_BUBBLE[0],TCC_CYCLE[0],TCC_EA0_ATOMIC[0],TCC_ATOMIC[1],TCC_BUBBLE[1],TCC_CYCLE[1],TCC_EA0_ATOMIC[1],TCC_ATOMIC[2],TCC_BUBBLE[2],TCC_CYCLE[2],TCC_EA0_ATOMIC[2],TCC_ATOMIC[3],TCC_BUBBLE[3],TCC_CYCLE[3],TCC_EA0_ATOMIC[3],TCC_ATOMIC[4],TCC_BUBBLE[4],TCC_CYCLE[4],TCC_EA0_ATOMIC[4],TCC_ATOMIC[5],TCC_BUBBLE[5],TCC_CYCLE[5],TCC_EA0_ATOMIC[5],TCC_ATOMIC[6],TCC_BUBBLE[6],TCC_CYCLE[6],TCC_EA0_ATOMIC[6],TCC_ATOMIC[7],TCC_BUBBLE[7],TCC_CYCLE[7],TCC_EA0_ATOMIC[7],TCC_ATOMIC[8],TCC_BUBBLE[8],TCC_CYCLE[8],TCC_EA0_ATOMIC[8],TCC_ATOMIC[9],TCC_BUBBLE[9],TCC_CYCLE[9],TCC_EA0_ATOMIC[9],TCC_ATOMIC[10],TCC_BUBBLE[10],TCC_CYCLE[10],TCC_EA0_ATOMIC[10],TCC_ATOMIC[11],TCC_BUBBLE[11],TCC_CYCLE[11],TCC_EA0_ATOMIC[11],TCC_ATOMIC[12],TCC_BUBBLE[12],TCC_CYCLE[12],TCC_EA0_ATOMIC[12],TCC_ATOMIC[13],TCC_BUBBLE[13],TCC_CYCLE[13],TCC_EA0_ATOMIC[13],TCC_ATOMIC[14],TCC_BUBBLE[14],TCC_CYCLE[14],TCC_EA0_ATOMIC[14],TCC_ATOMIC[15],TCC_BUBBLE[15],TCC_CYCLE[15],TCC_EA0_ATOMIC[15],TCC_ATOMIC[16],TCC_BUBBLE[16],TCC_CYCLE[16],TCC_EA0_ATOMIC[16],TCC_ATOMIC[17],TCC_BUBBLE[17],TCC_CYCLE[17],TCC_EA0_ATOMIC[17],TCC_ATOMIC[18],TCC_BUBBLE[18],TCC_CYCLE[18],TCC_EA0_ATOMIC[18],TCC_ATOMIC[19],TCC_BUBBLE[19],TCC_CYCLE[19],TCC_EA0_ATOMIC[19],TCC_ATOMIC[20],TCC_BUBBLE[20],TCC_CYCLE[20],TCC_EA0_ATOMIC[20],TCC_ATOMIC[21],TCC_BUBBLE[21],TCC_CYCLE[21],TCC_EA0_ATOMIC[21],TCC_ATOMIC[22],TCC_BUBBLE[22],TCC_CYCLE[22],TCC_EA0_ATOMIC[22],TCC_ATOMIC[23],TCC_BUBBLE[23],TCC_CYCLE[23],TCC_EA0_ATOMIC[23],TCC_ATOMIC[24],TCC_BUBBLE[24],TCC_CYCLE[24],TCC_EA0_ATOMIC[24],TCC_ATOMIC[25],TCC_BUBBLE[25],TCC_CYCLE[25],TCC_EA0_ATOMIC[25],TCC_ATOMIC[26],TCC_BUBBLE[26],TCC_CYCLE[26],TCC_EA0_ATOMIC[26],TCC_ATOMIC[27],TCC_BUBBLE[27],TCC_CYCLE[27],TCC_EA0_ATOMIC[27],TCC_ATOMIC[28],TCC_BUBBLE[28],TCC_CYCLE[28],TCC_EA0_ATOMIC[28],TCC_ATOMIC[29],TCC_BUBBLE[29],TCC_CYCLE[29],TCC_EA0_ATOMIC[29],TCC_ATOMIC[30],TCC_BUBBLE[30],TCC_CYCLE[30],TCC_EA0_ATOMIC[30],TCC_ATOMIC[31],TCC_BUBBLE[31],TCC_CYCLE[31],TCC_EA0_ATOMIC[31],TCC_ATOMIC[32],TCC_BUBBLE[32],TCC_CYCLE[32],TCC_EA0_ATOMIC[32],TCC_ATOMIC[33],TCC_BUBBLE[33],TCC_CYCLE[33],TCC_EA0_ATOMIC[33],TCC_ATOMIC[34],TCC_BUBBLE[34],TCC_CYCLE[34],TCC_EA0_ATOMIC[34],TCC_ATOMIC[35],TCC_BUBBLE[35],TCC_CYCLE[35],TCC_EA0_ATOMIC[35],TCC_ATOMIC[36],TCC_BUBBLE[36],TCC_CYCLE[36],TCC_EA0_ATOMIC[36],TCC_ATOMIC[37],TCC_BUBBLE[37],TCC_CYCLE[37],TCC_EA0_ATOMIC[37],TCC_ATOMIC[38],TCC_BUBBLE[38],TCC_CYCLE[38],TCC_EA0_ATOMIC[38],TCC_ATOMIC[39],TCC_BUBBLE[39],TCC_CYCLE[39],TCC_EA0_ATOMIC[39],TCC_ATOMIC[40],TCC_BUBBLE[40],TCC_CYCLE[40],TCC_EA0_ATOMIC[40],TCC_ATOMIC[41],TCC_BUBBLE[41],TCC_CYCLE[41],TCC_EA0_ATOMIC[41],TCC_ATOMIC[42],TCC_BUBBLE[42],TCC_CYCLE[42],TCC_EA0_ATOMIC[42],TCC_ATOMIC[43],TCC_BUBBLE[43],TCC_CYCLE[43],TCC_EA0_ATOMIC[43],TCC_ATOMIC[44],TCC_BUBBLE[44],TCC_CYCLE[44],TCC_EA0_ATOMIC[44],TCC_ATOMIC[45],TCC_BUBBLE[45],TCC_CYCLE[45],TCC_EA0_ATOMIC[45],TCC_ATOMIC[46],TCC_BUBBLE[46],TCC_CYCLE[46],TCC_EA0_ATOMIC[46],TCC_ATOMIC[47],TCC_BUBBLE[47],TCC_CYCLE[47],TCC_EA0_ATOMIC[47],TCC_ATOMIC[48],TCC_BUBBLE[48],TCC_CYCLE[48],TCC_EA0_ATOMIC[48],TCC_ATOMIC[49],TCC_BUBBLE[49],TCC_CYCLE[49],TCC_EA0_ATOMIC[49],TCC_ATOMIC[50],TCC_BUBBLE[50],TCC_CYCLE[50],TCC_EA0_ATOMIC[50],TCC_ATOMIC[51],TCC_BUBBLE[51],TCC_CYCLE[51],TCC_EA0_ATOMIC[51],TCC_ATOMIC[52],TCC_BUBBLE[52],TCC_CYCLE[52],TCC_EA0_ATOMIC[52],TCC_ATOMIC[53],TCC_BUBBLE[53],TCC_CYCLE[53],TCC_EA0_ATOMIC[53],TCC_ATOMIC[54],TCC_BUBBLE[54],TCC_CYCLE[54],TCC_EA0_ATOMIC[54],TCC_ATOMIC[55],TCC_BUBBLE[55],TCC_CYCLE[55],TCC_EA0_ATOMIC[55],TCC_ATOMIC[56],TCC_BUBBLE[56],TCC_CYCLE[56],TCC_EA0_ATOMIC[56],TCC_ATOMIC[57],TCC_BUBBLE[57],TCC_CYCLE[57],TCC_EA0_ATOMIC[57],TCC_ATOMIC[58],TCC_BUBBLE[58],TCC_CYCLE[58],TCC_EA0_ATOMIC[58],TCC_ATOMIC[59],TCC_BUBBLE[59],TCC_CYCLE[59],TCC_EA0_ATOMIC[59],TCC_ATOMIC[60],TCC_BUBBLE[60],TCC_CYCLE[60],TCC_EA0_ATOMIC[60],TCC_ATOMIC[61],TCC_BUBBLE[61],TCC_CYCLE[61],TCC_EA0_ATOMIC[61],TCC_ATOMIC[62],TCC_BUBBLE[62],TCC_CYCLE[62],TCC_EA0_ATOMIC[62],TCC_ATOMIC[63],TCC_BUBBLE[63],TCC_CYCLE[63],TCC_EA0_ATOMIC[63],TCC_ATOMIC[64],TCC_BUBBLE[64],TCC_CYCLE[64],TCC_EA0_ATOMIC[64],TCC_ATOMIC[65],TCC_BUBBLE[65],TCC_CYCLE[65],TCC_EA0_ATOMIC[65],TCC_ATOMIC[66],TCC_BUBBLE[66],TCC_CYCLE[66],TCC_EA0_ATOMIC[66],TCC_ATOMIC[67],TCC_BUBBLE[67],TCC_CYCLE[67],TCC_EA0_ATOMIC[67],TCC_ATOMIC[68],TCC_BUBBLE[68],TCC_CYCLE[68],TCC_EA0_ATOMIC[68],TCC_ATOMIC[69],TCC_BUBBLE[69],TCC_CYCLE[69],TCC_EA0_ATOMIC[69],TCC_ATOMIC[70],TCC_BUBBLE[70],TCC_CYCLE[70],TCC_EA0_ATOMIC[70],TCC_ATOMIC[71],TCC_BUBBLE[71],TCC_CYCLE[71],TCC_EA0_ATOMIC[71],TCC_ATOMIC[72],TCC_BUBBLE[72],TCC_CYCLE[72],TCC_EA0_ATOMIC[72],TCC_ATOMIC[73],TCC_BUBBLE[73],TCC_CYCLE[73],TCC_EA0_ATOMIC[73],TCC_ATOMIC[74],TCC_BUBBLE[74],TCC_CYCLE[74],TCC_EA0_ATOMIC[74],TCC_ATOMIC[75],TCC_BUBBLE[75],TCC_CYCLE[75],TCC_EA0_ATOMIC[75],TCC_ATOMIC[76],TCC_BUBBLE[76],TCC_CYCLE[76],TCC_EA0_ATOMIC[76],TCC_ATOMIC[77],TCC_BUBBLE[77],TCC_CYCLE[77],TCC_EA0_ATOMIC[77],TCC_ATOMIC[78],TCC_BUBBLE[78],TCC_CYCLE[78],TCC_EA0_ATOMIC[78],TCC_ATOMIC[79],TCC_BUBBLE[79],TCC_CYCLE[79],TCC_EA0_ATOMIC[79],TCC_ATOMIC[80],TCC_BUBBLE[80],TCC_CYCLE[80],TCC_EA0_ATOMIC[80],TCC_ATOMIC[81],TCC_BUBBLE[81],TCC_CYCLE[81],TCC_EA0_ATOMIC[81],TCC_ATOMIC[82],TCC_BUBBLE[82],TCC_CYCLE[82],TCC_EA0_ATOMIC[82],TCC_ATOMIC[83],TCC_BUBBLE[83],TCC_CYCLE[83],TCC_EA0_ATOMIC[83],TCC_ATOMIC[84],TCC_BUBBLE[84],TCC_CYCLE[84],TCC_EA0_ATOMIC[84],TCC_ATOMIC[85],TCC_BUBBLE[85],TCC_CYCLE[85],TCC_EA0_ATOMIC[85],TCC_ATOMIC[86],TCC_BUBBLE[86],TCC_CYCLE[86],TCC_EA0_ATOMIC[86],TCC_ATOMIC[87],TCC_BUBBLE[87],TCC_CYCLE[87],TCC_EA0_ATOMIC[87],TCC_ATOMIC[88],TCC_BUBBLE[88],TCC_CYCLE[88],TCC_EA0_ATOMIC[88],TCC_ATOMIC[89],TCC_BUBBLE[89],TCC_CYCLE[89],TCC_EA0_ATOMIC[89],TCC_ATOMIC[90],TCC_BUBBLE[90],TCC_CYCLE[90],TCC_EA0_ATOMIC[90],TCC_ATOMIC[91],TCC_BUBBLE[91],TCC_CYCLE[91],TCC_EA0_ATOMIC[91],TCC_ATOMIC[92],TCC_BUBBLE[92],TCC_CYCLE[92],TCC_EA0_ATOMIC[92],TCC_ATOMIC[93],TCC_BUBBLE[93],TCC_CYCLE[93],TCC_EA0_ATOMIC[93],TCC_ATOMIC[94],TCC_BUBBLE[94],TCC_CYCLE[94],TCC_EA0_ATOMIC[94],TCC_ATOMIC[95],TCC_BUBBLE[95],TCC_CYCLE[95],TCC_EA0_ATOMIC[95],TCC_ATOMIC[96],TCC_BUBBLE[96],TCC_CYCLE[96],TCC_EA0_ATOMIC[96],TCC_ATOMIC[97],TCC_BUBBLE[97],TCC_CYCLE[97],TCC_EA0_ATOMIC[97],TCC_ATOMIC[98],TCC_BUBBLE[98],TCC_CYCLE[98],TCC_EA0_ATOMIC[98],TCC_ATOMIC[99],TCC_BUBBLE[99],TCC_CYCLE[99],TCC_EA0_ATOMIC[99],TCC_ATOMIC[100],TCC_BUBBLE[100],TCC_CYCLE[100],TCC_EA0_ATOMIC[100],TCC_ATOMIC[101],TCC_BUBBLE[101],TCC_CYCLE[101],TCC_EA0_ATOMIC[101],TCC_ATOMIC[102],TCC_BUBBLE[102],TCC_CYCLE[102],TCC_EA0_ATOMIC[102],TCC_ATOMIC[103],TCC_BUBBLE[103],TCC_CYCLE[103],TCC_EA0_ATOMIC[103],TCC_ATOMIC[104],TCC_BUBBLE[104],TCC_CYCLE[104],TCC_EA0_ATOMIC[104],TCC_ATOMIC[105],TCC_BUBBLE[105],TCC_CYCLE[105],TCC_EA0_ATOMIC[105],TCC_ATOMIC[106],TCC_BUBBLE[106],TCC_CYCLE[106],TCC_EA0_ATOMIC[106],TCC_ATOMIC[107],TCC_BUBBLE[107],TCC_CYCLE[107],TCC_EA0_ATOMIC[107],TCC_ATOMIC[108],TCC_BUBBLE[108],TCC_CYCLE[108],TCC_EA0_ATOMIC[108],TCC_ATOMIC[109],TCC_BUBBLE[109],TCC_CYCLE[109],TCC_EA0_ATOMIC[109],TCC_ATOMIC[110],TCC_BUBBLE[110],TCC_CYCLE[110],TCC_EA0_ATOMIC[110],TCC_ATOMIC[111],TCC_BUBBLE[111],TCC_CYCLE[111],TCC_EA0_ATOMIC[111],TCC_ATOMIC[112],TCC_BUBBLE[112],TCC_CYCLE[112],TCC_EA0_ATOMIC[112],TCC_ATOMIC[113],TCC_BUBBLE[113],TCC_CYCLE[113],TCC_EA0_ATOMIC[113],TCC_ATOMIC[114],TCC_BUBBLE[114],TCC_CYCLE[114],TCC_EA0_ATOMIC[114],TCC_ATOMIC[115],TCC_BUBBLE[115],TCC_CYCLE[115],TCC_EA0_ATOMIC[115],TCC_ATOMIC[116],TCC_BUBBLE[116],TCC_CYCLE[116],TCC_EA0_ATOMIC[116],TCC_ATOMIC[117],TCC_BUBBLE[117],TCC_CYCLE[117],TCC_EA0_ATOMIC[117],TCC_ATOMIC[118],TCC_BUBBLE[118],TCC_CYCLE[118],TCC_EA0_ATOMIC[118],TCC_ATOMIC[119],TCC_BUBBLE[119],TCC_CYCLE[119],TCC_EA0_ATOMIC[119],TCC_ATOMIC[120],TCC_BUBBLE[120],TCC_CYCLE[120],TCC_EA0_ATOMIC[120],TCC_ATOMIC[121],TCC_BUBBLE[121],TCC_CYCLE[121],TCC_EA0_ATOMIC[121],TCC_ATOMIC[122],TCC_BUBBLE[122],TCC_CYCLE[122],TCC_EA0_ATOMIC[122],TCC_ATOMIC[123],TCC_BUBBLE[123],TCC_CYCLE[123],TCC_EA0_ATOMIC[123],TCC_ATOMIC[124],TCC_BUBBLE[124],TCC_CYCLE[124],TCC_EA0_ATOMIC[124],TCC_ATOMIC[125],TCC_BUBBLE[125],TCC_CYCLE[125],TCC_EA0_ATOMIC[125],TCC_ATOMIC[126],TCC_BUBBLE[126],TCC_CYCLE[126],TCC_EA0_ATOMIC[126],TCC_ATOMIC[127],TCC_BUBBLE[127],TCC_CYCLE[127],TCC_EA0_ATOMIC[127],Wave_Size_2,Correlation_ID_2,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,TA_FLAT_ATOMIC_WAVEFRONTS_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,TCC_ALL_TC_OP_INV_EVICT_sum,TCC_EA0_ATOMIC_sum,TCC_NORMAL_EVICT_sum,TCC_TOO_MANY_EA_WRREQS_STALL_sum,TCP_TCC_CC_READ_REQ_sum,TCP_TCC_CC_WRITE_REQ_sum,TCP_TCC_UC_ATOMIC_REQ_sum,TCP_TCC_UC_WRITE_REQ_sum,Wave_Size_3,Correlation_ID_3,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,TCC_EA0_ATOMIC_LEVEL_sum,TCC_EA0_RDREQ_LEVEL_sum,TCC_EA0_WRREQ_LEVEL_sum,TCC_EA0_WRREQ_STALL_sum,TCP_TCC_CC_ATOMIC_REQ_sum,TCP_TCC_RW_ATOMIC_REQ_sum,TCP_TCC_RW_READ_REQ_sum,TCP_TCC_RW_WRITE_REQ_sum,Wave_Size_4,Correlation_ID_4,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SPI_RA_REQ_NO_ALLOC,SPI_RA_REQ_NO_ALLOC_CSN,CPC_CPC_STAT_STALL,CPC_UTCL1_STALL_ON_TRANSLATION,CPF_CPF_STAT_IDLE,CPF_CPF_TCIU_IDLE,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,TA_BUFFER_TOTAL_CYCLES_sum,TCC_HIT_sum,TCC_MISS_sum,TCC_REQ_sum,TCC_STREAMING_REQ_sum,TCP_TOTAL_ACCESSES_sum,TCP_TOTAL_READ_sum,TCP_TOTAL_WRITE_sum,TCP_VOLATILE_sum,TD_ATOMIC_WAVEFRONT_sum,TD_STORE_WAVEFRONT_sum,Wave_Size_5,Correlation_ID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SQ_INST_CYCLES_SALU,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,CPC_ME1_DC0_SPI_BUSY,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,TCC_BUBBLE_sum,TCC_EA0_RDREQ_32B_sum,TCC_EA0_RDREQ_sum,TCC_EA0_RD_UNCACHED_32B_sum,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,TCP_TCC_READ_REQ_sum,TCP_TCC_WRITE_REQ_sum,Start_Timestamp,End_Timestamp
+0,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) 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diff --git a/tests/workloads/dispatch_0_1/MI300X_A1/sysinfo.csv b/tests/workloads/dispatch_0_1/MI300X_A1/sysinfo.csv
new file mode 100644
index 0000000000..1b04d84fa1
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300X_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+dispatch_0_1,./tests/vcopy -n 1048576 -b 256 -i 3,SQ|LDS|SQC|TA|TD|TCP|TCC|SPI|CPC|CPF,Wed 29 May 2024 12:01:45 PM  (CDT),2,splinter-126-wr-c6,AMD Ryzen 9 7950X 16-Core Processor,"American Megatrends International, LLC.VS2683299N.FD",Ubuntu 22.04.4 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,114656528,,6.2.0-13611,113-MI3SRIOV-001,SPX,NPS1,MI300X_A1,gfx942,32,4096,304,4,32,64,1024,32,2100,1300,2100,1300,128,32,160,4,5324.8,8
diff --git a/tests/workloads/dispatch_0_1/MI300X_A1/timestamps.csv b/tests/workloads/dispatch_0_1/MI300X_A1/timestamps.csv
new file mode 100644
index 0000000000..aad07fedf7
--- /dev/null
+++ b/tests/workloads/dispatch_0_1/MI300X_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,60633,1,965699,965699,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716295853072008,716295853087727,0
+2,60633,1,965699,965699,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716295853110167,716295853124005,0
+3,60633,1,965699,965699,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716295853144605,716295853158404,0
diff --git a/tests/workloads/dispatch_2/MI300A_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/dispatch_2/MI300A_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..93827f12fd
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300A_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,11995,1,146027,146027,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73646370067592,73646370075364,0,205597.0,205597.0,16384.0,65536.0,28177.0,2243556.0
+1,11995,1,146027,146027,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73646370113222,73646370119351,0,203828.0,203828.0,16384.0,65536.0,13020.0,1048748.0
+2,11995,1,146027,146027,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73646370091949,73646370098199,0,173664.0,173664.0,16384.0,65536.0,13143.0,1049300.0
diff --git a/tests/workloads/dispatch_2/MI300A_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/dispatch_2/MI300A_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..e5d16b3ed1
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300A_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,11995,1,146039,146039,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73646370067592,73646370075364,0,0.0,0.0,0.0
+1,11995,1,146039,146039,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73646370113222,73646370119351,0,0.0,0.0,0.0
+2,11995,1,146039,146039,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73646370091949,73646370098199,0,0.0,0.0,0.0
diff --git a/tests/workloads/dispatch_2/MI300A_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/dispatch_2/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..3d718c6f38
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,146051,146051,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73646370067592,73646370075364,0,65536.0,354418.0,28284424.0
+1,11995,1,146051,146051,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73646370113222,73646370119351,0,65536.0,313544.0,25075912.0
+2,11995,1,146051,146051,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73646370091949,73646370098199,0,65536.0,204760.0,16360664.0
diff --git a/tests/workloads/dispatch_2/MI300A_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/dispatch_2/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..bdb6d49ddf
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,146063,146063,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73646370067592,73646370075364,0,32768.0,523237.0,41854716.0
+1,11995,1,146063,146063,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73646370113222,73646370119351,0,32768.0,412345.0,32985768.0
+2,11995,1,146063,146063,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73646370091949,73646370098199,0,32768.0,413603.0,33086332.0
diff --git a/tests/workloads/dispatch_2/MI300A_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/dispatch_2/MI300A_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..31b25f3fd4
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300A_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,11995,1,146075,146075,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73646370067592,73646370075364,0,207757.0,207757.0,113371.0,831028.0,16384.0,13995408.0,250575.0,0.0,56383412.0
+1,11995,1,146075,146075,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73646370113222,73646370119351,0,176985.0,176985.0,95417.0,707940.0,16384.0,10673662.0,197120.0,0.0,43079648.0
+2,11995,1,146075,146075,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73646370091949,73646370098199,0,186914.0,186914.0,105051.0,747656.0,16384.0,10577047.0,196398.0,0.0,42695668.0
diff --git a/tests/workloads/dispatch_2/MI300A_A1/log.txt b/tests/workloads/dispatch_2/MI300A_A1/log.txt
new file mode 100644
index 0000000000..03ac74a1a9
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300A_A1/log.txt
@@ -0,0 +1,267 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/dispatch_2/MI300A_A1
+Target: MI300A_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: ['1']
+Hardware Blocks: All
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LEVEL_WAVES
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_CVT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_WR
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_RD
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F16
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_HITS
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES_DUPLICATE
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_1
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_13.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[0]
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_14.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[1]
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_15.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[1]
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_16.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[3]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[3]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[3]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[3]
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_17.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[2]
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F64
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_VOLATILE_sum
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_GDS
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_VALU
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_SCA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_MISC
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_FLAT
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_THREAD_CYCLES_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_BF16
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_INST_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_READ_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_WRITE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_PENDING_STALL_CYCLES_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying the output vector from the GPU to the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Releasing GPU memory
+   |-> [/opt/rocm/bin/rocprofv2] Releasing CPU memory
+   |-> [/opt/rocm/bin/rocprofv2] Results File: "tests/workloads/dispatch_2/MI300A_A1/out/pmc_1/results_pmc_perf_9.csv"
+   |-> [/opt/rocm/bin/rocprofv2] 
+   |-> [/opt/rocm/bin/rocprofv2] The output path for the following counters: tests/workloads/dispatch_2/MI300A_A1/out/pmc_1
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300A_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/dispatch_2/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/dispatch_2/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..5faaf09cd3
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/dispatch_2/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..a26158b25b
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/dispatch_2/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..fb7520df1b
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/dispatch_2/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..32d63ae2d9
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/dispatch_2/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..48c0dcc3d7
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_0.txt b/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..ec34d536df
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD GRBM_COUNT GRBM_GUI_ACTIVE TCP_GATE_EN1_sum TCP_GATE_EN2_sum TCP_TD_TCP_STALL_CYCLES_sum TCP_TCR_TCP_STALL_CYCLES_sum TA_TA_BUSY_sum TA_BUFFER_WAVEFRONTS_sum TD_TD_BUSY_sum TD_TC_STALL_sum SPI_CSN_WINDOW_VALID SPI_CSN_BUSY CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE CPF_CPF_STAT_BUSY CPF_CPF_STAT_STALL TCC_CYCLE_sum TCC_BUSY_sum TCC_PROBE_sum TCC_PROBE_ALL_sum
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_1.txt b/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..432979b162
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 GRBM_SPI_BUSY TCP_READ_TAGCONFLICT_STALL_CYCLES_sum TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum TCP_TA_TCP_STATE_READ_sum TA_BUFFER_READ_WAVEFRONTS_sum TA_BUFFER_WRITE_WAVEFRONTS_sum TD_SPI_STALL_sum TD_LOAD_WAVEFRONT_sum SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE CPC_CPC_TCIU_BUSY CPC_CPC_TCIU_IDLE CPF_CPF_TCIU_BUSY CPF_CPF_TCIU_STALL TCC_NC_REQ_sum TCC_UC_REQ_sum TCC_CC_REQ_sum TCC_RW_REQ_sum
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_10.txt b/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..e4b7ff8c09
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_11.txt b/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..c82db92f00
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_12.txt b/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..8958f384e1
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_13.txt b/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_13.txt
new file mode 100644
index 0000000000..55ecc49c6f
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_13.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_ATOMIC[0] TCC_BUBBLE[0] TCC_CYCLE[0] TCC_EA0_ATOMIC[0] TCC_ATOMIC[1] TCC_BUBBLE[1] TCC_CYCLE[1] TCC_EA0_ATOMIC[1] TCC_ATOMIC[2] TCC_BUBBLE[2] TCC_CYCLE[2] TCC_EA0_ATOMIC[2] TCC_ATOMIC[3] TCC_BUBBLE[3] TCC_CYCLE[3] TCC_EA0_ATOMIC[3] TCC_ATOMIC[4] TCC_BUBBLE[4] TCC_CYCLE[4] TCC_EA0_ATOMIC[4] TCC_ATOMIC[5] TCC_BUBBLE[5] TCC_CYCLE[5] TCC_EA0_ATOMIC[5] TCC_ATOMIC[6] TCC_BUBBLE[6] TCC_CYCLE[6] TCC_EA0_ATOMIC[6] TCC_ATOMIC[7] TCC_BUBBLE[7] TCC_CYCLE[7] TCC_EA0_ATOMIC[7] TCC_ATOMIC[8] TCC_BUBBLE[8] TCC_CYCLE[8] TCC_EA0_ATOMIC[8] TCC_ATOMIC[9] TCC_BUBBLE[9] TCC_CYCLE[9] TCC_EA0_ATOMIC[9] TCC_ATOMIC[10] TCC_BUBBLE[10] TCC_CYCLE[10] TCC_EA0_ATOMIC[10] TCC_ATOMIC[11] TCC_BUBBLE[11] TCC_CYCLE[11] TCC_EA0_ATOMIC[11] TCC_ATOMIC[12] TCC_BUBBLE[12] TCC_CYCLE[12] TCC_EA0_ATOMIC[12] TCC_ATOMIC[13] TCC_BUBBLE[13] TCC_CYCLE[13] TCC_EA0_ATOMIC[13] TCC_ATOMIC[14] TCC_BUBBLE[14] TCC_CYCLE[14] TCC_EA0_ATOMIC[14] TCC_ATOMIC[15] TCC_BUBBLE[15] TCC_CYCLE[15] TCC_EA0_ATOMIC[15]
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_14.txt b/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_14.txt
new file mode 100644
index 0000000000..8586bd2da4
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_14.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_ATOMIC_LEVEL[0] TCC_EA0_RDREQ[0] TCC_EA0_RDREQ_32B[0] TCC_EA0_RDREQ_LEVEL[0] TCC_EA0_ATOMIC_LEVEL[1] TCC_EA0_RDREQ[1] TCC_EA0_RDREQ_32B[1] TCC_EA0_RDREQ_LEVEL[1] TCC_EA0_ATOMIC_LEVEL[2] TCC_EA0_RDREQ[2] TCC_EA0_RDREQ_32B[2] TCC_EA0_RDREQ_LEVEL[2] TCC_EA0_ATOMIC_LEVEL[3] TCC_EA0_RDREQ[3] TCC_EA0_RDREQ_32B[3] TCC_EA0_RDREQ_LEVEL[3] TCC_EA0_ATOMIC_LEVEL[4] TCC_EA0_RDREQ[4] TCC_EA0_RDREQ_32B[4] TCC_EA0_RDREQ_LEVEL[4] TCC_EA0_ATOMIC_LEVEL[5] TCC_EA0_RDREQ[5] TCC_EA0_RDREQ_32B[5] TCC_EA0_RDREQ_LEVEL[5] TCC_EA0_ATOMIC_LEVEL[6] TCC_EA0_RDREQ[6] TCC_EA0_RDREQ_32B[6] TCC_EA0_RDREQ_LEVEL[6] TCC_EA0_ATOMIC_LEVEL[7] TCC_EA0_RDREQ[7] TCC_EA0_RDREQ_32B[7] TCC_EA0_RDREQ_LEVEL[7] TCC_EA0_ATOMIC_LEVEL[8] TCC_EA0_RDREQ[8] TCC_EA0_RDREQ_32B[8] TCC_EA0_RDREQ_LEVEL[8] TCC_EA0_ATOMIC_LEVEL[9] TCC_EA0_RDREQ[9] TCC_EA0_RDREQ_32B[9] TCC_EA0_RDREQ_LEVEL[9] TCC_EA0_ATOMIC_LEVEL[10] TCC_EA0_RDREQ[10] TCC_EA0_RDREQ_32B[10] TCC_EA0_RDREQ_LEVEL[10] TCC_EA0_ATOMIC_LEVEL[11] TCC_EA0_RDREQ[11] TCC_EA0_RDREQ_32B[11] TCC_EA0_RDREQ_LEVEL[11] TCC_EA0_ATOMIC_LEVEL[12] TCC_EA0_RDREQ[12] TCC_EA0_RDREQ_32B[12] TCC_EA0_RDREQ_LEVEL[12] TCC_EA0_ATOMIC_LEVEL[13] TCC_EA0_RDREQ[13] TCC_EA0_RDREQ_32B[13] TCC_EA0_RDREQ_LEVEL[13] TCC_EA0_ATOMIC_LEVEL[14] TCC_EA0_RDREQ[14] TCC_EA0_RDREQ_32B[14] TCC_EA0_RDREQ_LEVEL[14] TCC_EA0_ATOMIC_LEVEL[15] TCC_EA0_RDREQ[15] TCC_EA0_RDREQ_32B[15] TCC_EA0_RDREQ_LEVEL[15]
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_15.txt b/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_15.txt
new file mode 100644
index 0000000000..0efbb2a909
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_15.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_WRREQ[0] TCC_EA0_WRREQ_64B[0] TCC_EA0_WRREQ_LEVEL[0] TCC_HIT[0] TCC_EA0_WRREQ[1] TCC_EA0_WRREQ_64B[1] TCC_EA0_WRREQ_LEVEL[1] TCC_HIT[1] TCC_EA0_WRREQ[2] TCC_EA0_WRREQ_64B[2] TCC_EA0_WRREQ_LEVEL[2] TCC_HIT[2] TCC_EA0_WRREQ[3] TCC_EA0_WRREQ_64B[3] TCC_EA0_WRREQ_LEVEL[3] TCC_HIT[3] TCC_EA0_WRREQ[4] TCC_EA0_WRREQ_64B[4] TCC_EA0_WRREQ_LEVEL[4] TCC_HIT[4] TCC_EA0_WRREQ[5] TCC_EA0_WRREQ_64B[5] TCC_EA0_WRREQ_LEVEL[5] TCC_HIT[5] TCC_EA0_WRREQ[6] TCC_EA0_WRREQ_64B[6] TCC_EA0_WRREQ_LEVEL[6] TCC_HIT[6] TCC_EA0_WRREQ[7] TCC_EA0_WRREQ_64B[7] TCC_EA0_WRREQ_LEVEL[7] TCC_HIT[7] TCC_EA0_WRREQ[8] TCC_EA0_WRREQ_64B[8] TCC_EA0_WRREQ_LEVEL[8] TCC_HIT[8] TCC_EA0_WRREQ[9] TCC_EA0_WRREQ_64B[9] TCC_EA0_WRREQ_LEVEL[9] TCC_HIT[9] TCC_EA0_WRREQ[10] TCC_EA0_WRREQ_64B[10] TCC_EA0_WRREQ_LEVEL[10] TCC_HIT[10] TCC_EA0_WRREQ[11] TCC_EA0_WRREQ_64B[11] TCC_EA0_WRREQ_LEVEL[11] TCC_HIT[11] TCC_EA0_WRREQ[12] TCC_EA0_WRREQ_64B[12] TCC_EA0_WRREQ_LEVEL[12] TCC_HIT[12] TCC_EA0_WRREQ[13] TCC_EA0_WRREQ_64B[13] TCC_EA0_WRREQ_LEVEL[13] TCC_HIT[13] TCC_EA0_WRREQ[14] TCC_EA0_WRREQ_64B[14] TCC_EA0_WRREQ_LEVEL[14] TCC_HIT[14] TCC_EA0_WRREQ[15] TCC_EA0_WRREQ_64B[15] TCC_EA0_WRREQ_LEVEL[15] TCC_HIT[15]
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_16.txt b/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_16.txt
new file mode 100644
index 0000000000..988080d3aa
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_16.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_MISS[0] TCC_READ[0] TCC_REQ[0] TCC_RW_REQ[0] TCC_MISS[1] TCC_READ[1] TCC_REQ[1] TCC_RW_REQ[1] TCC_MISS[2] TCC_READ[2] TCC_REQ[2] TCC_RW_REQ[2] TCC_MISS[3] TCC_READ[3] TCC_REQ[3] TCC_RW_REQ[3] TCC_MISS[4] TCC_READ[4] TCC_REQ[4] TCC_RW_REQ[4] TCC_MISS[5] TCC_READ[5] TCC_REQ[5] TCC_RW_REQ[5] TCC_MISS[6] TCC_READ[6] TCC_REQ[6] TCC_RW_REQ[6] TCC_MISS[7] TCC_READ[7] TCC_REQ[7] TCC_RW_REQ[7] TCC_MISS[8] TCC_READ[8] TCC_REQ[8] TCC_RW_REQ[8] TCC_MISS[9] TCC_READ[9] TCC_REQ[9] TCC_RW_REQ[9] TCC_MISS[10] TCC_READ[10] TCC_REQ[10] TCC_RW_REQ[10] TCC_MISS[11] TCC_READ[11] TCC_REQ[11] TCC_RW_REQ[11] TCC_MISS[12] TCC_READ[12] TCC_REQ[12] TCC_RW_REQ[12] TCC_MISS[13] TCC_READ[13] TCC_REQ[13] TCC_RW_REQ[13] TCC_MISS[14] TCC_READ[14] TCC_REQ[14] TCC_RW_REQ[14] TCC_MISS[15] TCC_READ[15] TCC_REQ[15] TCC_RW_REQ[15]
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_17.txt b/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_17.txt
new file mode 100644
index 0000000000..8e8580232f
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_17.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_TAG_STALL[0] TCC_TOO_MANY_EA_WRREQS_STALL[0] TCC_WRITE[0] TCC_TAG_STALL[1] TCC_TOO_MANY_EA_WRREQS_STALL[1] TCC_WRITE[1] TCC_TAG_STALL[2] TCC_TOO_MANY_EA_WRREQS_STALL[2] TCC_WRITE[2] TCC_TAG_STALL[3] TCC_TOO_MANY_EA_WRREQS_STALL[3] TCC_WRITE[3] TCC_TAG_STALL[4] TCC_TOO_MANY_EA_WRREQS_STALL[4] TCC_WRITE[4] TCC_TAG_STALL[5] TCC_TOO_MANY_EA_WRREQS_STALL[5] TCC_WRITE[5] TCC_TAG_STALL[6] TCC_TOO_MANY_EA_WRREQS_STALL[6] TCC_WRITE[6] TCC_TAG_STALL[7] TCC_TOO_MANY_EA_WRREQS_STALL[7] TCC_WRITE[7] TCC_TAG_STALL[8] TCC_TOO_MANY_EA_WRREQS_STALL[8] TCC_WRITE[8] TCC_TAG_STALL[9] TCC_TOO_MANY_EA_WRREQS_STALL[9] TCC_WRITE[9] TCC_TAG_STALL[10] TCC_TOO_MANY_EA_WRREQS_STALL[10] TCC_WRITE[10] TCC_TAG_STALL[11] TCC_TOO_MANY_EA_WRREQS_STALL[11] TCC_WRITE[11] TCC_TAG_STALL[12] TCC_TOO_MANY_EA_WRREQS_STALL[12] TCC_WRITE[12] TCC_TAG_STALL[13] TCC_TOO_MANY_EA_WRREQS_STALL[13] TCC_WRITE[13] TCC_TAG_STALL[14] TCC_TOO_MANY_EA_WRREQS_STALL[14] TCC_WRITE[14] TCC_TAG_STALL[15] TCC_TOO_MANY_EA_WRREQS_STALL[15] TCC_WRITE[15]
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_2.txt b/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..e9eb9b6eef
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 TCP_VOLATILE_sum TCP_TOTAL_ACCESSES_sum TCP_TOTAL_READ_sum TCP_TOTAL_WRITE_sum TA_BUFFER_ATOMIC_WAVEFRONTS_sum TA_BUFFER_TOTAL_CYCLES_sum TD_ATOMIC_WAVEFRONT_sum TD_STORE_WAVEFRONT_sum SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION CPF_CPF_STAT_IDLE CPF_CPF_TCIU_IDLE TCC_REQ_sum TCC_STREAMING_REQ_sum TCC_HIT_sum TCC_MISS_sum
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_3.txt b/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..dcc705ca99
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS TCP_TOTAL_ATOMIC_WITH_RET_sum TCP_TOTAL_ATOMIC_WITHOUT_RET_sum TCP_TOTAL_WRITEBACK_INVALIDATES_sum TCP_TOTAL_CACHE_ACCESSES_sum TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES_sum TD_COALESCABLE_WAVEFRONT_sum SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE CPF_CMP_UTCL1_STALL_ON_TRANSLATION TCC_READ_sum TCC_WRITE_sum TCC_ATOMIC_sum TCC_WRITEBACK_sum
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_4.txt b/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..c0fa59f6bc
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAIT_ANY SQ_WAIT_INST_ANY SQ_ACTIVE_INST_ANY SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU TCP_UTCL1_TRANSLATION_MISS_sum TCP_UTCL1_TRANSLATION_HIT_sum TCP_UTCL1_PERMISSION_MISS_sum TCP_UTCL1_REQUEST_sum TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_TOTAL_WAVEFRONTS_sum SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE TCC_EA0_WRREQ_sum TCC_EA0_WRREQ_64B_sum TCC_EA0_WR_UNCACHED_32B_sum TCC_EA0_WRREQ_DRAM_sum
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_5.txt b/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..da1b4af3cd
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_SCA SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU TCP_TCC_READ_REQ_sum TCP_TCC_WRITE_REQ_sum TCP_TCC_ATOMIC_WITH_RET_REQ_sum TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN CPC_ME1_DC0_SPI_BUSY TCC_EA0_RDREQ_sum TCC_EA0_RDREQ_32B_sum TCC_BUBBLE_sum TCC_EA0_RD_UNCACHED_32B_sum
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_6.txt b/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..49b8ee5dc9
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_THREAD_CYCLES_VALU SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 TCP_TCC_NC_READ_REQ_sum TCP_TCC_NC_WRITE_REQ_sum TCP_TCC_NC_ATOMIC_REQ_sum TCP_TCC_UC_READ_REQ_sum TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN TCC_EA0_RDREQ_DRAM_sum TCC_TAG_STALL_sum TCC_NORMAL_WRITEBACK_sum TCC_ALL_TC_OP_WB_WRITEBACK_sum
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_7.txt b/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..53e4081ae1
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED TCP_TCC_UC_WRITE_REQ_sum TCP_TCC_UC_ATOMIC_REQ_sum TCP_TCC_CC_READ_REQ_sum TCP_TCC_CC_WRITE_REQ_sum TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR TCC_NORMAL_EVICT_sum TCC_ALL_TC_OP_INV_EVICT_sum TCC_TOO_MANY_EA_WRREQS_STALL_sum TCC_EA0_ATOMIC_sum
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_8.txt b/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..939b7aa92b
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES TCP_TCC_CC_ATOMIC_REQ_sum TCP_TCC_RW_READ_REQ_sum TCP_TCC_RW_WRITE_REQ_sum TCP_TCC_RW_ATOMIC_REQ_sum SPI_VWC_CSC_WR SPI_RA_BULKY_CU_FULL_CSN TCC_EA0_RDREQ_LEVEL_sum TCC_EA0_WRREQ_LEVEL_sum TCC_EA0_ATOMIC_LEVEL_sum TCC_EA0_WRREQ_STALL_sum
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_9.txt b/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..8995853835
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300A_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ TCP_PENDING_STALL_CYCLES_sum
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300A_A1/perfmon/timestamps.txt b/tests/workloads/dispatch_2/MI300A_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..755f2b7b20
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300A_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300A_A1/pmc_perf.csv b/tests/workloads/dispatch_2/MI300A_A1/pmc_perf.csv
new file mode 100644
index 0000000000..b4d4d8d9fc
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300A_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
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CED_WRITE_CYCLES_sum,TCC_ATOMIC_sum,TCC_READ_sum,TCC_WRITEBACK_sum,TCC_WRITE_sum,TCP_TOTAL_ATOMIC_WITHOUT_RET_sum,TCP_TOTAL_ATOMIC_WITH_RET_sum,TCP_TOTAL_CACHE_ACCESSES_sum,TCP_TOTAL_WRITEBACK_INVALIDATES_sum,TD_COALESCABLE_WAVEFRONT_sum,Wave_Size_5,Correlation_ID_5,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,TA_FLAT_ATOMIC_WAVEFRONTS_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,TCC_ALL_TC_OP_INV_EVICT_sum,TCC_EA0_ATOMIC_sum,TCC_NORMAL_EVICT_sum,TCC_TOO_MANY_EA_WRREQS_STALL_sum,TCP_TCC_CC_READ_REQ_sum,TCP_TCC_CC_WRITE_REQ_sum,TCP_TCC_UC_ATOMIC_REQ_sum,TCP_TCC_UC_WRITE_REQ_sum,Wave_Size_6,Correlation_ID_6,XCC_Index_6,TCC_MISS[0],TCC_READ[0],TCC_REQ[0],TCC_RW_REQ[0],TCC_MISS[1],TCC_READ[1],TCC_REQ[1],TCC_RW_REQ[1],TCC_MISS[2],TCC_READ[2],TCC_REQ[2],TCC_RW_REQ[2],TCC_MISS[3],TCC_READ[3],TCC_REQ[3],TCC_RW_REQ[3],TCC_MISS[4],TCC_READ[4],TCC_REQ[4],TCC_RW_REQ[4],TCC_MISS[5],TCC_READ[5],TCC_REQ[5],TCC_RW_REQ[5],TCC_MISS[6],TCC_READ[6],TCC_REQ[6],TCC_RW_REQ[6],TCC_MISS[7],TCC_READ[7],TCC_REQ[7],TCC_RW_REQ[7],TCC_MISS[8],TCC_READ[8],TCC_REQ[8],TCC_RW_REQ[8],TCC_MISS[9],TCC_READ[9],TCC_REQ[9],TCC_RW_REQ[9],TCC_MISS[10],TCC_READ[10],TCC_REQ[10],TCC_RW_REQ[10],TCC_MISS[11],TCC_READ[11],TCC_REQ[11],TCC_RW_REQ[11],TCC_MISS[12],TCC_READ[12],TCC_REQ[12],TCC_RW_REQ[12],TCC_MISS[13],TCC_READ[13],TCC_REQ[13],TCC_RW_REQ[13],TCC_MISS[14],TCC_READ[14],TCC_REQ[14],TCC_RW_REQ[14],TCC_MISS[15],TCC_READ[15],TCC_REQ[15],TCC_RW_REQ[15],TCC_MISS[16],TCC_READ[16],TCC_REQ[16],TCC_RW_REQ[16],TCC_MISS[17],TCC_READ[17],TCC_REQ[17],TCC_RW_REQ[17],TCC_MISS[18],TCC_READ[18],TCC_REQ[18],TCC_RW_REQ[18],TCC_MISS[19],TCC_READ[19],TCC_REQ[19],TCC_RW_REQ[19],TCC_MISS[20],TCC_READ[20],TCC_REQ[20],TCC_RW_REQ[20],TCC_MISS[21],TCC_READ[21],TCC_REQ[21],TCC_RW_REQ[21],TCC_MISS[22],TCC_READ[22],TCC_REQ[22],TCC_RW_REQ[22],TCC_MISS[23],TCC_READ[23],TCC_REQ[23],TCC_RW_REQ[23],TCC_MISS[24],TCC_READ[24],TCC_REQ[24],TCC_RW_REQ[24],TCC_MISS[25],TCC_READ[25],TCC_REQ[25],TCC_RW_REQ[25],TCC_MISS[26],TCC_READ[26],TCC_REQ[26],TCC_RW_REQ[26],TCC_MISS[27],TCC_READ[27],TCC_REQ[27],TCC_RW_REQ[27],TCC_MISS[28],TCC_READ[28],TCC_REQ[28],TCC_RW_REQ[28],TCC_MISS[29],TCC_READ[29],TCC_REQ[29],TCC_RW_REQ[29],TCC_MISS[30],TCC_READ[30],TCC_REQ[30],TCC_RW_REQ[30],TCC_MISS[31],TCC_READ[31],TCC_REQ[31],TCC_RW_REQ[31],TCC_MISS[32],TCC_READ[32],TCC_REQ[32],TCC_RW_REQ[32],TCC_MISS[33],TCC_READ[33],TCC_REQ[33],TCC_RW_REQ[33],TCC_MISS[34],TCC_READ[34],TCC_REQ[34],TCC_RW_REQ[34],TCC_MISS[35],TCC_READ[35],TCC_REQ[35],TCC_RW_REQ[35],TCC_MISS[36],TCC_READ[36],TCC_REQ[36],TCC_RW_REQ[36],TCC_MISS[37],TCC_READ[37],TCC_REQ[37],TCC_RW_REQ[37],TCC_MISS[38],TCC_READ[38],TCC_REQ[38],TCC_RW_REQ[38],TCC_MISS[39],TCC_READ[39],TCC_REQ[39],TCC_RW_REQ[39],TCC_MISS[40],TCC_READ[40],TCC_REQ[40],TCC_RW_REQ[40],TCC_MISS[41],TCC_READ[41],TCC_REQ[41],TCC_RW_REQ[41],TCC_MISS[42],TCC_READ[42],TCC_REQ[42],TCC_RW_REQ[42],TCC_MISS[43],TCC_READ[43],TCC_REQ[43],TCC_RW_REQ[43],TCC_MISS[44],TCC_READ[44],TCC_REQ[44],TCC_RW_REQ[44],TCC_MISS[45],TCC_READ[45],TCC_REQ[45],TCC_RW_REQ[45],TCC_MISS[46],TCC_READ[46],TCC_REQ[46],TCC_RW_REQ[46],TCC_MISS[47],TCC_READ[47],TCC_REQ[47],TCC_RW_REQ[47],TCC_MISS[48],TCC_READ[48],TCC_REQ[48],TCC_RW_REQ[48],TCC_MISS[49],TCC_READ[49],TCC_REQ[49],TCC_RW_REQ[49],TCC_MISS[50],TCC_READ[50],TCC_REQ[50],TCC_RW_REQ[50],TCC_MISS[51],TCC_READ[51],TCC_REQ[51],TCC_RW_REQ[51],TCC_MISS[52],TCC_READ[52],TCC_REQ[52],TCC_RW_REQ[52],TCC_MISS[53],TCC_READ[53],TCC_REQ[53],TCC_RW_REQ[53],TCC_MISS[54],TCC_READ[54],TCC_REQ[54],TCC_RW_REQ[54],TCC_MISS[55],TCC_READ[55],TCC_REQ[55],TCC_RW_REQ[55],TCC_MISS[56],TCC_READ[56],TCC_REQ[56],TCC_RW_REQ[56],TCC_MISS[57],TCC_READ[57],TCC_REQ[57],TCC_RW_REQ[57],TCC_MISS[58],TCC_READ[58],TCC_REQ[58],TCC_RW_REQ[58],TCC_MISS[59],TCC_READ[59],TCC_REQ[59],TCC_RW_REQ[59],TCC_MISS[60],TCC_READ[60],TCC_REQ[60],TCC_RW_REQ[60],TCC_MISS[61],TCC_READ[61],TCC_REQ[61],TCC_RW_REQ[61],TCC_MISS[62],TCC_READ[62],TCC_REQ[62],TCC_RW_REQ[62],TCC_MISS[63],TCC_READ[63],TCC_REQ[63],TCC_RW_REQ[63],TCC_MISS[64],TCC_READ[64],TCC_REQ[64],TCC_RW_REQ[64],TCC_MISS[65],TCC_READ[65],TCC_REQ[65],TCC_RW_REQ[65],TCC_MISS[66],TCC_READ[66],TCC_REQ[66],TCC_RW_REQ[66],TCC_MISS[67],TCC_READ[67],TCC_REQ[67],TCC_RW_REQ[67],TCC_MISS[68],TCC_READ[68],TCC_REQ[68],TCC_RW_REQ[68],TCC_MISS[69],TCC_READ[69],TCC_REQ[69],TCC_RW_REQ[69],TCC_MISS[70],TCC_READ[70],TCC_REQ[70],TCC_RW_REQ[70],TCC_MISS[71],TCC_READ[71],TCC_REQ[71],TCC_RW_REQ[71],TCC_MISS[72],TCC_READ[72],TCC_REQ[72],TCC_RW_REQ[72],TCC_MISS[73],TCC_READ[73],TCC_REQ[73],TCC_RW_REQ[73],TCC_MISS[74],TCC_READ[74],TCC_REQ[74],TCC_RW_REQ[74],TCC_MISS[75],TCC_READ[75],TCC_REQ[75],TCC_RW_REQ[75],TCC_MISS[76],TCC_READ[76],TCC_REQ[76],TCC_RW_REQ[76],TCC_MISS[77],TCC_READ[77],TCC_REQ[77],TCC_RW_REQ[77],TCC_MISS[78],TCC_READ[78],TCC_REQ[78],TCC_RW_REQ[78],TCC_MISS[79],TCC_READ[79],TCC_REQ[79],TCC_RW_REQ[79],TCC_MISS[80],TCC_READ[80],TCC_REQ[80],TCC_RW_REQ[80],TCC_MISS[81],TCC_READ[81],TCC_REQ[81],TCC_RW_REQ[81],TCC_MISS[82],TCC_READ[82],TCC_REQ[82],TCC_RW_REQ[82],TCC_MISS[83],TCC_READ[83],TCC_REQ[83],TCC_RW_REQ[83],TCC_MISS[84],TCC_READ[84],TCC_REQ[84],TCC_RW_REQ[84],TCC_MISS[85],TCC_READ[85],TCC_REQ[85],TCC_RW_REQ[85],TCC_MISS[86],TCC_READ[86],TCC_REQ[86],TCC_RW_REQ[86],TCC_MISS[87],TCC_READ[87],TCC_REQ[87],TCC_RW_REQ[87],TCC_MISS[88],TCC_READ[88],TCC_REQ[88],TCC_RW_REQ[88],TCC_MISS[89],TCC_READ[89],TCC_REQ[89],TCC_RW_REQ[89],TCC_MISS[90],TCC_READ[90],TCC_REQ[90],TCC_RW_REQ[90],TCC_MISS[91],TCC_READ[91],TCC_REQ[91],TCC_RW_REQ[91],TCC_MISS[92],TCC_READ[92],TCC_REQ[92],TCC_RW_REQ[92],TCC_MISS[93],TCC_READ[93],TCC_REQ[93],TCC_RW_REQ[93],TCC_MISS[94],TCC_READ[94],TCC_REQ[94],TCC_RW_REQ[94],TCC_MISS[95],TCC_READ[95],TCC_REQ[95],TCC_RW_REQ[95],Wave_Size_7,Correlation_ID_7,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SPI_RA_REQ_NO_ALLOC,SPI_RA_REQ_NO_ALLOC_CSN,CPC_CPC_STAT_STALL,CPC_UTCL1_STALL_ON_TRANSLATION,CPF_CPF_STAT_IDLE,CPF_CPF_TCIU_IDLE,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,TA_BUFFER_TOTAL_CYCLES_sum,TCC_HIT_sum,TCC_MISS_sum,TCC_REQ_sum,TCC_STREAMING_REQ_sum,TCP_TOTAL_ACCESSES_sum,TCP_TOTAL_READ_sum,TCP_TOTAL_WRITE_sum,TCP_VOLATILE_sum,TD_ATOMIC_WAVEFRONT_sum,TD_STORE_WAVEFRONT_sum,Wave_Size_8,Correlation_ID_8,XCC_Index_8,TCC_ATOMIC[0],TCC_BUBBLE[0],TCC_CYCLE[0],TCC_EA0_ATOMIC[0],TCC_ATOMIC[1],TCC_BUBBLE[1],TCC_CYCLE[1],TCC_EA0_ATOMIC[1],TCC_ATOMIC[2],TCC_BUBBLE[2],TCC_CYCLE[2],TCC_EA0_ATOMIC[2],TCC_ATOMIC[3],TCC_BUBBLE[3],TCC_CYCLE[3],TCC_EA0_ATOMIC[3],TCC_ATOMIC[4],TCC_BUBBLE[4],TCC_CYCLE[4],TCC_EA0_ATOMIC[4],TCC_ATOMIC[5],TCC_BUBBLE[5],TCC_CYCLE[5],TCC_EA0_ATOMIC[5],TCC_ATOMIC[6],TCC_BUBBLE[6],TCC_CYCLE[6],TCC_EA0_ATOMIC[6],TCC_ATOMIC[7],TCC_BUBBLE[7],TCC_CYCLE[7],TCC_EA0_ATOMIC[7],TCC_ATOMIC[8],TCC_BUBBLE[8],TCC_CYCLE[8],TCC_EA0_ATOMIC[8],TCC_ATOMIC[9],TCC_BUBBLE[9],TCC_CYCLE[9],TCC_EA0_ATOMIC[9],TCC_ATOMIC[10],TCC_BUBBLE[10],TCC_CYCLE[10],TCC_EA0_ATOMIC[10],TCC_ATOMIC[11],TCC_BUBBLE[11],TCC_CYCLE[11],TCC_EA0_ATOMIC[11],TCC_ATOMIC[12],TCC_BUBBLE[12],TCC_CYCLE[12],TCC_EA0_ATOMIC[12],TCC_ATOMIC[13],TCC_BUBBLE[13],TCC_CYCLE[13],TCC_EA0_ATOMIC[13],TCC_ATOMIC[14],TCC_BUBBLE[14],TCC_CYCLE[14],TCC_EA0_ATOMIC[14],TCC_ATOMIC[15],TCC_BUBBLE[15],TCC_CYCLE[15],TCC_EA0_ATOMIC[15],TCC_ATOMIC[16],TCC_BUBBLE[16],TCC_CYCLE[16],TCC_EA0_ATOMIC[16],TCC_ATOMIC[17],TCC_BUBBLE[17],TCC_CYCLE[17],TCC_EA0_ATOMIC[17],TCC_ATOMIC[18],TCC_BUBBLE[18],TCC_CYCLE[18],TCC_EA0_ATOMIC[18],TCC_ATOMIC[19],TCC_BUBBLE[19],TCC_CYCLE[19],TCC_EA0_ATOMIC[19],TCC_ATOMIC[20],TCC_BUBBLE[20],TCC_CYCLE[20],TCC_EA0_ATOMIC[20],TCC_ATOMIC[21],TCC_BUBBLE[21],TCC_CYCLE[21],TCC_EA0_ATOMIC[21],TCC_ATOMIC[22],TCC_BUBBLE[22],TCC_CYCLE[22],TCC_EA0_ATOMIC[22],TCC_ATOMIC[23],TCC_BUBBLE[23],TCC_CYCLE[23],TCC_EA0_ATOMIC[23],TCC_ATOMIC[24],TCC_BUBBLE[24],TCC_CYCLE[24],TCC_EA0_ATOMIC[24],TCC_ATOMIC[25],TCC_BUBBLE[25],TCC_CYCLE[25],TCC_EA0_ATOMIC[25],TCC_ATOMIC[26],TCC_BUBBLE[26],TCC_CYCLE[26],TCC_EA0_ATOMIC[26],TCC_ATOMIC[27],TCC_BUBBLE[27],TCC_CYCLE[27],TCC_EA0_ATOMIC[27],TCC_ATOMIC[28],TCC_BUBBLE[28],TCC_CYCLE[28],TCC_EA0_ATOMIC[28],TCC_ATOMIC[29],TCC_BUBBLE[29],TCC_CYCLE[29],TCC_EA0_ATOMIC[29],TCC_ATOMIC[30],TCC_BUBBLE[30],TCC_CYCLE[30],TCC_EA0_ATOMIC[30],TCC_ATOMIC[31],TCC_BUBBLE[31],TCC_CYCLE[31],TCC_EA0_ATOMIC[31],TCC_ATOMIC[32],TCC_BUBBLE[32],TCC_CYCLE[32],TCC_EA0_ATOMIC[32],TCC_ATOMIC[33],TCC_BUBBLE[33],TCC_CYCLE[33],TCC_EA0_ATOMIC[33],TCC_ATOMIC[34],TCC_BUBBLE[34],TCC_CYCLE[34],TCC_EA0_ATOMIC[34],TCC_ATOMIC[35],TCC_BUBBLE[35],TCC_CYCLE[35],TCC_EA0_ATOMIC[35],TCC_ATOMIC[36],TCC_BUBBLE[36],TCC_CYCLE[36],TCC_EA0_ATOMIC[36],TCC_ATOMIC[37],TCC_BUBBLE[37],TCC_CYCLE[37],TCC_EA0_ATOMIC[37],TCC_ATOMIC[38],TCC_BUBBLE[38],TCC_CYCLE[38],TCC_EA0_ATOMIC[38],TCC_ATOMIC[39],TCC_BUBBLE[39],TCC_CYCLE[39],TCC_EA0_ATOMIC[39],TCC_ATOMIC[40],TCC_BUBBLE[40],TCC_CYCLE[40],TCC_EA0_ATOMIC[40],TCC_ATOMIC[41],TCC_BUBBLE[41],TCC_CYCLE[41],TCC_EA0_ATOMIC[41],TCC_ATOMIC[42],TCC_BUBBLE[42],TCC_CYCLE[42],TCC_EA0_ATOMIC[42],TCC_ATOMIC[43],TCC_BUBBLE[43],TCC_CYCLE[43],TCC_EA0_ATOMIC[43],TCC_ATOMIC[44],TCC_BUBBLE[44],TCC_CYCLE[44],TCC_EA0_ATOMIC[44],TCC_ATOMIC[45],TCC_BUBBLE[45],TCC_CYCLE[45],TCC_EA0_ATOMIC[45],TCC_ATOMIC[46],TCC_BUBBLE[46],TCC_CYCLE[46],TCC_EA0_ATOMIC[46],TCC_ATOMIC[47],TCC_BUBBLE[47],TCC_CYCLE[47],TCC_EA0_ATOMIC[47],TCC_ATOMIC[48],TCC_BUBBLE[48],TCC_CYCLE[48],TCC_EA0_ATOMIC[48],TCC_ATOMIC[49],TCC_BUBBLE[49],TCC_CYCLE[49],TCC_EA0_ATOMIC[49],TCC_ATOMIC[50],TCC_BUBBLE[50],TCC_CYCLE[50],TCC_EA0_ATOMIC[50],TCC_ATOMIC[51],TCC_BUBBLE[51],TCC_CYCLE[51],TCC_EA0_ATOMIC[51],TCC_ATOMIC[52],TCC_BUBBLE[52],TCC_CYCLE[52],TCC_EA0_ATOMIC[52],TCC_ATOMIC[53],TCC_BUBBLE[53],TCC_CYCLE[53],TCC_EA0_ATOMIC[53],TCC_ATOMIC[54],TCC_BUBBLE[54],TCC_CYCLE[54],TCC_EA0_ATOMIC[54],TCC_ATOMIC[55],TCC_BUBBLE[55],TCC_CYCLE[55],TCC_EA0_ATOMIC[55],TCC_ATOMIC[56],TCC_BUBBLE[56],TCC_CYCLE[56],TCC_EA0_ATOMIC[56],TCC_ATOMIC[57],TCC_BUBBLE[57],TCC_CYCLE[57],TCC_EA0_ATOMIC[57],TCC_ATOMIC[58],TCC_BUBBLE[58],TCC_CYCLE[58],TCC_EA0_ATOMIC[58],TCC_ATOMIC[59],TCC_BUBBLE[59],TCC_CYCLE[59],TCC_EA0_ATOMIC[59],TCC_ATOMIC[60],TCC_BUBBLE[60],TCC_CYCLE[60],TCC_EA0_ATOMIC[60],TCC_ATOMIC[61],TCC_BUBBLE[61],TCC_CYCLE[61],TCC_EA0_ATOMIC[61],TCC_ATOMIC[62],TCC_BUBBLE[62],TCC_CYCLE[62],TCC_EA0_ATOMIC[62],TCC_ATOMIC[63],TCC_BUBBLE[63],TCC_CYCLE[63],TCC_EA0_ATOMIC[63],TCC_ATOMIC[64],TCC_BUBBLE[64],TCC_CYCLE[64],TCC_EA0_ATOMIC[64],TCC_ATOMIC[65],TCC_BUBBLE[65],TCC_CYCLE[65],TCC_EA0_ATOMIC[65],TCC_ATOMIC[66],TCC_BUBBLE[66],TCC_CYCLE[66],TCC_EA0_ATOMIC[66],TCC_ATOMIC[67],TCC_BUBBLE[67],TCC_CYCLE[67],TCC_EA0_ATOMIC[67],TCC_ATOMIC[68],TCC_BUBBLE[68],TCC_CYCLE[68],TCC_EA0_ATOMIC[68],TCC_ATOMIC[69],TCC_BUBBLE[69],TCC_CYCLE[69],TCC_EA0_ATOMIC[69],TCC_ATOMIC[70],TCC_BUBBLE[70],TCC_CYCLE[70],TCC_EA0_ATOMIC[70],TCC_ATOMIC[71],TCC_BUBBLE[71],TCC_CYCLE[71],TCC_EA0_ATOMIC[71],TCC_ATOMIC[72],TCC_BUBBLE[72],TCC_CYCLE[72],TCC_EA0_ATOMIC[72],TCC_ATOMIC[73],TCC_BUBBLE[73],TCC_CYCLE[73],TCC_EA0_ATOMIC[73],TCC_ATOMIC[74],TCC_BUBBLE[74],TCC_CYCLE[74],TCC_EA0_ATOMIC[74],TCC_ATOMIC[75],TCC_BUBBLE[75],TCC_CYCLE[75],TCC_EA0_ATOMIC[75],TCC_ATOMIC[76],TCC_BUBBLE[76],TCC_CYCLE[76],TCC_EA0_ATOMIC[76],TCC_ATOMIC[77],TCC_BUBBLE[77],TCC_CYCLE[77],TCC_EA0_ATOMIC[77],TCC_ATOMIC[78],TCC_BUBBLE[78],TCC_CYCLE[78],TCC_EA0_ATOMIC[78],TCC_ATOMIC[79],TCC_BUBBLE[79],TCC_CYCLE[79],TCC_EA0_ATOMIC[79],TCC_ATOMIC[80],TCC_BUBBLE[80],TCC_CYCLE[80],TCC_EA0_ATOMIC[80],TCC_ATOMIC[81],TCC_BUBBLE[81],TCC_CYCLE[81],TCC_EA0_ATOMIC[81],TCC_ATOMIC[82],TCC_BUBBLE[82],TCC_CYCLE[82],TCC_EA0_ATOMIC[82],TCC_ATOMIC[83],TCC_BUBBLE[83],TCC_CYCLE[83],TCC_EA0_ATOMIC[83],TCC_ATOMIC[84],TCC_BUBBLE[84],TCC_CYCLE[84],TCC_EA0_ATOMIC[84],TCC_ATOMIC[85],TCC_BUBBLE[85],TCC_CYCLE[85],TCC_EA0_ATOMIC[85],TCC_ATOMIC[86],TCC_BUBBLE[86],TCC_CYCLE[86],TCC_EA0_ATOMIC[86],TCC_ATOMIC[87],TCC_BUBBLE[87],TCC_CYCLE[87],TCC_EA0_ATOMIC[87],TCC_ATOMIC[88],TCC_BUBBLE[88],TCC_CYCLE[88],TCC_EA0_ATOMIC[88],TCC_ATOMIC[89],TCC_BUBBLE[89],TCC_CYCLE[89],TCC_EA0_ATOMIC[89],TCC_ATOMIC[90],TCC_BUBBLE[90],TCC_CYCLE[90],TCC_EA0_ATOMIC[90],TCC_ATOMIC[91],TCC_BUBBLE[91],TCC_CYCLE[91],TCC_EA0_ATOMIC[91],TCC_ATOMIC[92],TCC_BUBBLE[92],TCC_CYCLE[92],TCC_EA0_ATOMIC[92],TCC_ATOMIC[93],TCC_BUBBLE[93],TCC_CYCLE[93],TCC_EA0_ATOMIC[93],TCC_ATOMIC[94],TCC_BUBBLE[94],TCC_CYCLE[94],TCC_EA0_ATOMIC[94],TCC_ATOMIC[95],TCC_BUBBLE[95],TCC_CYCLE[95],TCC_EA0_ATOMIC[95],Wave_Size_9,Correlation_ID_9,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_10,Correlation_ID_10,SQC_TC_DATA_ATOMIC_REQ,SQC_TC_STALL,SQC_TC_REQ,SQC_DCACHE_REQ_READ_16,SQC_ICACHE_REQ,SQC_ICACHE_HITS,SQC_ICACHE_MISSES,SQC_ICACHE_MISSES_DUPLICATE,Wave_Size_11,Correlation_ID_11,SQ_INSTS_VALU_MFMA_MOPS_I8,SQ_INSTS_VALU_MFMA_MOPS_F16,SQ_INSTS_VALU_MFMA_MOPS_BF16,SQ_INSTS_VALU_MFMA_MOPS_F32,SQ_INSTS_VALU_MFMA_MOPS_F64,SQC_TC_INST_REQ,SQC_TC_DATA_READ_REQ,SQC_TC_DATA_WRITE_REQ,TCP_PENDING_STALL_CYCLES_sum,Wave_Size_12,Correlation_ID_12,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,TCC_EA0_ATOMIC_LEVEL_sum,TCC_EA0_RDREQ_LEVEL_sum,TCC_EA0_WRREQ_LEVEL_sum,TCC_EA0_WRREQ_STALL_sum,TCP_TCC_CC_ATOMIC_REQ_sum,TCP_TCC_RW_ATOMIC_REQ_sum,TCP_TCC_RW_READ_REQ_sum,TCP_TCC_RW_WRITE_REQ_sum,Wave_Size_13,Correlation_ID_13,SQC_DCACHE_REQ_READ_2,SQC_DCACHE_REQ_READ_4,Wave_Size_14,Correlation_ID_14,SQ_ACTIVE_INST_SCA,SQ_ACTIVE_INST_EXP_GDS,SQ_ACTIVE_INST_MISC,SQ_ACTIVE_INST_FLAT,SQ_INST_CYCLES_VMEM_WR,SQ_INST_CYCLES_VMEM_RD,SQ_INST_CYCLES_SMEM,SQ_INST_CYCLES_SALU,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,CPC_ME1_DC0_SPI_BUSY,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,TCC_BUBBLE_sum,TCC_EA0_RDREQ_32B_sum,TCC_EA0_RDREQ_sum,TCC_EA0_RD_UNCACHED_32B_sum,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,TCP_TCC_READ_REQ_sum,TCP_TCC_WRITE_REQ_sum,Wave_Size_15,Correlation_ID_15,XCC_Index_15,TCC_EA0_ATOMIC_LEVEL[0],TCC_EA0_RDREQ[0],TCC_EA0_RDREQ_32B[0],TCC_EA0_RDREQ_LEVEL[0],TCC_EA0_ATOMIC_LEVEL[1],TCC_EA0_RDREQ[1],TCC_EA0_RDREQ_32B[1],TCC_EA0_RDREQ_LEVEL[1],TCC_EA0_ATOMIC_LEVEL[2],TCC_EA0_RDREQ[2],TCC_EA0_RDREQ_32B[2],TCC_EA0_RDREQ_LEVEL[2],TCC_EA0_ATOMIC_LEVEL[3],TCC_EA0_RDREQ[3],TCC_EA0_RDREQ_32B[3],TCC_EA0_RDREQ_LEVEL[3],TCC_EA0_ATOMIC_LEVEL[4],TCC_EA0_RDREQ[4],TCC_EA0_RDREQ_32B[4],TCC_EA0_RDREQ_LEVEL[4],TCC_EA0_ATOMIC_LEVEL[5],TCC_EA0_RDREQ[5],TCC_EA0_RDREQ_32B[5],TCC_EA0_RDREQ_LEVEL[5],TCC_EA0_ATOMIC_LEVEL[6],TCC_EA0_RDREQ[6],TCC_EA0_RDREQ_32B[6],TCC_EA0_RDREQ_LEVEL[6],TCC_EA0_ATOMIC_LEVEL[7],TCC_EA0_RDREQ[7],TCC_EA0_RDREQ_32B[7],TCC_EA0_RDREQ_LEVEL[7],TCC_EA0_ATOMIC_LEVEL[8],TCC_EA0_RDREQ[8],TCC_EA0_RDREQ_32B[8],TCC_EA0_RDREQ_LEVEL[8],TCC_EA0_ATOMIC_LEVEL[9],TCC_EA0_RDREQ[9],TCC_EA0_RDREQ_32B[9],TCC_EA0_RDREQ_LEVEL[9],TCC_EA0_ATOMIC_LEVEL[10],TCC_EA0_RDREQ[10],TCC_EA0_RDREQ_32B[10],TCC_EA0_RDREQ_LEVEL[10],TCC_EA0_ATOMIC_LEVEL[11],TCC_EA0_RDREQ[11],TCC_EA0_RDREQ_32B[11],TCC_EA0_RDREQ_LEVEL[11],TCC_EA0_ATOMIC_LEVEL[12],TCC_EA0_RDREQ[12],TCC_EA0_RDREQ_32B[12],TCC_EA0_RDREQ_LEVEL[12],TCC_EA0_ATOMIC_LEVEL[13],TCC_EA0_RDREQ[13],TCC_EA0_RDREQ_32B[13],TCC_EA0_RDREQ_LEVEL[13],TCC_EA0_ATOMIC_LEVEL[14],TCC_EA0_RDREQ[14],TCC_EA0_RDREQ_32B[14],TCC_EA0_RDREQ_LEVEL[14],TCC_EA0_ATOMIC_LEVEL[15],TCC_EA0_RDREQ[15],TCC_EA0_RDREQ_32B[15],TCC_EA0_RDREQ_LEVEL[15],TCC_EA0_ATOMIC_LEVEL[16],TCC_EA0_RDREQ[16],TCC_EA0_RDREQ_32B[16],TCC_EA0_RDREQ_LEVEL[16],TCC_EA0_ATOMIC_LEVEL[17],TCC_EA0_RDREQ[17],TCC_EA0_RDREQ_32B[17],TCC_EA0_RDREQ_LEVEL[17],TCC_EA0_ATOMIC_LEVEL[18],TCC_EA0_RDREQ[18],TCC_EA0_RDREQ_32B[18],TCC_EA0_RDREQ_LEVEL[18],TCC_EA0_ATOMIC_LEVEL[19],TCC_EA0_RDREQ[19],TCC_EA0_RDREQ_32B[19],TCC_EA0_RDREQ_LEVEL[19],TCC_EA0_ATOMIC_LEVEL[20],TCC_EA0_RDREQ[20],TCC_EA0_RDREQ_32B[20],TCC_EA0_RDREQ_LEVEL[20],TCC_EA0_ATOMIC_LEVEL[21],TCC_EA0_RDREQ[21],TCC_EA0_RDREQ_32B[21],TCC_EA0_RDREQ_LEVEL[21],TCC_EA0_ATOMIC_LEVEL[22],TCC_EA0_RDREQ[22],TCC_EA0_RDREQ_32B[22],TCC_EA0_RDREQ_LEVEL[22],TCC_EA0_ATOMIC_LEVEL[23],TCC_EA0_RDREQ[23],TCC_EA0_RDREQ_32B[23],TCC_EA0_RDREQ_LEVEL[23],TCC_EA0_ATOMIC_LEVEL[24],TCC_EA0_RDREQ[24],TCC_EA0_RDREQ_32B[24],TCC_EA0_RDREQ_LEVEL[24],TCC_EA0_ATOMIC_LEVEL[25],TCC_EA0_RDREQ[25],TCC_EA0_RDREQ_32B[25],TCC_EA0_RDREQ_LEVEL[25],TCC_EA0_ATOMIC_LEVEL[26],TCC_EA0_RDREQ[26],TCC_EA0_RDREQ_32B[26],TCC_EA0_RDREQ_LEVEL[26],TCC_EA0_ATOMIC_LEVEL[27],TCC_EA0_RDREQ[27],TCC_EA0_RDREQ_32B[27],TCC_EA0_RDREQ_LEVEL[27],TCC_EA0_ATOMIC_LEVEL[28],TCC_EA0_RDREQ[28],TCC_EA0_RDREQ_32B[28],TCC_EA0_RDREQ_LEVEL[28],TCC_EA0_ATOMIC_LEVEL[29],TCC_EA0_RDREQ[29],TCC_EA0_RDREQ_32B[29],TCC_EA0_RDREQ_LEVEL[29],TCC_EA0_ATOMIC_LEVEL[30],TCC_EA0_RDREQ[30],TCC_EA0_RDREQ_32B[30],TCC_EA0_RDREQ_LEVEL[30],TCC_EA0_ATOMIC_LEVEL[31],TCC_EA0_RDREQ[31],TCC_EA0_RDREQ_32B[31],TCC_EA0_RDREQ_LEVEL[31],TCC_EA0_ATOMIC_LEVEL[32],TCC_EA0_RDREQ[32],TCC_EA0_RDREQ_32B[32],TCC_EA0_RDREQ_LEVEL[32],TCC_EA0_ATOMIC_LEVEL[33],TCC_EA0_RDREQ[33],TCC_EA0_RDREQ_32B[33],TCC_EA0_RDREQ_LEVEL[33],TCC_EA0_ATOMIC_LEVEL[34],TCC_EA0_RDREQ[34],TCC_EA0_RDREQ_32B[34],TCC_EA0_RDREQ_LEVEL[34],TCC_EA0_ATOMIC_LEVEL[35],TCC_EA0_RDREQ[35],TCC_EA0_RDREQ_32B[35],TCC_EA0_RDREQ_LEVEL[35],TCC_EA0_ATOMIC_LEVEL[36],TCC_EA0_RDREQ[36],TCC_EA0_RDREQ_32B[36],TCC_EA0_RDREQ_LEVEL[36],TCC_EA0_ATOMIC_LEVEL[37],TCC_EA0_RDREQ[37],TCC_EA0_RDREQ_32B[37],TCC_EA0_RDREQ_LEVEL[37],TCC_EA0_ATOMIC_LEVEL[38],TCC_EA0_RDREQ[38],TCC_EA0_RDREQ_32B[38],TCC_EA0_RDREQ_LEVEL[38],TCC_EA0_ATOMIC_LEVEL[39],TCC_EA0_RDREQ[39],TCC_EA0_RDREQ_32B[39],TCC_EA0_RDREQ_LEVEL[39],TCC_EA0_ATOMIC_LEVEL[40],TCC_EA0_RDREQ[40],TCC_EA0_RDREQ_32B[40],TCC_EA0_RDREQ_LEVEL[40],TCC_EA0_ATOMIC_LEVEL[41],TCC_EA0_RDREQ[41],TCC_EA0_RDREQ_32B[41],TCC_EA0_RDREQ_LEVEL[41],TCC_EA0_ATOMIC_LEVEL[42],TCC_EA0_RDREQ[42],TCC_EA0_RDREQ_32B[42],TCC_EA0_RDREQ_LEVEL[42],TCC_EA0_ATOMIC_LEVEL[43],TCC_EA0_RDREQ[43],TCC_EA0_RDREQ_32B[43],TCC_EA0_RDREQ_LEVEL[43],TCC_EA0_ATOMIC_LEVEL[44],TCC_EA0_RDREQ[44],TCC_EA0_RDREQ_32B[44],TCC_EA0_RDREQ_LEVEL[44],TCC_EA0_ATOMIC_LEVEL[45],TCC_EA0_RDREQ[45],TCC_EA0_RDREQ_32B[45],TCC_EA0_RDREQ_LEVEL[45],TCC_EA0_ATOMIC_LEVEL[46],TCC_EA0_RDREQ[46],TCC_EA0_RDREQ_32B[46],TCC_EA0_RDREQ_LEVEL[46],TCC_EA0_ATOMIC_LEVEL[47],TCC_EA0_RDREQ[47],TCC_EA0_RDREQ_32B[47],TCC_EA0_RDREQ_LEVEL[47],TCC_EA0_ATOMIC_LEVEL[48],TCC_EA0_RDREQ[48],TCC_EA0_RDREQ_32B[48],TCC_EA0_RDREQ_LEVEL[48],TCC_EA0_ATOMIC_LEVEL[49],TCC_EA0_RDREQ[49],TCC_EA0_RDREQ_32B[49],TCC_EA0_RDREQ_LEVEL[49],TCC_EA0_ATOMIC_LEVEL[50],TCC_EA0_RDREQ[50],TCC_EA0_RDREQ_32B[50],TCC_EA0_RDREQ_LEVEL[50],TCC_EA0_ATOMIC_LEVEL[51],TCC_EA0_RDREQ[51],TCC_EA0_RDREQ_32B[51],TCC_EA0_RDREQ_LEVEL[51],TCC_EA0_ATOMIC_LEVEL[52],TCC_EA0_RDREQ[52],TCC_EA0_RDREQ_32B[52],TCC_EA0_RDREQ_LEVEL[52],TCC_EA0_ATOMIC_LEVEL[53],TCC_EA0_RDREQ[53],TCC_EA0_RDREQ_32B[53],TCC_EA0_RDREQ_LEVEL[53],TCC_EA0_ATOMIC_LEVEL[54],TCC_EA0_RDREQ[54],TCC_EA0_RDREQ_32B[54],TCC_EA0_RDREQ_LEVEL[54],TCC_EA0_ATOMIC_LEVEL[55],TCC_EA0_RDREQ[55],TCC_EA0_RDREQ_32B[55],TCC_EA0_RDREQ_LEVEL[55],TCC_EA0_ATOMIC_LEVEL[56],TCC_EA0_RDREQ[56],TCC_EA0_RDREQ_32B[56],TCC_EA0_RDREQ_LEVEL[56],TCC_EA0_ATOMIC_LEVEL[57],TCC_EA0_RDREQ[57],TCC_EA0_RDREQ_32B[57],TCC_EA0_RDREQ_LEVEL[57],TCC_EA0_ATOMIC_LEVEL[58],TCC_EA0_RDREQ[58],TCC_EA0_RDREQ_32B[58],TCC_EA0_RDREQ_LEVEL[58],TCC_EA0_ATOMIC_LEVEL[59],TCC_EA0_RDREQ[59],TCC_EA0_RDREQ_32B[59],TCC_EA0_RDREQ_LEVEL[59],TCC_EA0_ATOMIC_LEVEL[60],TCC_EA0_RDREQ[60],TCC_EA0_RDREQ_32B[60],TCC_EA0_RDREQ_LEVEL[60],TCC_EA0_ATOMIC_LEVEL[61],TCC_EA0_RDREQ[61],TCC_EA0_RDREQ_32B[61],TCC_EA0_RDREQ_LEVEL[61],TCC_EA0_ATOMIC_LEVEL[62],TCC_EA0_RDREQ[62],TCC_EA0_RDREQ_32B[62],TCC_EA0_RDREQ_LEVEL[62],TCC_EA0_ATOMIC_LEVEL[63],TCC_EA0_RDREQ[63],TCC_EA0_RDREQ_32B[63],TCC_EA0_RDREQ_LEVEL[63],TCC_EA0_ATOMIC_LEVEL[64],TCC_EA0_RDREQ[64],TCC_EA0_RDREQ_32B[64],TCC_EA0_RDREQ_LEVEL[64],TCC_EA0_ATOMIC_LEVEL[65],TCC_EA0_RDREQ[65],TCC_EA0_RDREQ_32B[65],TCC_EA0_RDREQ_LEVEL[65],TCC_EA0_ATOMIC_LEVEL[66],TCC_EA0_RDREQ[66],TCC_EA0_RDREQ_32B[66],TCC_EA0_RDREQ_LEVEL[66],TCC_EA0_ATOMIC_LEVEL[67],TCC_EA0_RDREQ[67],TCC_EA0_RDREQ_32B[67],TCC_EA0_RDREQ_LEVEL[67],TCC_EA0_ATOMIC_LEVEL[68],TCC_EA0_RDREQ[68],TCC_EA0_RDREQ_32B[68],TCC_EA0_RDREQ_LEVEL[68],TCC_EA0_ATOMIC_LEVEL[69],TCC_EA0_RDREQ[69],TCC_EA0_RDREQ_32B[69],TCC_EA0_RDREQ_LEVEL[69],TCC_EA0_ATOMIC_LEVEL[70],TCC_EA0_RDREQ[70],TCC_EA0_RDREQ_32B[70],TCC_EA0_RDREQ_LEVEL[70],TCC_EA0_ATOMIC_LEVEL[71],TCC_EA0_RDREQ[71],TCC_EA0_RDREQ_32B[71],TCC_EA0_RDREQ_LEVEL[71],TCC_EA0_ATOMIC_LEVEL[72],TCC_EA0_RDREQ[72],TCC_EA0_RDREQ_32B[72],TCC_EA0_RDREQ_LEVEL[72],TCC_EA0_ATOMIC_LEVEL[73],TCC_EA0_RDREQ[73],TCC_EA0_RDREQ_32B[73],TCC_EA0_RDREQ_LEVEL[73],TCC_EA0_ATOMIC_LEVEL[74],TCC_EA0_RDREQ[74],TCC_EA0_RDREQ_32B[74],TCC_EA0_RDREQ_LEVEL[74],TCC_EA0_ATOMIC_LEVEL[75],TCC_EA0_RDREQ[75],TCC_EA0_RDREQ_32B[75],TCC_EA0_RDREQ_LEVEL[75],TCC_EA0_ATOMIC_LEVEL[76],TCC_EA0_RDREQ[76],TCC_EA0_RDREQ_32B[76],TCC_EA0_RDREQ_LEVEL[76],TCC_EA0_ATOMIC_LEVEL[77],TCC_EA0_RDREQ[77],TCC_EA0_RDREQ_32B[77],TCC_EA0_RDREQ_LEVEL[77],TCC_EA0_ATOMIC_LEVEL[78],TCC_EA0_RDREQ[78],TCC_EA0_RDREQ_32B[78],TCC_EA0_RDREQ_LEVEL[78],TCC_EA0_ATOMIC_LEVEL[79],TCC_EA0_RDREQ[79],TCC_EA0_RDREQ_32B[79],TCC_EA0_RDREQ_LEVEL[79],TCC_EA0_ATOMIC_LEVEL[80],TCC_EA0_RDREQ[80],TCC_EA0_RDREQ_32B[80],TCC_EA0_RDREQ_LEVEL[80],TCC_EA0_ATOMIC_LEVEL[81],TCC_EA0_RDREQ[81],TCC_EA0_RDREQ_32B[81],TCC_EA0_RDREQ_LEVEL[81],TCC_EA0_ATOMIC_LEVEL[82],TCC_EA0_RDREQ[82],TCC_EA0_RDREQ_32B[82],TCC_EA0_RDREQ_LEVEL[82],TCC_EA0_ATOMIC_LEVEL[83],TCC_EA0_RDREQ[83],TCC_EA0_RDREQ_32B[83],TCC_EA0_RDREQ_LEVEL[83],TCC_EA0_ATOMIC_LEVEL[84],TCC_EA0_RDREQ[84],TCC_EA0_RDREQ_32B[84],TCC_EA0_RDREQ_LEVEL[84],TCC_EA0_ATOMIC_LEVEL[85],TCC_EA0_RDREQ[85],TCC_EA0_RDREQ_32B[85],TCC_EA0_RDREQ_LEVEL[85],TCC_EA0_ATOMIC_LEVEL[86],TCC_EA0_RDREQ[86],TCC_EA0_RDREQ_32B[86],TCC_EA0_RDREQ_LEVEL[86],TCC_EA0_ATOMIC_LEVEL[87],TCC_EA0_RDREQ[87],TCC_EA0_RDREQ_32B[87],TCC_EA0_RDREQ_LEVEL[87],TCC_EA0_ATOMIC_LEVEL[88],TCC_EA0_RDREQ[88],TCC_EA0_RDREQ_32B[88],TCC_EA0_RDREQ_LEVEL[88],TCC_EA0_ATOMIC_LEVEL[89],TCC_EA0_RDREQ[89],TCC_EA0_RDREQ_32B[89],TCC_EA0_RDREQ_LEVEL[89],TCC_EA0_ATOMIC_LEVEL[90],TCC_EA0_RDREQ[90],TCC_EA0_RDREQ_32B[90],TCC_EA0_RDREQ_LEVEL[90],TCC_EA0_ATOMIC_LEVEL[91],TCC_EA0_RDREQ[91],TCC_EA0_RDREQ_32B[91],TCC_EA0_RDREQ_LEVEL[91],TCC_EA0_ATOMIC_LEVEL[92],TCC_EA0_RDREQ[92],TCC_EA0_RDREQ_32B[92],TCC_EA0_RDREQ_LEVEL[92],TCC_EA0_ATOMIC_LEVEL[93],TCC_EA0_RDREQ[93],TCC_EA0_RDREQ_32B[93],TCC_EA0_RDREQ_LEVEL[93],TCC_EA0_ATOMIC_LEVEL[94],TCC_EA0_RDREQ[94],TCC_EA0_RDREQ_32B[94],TCC_EA0_RDREQ_LEVEL[94],TCC_EA0_ATOMIC_LEVEL[95],TCC_EA0_RDREQ[95],TCC_EA0_RDREQ_32B[95],TCC_EA0_RDREQ_LEVEL[95],Wave_Size_16,Correlation_ID_16,SQ_INSTS_VMEM,SQ_INSTS_SALU,SQ_INSTS_VSKIPPED,SQ_INSTS,SQ_INSTS_VALU,SQ_INSTS_VALU_ADD_F16,SQ_INSTS_VALU_MUL_F16,SQ_INSTS_VALU_FMA_F16,GRBM_SPI_BUSY,SPI_CSN_NUM_THREADGROUPS,SPI_CSN_WAVE,CPC_CPC_TCIU_BUSY,CPC_CPC_TCIU_IDLE,CPF_CPF_TCIU_BUSY,CPF_CPF_TCIU_STALL,TA_BUFFER_READ_WAVEFRONTS_sum,TA_BUFFER_WRITE_WAVEFRONTS_sum,TCC_CC_REQ_sum,TCC_NC_REQ_sum,TCC_RW_REQ_sum,TCC_UC_REQ_sum,TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum,TCP_READ_TAGCONFLICT_STALL_CYCLES_sum,TCP_TA_TCP_STATE_READ_sum,TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum,TD_LOAD_WAVEFRONT_sum,TD_SPI_STALL_sum,Wave_Size_17,Correlation_ID_17,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_BUSY_CU_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_INSTS_VALU_CVT,SQ_INSTS_VMEM_WR,SQ_INSTS_VMEM_RD,GRBM_COUNT,GRBM_GUI_ACTIVE,SPI_CSN_WINDOW_VALID,SPI_CSN_BUSY,CPC_CPC_STAT_BUSY,CPC_CPC_STAT_IDLE,CPF_CPF_STAT_BUSY,CPF_CPF_STAT_STALL,TA_BUFFER_WAVEFRONTS_sum,TA_TA_BUSY_sum,TCC_BUSY_sum,TCC_CYCLE_sum,TCC_PROBE_ALL_sum,TCC_PROBE_sum,TCP_GATE_EN1_sum,TCP_GATE_EN2_sum,TCP_TCR_TCP_STALL_CYCLES_sum,TCP_TD_TCP_STALL_CYCLES_sum,TD_TC_STALL_sum,TD_TD_BUSY_sum,Start_Timestamp,End_Timestamp
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diff --git a/tests/workloads/dispatch_2/MI300A_A1/sysinfo.csv b/tests/workloads/dispatch_2/MI300A_A1/sysinfo.csv
new file mode 100644
index 0000000000..36f84f532c
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300A_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+dispatch_2,./tests/vcopy -n 1048576 -b 256 -i 3,SQ|LDS|SQC|TA|TD|TCP|TCC|SPI|CPC|CPF,Wed 29 May 2024 01:36:08 PM  (CDT),2,sh5-1w300-rg3-3,AMD Instinct MI300A Accelerator,"American Megatrends International, LLC.RMO1002DS",Ubuntu 22.04.2 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,131174852,,6.1.2-110,N/A,SPX,NPS1,MI300A_A1,gfx942,32,24576,228,4,24,64,1024,32,2100,1300,2100,1300,96,32,120,4,5324.8,6
diff --git a/tests/workloads/dispatch_2/MI300A_A1/timestamps.csv b/tests/workloads/dispatch_2/MI300A_A1/timestamps.csv
new file mode 100644
index 0000000000..7fa39a8800
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300A_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,11995,1,146305,146305,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73646370067592,73646370075364,0
+3,11995,1,146305,146305,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73646370113222,73646370119351,0
+2,11995,1,146305,146305,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73646370091949,73646370098199,0
diff --git a/tests/workloads/dispatch_2/MI300X_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/dispatch_2/MI300X_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..d57c02bace
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300X_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,60633,1,964651,964651,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716250185980750,716250185996629,0,445034.0,445034.0,16384.0,65536.0,35311.0,2824232.0
+1,60633,1,964651,964651,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716250186019509,716250186033267,0,409556.0,409556.0,16384.0,65536.0,12992.0,1048576.0
+2,60633,1,964651,964651,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716250186053586,716250186067426,0,369883.0,369883.0,16384.0,65536.0,13128.0,1048576.0
diff --git a/tests/workloads/dispatch_2/MI300X_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/dispatch_2/MI300X_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..533562fffd
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300X_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,60633,1,964663,964663,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716250185980750,716250185996629,0,0.0,0.0,0.0
+1,60633,1,964663,964663,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716250186019509,716250186033267,0,0.0,0.0,0.0
+2,60633,1,964663,964663,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716250186053586,716250186067426,0,0.0,0.0,0.0
diff --git a/tests/workloads/dispatch_2/MI300X_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/dispatch_2/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..90531f3466
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,964675,964675,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716250185980750,716250185996629,0,65536.0,3944090.0,315488968.0
+1,60633,1,964675,964675,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716250186019509,716250186033267,0,65536.0,3617558.0,289330136.0
+2,60633,1,964675,964675,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716250186053586,716250186067426,0,65536.0,3495734.0,279597328.0
diff --git a/tests/workloads/dispatch_2/MI300X_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/dispatch_2/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..a304517cd0
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,964687,964687,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716250185980750,716250185996629,0,32768.0,510457.0,40831868.0
+1,60633,1,964687,964687,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716250186019509,716250186033267,0,32768.0,382581.0,30601624.0
+2,60633,1,964687,964687,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716250186053586,716250186067426,0,32768.0,348139.0,27857520.0
diff --git a/tests/workloads/dispatch_2/MI300X_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/dispatch_2/MI300X_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..c3d2ae8276
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300X_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,60633,1,964700,964700,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716250185980750,716250185996629,0,577249.0,577249.0,316007.0,2308996.0,16384.0,34957599.0,562816.0,0.0,140189340.0
+1,60633,1,964700,964700,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716250186019509,716250186033267,0,415641.0,415641.0,244236.0,1662564.0,16384.0,29686735.0,481490.0,0.0,119099552.0
+2,60633,1,964700,964700,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716250186053586,716250186067426,0,357965.0,357965.0,189759.0,1431860.0,16384.0,29243119.0,479688.0,0.0,117325408.0
diff --git a/tests/workloads/dispatch_2/MI300X_A1/log.txt b/tests/workloads/dispatch_2/MI300X_A1/log.txt
new file mode 100644
index 0000000000..0ace80ec95
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300X_A1/log.txt
@@ -0,0 +1,230 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/dispatch_2/MI300X_A1
+Target: MI300X_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: ['1']
+Hardware Blocks: All
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH_LEVEL
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_CVT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_WR
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_HITS
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_MISSES
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_MISSES_DUPLICATE
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_HITS
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES_DUPLICATE
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_13.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[1]
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_14.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[1]
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_15.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[1]
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_16.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[1]
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_17.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[2]
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F64
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_ANY
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_SCA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_MISC
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_THREAD_CYCLES_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ADDR_CONFLICT
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ITEMS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_MEM_VIOLATIONS
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F32
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F64
+
+[profiling] Current input file: tests/workloads/dispatch_2/MI300X_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/dispatch_2/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/dispatch_2/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..5faaf09cd3
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/dispatch_2/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..a26158b25b
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/dispatch_2/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..fb7520df1b
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/dispatch_2/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..32d63ae2d9
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/dispatch_2/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..48c0dcc3d7
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_0.txt b/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..ec34d536df
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD GRBM_COUNT GRBM_GUI_ACTIVE TCP_GATE_EN1_sum TCP_GATE_EN2_sum TCP_TD_TCP_STALL_CYCLES_sum TCP_TCR_TCP_STALL_CYCLES_sum TA_TA_BUSY_sum TA_BUFFER_WAVEFRONTS_sum TD_TD_BUSY_sum TD_TC_STALL_sum SPI_CSN_WINDOW_VALID SPI_CSN_BUSY CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE CPF_CPF_STAT_BUSY CPF_CPF_STAT_STALL TCC_CYCLE_sum TCC_BUSY_sum TCC_PROBE_sum TCC_PROBE_ALL_sum
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_1.txt b/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..432979b162
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 GRBM_SPI_BUSY TCP_READ_TAGCONFLICT_STALL_CYCLES_sum TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum TCP_TA_TCP_STATE_READ_sum TA_BUFFER_READ_WAVEFRONTS_sum TA_BUFFER_WRITE_WAVEFRONTS_sum TD_SPI_STALL_sum TD_LOAD_WAVEFRONT_sum SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE CPC_CPC_TCIU_BUSY CPC_CPC_TCIU_IDLE CPF_CPF_TCIU_BUSY CPF_CPF_TCIU_STALL TCC_NC_REQ_sum TCC_UC_REQ_sum TCC_CC_REQ_sum TCC_RW_REQ_sum
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_10.txt b/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..e4b7ff8c09
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_11.txt b/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..c82db92f00
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_12.txt b/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..8958f384e1
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_13.txt b/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_13.txt
new file mode 100644
index 0000000000..55ecc49c6f
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_13.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_ATOMIC[0] TCC_BUBBLE[0] TCC_CYCLE[0] TCC_EA0_ATOMIC[0] TCC_ATOMIC[1] TCC_BUBBLE[1] TCC_CYCLE[1] TCC_EA0_ATOMIC[1] TCC_ATOMIC[2] TCC_BUBBLE[2] TCC_CYCLE[2] TCC_EA0_ATOMIC[2] TCC_ATOMIC[3] TCC_BUBBLE[3] TCC_CYCLE[3] TCC_EA0_ATOMIC[3] TCC_ATOMIC[4] TCC_BUBBLE[4] TCC_CYCLE[4] TCC_EA0_ATOMIC[4] TCC_ATOMIC[5] TCC_BUBBLE[5] TCC_CYCLE[5] TCC_EA0_ATOMIC[5] TCC_ATOMIC[6] TCC_BUBBLE[6] TCC_CYCLE[6] TCC_EA0_ATOMIC[6] TCC_ATOMIC[7] TCC_BUBBLE[7] TCC_CYCLE[7] TCC_EA0_ATOMIC[7] TCC_ATOMIC[8] TCC_BUBBLE[8] TCC_CYCLE[8] TCC_EA0_ATOMIC[8] TCC_ATOMIC[9] TCC_BUBBLE[9] TCC_CYCLE[9] TCC_EA0_ATOMIC[9] TCC_ATOMIC[10] TCC_BUBBLE[10] TCC_CYCLE[10] TCC_EA0_ATOMIC[10] TCC_ATOMIC[11] TCC_BUBBLE[11] TCC_CYCLE[11] TCC_EA0_ATOMIC[11] TCC_ATOMIC[12] TCC_BUBBLE[12] TCC_CYCLE[12] TCC_EA0_ATOMIC[12] TCC_ATOMIC[13] TCC_BUBBLE[13] TCC_CYCLE[13] TCC_EA0_ATOMIC[13] TCC_ATOMIC[14] TCC_BUBBLE[14] TCC_CYCLE[14] TCC_EA0_ATOMIC[14] TCC_ATOMIC[15] TCC_BUBBLE[15] TCC_CYCLE[15] TCC_EA0_ATOMIC[15]
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_14.txt b/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_14.txt
new file mode 100644
index 0000000000..8586bd2da4
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_14.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_ATOMIC_LEVEL[0] TCC_EA0_RDREQ[0] TCC_EA0_RDREQ_32B[0] TCC_EA0_RDREQ_LEVEL[0] TCC_EA0_ATOMIC_LEVEL[1] TCC_EA0_RDREQ[1] TCC_EA0_RDREQ_32B[1] TCC_EA0_RDREQ_LEVEL[1] TCC_EA0_ATOMIC_LEVEL[2] TCC_EA0_RDREQ[2] TCC_EA0_RDREQ_32B[2] TCC_EA0_RDREQ_LEVEL[2] TCC_EA0_ATOMIC_LEVEL[3] TCC_EA0_RDREQ[3] TCC_EA0_RDREQ_32B[3] TCC_EA0_RDREQ_LEVEL[3] TCC_EA0_ATOMIC_LEVEL[4] TCC_EA0_RDREQ[4] TCC_EA0_RDREQ_32B[4] TCC_EA0_RDREQ_LEVEL[4] TCC_EA0_ATOMIC_LEVEL[5] TCC_EA0_RDREQ[5] TCC_EA0_RDREQ_32B[5] TCC_EA0_RDREQ_LEVEL[5] TCC_EA0_ATOMIC_LEVEL[6] TCC_EA0_RDREQ[6] TCC_EA0_RDREQ_32B[6] TCC_EA0_RDREQ_LEVEL[6] TCC_EA0_ATOMIC_LEVEL[7] TCC_EA0_RDREQ[7] TCC_EA0_RDREQ_32B[7] TCC_EA0_RDREQ_LEVEL[7] TCC_EA0_ATOMIC_LEVEL[8] TCC_EA0_RDREQ[8] TCC_EA0_RDREQ_32B[8] TCC_EA0_RDREQ_LEVEL[8] TCC_EA0_ATOMIC_LEVEL[9] TCC_EA0_RDREQ[9] TCC_EA0_RDREQ_32B[9] TCC_EA0_RDREQ_LEVEL[9] TCC_EA0_ATOMIC_LEVEL[10] TCC_EA0_RDREQ[10] TCC_EA0_RDREQ_32B[10] TCC_EA0_RDREQ_LEVEL[10] TCC_EA0_ATOMIC_LEVEL[11] TCC_EA0_RDREQ[11] TCC_EA0_RDREQ_32B[11] TCC_EA0_RDREQ_LEVEL[11] TCC_EA0_ATOMIC_LEVEL[12] TCC_EA0_RDREQ[12] TCC_EA0_RDREQ_32B[12] TCC_EA0_RDREQ_LEVEL[12] TCC_EA0_ATOMIC_LEVEL[13] TCC_EA0_RDREQ[13] TCC_EA0_RDREQ_32B[13] TCC_EA0_RDREQ_LEVEL[13] TCC_EA0_ATOMIC_LEVEL[14] TCC_EA0_RDREQ[14] TCC_EA0_RDREQ_32B[14] TCC_EA0_RDREQ_LEVEL[14] TCC_EA0_ATOMIC_LEVEL[15] TCC_EA0_RDREQ[15] TCC_EA0_RDREQ_32B[15] TCC_EA0_RDREQ_LEVEL[15]
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_15.txt b/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_15.txt
new file mode 100644
index 0000000000..0efbb2a909
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_15.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_WRREQ[0] TCC_EA0_WRREQ_64B[0] TCC_EA0_WRREQ_LEVEL[0] TCC_HIT[0] TCC_EA0_WRREQ[1] TCC_EA0_WRREQ_64B[1] TCC_EA0_WRREQ_LEVEL[1] TCC_HIT[1] TCC_EA0_WRREQ[2] TCC_EA0_WRREQ_64B[2] TCC_EA0_WRREQ_LEVEL[2] TCC_HIT[2] TCC_EA0_WRREQ[3] TCC_EA0_WRREQ_64B[3] TCC_EA0_WRREQ_LEVEL[3] TCC_HIT[3] TCC_EA0_WRREQ[4] TCC_EA0_WRREQ_64B[4] TCC_EA0_WRREQ_LEVEL[4] TCC_HIT[4] TCC_EA0_WRREQ[5] TCC_EA0_WRREQ_64B[5] TCC_EA0_WRREQ_LEVEL[5] TCC_HIT[5] TCC_EA0_WRREQ[6] TCC_EA0_WRREQ_64B[6] TCC_EA0_WRREQ_LEVEL[6] TCC_HIT[6] TCC_EA0_WRREQ[7] TCC_EA0_WRREQ_64B[7] TCC_EA0_WRREQ_LEVEL[7] TCC_HIT[7] TCC_EA0_WRREQ[8] TCC_EA0_WRREQ_64B[8] TCC_EA0_WRREQ_LEVEL[8] TCC_HIT[8] TCC_EA0_WRREQ[9] TCC_EA0_WRREQ_64B[9] TCC_EA0_WRREQ_LEVEL[9] TCC_HIT[9] TCC_EA0_WRREQ[10] TCC_EA0_WRREQ_64B[10] TCC_EA0_WRREQ_LEVEL[10] TCC_HIT[10] TCC_EA0_WRREQ[11] TCC_EA0_WRREQ_64B[11] TCC_EA0_WRREQ_LEVEL[11] TCC_HIT[11] TCC_EA0_WRREQ[12] TCC_EA0_WRREQ_64B[12] TCC_EA0_WRREQ_LEVEL[12] TCC_HIT[12] TCC_EA0_WRREQ[13] TCC_EA0_WRREQ_64B[13] TCC_EA0_WRREQ_LEVEL[13] TCC_HIT[13] TCC_EA0_WRREQ[14] TCC_EA0_WRREQ_64B[14] TCC_EA0_WRREQ_LEVEL[14] TCC_HIT[14] TCC_EA0_WRREQ[15] TCC_EA0_WRREQ_64B[15] TCC_EA0_WRREQ_LEVEL[15] TCC_HIT[15]
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_16.txt b/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_16.txt
new file mode 100644
index 0000000000..988080d3aa
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_16.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_MISS[0] TCC_READ[0] TCC_REQ[0] TCC_RW_REQ[0] TCC_MISS[1] TCC_READ[1] TCC_REQ[1] TCC_RW_REQ[1] TCC_MISS[2] TCC_READ[2] TCC_REQ[2] TCC_RW_REQ[2] TCC_MISS[3] TCC_READ[3] TCC_REQ[3] TCC_RW_REQ[3] TCC_MISS[4] TCC_READ[4] TCC_REQ[4] TCC_RW_REQ[4] TCC_MISS[5] TCC_READ[5] TCC_REQ[5] TCC_RW_REQ[5] TCC_MISS[6] TCC_READ[6] TCC_REQ[6] TCC_RW_REQ[6] TCC_MISS[7] TCC_READ[7] TCC_REQ[7] TCC_RW_REQ[7] TCC_MISS[8] TCC_READ[8] TCC_REQ[8] TCC_RW_REQ[8] TCC_MISS[9] TCC_READ[9] TCC_REQ[9] TCC_RW_REQ[9] TCC_MISS[10] TCC_READ[10] TCC_REQ[10] TCC_RW_REQ[10] TCC_MISS[11] TCC_READ[11] TCC_REQ[11] TCC_RW_REQ[11] TCC_MISS[12] TCC_READ[12] TCC_REQ[12] TCC_RW_REQ[12] TCC_MISS[13] TCC_READ[13] TCC_REQ[13] TCC_RW_REQ[13] TCC_MISS[14] TCC_READ[14] TCC_REQ[14] TCC_RW_REQ[14] TCC_MISS[15] TCC_READ[15] TCC_REQ[15] TCC_RW_REQ[15]
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_17.txt b/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_17.txt
new file mode 100644
index 0000000000..8e8580232f
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_17.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_TAG_STALL[0] TCC_TOO_MANY_EA_WRREQS_STALL[0] TCC_WRITE[0] TCC_TAG_STALL[1] TCC_TOO_MANY_EA_WRREQS_STALL[1] TCC_WRITE[1] TCC_TAG_STALL[2] TCC_TOO_MANY_EA_WRREQS_STALL[2] TCC_WRITE[2] TCC_TAG_STALL[3] TCC_TOO_MANY_EA_WRREQS_STALL[3] TCC_WRITE[3] TCC_TAG_STALL[4] TCC_TOO_MANY_EA_WRREQS_STALL[4] TCC_WRITE[4] TCC_TAG_STALL[5] TCC_TOO_MANY_EA_WRREQS_STALL[5] TCC_WRITE[5] TCC_TAG_STALL[6] TCC_TOO_MANY_EA_WRREQS_STALL[6] TCC_WRITE[6] TCC_TAG_STALL[7] TCC_TOO_MANY_EA_WRREQS_STALL[7] TCC_WRITE[7] TCC_TAG_STALL[8] TCC_TOO_MANY_EA_WRREQS_STALL[8] TCC_WRITE[8] TCC_TAG_STALL[9] TCC_TOO_MANY_EA_WRREQS_STALL[9] TCC_WRITE[9] TCC_TAG_STALL[10] TCC_TOO_MANY_EA_WRREQS_STALL[10] TCC_WRITE[10] TCC_TAG_STALL[11] TCC_TOO_MANY_EA_WRREQS_STALL[11] TCC_WRITE[11] TCC_TAG_STALL[12] TCC_TOO_MANY_EA_WRREQS_STALL[12] TCC_WRITE[12] TCC_TAG_STALL[13] TCC_TOO_MANY_EA_WRREQS_STALL[13] TCC_WRITE[13] TCC_TAG_STALL[14] TCC_TOO_MANY_EA_WRREQS_STALL[14] TCC_WRITE[14] TCC_TAG_STALL[15] TCC_TOO_MANY_EA_WRREQS_STALL[15] TCC_WRITE[15]
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_2.txt b/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..e9eb9b6eef
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 TCP_VOLATILE_sum TCP_TOTAL_ACCESSES_sum TCP_TOTAL_READ_sum TCP_TOTAL_WRITE_sum TA_BUFFER_ATOMIC_WAVEFRONTS_sum TA_BUFFER_TOTAL_CYCLES_sum TD_ATOMIC_WAVEFRONT_sum TD_STORE_WAVEFRONT_sum SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION CPF_CPF_STAT_IDLE CPF_CPF_TCIU_IDLE TCC_REQ_sum TCC_STREAMING_REQ_sum TCC_HIT_sum TCC_MISS_sum
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_3.txt b/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..dcc705ca99
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS TCP_TOTAL_ATOMIC_WITH_RET_sum TCP_TOTAL_ATOMIC_WITHOUT_RET_sum TCP_TOTAL_WRITEBACK_INVALIDATES_sum TCP_TOTAL_CACHE_ACCESSES_sum TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES_sum TD_COALESCABLE_WAVEFRONT_sum SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE CPF_CMP_UTCL1_STALL_ON_TRANSLATION TCC_READ_sum TCC_WRITE_sum TCC_ATOMIC_sum TCC_WRITEBACK_sum
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_4.txt b/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..c0fa59f6bc
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAIT_ANY SQ_WAIT_INST_ANY SQ_ACTIVE_INST_ANY SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU TCP_UTCL1_TRANSLATION_MISS_sum TCP_UTCL1_TRANSLATION_HIT_sum TCP_UTCL1_PERMISSION_MISS_sum TCP_UTCL1_REQUEST_sum TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_TOTAL_WAVEFRONTS_sum SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE TCC_EA0_WRREQ_sum TCC_EA0_WRREQ_64B_sum TCC_EA0_WR_UNCACHED_32B_sum TCC_EA0_WRREQ_DRAM_sum
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_5.txt b/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..da1b4af3cd
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_SCA SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU TCP_TCC_READ_REQ_sum TCP_TCC_WRITE_REQ_sum TCP_TCC_ATOMIC_WITH_RET_REQ_sum TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN CPC_ME1_DC0_SPI_BUSY TCC_EA0_RDREQ_sum TCC_EA0_RDREQ_32B_sum TCC_BUBBLE_sum TCC_EA0_RD_UNCACHED_32B_sum
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_6.txt b/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..49b8ee5dc9
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_THREAD_CYCLES_VALU SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 TCP_TCC_NC_READ_REQ_sum TCP_TCC_NC_WRITE_REQ_sum TCP_TCC_NC_ATOMIC_REQ_sum TCP_TCC_UC_READ_REQ_sum TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN TCC_EA0_RDREQ_DRAM_sum TCC_TAG_STALL_sum TCC_NORMAL_WRITEBACK_sum TCC_ALL_TC_OP_WB_WRITEBACK_sum
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_7.txt b/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..53e4081ae1
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED TCP_TCC_UC_WRITE_REQ_sum TCP_TCC_UC_ATOMIC_REQ_sum TCP_TCC_CC_READ_REQ_sum TCP_TCC_CC_WRITE_REQ_sum TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR TCC_NORMAL_EVICT_sum TCC_ALL_TC_OP_INV_EVICT_sum TCC_TOO_MANY_EA_WRREQS_STALL_sum TCC_EA0_ATOMIC_sum
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_8.txt b/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..939b7aa92b
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES TCP_TCC_CC_ATOMIC_REQ_sum TCP_TCC_RW_READ_REQ_sum TCP_TCC_RW_WRITE_REQ_sum TCP_TCC_RW_ATOMIC_REQ_sum SPI_VWC_CSC_WR SPI_RA_BULKY_CU_FULL_CSN TCC_EA0_RDREQ_LEVEL_sum TCC_EA0_WRREQ_LEVEL_sum TCC_EA0_ATOMIC_LEVEL_sum TCC_EA0_WRREQ_STALL_sum
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_9.txt b/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..8995853835
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300X_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ TCP_PENDING_STALL_CYCLES_sum
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300X_A1/perfmon/timestamps.txt b/tests/workloads/dispatch_2/MI300X_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..755f2b7b20
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300X_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range: 1
+kernel:
diff --git a/tests/workloads/dispatch_2/MI300X_A1/pmc_perf.csv b/tests/workloads/dispatch_2/MI300X_A1/pmc_perf.csv
new file mode 100644
index 0000000000..5b0b63dcd5
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300X_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_1,Correlation_ID_1,XCC_Index,TCC_ATOMIC[0],TCC_BUBBLE[0],TCC_CYCLE[0],TCC_EA0_ATOMIC[0],TCC_ATOMIC[1],TCC_BUBBLE[1],TCC_CYCLE[1],TCC_EA0_ATOMIC[1],TCC_ATOMIC[2],TCC_BUBBLE[2],TCC_CYCLE[2],TCC_EA0_ATOMIC[2],TCC_ATOMIC[3],TCC_BUBBLE[3],TCC_CYCLE[3],TCC_EA0_ATOMIC[3],TCC_ATOMIC[4],TCC_BUBBLE[4],TCC_CYCLE[4],TCC_EA0_ATOMIC[4],TCC_ATOMIC[5],TCC_BUBBLE[5],TCC_CYCLE[5],TCC_EA0_ATOMIC[5],TCC_ATOMIC[6],TCC_BUBBLE[6],TCC_CYCLE[6],TCC_EA0_ATOMIC[6],TCC_ATOMIC[7],TCC_BUBBLE[7],TCC_CYCLE[7],TCC_EA0_ATOMIC[7],TCC_ATOMIC[8],TCC_BUBBLE[8],TCC_CYCLE[8],TCC_EA0_ATOMIC[8],TCC_ATOMIC[9],TCC_BUBBLE[9],TCC_CYCLE[9],TCC_EA0_ATOMIC[9],TCC_ATOMIC[10],TCC_BUBBLE[10],TCC_CYCLE[10],TCC_EA0_ATOMIC[10],TCC_ATOMIC[11],TCC_BUBBLE[11],TCC_CYCLE[11],TCC_EA0_ATOMIC[11],TCC_ATOMIC[12],TCC_BUBBLE[12],TCC_CYCLE[12],TCC_EA0_ATOMIC[12],TCC_ATOMIC[13],TCC_BUBBLE[13],TCC_CYCLE[13],TCC_EA0_ATOMIC[13],TCC_ATOMIC[14],TCC_BUBBLE[14],TCC_CYCLE[14],TCC_EA0_ATOMIC[14],TCC_ATOMIC[15],TCC_BUBBLE[15],TCC_CYCLE[15],TCC_EA0_ATOMIC[15],TCC_ATOMIC[16],TCC_BUBBLE[16],TCC_CYCLE[16],TCC_EA0_ATOMIC[16],TCC_ATOMIC[17],TCC_BUBBLE[17],TCC_CYCLE[17],TCC_EA0_ATOMIC[17],TCC_ATOMIC[18],TCC_BUBBLE[18],TCC_CYCLE[18],TCC_EA0_ATOMIC[18],TCC_ATOMIC[19],TCC_BUBBLE[19],TCC_CYCLE[19],TCC_EA0_ATOMIC[19],TCC_ATOMIC[20],TCC_BUBBLE[20],TCC_CYCLE[20],TCC_EA0_ATOMIC[20],TCC_ATOMIC[21],TCC_BUBBLE[21],TCC_CYCLE[21],TCC_EA0_ATOMIC[21],TCC_ATOMIC[22],TCC_BUBBLE[22],TCC_CYCLE[22],TCC_EA0_ATOMIC[22],TCC_ATOMIC[23],TCC_BUBBLE[23],TCC_CYCLE[23],TCC_EA0_ATOMIC[23],TCC_ATOMIC[24],TCC_BUBBLE[24],TCC_CYCLE[24],TCC_EA0_ATOMIC[24],TCC_ATOMIC[25],TCC_BUBBLE[25],TCC_CYCLE[25],TCC_EA0_ATOMIC[25],TCC_ATOMIC[26],TCC_BUBBLE[26],TCC_CYCLE[26],TCC_EA0_ATOMIC[26],TCC_ATOMIC[27],TCC_BUBBLE[27],TCC_CYCLE[27],TCC_EA0_ATOMIC[27],TCC_ATOMIC[28],TCC_BUBBLE[28],TCC_CYCLE[28],TCC_EA0_ATOMIC[28],TCC_ATOMIC[29],TCC_BUBBLE[29],TCC_CYCLE[29],TCC_EA0_ATOMIC[29],TCC_ATOMIC[30],TCC_BUBBLE[30],TCC_CYCLE[30],TCC_EA0_ATOMIC[30],TCC_ATOMIC[31],TCC_BUBBLE[31],TCC_CYCLE[31],TCC_EA0_ATOMIC[31],TCC_ATOMIC[32],TCC_BUBBLE[32],TCC_CYCLE[32],TCC_EA0_ATOMIC[32],TCC_ATOMIC[33],TCC_BUBBLE[33],TCC_CYCLE[33],TCC_EA0_ATOMIC[33],TCC_ATOMIC[34],TCC_BUBBLE[34],TCC_CYCLE[34],TCC_EA0_ATOMIC[34],TCC_ATOMIC[35],TCC_BUBBLE[35],TCC_CYCLE[35],TCC_EA0_ATOMIC[35],TCC_ATOMIC[36],TCC_BUBBLE[36],TCC_CYCLE[36],TCC_EA0_ATOMIC[36],TCC_ATOMIC[37],TCC_BUBBLE[37],TCC_CYCLE[37],TCC_EA0_ATOMIC[37],TCC_ATOMIC[38],TCC_BUBBLE[38],TCC_CYCLE[38],TCC_EA0_ATOMIC[38],TCC_ATOMIC[39],TCC_BUBBLE[39],TCC_CYCLE[39],TCC_EA0_ATOMIC[39],TCC_ATOMIC[40],TCC_BUBBLE[40],TCC_CYCLE[40],TCC_EA0_ATOMIC[40],TCC_ATOMIC[41],TCC_BUBBLE[41],TCC_CYCLE[41],TCC_EA0_ATOMIC[41],TCC_ATOMIC[42],TCC_BUBBLE[42],TCC_CYCLE[42],TCC_EA0_ATOMIC[42],TCC_ATOMIC[43],TCC_BUBBLE[43],TCC_CYCLE[43],TCC_EA0_ATOMIC[43],TCC_ATOMIC[44],TCC_BUBBLE[44],TCC_CYCLE[44],TCC_EA0_ATOMIC[44],TCC_ATOMIC[45],TCC_BUBBLE[45],TCC_CYCLE[45],TCC_EA0_ATOMIC[45],TCC_ATOMIC[46],TCC_BUBBLE[46],TCC_CYCLE[46],TCC_EA0_ATOMIC[46],TCC_ATOMIC[47],TCC_BUBBLE[47],TCC_CYCLE[47],TCC_EA0_ATOMIC[47],TCC_ATOMIC[48],TCC_BUBBLE[48],TCC_CYCLE[48],TCC_EA0_ATOMIC[48],TCC_ATOMIC[49],TCC_BUBBLE[49],TCC_CYCLE[49],TCC_EA0_ATOMIC[49],TCC_ATOMIC[50],TCC_BUBBLE[50],TCC_CYCLE[50],TCC_EA0_ATOMIC[50],TCC_ATOMIC[51],TCC_BUBBLE[51],TCC_CYCLE[51],TCC_EA0_ATOMIC[51],TCC_ATOMIC[52],TCC_BUBBLE[52],TCC_CYCLE[52],TCC_EA0_ATOMIC[52],TCC_ATOMIC[53],TCC_BUBBLE[53],TCC_CYCLE[53],TCC_EA0_ATOMIC[53],TCC_ATOMIC[54],TCC_BUBBLE[54],TCC_CYCLE[54],TCC_EA0_ATOMIC[54],TCC_ATOMIC[55],TCC_BUBBLE[55],TCC_CYCLE[55],TCC_EA0_ATOMIC[55],TCC_ATOMIC[56],TCC_BUBBLE[56],TCC_CYCLE[56],TCC_EA0_ATOMIC[56],TCC_ATOMIC[57],TCC_BUBBLE[57],TCC_CYCLE[57],TCC_EA0_ATOMIC[57],TCC_ATOMIC[58],TCC_BUBBLE[58],TCC_CYCLE[58],TCC_EA0_ATOMIC[58],TCC_ATOMIC[59],TCC_BUBBLE[59],TCC_CYCLE[59],TCC_EA0_ATOMIC[59],TCC_ATOMIC[60],TCC_BUBBLE[60],TCC_CYCLE[60],TCC_EA0_ATOMIC[60],TCC_ATOMIC[61],TCC_BUBBLE[61],TCC_CYCLE[61],TCC_EA0_ATOMIC[61],TCC_ATOMIC[62],TCC_BUBBLE[62],TCC_CYCLE[62],TCC_EA0_ATOMIC[62],TCC_ATOMIC[63],TCC_BUBBLE[63],TCC_CYCLE[63],TCC_EA0_ATOMIC[63],TCC_ATOMIC[64],TCC_BUBBLE[64],TCC_CYCLE[64],TCC_EA0_ATOMIC[64],TCC_ATOMIC[65],TCC_BUBBLE[65],TCC_CYCLE[65],TCC_EA0_ATOMIC[65],TCC_ATOMIC[66],TCC_BUBBLE[66],TCC_CYCLE[66],TCC_EA0_ATOMIC[66],TCC_ATOMIC[67],TCC_BUBBLE[67],TCC_CYCLE[67],TCC_EA0_ATOMIC[67],TCC_ATOMIC[68],TCC_BUBBLE[68],TCC_CYCLE[68],TCC_EA0_ATOMIC[68],TCC_ATOMIC[69],TCC_BUBBLE[69],TCC_CYCLE[69],TCC_EA0_ATOMIC[69],TCC_ATOMIC[70],TCC_BUBBLE[70],TCC_CYCLE[70],TCC_EA0_ATOMIC[70],TCC_ATOMIC[71],TCC_BUBBLE[71],TCC_CYCLE[71],TCC_EA0_ATOMIC[71],TCC_ATOMIC[72],TCC_BUBBLE[72],TCC_CYCLE[72],TCC_EA0_ATOMIC[72],TCC_ATOMIC[73],TCC_BUBBLE[73],TCC_CYCLE[73],TCC_EA0_ATOMIC[73],TCC_ATOMIC[74],TCC_BUBBLE[74],TCC_CYCLE[74],TCC_EA0_ATOMIC[74],TCC_ATOMIC[75],TCC_BUBBLE[75],TCC_CYCLE[75],TCC_EA0_ATOMIC[75],TCC_ATOMIC[76],TCC_BUBBLE[76],TCC_CYCLE[76],TCC_EA0_ATOMIC[76],TCC_ATOMIC[77],TCC_BUBBLE[77],TCC_CYCLE[77],TCC_EA0_ATOMIC[77],TCC_ATOMIC[78],TCC_BUBBLE[78],TCC_CYCLE[78],TCC_EA0_ATOMIC[78],TCC_ATOMIC[79],TCC_BUBBLE[79],TCC_CYCLE[79],TCC_EA0_ATOMIC[79],TCC_ATOMIC[80],TCC_BUBBLE[80],TCC_CYCLE[80],TCC_EA0_ATOMIC[80],TCC_ATOMIC[81],TCC_BUBBLE[81],TCC_CYCLE[81],TCC_EA0_ATOMIC[81],TCC_ATOMIC[82],TCC_BUBBLE[82],TCC_CYCLE[82],TCC_EA0_ATOMIC[82],TCC_ATOMIC[83],TCC_BUBBLE[83],TCC_CYCLE[83],TCC_EA0_ATOMIC[83],TCC_ATOMIC[84],TCC_BUBBLE[84],TCC_CYCLE[84],TCC_EA0_ATOMIC[84],TCC_ATOMIC[85],TCC_BUBBLE[85],TCC_CYCLE[85],TCC_EA0_ATOMIC[85],TCC_ATOMIC[86],TCC_BUBBLE[86],TCC_CYCLE[86],TCC_EA0_ATOMIC[86],TCC_ATOMIC[87],TCC_BUBBLE[87],TCC_CYCLE[87],TCC_EA0_ATOMIC[87],TCC_ATOMIC[88],TCC_BUBBLE[88],TCC_CYCLE[88],TCC_EA0_ATOMIC[88],TCC_ATOMIC[89],TCC_BUBBLE[89],TCC_CYCLE[89],TCC_EA0_ATOMIC[89],TCC_ATOMIC[90],TCC_BUBBLE[90],TCC_CYCLE[90],TCC_EA0_ATOMIC[90],TCC_ATOMIC[91],TCC_BUBBLE[91],TCC_CYCLE[91],TCC_EA0_ATOMIC[91],TCC_ATOMIC[92],TCC_BUBBLE[92],TCC_CYCLE[92],TCC_EA0_ATOMIC[92],TCC_ATOMIC[93],TCC_BUBBLE[93],TCC_CYCLE[93],TCC_EA0_ATOMIC[93],TCC_ATOMIC[94],TCC_BUBBLE[94],TCC_CYCLE[94],TCC_EA0_ATOMIC[94],TCC_ATOMIC[95],TCC_BUBBLE[95],TCC_CYCLE[95],TCC_EA0_ATOMIC[95],TCC_ATOMIC[96],TCC_BUBBLE[96],TCC_CYCLE[96],TCC_EA0_ATOMIC[96],TCC_ATOMIC[97],TCC_BUBBLE[97],TCC_CYCLE[97],TCC_EA0_ATOMIC[97],TCC_ATOMIC[98],TCC_BUBBLE[98],TCC_CYCLE[98],TCC_EA0_ATOMIC[98],TCC_ATOMIC[99],TCC_BUBBLE[99],TCC_CYCLE[99],TCC_EA0_ATOMIC[99],TCC_ATOMIC[100],TCC_BUBBLE[100],TCC_CYCLE[100],TCC_EA0_ATOMIC[100],TCC_ATOMIC[101],TCC_BUBBLE[101],TCC_CYCLE[101],TCC_EA0_ATOMIC[101],TCC_ATOMIC[102],TCC_BUBBLE[102],TCC_CYCLE[102],TCC_EA0_ATOMIC[102],TCC_ATOMIC[103],TCC_BUBBLE[103],TCC_CYCLE[103],TCC_EA0_ATOMIC[103],TCC_ATOMIC[104],TCC_BUBBLE[104],TCC_CYCLE[104],TCC_EA0_ATOMIC[104],TCC_ATOMIC[105],TCC_BUBBLE[105],TCC_CYCLE[105],TCC_EA0_ATOMIC[105],TCC_ATOMIC[106],TCC_BUBBLE[106],TCC_CYCLE[106],TCC_EA0_ATOMIC[106],TCC_ATOMIC[107],TCC_BUBBLE[107],TCC_CYCLE[107],TCC_EA0_ATOMIC[107],TCC_ATOMIC[108],TCC_BUBBLE[108],TCC_CYCLE[108],TCC_EA0_ATOMIC[108],TCC_ATOMIC[109],TCC_BUBBLE[109],TCC_CYCLE[109],TCC_EA0_ATOMIC[109],TCC_ATOMIC[110],TCC_BUBBLE[110],TCC_CYCLE[110],TCC_EA0_ATOMIC[110],TCC_ATOMIC[111],TCC_BUBBLE[111],TCC_CYCLE[111],TCC_EA0_ATOMIC[111],TCC_ATOMIC[112],TCC_BUBBLE[112],TCC_CYCLE[112],TCC_EA0_ATOMIC[112],TCC_ATOMIC[113],TCC_BUBBLE[113],TCC_CYCLE[113],TCC_EA0_ATOMIC[113],TCC_ATOMIC[114],TCC_BUBBLE[114],TCC_CYCLE[114],TCC_EA0_ATOMIC[114],TCC_ATOMIC[115],TCC_BUBBLE[115],TCC_CYCLE[115],TCC_EA0_ATOMIC[115],TCC_ATOMIC[116],TCC_BUBBLE[116],TCC_CYCLE[116],TCC_EA0_ATOMIC[116],TCC_ATOMIC[117],TCC_BUBBLE[117],TCC_CYCLE[117],TCC_EA0_ATOMIC[117],TCC_ATOMIC[118],TCC_BUBBLE[118],TCC_CYCLE[118],TCC_EA0_ATOMIC[118],TCC_ATOMIC[119],TCC_BUBBLE[119],TCC_CYCLE[119],TCC_EA0_ATOMIC[119],TCC_ATOMIC[120],TCC_BUBBLE[120],TCC_CYCLE[120],TCC_EA0_ATOMIC[120],TCC_ATOMIC[121],TCC_BUBBLE[121],TCC_CYCLE[121],TCC_EA0_ATOMIC[121],TCC_ATOMIC[122],TCC_BUBBLE[122],TCC_CYCLE[122],TCC_EA0_ATOMIC[122],TCC_ATOMIC[123],TCC_BUBBLE[123],TCC_CYCLE[123],TCC_EA0_ATOMIC[123],TCC_ATOMIC[124],TCC_BUBBLE[124],TCC_CYCLE[124],TCC_EA0_ATOMIC[124],TCC_ATOMIC[125],TCC_BUBBLE[125],TCC_CYCLE[125],TCC_EA0_ATOMIC[125],TCC_ATOMIC[126],TCC_BUBBLE[126],TCC_CYCLE[126],TCC_EA0_ATOMIC[126],TCC_ATOMIC[127],TCC_BUBBLE[127],TCC_CYCLE[127],TCC_EA0_ATOMIC[127],Wave_Size_2,Correlation_ID_2,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,TA_FLAT_ATOMIC_WAVEFRONTS_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,TCC_ALL_TC_OP_INV_EVICT_sum,TCC_EA0_ATOMIC_sum,TCC_NORMAL_EVICT_sum,TCC_TOO_MANY_EA_WRREQS_STALL_sum,TCP_TCC_CC_READ_REQ_sum,TCP_TCC_CC_WRITE_REQ_sum,TCP_TCC_UC_ATOMIC_REQ_sum,TCP_TCC_UC_WRITE_REQ_sum,Wave_Size_3,Correlation_ID_3,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,TCC_EA0_ATOMIC_LEVEL_sum,TCC_EA0_RDREQ_LEVEL_sum,TCC_EA0_WRREQ_LEVEL_sum,TCC_EA0_WRREQ_STALL_sum,TCP_TCC_CC_ATOMIC_REQ_sum,TCP_TCC_RW_ATOMIC_REQ_sum,TCP_TCC_RW_READ_REQ_sum,TCP_TCC_RW_WRITE_REQ_sum,Wave_Size_4,Correlation_ID_4,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SPI_RA_REQ_NO_ALLOC,SPI_RA_REQ_NO_ALLOC_CSN,CPC_CPC_STAT_STALL,CPC_UTCL1_STALL_ON_TRANSLATION,CPF_CPF_STAT_IDLE,CPF_CPF_TCIU_IDLE,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,TA_BUFFER_TOTAL_CYCLES_sum,TCC_HIT_sum,TCC_MISS_sum,TCC_REQ_sum,TCC_STREAMING_REQ_sum,TCP_TOTAL_ACCESSES_sum,TCP_TOTAL_READ_sum,TCP_TOTAL_WRITE_sum,TCP_VOLATILE_sum,TD_ATOMIC_WAVEFRONT_sum,TD_STORE_WAVEFRONT_sum,Wave_Size_5,Correlation_ID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SQ_INST_CYCLES_SALU,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,CPC_ME1_DC0_SPI_BUSY,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,TCC_BUBBLE_sum,TCC_EA0_RDREQ_32B_sum,TCC_EA0_RDREQ_sum,TCC_EA0_RD_UNCACHED_32B_sum,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,TCP_TCC_READ_REQ_sum,TCP_TCC_WRITE_REQ_sum,Start_Timestamp,End_Timestamp
+0,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) 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diff --git a/tests/workloads/dispatch_2/MI300X_A1/sysinfo.csv b/tests/workloads/dispatch_2/MI300X_A1/sysinfo.csv
new file mode 100644
index 0000000000..4a17c06a03
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300X_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+dispatch_2,./tests/vcopy -n 1048576 -b 256 -i 3,SQ|LDS|SQC|TA|TD|TCP|TCC|SPI|CPC|CPF,Wed 29 May 2024 12:00:59 PM  (CDT),2,splinter-126-wr-c6,AMD Ryzen 9 7950X 16-Core Processor,"American Megatrends International, LLC.VS2683299N.FD",Ubuntu 22.04.4 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,114656528,,6.2.0-13611,113-MI3SRIOV-001,SPX,NPS1,MI300X_A1,gfx942,32,4096,304,4,32,64,1024,32,2100,1300,2100,1300,128,32,160,4,5324.8,8
diff --git a/tests/workloads/dispatch_2/MI300X_A1/timestamps.csv b/tests/workloads/dispatch_2/MI300X_A1/timestamps.csv
new file mode 100644
index 0000000000..0a2fbe3103
--- /dev/null
+++ b/tests/workloads/dispatch_2/MI300X_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,60633,1,964929,964929,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716250185980750,716250185996629,0
+2,60633,1,964929,964929,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716250186019509,716250186033267,0
+3,60633,1,964929,964929,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716250186053586,716250186067426,0
diff --git a/tests/workloads/dispatch_6_8/MI300A_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/dispatch_6_8/MI300A_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..c8a3f2a14d
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300A_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,11995,1,150124,150124,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73959589851375,73959589859667,0,206867.0,206867.0,16384.0,65536.0,27613.0,2207100.0
+1,11995,1,150124,150124,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73959589900530,73959589907260,0,184448.0,184448.0,16384.0,65536.0,13121.0,1048800.0
+2,11995,1,150124,150124,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73959589877855,73959589884505,0,168621.0,168621.0,16384.0,65536.0,13120.0,1049436.0
diff --git a/tests/workloads/dispatch_6_8/MI300A_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/dispatch_6_8/MI300A_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..a1a594b967
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300A_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,11995,1,150136,150136,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73959589851375,73959589859667,0,0.0,0.0,0.0
+1,11995,1,150136,150136,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73959589900530,73959589907260,0,0.0,0.0,0.0
+2,11995,1,150136,150136,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73959589877855,73959589884505,0,0.0,0.0,0.0
diff --git a/tests/workloads/dispatch_6_8/MI300A_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/dispatch_6_8/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..9aa94bc26d
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,150148,150148,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73959589851375,73959589859667,0,65536.0,290608.0,23238624.0
+1,11995,1,150148,150148,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73959589900530,73959589907260,0,65536.0,309298.0,24692072.0
+2,11995,1,150148,150148,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73959589877855,73959589884505,0,65536.0,224594.0,17941680.0
diff --git a/tests/workloads/dispatch_6_8/MI300A_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/dispatch_6_8/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..89afc0c5f8
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,150160,150160,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73959589851375,73959589859667,0,32768.0,538172.0,43049548.0
+1,11995,1,150160,150160,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73959589900530,73959589907260,0,32768.0,422108.0,33770064.0
+2,11995,1,150160,150160,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73959589877855,73959589884505,0,32768.0,422738.0,33812892.0
diff --git a/tests/workloads/dispatch_6_8/MI300A_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/dispatch_6_8/MI300A_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..595f89b3fe
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300A_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,11995,1,150173,150173,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73959589851375,73959589859667,0,207069.0,207069.0,113703.0,828276.0,16384.0,13743552.0,257327.0,0.0,55409116.0
+1,11995,1,150173,150173,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73959589900530,73959589907260,0,197151.0,197151.0,113095.0,788604.0,16384.0,11145685.0,202505.0,0.0,44969224.0
+2,11995,1,150173,150173,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73959589877855,73959589884505,0,174001.0,174001.0,93707.0,696004.0,16384.0,10515939.0,193956.0,0.0,42453732.0
diff --git a/tests/workloads/dispatch_6_8/MI300A_A1/log.txt b/tests/workloads/dispatch_6_8/MI300A_A1/log.txt
new file mode 100644
index 0000000000..b9c3044b2e
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300A_A1/log.txt
@@ -0,0 +1,234 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/dispatch_6_8/MI300A_A1
+Target: MI300A_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: ['6:8']
+Hardware Blocks: All
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LEVEL_WAVES
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_CVT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_WR
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F16
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_HITS
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_MISSES
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_MISSES_DUPLICATE
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_13.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[0]
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_14.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[1]
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_15.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[1]
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_16.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[1]
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_17.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[2]
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F64
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_EXP_GDS
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_VALU
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_SCA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_MISC
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_WR
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_RD
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_SALU
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_THREAD_CYCLES_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ADDR_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_UNALIGNED_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_EQ_64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_48
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ITEMS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_MEM_VIOLATIONS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ATOMIC_RETURN
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_IDX_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_RESTORED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_SAVED
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TCC_UC_WRITE_REQ_sum
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_BF16
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300A_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..2dfcf5315c
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..0c30d31fdc
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..ecfdacf4ef
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..d066205a36
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..0f485912b0
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_0.txt b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..f5ecead664
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD GRBM_COUNT GRBM_GUI_ACTIVE TCP_GATE_EN1_sum TCP_GATE_EN2_sum TCP_TD_TCP_STALL_CYCLES_sum TCP_TCR_TCP_STALL_CYCLES_sum TA_TA_BUSY_sum TA_BUFFER_WAVEFRONTS_sum TD_TD_BUSY_sum TD_TC_STALL_sum SPI_CSN_WINDOW_VALID SPI_CSN_BUSY CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE CPF_CPF_STAT_BUSY CPF_CPF_STAT_STALL TCC_CYCLE_sum TCC_BUSY_sum TCC_PROBE_sum TCC_PROBE_ALL_sum
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_1.txt b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..3a3112c601
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 GRBM_SPI_BUSY TCP_READ_TAGCONFLICT_STALL_CYCLES_sum TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum TCP_TA_TCP_STATE_READ_sum TA_BUFFER_READ_WAVEFRONTS_sum TA_BUFFER_WRITE_WAVEFRONTS_sum TD_SPI_STALL_sum TD_LOAD_WAVEFRONT_sum SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE CPC_CPC_TCIU_BUSY CPC_CPC_TCIU_IDLE CPF_CPF_TCIU_BUSY CPF_CPF_TCIU_STALL TCC_NC_REQ_sum TCC_UC_REQ_sum TCC_CC_REQ_sum TCC_RW_REQ_sum
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_10.txt b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..64882f5b14
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_11.txt b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..2b0abfc67f
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_12.txt b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..1583aee8df
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_13.txt b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_13.txt
new file mode 100644
index 0000000000..57e59f0857
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_13.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_ATOMIC[0] TCC_BUBBLE[0] TCC_CYCLE[0] TCC_EA0_ATOMIC[0] TCC_ATOMIC[1] TCC_BUBBLE[1] TCC_CYCLE[1] TCC_EA0_ATOMIC[1] TCC_ATOMIC[2] TCC_BUBBLE[2] TCC_CYCLE[2] TCC_EA0_ATOMIC[2] TCC_ATOMIC[3] TCC_BUBBLE[3] TCC_CYCLE[3] TCC_EA0_ATOMIC[3] TCC_ATOMIC[4] TCC_BUBBLE[4] TCC_CYCLE[4] TCC_EA0_ATOMIC[4] TCC_ATOMIC[5] TCC_BUBBLE[5] TCC_CYCLE[5] TCC_EA0_ATOMIC[5] TCC_ATOMIC[6] TCC_BUBBLE[6] TCC_CYCLE[6] TCC_EA0_ATOMIC[6] TCC_ATOMIC[7] TCC_BUBBLE[7] TCC_CYCLE[7] TCC_EA0_ATOMIC[7] TCC_ATOMIC[8] TCC_BUBBLE[8] TCC_CYCLE[8] TCC_EA0_ATOMIC[8] TCC_ATOMIC[9] TCC_BUBBLE[9] TCC_CYCLE[9] TCC_EA0_ATOMIC[9] TCC_ATOMIC[10] TCC_BUBBLE[10] TCC_CYCLE[10] TCC_EA0_ATOMIC[10] TCC_ATOMIC[11] TCC_BUBBLE[11] TCC_CYCLE[11] TCC_EA0_ATOMIC[11] TCC_ATOMIC[12] TCC_BUBBLE[12] TCC_CYCLE[12] TCC_EA0_ATOMIC[12] TCC_ATOMIC[13] TCC_BUBBLE[13] TCC_CYCLE[13] TCC_EA0_ATOMIC[13] TCC_ATOMIC[14] TCC_BUBBLE[14] TCC_CYCLE[14] TCC_EA0_ATOMIC[14] TCC_ATOMIC[15] TCC_BUBBLE[15] TCC_CYCLE[15] TCC_EA0_ATOMIC[15]
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_14.txt b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_14.txt
new file mode 100644
index 0000000000..b2671e31d6
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_14.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_ATOMIC_LEVEL[0] TCC_EA0_RDREQ[0] TCC_EA0_RDREQ_32B[0] TCC_EA0_RDREQ_LEVEL[0] TCC_EA0_ATOMIC_LEVEL[1] TCC_EA0_RDREQ[1] TCC_EA0_RDREQ_32B[1] TCC_EA0_RDREQ_LEVEL[1] TCC_EA0_ATOMIC_LEVEL[2] TCC_EA0_RDREQ[2] TCC_EA0_RDREQ_32B[2] TCC_EA0_RDREQ_LEVEL[2] TCC_EA0_ATOMIC_LEVEL[3] TCC_EA0_RDREQ[3] TCC_EA0_RDREQ_32B[3] TCC_EA0_RDREQ_LEVEL[3] TCC_EA0_ATOMIC_LEVEL[4] TCC_EA0_RDREQ[4] TCC_EA0_RDREQ_32B[4] TCC_EA0_RDREQ_LEVEL[4] TCC_EA0_ATOMIC_LEVEL[5] TCC_EA0_RDREQ[5] TCC_EA0_RDREQ_32B[5] TCC_EA0_RDREQ_LEVEL[5] TCC_EA0_ATOMIC_LEVEL[6] TCC_EA0_RDREQ[6] TCC_EA0_RDREQ_32B[6] TCC_EA0_RDREQ_LEVEL[6] TCC_EA0_ATOMIC_LEVEL[7] TCC_EA0_RDREQ[7] TCC_EA0_RDREQ_32B[7] TCC_EA0_RDREQ_LEVEL[7] TCC_EA0_ATOMIC_LEVEL[8] TCC_EA0_RDREQ[8] TCC_EA0_RDREQ_32B[8] TCC_EA0_RDREQ_LEVEL[8] TCC_EA0_ATOMIC_LEVEL[9] TCC_EA0_RDREQ[9] TCC_EA0_RDREQ_32B[9] TCC_EA0_RDREQ_LEVEL[9] TCC_EA0_ATOMIC_LEVEL[10] TCC_EA0_RDREQ[10] TCC_EA0_RDREQ_32B[10] TCC_EA0_RDREQ_LEVEL[10] TCC_EA0_ATOMIC_LEVEL[11] TCC_EA0_RDREQ[11] TCC_EA0_RDREQ_32B[11] TCC_EA0_RDREQ_LEVEL[11] TCC_EA0_ATOMIC_LEVEL[12] TCC_EA0_RDREQ[12] TCC_EA0_RDREQ_32B[12] TCC_EA0_RDREQ_LEVEL[12] TCC_EA0_ATOMIC_LEVEL[13] TCC_EA0_RDREQ[13] TCC_EA0_RDREQ_32B[13] TCC_EA0_RDREQ_LEVEL[13] TCC_EA0_ATOMIC_LEVEL[14] TCC_EA0_RDREQ[14] TCC_EA0_RDREQ_32B[14] TCC_EA0_RDREQ_LEVEL[14] TCC_EA0_ATOMIC_LEVEL[15] TCC_EA0_RDREQ[15] TCC_EA0_RDREQ_32B[15] TCC_EA0_RDREQ_LEVEL[15]
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_15.txt b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_15.txt
new file mode 100644
index 0000000000..2252a30027
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_15.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_WRREQ[0] TCC_EA0_WRREQ_64B[0] TCC_EA0_WRREQ_LEVEL[0] TCC_HIT[0] TCC_EA0_WRREQ[1] TCC_EA0_WRREQ_64B[1] TCC_EA0_WRREQ_LEVEL[1] TCC_HIT[1] TCC_EA0_WRREQ[2] TCC_EA0_WRREQ_64B[2] TCC_EA0_WRREQ_LEVEL[2] TCC_HIT[2] TCC_EA0_WRREQ[3] TCC_EA0_WRREQ_64B[3] TCC_EA0_WRREQ_LEVEL[3] TCC_HIT[3] TCC_EA0_WRREQ[4] TCC_EA0_WRREQ_64B[4] TCC_EA0_WRREQ_LEVEL[4] TCC_HIT[4] TCC_EA0_WRREQ[5] TCC_EA0_WRREQ_64B[5] TCC_EA0_WRREQ_LEVEL[5] TCC_HIT[5] TCC_EA0_WRREQ[6] TCC_EA0_WRREQ_64B[6] TCC_EA0_WRREQ_LEVEL[6] TCC_HIT[6] TCC_EA0_WRREQ[7] TCC_EA0_WRREQ_64B[7] TCC_EA0_WRREQ_LEVEL[7] TCC_HIT[7] TCC_EA0_WRREQ[8] TCC_EA0_WRREQ_64B[8] TCC_EA0_WRREQ_LEVEL[8] TCC_HIT[8] TCC_EA0_WRREQ[9] TCC_EA0_WRREQ_64B[9] TCC_EA0_WRREQ_LEVEL[9] TCC_HIT[9] TCC_EA0_WRREQ[10] TCC_EA0_WRREQ_64B[10] TCC_EA0_WRREQ_LEVEL[10] TCC_HIT[10] TCC_EA0_WRREQ[11] TCC_EA0_WRREQ_64B[11] TCC_EA0_WRREQ_LEVEL[11] TCC_HIT[11] TCC_EA0_WRREQ[12] TCC_EA0_WRREQ_64B[12] TCC_EA0_WRREQ_LEVEL[12] TCC_HIT[12] TCC_EA0_WRREQ[13] TCC_EA0_WRREQ_64B[13] TCC_EA0_WRREQ_LEVEL[13] TCC_HIT[13] TCC_EA0_WRREQ[14] TCC_EA0_WRREQ_64B[14] TCC_EA0_WRREQ_LEVEL[14] TCC_HIT[14] TCC_EA0_WRREQ[15] TCC_EA0_WRREQ_64B[15] TCC_EA0_WRREQ_LEVEL[15] TCC_HIT[15]
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_16.txt b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_16.txt
new file mode 100644
index 0000000000..44779710a7
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_16.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_MISS[0] TCC_READ[0] TCC_REQ[0] TCC_RW_REQ[0] TCC_MISS[1] TCC_READ[1] TCC_REQ[1] TCC_RW_REQ[1] TCC_MISS[2] TCC_READ[2] TCC_REQ[2] TCC_RW_REQ[2] TCC_MISS[3] TCC_READ[3] TCC_REQ[3] TCC_RW_REQ[3] TCC_MISS[4] TCC_READ[4] TCC_REQ[4] TCC_RW_REQ[4] TCC_MISS[5] TCC_READ[5] TCC_REQ[5] TCC_RW_REQ[5] TCC_MISS[6] TCC_READ[6] TCC_REQ[6] TCC_RW_REQ[6] TCC_MISS[7] TCC_READ[7] TCC_REQ[7] TCC_RW_REQ[7] TCC_MISS[8] TCC_READ[8] TCC_REQ[8] TCC_RW_REQ[8] TCC_MISS[9] TCC_READ[9] TCC_REQ[9] TCC_RW_REQ[9] TCC_MISS[10] TCC_READ[10] TCC_REQ[10] TCC_RW_REQ[10] TCC_MISS[11] TCC_READ[11] TCC_REQ[11] TCC_RW_REQ[11] TCC_MISS[12] TCC_READ[12] TCC_REQ[12] TCC_RW_REQ[12] TCC_MISS[13] TCC_READ[13] TCC_REQ[13] TCC_RW_REQ[13] TCC_MISS[14] TCC_READ[14] TCC_REQ[14] TCC_RW_REQ[14] TCC_MISS[15] TCC_READ[15] TCC_REQ[15] TCC_RW_REQ[15]
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_17.txt b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_17.txt
new file mode 100644
index 0000000000..c4a2e0f69d
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_17.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_TAG_STALL[0] TCC_TOO_MANY_EA_WRREQS_STALL[0] TCC_WRITE[0] TCC_TAG_STALL[1] TCC_TOO_MANY_EA_WRREQS_STALL[1] TCC_WRITE[1] TCC_TAG_STALL[2] TCC_TOO_MANY_EA_WRREQS_STALL[2] TCC_WRITE[2] TCC_TAG_STALL[3] TCC_TOO_MANY_EA_WRREQS_STALL[3] TCC_WRITE[3] TCC_TAG_STALL[4] TCC_TOO_MANY_EA_WRREQS_STALL[4] TCC_WRITE[4] TCC_TAG_STALL[5] TCC_TOO_MANY_EA_WRREQS_STALL[5] TCC_WRITE[5] TCC_TAG_STALL[6] TCC_TOO_MANY_EA_WRREQS_STALL[6] TCC_WRITE[6] TCC_TAG_STALL[7] TCC_TOO_MANY_EA_WRREQS_STALL[7] TCC_WRITE[7] TCC_TAG_STALL[8] TCC_TOO_MANY_EA_WRREQS_STALL[8] TCC_WRITE[8] TCC_TAG_STALL[9] TCC_TOO_MANY_EA_WRREQS_STALL[9] TCC_WRITE[9] TCC_TAG_STALL[10] TCC_TOO_MANY_EA_WRREQS_STALL[10] TCC_WRITE[10] TCC_TAG_STALL[11] TCC_TOO_MANY_EA_WRREQS_STALL[11] TCC_WRITE[11] TCC_TAG_STALL[12] TCC_TOO_MANY_EA_WRREQS_STALL[12] TCC_WRITE[12] TCC_TAG_STALL[13] TCC_TOO_MANY_EA_WRREQS_STALL[13] TCC_WRITE[13] TCC_TAG_STALL[14] TCC_TOO_MANY_EA_WRREQS_STALL[14] TCC_WRITE[14] TCC_TAG_STALL[15] TCC_TOO_MANY_EA_WRREQS_STALL[15] TCC_WRITE[15]
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_2.txt b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..359a6aa50c
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 TCP_VOLATILE_sum TCP_TOTAL_ACCESSES_sum TCP_TOTAL_READ_sum TCP_TOTAL_WRITE_sum TA_BUFFER_ATOMIC_WAVEFRONTS_sum TA_BUFFER_TOTAL_CYCLES_sum TD_ATOMIC_WAVEFRONT_sum TD_STORE_WAVEFRONT_sum SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION CPF_CPF_STAT_IDLE CPF_CPF_TCIU_IDLE TCC_REQ_sum TCC_STREAMING_REQ_sum TCC_HIT_sum TCC_MISS_sum
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_3.txt b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..528e387f62
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS TCP_TOTAL_ATOMIC_WITH_RET_sum TCP_TOTAL_ATOMIC_WITHOUT_RET_sum TCP_TOTAL_WRITEBACK_INVALIDATES_sum TCP_TOTAL_CACHE_ACCESSES_sum TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES_sum TD_COALESCABLE_WAVEFRONT_sum SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE CPF_CMP_UTCL1_STALL_ON_TRANSLATION TCC_READ_sum TCC_WRITE_sum TCC_ATOMIC_sum TCC_WRITEBACK_sum
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_4.txt b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..913a384f13
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAIT_ANY SQ_WAIT_INST_ANY SQ_ACTIVE_INST_ANY SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU TCP_UTCL1_TRANSLATION_MISS_sum TCP_UTCL1_TRANSLATION_HIT_sum TCP_UTCL1_PERMISSION_MISS_sum TCP_UTCL1_REQUEST_sum TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_TOTAL_WAVEFRONTS_sum SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE TCC_EA0_WRREQ_sum TCC_EA0_WRREQ_64B_sum TCC_EA0_WR_UNCACHED_32B_sum TCC_EA0_WRREQ_DRAM_sum
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_5.txt b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..38eac1ee86
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_SCA SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU TCP_TCC_READ_REQ_sum TCP_TCC_WRITE_REQ_sum TCP_TCC_ATOMIC_WITH_RET_REQ_sum TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN CPC_ME1_DC0_SPI_BUSY TCC_EA0_RDREQ_sum TCC_EA0_RDREQ_32B_sum TCC_BUBBLE_sum TCC_EA0_RD_UNCACHED_32B_sum
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_6.txt b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..13d5b97fcc
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_THREAD_CYCLES_VALU SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 TCP_TCC_NC_READ_REQ_sum TCP_TCC_NC_WRITE_REQ_sum TCP_TCC_NC_ATOMIC_REQ_sum TCP_TCC_UC_READ_REQ_sum TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN TCC_EA0_RDREQ_DRAM_sum TCC_TAG_STALL_sum TCC_NORMAL_WRITEBACK_sum TCC_ALL_TC_OP_WB_WRITEBACK_sum
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_7.txt b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..f4445703b7
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED TCP_TCC_UC_WRITE_REQ_sum TCP_TCC_UC_ATOMIC_REQ_sum TCP_TCC_CC_READ_REQ_sum TCP_TCC_CC_WRITE_REQ_sum TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR TCC_NORMAL_EVICT_sum TCC_ALL_TC_OP_INV_EVICT_sum TCC_TOO_MANY_EA_WRREQS_STALL_sum TCC_EA0_ATOMIC_sum
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_8.txt b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..573282eed4
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES TCP_TCC_CC_ATOMIC_REQ_sum TCP_TCC_RW_READ_REQ_sum TCP_TCC_RW_WRITE_REQ_sum TCP_TCC_RW_ATOMIC_REQ_sum SPI_VWC_CSC_WR SPI_RA_BULKY_CU_FULL_CSN TCC_EA0_RDREQ_LEVEL_sum TCC_EA0_WRREQ_LEVEL_sum TCC_EA0_ATOMIC_LEVEL_sum TCC_EA0_WRREQ_STALL_sum
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_9.txt b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..f524c6f01c
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ TCP_PENDING_STALL_CYCLES_sum
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/timestamps.txt b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..73a5a3d86f
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300A_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300A_A1/pmc_perf.csv b/tests/workloads/dispatch_6_8/MI300A_A1/pmc_perf.csv
new file mode 100644
index 0000000000..c0f714e770
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300A_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SQ_INSTS_BRANCH,SQ_INSTS_SENDMSG,SQ_WAIT_ANY,SQ_WAIT_INST_ANY,SQ_ACTIVE_INST_ANY,SQ_ACTIVE_INST_VMEM,SQ_ACTIVE_INST_LDS,SQ_ACTIVE_INST_VALU,SPI_RA_WAVE_SIMD_FULL_CSN,SPI_RA_VGPR_SIMD_FULL_CSN,CPC_CPC_UTCL2IU_STALL,CPC_ME1_BUSY_FOR_PACKET_DECODE,TA_ADDR_STALLED_BY_TC_CYCLES_sum,TA_TOTAL_WAVEFRONTS_sum,TCC_EA0_WRREQ_64B_sum,TCC_EA0_WRREQ_DRAM_sum,TCC_EA0_WRREQ_sum,TCC_EA0_WR_UNCACHED_32B_sum,TCP_UTCL1_PERMISSION_MISS_sum,TCP_UTCL1_REQUEST_sum,TCP_UTCL1_TRANSLATION_HIT_sum,TCP_UTCL1_TRANSLATION_MISS_sum,Wave_Size_1,Correlation_ID_1,XCC_Index,TCC_EA0_WRREQ[0],TCC_EA0_WRREQ_64B[0],TCC_EA0_WRREQ_LEVEL[0],TCC_HIT[0],TCC_EA0_WRREQ[1],TCC_EA0_WRREQ_64B[1],TCC_EA0_WRREQ_LEVEL[1],TCC_HIT[1],TCC_EA0_WRREQ[2],TCC_EA0_WRREQ_64B[2],TCC_EA0_WRREQ_LEVEL[2],TCC_HIT[2],TCC_EA0_WRREQ[3],TCC_EA0_WRREQ_64B[3],TCC_EA0_WRREQ_LEVEL[3],TCC_HIT[3],TCC_EA0_WRREQ[4],TCC_EA0_WRREQ_64B[4],TCC_EA0_WRREQ_LEVEL[4],TCC_HIT[4],TCC_EA0_WRREQ[5],TCC_EA0_WRREQ_64B[5],TCC_EA0_WRREQ_LEVEL[5],TCC_HIT[5],TCC_EA0_WRREQ[6],TCC_EA0_WRREQ_64B[6],TCC_EA0_WRREQ_LEVEL[6],TCC_HIT[6],TCC_EA0_WRREQ[7],TCC_EA0_WRREQ_64B[7],TCC_EA0_WRREQ_LEVEL[7],TCC_HIT[7],TCC_EA0_WRREQ[8],TCC_EA0_WRREQ_64B[8],TCC_EA0_WRREQ_LEVEL[8],TCC_HIT[8],TCC_EA0_WRREQ[9],TCC_EA0_WRREQ_64B[9],TCC_EA0_WRREQ_LEVEL[9],TCC_HIT[9],TCC_EA0_WRREQ[10],TCC_EA0_WRREQ_64B[10],TCC_EA0_WRREQ_LEVEL[10],TCC_HIT[10],TCC_EA0_WRREQ[11],TCC_EA0_WRREQ_64B[11],TCC_EA0_WRREQ_LEVEL[11],TCC_HIT[11],TCC_EA0_WRREQ[12],TCC_EA0_WRREQ_64B[12],TCC_EA0_WRREQ_LEVEL[12],TCC_HIT[12],TCC_EA0_WRREQ[13],TCC_EA0_WRREQ_64B[13],TCC_EA0_WRREQ_LEVEL[13],TCC_HIT[13],TCC_EA0_WRREQ[14],TCC_EA0_WRREQ_64B[14],TCC_EA0_WRREQ_LEVEL[14],TCC_HIT[14],TCC_EA0_WRREQ[15],TCC_EA0_WRREQ_64B[15],TCC_EA0_WRREQ_LEVEL[15],TCC_HIT[15],TCC_EA0_WRREQ[16],TCC_EA0_WRREQ_64B[16],TCC_EA0_WRREQ_LEVEL[16],TCC_HIT[16],TCC_EA0_WRREQ[17],TCC_EA0_WRREQ_64B[17],TCC_EA0_WRREQ_LEVEL[17],TCC_HIT[17],TCC_EA0_WRREQ[18],TCC_EA0_WRREQ_64B[18],TCC_EA0_WRREQ_LEVEL[18],TCC_HIT[18],TCC_EA0_WRREQ[19],TCC_EA0_WRREQ_64B[19],TCC_EA0_WRREQ_LEVEL[19],TCC_HIT[19],TCC_EA0_WRREQ[20],TCC_EA0_WRREQ_64B[20],TCC_EA0_WRREQ_LEVEL[20],TCC_HIT[20],TCC_EA0_WRREQ[21],TCC_EA0_WRREQ_64B[21],TCC_EA0_WRREQ_LEVEL[21],TCC_HIT[21],TCC_EA0_WRREQ[22],TCC_EA0_WRREQ_64B[22],TCC_EA0_WRREQ_LEVEL[22],TCC_HIT[22],TCC_EA0_WRREQ[23],TCC_EA0_WRREQ_64B[23],TCC_EA0_WRREQ_LEVEL[23],TCC_HIT[23],TCC_EA0_WRREQ[24],TCC_EA0_WRREQ_64B[24],TCC_EA0_WRREQ_LEVEL[24],TCC_HIT[24],TCC_EA0_WRREQ[25],TCC_EA0_WRREQ_64B[25],TCC_EA0_WRREQ_LEVEL[25],TCC_HIT[25],TCC_EA0_WRREQ[26],TCC_EA0_WRREQ_64B[26],TCC_EA0_WRREQ_LEVEL[26],TCC_HIT[26],TCC_EA0_WRREQ[27],TCC_EA0_WRREQ_64B[27],TCC_EA0_WRREQ_LEVEL[27],TCC_HIT[27],TCC_EA0_WRREQ[28],TCC_EA0_WRREQ_64B[28],TCC_EA0_WRREQ_LEVEL[28],TCC_HIT[28],TCC_EA0_WRREQ[29],TCC_EA0_WRREQ_64B[29],TCC_EA0_WRREQ_LEVEL[29],TCC_HIT[29],TCC_EA0_WRREQ[30],TCC_EA0_WRREQ_64B[30],TCC_EA0_WRREQ_LEVEL[30],TCC_HIT[30],TCC_EA0_WRREQ[31],TCC_EA0_WRREQ_64B[31],TCC_EA0_WRREQ_LEVEL[31],TCC_HIT[31],TCC_EA0_WRREQ[32],TCC_EA0_WRREQ_64B[32],TCC_EA0_WRREQ_LEVEL[32],TCC_HIT[32],TCC_EA0_WRREQ[33],TCC_EA0_WRREQ_64B[33],TCC_EA0_WRREQ_LEVEL[33],TCC_HIT[33],TCC_EA0_WRREQ[34],TCC_EA0_WRREQ_64B[34],TCC_EA0_WRREQ_LEVEL[34],TCC_HIT[34],TCC_EA0_WRREQ[35],TCC_EA0_WRREQ_64B[35],TCC_EA0_WRREQ_LEVEL[35],TCC_HIT[35],TCC_EA0_WRREQ[36],TCC_EA0_WRREQ_64B[36],TCC_EA0_WRREQ_LEVEL[36],TCC_HIT[36],TCC_EA0_WRREQ[37],TCC_EA0_WRREQ_64B[37],TCC_EA0_WRREQ_LEVEL[37],TCC_HIT[37],TCC_EA0_WRREQ[38],TCC_EA0_WRREQ_64B[38],TCC_EA0_WRREQ_LEVEL[38],TCC_HIT[38],TCC_EA0_WRREQ[39],TCC_EA0_WRREQ_64B[39],TCC_EA0_WRREQ_LEVEL[39],TCC_HIT[39],TCC_EA0_WRREQ[40],TCC_EA0_WRREQ_64B[40],TCC_EA0_WRREQ_LEVEL[40],TCC_HIT[40],TCC_EA0_WRREQ[41],TCC_EA0_WRREQ_64B[41],TCC_EA0_WRREQ_LEVEL[41],TCC_HIT[41],TCC_EA0_WRREQ[42],TCC_EA0_WRREQ_64B[42],TCC_EA0_WRREQ_LEVEL[42],TCC_HIT[42],TCC_EA0_WRREQ[43],TCC_EA0_WRREQ_64B[43],TCC_EA0_WRREQ_LEVEL[43],TCC_HIT[43],TCC_EA0_WRREQ[44],TCC_EA0_WRREQ_64B[44],TCC_EA0_WRREQ_LEVEL[44],TCC_HIT[44],TCC_EA0_WRREQ[45],TCC_EA0_WRREQ_64B[45],TCC_EA0_WRREQ_LEVEL[45],TCC_HIT[45],TCC_EA0_WRREQ[46],TCC_EA0_WRREQ_64B[46],TCC_EA0_WRREQ_LEVEL[46],TCC_HIT[46],TCC_EA0_WRREQ[47],TCC_EA0_WRREQ_64B[47],TCC_EA0_WRREQ_LEVEL[47],TCC_HIT[47],TCC_EA0_WRREQ[48],TCC_EA0_WRREQ_64B[48],TCC_EA0_WRREQ_LEVEL[48],TCC_HIT[48],TCC_EA0_WRREQ[49],TCC_EA0_WRREQ_64B[49],TCC_EA0_WRREQ_LEVEL[49],TCC_HIT[49],TCC_EA0_WRREQ[50],TCC_EA0_WRREQ_64B[50],TCC_EA0_WRREQ_LEVEL[50],TCC_HIT[50],TCC_EA0_WRREQ[51],TCC_EA0_WRREQ_64B[51],TCC_EA0_WRREQ_LEVEL[51],TCC_HIT[51],TCC_EA0_WRREQ[52],TCC_EA0_WRREQ_64B[52],TCC_EA0_WRREQ_LEVEL[52],TCC_HIT[52],TCC_EA0_WRREQ[53],TCC_EA0_WRREQ_64B[53],TCC_EA0_WRREQ_LEVEL[53],TCC_HIT[53],TCC_EA0_WRREQ[54],TCC_EA0_WRREQ_64B[54],TCC_EA0_WRREQ_LEVEL[54],TCC_HIT[54],TCC_EA0_WRREQ[55],TCC_EA0_WRREQ_64B[55],TCC_EA0_WRREQ_LEVEL[55],TCC_HIT[55],TCC_EA0_WRREQ[56],TCC_EA0_WRREQ_64B[56],TCC_EA0_WRREQ_LEVEL[56],TCC_HIT[56],TCC_EA0_WRREQ[57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CED_WRITE_CYCLES_sum,TCC_ATOMIC_sum,TCC_READ_sum,TCC_WRITEBACK_sum,TCC_WRITE_sum,TCP_TOTAL_ATOMIC_WITHOUT_RET_sum,TCP_TOTAL_ATOMIC_WITH_RET_sum,TCP_TOTAL_CACHE_ACCESSES_sum,TCP_TOTAL_WRITEBACK_INVALIDATES_sum,TD_COALESCABLE_WAVEFRONT_sum,Wave_Size_5,Correlation_ID_5,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,TA_FLAT_ATOMIC_WAVEFRONTS_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,TCC_ALL_TC_OP_INV_EVICT_sum,TCC_EA0_ATOMIC_sum,TCC_NORMAL_EVICT_sum,TCC_TOO_MANY_EA_WRREQS_STALL_sum,TCP_TCC_CC_READ_REQ_sum,TCP_TCC_CC_WRITE_REQ_sum,TCP_TCC_UC_ATOMIC_REQ_sum,TCP_TCC_UC_WRITE_REQ_sum,Wave_Size_6,Correlation_ID_6,XCC_Index_6,TCC_MISS[0],TCC_READ[0],TCC_REQ[0],TCC_RW_REQ[0],TCC_MISS[1],TCC_READ[1],TCC_REQ[1],TCC_RW_REQ[1],TCC_MISS[2],TCC_READ[2],TCC_REQ[2],TCC_RW_REQ[2],TCC_MISS[3],TCC_READ[3],TCC_REQ[3],TCC_RW_REQ[3],TCC_MISS[4],TCC_READ[4],TCC_REQ[4],TCC_RW_REQ[4],TCC_MISS[5],TCC_READ[5],TCC_REQ[5],TCC_RW_REQ[5],TCC_MISS[6],TCC_READ[6],TCC_REQ[6],TCC_RW_REQ[6],TCC_MISS[7],TCC_READ[7],TCC_REQ[7],TCC_RW_REQ[7],TCC_MISS[8],TCC_READ[8],TCC_REQ[8],TCC_RW_REQ[8],TCC_MISS[9],TCC_READ[9],TCC_REQ[9],TCC_RW_REQ[9],TCC_MISS[10],TCC_READ[10],TCC_REQ[10],TCC_RW_REQ[10],TCC_MISS[11],TCC_READ[11],TCC_REQ[11],TCC_RW_REQ[11],TCC_MISS[12],TCC_READ[12],TCC_REQ[12],TCC_RW_REQ[12],TCC_MISS[13],TCC_READ[13],TCC_REQ[13],TCC_RW_REQ[13],TCC_MISS[14],TCC_READ[14],TCC_REQ[14],TCC_RW_REQ[14],TCC_MISS[15],TCC_READ[15],TCC_REQ[15],TCC_RW_REQ[15],TCC_MISS[16],TCC_READ[16],TCC_REQ[16],TCC_RW_REQ[16],TCC_MISS[17],TCC_READ[17],TCC_REQ[17],TCC_RW_REQ[17],TCC_MISS[18],TCC_READ[18],TCC_REQ[18],TCC_RW_REQ[18],TCC_MISS[19],TCC_READ[19],TCC_REQ[19],TCC_RW_REQ[19],TCC_MISS[20],TCC_READ[20],TCC_REQ[20],TCC_RW_REQ[20],TCC_MISS[21],TCC_READ[21],TCC_REQ[21],TCC_RW_REQ[21],TCC_MISS[22],TCC_READ[22],TCC_REQ[22],TCC_RW_REQ[22],TCC_MISS[23],TCC_READ[23],TCC_REQ[23],TCC_RW_REQ[23],TCC_MISS[24],TCC_READ[24],TCC_REQ[24],TCC_RW_REQ[24],TCC_MISS[25],TCC_READ[25],TCC_REQ[25],TCC_RW_REQ[25],TCC_MISS[26],TCC_READ[26],TCC_REQ[26],TCC_RW_REQ[26],TCC_MISS[27],TCC_READ[27],TCC_REQ[27],TCC_RW_REQ[27],TCC_MISS[28],TCC_READ[28],TCC_REQ[28],TCC_RW_REQ[28],TCC_MISS[29],TCC_READ[29],TCC_REQ[29],TCC_RW_REQ[29],TCC_MISS[30],TCC_READ[30],TCC_REQ[30],TCC_RW_REQ[30],TCC_MISS[31],TCC_READ[31],TCC_REQ[31],TCC_RW_REQ[31],TCC_MISS[32],TCC_READ[32],TCC_REQ[32],TCC_RW_REQ[32],TCC_MISS[33],TCC_READ[33],TCC_REQ[33],TCC_RW_REQ[33],TCC_MISS[34],TCC_READ[34],TCC_REQ[34],TCC_RW_REQ[34],TCC_MISS[35],TCC_READ[35],TCC_REQ[35],TCC_RW_REQ[35],TCC_MISS[36],TCC_READ[36],TCC_REQ[36],TCC_RW_REQ[36],TCC_MISS[37],TCC_READ[37],TCC_REQ[37],TCC_RW_REQ[37],TCC_MISS[38],TCC_READ[38],TCC_REQ[38],TCC_RW_REQ[38],TCC_MISS[39],TCC_READ[39],TCC_REQ[39],TCC_RW_REQ[39],TCC_MISS[40],TCC_READ[40],TCC_REQ[40],TCC_RW_REQ[40],TCC_MISS[41],TCC_READ[41],TCC_REQ[41],TCC_RW_REQ[41],TCC_MISS[42],TCC_READ[42],TCC_REQ[42],TCC_RW_REQ[42],TCC_MISS[43],TCC_READ[43],TCC_REQ[43],TCC_RW_REQ[43],TCC_MISS[44],TCC_READ[44],TCC_REQ[44],TCC_RW_REQ[44],TCC_MISS[45],TCC_READ[45],TCC_REQ[45],TCC_RW_REQ[45],TCC_MISS[46],TCC_READ[46],TCC_REQ[46],TCC_RW_REQ[46],TCC_MISS[47],TCC_READ[47],TCC_REQ[47],TCC_RW_REQ[47],TCC_MISS[48],TCC_READ[48],TCC_REQ[48],TCC_RW_REQ[48],TCC_MISS[49],TCC_READ[49],TCC_REQ[49],TCC_RW_REQ[49],TCC_MISS[50],TCC_READ[50],TCC_REQ[50],TCC_RW_REQ[50],TCC_MISS[51],TCC_READ[51],TCC_REQ[51],TCC_RW_REQ[51],TCC_MISS[52],TCC_READ[52],TCC_REQ[52],TCC_RW_REQ[52],TCC_MISS[53],TCC_READ[53],TCC_REQ[53],TCC_RW_REQ[53],TCC_MISS[54],TCC_READ[54],TCC_REQ[54],TCC_RW_REQ[54],TCC_MISS[55],TCC_READ[55],TCC_REQ[55],TCC_RW_REQ[55],TCC_MISS[56],TCC_READ[56],TCC_REQ[56],TCC_RW_REQ[56],TCC_MISS[57],TCC_READ[57],TCC_REQ[57],TCC_RW_REQ[57],TCC_MISS[58],TCC_READ[58],TCC_REQ[58],TCC_RW_REQ[58],TCC_MISS[59],TCC_READ[59],TCC_REQ[59],TCC_RW_REQ[59],TCC_MISS[60],TCC_READ[60],TCC_REQ[60],TCC_RW_REQ[60],TCC_MISS[61],TCC_READ[61],TCC_REQ[61],TCC_RW_REQ[61],TCC_MISS[62],TCC_READ[62],TCC_REQ[62],TCC_RW_REQ[62],TCC_MISS[63],TCC_READ[63],TCC_REQ[63],TCC_RW_REQ[63],TCC_MISS[64],TCC_READ[64],TCC_REQ[64],TCC_RW_REQ[64],TCC_MISS[65],TCC_READ[65],TCC_REQ[65],TCC_RW_REQ[65],TCC_MISS[66],TCC_READ[66],TCC_REQ[66],TCC_RW_REQ[66],TCC_MISS[67],TCC_READ[67],TCC_REQ[67],TCC_RW_REQ[67],TCC_MISS[68],TCC_READ[68],TCC_REQ[68],TCC_RW_REQ[68],TCC_MISS[69],TCC_READ[69],TCC_REQ[69],TCC_RW_REQ[69],TCC_MISS[70],TCC_READ[70],TCC_REQ[70],TCC_RW_REQ[70],TCC_MISS[71],TCC_READ[71],TCC_REQ[71],TCC_RW_REQ[71],TCC_MISS[72],TCC_READ[72],TCC_REQ[72],TCC_RW_REQ[72],TCC_MISS[73],TCC_READ[73],TCC_REQ[73],TCC_RW_REQ[73],TCC_MISS[74],TCC_READ[74],TCC_REQ[74],TCC_RW_REQ[74],TCC_MISS[75],TCC_READ[75],TCC_REQ[75],TCC_RW_REQ[75],TCC_MISS[76],TCC_READ[76],TCC_REQ[76],TCC_RW_REQ[76],TCC_MISS[77],TCC_READ[77],TCC_REQ[77],TCC_RW_REQ[77],TCC_MISS[78],TCC_READ[78],TCC_REQ[78],TCC_RW_REQ[78],TCC_MISS[79],TCC_READ[79],TCC_REQ[79],TCC_RW_REQ[79],TCC_MISS[80],TCC_READ[80],TCC_REQ[80],TCC_RW_REQ[80],TCC_MISS[81],TCC_READ[81],TCC_REQ[81],TCC_RW_REQ[81],TCC_MISS[82],TCC_READ[82],TCC_REQ[82],TCC_RW_REQ[82],TCC_MISS[83],TCC_READ[83],TCC_REQ[83],TCC_RW_REQ[83],TCC_MISS[84],TCC_READ[84],TCC_REQ[84],TCC_RW_REQ[84],TCC_MISS[85],TCC_READ[85],TCC_REQ[85],TCC_RW_REQ[85],TCC_MISS[86],TCC_READ[86],TCC_REQ[86],TCC_RW_REQ[86],TCC_MISS[87],TCC_READ[87],TCC_REQ[87],TCC_RW_REQ[87],TCC_MISS[88],TCC_READ[88],TCC_REQ[88],TCC_RW_REQ[88],TCC_MISS[89],TCC_READ[89],TCC_REQ[89],TCC_RW_REQ[89],TCC_MISS[90],TCC_READ[90],TCC_REQ[90],TCC_RW_REQ[90],TCC_MISS[91],TCC_READ[91],TCC_REQ[91],TCC_RW_REQ[91],TCC_MISS[92],TCC_READ[92],TCC_REQ[92],TCC_RW_REQ[92],TCC_MISS[93],TCC_READ[93],TCC_REQ[93],TCC_RW_REQ[93],TCC_MISS[94],TCC_READ[94],TCC_REQ[94],TCC_RW_REQ[94],TCC_MISS[95],TCC_READ[95],TCC_REQ[95],TCC_RW_REQ[95],Wave_Size_7,Correlation_ID_7,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SPI_RA_REQ_NO_ALLOC,SPI_RA_REQ_NO_ALLOC_CSN,CPC_CPC_STAT_STALL,CPC_UTCL1_STALL_ON_TRANSLATION,CPF_CPF_STAT_IDLE,CPF_CPF_TCIU_IDLE,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,TA_BUFFER_TOTAL_CYCLES_sum,TCC_HIT_sum,TCC_MISS_sum,TCC_REQ_sum,TCC_STREAMING_REQ_sum,TCP_TOTAL_ACCESSES_sum,TCP_TOTAL_READ_sum,TCP_TOTAL_WRITE_sum,TCP_VOLATILE_sum,TD_ATOMIC_WAVEFRONT_sum,TD_STORE_WAVEFRONT_sum,Wave_Size_8,Correlation_ID_8,XCC_Index_8,TCC_ATOMIC[0],TCC_BUBBLE[0],TCC_CYCLE[0],TCC_EA0_ATOMIC[0],TCC_ATOMIC[1],TCC_BUBBLE[1],TCC_CYCLE[1],TCC_EA0_ATOMIC[1],TCC_ATOMIC[2],TCC_BUBBLE[2],TCC_CYCLE[2],TCC_EA0_ATOMIC[2],TCC_ATOMIC[3],TCC_BUBBLE[3],TCC_CYCLE[3],TCC_EA0_ATOMIC[3],TCC_ATOMIC[4],TCC_BUBBLE[4],TCC_CYCLE[4],TCC_EA0_ATOMIC[4],TCC_ATOMIC[5],TCC_BUBBLE[5],TCC_CYCLE[5],TCC_EA0_ATOMIC[5],TCC_ATOMIC[6],TCC_BUBBLE[6],TCC_CYCLE[6],TCC_EA0_ATOMIC[6],TCC_ATOMIC[7],TCC_BUBBLE[7],TCC_CYCLE[7],TCC_EA0_ATOMIC[7],TCC_ATOMIC[8],TCC_BUBBLE[8],TCC_CYCLE[8],TCC_EA0_ATOMIC[8],TCC_ATOMIC[9],TCC_BUBBLE[9],TCC_CYCLE[9],TCC_EA0_ATOMIC[9],TCC_ATOMIC[10],TCC_BUBBLE[10],TCC_CYCLE[10],TCC_EA0_ATOMIC[10],TCC_ATOMIC[11],TCC_BUBBLE[11],TCC_CYCLE[11],TCC_EA0_ATOMIC[11],TCC_ATOMIC[12],TCC_BUBBLE[12],TCC_CYCLE[12],TCC_EA0_ATOMIC[12],TCC_ATOMIC[13],TCC_BUBBLE[13],TCC_CYCLE[13],TCC_EA0_ATOMIC[13],TCC_ATOMIC[14],TCC_BUBBLE[14],TCC_CYCLE[14],TCC_EA0_ATOMIC[14],TCC_ATOMIC[15],TCC_BUBBLE[15],TCC_CYCLE[15],TCC_EA0_ATOMIC[15],TCC_ATOMIC[16],TCC_BUBBLE[16],TCC_CYCLE[16],TCC_EA0_ATOMIC[16],TCC_ATOMIC[17],TCC_BUBBLE[17],TCC_CYCLE[17],TCC_EA0_ATOMIC[17],TCC_ATOMIC[18],TCC_BUBBLE[18],TCC_CYCLE[18],TCC_EA0_ATOMIC[18],TCC_ATOMIC[19],TCC_BUBBLE[19],TCC_CYCLE[19],TCC_EA0_ATOMIC[19],TCC_ATOMIC[20],TCC_BUBBLE[20],TCC_CYCLE[20],TCC_EA0_ATOMIC[20],TCC_ATOMIC[21],TCC_BUBBLE[21],TCC_CYCLE[21],TCC_EA0_ATOMIC[21],TCC_ATOMIC[22],TCC_BUBBLE[22],TCC_CYCLE[22],TCC_EA0_ATOMIC[22],TCC_ATOMIC[23],TCC_BUBBLE[23],TCC_CYCLE[23],TCC_EA0_ATOMIC[23],TCC_ATOMIC[24],TCC_BUBBLE[24],TCC_CYCLE[24],TCC_EA0_ATOMIC[24],TCC_ATOMIC[25],TCC_BUBBLE[25],TCC_CYCLE[25],TCC_EA0_ATOMIC[25],TCC_ATOMIC[26],TCC_BUBBLE[26],TCC_CYCLE[26],TCC_EA0_ATOMIC[26],TCC_ATOMIC[27],TCC_BUBBLE[27],TCC_CYCLE[27],TCC_EA0_ATOMIC[27],TCC_ATOMIC[28],TCC_BUBBLE[28],TCC_CYCLE[28],TCC_EA0_ATOMIC[28],TCC_ATOMIC[29],TCC_BUBBLE[29],TCC_CYCLE[29],TCC_EA0_ATOMIC[29],TCC_ATOMIC[30],TCC_BUBBLE[30],TCC_CYCLE[30],TCC_EA0_ATOMIC[30],TCC_ATOMIC[31],TCC_BUBBLE[31],TCC_CYCLE[31],TCC_EA0_ATOMIC[31],TCC_ATOMIC[32],TCC_BUBBLE[32],TCC_CYCLE[32],TCC_EA0_ATOMIC[32],TCC_ATOMIC[33],TCC_BUBBLE[33],TCC_CYCLE[33],TCC_EA0_ATOMIC[33],TCC_ATOMIC[34],TCC_BUBBLE[34],TCC_CYCLE[34],TCC_EA0_ATOMIC[34],TCC_ATOMIC[35],TCC_BUBBLE[35],TCC_CYCLE[35],TCC_EA0_ATOMIC[35],TCC_ATOMIC[36],TCC_BUBBLE[36],TCC_CYCLE[36],TCC_EA0_ATOMIC[36],TCC_ATOMIC[37],TCC_BUBBLE[37],TCC_CYCLE[37],TCC_EA0_ATOMIC[37],TCC_ATOMIC[38],TCC_BUBBLE[38],TCC_CYCLE[38],TCC_EA0_ATOMIC[38],TCC_ATOMIC[39],TCC_BUBBLE[39],TCC_CYCLE[39],TCC_EA0_ATOMIC[39],TCC_ATOMIC[40],TCC_BUBBLE[40],TCC_CYCLE[40],TCC_EA0_ATOMIC[40],TCC_ATOMIC[41],TCC_BUBBLE[41],TCC_CYCLE[41],TCC_EA0_ATOMIC[41],TCC_ATOMIC[42],TCC_BUBBLE[42],TCC_CYCLE[42],TCC_EA0_ATOMIC[42],TCC_ATOMIC[43],TCC_BUBBLE[43],TCC_CYCLE[43],TCC_EA0_ATOMIC[43],TCC_ATOMIC[44],TCC_BUBBLE[44],TCC_CYCLE[44],TCC_EA0_ATOMIC[44],TCC_ATOMIC[45],TCC_BUBBLE[45],TCC_CYCLE[45],TCC_EA0_ATOMIC[45],TCC_ATOMIC[46],TCC_BUBBLE[46],TCC_CYCLE[46],TCC_EA0_ATOMIC[46],TCC_ATOMIC[47],TCC_BUBBLE[47],TCC_CYCLE[47],TCC_EA0_ATOMIC[47],TCC_ATOMIC[48],TCC_BUBBLE[48],TCC_CYCLE[48],TCC_EA0_ATOMIC[48],TCC_ATOMIC[49],TCC_BUBBLE[49],TCC_CYCLE[49],TCC_EA0_ATOMIC[49],TCC_ATOMIC[50],TCC_BUBBLE[50],TCC_CYCLE[50],TCC_EA0_ATOMIC[50],TCC_ATOMIC[51],TCC_BUBBLE[51],TCC_CYCLE[51],TCC_EA0_ATOMIC[51],TCC_ATOMIC[52],TCC_BUBBLE[52],TCC_CYCLE[52],TCC_EA0_ATOMIC[52],TCC_ATOMIC[53],TCC_BUBBLE[53],TCC_CYCLE[53],TCC_EA0_ATOMIC[53],TCC_ATOMIC[54],TCC_BUBBLE[54],TCC_CYCLE[54],TCC_EA0_ATOMIC[54],TCC_ATOMIC[55],TCC_BUBBLE[55],TCC_CYCLE[55],TCC_EA0_ATOMIC[55],TCC_ATOMIC[56],TCC_BUBBLE[56],TCC_CYCLE[56],TCC_EA0_ATOMIC[56],TCC_ATOMIC[57],TCC_BUBBLE[57],TCC_CYCLE[57],TCC_EA0_ATOMIC[57],TCC_ATOMIC[58],TCC_BUBBLE[58],TCC_CYCLE[58],TCC_EA0_ATOMIC[58],TCC_ATOMIC[59],TCC_BUBBLE[59],TCC_CYCLE[59],TCC_EA0_ATOMIC[59],TCC_ATOMIC[60],TCC_BUBBLE[60],TCC_CYCLE[60],TCC_EA0_ATOMIC[60],TCC_ATOMIC[61],TCC_BUBBLE[61],TCC_CYCLE[61],TCC_EA0_ATOMIC[61],TCC_ATOMIC[62],TCC_BUBBLE[62],TCC_CYCLE[62],TCC_EA0_ATOMIC[62],TCC_ATOMIC[63],TCC_BUBBLE[63],TCC_CYCLE[63],TCC_EA0_ATOMIC[63],TCC_ATOMIC[64],TCC_BUBBLE[64],TCC_CYCLE[64],TCC_EA0_ATOMIC[64],TCC_ATOMIC[65],TCC_BUBBLE[65],TCC_CYCLE[65],TCC_EA0_ATOMIC[65],TCC_ATOMIC[66],TCC_BUBBLE[66],TCC_CYCLE[66],TCC_EA0_ATOMIC[66],TCC_ATOMIC[67],TCC_BUBBLE[67],TCC_CYCLE[67],TCC_EA0_ATOMIC[67],TCC_ATOMIC[68],TCC_BUBBLE[68],TCC_CYCLE[68],TCC_EA0_ATOMIC[68],TCC_ATOMIC[69],TCC_BUBBLE[69],TCC_CYCLE[69],TCC_EA0_ATOMIC[69],TCC_ATOMIC[70],TCC_BUBBLE[70],TCC_CYCLE[70],TCC_EA0_ATOMIC[70],TCC_ATOMIC[71],TCC_BUBBLE[71],TCC_CYCLE[71],TCC_EA0_ATOMIC[71],TCC_ATOMIC[72],TCC_BUBBLE[72],TCC_CYCLE[72],TCC_EA0_ATOMIC[72],TCC_ATOMIC[73],TCC_BUBBLE[73],TCC_CYCLE[73],TCC_EA0_ATOMIC[73],TCC_ATOMIC[74],TCC_BUBBLE[74],TCC_CYCLE[74],TCC_EA0_ATOMIC[74],TCC_ATOMIC[75],TCC_BUBBLE[75],TCC_CYCLE[75],TCC_EA0_ATOMIC[75],TCC_ATOMIC[76],TCC_BUBBLE[76],TCC_CYCLE[76],TCC_EA0_ATOMIC[76],TCC_ATOMIC[77],TCC_BUBBLE[77],TCC_CYCLE[77],TCC_EA0_ATOMIC[77],TCC_ATOMIC[78],TCC_BUBBLE[78],TCC_CYCLE[78],TCC_EA0_ATOMIC[78],TCC_ATOMIC[79],TCC_BUBBLE[79],TCC_CYCLE[79],TCC_EA0_ATOMIC[79],TCC_ATOMIC[80],TCC_BUBBLE[80],TCC_CYCLE[80],TCC_EA0_ATOMIC[80],TCC_ATOMIC[81],TCC_BUBBLE[81],TCC_CYCLE[81],TCC_EA0_ATOMIC[81],TCC_ATOMIC[82],TCC_BUBBLE[82],TCC_CYCLE[82],TCC_EA0_ATOMIC[82],TCC_ATOMIC[83],TCC_BUBBLE[83],TCC_CYCLE[83],TCC_EA0_ATOMIC[83],TCC_ATOMIC[84],TCC_BUBBLE[84],TCC_CYCLE[84],TCC_EA0_ATOMIC[84],TCC_ATOMIC[85],TCC_BUBBLE[85],TCC_CYCLE[85],TCC_EA0_ATOMIC[85],TCC_ATOMIC[86],TCC_BUBBLE[86],TCC_CYCLE[86],TCC_EA0_ATOMIC[86],TCC_ATOMIC[87],TCC_BUBBLE[87],TCC_CYCLE[87],TCC_EA0_ATOMIC[87],TCC_ATOMIC[88],TCC_BUBBLE[88],TCC_CYCLE[88],TCC_EA0_ATOMIC[88],TCC_ATOMIC[89],TCC_BUBBLE[89],TCC_CYCLE[89],TCC_EA0_ATOMIC[89],TCC_ATOMIC[90],TCC_BUBBLE[90],TCC_CYCLE[90],TCC_EA0_ATOMIC[90],TCC_ATOMIC[91],TCC_BUBBLE[91],TCC_CYCLE[91],TCC_EA0_ATOMIC[91],TCC_ATOMIC[92],TCC_BUBBLE[92],TCC_CYCLE[92],TCC_EA0_ATOMIC[92],TCC_ATOMIC[93],TCC_BUBBLE[93],TCC_CYCLE[93],TCC_EA0_ATOMIC[93],TCC_ATOMIC[94],TCC_BUBBLE[94],TCC_CYCLE[94],TCC_EA0_ATOMIC[94],TCC_ATOMIC[95],TCC_BUBBLE[95],TCC_CYCLE[95],TCC_EA0_ATOMIC[95],Wave_Size_9,Correlation_ID_9,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_10,Correlation_ID_10,SQC_TC_DATA_ATOMIC_REQ,SQC_TC_STALL,SQC_TC_REQ,SQC_DCACHE_REQ_READ_16,SQC_ICACHE_REQ,SQC_ICACHE_HITS,SQC_ICACHE_MISSES,SQC_ICACHE_MISSES_DUPLICATE,Wave_Size_11,Correlation_ID_11,SQ_INSTS_VALU_MFMA_MOPS_I8,SQ_INSTS_VALU_MFMA_MOPS_F16,SQ_INSTS_VALU_MFMA_MOPS_BF16,SQ_INSTS_VALU_MFMA_MOPS_F32,SQ_INSTS_VALU_MFMA_MOPS_F64,SQC_TC_INST_REQ,SQC_TC_DATA_READ_REQ,SQC_TC_DATA_WRITE_REQ,TCP_PENDING_STALL_CYCLES_sum,Wave_Size_12,Correlation_ID_12,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,TCC_EA0_ATOMIC_LEVEL_sum,TCC_EA0_RDREQ_LEVEL_sum,TCC_EA0_WRREQ_LEVEL_sum,TCC_EA0_WRREQ_STALL_sum,TCP_TCC_CC_ATOMIC_REQ_sum,TCP_TCC_RW_ATOMIC_REQ_sum,TCP_TCC_RW_READ_REQ_sum,TCP_TCC_RW_WRITE_REQ_sum,Wave_Size_13,Correlation_ID_13,SQC_DCACHE_REQ_READ_2,SQC_DCACHE_REQ_READ_4,Wave_Size_14,Correlation_ID_14,SQ_ACTIVE_INST_SCA,SQ_ACTIVE_INST_EXP_GDS,SQ_ACTIVE_INST_MISC,SQ_ACTIVE_INST_FLAT,SQ_INST_CYCLES_VMEM_WR,SQ_INST_CYCLES_VMEM_RD,SQ_INST_CYCLES_SMEM,SQ_INST_CYCLES_SALU,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,CPC_ME1_DC0_SPI_BUSY,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,TCC_BUBBLE_sum,TCC_EA0_RDREQ_32B_sum,TCC_EA0_RDREQ_sum,TCC_EA0_RD_UNCACHED_32B_sum,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,TCP_TCC_READ_REQ_sum,TCP_TCC_WRITE_REQ_sum,Wave_Size_15,Correlation_ID_15,XCC_Index_15,TCC_EA0_ATOMIC_LEVEL[0],TCC_EA0_RDREQ[0],TCC_EA0_RDREQ_32B[0],TCC_EA0_RDREQ_LEVEL[0],TCC_EA0_ATOMIC_LEVEL[1],TCC_EA0_RDREQ[1],TCC_EA0_RDREQ_32B[1],TCC_EA0_RDREQ_LEVEL[1],TCC_EA0_ATOMIC_LEVEL[2],TCC_EA0_RDREQ[2],TCC_EA0_RDREQ_32B[2],TCC_EA0_RDREQ_LEVEL[2],TCC_EA0_ATOMIC_LEVEL[3],TCC_EA0_RDREQ[3],TCC_EA0_RDREQ_32B[3],TCC_EA0_RDREQ_LEVEL[3],TCC_EA0_ATOMIC_LEVEL[4],TCC_EA0_RDREQ[4],TCC_EA0_RDREQ_32B[4],TCC_EA0_RDREQ_LEVEL[4],TCC_EA0_ATOMIC_LEVEL[5],TCC_EA0_RDREQ[5],TCC_EA0_RDREQ_32B[5],TCC_EA0_RDREQ_LEVEL[5],TCC_EA0_ATOMIC_LEVEL[6],TCC_EA0_RDREQ[6],TCC_EA0_RDREQ_32B[6],TCC_EA0_RDREQ_LEVEL[6],TCC_EA0_ATOMIC_LEVEL[7],TCC_EA0_RDREQ[7],TCC_EA0_RDREQ_32B[7],TCC_EA0_RDREQ_LEVEL[7],TCC_EA0_ATOMIC_LEVEL[8],TCC_EA0_RDREQ[8],TCC_EA0_RDREQ_32B[8],TCC_EA0_RDREQ_LEVEL[8],TCC_EA0_ATOMIC_LEVEL[9],TCC_EA0_RDREQ[9],TCC_EA0_RDREQ_32B[9],TCC_EA0_RDREQ_LEVEL[9],TCC_EA0_ATOMIC_LEVEL[10],TCC_EA0_RDREQ[10],TCC_EA0_RDREQ_32B[10],TCC_EA0_RDREQ_LEVEL[10],TCC_EA0_ATOMIC_LEVEL[11],TCC_EA0_RDREQ[11],TCC_EA0_RDREQ_32B[11],TCC_EA0_RDREQ_LEVEL[11],TCC_EA0_ATOMIC_LEVEL[12],TCC_EA0_RDREQ[12],TCC_EA0_RDREQ_32B[12],TCC_EA0_RDREQ_LEVEL[12],TCC_EA0_ATOMIC_LEVEL[13],TCC_EA0_RDREQ[13],TCC_EA0_RDREQ_32B[13],TCC_EA0_RDREQ_LEVEL[13],TCC_EA0_ATOMIC_LEVEL[14],TCC_EA0_RDREQ[14],TCC_EA0_RDREQ_32B[14],TCC_EA0_RDREQ_LEVEL[14],TCC_EA0_ATOMIC_LEVEL[15],TCC_EA0_RDREQ[15],TCC_EA0_RDREQ_32B[15],TCC_EA0_RDREQ_LEVEL[15],TCC_EA0_ATOMIC_LEVEL[16],TCC_EA0_RDREQ[16],TCC_EA0_RDREQ_32B[16],TCC_EA0_RDREQ_LEVEL[16],TCC_EA0_ATOMIC_LEVEL[17],TCC_EA0_RDREQ[17],TCC_EA0_RDREQ_32B[17],TCC_EA0_RDREQ_LEVEL[17],TCC_EA0_ATOMIC_LEVEL[18],TCC_EA0_RDREQ[18],TCC_EA0_RDREQ_32B[18],TCC_EA0_RDREQ_LEVEL[18],TCC_EA0_ATOMIC_LEVEL[19],TCC_EA0_RDREQ[19],TCC_EA0_RDREQ_32B[19],TCC_EA0_RDREQ_LEVEL[19],TCC_EA0_ATOMIC_LEVEL[20],TCC_EA0_RDREQ[20],TCC_EA0_RDREQ_32B[20],TCC_EA0_RDREQ_LEVEL[20],TCC_EA0_ATOMIC_LEVEL[21],TCC_EA0_RDREQ[21],TCC_EA0_RDREQ_32B[21],TCC_EA0_RDREQ_LEVEL[21],TCC_EA0_ATOMIC_LEVEL[22],TCC_EA0_RDREQ[22],TCC_EA0_RDREQ_32B[22],TCC_EA0_RDREQ_LEVEL[22],TCC_EA0_ATOMIC_LEVEL[23],TCC_EA0_RDREQ[23],TCC_EA0_RDREQ_32B[23],TCC_EA0_RDREQ_LEVEL[23],TCC_EA0_ATOMIC_LEVEL[24],TCC_EA0_RDREQ[24],TCC_EA0_RDREQ_32B[24],TCC_EA0_RDREQ_LEVEL[24],TCC_EA0_ATOMIC_LEVEL[25],TCC_EA0_RDREQ[25],TCC_EA0_RDREQ_32B[25],TCC_EA0_RDREQ_LEVEL[25],TCC_EA0_ATOMIC_LEVEL[26],TCC_EA0_RDREQ[26],TCC_EA0_RDREQ_32B[26],TCC_EA0_RDREQ_LEVEL[26],TCC_EA0_ATOMIC_LEVEL[27],TCC_EA0_RDREQ[27],TCC_EA0_RDREQ_32B[27],TCC_EA0_RDREQ_LEVEL[27],TCC_EA0_ATOMIC_LEVEL[28],TCC_EA0_RDREQ[28],TCC_EA0_RDREQ_32B[28],TCC_EA0_RDREQ_LEVEL[28],TCC_EA0_ATOMIC_LEVEL[29],TCC_EA0_RDREQ[29],TCC_EA0_RDREQ_32B[29],TCC_EA0_RDREQ_LEVEL[29],TCC_EA0_ATOMIC_LEVEL[30],TCC_EA0_RDREQ[30],TCC_EA0_RDREQ_32B[30],TCC_EA0_RDREQ_LEVEL[30],TCC_EA0_ATOMIC_LEVEL[31],TCC_EA0_RDREQ[31],TCC_EA0_RDREQ_32B[31],TCC_EA0_RDREQ_LEVEL[31],TCC_EA0_ATOMIC_LEVEL[32],TCC_EA0_RDREQ[32],TCC_EA0_RDREQ_32B[32],TCC_EA0_RDREQ_LEVEL[32],TCC_EA0_ATOMIC_LEVEL[33],TCC_EA0_RDREQ[33],TCC_EA0_RDREQ_32B[33],TCC_EA0_RDREQ_LEVEL[33],TCC_EA0_ATOMIC_LEVEL[34],TCC_EA0_RDREQ[34],TCC_EA0_RDREQ_32B[34],TCC_EA0_RDREQ_LEVEL[34],TCC_EA0_ATOMIC_LEVEL[35],TCC_EA0_RDREQ[35],TCC_EA0_RDREQ_32B[35],TCC_EA0_RDREQ_LEVEL[35],TCC_EA0_ATOMIC_LEVEL[36],TCC_EA0_RDREQ[36],TCC_EA0_RDREQ_32B[36],TCC_EA0_RDREQ_LEVEL[36],TCC_EA0_ATOMIC_LEVEL[37],TCC_EA0_RDREQ[37],TCC_EA0_RDREQ_32B[37],TCC_EA0_RDREQ_LEVEL[37],TCC_EA0_ATOMIC_LEVEL[38],TCC_EA0_RDREQ[38],TCC_EA0_RDREQ_32B[38],TCC_EA0_RDREQ_LEVEL[38],TCC_EA0_ATOMIC_LEVEL[39],TCC_EA0_RDREQ[39],TCC_EA0_RDREQ_32B[39],TCC_EA0_RDREQ_LEVEL[39],TCC_EA0_ATOMIC_LEVEL[40],TCC_EA0_RDREQ[40],TCC_EA0_RDREQ_32B[40],TCC_EA0_RDREQ_LEVEL[40],TCC_EA0_ATOMIC_LEVEL[41],TCC_EA0_RDREQ[41],TCC_EA0_RDREQ_32B[41],TCC_EA0_RDREQ_LEVEL[41],TCC_EA0_ATOMIC_LEVEL[42],TCC_EA0_RDREQ[42],TCC_EA0_RDREQ_32B[42],TCC_EA0_RDREQ_LEVEL[42],TCC_EA0_ATOMIC_LEVEL[43],TCC_EA0_RDREQ[43],TCC_EA0_RDREQ_32B[43],TCC_EA0_RDREQ_LEVEL[43],TCC_EA0_ATOMIC_LEVEL[44],TCC_EA0_RDREQ[44],TCC_EA0_RDREQ_32B[44],TCC_EA0_RDREQ_LEVEL[44],TCC_EA0_ATOMIC_LEVEL[45],TCC_EA0_RDREQ[45],TCC_EA0_RDREQ_32B[45],TCC_EA0_RDREQ_LEVEL[45],TCC_EA0_ATOMIC_LEVEL[46],TCC_EA0_RDREQ[46],TCC_EA0_RDREQ_32B[46],TCC_EA0_RDREQ_LEVEL[46],TCC_EA0_ATOMIC_LEVEL[47],TCC_EA0_RDREQ[47],TCC_EA0_RDREQ_32B[47],TCC_EA0_RDREQ_LEVEL[47],TCC_EA0_ATOMIC_LEVEL[48],TCC_EA0_RDREQ[48],TCC_EA0_RDREQ_32B[48],TCC_EA0_RDREQ_LEVEL[48],TCC_EA0_ATOMIC_LEVEL[49],TCC_EA0_RDREQ[49],TCC_EA0_RDREQ_32B[49],TCC_EA0_RDREQ_LEVEL[49],TCC_EA0_ATOMIC_LEVEL[50],TCC_EA0_RDREQ[50],TCC_EA0_RDREQ_32B[50],TCC_EA0_RDREQ_LEVEL[50],TCC_EA0_ATOMIC_LEVEL[51],TCC_EA0_RDREQ[51],TCC_EA0_RDREQ_32B[51],TCC_EA0_RDREQ_LEVEL[51],TCC_EA0_ATOMIC_LEVEL[52],TCC_EA0_RDREQ[52],TCC_EA0_RDREQ_32B[52],TCC_EA0_RDREQ_LEVEL[52],TCC_EA0_ATOMIC_LEVEL[53],TCC_EA0_RDREQ[53],TCC_EA0_RDREQ_32B[53],TCC_EA0_RDREQ_LEVEL[53],TCC_EA0_ATOMIC_LEVEL[54],TCC_EA0_RDREQ[54],TCC_EA0_RDREQ_32B[54],TCC_EA0_RDREQ_LEVEL[54],TCC_EA0_ATOMIC_LEVEL[55],TCC_EA0_RDREQ[55],TCC_EA0_RDREQ_32B[55],TCC_EA0_RDREQ_LEVEL[55],TCC_EA0_ATOMIC_LEVEL[56],TCC_EA0_RDREQ[56],TCC_EA0_RDREQ_32B[56],TCC_EA0_RDREQ_LEVEL[56],TCC_EA0_ATOMIC_LEVEL[57],TCC_EA0_RDREQ[57],TCC_EA0_RDREQ_32B[57],TCC_EA0_RDREQ_LEVEL[57],TCC_EA0_ATOMIC_LEVEL[58],TCC_EA0_RDREQ[58],TCC_EA0_RDREQ_32B[58],TCC_EA0_RDREQ_LEVEL[58],TCC_EA0_ATOMIC_LEVEL[59],TCC_EA0_RDREQ[59],TCC_EA0_RDREQ_32B[59],TCC_EA0_RDREQ_LEVEL[59],TCC_EA0_ATOMIC_LEVEL[60],TCC_EA0_RDREQ[60],TCC_EA0_RDREQ_32B[60],TCC_EA0_RDREQ_LEVEL[60],TCC_EA0_ATOMIC_LEVEL[61],TCC_EA0_RDREQ[61],TCC_EA0_RDREQ_32B[61],TCC_EA0_RDREQ_LEVEL[61],TCC_EA0_ATOMIC_LEVEL[62],TCC_EA0_RDREQ[62],TCC_EA0_RDREQ_32B[62],TCC_EA0_RDREQ_LEVEL[62],TCC_EA0_ATOMIC_LEVEL[63],TCC_EA0_RDREQ[63],TCC_EA0_RDREQ_32B[63],TCC_EA0_RDREQ_LEVEL[63],TCC_EA0_ATOMIC_LEVEL[64],TCC_EA0_RDREQ[64],TCC_EA0_RDREQ_32B[64],TCC_EA0_RDREQ_LEVEL[64],TCC_EA0_ATOMIC_LEVEL[65],TCC_EA0_RDREQ[65],TCC_EA0_RDREQ_32B[65],TCC_EA0_RDREQ_LEVEL[65],TCC_EA0_ATOMIC_LEVEL[66],TCC_EA0_RDREQ[66],TCC_EA0_RDREQ_32B[66],TCC_EA0_RDREQ_LEVEL[66],TCC_EA0_ATOMIC_LEVEL[67],TCC_EA0_RDREQ[67],TCC_EA0_RDREQ_32B[67],TCC_EA0_RDREQ_LEVEL[67],TCC_EA0_ATOMIC_LEVEL[68],TCC_EA0_RDREQ[68],TCC_EA0_RDREQ_32B[68],TCC_EA0_RDREQ_LEVEL[68],TCC_EA0_ATOMIC_LEVEL[69],TCC_EA0_RDREQ[69],TCC_EA0_RDREQ_32B[69],TCC_EA0_RDREQ_LEVEL[69],TCC_EA0_ATOMIC_LEVEL[70],TCC_EA0_RDREQ[70],TCC_EA0_RDREQ_32B[70],TCC_EA0_RDREQ_LEVEL[70],TCC_EA0_ATOMIC_LEVEL[71],TCC_EA0_RDREQ[71],TCC_EA0_RDREQ_32B[71],TCC_EA0_RDREQ_LEVEL[71],TCC_EA0_ATOMIC_LEVEL[72],TCC_EA0_RDREQ[72],TCC_EA0_RDREQ_32B[72],TCC_EA0_RDREQ_LEVEL[72],TCC_EA0_ATOMIC_LEVEL[73],TCC_EA0_RDREQ[73],TCC_EA0_RDREQ_32B[73],TCC_EA0_RDREQ_LEVEL[73],TCC_EA0_ATOMIC_LEVEL[74],TCC_EA0_RDREQ[74],TCC_EA0_RDREQ_32B[74],TCC_EA0_RDREQ_LEVEL[74],TCC_EA0_ATOMIC_LEVEL[75],TCC_EA0_RDREQ[75],TCC_EA0_RDREQ_32B[75],TCC_EA0_RDREQ_LEVEL[75],TCC_EA0_ATOMIC_LEVEL[76],TCC_EA0_RDREQ[76],TCC_EA0_RDREQ_32B[76],TCC_EA0_RDREQ_LEVEL[76],TCC_EA0_ATOMIC_LEVEL[77],TCC_EA0_RDREQ[77],TCC_EA0_RDREQ_32B[77],TCC_EA0_RDREQ_LEVEL[77],TCC_EA0_ATOMIC_LEVEL[78],TCC_EA0_RDREQ[78],TCC_EA0_RDREQ_32B[78],TCC_EA0_RDREQ_LEVEL[78],TCC_EA0_ATOMIC_LEVEL[79],TCC_EA0_RDREQ[79],TCC_EA0_RDREQ_32B[79],TCC_EA0_RDREQ_LEVEL[79],TCC_EA0_ATOMIC_LEVEL[80],TCC_EA0_RDREQ[80],TCC_EA0_RDREQ_32B[80],TCC_EA0_RDREQ_LEVEL[80],TCC_EA0_ATOMIC_LEVEL[81],TCC_EA0_RDREQ[81],TCC_EA0_RDREQ_32B[81],TCC_EA0_RDREQ_LEVEL[81],TCC_EA0_ATOMIC_LEVEL[82],TCC_EA0_RDREQ[82],TCC_EA0_RDREQ_32B[82],TCC_EA0_RDREQ_LEVEL[82],TCC_EA0_ATOMIC_LEVEL[83],TCC_EA0_RDREQ[83],TCC_EA0_RDREQ_32B[83],TCC_EA0_RDREQ_LEVEL[83],TCC_EA0_ATOMIC_LEVEL[84],TCC_EA0_RDREQ[84],TCC_EA0_RDREQ_32B[84],TCC_EA0_RDREQ_LEVEL[84],TCC_EA0_ATOMIC_LEVEL[85],TCC_EA0_RDREQ[85],TCC_EA0_RDREQ_32B[85],TCC_EA0_RDREQ_LEVEL[85],TCC_EA0_ATOMIC_LEVEL[86],TCC_EA0_RDREQ[86],TCC_EA0_RDREQ_32B[86],TCC_EA0_RDREQ_LEVEL[86],TCC_EA0_ATOMIC_LEVEL[87],TCC_EA0_RDREQ[87],TCC_EA0_RDREQ_32B[87],TCC_EA0_RDREQ_LEVEL[87],TCC_EA0_ATOMIC_LEVEL[88],TCC_EA0_RDREQ[88],TCC_EA0_RDREQ_32B[88],TCC_EA0_RDREQ_LEVEL[88],TCC_EA0_ATOMIC_LEVEL[89],TCC_EA0_RDREQ[89],TCC_EA0_RDREQ_32B[89],TCC_EA0_RDREQ_LEVEL[89],TCC_EA0_ATOMIC_LEVEL[90],TCC_EA0_RDREQ[90],TCC_EA0_RDREQ_32B[90],TCC_EA0_RDREQ_LEVEL[90],TCC_EA0_ATOMIC_LEVEL[91],TCC_EA0_RDREQ[91],TCC_EA0_RDREQ_32B[91],TCC_EA0_RDREQ_LEVEL[91],TCC_EA0_ATOMIC_LEVEL[92],TCC_EA0_RDREQ[92],TCC_EA0_RDREQ_32B[92],TCC_EA0_RDREQ_LEVEL[92],TCC_EA0_ATOMIC_LEVEL[93],TCC_EA0_RDREQ[93],TCC_EA0_RDREQ_32B[93],TCC_EA0_RDREQ_LEVEL[93],TCC_EA0_ATOMIC_LEVEL[94],TCC_EA0_RDREQ[94],TCC_EA0_RDREQ_32B[94],TCC_EA0_RDREQ_LEVEL[94],TCC_EA0_ATOMIC_LEVEL[95],TCC_EA0_RDREQ[95],TCC_EA0_RDREQ_32B[95],TCC_EA0_RDREQ_LEVEL[95],Wave_Size_16,Correlation_ID_16,SQ_INSTS_VMEM,SQ_INSTS_SALU,SQ_INSTS_VSKIPPED,SQ_INSTS,SQ_INSTS_VALU,SQ_INSTS_VALU_ADD_F16,SQ_INSTS_VALU_MUL_F16,SQ_INSTS_VALU_FMA_F16,GRBM_SPI_BUSY,SPI_CSN_NUM_THREADGROUPS,SPI_CSN_WAVE,CPC_CPC_TCIU_BUSY,CPC_CPC_TCIU_IDLE,CPF_CPF_TCIU_BUSY,CPF_CPF_TCIU_STALL,TA_BUFFER_READ_WAVEFRONTS_sum,TA_BUFFER_WRITE_WAVEFRONTS_sum,TCC_CC_REQ_sum,TCC_NC_REQ_sum,TCC_RW_REQ_sum,TCC_UC_REQ_sum,TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum,TCP_READ_TAGCONFLICT_STALL_CYCLES_sum,TCP_TA_TCP_STATE_READ_sum,TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum,TD_LOAD_WAVEFRONT_sum,TD_SPI_STALL_sum,Wave_Size_17,Correlation_ID_17,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_BUSY_CU_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_INSTS_VALU_CVT,SQ_INSTS_VMEM_WR,SQ_INSTS_VMEM_RD,GRBM_COUNT,GRBM_GUI_ACTIVE,SPI_CSN_WINDOW_VALID,SPI_CSN_BUSY,CPC_CPC_STAT_BUSY,CPC_CPC_STAT_IDLE,CPF_CPF_STAT_BUSY,CPF_CPF_STAT_STALL,TA_BUFFER_WAVEFRONTS_sum,TA_TA_BUSY_sum,TCC_BUSY_sum,TCC_CYCLE_sum,TCC_PROBE_ALL_sum,TCC_PROBE_sum,TCP_GATE_EN1_sum,TCP_GATE_EN2_sum,TCP_TCR_TCP_STALL_CYCLES_sum,TCP_TD_TCP_STALL_CYCLES_sum,TD_TC_STALL_sum,TD_TD_BUSY_sum,Start_Timestamp,End_Timestamp
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diff --git a/tests/workloads/dispatch_6_8/MI300A_A1/sysinfo.csv b/tests/workloads/dispatch_6_8/MI300A_A1/sysinfo.csv
new file mode 100644
index 0000000000..0ededf25dc
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300A_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+dispatch_6_8,./tests/vcopy -n 1048576 -b 256 -i 3,SQ|LDS|SQC|TA|TD|TCP|TCC|SPI|CPC|CPF,Wed 29 May 2024 01:41:21 PM  (CDT),2,sh5-1w300-rg3-3,AMD Instinct MI300A Accelerator,"American Megatrends International, LLC.RMO1002DS",Ubuntu 22.04.2 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,131174852,,6.1.2-110,N/A,SPX,NPS1,MI300A_A1,gfx942,32,24576,228,4,24,64,1024,32,2100,1300,2100,1300,96,32,120,4,5324.8,6
diff --git a/tests/workloads/dispatch_6_8/MI300A_A1/timestamps.csv b/tests/workloads/dispatch_6_8/MI300A_A1/timestamps.csv
new file mode 100644
index 0000000000..e9168c64b8
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300A_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,11995,1,150401,150401,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73959589851375,73959589859667,0
+3,11995,1,150401,150401,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73959589900530,73959589907260,0
+2,11995,1,150401,150401,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73959589877855,73959589884505,0
diff --git a/tests/workloads/dispatch_6_8/MI300X_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/dispatch_6_8/MI300X_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..330f5b069a
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300X_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,60633,1,968379,968379,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716456501432999,716456501448519,0,464681.0,464681.0,16384.0,65536.0,41598.0,3315196.0
+1,60633,1,968379,968379,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716456501469197,716456501481317,0,435087.0,435087.0,16384.0,65536.0,13134.0,1048576.0
+2,60633,1,968379,968379,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716456501500917,716456501513197,0,371570.0,371570.0,16384.0,65536.0,13061.0,1048576.0
diff --git a/tests/workloads/dispatch_6_8/MI300X_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/dispatch_6_8/MI300X_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..ea6da118bc
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300X_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,60633,1,968391,968391,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716456501432999,716456501448519,0,0.0,0.0,0.0
+1,60633,1,968391,968391,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716456501469197,716456501481317,0,0.0,0.0,0.0
+2,60633,1,968391,968391,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716456501500917,716456501513197,0,0.0,0.0,0.0
diff --git a/tests/workloads/dispatch_6_8/MI300X_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/dispatch_6_8/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..ab9c7c645f
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,968403,968403,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716456501432999,716456501448519,0,65536.0,3558018.0,284566800.0
+1,60633,1,968403,968403,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716456501469197,716456501481317,0,65536.0,3609084.0,288707952.0
+2,60633,1,968403,968403,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716456501500917,716456501513197,0,65536.0,3441408.0,275329088.0
diff --git a/tests/workloads/dispatch_6_8/MI300X_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/dispatch_6_8/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..2c31367515
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,968415,968415,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716456501432999,716456501448519,0,32768.0,486124.0,38888436.0
+1,60633,1,968415,968415,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716456501469197,716456501481317,0,32768.0,403334.0,32262244.0
+2,60633,1,968415,968415,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716456501500917,716456501513197,0,32768.0,440778.0,35255256.0
diff --git a/tests/workloads/dispatch_6_8/MI300X_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/dispatch_6_8/MI300X_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..1a3369ef72
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300X_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,60633,1,968428,968428,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716456501432999,716456501448519,0,442183.0,442183.0,258794.0,1768732.0,16384.0,34067930.0,535976.0,0.0,136623716.0
+1,60633,1,968428,968428,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716456501469197,716456501481317,0,356851.0,356851.0,183671.0,1427404.0,16384.0,30421147.0,500377.0,0.0,122038996.0
+2,60633,1,968428,968428,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716456501500917,716456501513197,0,372184.0,372184.0,202246.0,1488736.0,16384.0,29221586.0,482699.0,0.0,117243216.0
diff --git a/tests/workloads/dispatch_6_8/MI300X_A1/log.txt b/tests/workloads/dispatch_6_8/MI300X_A1/log.txt
new file mode 100644
index 0000000000..979ca0de40
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300X_A1/log.txt
@@ -0,0 +1,210 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/dispatch_6_8/MI300X_A1
+Target: MI300X_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: ['6:8']
+Hardware Blocks: All
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH_LEVEL
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_REQ
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_HITS
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_13.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[1]
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_14.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[1]
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_15.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[0]
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_16.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[1]
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_17.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[1]
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F32
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT64
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_ANY
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_SCA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_MISC
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_WR
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_THREAD_CYCLES_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ADDR_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_UNALIGNED_STALL
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ITEMS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_MEM_VIOLATIONS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ATOMIC_RETURN
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_BF16
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F64
+
+[profiling] Current input file: tests/workloads/dispatch_6_8/MI300X_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..2dfcf5315c
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..0c30d31fdc
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..ecfdacf4ef
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..d066205a36
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..0f485912b0
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_0.txt b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..f5ecead664
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD GRBM_COUNT GRBM_GUI_ACTIVE TCP_GATE_EN1_sum TCP_GATE_EN2_sum TCP_TD_TCP_STALL_CYCLES_sum TCP_TCR_TCP_STALL_CYCLES_sum TA_TA_BUSY_sum TA_BUFFER_WAVEFRONTS_sum TD_TD_BUSY_sum TD_TC_STALL_sum SPI_CSN_WINDOW_VALID SPI_CSN_BUSY CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE CPF_CPF_STAT_BUSY CPF_CPF_STAT_STALL TCC_CYCLE_sum TCC_BUSY_sum TCC_PROBE_sum TCC_PROBE_ALL_sum
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_1.txt b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..3a3112c601
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 GRBM_SPI_BUSY TCP_READ_TAGCONFLICT_STALL_CYCLES_sum TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum TCP_TA_TCP_STATE_READ_sum TA_BUFFER_READ_WAVEFRONTS_sum TA_BUFFER_WRITE_WAVEFRONTS_sum TD_SPI_STALL_sum TD_LOAD_WAVEFRONT_sum SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE CPC_CPC_TCIU_BUSY CPC_CPC_TCIU_IDLE CPF_CPF_TCIU_BUSY CPF_CPF_TCIU_STALL TCC_NC_REQ_sum TCC_UC_REQ_sum TCC_CC_REQ_sum TCC_RW_REQ_sum
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_10.txt b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..64882f5b14
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_11.txt b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..2b0abfc67f
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_12.txt b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..1583aee8df
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_13.txt b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_13.txt
new file mode 100644
index 0000000000..57e59f0857
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_13.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_ATOMIC[0] TCC_BUBBLE[0] TCC_CYCLE[0] TCC_EA0_ATOMIC[0] TCC_ATOMIC[1] TCC_BUBBLE[1] TCC_CYCLE[1] TCC_EA0_ATOMIC[1] TCC_ATOMIC[2] TCC_BUBBLE[2] TCC_CYCLE[2] TCC_EA0_ATOMIC[2] TCC_ATOMIC[3] TCC_BUBBLE[3] TCC_CYCLE[3] TCC_EA0_ATOMIC[3] TCC_ATOMIC[4] TCC_BUBBLE[4] TCC_CYCLE[4] TCC_EA0_ATOMIC[4] TCC_ATOMIC[5] TCC_BUBBLE[5] TCC_CYCLE[5] TCC_EA0_ATOMIC[5] TCC_ATOMIC[6] TCC_BUBBLE[6] TCC_CYCLE[6] TCC_EA0_ATOMIC[6] TCC_ATOMIC[7] TCC_BUBBLE[7] TCC_CYCLE[7] TCC_EA0_ATOMIC[7] TCC_ATOMIC[8] TCC_BUBBLE[8] TCC_CYCLE[8] TCC_EA0_ATOMIC[8] TCC_ATOMIC[9] TCC_BUBBLE[9] TCC_CYCLE[9] TCC_EA0_ATOMIC[9] TCC_ATOMIC[10] TCC_BUBBLE[10] TCC_CYCLE[10] TCC_EA0_ATOMIC[10] TCC_ATOMIC[11] TCC_BUBBLE[11] TCC_CYCLE[11] TCC_EA0_ATOMIC[11] TCC_ATOMIC[12] TCC_BUBBLE[12] TCC_CYCLE[12] TCC_EA0_ATOMIC[12] TCC_ATOMIC[13] TCC_BUBBLE[13] TCC_CYCLE[13] TCC_EA0_ATOMIC[13] TCC_ATOMIC[14] TCC_BUBBLE[14] TCC_CYCLE[14] TCC_EA0_ATOMIC[14] TCC_ATOMIC[15] TCC_BUBBLE[15] TCC_CYCLE[15] TCC_EA0_ATOMIC[15]
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_14.txt b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_14.txt
new file mode 100644
index 0000000000..b2671e31d6
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_14.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_ATOMIC_LEVEL[0] TCC_EA0_RDREQ[0] TCC_EA0_RDREQ_32B[0] TCC_EA0_RDREQ_LEVEL[0] TCC_EA0_ATOMIC_LEVEL[1] TCC_EA0_RDREQ[1] TCC_EA0_RDREQ_32B[1] TCC_EA0_RDREQ_LEVEL[1] TCC_EA0_ATOMIC_LEVEL[2] TCC_EA0_RDREQ[2] TCC_EA0_RDREQ_32B[2] TCC_EA0_RDREQ_LEVEL[2] TCC_EA0_ATOMIC_LEVEL[3] TCC_EA0_RDREQ[3] TCC_EA0_RDREQ_32B[3] TCC_EA0_RDREQ_LEVEL[3] TCC_EA0_ATOMIC_LEVEL[4] TCC_EA0_RDREQ[4] TCC_EA0_RDREQ_32B[4] TCC_EA0_RDREQ_LEVEL[4] TCC_EA0_ATOMIC_LEVEL[5] TCC_EA0_RDREQ[5] TCC_EA0_RDREQ_32B[5] TCC_EA0_RDREQ_LEVEL[5] TCC_EA0_ATOMIC_LEVEL[6] TCC_EA0_RDREQ[6] TCC_EA0_RDREQ_32B[6] TCC_EA0_RDREQ_LEVEL[6] TCC_EA0_ATOMIC_LEVEL[7] TCC_EA0_RDREQ[7] TCC_EA0_RDREQ_32B[7] TCC_EA0_RDREQ_LEVEL[7] TCC_EA0_ATOMIC_LEVEL[8] TCC_EA0_RDREQ[8] TCC_EA0_RDREQ_32B[8] TCC_EA0_RDREQ_LEVEL[8] TCC_EA0_ATOMIC_LEVEL[9] TCC_EA0_RDREQ[9] TCC_EA0_RDREQ_32B[9] TCC_EA0_RDREQ_LEVEL[9] TCC_EA0_ATOMIC_LEVEL[10] TCC_EA0_RDREQ[10] TCC_EA0_RDREQ_32B[10] TCC_EA0_RDREQ_LEVEL[10] TCC_EA0_ATOMIC_LEVEL[11] TCC_EA0_RDREQ[11] TCC_EA0_RDREQ_32B[11] TCC_EA0_RDREQ_LEVEL[11] TCC_EA0_ATOMIC_LEVEL[12] TCC_EA0_RDREQ[12] TCC_EA0_RDREQ_32B[12] TCC_EA0_RDREQ_LEVEL[12] TCC_EA0_ATOMIC_LEVEL[13] TCC_EA0_RDREQ[13] TCC_EA0_RDREQ_32B[13] TCC_EA0_RDREQ_LEVEL[13] TCC_EA0_ATOMIC_LEVEL[14] TCC_EA0_RDREQ[14] TCC_EA0_RDREQ_32B[14] TCC_EA0_RDREQ_LEVEL[14] TCC_EA0_ATOMIC_LEVEL[15] TCC_EA0_RDREQ[15] TCC_EA0_RDREQ_32B[15] TCC_EA0_RDREQ_LEVEL[15]
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_15.txt b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_15.txt
new file mode 100644
index 0000000000..2252a30027
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_15.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_WRREQ[0] TCC_EA0_WRREQ_64B[0] TCC_EA0_WRREQ_LEVEL[0] TCC_HIT[0] TCC_EA0_WRREQ[1] TCC_EA0_WRREQ_64B[1] TCC_EA0_WRREQ_LEVEL[1] TCC_HIT[1] TCC_EA0_WRREQ[2] TCC_EA0_WRREQ_64B[2] TCC_EA0_WRREQ_LEVEL[2] TCC_HIT[2] TCC_EA0_WRREQ[3] TCC_EA0_WRREQ_64B[3] TCC_EA0_WRREQ_LEVEL[3] TCC_HIT[3] TCC_EA0_WRREQ[4] TCC_EA0_WRREQ_64B[4] TCC_EA0_WRREQ_LEVEL[4] TCC_HIT[4] TCC_EA0_WRREQ[5] TCC_EA0_WRREQ_64B[5] TCC_EA0_WRREQ_LEVEL[5] TCC_HIT[5] TCC_EA0_WRREQ[6] TCC_EA0_WRREQ_64B[6] TCC_EA0_WRREQ_LEVEL[6] TCC_HIT[6] TCC_EA0_WRREQ[7] TCC_EA0_WRREQ_64B[7] TCC_EA0_WRREQ_LEVEL[7] TCC_HIT[7] TCC_EA0_WRREQ[8] TCC_EA0_WRREQ_64B[8] TCC_EA0_WRREQ_LEVEL[8] TCC_HIT[8] TCC_EA0_WRREQ[9] TCC_EA0_WRREQ_64B[9] TCC_EA0_WRREQ_LEVEL[9] TCC_HIT[9] TCC_EA0_WRREQ[10] TCC_EA0_WRREQ_64B[10] TCC_EA0_WRREQ_LEVEL[10] TCC_HIT[10] TCC_EA0_WRREQ[11] TCC_EA0_WRREQ_64B[11] TCC_EA0_WRREQ_LEVEL[11] TCC_HIT[11] TCC_EA0_WRREQ[12] TCC_EA0_WRREQ_64B[12] TCC_EA0_WRREQ_LEVEL[12] TCC_HIT[12] TCC_EA0_WRREQ[13] TCC_EA0_WRREQ_64B[13] TCC_EA0_WRREQ_LEVEL[13] TCC_HIT[13] TCC_EA0_WRREQ[14] TCC_EA0_WRREQ_64B[14] TCC_EA0_WRREQ_LEVEL[14] TCC_HIT[14] TCC_EA0_WRREQ[15] TCC_EA0_WRREQ_64B[15] TCC_EA0_WRREQ_LEVEL[15] TCC_HIT[15]
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_16.txt b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_16.txt
new file mode 100644
index 0000000000..44779710a7
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_16.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_MISS[0] TCC_READ[0] TCC_REQ[0] TCC_RW_REQ[0] TCC_MISS[1] TCC_READ[1] TCC_REQ[1] TCC_RW_REQ[1] TCC_MISS[2] TCC_READ[2] TCC_REQ[2] TCC_RW_REQ[2] TCC_MISS[3] TCC_READ[3] TCC_REQ[3] TCC_RW_REQ[3] TCC_MISS[4] TCC_READ[4] TCC_REQ[4] TCC_RW_REQ[4] TCC_MISS[5] TCC_READ[5] TCC_REQ[5] TCC_RW_REQ[5] TCC_MISS[6] TCC_READ[6] TCC_REQ[6] TCC_RW_REQ[6] TCC_MISS[7] TCC_READ[7] TCC_REQ[7] TCC_RW_REQ[7] TCC_MISS[8] TCC_READ[8] TCC_REQ[8] TCC_RW_REQ[8] TCC_MISS[9] TCC_READ[9] TCC_REQ[9] TCC_RW_REQ[9] TCC_MISS[10] TCC_READ[10] TCC_REQ[10] TCC_RW_REQ[10] TCC_MISS[11] TCC_READ[11] TCC_REQ[11] TCC_RW_REQ[11] TCC_MISS[12] TCC_READ[12] TCC_REQ[12] TCC_RW_REQ[12] TCC_MISS[13] TCC_READ[13] TCC_REQ[13] TCC_RW_REQ[13] TCC_MISS[14] TCC_READ[14] TCC_REQ[14] TCC_RW_REQ[14] TCC_MISS[15] TCC_READ[15] TCC_REQ[15] TCC_RW_REQ[15]
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_17.txt b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_17.txt
new file mode 100644
index 0000000000..c4a2e0f69d
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_17.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_TAG_STALL[0] TCC_TOO_MANY_EA_WRREQS_STALL[0] TCC_WRITE[0] TCC_TAG_STALL[1] TCC_TOO_MANY_EA_WRREQS_STALL[1] TCC_WRITE[1] TCC_TAG_STALL[2] TCC_TOO_MANY_EA_WRREQS_STALL[2] TCC_WRITE[2] TCC_TAG_STALL[3] TCC_TOO_MANY_EA_WRREQS_STALL[3] TCC_WRITE[3] TCC_TAG_STALL[4] TCC_TOO_MANY_EA_WRREQS_STALL[4] TCC_WRITE[4] TCC_TAG_STALL[5] TCC_TOO_MANY_EA_WRREQS_STALL[5] TCC_WRITE[5] TCC_TAG_STALL[6] TCC_TOO_MANY_EA_WRREQS_STALL[6] TCC_WRITE[6] TCC_TAG_STALL[7] TCC_TOO_MANY_EA_WRREQS_STALL[7] TCC_WRITE[7] TCC_TAG_STALL[8] TCC_TOO_MANY_EA_WRREQS_STALL[8] TCC_WRITE[8] TCC_TAG_STALL[9] TCC_TOO_MANY_EA_WRREQS_STALL[9] TCC_WRITE[9] TCC_TAG_STALL[10] TCC_TOO_MANY_EA_WRREQS_STALL[10] TCC_WRITE[10] TCC_TAG_STALL[11] TCC_TOO_MANY_EA_WRREQS_STALL[11] TCC_WRITE[11] TCC_TAG_STALL[12] TCC_TOO_MANY_EA_WRREQS_STALL[12] TCC_WRITE[12] TCC_TAG_STALL[13] TCC_TOO_MANY_EA_WRREQS_STALL[13] TCC_WRITE[13] TCC_TAG_STALL[14] TCC_TOO_MANY_EA_WRREQS_STALL[14] TCC_WRITE[14] TCC_TAG_STALL[15] TCC_TOO_MANY_EA_WRREQS_STALL[15] TCC_WRITE[15]
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_2.txt b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..359a6aa50c
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 TCP_VOLATILE_sum TCP_TOTAL_ACCESSES_sum TCP_TOTAL_READ_sum TCP_TOTAL_WRITE_sum TA_BUFFER_ATOMIC_WAVEFRONTS_sum TA_BUFFER_TOTAL_CYCLES_sum TD_ATOMIC_WAVEFRONT_sum TD_STORE_WAVEFRONT_sum SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION CPF_CPF_STAT_IDLE CPF_CPF_TCIU_IDLE TCC_REQ_sum TCC_STREAMING_REQ_sum TCC_HIT_sum TCC_MISS_sum
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_3.txt b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..528e387f62
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS TCP_TOTAL_ATOMIC_WITH_RET_sum TCP_TOTAL_ATOMIC_WITHOUT_RET_sum TCP_TOTAL_WRITEBACK_INVALIDATES_sum TCP_TOTAL_CACHE_ACCESSES_sum TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES_sum TD_COALESCABLE_WAVEFRONT_sum SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE CPF_CMP_UTCL1_STALL_ON_TRANSLATION TCC_READ_sum TCC_WRITE_sum TCC_ATOMIC_sum TCC_WRITEBACK_sum
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_4.txt b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..913a384f13
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAIT_ANY SQ_WAIT_INST_ANY SQ_ACTIVE_INST_ANY SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU TCP_UTCL1_TRANSLATION_MISS_sum TCP_UTCL1_TRANSLATION_HIT_sum TCP_UTCL1_PERMISSION_MISS_sum TCP_UTCL1_REQUEST_sum TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_TOTAL_WAVEFRONTS_sum SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE TCC_EA0_WRREQ_sum TCC_EA0_WRREQ_64B_sum TCC_EA0_WR_UNCACHED_32B_sum TCC_EA0_WRREQ_DRAM_sum
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_5.txt b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..38eac1ee86
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_SCA SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU TCP_TCC_READ_REQ_sum TCP_TCC_WRITE_REQ_sum TCP_TCC_ATOMIC_WITH_RET_REQ_sum TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN CPC_ME1_DC0_SPI_BUSY TCC_EA0_RDREQ_sum TCC_EA0_RDREQ_32B_sum TCC_BUBBLE_sum TCC_EA0_RD_UNCACHED_32B_sum
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_6.txt b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..13d5b97fcc
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_THREAD_CYCLES_VALU SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 TCP_TCC_NC_READ_REQ_sum TCP_TCC_NC_WRITE_REQ_sum TCP_TCC_NC_ATOMIC_REQ_sum TCP_TCC_UC_READ_REQ_sum TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN TCC_EA0_RDREQ_DRAM_sum TCC_TAG_STALL_sum TCC_NORMAL_WRITEBACK_sum TCC_ALL_TC_OP_WB_WRITEBACK_sum
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_7.txt b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..f4445703b7
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED TCP_TCC_UC_WRITE_REQ_sum TCP_TCC_UC_ATOMIC_REQ_sum TCP_TCC_CC_READ_REQ_sum TCP_TCC_CC_WRITE_REQ_sum TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR TCC_NORMAL_EVICT_sum TCC_ALL_TC_OP_INV_EVICT_sum TCC_TOO_MANY_EA_WRREQS_STALL_sum TCC_EA0_ATOMIC_sum
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_8.txt b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..573282eed4
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES TCP_TCC_CC_ATOMIC_REQ_sum TCP_TCC_RW_READ_REQ_sum TCP_TCC_RW_WRITE_REQ_sum TCP_TCC_RW_ATOMIC_REQ_sum SPI_VWC_CSC_WR SPI_RA_BULKY_CU_FULL_CSN TCC_EA0_RDREQ_LEVEL_sum TCC_EA0_WRREQ_LEVEL_sum TCC_EA0_ATOMIC_LEVEL_sum TCC_EA0_WRREQ_STALL_sum
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_9.txt b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..f524c6f01c
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ TCP_PENDING_STALL_CYCLES_sum
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/timestamps.txt b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..73a5a3d86f
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300X_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range: 6:8
+kernel:
diff --git a/tests/workloads/dispatch_6_8/MI300X_A1/pmc_perf.csv b/tests/workloads/dispatch_6_8/MI300X_A1/pmc_perf.csv
new file mode 100644
index 0000000000..d1ad4ad6ee
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300X_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_1,Correlation_ID_1,XCC_Index,TCC_ATOMIC[0],TCC_BUBBLE[0],TCC_CYCLE[0],TCC_EA0_ATOMIC[0],TCC_ATOMIC[1],TCC_BUBBLE[1],TCC_CYCLE[1],TCC_EA0_ATOMIC[1],TCC_ATOMIC[2],TCC_BUBBLE[2],TCC_CYCLE[2],TCC_EA0_ATOMIC[2],TCC_ATOMIC[3],TCC_BUBBLE[3],TCC_CYCLE[3],TCC_EA0_ATOMIC[3],TCC_ATOMIC[4],TCC_BUBBLE[4],TCC_CYCLE[4],TCC_EA0_ATOMIC[4],TCC_ATOMIC[5],TCC_BUBBLE[5],TCC_CYCLE[5],TCC_EA0_ATOMIC[5],TCC_ATOMIC[6],TCC_BUBBLE[6],TCC_CYCLE[6],TCC_EA0_ATOMIC[6],TCC_ATOMIC[7],TCC_BUBBLE[7],TCC_CYCLE[7],TCC_EA0_ATOMIC[7],TCC_ATOMIC[8],TCC_BUBBLE[8],TCC_CYCLE[8],TCC_EA0_ATOMIC[8],TCC_ATOMIC[9],TCC_BUBBLE[9],TCC_CYCLE[9],TCC_EA0_ATOMIC[9],TCC_ATOMIC[10],TCC_BUBBLE[10],TCC_CYCLE[10],TCC_EA0_ATOMIC[10],TCC_ATOMIC[11],TCC_BUBBLE[11],TCC_CYCLE[11],TCC_EA0_ATOMIC[11],TCC_ATOMIC[12],TCC_BUBBLE[12],TCC_CYCLE[12],TCC_EA0_ATOMIC[12],TCC_ATOMIC[13],TCC_BUBBLE[13],TCC_CYCLE[13],TCC_EA0_ATOMIC[13],TCC_ATOMIC[14],TCC_BUBBLE[14],TCC_CYCLE[14],TCC_EA0_ATOMIC[14],TCC_ATOMIC[15],TCC_BUBBLE[15],TCC_CYCLE[15],TCC_EA0_ATOMIC[15],TCC_ATOMIC[16],TCC_BUBBLE[16],TCC_CYCLE[16],TCC_EA0_ATOMIC[16],TCC_ATOMIC[17],TCC_BUBBLE[17],TCC_CYCLE[17],TCC_EA0_ATOMIC[17],TCC_ATOMIC[18],TCC_BUBBLE[18],TCC_CYCLE[18],TCC_EA0_ATOMIC[18],TCC_ATOMIC[19],TCC_BUBBLE[19],TCC_CYCLE[19],TCC_EA0_ATOMIC[19],TCC_ATOMIC[20],TCC_BUBBLE[20],TCC_CYCLE[20],TCC_EA0_ATOMIC[20],TCC_ATOMIC[21],TCC_BUBBLE[21],TCC_CYCLE[21],TCC_EA0_ATOMIC[21],TCC_ATOMIC[22],TCC_BUBBLE[22],TCC_CYCLE[22],TCC_EA0_ATOMIC[22],TCC_ATOMIC[23],TCC_BUBBLE[23],TCC_CYCLE[23],TCC_EA0_ATOMIC[23],TCC_ATOMIC[24],TCC_BUBBLE[24],TCC_CYCLE[24],TCC_EA0_ATOMIC[24],TCC_ATOMIC[25],TCC_BUBBLE[25],TCC_CYCLE[25],TCC_EA0_ATOMIC[25],TCC_ATOMIC[26],TCC_BUBBLE[26],TCC_CYCLE[26],TCC_EA0_ATOMIC[26],TCC_ATOMIC[27],TCC_BUBBLE[27],TCC_CYCLE[27],TCC_EA0_ATOMIC[27],TCC_ATOMIC[28],TCC_BUBBLE[28],TCC_CYCLE[28],TCC_EA0_ATOMIC[28],TCC_ATOMIC[29],TCC_BUBBLE[29],TCC_CYCLE[29],TCC_EA0_ATOMIC[29],TCC_ATOMIC[30],TCC_BUBBLE[30],TCC_CYCLE[30],TCC_EA0_ATOMIC[30],TCC_ATOMIC[31],TCC_BUBBLE[31],TCC_CYCLE[31],TCC_EA0_ATOMIC[31],TCC_ATOMIC[32],TCC_BUBBLE[32],TCC_CYCLE[32],TCC_EA0_ATOMIC[32],TCC_ATOMIC[33],TCC_BUBBLE[33],TCC_CYCLE[33],TCC_EA0_ATOMIC[33],TCC_ATOMIC[34],TCC_BUBBLE[34],TCC_CYCLE[34],TCC_EA0_ATOMIC[34],TCC_ATOMIC[35],TCC_BUBBLE[35],TCC_CYCLE[35],TCC_EA0_ATOMIC[35],TCC_ATOMIC[36],TCC_BUBBLE[36],TCC_CYCLE[36],TCC_EA0_ATOMIC[36],TCC_ATOMIC[37],TCC_BUBBLE[37],TCC_CYCLE[37],TCC_EA0_ATOMIC[37],TCC_ATOMIC[38],TCC_BUBBLE[38],TCC_CYCLE[38],TCC_EA0_ATOMIC[38],TCC_ATOMIC[39],TCC_BUBBLE[39],TCC_CYCLE[39],TCC_EA0_ATOMIC[39],TCC_ATOMIC[40],TCC_BUBBLE[40],TCC_CYCLE[40],TCC_EA0_ATOMIC[40],TCC_ATOMIC[41],TCC_BUBBLE[41],TCC_CYCLE[41],TCC_EA0_ATOMIC[41],TCC_ATOMIC[42],TCC_BUBBLE[42],TCC_CYCLE[42],TCC_EA0_ATOMIC[42],TCC_ATOMIC[43],TCC_BUBBLE[43],TCC_CYCLE[43],TCC_EA0_ATOMIC[43],TCC_ATOMIC[44],TCC_BUBBLE[44],TCC_CYCLE[44],TCC_EA0_ATOMIC[44],TCC_ATOMIC[45],TCC_BUBBLE[45],TCC_CYCLE[45],TCC_EA0_ATOMIC[45],TCC_ATOMIC[46],TCC_BUBBLE[46],TCC_CYCLE[46],TCC_EA0_ATOMIC[46],TCC_ATOMIC[47],TCC_BUBBLE[47],TCC_CYCLE[47],TCC_EA0_ATOMIC[47],TCC_ATOMIC[48],TCC_BUBBLE[48],TCC_CYCLE[48],TCC_EA0_ATOMIC[48],TCC_ATOMIC[49],TCC_BUBBLE[49],TCC_CYCLE[49],TCC_EA0_ATOMIC[49],TCC_ATOMIC[50],TCC_BUBBLE[50],TCC_CYCLE[50],TCC_EA0_ATOMIC[50],TCC_ATOMIC[51],TCC_BUBBLE[51],TCC_CYCLE[51],TCC_EA0_ATOMIC[51],TCC_ATOMIC[52],TCC_BUBBLE[52],TCC_CYCLE[52],TCC_EA0_ATOMIC[52],TCC_ATOMIC[53],TCC_BUBBLE[53],TCC_CYCLE[53],TCC_EA0_ATOMIC[53],TCC_ATOMIC[54],TCC_BUBBLE[54],TCC_CYCLE[54],TCC_EA0_ATOMIC[54],TCC_ATOMIC[55],TCC_BUBBLE[55],TCC_CYCLE[55],TCC_EA0_ATOMIC[55],TCC_ATOMIC[56],TCC_BUBBLE[56],TCC_CYCLE[56],TCC_EA0_ATOMIC[56],TCC_ATOMIC[57],TCC_BUBBLE[57],TCC_CYCLE[57],TCC_EA0_ATOMIC[57],TCC_ATOMIC[58],TCC_BUBBLE[58],TCC_CYCLE[58],TCC_EA0_ATOMIC[58],TCC_ATOMIC[59],TCC_BUBBLE[59],TCC_CYCLE[59],TCC_EA0_ATOMIC[59],TCC_ATOMIC[60],TCC_BUBBLE[60],TCC_CYCLE[60],TCC_EA0_ATOMIC[60],TCC_ATOMIC[61],TCC_BUBBLE[61],TCC_CYCLE[61],TCC_EA0_ATOMIC[61],TCC_ATOMIC[62],TCC_BUBBLE[62],TCC_CYCLE[62],TCC_EA0_ATOMIC[62],TCC_ATOMIC[63],TCC_BUBBLE[63],TCC_CYCLE[63],TCC_EA0_ATOMIC[63],TCC_ATOMIC[64],TCC_BUBBLE[64],TCC_CYCLE[64],TCC_EA0_ATOMIC[64],TCC_ATOMIC[65],TCC_BUBBLE[65],TCC_CYCLE[65],TCC_EA0_ATOMIC[65],TCC_ATOMIC[66],TCC_BUBBLE[66],TCC_CYCLE[66],TCC_EA0_ATOMIC[66],TCC_ATOMIC[67],TCC_BUBBLE[67],TCC_CYCLE[67],TCC_EA0_ATOMIC[67],TCC_ATOMIC[68],TCC_BUBBLE[68],TCC_CYCLE[68],TCC_EA0_ATOMIC[68],TCC_ATOMIC[69],TCC_BUBBLE[69],TCC_CYCLE[69],TCC_EA0_ATOMIC[69],TCC_ATOMIC[70],TCC_BUBBLE[70],TCC_CYCLE[70],TCC_EA0_ATOMIC[70],TCC_ATOMIC[71],TCC_BUBBLE[71],TCC_CYCLE[71],TCC_EA0_ATOMIC[71],TCC_ATOMIC[72],TCC_BUBBLE[72],TCC_CYCLE[72],TCC_EA0_ATOMIC[72],TCC_ATOMIC[73],TCC_BUBBLE[73],TCC_CYCLE[73],TCC_EA0_ATOMIC[73],TCC_ATOMIC[74],TCC_BUBBLE[74],TCC_CYCLE[74],TCC_EA0_ATOMIC[74],TCC_ATOMIC[75],TCC_BUBBLE[75],TCC_CYCLE[75],TCC_EA0_ATOMIC[75],TCC_ATOMIC[76],TCC_BUBBLE[76],TCC_CYCLE[76],TCC_EA0_ATOMIC[76],TCC_ATOMIC[77],TCC_BUBBLE[77],TCC_CYCLE[77],TCC_EA0_ATOMIC[77],TCC_ATOMIC[78],TCC_BUBBLE[78],TCC_CYCLE[78],TCC_EA0_ATOMIC[78],TCC_ATOMIC[79],TCC_BUBBLE[79],TCC_CYCLE[79],TCC_EA0_ATOMIC[79],TCC_ATOMIC[80],TCC_BUBBLE[80],TCC_CYCLE[80],TCC_EA0_ATOMIC[80],TCC_ATOMIC[81],TCC_BUBBLE[81],TCC_CYCLE[81],TCC_EA0_ATOMIC[81],TCC_ATOMIC[82],TCC_BUBBLE[82],TCC_CYCLE[82],TCC_EA0_ATOMIC[82],TCC_ATOMIC[83],TCC_BUBBLE[83],TCC_CYCLE[83],TCC_EA0_ATOMIC[83],TCC_ATOMIC[84],TCC_BUBBLE[84],TCC_CYCLE[84],TCC_EA0_ATOMIC[84],TCC_ATOMIC[85],TCC_BUBBLE[85],TCC_CYCLE[85],TCC_EA0_ATOMIC[85],TCC_ATOMIC[86],TCC_BUBBLE[86],TCC_CYCLE[86],TCC_EA0_ATOMIC[86],TCC_ATOMIC[87],TCC_BUBBLE[87],TCC_CYCLE[87],TCC_EA0_ATOMIC[87],TCC_ATOMIC[88],TCC_BUBBLE[88],TCC_CYCLE[88],TCC_EA0_ATOMIC[88],TCC_ATOMIC[89],TCC_BUBBLE[89],TCC_CYCLE[89],TCC_EA0_ATOMIC[89],TCC_ATOMIC[90],TCC_BUBBLE[90],TCC_CYCLE[90],TCC_EA0_ATOMIC[90],TCC_ATOMIC[91],TCC_BUBBLE[91],TCC_CYCLE[91],TCC_EA0_ATOMIC[91],TCC_ATOMIC[92],TCC_BUBBLE[92],TCC_CYCLE[92],TCC_EA0_ATOMIC[92],TCC_ATOMIC[93],TCC_BUBBLE[93],TCC_CYCLE[93],TCC_EA0_ATOMIC[93],TCC_ATOMIC[94],TCC_BUBBLE[94],TCC_CYCLE[94],TCC_EA0_ATOMIC[94],TCC_ATOMIC[95],TCC_BUBBLE[95],TCC_CYCLE[95],TCC_EA0_ATOMIC[95],TCC_ATOMIC[96],TCC_BUBBLE[96],TCC_CYCLE[96],TCC_EA0_ATOMIC[96],TCC_ATOMIC[97],TCC_BUBBLE[97],TCC_CYCLE[97],TCC_EA0_ATOMIC[97],TCC_ATOMIC[98],TCC_BUBBLE[98],TCC_CYCLE[98],TCC_EA0_ATOMIC[98],TCC_ATOMIC[99],TCC_BUBBLE[99],TCC_CYCLE[99],TCC_EA0_ATOMIC[99],TCC_ATOMIC[100],TCC_BUBBLE[100],TCC_CYCLE[100],TCC_EA0_ATOMIC[100],TCC_ATOMIC[101],TCC_BUBBLE[101],TCC_CYCLE[101],TCC_EA0_ATOMIC[101],TCC_ATOMIC[102],TCC_BUBBLE[102],TCC_CYCLE[102],TCC_EA0_ATOMIC[102],TCC_ATOMIC[103],TCC_BUBBLE[103],TCC_CYCLE[103],TCC_EA0_ATOMIC[103],TCC_ATOMIC[104],TCC_BUBBLE[104],TCC_CYCLE[104],TCC_EA0_ATOMIC[104],TCC_ATOMIC[105],TCC_BUBBLE[105],TCC_CYCLE[105],TCC_EA0_ATOMIC[105],TCC_ATOMIC[106],TCC_BUBBLE[106],TCC_CYCLE[106],TCC_EA0_ATOMIC[106],TCC_ATOMIC[107],TCC_BUBBLE[107],TCC_CYCLE[107],TCC_EA0_ATOMIC[107],TCC_ATOMIC[108],TCC_BUBBLE[108],TCC_CYCLE[108],TCC_EA0_ATOMIC[108],TCC_ATOMIC[109],TCC_BUBBLE[109],TCC_CYCLE[109],TCC_EA0_ATOMIC[109],TCC_ATOMIC[110],TCC_BUBBLE[110],TCC_CYCLE[110],TCC_EA0_ATOMIC[110],TCC_ATOMIC[111],TCC_BUBBLE[111],TCC_CYCLE[111],TCC_EA0_ATOMIC[111],TCC_ATOMIC[112],TCC_BUBBLE[112],TCC_CYCLE[112],TCC_EA0_ATOMIC[112],TCC_ATOMIC[113],TCC_BUBBLE[113],TCC_CYCLE[113],TCC_EA0_ATOMIC[113],TCC_ATOMIC[114],TCC_BUBBLE[114],TCC_CYCLE[114],TCC_EA0_ATOMIC[114],TCC_ATOMIC[115],TCC_BUBBLE[115],TCC_CYCLE[115],TCC_EA0_ATOMIC[115],TCC_ATOMIC[116],TCC_BUBBLE[116],TCC_CYCLE[116],TCC_EA0_ATOMIC[116],TCC_ATOMIC[117],TCC_BUBBLE[117],TCC_CYCLE[117],TCC_EA0_ATOMIC[117],TCC_ATOMIC[118],TCC_BUBBLE[118],TCC_CYCLE[118],TCC_EA0_ATOMIC[118],TCC_ATOMIC[119],TCC_BUBBLE[119],TCC_CYCLE[119],TCC_EA0_ATOMIC[119],TCC_ATOMIC[120],TCC_BUBBLE[120],TCC_CYCLE[120],TCC_EA0_ATOMIC[120],TCC_ATOMIC[121],TCC_BUBBLE[121],TCC_CYCLE[121],TCC_EA0_ATOMIC[121],TCC_ATOMIC[122],TCC_BUBBLE[122],TCC_CYCLE[122],TCC_EA0_ATOMIC[122],TCC_ATOMIC[123],TCC_BUBBLE[123],TCC_CYCLE[123],TCC_EA0_ATOMIC[123],TCC_ATOMIC[124],TCC_BUBBLE[124],TCC_CYCLE[124],TCC_EA0_ATOMIC[124],TCC_ATOMIC[125],TCC_BUBBLE[125],TCC_CYCLE[125],TCC_EA0_ATOMIC[125],TCC_ATOMIC[126],TCC_BUBBLE[126],TCC_CYCLE[126],TCC_EA0_ATOMIC[126],TCC_ATOMIC[127],TCC_BUBBLE[127],TCC_CYCLE[127],TCC_EA0_ATOMIC[127],Wave_Size_2,Correlation_ID_2,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,TA_FLAT_ATOMIC_WAVEFRONTS_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,TCC_ALL_TC_OP_INV_EVICT_sum,TCC_EA0_ATOMIC_sum,TCC_NORMAL_EVICT_sum,TCC_TOO_MANY_EA_WRREQS_STALL_sum,TCP_TCC_CC_READ_REQ_sum,TCP_TCC_CC_WRITE_REQ_sum,TCP_TCC_UC_ATOMIC_REQ_sum,TCP_TCC_UC_WRITE_REQ_sum,Wave_Size_3,Correlation_ID_3,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,TCC_EA0_ATOMIC_LEVEL_sum,TCC_EA0_RDREQ_LEVEL_sum,TCC_EA0_WRREQ_LEVEL_sum,TCC_EA0_WRREQ_STALL_sum,TCP_TCC_CC_ATOMIC_REQ_sum,TCP_TCC_RW_ATOMIC_REQ_sum,TCP_TCC_RW_READ_REQ_sum,TCP_TCC_RW_WRITE_REQ_sum,Wave_Size_4,Correlation_ID_4,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SPI_RA_REQ_NO_ALLOC,SPI_RA_REQ_NO_ALLOC_CSN,CPC_CPC_STAT_STALL,CPC_UTCL1_STALL_ON_TRANSLATION,CPF_CPF_STAT_IDLE,CPF_CPF_TCIU_IDLE,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,TA_BUFFER_TOTAL_CYCLES_sum,TCC_HIT_sum,TCC_MISS_sum,TCC_REQ_sum,TCC_STREAMING_REQ_sum,TCP_TOTAL_ACCESSES_sum,TCP_TOTAL_READ_sum,TCP_TOTAL_WRITE_sum,TCP_VOLATILE_sum,TD_ATOMIC_WAVEFRONT_sum,TD_STORE_WAVEFRONT_sum,Wave_Size_5,Correlation_ID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SQ_INST_CYCLES_SALU,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,CPC_ME1_DC0_SPI_BUSY,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,TCC_BUBBLE_sum,TCC_EA0_RDREQ_32B_sum,TCC_EA0_RDREQ_sum,TCC_EA0_RD_UNCACHED_32B_sum,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,TCP_TCC_READ_REQ_sum,TCP_TCC_WRITE_REQ_sum,Start_Timestamp,End_Timestamp
+0,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) 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diff --git a/tests/workloads/dispatch_6_8/MI300X_A1/sysinfo.csv b/tests/workloads/dispatch_6_8/MI300X_A1/sysinfo.csv
new file mode 100644
index 0000000000..cfe2913817
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300X_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+dispatch_6_8,./tests/vcopy -n 1048576 -b 256 -i 3,SQ|LDS|SQC|TA|TD|TCP|TCC|SPI|CPC|CPF,Wed 29 May 2024 12:04:26 PM  (CDT),2,splinter-126-wr-c6,AMD Ryzen 9 7950X 16-Core Processor,"American Megatrends International, LLC.VS2683299N.FD",Ubuntu 22.04.4 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,114656528,,6.2.0-13611,113-MI3SRIOV-001,SPX,NPS1,MI300X_A1,gfx942,32,4096,304,4,32,64,1024,32,2100,1300,2100,1300,128,32,160,4,5324.8,8
diff --git a/tests/workloads/dispatch_6_8/MI300X_A1/timestamps.csv b/tests/workloads/dispatch_6_8/MI300X_A1/timestamps.csv
new file mode 100644
index 0000000000..167da76d1c
--- /dev/null
+++ b/tests/workloads/dispatch_6_8/MI300X_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,60633,1,968661,968661,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716456501432999,716456501448519,0
+2,60633,1,968661,968661,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716456501469197,716456501481317,0
+3,60633,1,968661,968661,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716456501500917,716456501513197,0
diff --git a/tests/workloads/dispatch_7/MI300A_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/dispatch_7/MI300A_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..9797cd6d9e
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300A_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,11995,1,145659,145659,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73612116976250,73612116984062,0,200520.0,200520.0,16384.0,65536.0,20260.0,1615768.0
+1,11995,1,145659,145659,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73612117022841,73612117028610,0,174767.0,174767.0,16384.0,65536.0,12960.0,1048724.0
+2,11995,1,145659,145659,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73612117001529,73612117007618,0,173436.0,173436.0,16384.0,65536.0,13142.0,1049584.0
diff --git a/tests/workloads/dispatch_7/MI300A_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/dispatch_7/MI300A_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..5d7a034e90
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300A_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,11995,1,145671,145671,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73612116976250,73612116984062,0,0.0,0.0,0.0
+1,11995,1,145671,145671,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73612117022841,73612117028610,0,0.0,0.0,0.0
+2,11995,1,145671,145671,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73612117001529,73612117007618,0,0.0,0.0,0.0
diff --git a/tests/workloads/dispatch_7/MI300A_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/dispatch_7/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..e5da324241
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,145683,145683,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73612116976250,73612116984062,0,65536.0,367700.0,29376408.0
+1,11995,1,145683,145683,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73612117022841,73612117028610,0,65536.0,305214.0,24435960.0
+2,11995,1,145683,145683,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73612117001529,73612117007618,0,65536.0,212272.0,17011880.0
diff --git a/tests/workloads/dispatch_7/MI300A_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/dispatch_7/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..48abbd686a
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,145695,145695,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73612116976250,73612116984062,0,32768.0,522065.0,41757108.0
+1,11995,1,145695,145695,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73612117022841,73612117028610,0,32768.0,417133.0,33364016.0
+2,11995,1,145695,145695,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73612117001529,73612117007618,0,32768.0,427880.0,34221504.0
diff --git a/tests/workloads/dispatch_7/MI300A_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/dispatch_7/MI300A_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..99aac79cac
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300A_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,11995,1,145707,145707,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73612116976250,73612116984062,0,234454.0,234454.0,141798.0,937816.0,16384.0,14020398.0,309631.0,0.0,56503220.0
+1,11995,1,145707,145707,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73612117022841,73612117028610,0,201364.0,201364.0,118527.0,805456.0,16384.0,10974423.0,205975.0,0.0,44346204.0
+2,11995,1,145707,145707,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73612117001529,73612117007618,0,178233.0,178233.0,95848.0,712932.0,16384.0,10337839.0,197034.0,0.0,41811396.0
diff --git a/tests/workloads/dispatch_7/MI300A_A1/log.txt b/tests/workloads/dispatch_7/MI300A_A1/log.txt
new file mode 100644
index 0000000000..a569066068
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300A_A1/log.txt
@@ -0,0 +1,234 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/dispatch_7/MI300A_A1
+Target: MI300A_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: ['7']
+Hardware Blocks: All
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LEVEL_WAVES
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_CVT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_WR
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_HITS
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_MISSES
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_HITS
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES_DUPLICATE
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_13.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[1]
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_14.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[1]
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_15.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[1]
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_16.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[1]
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_17.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[3]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[3]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[3]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[4]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[4]
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F64
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_SCA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_MISC
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_WR
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_THREAD_CYCLES_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ADDR_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_UNALIGNED_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_EQ_64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_48
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ITEMS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_MEM_VIOLATIONS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ATOMIC_RETURN
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_IDX_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_RESTORED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_SAVED
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_VALU_MFMA_BUSY_CYCLES
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_INST_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_READ_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_WRITE_REQ
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300A_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/dispatch_7/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/dispatch_7/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..3029bededa
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/dispatch_7/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..72f0dd7ae0
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/dispatch_7/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..d1fb435ceb
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/dispatch_7/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..f2d012a210
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/dispatch_7/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..a0472148a3
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_0.txt b/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..3488ad3feb
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD GRBM_COUNT GRBM_GUI_ACTIVE TCP_GATE_EN1_sum TCP_GATE_EN2_sum TCP_TD_TCP_STALL_CYCLES_sum TCP_TCR_TCP_STALL_CYCLES_sum TA_TA_BUSY_sum TA_BUFFER_WAVEFRONTS_sum TD_TD_BUSY_sum TD_TC_STALL_sum SPI_CSN_WINDOW_VALID SPI_CSN_BUSY CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE CPF_CPF_STAT_BUSY CPF_CPF_STAT_STALL TCC_CYCLE_sum TCC_BUSY_sum TCC_PROBE_sum TCC_PROBE_ALL_sum
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_1.txt b/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..cfe2d6150b
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 GRBM_SPI_BUSY TCP_READ_TAGCONFLICT_STALL_CYCLES_sum TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum TCP_TA_TCP_STATE_READ_sum TA_BUFFER_READ_WAVEFRONTS_sum TA_BUFFER_WRITE_WAVEFRONTS_sum TD_SPI_STALL_sum TD_LOAD_WAVEFRONT_sum SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE CPC_CPC_TCIU_BUSY CPC_CPC_TCIU_IDLE CPF_CPF_TCIU_BUSY CPF_CPF_TCIU_STALL TCC_NC_REQ_sum TCC_UC_REQ_sum TCC_CC_REQ_sum TCC_RW_REQ_sum
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_10.txt b/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..17268a66f5
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_11.txt b/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..ee721aae54
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_12.txt b/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..74e884f6c7
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_13.txt b/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_13.txt
new file mode 100644
index 0000000000..cad55c819a
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_13.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_ATOMIC[0] TCC_BUBBLE[0] TCC_CYCLE[0] TCC_EA0_ATOMIC[0] TCC_ATOMIC[1] TCC_BUBBLE[1] TCC_CYCLE[1] TCC_EA0_ATOMIC[1] TCC_ATOMIC[2] TCC_BUBBLE[2] TCC_CYCLE[2] TCC_EA0_ATOMIC[2] TCC_ATOMIC[3] TCC_BUBBLE[3] TCC_CYCLE[3] TCC_EA0_ATOMIC[3] TCC_ATOMIC[4] TCC_BUBBLE[4] TCC_CYCLE[4] TCC_EA0_ATOMIC[4] TCC_ATOMIC[5] TCC_BUBBLE[5] TCC_CYCLE[5] TCC_EA0_ATOMIC[5] TCC_ATOMIC[6] TCC_BUBBLE[6] TCC_CYCLE[6] TCC_EA0_ATOMIC[6] TCC_ATOMIC[7] TCC_BUBBLE[7] TCC_CYCLE[7] TCC_EA0_ATOMIC[7] TCC_ATOMIC[8] TCC_BUBBLE[8] TCC_CYCLE[8] TCC_EA0_ATOMIC[8] TCC_ATOMIC[9] TCC_BUBBLE[9] TCC_CYCLE[9] TCC_EA0_ATOMIC[9] TCC_ATOMIC[10] TCC_BUBBLE[10] TCC_CYCLE[10] TCC_EA0_ATOMIC[10] TCC_ATOMIC[11] TCC_BUBBLE[11] TCC_CYCLE[11] TCC_EA0_ATOMIC[11] TCC_ATOMIC[12] TCC_BUBBLE[12] TCC_CYCLE[12] TCC_EA0_ATOMIC[12] TCC_ATOMIC[13] TCC_BUBBLE[13] TCC_CYCLE[13] TCC_EA0_ATOMIC[13] TCC_ATOMIC[14] TCC_BUBBLE[14] TCC_CYCLE[14] TCC_EA0_ATOMIC[14] TCC_ATOMIC[15] TCC_BUBBLE[15] TCC_CYCLE[15] TCC_EA0_ATOMIC[15]
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_14.txt b/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_14.txt
new file mode 100644
index 0000000000..680d492d27
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_14.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_ATOMIC_LEVEL[0] TCC_EA0_RDREQ[0] TCC_EA0_RDREQ_32B[0] TCC_EA0_RDREQ_LEVEL[0] TCC_EA0_ATOMIC_LEVEL[1] TCC_EA0_RDREQ[1] TCC_EA0_RDREQ_32B[1] TCC_EA0_RDREQ_LEVEL[1] TCC_EA0_ATOMIC_LEVEL[2] TCC_EA0_RDREQ[2] TCC_EA0_RDREQ_32B[2] TCC_EA0_RDREQ_LEVEL[2] TCC_EA0_ATOMIC_LEVEL[3] TCC_EA0_RDREQ[3] TCC_EA0_RDREQ_32B[3] TCC_EA0_RDREQ_LEVEL[3] TCC_EA0_ATOMIC_LEVEL[4] TCC_EA0_RDREQ[4] TCC_EA0_RDREQ_32B[4] TCC_EA0_RDREQ_LEVEL[4] TCC_EA0_ATOMIC_LEVEL[5] TCC_EA0_RDREQ[5] TCC_EA0_RDREQ_32B[5] TCC_EA0_RDREQ_LEVEL[5] TCC_EA0_ATOMIC_LEVEL[6] TCC_EA0_RDREQ[6] TCC_EA0_RDREQ_32B[6] TCC_EA0_RDREQ_LEVEL[6] TCC_EA0_ATOMIC_LEVEL[7] TCC_EA0_RDREQ[7] TCC_EA0_RDREQ_32B[7] TCC_EA0_RDREQ_LEVEL[7] TCC_EA0_ATOMIC_LEVEL[8] TCC_EA0_RDREQ[8] TCC_EA0_RDREQ_32B[8] TCC_EA0_RDREQ_LEVEL[8] TCC_EA0_ATOMIC_LEVEL[9] TCC_EA0_RDREQ[9] TCC_EA0_RDREQ_32B[9] TCC_EA0_RDREQ_LEVEL[9] TCC_EA0_ATOMIC_LEVEL[10] TCC_EA0_RDREQ[10] TCC_EA0_RDREQ_32B[10] TCC_EA0_RDREQ_LEVEL[10] TCC_EA0_ATOMIC_LEVEL[11] TCC_EA0_RDREQ[11] TCC_EA0_RDREQ_32B[11] TCC_EA0_RDREQ_LEVEL[11] TCC_EA0_ATOMIC_LEVEL[12] TCC_EA0_RDREQ[12] TCC_EA0_RDREQ_32B[12] TCC_EA0_RDREQ_LEVEL[12] TCC_EA0_ATOMIC_LEVEL[13] TCC_EA0_RDREQ[13] TCC_EA0_RDREQ_32B[13] TCC_EA0_RDREQ_LEVEL[13] TCC_EA0_ATOMIC_LEVEL[14] TCC_EA0_RDREQ[14] TCC_EA0_RDREQ_32B[14] TCC_EA0_RDREQ_LEVEL[14] TCC_EA0_ATOMIC_LEVEL[15] TCC_EA0_RDREQ[15] TCC_EA0_RDREQ_32B[15] TCC_EA0_RDREQ_LEVEL[15]
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_15.txt b/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_15.txt
new file mode 100644
index 0000000000..d44c4dad67
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_15.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_WRREQ[0] TCC_EA0_WRREQ_64B[0] TCC_EA0_WRREQ_LEVEL[0] TCC_HIT[0] TCC_EA0_WRREQ[1] TCC_EA0_WRREQ_64B[1] TCC_EA0_WRREQ_LEVEL[1] TCC_HIT[1] TCC_EA0_WRREQ[2] TCC_EA0_WRREQ_64B[2] TCC_EA0_WRREQ_LEVEL[2] TCC_HIT[2] TCC_EA0_WRREQ[3] TCC_EA0_WRREQ_64B[3] TCC_EA0_WRREQ_LEVEL[3] TCC_HIT[3] TCC_EA0_WRREQ[4] TCC_EA0_WRREQ_64B[4] TCC_EA0_WRREQ_LEVEL[4] TCC_HIT[4] TCC_EA0_WRREQ[5] TCC_EA0_WRREQ_64B[5] TCC_EA0_WRREQ_LEVEL[5] TCC_HIT[5] TCC_EA0_WRREQ[6] TCC_EA0_WRREQ_64B[6] TCC_EA0_WRREQ_LEVEL[6] TCC_HIT[6] TCC_EA0_WRREQ[7] TCC_EA0_WRREQ_64B[7] TCC_EA0_WRREQ_LEVEL[7] TCC_HIT[7] TCC_EA0_WRREQ[8] TCC_EA0_WRREQ_64B[8] TCC_EA0_WRREQ_LEVEL[8] TCC_HIT[8] TCC_EA0_WRREQ[9] TCC_EA0_WRREQ_64B[9] TCC_EA0_WRREQ_LEVEL[9] TCC_HIT[9] TCC_EA0_WRREQ[10] TCC_EA0_WRREQ_64B[10] TCC_EA0_WRREQ_LEVEL[10] TCC_HIT[10] TCC_EA0_WRREQ[11] TCC_EA0_WRREQ_64B[11] TCC_EA0_WRREQ_LEVEL[11] TCC_HIT[11] TCC_EA0_WRREQ[12] TCC_EA0_WRREQ_64B[12] TCC_EA0_WRREQ_LEVEL[12] TCC_HIT[12] TCC_EA0_WRREQ[13] TCC_EA0_WRREQ_64B[13] TCC_EA0_WRREQ_LEVEL[13] TCC_HIT[13] TCC_EA0_WRREQ[14] TCC_EA0_WRREQ_64B[14] TCC_EA0_WRREQ_LEVEL[14] TCC_HIT[14] TCC_EA0_WRREQ[15] TCC_EA0_WRREQ_64B[15] TCC_EA0_WRREQ_LEVEL[15] TCC_HIT[15]
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_16.txt b/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_16.txt
new file mode 100644
index 0000000000..e57b605a0f
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_16.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_MISS[0] TCC_READ[0] TCC_REQ[0] TCC_RW_REQ[0] TCC_MISS[1] TCC_READ[1] TCC_REQ[1] TCC_RW_REQ[1] TCC_MISS[2] TCC_READ[2] TCC_REQ[2] TCC_RW_REQ[2] TCC_MISS[3] TCC_READ[3] TCC_REQ[3] TCC_RW_REQ[3] TCC_MISS[4] TCC_READ[4] TCC_REQ[4] TCC_RW_REQ[4] TCC_MISS[5] TCC_READ[5] TCC_REQ[5] TCC_RW_REQ[5] TCC_MISS[6] TCC_READ[6] TCC_REQ[6] TCC_RW_REQ[6] TCC_MISS[7] TCC_READ[7] TCC_REQ[7] TCC_RW_REQ[7] TCC_MISS[8] TCC_READ[8] TCC_REQ[8] TCC_RW_REQ[8] TCC_MISS[9] TCC_READ[9] TCC_REQ[9] TCC_RW_REQ[9] TCC_MISS[10] TCC_READ[10] TCC_REQ[10] TCC_RW_REQ[10] TCC_MISS[11] TCC_READ[11] TCC_REQ[11] TCC_RW_REQ[11] TCC_MISS[12] TCC_READ[12] TCC_REQ[12] TCC_RW_REQ[12] TCC_MISS[13] TCC_READ[13] TCC_REQ[13] TCC_RW_REQ[13] TCC_MISS[14] TCC_READ[14] TCC_REQ[14] TCC_RW_REQ[14] TCC_MISS[15] TCC_READ[15] TCC_REQ[15] TCC_RW_REQ[15]
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_17.txt b/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_17.txt
new file mode 100644
index 0000000000..41096669a4
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_17.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_TAG_STALL[0] TCC_TOO_MANY_EA_WRREQS_STALL[0] TCC_WRITE[0] TCC_TAG_STALL[1] TCC_TOO_MANY_EA_WRREQS_STALL[1] TCC_WRITE[1] TCC_TAG_STALL[2] TCC_TOO_MANY_EA_WRREQS_STALL[2] TCC_WRITE[2] TCC_TAG_STALL[3] TCC_TOO_MANY_EA_WRREQS_STALL[3] TCC_WRITE[3] TCC_TAG_STALL[4] TCC_TOO_MANY_EA_WRREQS_STALL[4] TCC_WRITE[4] TCC_TAG_STALL[5] TCC_TOO_MANY_EA_WRREQS_STALL[5] TCC_WRITE[5] TCC_TAG_STALL[6] TCC_TOO_MANY_EA_WRREQS_STALL[6] TCC_WRITE[6] TCC_TAG_STALL[7] TCC_TOO_MANY_EA_WRREQS_STALL[7] TCC_WRITE[7] TCC_TAG_STALL[8] TCC_TOO_MANY_EA_WRREQS_STALL[8] TCC_WRITE[8] TCC_TAG_STALL[9] TCC_TOO_MANY_EA_WRREQS_STALL[9] TCC_WRITE[9] TCC_TAG_STALL[10] TCC_TOO_MANY_EA_WRREQS_STALL[10] TCC_WRITE[10] TCC_TAG_STALL[11] TCC_TOO_MANY_EA_WRREQS_STALL[11] TCC_WRITE[11] TCC_TAG_STALL[12] TCC_TOO_MANY_EA_WRREQS_STALL[12] TCC_WRITE[12] TCC_TAG_STALL[13] TCC_TOO_MANY_EA_WRREQS_STALL[13] TCC_WRITE[13] TCC_TAG_STALL[14] TCC_TOO_MANY_EA_WRREQS_STALL[14] TCC_WRITE[14] TCC_TAG_STALL[15] TCC_TOO_MANY_EA_WRREQS_STALL[15] TCC_WRITE[15]
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_2.txt b/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..725d393ea6
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 TCP_VOLATILE_sum TCP_TOTAL_ACCESSES_sum TCP_TOTAL_READ_sum TCP_TOTAL_WRITE_sum TA_BUFFER_ATOMIC_WAVEFRONTS_sum TA_BUFFER_TOTAL_CYCLES_sum TD_ATOMIC_WAVEFRONT_sum TD_STORE_WAVEFRONT_sum SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION CPF_CPF_STAT_IDLE CPF_CPF_TCIU_IDLE TCC_REQ_sum TCC_STREAMING_REQ_sum TCC_HIT_sum TCC_MISS_sum
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_3.txt b/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..1307690fdf
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS TCP_TOTAL_ATOMIC_WITH_RET_sum TCP_TOTAL_ATOMIC_WITHOUT_RET_sum TCP_TOTAL_WRITEBACK_INVALIDATES_sum TCP_TOTAL_CACHE_ACCESSES_sum TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES_sum TD_COALESCABLE_WAVEFRONT_sum SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE CPF_CMP_UTCL1_STALL_ON_TRANSLATION TCC_READ_sum TCC_WRITE_sum TCC_ATOMIC_sum TCC_WRITEBACK_sum
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_4.txt b/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..9d232b2f88
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAIT_ANY SQ_WAIT_INST_ANY SQ_ACTIVE_INST_ANY SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU TCP_UTCL1_TRANSLATION_MISS_sum TCP_UTCL1_TRANSLATION_HIT_sum TCP_UTCL1_PERMISSION_MISS_sum TCP_UTCL1_REQUEST_sum TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_TOTAL_WAVEFRONTS_sum SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE TCC_EA0_WRREQ_sum TCC_EA0_WRREQ_64B_sum TCC_EA0_WR_UNCACHED_32B_sum TCC_EA0_WRREQ_DRAM_sum
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_5.txt b/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..fdda2b03c9
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_SCA SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU TCP_TCC_READ_REQ_sum TCP_TCC_WRITE_REQ_sum TCP_TCC_ATOMIC_WITH_RET_REQ_sum TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN CPC_ME1_DC0_SPI_BUSY TCC_EA0_RDREQ_sum TCC_EA0_RDREQ_32B_sum TCC_BUBBLE_sum TCC_EA0_RD_UNCACHED_32B_sum
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_6.txt b/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..11e47db729
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_THREAD_CYCLES_VALU SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 TCP_TCC_NC_READ_REQ_sum TCP_TCC_NC_WRITE_REQ_sum TCP_TCC_NC_ATOMIC_REQ_sum TCP_TCC_UC_READ_REQ_sum TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN TCC_EA0_RDREQ_DRAM_sum TCC_TAG_STALL_sum TCC_NORMAL_WRITEBACK_sum TCC_ALL_TC_OP_WB_WRITEBACK_sum
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_7.txt b/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..37d37f3de9
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED TCP_TCC_UC_WRITE_REQ_sum TCP_TCC_UC_ATOMIC_REQ_sum TCP_TCC_CC_READ_REQ_sum TCP_TCC_CC_WRITE_REQ_sum TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR TCC_NORMAL_EVICT_sum TCC_ALL_TC_OP_INV_EVICT_sum TCC_TOO_MANY_EA_WRREQS_STALL_sum TCC_EA0_ATOMIC_sum
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_8.txt b/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..87fcac56cd
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES TCP_TCC_CC_ATOMIC_REQ_sum TCP_TCC_RW_READ_REQ_sum TCP_TCC_RW_WRITE_REQ_sum TCP_TCC_RW_ATOMIC_REQ_sum SPI_VWC_CSC_WR SPI_RA_BULKY_CU_FULL_CSN TCC_EA0_RDREQ_LEVEL_sum TCC_EA0_WRREQ_LEVEL_sum TCC_EA0_ATOMIC_LEVEL_sum TCC_EA0_WRREQ_STALL_sum
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_9.txt b/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..bf4a8c0311
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300A_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ TCP_PENDING_STALL_CYCLES_sum
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300A_A1/perfmon/timestamps.txt b/tests/workloads/dispatch_7/MI300A_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..9f369ce301
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300A_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300A_A1/pmc_perf.csv b/tests/workloads/dispatch_7/MI300A_A1/pmc_perf.csv
new file mode 100644
index 0000000000..977cd72b84
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300A_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SQ_INSTS_BRANCH,SQ_INSTS_SENDMSG,SQ_WAIT_ANY,SQ_WAIT_INST_ANY,SQ_ACTIVE_INST_ANY,SQ_ACTIVE_INST_VMEM,SQ_ACTIVE_INST_LDS,SQ_ACTIVE_INST_VALU,SPI_RA_WAVE_SIMD_FULL_CSN,SPI_RA_VGPR_SIMD_FULL_CSN,CPC_CPC_UTCL2IU_STALL,CPC_ME1_BUSY_FOR_PACKET_DECODE,TA_ADDR_STALLED_BY_TC_CYCLES_sum,TA_TOTAL_WAVEFRONTS_sum,TCC_EA0_WRREQ_64B_sum,TCC_EA0_WRREQ_DRAM_sum,TCC_EA0_WRREQ_sum,TCC_EA0_WR_UNCACHED_32B_sum,TCP_UTCL1_PERMISSION_MISS_sum,TCP_UTCL1_REQUEST_sum,TCP_UTCL1_TRANSLATION_HIT_sum,TCP_UTCL1_TRANSLATION_MISS_sum,Wave_Size_1,Correlation_ID_1,XCC_Index,TCC_EA0_WRREQ[0],TCC_EA0_WRREQ_64B[0],TCC_EA0_WRREQ_LEVEL[0],TCC_HIT[0],TCC_EA0_WRREQ[1],TCC_EA0_WRREQ_64B[1],TCC_EA0_WRREQ_LEVEL[1],TCC_HIT[1],TCC_EA0_WRREQ[2],TCC_EA0_WRREQ_64B[2],TCC_EA0_WRREQ_LEVEL[2],TCC_HIT[2],TCC_EA0_WRREQ[3],TCC_EA0_WRREQ_64B[3],TCC_EA0_WRREQ_LEVEL[3],TCC_HIT[3],TCC_EA0_WRREQ[4],TCC_EA0_WRREQ_64B[4],TCC_EA0_WRREQ_LEVEL[4],TCC_HIT[4],TCC_EA0_WRREQ[5],TCC_EA0_WRREQ_64B[5],TCC_EA0_WRREQ_LEVEL[5],TCC_HIT[5],TCC_EA0_WRREQ[6],TCC_EA0_WRREQ_64B[6],TCC_EA0_WRREQ_LEVEL[6],TCC_HIT[6],TCC_EA0_WRREQ[7],TCC_EA0_WRREQ_64B[7],TCC_EA0_WRREQ_LEVEL[7],TCC_HIT[7],TCC_EA0_WRREQ[8],TCC_EA0_WRREQ_64B[8],TCC_EA0_WRREQ_LEVEL[8],TCC_HIT[8],TCC_EA0_WRREQ[9],TCC_EA0_WRREQ_64B[9],TCC_EA0_WRREQ_LEVEL[9],TCC_HIT[9],TCC_EA0_WRREQ[10],TCC_EA0_WRREQ_64B[10],TCC_EA0_WRREQ_LEVEL[10],TCC_HIT[10],TCC_EA0_WRREQ[11],TCC_EA0_WRREQ_64B[11],TCC_EA0_WRREQ_LEVEL[11],TCC_HIT[11],TCC_EA0_WRREQ[12],TCC_EA0_WRREQ_64B[12],TCC_EA0_WRREQ_LEVEL[12],TCC_HIT[12],TCC_EA0_WRREQ[13],TCC_EA0_WRREQ_64B[13],TCC_EA0_WRREQ_LEVEL[13],TCC_HIT[13],TCC_EA0_WRREQ[14],TCC_EA0_WRREQ_64B[14],TCC_EA0_WRREQ_LEVEL[14],TCC_HIT[14],TCC_EA0_WRREQ[15],TCC_EA0_WRREQ_64B[15],TCC_EA0_WRREQ_LEVEL[15],TCC_HIT[15],TCC_EA0_WRREQ[16],TCC_EA0_WRREQ_64B[16],TCC_EA0_WRREQ_LEVEL[16],TCC_HIT[16],TCC_EA0_WRREQ[17],TCC_EA0_WRREQ_64B[17],TCC_EA0_WRREQ_LEVEL[17],TCC_HIT[17],TCC_EA0_WRREQ[18],TCC_EA0_WRREQ_64B[18],TCC_EA0_WRREQ_LEVEL[18],TCC_HIT[18],TCC_EA0_WRREQ[19],TCC_EA0_WRREQ_64B[19],TCC_EA0_WRREQ_LEVEL[19],TCC_HIT[19],TCC_EA0_WRREQ[20],TCC_EA0_WRREQ_64B[20],TCC_EA0_WRREQ_LEVEL[20],TCC_HIT[20],TCC_EA0_WRREQ[21],TCC_EA0_WRREQ_64B[21],TCC_EA0_WRREQ_LEVEL[21],TCC_HIT[21],TCC_EA0_WRREQ[22],TCC_EA0_WRREQ_64B[22],TCC_EA0_WRREQ_LEVEL[22],TCC_HIT[22],TCC_EA0_WRREQ[23],TCC_EA0_WRREQ_64B[23],TCC_EA0_WRREQ_LEVEL[23],TCC_HIT[23],TCC_EA0_WRREQ[24],TCC_EA0_WRREQ_64B[24],TCC_EA0_WRREQ_LEVEL[24],TCC_HIT[24],TCC_EA0_WRREQ[25],TCC_EA0_WRREQ_64B[25],TCC_EA0_WRREQ_LEVEL[25],TCC_HIT[25],TCC_EA0_WRREQ[26],TCC_EA0_WRREQ_64B[26],TCC_EA0_WRREQ_LEVEL[26],TCC_HIT[26],TCC_EA0_WRREQ[27],TCC_EA0_WRREQ_64B[27],TCC_EA0_WRREQ_LEVEL[27],TCC_HIT[27],TCC_EA0_WRREQ[28],TCC_EA0_WRREQ_64B[28],TCC_EA0_WRREQ_LEVEL[28],TCC_HIT[28],TCC_EA0_WRREQ[29],TCC_EA0_WRREQ_64B[29],TCC_EA0_WRREQ_LEVEL[29],TCC_HIT[29],TCC_EA0_WRREQ[30],TCC_EA0_WRREQ_64B[30],TCC_EA0_WRREQ_LEVEL[30],TCC_HIT[30],TCC_EA0_WRREQ[31],TCC_EA0_WRREQ_64B[31],TCC_EA0_WRREQ_LEVEL[31],TCC_HIT[31],TCC_EA0_WRREQ[32],TCC_EA0_WRREQ_64B[32],TCC_EA0_WRREQ_LEVEL[32],TCC_HIT[32],TCC_EA0_WRREQ[33],TCC_EA0_WRREQ_64B[33],TCC_EA0_WRREQ_LEVEL[33],TCC_HIT[33],TCC_EA0_WRREQ[34],TCC_EA0_WRREQ_64B[34],TCC_EA0_WRREQ_LEVEL[34],TCC_HIT[34],TCC_EA0_WRREQ[35],TCC_EA0_WRREQ_64B[35],TCC_EA0_WRREQ_LEVEL[35],TCC_HIT[35],TCC_EA0_WRREQ[36],TCC_EA0_WRREQ_64B[36],TCC_EA0_WRREQ_LEVEL[36],TCC_HIT[36],TCC_EA0_WRREQ[37],TCC_EA0_WRREQ_64B[37],TCC_EA0_WRREQ_LEVEL[37],TCC_HIT[37],TCC_EA0_WRREQ[38],TCC_EA0_WRREQ_64B[38],TCC_EA0_WRREQ_LEVEL[38],TCC_HIT[38],TCC_EA0_WRREQ[39],TCC_EA0_WRREQ_64B[39],TCC_EA0_WRREQ_LEVEL[39],TCC_HIT[39],TCC_EA0_WRREQ[40],TCC_EA0_WRREQ_64B[40],TCC_EA0_WRREQ_LEVEL[40],TCC_HIT[40],TCC_EA0_WRREQ[41],TCC_EA0_WRREQ_64B[41],TCC_EA0_WRREQ_LEVEL[41],TCC_HIT[41],TCC_EA0_WRREQ[42],TCC_EA0_WRREQ_64B[42],TCC_EA0_WRREQ_LEVEL[42],TCC_HIT[42],TCC_EA0_WRREQ[43],TCC_EA0_WRREQ_64B[43],TCC_EA0_WRREQ_LEVEL[43],TCC_HIT[43],TCC_EA0_WRREQ[44],TCC_EA0_WRREQ_64B[44],TCC_EA0_WRREQ_LEVEL[44],TCC_HIT[44],TCC_EA0_WRREQ[45],TCC_EA0_WRREQ_64B[45],TCC_EA0_WRREQ_LEVEL[45],TCC_HIT[45],TCC_EA0_WRREQ[46],TCC_EA0_WRREQ_64B[46],TCC_EA0_WRREQ_LEVEL[46],TCC_HIT[46],TCC_EA0_WRREQ[47],TCC_EA0_WRREQ_64B[47],TCC_EA0_WRREQ_LEVEL[47],TCC_HIT[47],TCC_EA0_WRREQ[48],TCC_EA0_WRREQ_64B[48],TCC_EA0_WRREQ_LEVEL[48],TCC_HIT[48],TCC_EA0_WRREQ[49],TCC_EA0_WRREQ_64B[49],TCC_EA0_WRREQ_LEVEL[49],TCC_HIT[49],TCC_EA0_WRREQ[50],TCC_EA0_WRREQ_64B[50],TCC_EA0_WRREQ_LEVEL[50],TCC_HIT[50],TCC_EA0_WRREQ[51],TCC_EA0_WRREQ_64B[51],TCC_EA0_WRREQ_LEVEL[51],TCC_HIT[51],TCC_EA0_WRREQ[52],TCC_EA0_WRREQ_64B[52],TCC_EA0_WRREQ_LEVEL[52],TCC_HIT[52],TCC_EA0_WRREQ[53],TCC_EA0_WRREQ_64B[53],TCC_EA0_WRREQ_LEVEL[53],TCC_HIT[53],TCC_EA0_WRREQ[54],TCC_EA0_WRREQ_64B[54],TCC_EA0_WRREQ_LEVEL[54],TCC_HIT[54],TCC_EA0_WRREQ[55],TCC_EA0_WRREQ_64B[55],TCC_EA0_WRREQ_LEVEL[55],TCC_HIT[55],TCC_EA0_WRREQ[56],TCC_EA0_WRREQ_64B[56],TCC_EA0_WRREQ_LEVEL[56],TCC_HIT[56],TCC_EA0_WRREQ[57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CED_WRITE_CYCLES_sum,TCC_ATOMIC_sum,TCC_READ_sum,TCC_WRITEBACK_sum,TCC_WRITE_sum,TCP_TOTAL_ATOMIC_WITHOUT_RET_sum,TCP_TOTAL_ATOMIC_WITH_RET_sum,TCP_TOTAL_CACHE_ACCESSES_sum,TCP_TOTAL_WRITEBACK_INVALIDATES_sum,TD_COALESCABLE_WAVEFRONT_sum,Wave_Size_5,Correlation_ID_5,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,TA_FLAT_ATOMIC_WAVEFRONTS_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,TCC_ALL_TC_OP_INV_EVICT_sum,TCC_EA0_ATOMIC_sum,TCC_NORMAL_EVICT_sum,TCC_TOO_MANY_EA_WRREQS_STALL_sum,TCP_TCC_CC_READ_REQ_sum,TCP_TCC_CC_WRITE_REQ_sum,TCP_TCC_UC_ATOMIC_REQ_sum,TCP_TCC_UC_WRITE_REQ_sum,Wave_Size_6,Correlation_ID_6,XCC_Index_6,TCC_MISS[0],TCC_READ[0],TCC_REQ[0],TCC_RW_REQ[0],TCC_MISS[1],TCC_READ[1],TCC_REQ[1],TCC_RW_REQ[1],TCC_MISS[2],TCC_READ[2],TCC_REQ[2],TCC_RW_REQ[2],TCC_MISS[3],TCC_READ[3],TCC_REQ[3],TCC_RW_REQ[3],TCC_MISS[4],TCC_READ[4],TCC_REQ[4],TCC_RW_REQ[4],TCC_MISS[5],TCC_READ[5],TCC_REQ[5],TCC_RW_REQ[5],TCC_MISS[6],TCC_READ[6],TCC_REQ[6],TCC_RW_REQ[6],TCC_MISS[7],TCC_READ[7],TCC_REQ[7],TCC_RW_REQ[7],TCC_MISS[8],TCC_READ[8],TCC_REQ[8],TCC_RW_REQ[8],TCC_MISS[9],TCC_READ[9],TCC_REQ[9],TCC_RW_REQ[9],TCC_MISS[10],TCC_READ[10],TCC_REQ[10],TCC_RW_REQ[10],TCC_MISS[11],TCC_READ[11],TCC_REQ[11],TCC_RW_REQ[11],TCC_MISS[12],TCC_READ[12],TCC_REQ[12],TCC_RW_REQ[12],TCC_MISS[13],TCC_READ[13],TCC_REQ[13],TCC_RW_REQ[13],TCC_MISS[14],TCC_READ[14],TCC_REQ[14],TCC_RW_REQ[14],TCC_MISS[15],TCC_READ[15],TCC_REQ[15],TCC_RW_REQ[15],TCC_MISS[16],TCC_READ[16],TCC_REQ[16],TCC_RW_REQ[16],TCC_MISS[17],TCC_READ[17],TCC_REQ[17],TCC_RW_REQ[17],TCC_MISS[18],TCC_READ[18],TCC_REQ[18],TCC_RW_REQ[18],TCC_MISS[19],TCC_READ[19],TCC_REQ[19],TCC_RW_REQ[19],TCC_MISS[20],TCC_READ[20],TCC_REQ[20],TCC_RW_REQ[20],TCC_MISS[21],TCC_READ[21],TCC_REQ[21],TCC_RW_REQ[21],TCC_MISS[22],TCC_READ[22],TCC_REQ[22],TCC_RW_REQ[22],TCC_MISS[23],TCC_READ[23],TCC_REQ[23],TCC_RW_REQ[23],TCC_MISS[24],TCC_READ[24],TCC_REQ[24],TCC_RW_REQ[24],TCC_MISS[25],TCC_READ[25],TCC_REQ[25],TCC_RW_REQ[25],TCC_MISS[26],TCC_READ[26],TCC_REQ[26],TCC_RW_REQ[26],TCC_MISS[27],TCC_READ[27],TCC_REQ[27],TCC_RW_REQ[27],TCC_MISS[28],TCC_READ[28],TCC_REQ[28],TCC_RW_REQ[28],TCC_MISS[29],TCC_READ[29],TCC_REQ[29],TCC_RW_REQ[29],TCC_MISS[30],TCC_READ[30],TCC_REQ[30],TCC_RW_REQ[30],TCC_MISS[31],TCC_READ[31],TCC_REQ[31],TCC_RW_REQ[31],TCC_MISS[32],TCC_READ[32],TCC_REQ[32],TCC_RW_REQ[32],TCC_MISS[33],TCC_READ[33],TCC_REQ[33],TCC_RW_REQ[33],TCC_MISS[34],TCC_READ[34],TCC_REQ[34],TCC_RW_REQ[34],TCC_MISS[35],TCC_READ[35],TCC_REQ[35],TCC_RW_REQ[35],TCC_MISS[36],TCC_READ[36],TCC_REQ[36],TCC_RW_REQ[36],TCC_MISS[37],TCC_READ[37],TCC_REQ[37],TCC_RW_REQ[37],TCC_MISS[38],TCC_READ[38],TCC_REQ[38],TCC_RW_REQ[38],TCC_MISS[39],TCC_READ[39],TCC_REQ[39],TCC_RW_REQ[39],TCC_MISS[40],TCC_READ[40],TCC_REQ[40],TCC_RW_REQ[40],TCC_MISS[41],TCC_READ[41],TCC_REQ[41],TCC_RW_REQ[41],TCC_MISS[42],TCC_READ[42],TCC_REQ[42],TCC_RW_REQ[42],TCC_MISS[43],TCC_READ[43],TCC_REQ[43],TCC_RW_REQ[43],TCC_MISS[44],TCC_READ[44],TCC_REQ[44],TCC_RW_REQ[44],TCC_MISS[45],TCC_READ[45],TCC_REQ[45],TCC_RW_REQ[45],TCC_MISS[46],TCC_READ[46],TCC_REQ[46],TCC_RW_REQ[46],TCC_MISS[47],TCC_READ[47],TCC_REQ[47],TCC_RW_REQ[47],TCC_MISS[48],TCC_READ[48],TCC_REQ[48],TCC_RW_REQ[48],TCC_MISS[49],TCC_READ[49],TCC_REQ[49],TCC_RW_REQ[49],TCC_MISS[50],TCC_READ[50],TCC_REQ[50],TCC_RW_REQ[50],TCC_MISS[51],TCC_READ[51],TCC_REQ[51],TCC_RW_REQ[51],TCC_MISS[52],TCC_READ[52],TCC_REQ[52],TCC_RW_REQ[52],TCC_MISS[53],TCC_READ[53],TCC_REQ[53],TCC_RW_REQ[53],TCC_MISS[54],TCC_READ[54],TCC_REQ[54],TCC_RW_REQ[54],TCC_MISS[55],TCC_READ[55],TCC_REQ[55],TCC_RW_REQ[55],TCC_MISS[56],TCC_READ[56],TCC_REQ[56],TCC_RW_REQ[56],TCC_MISS[57],TCC_READ[57],TCC_REQ[57],TCC_RW_REQ[57],TCC_MISS[58],TCC_READ[58],TCC_REQ[58],TCC_RW_REQ[58],TCC_MISS[59],TCC_READ[59],TCC_REQ[59],TCC_RW_REQ[59],TCC_MISS[60],TCC_READ[60],TCC_REQ[60],TCC_RW_REQ[60],TCC_MISS[61],TCC_READ[61],TCC_REQ[61],TCC_RW_REQ[61],TCC_MISS[62],TCC_READ[62],TCC_REQ[62],TCC_RW_REQ[62],TCC_MISS[63],TCC_READ[63],TCC_REQ[63],TCC_RW_REQ[63],TCC_MISS[64],TCC_READ[64],TCC_REQ[64],TCC_RW_REQ[64],TCC_MISS[65],TCC_READ[65],TCC_REQ[65],TCC_RW_REQ[65],TCC_MISS[66],TCC_READ[66],TCC_REQ[66],TCC_RW_REQ[66],TCC_MISS[67],TCC_READ[67],TCC_REQ[67],TCC_RW_REQ[67],TCC_MISS[68],TCC_READ[68],TCC_REQ[68],TCC_RW_REQ[68],TCC_MISS[69],TCC_READ[69],TCC_REQ[69],TCC_RW_REQ[69],TCC_MISS[70],TCC_READ[70],TCC_REQ[70],TCC_RW_REQ[70],TCC_MISS[71],TCC_READ[71],TCC_REQ[71],TCC_RW_REQ[71],TCC_MISS[72],TCC_READ[72],TCC_REQ[72],TCC_RW_REQ[72],TCC_MISS[73],TCC_READ[73],TCC_REQ[73],TCC_RW_REQ[73],TCC_MISS[74],TCC_READ[74],TCC_REQ[74],TCC_RW_REQ[74],TCC_MISS[75],TCC_READ[75],TCC_REQ[75],TCC_RW_REQ[75],TCC_MISS[76],TCC_READ[76],TCC_REQ[76],TCC_RW_REQ[76],TCC_MISS[77],TCC_READ[77],TCC_REQ[77],TCC_RW_REQ[77],TCC_MISS[78],TCC_READ[78],TCC_REQ[78],TCC_RW_REQ[78],TCC_MISS[79],TCC_READ[79],TCC_REQ[79],TCC_RW_REQ[79],TCC_MISS[80],TCC_READ[80],TCC_REQ[80],TCC_RW_REQ[80],TCC_MISS[81],TCC_READ[81],TCC_REQ[81],TCC_RW_REQ[81],TCC_MISS[82],TCC_READ[82],TCC_REQ[82],TCC_RW_REQ[82],TCC_MISS[83],TCC_READ[83],TCC_REQ[83],TCC_RW_REQ[83],TCC_MISS[84],TCC_READ[84],TCC_REQ[84],TCC_RW_REQ[84],TCC_MISS[85],TCC_READ[85],TCC_REQ[85],TCC_RW_REQ[85],TCC_MISS[86],TCC_READ[86],TCC_REQ[86],TCC_RW_REQ[86],TCC_MISS[87],TCC_READ[87],TCC_REQ[87],TCC_RW_REQ[87],TCC_MISS[88],TCC_READ[88],TCC_REQ[88],TCC_RW_REQ[88],TCC_MISS[89],TCC_READ[89],TCC_REQ[89],TCC_RW_REQ[89],TCC_MISS[90],TCC_READ[90],TCC_REQ[90],TCC_RW_REQ[90],TCC_MISS[91],TCC_READ[91],TCC_REQ[91],TCC_RW_REQ[91],TCC_MISS[92],TCC_READ[92],TCC_REQ[92],TCC_RW_REQ[92],TCC_MISS[93],TCC_READ[93],TCC_REQ[93],TCC_RW_REQ[93],TCC_MISS[94],TCC_READ[94],TCC_REQ[94],TCC_RW_REQ[94],TCC_MISS[95],TCC_READ[95],TCC_REQ[95],TCC_RW_REQ[95],Wave_Size_7,Correlation_ID_7,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SPI_RA_REQ_NO_ALLOC,SPI_RA_REQ_NO_ALLOC_CSN,CPC_CPC_STAT_STALL,CPC_UTCL1_STALL_ON_TRANSLATION,CPF_CPF_STAT_IDLE,CPF_CPF_TCIU_IDLE,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,TA_BUFFER_TOTAL_CYCLES_sum,TCC_HIT_sum,TCC_MISS_sum,TCC_REQ_sum,TCC_STREAMING_REQ_sum,TCP_TOTAL_ACCESSES_sum,TCP_TOTAL_READ_sum,TCP_TOTAL_WRITE_sum,TCP_VOLATILE_sum,TD_ATOMIC_WAVEFRONT_sum,TD_STORE_WAVEFRONT_sum,Wave_Size_8,Correlation_ID_8,XCC_Index_8,TCC_ATOMIC[0],TCC_BUBBLE[0],TCC_CYCLE[0],TCC_EA0_ATOMIC[0],TCC_ATOMIC[1],TCC_BUBBLE[1],TCC_CYCLE[1],TCC_EA0_ATOMIC[1],TCC_ATOMIC[2],TCC_BUBBLE[2],TCC_CYCLE[2],TCC_EA0_ATOMIC[2],TCC_ATOMIC[3],TCC_BUBBLE[3],TCC_CYCLE[3],TCC_EA0_ATOMIC[3],TCC_ATOMIC[4],TCC_BUBBLE[4],TCC_CYCLE[4],TCC_EA0_ATOMIC[4],TCC_ATOMIC[5],TCC_BUBBLE[5],TCC_CYCLE[5],TCC_EA0_ATOMIC[5],TCC_ATOMIC[6],TCC_BUBBLE[6],TCC_CYCLE[6],TCC_EA0_ATOMIC[6],TCC_ATOMIC[7],TCC_BUBBLE[7],TCC_CYCLE[7],TCC_EA0_ATOMIC[7],TCC_ATOMIC[8],TCC_BUBBLE[8],TCC_CYCLE[8],TCC_EA0_ATOMIC[8],TCC_ATOMIC[9],TCC_BUBBLE[9],TCC_CYCLE[9],TCC_EA0_ATOMIC[9],TCC_ATOMIC[10],TCC_BUBBLE[10],TCC_CYCLE[10],TCC_EA0_ATOMIC[10],TCC_ATOMIC[11],TCC_BUBBLE[11],TCC_CYCLE[11],TCC_EA0_ATOMIC[11],TCC_ATOMIC[12],TCC_BUBBLE[12],TCC_CYCLE[12],TCC_EA0_ATOMIC[12],TCC_ATOMIC[13],TCC_BUBBLE[13],TCC_CYCLE[13],TCC_EA0_ATOMIC[13],TCC_ATOMIC[14],TCC_BUBBLE[14],TCC_CYCLE[14],TCC_EA0_ATOMIC[14],TCC_ATOMIC[15],TCC_BUBBLE[15],TCC_CYCLE[15],TCC_EA0_ATOMIC[15],TCC_ATOMIC[16],TCC_BUBBLE[16],TCC_CYCLE[16],TCC_EA0_ATOMIC[16],TCC_ATOMIC[17],TCC_BUBBLE[17],TCC_CYCLE[17],TCC_EA0_ATOMIC[17],TCC_ATOMIC[18],TCC_BUBBLE[18],TCC_CYCLE[18],TCC_EA0_ATOMIC[18],TCC_ATOMIC[19],TCC_BUBBLE[19],TCC_CYCLE[19],TCC_EA0_ATOMIC[19],TCC_ATOMIC[20],TCC_BUBBLE[20],TCC_CYCLE[20],TCC_EA0_ATOMIC[20],TCC_ATOMIC[21],TCC_BUBBLE[21],TCC_CYCLE[21],TCC_EA0_ATOMIC[21],TCC_ATOMIC[22],TCC_BUBBLE[22],TCC_CYCLE[22],TCC_EA0_ATOMIC[22],TCC_ATOMIC[23],TCC_BUBBLE[23],TCC_CYCLE[23],TCC_EA0_ATOMIC[23],TCC_ATOMIC[24],TCC_BUBBLE[24],TCC_CYCLE[24],TCC_EA0_ATOMIC[24],TCC_ATOMIC[25],TCC_BUBBLE[25],TCC_CYCLE[25],TCC_EA0_ATOMIC[25],TCC_ATOMIC[26],TCC_BUBBLE[26],TCC_CYCLE[26],TCC_EA0_ATOMIC[26],TCC_ATOMIC[27],TCC_BUBBLE[27],TCC_CYCLE[27],TCC_EA0_ATOMIC[27],TCC_ATOMIC[28],TCC_BUBBLE[28],TCC_CYCLE[28],TCC_EA0_ATOMIC[28],TCC_ATOMIC[29],TCC_BUBBLE[29],TCC_CYCLE[29],TCC_EA0_ATOMIC[29],TCC_ATOMIC[30],TCC_BUBBLE[30],TCC_CYCLE[30],TCC_EA0_ATOMIC[30],TCC_ATOMIC[31],TCC_BUBBLE[31],TCC_CYCLE[31],TCC_EA0_ATOMIC[31],TCC_ATOMIC[32],TCC_BUBBLE[32],TCC_CYCLE[32],TCC_EA0_ATOMIC[32],TCC_ATOMIC[33],TCC_BUBBLE[33],TCC_CYCLE[33],TCC_EA0_ATOMIC[33],TCC_ATOMIC[34],TCC_BUBBLE[34],TCC_CYCLE[34],TCC_EA0_ATOMIC[34],TCC_ATOMIC[35],TCC_BUBBLE[35],TCC_CYCLE[35],TCC_EA0_ATOMIC[35],TCC_ATOMIC[36],TCC_BUBBLE[36],TCC_CYCLE[36],TCC_EA0_ATOMIC[36],TCC_ATOMIC[37],TCC_BUBBLE[37],TCC_CYCLE[37],TCC_EA0_ATOMIC[37],TCC_ATOMIC[38],TCC_BUBBLE[38],TCC_CYCLE[38],TCC_EA0_ATOMIC[38],TCC_ATOMIC[39],TCC_BUBBLE[39],TCC_CYCLE[39],TCC_EA0_ATOMIC[39],TCC_ATOMIC[40],TCC_BUBBLE[40],TCC_CYCLE[40],TCC_EA0_ATOMIC[40],TCC_ATOMIC[41],TCC_BUBBLE[41],TCC_CYCLE[41],TCC_EA0_ATOMIC[41],TCC_ATOMIC[42],TCC_BUBBLE[42],TCC_CYCLE[42],TCC_EA0_ATOMIC[42],TCC_ATOMIC[43],TCC_BUBBLE[43],TCC_CYCLE[43],TCC_EA0_ATOMIC[43],TCC_ATOMIC[44],TCC_BUBBLE[44],TCC_CYCLE[44],TCC_EA0_ATOMIC[44],TCC_ATOMIC[45],TCC_BUBBLE[45],TCC_CYCLE[45],TCC_EA0_ATOMIC[45],TCC_ATOMIC[46],TCC_BUBBLE[46],TCC_CYCLE[46],TCC_EA0_ATOMIC[46],TCC_ATOMIC[47],TCC_BUBBLE[47],TCC_CYCLE[47],TCC_EA0_ATOMIC[47],TCC_ATOMIC[48],TCC_BUBBLE[48],TCC_CYCLE[48],TCC_EA0_ATOMIC[48],TCC_ATOMIC[49],TCC_BUBBLE[49],TCC_CYCLE[49],TCC_EA0_ATOMIC[49],TCC_ATOMIC[50],TCC_BUBBLE[50],TCC_CYCLE[50],TCC_EA0_ATOMIC[50],TCC_ATOMIC[51],TCC_BUBBLE[51],TCC_CYCLE[51],TCC_EA0_ATOMIC[51],TCC_ATOMIC[52],TCC_BUBBLE[52],TCC_CYCLE[52],TCC_EA0_ATOMIC[52],TCC_ATOMIC[53],TCC_BUBBLE[53],TCC_CYCLE[53],TCC_EA0_ATOMIC[53],TCC_ATOMIC[54],TCC_BUBBLE[54],TCC_CYCLE[54],TCC_EA0_ATOMIC[54],TCC_ATOMIC[55],TCC_BUBBLE[55],TCC_CYCLE[55],TCC_EA0_ATOMIC[55],TCC_ATOMIC[56],TCC_BUBBLE[56],TCC_CYCLE[56],TCC_EA0_ATOMIC[56],TCC_ATOMIC[57],TCC_BUBBLE[57],TCC_CYCLE[57],TCC_EA0_ATOMIC[57],TCC_ATOMIC[58],TCC_BUBBLE[58],TCC_CYCLE[58],TCC_EA0_ATOMIC[58],TCC_ATOMIC[59],TCC_BUBBLE[59],TCC_CYCLE[59],TCC_EA0_ATOMIC[59],TCC_ATOMIC[60],TCC_BUBBLE[60],TCC_CYCLE[60],TCC_EA0_ATOMIC[60],TCC_ATOMIC[61],TCC_BUBBLE[61],TCC_CYCLE[61],TCC_EA0_ATOMIC[61],TCC_ATOMIC[62],TCC_BUBBLE[62],TCC_CYCLE[62],TCC_EA0_ATOMIC[62],TCC_ATOMIC[63],TCC_BUBBLE[63],TCC_CYCLE[63],TCC_EA0_ATOMIC[63],TCC_ATOMIC[64],TCC_BUBBLE[64],TCC_CYCLE[64],TCC_EA0_ATOMIC[64],TCC_ATOMIC[65],TCC_BUBBLE[65],TCC_CYCLE[65],TCC_EA0_ATOMIC[65],TCC_ATOMIC[66],TCC_BUBBLE[66],TCC_CYCLE[66],TCC_EA0_ATOMIC[66],TCC_ATOMIC[67],TCC_BUBBLE[67],TCC_CYCLE[67],TCC_EA0_ATOMIC[67],TCC_ATOMIC[68],TCC_BUBBLE[68],TCC_CYCLE[68],TCC_EA0_ATOMIC[68],TCC_ATOMIC[69],TCC_BUBBLE[69],TCC_CYCLE[69],TCC_EA0_ATOMIC[69],TCC_ATOMIC[70],TCC_BUBBLE[70],TCC_CYCLE[70],TCC_EA0_ATOMIC[70],TCC_ATOMIC[71],TCC_BUBBLE[71],TCC_CYCLE[71],TCC_EA0_ATOMIC[71],TCC_ATOMIC[72],TCC_BUBBLE[72],TCC_CYCLE[72],TCC_EA0_ATOMIC[72],TCC_ATOMIC[73],TCC_BUBBLE[73],TCC_CYCLE[73],TCC_EA0_ATOMIC[73],TCC_ATOMIC[74],TCC_BUBBLE[74],TCC_CYCLE[74],TCC_EA0_ATOMIC[74],TCC_ATOMIC[75],TCC_BUBBLE[75],TCC_CYCLE[75],TCC_EA0_ATOMIC[75],TCC_ATOMIC[76],TCC_BUBBLE[76],TCC_CYCLE[76],TCC_EA0_ATOMIC[76],TCC_ATOMIC[77],TCC_BUBBLE[77],TCC_CYCLE[77],TCC_EA0_ATOMIC[77],TCC_ATOMIC[78],TCC_BUBBLE[78],TCC_CYCLE[78],TCC_EA0_ATOMIC[78],TCC_ATOMIC[79],TCC_BUBBLE[79],TCC_CYCLE[79],TCC_EA0_ATOMIC[79],TCC_ATOMIC[80],TCC_BUBBLE[80],TCC_CYCLE[80],TCC_EA0_ATOMIC[80],TCC_ATOMIC[81],TCC_BUBBLE[81],TCC_CYCLE[81],TCC_EA0_ATOMIC[81],TCC_ATOMIC[82],TCC_BUBBLE[82],TCC_CYCLE[82],TCC_EA0_ATOMIC[82],TCC_ATOMIC[83],TCC_BUBBLE[83],TCC_CYCLE[83],TCC_EA0_ATOMIC[83],TCC_ATOMIC[84],TCC_BUBBLE[84],TCC_CYCLE[84],TCC_EA0_ATOMIC[84],TCC_ATOMIC[85],TCC_BUBBLE[85],TCC_CYCLE[85],TCC_EA0_ATOMIC[85],TCC_ATOMIC[86],TCC_BUBBLE[86],TCC_CYCLE[86],TCC_EA0_ATOMIC[86],TCC_ATOMIC[87],TCC_BUBBLE[87],TCC_CYCLE[87],TCC_EA0_ATOMIC[87],TCC_ATOMIC[88],TCC_BUBBLE[88],TCC_CYCLE[88],TCC_EA0_ATOMIC[88],TCC_ATOMIC[89],TCC_BUBBLE[89],TCC_CYCLE[89],TCC_EA0_ATOMIC[89],TCC_ATOMIC[90],TCC_BUBBLE[90],TCC_CYCLE[90],TCC_EA0_ATOMIC[90],TCC_ATOMIC[91],TCC_BUBBLE[91],TCC_CYCLE[91],TCC_EA0_ATOMIC[91],TCC_ATOMIC[92],TCC_BUBBLE[92],TCC_CYCLE[92],TCC_EA0_ATOMIC[92],TCC_ATOMIC[93],TCC_BUBBLE[93],TCC_CYCLE[93],TCC_EA0_ATOMIC[93],TCC_ATOMIC[94],TCC_BUBBLE[94],TCC_CYCLE[94],TCC_EA0_ATOMIC[94],TCC_ATOMIC[95],TCC_BUBBLE[95],TCC_CYCLE[95],TCC_EA0_ATOMIC[95],Wave_Size_9,Correlation_ID_9,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_10,Correlation_ID_10,SQC_TC_DATA_ATOMIC_REQ,SQC_TC_STALL,SQC_TC_REQ,SQC_DCACHE_REQ_READ_16,SQC_ICACHE_REQ,SQC_ICACHE_HITS,SQC_ICACHE_MISSES,SQC_ICACHE_MISSES_DUPLICATE,Wave_Size_11,Correlation_ID_11,SQ_INSTS_VALU_MFMA_MOPS_I8,SQ_INSTS_VALU_MFMA_MOPS_F16,SQ_INSTS_VALU_MFMA_MOPS_BF16,SQ_INSTS_VALU_MFMA_MOPS_F32,SQ_INSTS_VALU_MFMA_MOPS_F64,SQC_TC_INST_REQ,SQC_TC_DATA_READ_REQ,SQC_TC_DATA_WRITE_REQ,TCP_PENDING_STALL_CYCLES_sum,Wave_Size_12,Correlation_ID_12,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,TCC_EA0_ATOMIC_LEVEL_sum,TCC_EA0_RDREQ_LEVEL_sum,TCC_EA0_WRREQ_LEVEL_sum,TCC_EA0_WRREQ_STALL_sum,TCP_TCC_CC_ATOMIC_REQ_sum,TCP_TCC_RW_ATOMIC_REQ_sum,TCP_TCC_RW_READ_REQ_sum,TCP_TCC_RW_WRITE_REQ_sum,Wave_Size_13,Correlation_ID_13,SQC_DCACHE_REQ_READ_2,SQC_DCACHE_REQ_READ_4,Wave_Size_14,Correlation_ID_14,SQ_ACTIVE_INST_SCA,SQ_ACTIVE_INST_EXP_GDS,SQ_ACTIVE_INST_MISC,SQ_ACTIVE_INST_FLAT,SQ_INST_CYCLES_VMEM_WR,SQ_INST_CYCLES_VMEM_RD,SQ_INST_CYCLES_SMEM,SQ_INST_CYCLES_SALU,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,CPC_ME1_DC0_SPI_BUSY,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,TCC_BUBBLE_sum,TCC_EA0_RDREQ_32B_sum,TCC_EA0_RDREQ_sum,TCC_EA0_RD_UNCACHED_32B_sum,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,TCP_TCC_READ_REQ_sum,TCP_TCC_WRITE_REQ_sum,Wave_Size_15,Correlation_ID_15,XCC_Index_15,TCC_EA0_ATOMIC_LEVEL[0],TCC_EA0_RDREQ[0],TCC_EA0_RDREQ_32B[0],TCC_EA0_RDREQ_LEVEL[0],TCC_EA0_ATOMIC_LEVEL[1],TCC_EA0_RDREQ[1],TCC_EA0_RDREQ_32B[1],TCC_EA0_RDREQ_LEVEL[1],TCC_EA0_ATOMIC_LEVEL[2],TCC_EA0_RDREQ[2],TCC_EA0_RDREQ_32B[2],TCC_EA0_RDREQ_LEVEL[2],TCC_EA0_ATOMIC_LEVEL[3],TCC_EA0_RDREQ[3],TCC_EA0_RDREQ_32B[3],TCC_EA0_RDREQ_LEVEL[3],TCC_EA0_ATOMIC_LEVEL[4],TCC_EA0_RDREQ[4],TCC_EA0_RDREQ_32B[4],TCC_EA0_RDREQ_LEVEL[4],TCC_EA0_ATOMIC_LEVEL[5],TCC_EA0_RDREQ[5],TCC_EA0_RDREQ_32B[5],TCC_EA0_RDREQ_LEVEL[5],TCC_EA0_ATOMIC_LEVEL[6],TCC_EA0_RDREQ[6],TCC_EA0_RDREQ_32B[6],TCC_EA0_RDREQ_LEVEL[6],TCC_EA0_ATOMIC_LEVEL[7],TCC_EA0_RDREQ[7],TCC_EA0_RDREQ_32B[7],TCC_EA0_RDREQ_LEVEL[7],TCC_EA0_ATOMIC_LEVEL[8],TCC_EA0_RDREQ[8],TCC_EA0_RDREQ_32B[8],TCC_EA0_RDREQ_LEVEL[8],TCC_EA0_ATOMIC_LEVEL[9],TCC_EA0_RDREQ[9],TCC_EA0_RDREQ_32B[9],TCC_EA0_RDREQ_LEVEL[9],TCC_EA0_ATOMIC_LEVEL[10],TCC_EA0_RDREQ[10],TCC_EA0_RDREQ_32B[10],TCC_EA0_RDREQ_LEVEL[10],TCC_EA0_ATOMIC_LEVEL[11],TCC_EA0_RDREQ[11],TCC_EA0_RDREQ_32B[11],TCC_EA0_RDREQ_LEVEL[11],TCC_EA0_ATOMIC_LEVEL[12],TCC_EA0_RDREQ[12],TCC_EA0_RDREQ_32B[12],TCC_EA0_RDREQ_LEVEL[12],TCC_EA0_ATOMIC_LEVEL[13],TCC_EA0_RDREQ[13],TCC_EA0_RDREQ_32B[13],TCC_EA0_RDREQ_LEVEL[13],TCC_EA0_ATOMIC_LEVEL[14],TCC_EA0_RDREQ[14],TCC_EA0_RDREQ_32B[14],TCC_EA0_RDREQ_LEVEL[14],TCC_EA0_ATOMIC_LEVEL[15],TCC_EA0_RDREQ[15],TCC_EA0_RDREQ_32B[15],TCC_EA0_RDREQ_LEVEL[15],TCC_EA0_ATOMIC_LEVEL[16],TCC_EA0_RDREQ[16],TCC_EA0_RDREQ_32B[16],TCC_EA0_RDREQ_LEVEL[16],TCC_EA0_ATOMIC_LEVEL[17],TCC_EA0_RDREQ[17],TCC_EA0_RDREQ_32B[17],TCC_EA0_RDREQ_LEVEL[17],TCC_EA0_ATOMIC_LEVEL[18],TCC_EA0_RDREQ[18],TCC_EA0_RDREQ_32B[18],TCC_EA0_RDREQ_LEVEL[18],TCC_EA0_ATOMIC_LEVEL[19],TCC_EA0_RDREQ[19],TCC_EA0_RDREQ_32B[19],TCC_EA0_RDREQ_LEVEL[19],TCC_EA0_ATOMIC_LEVEL[20],TCC_EA0_RDREQ[20],TCC_EA0_RDREQ_32B[20],TCC_EA0_RDREQ_LEVEL[20],TCC_EA0_ATOMIC_LEVEL[21],TCC_EA0_RDREQ[21],TCC_EA0_RDREQ_32B[21],TCC_EA0_RDREQ_LEVEL[21],TCC_EA0_ATOMIC_LEVEL[22],TCC_EA0_RDREQ[22],TCC_EA0_RDREQ_32B[22],TCC_EA0_RDREQ_LEVEL[22],TCC_EA0_ATOMIC_LEVEL[23],TCC_EA0_RDREQ[23],TCC_EA0_RDREQ_32B[23],TCC_EA0_RDREQ_LEVEL[23],TCC_EA0_ATOMIC_LEVEL[24],TCC_EA0_RDREQ[24],TCC_EA0_RDREQ_32B[24],TCC_EA0_RDREQ_LEVEL[24],TCC_EA0_ATOMIC_LEVEL[25],TCC_EA0_RDREQ[25],TCC_EA0_RDREQ_32B[25],TCC_EA0_RDREQ_LEVEL[25],TCC_EA0_ATOMIC_LEVEL[26],TCC_EA0_RDREQ[26],TCC_EA0_RDREQ_32B[26],TCC_EA0_RDREQ_LEVEL[26],TCC_EA0_ATOMIC_LEVEL[27],TCC_EA0_RDREQ[27],TCC_EA0_RDREQ_32B[27],TCC_EA0_RDREQ_LEVEL[27],TCC_EA0_ATOMIC_LEVEL[28],TCC_EA0_RDREQ[28],TCC_EA0_RDREQ_32B[28],TCC_EA0_RDREQ_LEVEL[28],TCC_EA0_ATOMIC_LEVEL[29],TCC_EA0_RDREQ[29],TCC_EA0_RDREQ_32B[29],TCC_EA0_RDREQ_LEVEL[29],TCC_EA0_ATOMIC_LEVEL[30],TCC_EA0_RDREQ[30],TCC_EA0_RDREQ_32B[30],TCC_EA0_RDREQ_LEVEL[30],TCC_EA0_ATOMIC_LEVEL[31],TCC_EA0_RDREQ[31],TCC_EA0_RDREQ_32B[31],TCC_EA0_RDREQ_LEVEL[31],TCC_EA0_ATOMIC_LEVEL[32],TCC_EA0_RDREQ[32],TCC_EA0_RDREQ_32B[32],TCC_EA0_RDREQ_LEVEL[32],TCC_EA0_ATOMIC_LEVEL[33],TCC_EA0_RDREQ[33],TCC_EA0_RDREQ_32B[33],TCC_EA0_RDREQ_LEVEL[33],TCC_EA0_ATOMIC_LEVEL[34],TCC_EA0_RDREQ[34],TCC_EA0_RDREQ_32B[34],TCC_EA0_RDREQ_LEVEL[34],TCC_EA0_ATOMIC_LEVEL[35],TCC_EA0_RDREQ[35],TCC_EA0_RDREQ_32B[35],TCC_EA0_RDREQ_LEVEL[35],TCC_EA0_ATOMIC_LEVEL[36],TCC_EA0_RDREQ[36],TCC_EA0_RDREQ_32B[36],TCC_EA0_RDREQ_LEVEL[36],TCC_EA0_ATOMIC_LEVEL[37],TCC_EA0_RDREQ[37],TCC_EA0_RDREQ_32B[37],TCC_EA0_RDREQ_LEVEL[37],TCC_EA0_ATOMIC_LEVEL[38],TCC_EA0_RDREQ[38],TCC_EA0_RDREQ_32B[38],TCC_EA0_RDREQ_LEVEL[38],TCC_EA0_ATOMIC_LEVEL[39],TCC_EA0_RDREQ[39],TCC_EA0_RDREQ_32B[39],TCC_EA0_RDREQ_LEVEL[39],TCC_EA0_ATOMIC_LEVEL[40],TCC_EA0_RDREQ[40],TCC_EA0_RDREQ_32B[40],TCC_EA0_RDREQ_LEVEL[40],TCC_EA0_ATOMIC_LEVEL[41],TCC_EA0_RDREQ[41],TCC_EA0_RDREQ_32B[41],TCC_EA0_RDREQ_LEVEL[41],TCC_EA0_ATOMIC_LEVEL[42],TCC_EA0_RDREQ[42],TCC_EA0_RDREQ_32B[42],TCC_EA0_RDREQ_LEVEL[42],TCC_EA0_ATOMIC_LEVEL[43],TCC_EA0_RDREQ[43],TCC_EA0_RDREQ_32B[43],TCC_EA0_RDREQ_LEVEL[43],TCC_EA0_ATOMIC_LEVEL[44],TCC_EA0_RDREQ[44],TCC_EA0_RDREQ_32B[44],TCC_EA0_RDREQ_LEVEL[44],TCC_EA0_ATOMIC_LEVEL[45],TCC_EA0_RDREQ[45],TCC_EA0_RDREQ_32B[45],TCC_EA0_RDREQ_LEVEL[45],TCC_EA0_ATOMIC_LEVEL[46],TCC_EA0_RDREQ[46],TCC_EA0_RDREQ_32B[46],TCC_EA0_RDREQ_LEVEL[46],TCC_EA0_ATOMIC_LEVEL[47],TCC_EA0_RDREQ[47],TCC_EA0_RDREQ_32B[47],TCC_EA0_RDREQ_LEVEL[47],TCC_EA0_ATOMIC_LEVEL[48],TCC_EA0_RDREQ[48],TCC_EA0_RDREQ_32B[48],TCC_EA0_RDREQ_LEVEL[48],TCC_EA0_ATOMIC_LEVEL[49],TCC_EA0_RDREQ[49],TCC_EA0_RDREQ_32B[49],TCC_EA0_RDREQ_LEVEL[49],TCC_EA0_ATOMIC_LEVEL[50],TCC_EA0_RDREQ[50],TCC_EA0_RDREQ_32B[50],TCC_EA0_RDREQ_LEVEL[50],TCC_EA0_ATOMIC_LEVEL[51],TCC_EA0_RDREQ[51],TCC_EA0_RDREQ_32B[51],TCC_EA0_RDREQ_LEVEL[51],TCC_EA0_ATOMIC_LEVEL[52],TCC_EA0_RDREQ[52],TCC_EA0_RDREQ_32B[52],TCC_EA0_RDREQ_LEVEL[52],TCC_EA0_ATOMIC_LEVEL[53],TCC_EA0_RDREQ[53],TCC_EA0_RDREQ_32B[53],TCC_EA0_RDREQ_LEVEL[53],TCC_EA0_ATOMIC_LEVEL[54],TCC_EA0_RDREQ[54],TCC_EA0_RDREQ_32B[54],TCC_EA0_RDREQ_LEVEL[54],TCC_EA0_ATOMIC_LEVEL[55],TCC_EA0_RDREQ[55],TCC_EA0_RDREQ_32B[55],TCC_EA0_RDREQ_LEVEL[55],TCC_EA0_ATOMIC_LEVEL[56],TCC_EA0_RDREQ[56],TCC_EA0_RDREQ_32B[56],TCC_EA0_RDREQ_LEVEL[56],TCC_EA0_ATOMIC_LEVEL[57],TCC_EA0_RDREQ[57],TCC_EA0_RDREQ_32B[57],TCC_EA0_RDREQ_LEVEL[57],TCC_EA0_ATOMIC_LEVEL[58],TCC_EA0_RDREQ[58],TCC_EA0_RDREQ_32B[58],TCC_EA0_RDREQ_LEVEL[58],TCC_EA0_ATOMIC_LEVEL[59],TCC_EA0_RDREQ[59],TCC_EA0_RDREQ_32B[59],TCC_EA0_RDREQ_LEVEL[59],TCC_EA0_ATOMIC_LEVEL[60],TCC_EA0_RDREQ[60],TCC_EA0_RDREQ_32B[60],TCC_EA0_RDREQ_LEVEL[60],TCC_EA0_ATOMIC_LEVEL[61],TCC_EA0_RDREQ[61],TCC_EA0_RDREQ_32B[61],TCC_EA0_RDREQ_LEVEL[61],TCC_EA0_ATOMIC_LEVEL[62],TCC_EA0_RDREQ[62],TCC_EA0_RDREQ_32B[62],TCC_EA0_RDREQ_LEVEL[62],TCC_EA0_ATOMIC_LEVEL[63],TCC_EA0_RDREQ[63],TCC_EA0_RDREQ_32B[63],TCC_EA0_RDREQ_LEVEL[63],TCC_EA0_ATOMIC_LEVEL[64],TCC_EA0_RDREQ[64],TCC_EA0_RDREQ_32B[64],TCC_EA0_RDREQ_LEVEL[64],TCC_EA0_ATOMIC_LEVEL[65],TCC_EA0_RDREQ[65],TCC_EA0_RDREQ_32B[65],TCC_EA0_RDREQ_LEVEL[65],TCC_EA0_ATOMIC_LEVEL[66],TCC_EA0_RDREQ[66],TCC_EA0_RDREQ_32B[66],TCC_EA0_RDREQ_LEVEL[66],TCC_EA0_ATOMIC_LEVEL[67],TCC_EA0_RDREQ[67],TCC_EA0_RDREQ_32B[67],TCC_EA0_RDREQ_LEVEL[67],TCC_EA0_ATOMIC_LEVEL[68],TCC_EA0_RDREQ[68],TCC_EA0_RDREQ_32B[68],TCC_EA0_RDREQ_LEVEL[68],TCC_EA0_ATOMIC_LEVEL[69],TCC_EA0_RDREQ[69],TCC_EA0_RDREQ_32B[69],TCC_EA0_RDREQ_LEVEL[69],TCC_EA0_ATOMIC_LEVEL[70],TCC_EA0_RDREQ[70],TCC_EA0_RDREQ_32B[70],TCC_EA0_RDREQ_LEVEL[70],TCC_EA0_ATOMIC_LEVEL[71],TCC_EA0_RDREQ[71],TCC_EA0_RDREQ_32B[71],TCC_EA0_RDREQ_LEVEL[71],TCC_EA0_ATOMIC_LEVEL[72],TCC_EA0_RDREQ[72],TCC_EA0_RDREQ_32B[72],TCC_EA0_RDREQ_LEVEL[72],TCC_EA0_ATOMIC_LEVEL[73],TCC_EA0_RDREQ[73],TCC_EA0_RDREQ_32B[73],TCC_EA0_RDREQ_LEVEL[73],TCC_EA0_ATOMIC_LEVEL[74],TCC_EA0_RDREQ[74],TCC_EA0_RDREQ_32B[74],TCC_EA0_RDREQ_LEVEL[74],TCC_EA0_ATOMIC_LEVEL[75],TCC_EA0_RDREQ[75],TCC_EA0_RDREQ_32B[75],TCC_EA0_RDREQ_LEVEL[75],TCC_EA0_ATOMIC_LEVEL[76],TCC_EA0_RDREQ[76],TCC_EA0_RDREQ_32B[76],TCC_EA0_RDREQ_LEVEL[76],TCC_EA0_ATOMIC_LEVEL[77],TCC_EA0_RDREQ[77],TCC_EA0_RDREQ_32B[77],TCC_EA0_RDREQ_LEVEL[77],TCC_EA0_ATOMIC_LEVEL[78],TCC_EA0_RDREQ[78],TCC_EA0_RDREQ_32B[78],TCC_EA0_RDREQ_LEVEL[78],TCC_EA0_ATOMIC_LEVEL[79],TCC_EA0_RDREQ[79],TCC_EA0_RDREQ_32B[79],TCC_EA0_RDREQ_LEVEL[79],TCC_EA0_ATOMIC_LEVEL[80],TCC_EA0_RDREQ[80],TCC_EA0_RDREQ_32B[80],TCC_EA0_RDREQ_LEVEL[80],TCC_EA0_ATOMIC_LEVEL[81],TCC_EA0_RDREQ[81],TCC_EA0_RDREQ_32B[81],TCC_EA0_RDREQ_LEVEL[81],TCC_EA0_ATOMIC_LEVEL[82],TCC_EA0_RDREQ[82],TCC_EA0_RDREQ_32B[82],TCC_EA0_RDREQ_LEVEL[82],TCC_EA0_ATOMIC_LEVEL[83],TCC_EA0_RDREQ[83],TCC_EA0_RDREQ_32B[83],TCC_EA0_RDREQ_LEVEL[83],TCC_EA0_ATOMIC_LEVEL[84],TCC_EA0_RDREQ[84],TCC_EA0_RDREQ_32B[84],TCC_EA0_RDREQ_LEVEL[84],TCC_EA0_ATOMIC_LEVEL[85],TCC_EA0_RDREQ[85],TCC_EA0_RDREQ_32B[85],TCC_EA0_RDREQ_LEVEL[85],TCC_EA0_ATOMIC_LEVEL[86],TCC_EA0_RDREQ[86],TCC_EA0_RDREQ_32B[86],TCC_EA0_RDREQ_LEVEL[86],TCC_EA0_ATOMIC_LEVEL[87],TCC_EA0_RDREQ[87],TCC_EA0_RDREQ_32B[87],TCC_EA0_RDREQ_LEVEL[87],TCC_EA0_ATOMIC_LEVEL[88],TCC_EA0_RDREQ[88],TCC_EA0_RDREQ_32B[88],TCC_EA0_RDREQ_LEVEL[88],TCC_EA0_ATOMIC_LEVEL[89],TCC_EA0_RDREQ[89],TCC_EA0_RDREQ_32B[89],TCC_EA0_RDREQ_LEVEL[89],TCC_EA0_ATOMIC_LEVEL[90],TCC_EA0_RDREQ[90],TCC_EA0_RDREQ_32B[90],TCC_EA0_RDREQ_LEVEL[90],TCC_EA0_ATOMIC_LEVEL[91],TCC_EA0_RDREQ[91],TCC_EA0_RDREQ_32B[91],TCC_EA0_RDREQ_LEVEL[91],TCC_EA0_ATOMIC_LEVEL[92],TCC_EA0_RDREQ[92],TCC_EA0_RDREQ_32B[92],TCC_EA0_RDREQ_LEVEL[92],TCC_EA0_ATOMIC_LEVEL[93],TCC_EA0_RDREQ[93],TCC_EA0_RDREQ_32B[93],TCC_EA0_RDREQ_LEVEL[93],TCC_EA0_ATOMIC_LEVEL[94],TCC_EA0_RDREQ[94],TCC_EA0_RDREQ_32B[94],TCC_EA0_RDREQ_LEVEL[94],TCC_EA0_ATOMIC_LEVEL[95],TCC_EA0_RDREQ[95],TCC_EA0_RDREQ_32B[95],TCC_EA0_RDREQ_LEVEL[95],Wave_Size_16,Correlation_ID_16,SQ_INSTS_VMEM,SQ_INSTS_SALU,SQ_INSTS_VSKIPPED,SQ_INSTS,SQ_INSTS_VALU,SQ_INSTS_VALU_ADD_F16,SQ_INSTS_VALU_MUL_F16,SQ_INSTS_VALU_FMA_F16,GRBM_SPI_BUSY,SPI_CSN_NUM_THREADGROUPS,SPI_CSN_WAVE,CPC_CPC_TCIU_BUSY,CPC_CPC_TCIU_IDLE,CPF_CPF_TCIU_BUSY,CPF_CPF_TCIU_STALL,TA_BUFFER_READ_WAVEFRONTS_sum,TA_BUFFER_WRITE_WAVEFRONTS_sum,TCC_CC_REQ_sum,TCC_NC_REQ_sum,TCC_RW_REQ_sum,TCC_UC_REQ_sum,TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum,TCP_READ_TAGCONFLICT_STALL_CYCLES_sum,TCP_TA_TCP_STATE_READ_sum,TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum,TD_LOAD_WAVEFRONT_sum,TD_SPI_STALL_sum,Wave_Size_17,Correlation_ID_17,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_BUSY_CU_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_INSTS_VALU_CVT,SQ_INSTS_VMEM_WR,SQ_INSTS_VMEM_RD,GRBM_COUNT,GRBM_GUI_ACTIVE,SPI_CSN_WINDOW_VALID,SPI_CSN_BUSY,CPC_CPC_STAT_BUSY,CPC_CPC_STAT_IDLE,CPF_CPF_STAT_BUSY,CPF_CPF_STAT_STALL,TA_BUFFER_WAVEFRONTS_sum,TA_TA_BUSY_sum,TCC_BUSY_sum,TCC_CYCLE_sum,TCC_PROBE_ALL_sum,TCC_PROBE_sum,TCP_GATE_EN1_sum,TCP_GATE_EN2_sum,TCP_TCR_TCP_STALL_CYCLES_sum,TCP_TD_TCP_STALL_CYCLES_sum,TD_TC_STALL_sum,TD_TD_BUSY_sum,Start_Timestamp,End_Timestamp
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diff --git a/tests/workloads/dispatch_7/MI300A_A1/sysinfo.csv b/tests/workloads/dispatch_7/MI300A_A1/sysinfo.csv
new file mode 100644
index 0000000000..c04f406b67
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300A_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+dispatch_7,./tests/vcopy -n 1048576 -b 256 -i 3,SQ|LDS|SQC|TA|TD|TCP|TCC|SPI|CPC|CPF,Wed 29 May 2024 01:35:34 PM  (CDT),2,sh5-1w300-rg3-3,AMD Instinct MI300A Accelerator,"American Megatrends International, LLC.RMO1002DS",Ubuntu 22.04.2 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,131174852,,6.1.2-110,N/A,SPX,NPS1,MI300A_A1,gfx942,32,24576,228,4,24,64,1024,32,2100,1300,2100,1300,96,32,120,4,5324.8,6
diff --git a/tests/workloads/dispatch_7/MI300A_A1/timestamps.csv b/tests/workloads/dispatch_7/MI300A_A1/timestamps.csv
new file mode 100644
index 0000000000..53ea07b466
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300A_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,11995,1,145939,145939,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73612116976250,73612116984062,0
+3,11995,1,145939,145939,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73612117022841,73612117028610,0
+2,11995,1,145939,145939,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73612117001529,73612117007618,0
diff --git a/tests/workloads/dispatch_7/MI300X_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/dispatch_7/MI300X_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..0a48e38f2d
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300X_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,60633,1,964303,964303,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716227786739855,716227786756614,0,436794.0,436794.0,16384.0,65536.0,41313.0,3304124.0
+1,60633,1,964303,964303,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716227786779014,716227786792332,0,430539.0,430539.0,16384.0,65536.0,13191.0,1048584.0
+2,60633,1,964303,964303,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716227786812052,716227786824851,0,396600.0,396600.0,16384.0,65536.0,13181.0,1048576.0
diff --git a/tests/workloads/dispatch_7/MI300X_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/dispatch_7/MI300X_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..7c00bee759
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300X_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,60633,1,964315,964315,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716227786739855,716227786756614,0,0.0,0.0,0.0
+1,60633,1,964315,964315,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716227786779014,716227786792332,0,0.0,0.0,0.0
+2,60633,1,964315,964315,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716227786812052,716227786824851,0,0.0,0.0,0.0
diff --git a/tests/workloads/dispatch_7/MI300X_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/dispatch_7/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..15624ab431
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,964327,964327,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716227786739855,716227786756614,0,65536.0,4093762.0,327510064.0
+1,60633,1,964327,964327,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716227786779014,716227786792332,0,65536.0,3955174.0,316400792.0
+2,60633,1,964327,964327,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716227786812052,716227786824851,0,65536.0,3812116.0,304925720.0
diff --git a/tests/workloads/dispatch_7/MI300X_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/dispatch_7/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..8a198661a3
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,964339,964339,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716227786739855,716227786756614,0,32768.0,517304.0,41375816.0
+1,60633,1,964339,964339,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716227786779014,716227786792332,0,32768.0,374121.0,29922068.0
+2,60633,1,964339,964339,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716227786812052,716227786824851,0,32768.0,380026.0,30402744.0
diff --git a/tests/workloads/dispatch_7/MI300X_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/dispatch_7/MI300X_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..b7a4447def
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300X_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,60633,1,964351,964351,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716227786739855,716227786756614,0,487199.0,487199.0,287122.0,1948796.0,16384.0,38200095.0,599740.0,0.0,153146944.0
+1,60633,1,964351,964351,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716227786779014,716227786792332,0,404767.0,404767.0,216694.0,1619068.0,16384.0,33913618.0,541214.0,0.0,136015372.0
+2,60633,1,964351,964351,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716227786812052,716227786824851,0,441902.0,441902.0,261889.0,1767608.0,16384.0,33026963.0,527458.0,0.0,132464220.0
diff --git a/tests/workloads/dispatch_7/MI300X_A1/log.txt b/tests/workloads/dispatch_7/MI300X_A1/log.txt
new file mode 100644
index 0000000000..c94ac8323f
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300X_A1/log.txt
@@ -0,0 +1,215 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/dispatch_7/MI300X_A1
+Target: MI300X_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: ['7']
+Hardware Blocks: All
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH_LEVEL
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_CVT
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_HITS
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES_DUPLICATE
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_13.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[1]
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_14.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[1]
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_15.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[1]
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_16.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[1]
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_17.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[1]
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F32
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_ANY
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_SCA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_MISC
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_WR
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_RD
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_THREAD_CYCLES_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ADDR_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_UNALIGNED_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_EQ_64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_64
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ITEMS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_MEM_VIOLATIONS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ATOMIC_RETURN
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_IDX_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_RESTORED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_SAVED
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F32
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+
+[profiling] Current input file: tests/workloads/dispatch_7/MI300X_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/dispatch_7/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/dispatch_7/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..3029bededa
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/dispatch_7/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..72f0dd7ae0
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/dispatch_7/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..d1fb435ceb
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/dispatch_7/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..f2d012a210
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/dispatch_7/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..a0472148a3
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_0.txt b/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..3488ad3feb
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD GRBM_COUNT GRBM_GUI_ACTIVE TCP_GATE_EN1_sum TCP_GATE_EN2_sum TCP_TD_TCP_STALL_CYCLES_sum TCP_TCR_TCP_STALL_CYCLES_sum TA_TA_BUSY_sum TA_BUFFER_WAVEFRONTS_sum TD_TD_BUSY_sum TD_TC_STALL_sum SPI_CSN_WINDOW_VALID SPI_CSN_BUSY CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE CPF_CPF_STAT_BUSY CPF_CPF_STAT_STALL TCC_CYCLE_sum TCC_BUSY_sum TCC_PROBE_sum TCC_PROBE_ALL_sum
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_1.txt b/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..cfe2d6150b
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 GRBM_SPI_BUSY TCP_READ_TAGCONFLICT_STALL_CYCLES_sum TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum TCP_TA_TCP_STATE_READ_sum TA_BUFFER_READ_WAVEFRONTS_sum TA_BUFFER_WRITE_WAVEFRONTS_sum TD_SPI_STALL_sum TD_LOAD_WAVEFRONT_sum SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE CPC_CPC_TCIU_BUSY CPC_CPC_TCIU_IDLE CPF_CPF_TCIU_BUSY CPF_CPF_TCIU_STALL TCC_NC_REQ_sum TCC_UC_REQ_sum TCC_CC_REQ_sum TCC_RW_REQ_sum
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_10.txt b/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..17268a66f5
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_11.txt b/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..ee721aae54
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_12.txt b/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..74e884f6c7
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_13.txt b/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_13.txt
new file mode 100644
index 0000000000..cad55c819a
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_13.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_ATOMIC[0] TCC_BUBBLE[0] TCC_CYCLE[0] TCC_EA0_ATOMIC[0] TCC_ATOMIC[1] TCC_BUBBLE[1] TCC_CYCLE[1] TCC_EA0_ATOMIC[1] TCC_ATOMIC[2] TCC_BUBBLE[2] TCC_CYCLE[2] TCC_EA0_ATOMIC[2] TCC_ATOMIC[3] TCC_BUBBLE[3] TCC_CYCLE[3] TCC_EA0_ATOMIC[3] TCC_ATOMIC[4] TCC_BUBBLE[4] TCC_CYCLE[4] TCC_EA0_ATOMIC[4] TCC_ATOMIC[5] TCC_BUBBLE[5] TCC_CYCLE[5] TCC_EA0_ATOMIC[5] TCC_ATOMIC[6] TCC_BUBBLE[6] TCC_CYCLE[6] TCC_EA0_ATOMIC[6] TCC_ATOMIC[7] TCC_BUBBLE[7] TCC_CYCLE[7] TCC_EA0_ATOMIC[7] TCC_ATOMIC[8] TCC_BUBBLE[8] TCC_CYCLE[8] TCC_EA0_ATOMIC[8] TCC_ATOMIC[9] TCC_BUBBLE[9] TCC_CYCLE[9] TCC_EA0_ATOMIC[9] TCC_ATOMIC[10] TCC_BUBBLE[10] TCC_CYCLE[10] TCC_EA0_ATOMIC[10] TCC_ATOMIC[11] TCC_BUBBLE[11] TCC_CYCLE[11] TCC_EA0_ATOMIC[11] TCC_ATOMIC[12] TCC_BUBBLE[12] TCC_CYCLE[12] TCC_EA0_ATOMIC[12] TCC_ATOMIC[13] TCC_BUBBLE[13] TCC_CYCLE[13] TCC_EA0_ATOMIC[13] TCC_ATOMIC[14] TCC_BUBBLE[14] TCC_CYCLE[14] TCC_EA0_ATOMIC[14] TCC_ATOMIC[15] TCC_BUBBLE[15] TCC_CYCLE[15] TCC_EA0_ATOMIC[15]
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_14.txt b/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_14.txt
new file mode 100644
index 0000000000..680d492d27
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_14.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_ATOMIC_LEVEL[0] TCC_EA0_RDREQ[0] TCC_EA0_RDREQ_32B[0] TCC_EA0_RDREQ_LEVEL[0] TCC_EA0_ATOMIC_LEVEL[1] TCC_EA0_RDREQ[1] TCC_EA0_RDREQ_32B[1] TCC_EA0_RDREQ_LEVEL[1] TCC_EA0_ATOMIC_LEVEL[2] TCC_EA0_RDREQ[2] TCC_EA0_RDREQ_32B[2] TCC_EA0_RDREQ_LEVEL[2] TCC_EA0_ATOMIC_LEVEL[3] TCC_EA0_RDREQ[3] TCC_EA0_RDREQ_32B[3] TCC_EA0_RDREQ_LEVEL[3] TCC_EA0_ATOMIC_LEVEL[4] TCC_EA0_RDREQ[4] TCC_EA0_RDREQ_32B[4] TCC_EA0_RDREQ_LEVEL[4] TCC_EA0_ATOMIC_LEVEL[5] TCC_EA0_RDREQ[5] TCC_EA0_RDREQ_32B[5] TCC_EA0_RDREQ_LEVEL[5] TCC_EA0_ATOMIC_LEVEL[6] TCC_EA0_RDREQ[6] TCC_EA0_RDREQ_32B[6] TCC_EA0_RDREQ_LEVEL[6] TCC_EA0_ATOMIC_LEVEL[7] TCC_EA0_RDREQ[7] TCC_EA0_RDREQ_32B[7] TCC_EA0_RDREQ_LEVEL[7] TCC_EA0_ATOMIC_LEVEL[8] TCC_EA0_RDREQ[8] TCC_EA0_RDREQ_32B[8] TCC_EA0_RDREQ_LEVEL[8] TCC_EA0_ATOMIC_LEVEL[9] TCC_EA0_RDREQ[9] TCC_EA0_RDREQ_32B[9] TCC_EA0_RDREQ_LEVEL[9] TCC_EA0_ATOMIC_LEVEL[10] TCC_EA0_RDREQ[10] TCC_EA0_RDREQ_32B[10] TCC_EA0_RDREQ_LEVEL[10] TCC_EA0_ATOMIC_LEVEL[11] TCC_EA0_RDREQ[11] TCC_EA0_RDREQ_32B[11] TCC_EA0_RDREQ_LEVEL[11] TCC_EA0_ATOMIC_LEVEL[12] TCC_EA0_RDREQ[12] TCC_EA0_RDREQ_32B[12] TCC_EA0_RDREQ_LEVEL[12] TCC_EA0_ATOMIC_LEVEL[13] TCC_EA0_RDREQ[13] TCC_EA0_RDREQ_32B[13] TCC_EA0_RDREQ_LEVEL[13] TCC_EA0_ATOMIC_LEVEL[14] TCC_EA0_RDREQ[14] TCC_EA0_RDREQ_32B[14] TCC_EA0_RDREQ_LEVEL[14] TCC_EA0_ATOMIC_LEVEL[15] TCC_EA0_RDREQ[15] TCC_EA0_RDREQ_32B[15] TCC_EA0_RDREQ_LEVEL[15]
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_15.txt b/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_15.txt
new file mode 100644
index 0000000000..d44c4dad67
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_15.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_WRREQ[0] TCC_EA0_WRREQ_64B[0] TCC_EA0_WRREQ_LEVEL[0] TCC_HIT[0] TCC_EA0_WRREQ[1] TCC_EA0_WRREQ_64B[1] TCC_EA0_WRREQ_LEVEL[1] TCC_HIT[1] TCC_EA0_WRREQ[2] TCC_EA0_WRREQ_64B[2] TCC_EA0_WRREQ_LEVEL[2] TCC_HIT[2] TCC_EA0_WRREQ[3] TCC_EA0_WRREQ_64B[3] TCC_EA0_WRREQ_LEVEL[3] TCC_HIT[3] TCC_EA0_WRREQ[4] TCC_EA0_WRREQ_64B[4] TCC_EA0_WRREQ_LEVEL[4] TCC_HIT[4] TCC_EA0_WRREQ[5] TCC_EA0_WRREQ_64B[5] TCC_EA0_WRREQ_LEVEL[5] TCC_HIT[5] TCC_EA0_WRREQ[6] TCC_EA0_WRREQ_64B[6] TCC_EA0_WRREQ_LEVEL[6] TCC_HIT[6] TCC_EA0_WRREQ[7] TCC_EA0_WRREQ_64B[7] TCC_EA0_WRREQ_LEVEL[7] TCC_HIT[7] TCC_EA0_WRREQ[8] TCC_EA0_WRREQ_64B[8] TCC_EA0_WRREQ_LEVEL[8] TCC_HIT[8] TCC_EA0_WRREQ[9] TCC_EA0_WRREQ_64B[9] TCC_EA0_WRREQ_LEVEL[9] TCC_HIT[9] TCC_EA0_WRREQ[10] TCC_EA0_WRREQ_64B[10] TCC_EA0_WRREQ_LEVEL[10] TCC_HIT[10] TCC_EA0_WRREQ[11] TCC_EA0_WRREQ_64B[11] TCC_EA0_WRREQ_LEVEL[11] TCC_HIT[11] TCC_EA0_WRREQ[12] TCC_EA0_WRREQ_64B[12] TCC_EA0_WRREQ_LEVEL[12] TCC_HIT[12] TCC_EA0_WRREQ[13] TCC_EA0_WRREQ_64B[13] TCC_EA0_WRREQ_LEVEL[13] TCC_HIT[13] TCC_EA0_WRREQ[14] TCC_EA0_WRREQ_64B[14] TCC_EA0_WRREQ_LEVEL[14] TCC_HIT[14] TCC_EA0_WRREQ[15] TCC_EA0_WRREQ_64B[15] TCC_EA0_WRREQ_LEVEL[15] TCC_HIT[15]
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_16.txt b/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_16.txt
new file mode 100644
index 0000000000..e57b605a0f
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_16.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_MISS[0] TCC_READ[0] TCC_REQ[0] TCC_RW_REQ[0] TCC_MISS[1] TCC_READ[1] TCC_REQ[1] TCC_RW_REQ[1] TCC_MISS[2] TCC_READ[2] TCC_REQ[2] TCC_RW_REQ[2] TCC_MISS[3] TCC_READ[3] TCC_REQ[3] TCC_RW_REQ[3] TCC_MISS[4] TCC_READ[4] TCC_REQ[4] TCC_RW_REQ[4] TCC_MISS[5] TCC_READ[5] TCC_REQ[5] TCC_RW_REQ[5] TCC_MISS[6] TCC_READ[6] TCC_REQ[6] TCC_RW_REQ[6] TCC_MISS[7] TCC_READ[7] TCC_REQ[7] TCC_RW_REQ[7] TCC_MISS[8] TCC_READ[8] TCC_REQ[8] TCC_RW_REQ[8] TCC_MISS[9] TCC_READ[9] TCC_REQ[9] TCC_RW_REQ[9] TCC_MISS[10] TCC_READ[10] TCC_REQ[10] TCC_RW_REQ[10] TCC_MISS[11] TCC_READ[11] TCC_REQ[11] TCC_RW_REQ[11] TCC_MISS[12] TCC_READ[12] TCC_REQ[12] TCC_RW_REQ[12] TCC_MISS[13] TCC_READ[13] TCC_REQ[13] TCC_RW_REQ[13] TCC_MISS[14] TCC_READ[14] TCC_REQ[14] TCC_RW_REQ[14] TCC_MISS[15] TCC_READ[15] TCC_REQ[15] TCC_RW_REQ[15]
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_17.txt b/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_17.txt
new file mode 100644
index 0000000000..41096669a4
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_17.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_TAG_STALL[0] TCC_TOO_MANY_EA_WRREQS_STALL[0] TCC_WRITE[0] TCC_TAG_STALL[1] TCC_TOO_MANY_EA_WRREQS_STALL[1] TCC_WRITE[1] TCC_TAG_STALL[2] TCC_TOO_MANY_EA_WRREQS_STALL[2] TCC_WRITE[2] TCC_TAG_STALL[3] TCC_TOO_MANY_EA_WRREQS_STALL[3] TCC_WRITE[3] TCC_TAG_STALL[4] TCC_TOO_MANY_EA_WRREQS_STALL[4] TCC_WRITE[4] TCC_TAG_STALL[5] TCC_TOO_MANY_EA_WRREQS_STALL[5] TCC_WRITE[5] TCC_TAG_STALL[6] TCC_TOO_MANY_EA_WRREQS_STALL[6] TCC_WRITE[6] TCC_TAG_STALL[7] TCC_TOO_MANY_EA_WRREQS_STALL[7] TCC_WRITE[7] TCC_TAG_STALL[8] TCC_TOO_MANY_EA_WRREQS_STALL[8] TCC_WRITE[8] TCC_TAG_STALL[9] TCC_TOO_MANY_EA_WRREQS_STALL[9] TCC_WRITE[9] TCC_TAG_STALL[10] TCC_TOO_MANY_EA_WRREQS_STALL[10] TCC_WRITE[10] TCC_TAG_STALL[11] TCC_TOO_MANY_EA_WRREQS_STALL[11] TCC_WRITE[11] TCC_TAG_STALL[12] TCC_TOO_MANY_EA_WRREQS_STALL[12] TCC_WRITE[12] TCC_TAG_STALL[13] TCC_TOO_MANY_EA_WRREQS_STALL[13] TCC_WRITE[13] TCC_TAG_STALL[14] TCC_TOO_MANY_EA_WRREQS_STALL[14] TCC_WRITE[14] TCC_TAG_STALL[15] TCC_TOO_MANY_EA_WRREQS_STALL[15] TCC_WRITE[15]
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_2.txt b/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..725d393ea6
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 TCP_VOLATILE_sum TCP_TOTAL_ACCESSES_sum TCP_TOTAL_READ_sum TCP_TOTAL_WRITE_sum TA_BUFFER_ATOMIC_WAVEFRONTS_sum TA_BUFFER_TOTAL_CYCLES_sum TD_ATOMIC_WAVEFRONT_sum TD_STORE_WAVEFRONT_sum SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION CPF_CPF_STAT_IDLE CPF_CPF_TCIU_IDLE TCC_REQ_sum TCC_STREAMING_REQ_sum TCC_HIT_sum TCC_MISS_sum
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_3.txt b/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..1307690fdf
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS TCP_TOTAL_ATOMIC_WITH_RET_sum TCP_TOTAL_ATOMIC_WITHOUT_RET_sum TCP_TOTAL_WRITEBACK_INVALIDATES_sum TCP_TOTAL_CACHE_ACCESSES_sum TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES_sum TD_COALESCABLE_WAVEFRONT_sum SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE CPF_CMP_UTCL1_STALL_ON_TRANSLATION TCC_READ_sum TCC_WRITE_sum TCC_ATOMIC_sum TCC_WRITEBACK_sum
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_4.txt b/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..9d232b2f88
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAIT_ANY SQ_WAIT_INST_ANY SQ_ACTIVE_INST_ANY SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU TCP_UTCL1_TRANSLATION_MISS_sum TCP_UTCL1_TRANSLATION_HIT_sum TCP_UTCL1_PERMISSION_MISS_sum TCP_UTCL1_REQUEST_sum TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_TOTAL_WAVEFRONTS_sum SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE TCC_EA0_WRREQ_sum TCC_EA0_WRREQ_64B_sum TCC_EA0_WR_UNCACHED_32B_sum TCC_EA0_WRREQ_DRAM_sum
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_5.txt b/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..fdda2b03c9
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_SCA SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU TCP_TCC_READ_REQ_sum TCP_TCC_WRITE_REQ_sum TCP_TCC_ATOMIC_WITH_RET_REQ_sum TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN CPC_ME1_DC0_SPI_BUSY TCC_EA0_RDREQ_sum TCC_EA0_RDREQ_32B_sum TCC_BUBBLE_sum TCC_EA0_RD_UNCACHED_32B_sum
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_6.txt b/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..11e47db729
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_THREAD_CYCLES_VALU SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 TCP_TCC_NC_READ_REQ_sum TCP_TCC_NC_WRITE_REQ_sum TCP_TCC_NC_ATOMIC_REQ_sum TCP_TCC_UC_READ_REQ_sum TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN TCC_EA0_RDREQ_DRAM_sum TCC_TAG_STALL_sum TCC_NORMAL_WRITEBACK_sum TCC_ALL_TC_OP_WB_WRITEBACK_sum
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_7.txt b/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..37d37f3de9
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED TCP_TCC_UC_WRITE_REQ_sum TCP_TCC_UC_ATOMIC_REQ_sum TCP_TCC_CC_READ_REQ_sum TCP_TCC_CC_WRITE_REQ_sum TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR TCC_NORMAL_EVICT_sum TCC_ALL_TC_OP_INV_EVICT_sum TCC_TOO_MANY_EA_WRREQS_STALL_sum TCC_EA0_ATOMIC_sum
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_8.txt b/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..87fcac56cd
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES TCP_TCC_CC_ATOMIC_REQ_sum TCP_TCC_RW_READ_REQ_sum TCP_TCC_RW_WRITE_REQ_sum TCP_TCC_RW_ATOMIC_REQ_sum SPI_VWC_CSC_WR SPI_RA_BULKY_CU_FULL_CSN TCC_EA0_RDREQ_LEVEL_sum TCC_EA0_WRREQ_LEVEL_sum TCC_EA0_ATOMIC_LEVEL_sum TCC_EA0_WRREQ_STALL_sum
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_9.txt b/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..bf4a8c0311
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300X_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ TCP_PENDING_STALL_CYCLES_sum
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300X_A1/perfmon/timestamps.txt b/tests/workloads/dispatch_7/MI300X_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..9f369ce301
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300X_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range: 7
+kernel:
diff --git a/tests/workloads/dispatch_7/MI300X_A1/pmc_perf.csv b/tests/workloads/dispatch_7/MI300X_A1/pmc_perf.csv
new file mode 100644
index 0000000000..312ed2d7d0
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300X_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_1,Correlation_ID_1,XCC_Index,TCC_ATOMIC[0],TCC_BUBBLE[0],TCC_CYCLE[0],TCC_EA0_ATOMIC[0],TCC_ATOMIC[1],TCC_BUBBLE[1],TCC_CYCLE[1],TCC_EA0_ATOMIC[1],TCC_ATOMIC[2],TCC_BUBBLE[2],TCC_CYCLE[2],TCC_EA0_ATOMIC[2],TCC_ATOMIC[3],TCC_BUBBLE[3],TCC_CYCLE[3],TCC_EA0_ATOMIC[3],TCC_ATOMIC[4],TCC_BUBBLE[4],TCC_CYCLE[4],TCC_EA0_ATOMIC[4],TCC_ATOMIC[5],TCC_BUBBLE[5],TCC_CYCLE[5],TCC_EA0_ATOMIC[5],TCC_ATOMIC[6],TCC_BUBBLE[6],TCC_CYCLE[6],TCC_EA0_ATOMIC[6],TCC_ATOMIC[7],TCC_BUBBLE[7],TCC_CYCLE[7],TCC_EA0_ATOMIC[7],TCC_ATOMIC[8],TCC_BUBBLE[8],TCC_CYCLE[8],TCC_EA0_ATOMIC[8],TCC_ATOMIC[9],TCC_BUBBLE[9],TCC_CYCLE[9],TCC_EA0_ATOMIC[9],TCC_ATOMIC[10],TCC_BUBBLE[10],TCC_CYCLE[10],TCC_EA0_ATOMIC[10],TCC_ATOMIC[11],TCC_BUBBLE[11],TCC_CYCLE[11],TCC_EA0_ATOMIC[11],TCC_ATOMIC[12],TCC_BUBBLE[12],TCC_CYCLE[12],TCC_EA0_ATOMIC[12],TCC_ATOMIC[13],TCC_BUBBLE[13],TCC_CYCLE[13],TCC_EA0_ATOMIC[13],TCC_ATOMIC[14],TCC_BUBBLE[14],TCC_CYCLE[14],TCC_EA0_ATOMIC[14],TCC_ATOMIC[15],TCC_BUBBLE[15],TCC_CYCLE[15],TCC_EA0_ATOMIC[15],TCC_ATOMIC[16],TCC_BUBBLE[16],TCC_CYCLE[16],TCC_EA0_ATOMIC[16],TCC_ATOMIC[17],TCC_BUBBLE[17],TCC_CYCLE[17],TCC_EA0_ATOMIC[17],TCC_ATOMIC[18],TCC_BUBBLE[18],TCC_CYCLE[18],TCC_EA0_ATOMIC[18],TCC_ATOMIC[19],TCC_BUBBLE[19],TCC_CYCLE[19],TCC_EA0_ATOMIC[19],TCC_ATOMIC[20],TCC_BUBBLE[20],TCC_CYCLE[20],TCC_EA0_ATOMIC[20],TCC_ATOMIC[21],TCC_BUBBLE[21],TCC_CYCLE[21],TCC_EA0_ATOMIC[21],TCC_ATOMIC[22],TCC_BUBBLE[22],TCC_CYCLE[22],TCC_EA0_ATOMIC[22],TCC_ATOMIC[23],TCC_BUBBLE[23],TCC_CYCLE[23],TCC_EA0_ATOMIC[23],TCC_ATOMIC[24],TCC_BUBBLE[24],TCC_CYCLE[24],TCC_EA0_ATOMIC[24],TCC_ATOMIC[25],TCC_BUBBLE[25],TCC_CYCLE[25],TCC_EA0_ATOMIC[25],TCC_ATOMIC[26],TCC_BUBBLE[26],TCC_CYCLE[26],TCC_EA0_ATOMIC[26],TCC_ATOMIC[27],TCC_BUBBLE[27],TCC_CYCLE[27],TCC_EA0_ATOMIC[27],TCC_ATOMIC[28],TCC_BUBBLE[28],TCC_CYCLE[28],TCC_EA0_ATOMIC[28],TCC_ATOMIC[29],TCC_BUBBLE[29],TCC_CYCLE[29],TCC_EA0_ATOMIC[29],TCC_ATOMIC[30],TCC_BUBBLE[30],TCC_CYCLE[30],TCC_EA0_ATOMIC[30],TCC_ATOMIC[31],TCC_BUBBLE[31],TCC_CYCLE[31],TCC_EA0_ATOMIC[31],TCC_ATOMIC[32],TCC_BUBBLE[32],TCC_CYCLE[32],TCC_EA0_ATOMIC[32],TCC_ATOMIC[33],TCC_BUBBLE[33],TCC_CYCLE[33],TCC_EA0_ATOMIC[33],TCC_ATOMIC[34],TCC_BUBBLE[34],TCC_CYCLE[34],TCC_EA0_ATOMIC[34],TCC_ATOMIC[35],TCC_BUBBLE[35],TCC_CYCLE[35],TCC_EA0_ATOMIC[35],TCC_ATOMIC[36],TCC_BUBBLE[36],TCC_CYCLE[36],TCC_EA0_ATOMIC[36],TCC_ATOMIC[37],TCC_BUBBLE[37],TCC_CYCLE[37],TCC_EA0_ATOMIC[37],TCC_ATOMIC[38],TCC_BUBBLE[38],TCC_CYCLE[38],TCC_EA0_ATOMIC[38],TCC_ATOMIC[39],TCC_BUBBLE[39],TCC_CYCLE[39],TCC_EA0_ATOMIC[39],TCC_ATOMIC[40],TCC_BUBBLE[40],TCC_CYCLE[40],TCC_EA0_ATOMIC[40],TCC_ATOMIC[41],TCC_BUBBLE[41],TCC_CYCLE[41],TCC_EA0_ATOMIC[41],TCC_ATOMIC[42],TCC_BUBBLE[42],TCC_CYCLE[42],TCC_EA0_ATOMIC[42],TCC_ATOMIC[43],TCC_BUBBLE[43],TCC_CYCLE[43],TCC_EA0_ATOMIC[43],TCC_ATOMIC[44],TCC_BUBBLE[44],TCC_CYCLE[44],TCC_EA0_ATOMIC[44],TCC_ATOMIC[45],TCC_BUBBLE[45],TCC_CYCLE[45],TCC_EA0_ATOMIC[45],TCC_ATOMIC[46],TCC_BUBBLE[46],TCC_CYCLE[46],TCC_EA0_ATOMIC[46],TCC_ATOMIC[47],TCC_BUBBLE[47],TCC_CYCLE[47],TCC_EA0_ATOMIC[47],TCC_ATOMIC[48],TCC_BUBBLE[48],TCC_CYCLE[48],TCC_EA0_ATOMIC[48],TCC_ATOMIC[49],TCC_BUBBLE[49],TCC_CYCLE[49],TCC_EA0_ATOMIC[49],TCC_ATOMIC[50],TCC_BUBBLE[50],TCC_CYCLE[50],TCC_EA0_ATOMIC[50],TCC_ATOMIC[51],TCC_BUBBLE[51],TCC_CYCLE[51],TCC_EA0_ATOMIC[51],TCC_ATOMIC[52],TCC_BUBBLE[52],TCC_CYCLE[52],TCC_EA0_ATOMIC[52],TCC_ATOMIC[53],TCC_BUBBLE[53],TCC_CYCLE[53],TCC_EA0_ATOMIC[53],TCC_ATOMIC[54],TCC_BUBBLE[54],TCC_CYCLE[54],TCC_EA0_ATOMIC[54],TCC_ATOMIC[55],TCC_BUBBLE[55],TCC_CYCLE[55],TCC_EA0_ATOMIC[55],TCC_ATOMIC[56],TCC_BUBBLE[56],TCC_CYCLE[56],TCC_EA0_ATOMIC[56],TCC_ATOMIC[57],TCC_BUBBLE[57],TCC_CYCLE[57],TCC_EA0_ATOMIC[57],TCC_ATOMIC[58],TCC_BUBBLE[58],TCC_CYCLE[58],TCC_EA0_ATOMIC[58],TCC_ATOMIC[59],TCC_BUBBLE[59],TCC_CYCLE[59],TCC_EA0_ATOMIC[59],TCC_ATOMIC[60],TCC_BUBBLE[60],TCC_CYCLE[60],TCC_EA0_ATOMIC[60],TCC_ATOMIC[61],TCC_BUBBLE[61],TCC_CYCLE[61],TCC_EA0_ATOMIC[61],TCC_ATOMIC[62],TCC_BUBBLE[62],TCC_CYCLE[62],TCC_EA0_ATOMIC[62],TCC_ATOMIC[63],TCC_BUBBLE[63],TCC_CYCLE[63],TCC_EA0_ATOMIC[63],TCC_ATOMIC[64],TCC_BUBBLE[64],TCC_CYCLE[64],TCC_EA0_ATOMIC[64],TCC_ATOMIC[65],TCC_BUBBLE[65],TCC_CYCLE[65],TCC_EA0_ATOMIC[65],TCC_ATOMIC[66],TCC_BUBBLE[66],TCC_CYCLE[66],TCC_EA0_ATOMIC[66],TCC_ATOMIC[67],TCC_BUBBLE[67],TCC_CYCLE[67],TCC_EA0_ATOMIC[67],TCC_ATOMIC[68],TCC_BUBBLE[68],TCC_CYCLE[68],TCC_EA0_ATOMIC[68],TCC_ATOMIC[69],TCC_BUBBLE[69],TCC_CYCLE[69],TCC_EA0_ATOMIC[69],TCC_ATOMIC[70],TCC_BUBBLE[70],TCC_CYCLE[70],TCC_EA0_ATOMIC[70],TCC_ATOMIC[71],TCC_BUBBLE[71],TCC_CYCLE[71],TCC_EA0_ATOMIC[71],TCC_ATOMIC[72],TCC_BUBBLE[72],TCC_CYCLE[72],TCC_EA0_ATOMIC[72],TCC_ATOMIC[73],TCC_BUBBLE[73],TCC_CYCLE[73],TCC_EA0_ATOMIC[73],TCC_ATOMIC[74],TCC_BUBBLE[74],TCC_CYCLE[74],TCC_EA0_ATOMIC[74],TCC_ATOMIC[75],TCC_BUBBLE[75],TCC_CYCLE[75],TCC_EA0_ATOMIC[75],TCC_ATOMIC[76],TCC_BUBBLE[76],TCC_CYCLE[76],TCC_EA0_ATOMIC[76],TCC_ATOMIC[77],TCC_BUBBLE[77],TCC_CYCLE[77],TCC_EA0_ATOMIC[77],TCC_ATOMIC[78],TCC_BUBBLE[78],TCC_CYCLE[78],TCC_EA0_ATOMIC[78],TCC_ATOMIC[79],TCC_BUBBLE[79],TCC_CYCLE[79],TCC_EA0_ATOMIC[79],TCC_ATOMIC[80],TCC_BUBBLE[80],TCC_CYCLE[80],TCC_EA0_ATOMIC[80],TCC_ATOMIC[81],TCC_BUBBLE[81],TCC_CYCLE[81],TCC_EA0_ATOMIC[81],TCC_ATOMIC[82],TCC_BUBBLE[82],TCC_CYCLE[82],TCC_EA0_ATOMIC[82],TCC_ATOMIC[83],TCC_BUBBLE[83],TCC_CYCLE[83],TCC_EA0_ATOMIC[83],TCC_ATOMIC[84],TCC_BUBBLE[84],TCC_CYCLE[84],TCC_EA0_ATOMIC[84],TCC_ATOMIC[85],TCC_BUBBLE[85],TCC_CYCLE[85],TCC_EA0_ATOMIC[85],TCC_ATOMIC[86],TCC_BUBBLE[86],TCC_CYCLE[86],TCC_EA0_ATOMIC[86],TCC_ATOMIC[87],TCC_BUBBLE[87],TCC_CYCLE[87],TCC_EA0_ATOMIC[87],TCC_ATOMIC[88],TCC_BUBBLE[88],TCC_CYCLE[88],TCC_EA0_ATOMIC[88],TCC_ATOMIC[89],TCC_BUBBLE[89],TCC_CYCLE[89],TCC_EA0_ATOMIC[89],TCC_ATOMIC[90],TCC_BUBBLE[90],TCC_CYCLE[90],TCC_EA0_ATOMIC[90],TCC_ATOMIC[91],TCC_BUBBLE[91],TCC_CYCLE[91],TCC_EA0_ATOMIC[91],TCC_ATOMIC[92],TCC_BUBBLE[92],TCC_CYCLE[92],TCC_EA0_ATOMIC[92],TCC_ATOMIC[93],TCC_BUBBLE[93],TCC_CYCLE[93],TCC_EA0_ATOMIC[93],TCC_ATOMIC[94],TCC_BUBBLE[94],TCC_CYCLE[94],TCC_EA0_ATOMIC[94],TCC_ATOMIC[95],TCC_BUBBLE[95],TCC_CYCLE[95],TCC_EA0_ATOMIC[95],TCC_ATOMIC[96],TCC_BUBBLE[96],TCC_CYCLE[96],TCC_EA0_ATOMIC[96],TCC_ATOMIC[97],TCC_BUBBLE[97],TCC_CYCLE[97],TCC_EA0_ATOMIC[97],TCC_ATOMIC[98],TCC_BUBBLE[98],TCC_CYCLE[98],TCC_EA0_ATOMIC[98],TCC_ATOMIC[99],TCC_BUBBLE[99],TCC_CYCLE[99],TCC_EA0_ATOMIC[99],TCC_ATOMIC[100],TCC_BUBBLE[100],TCC_CYCLE[100],TCC_EA0_ATOMIC[100],TCC_ATOMIC[101],TCC_BUBBLE[101],TCC_CYCLE[101],TCC_EA0_ATOMIC[101],TCC_ATOMIC[102],TCC_BUBBLE[102],TCC_CYCLE[102],TCC_EA0_ATOMIC[102],TCC_ATOMIC[103],TCC_BUBBLE[103],TCC_CYCLE[103],TCC_EA0_ATOMIC[103],TCC_ATOMIC[104],TCC_BUBBLE[104],TCC_CYCLE[104],TCC_EA0_ATOMIC[104],TCC_ATOMIC[105],TCC_BUBBLE[105],TCC_CYCLE[105],TCC_EA0_ATOMIC[105],TCC_ATOMIC[106],TCC_BUBBLE[106],TCC_CYCLE[106],TCC_EA0_ATOMIC[106],TCC_ATOMIC[107],TCC_BUBBLE[107],TCC_CYCLE[107],TCC_EA0_ATOMIC[107],TCC_ATOMIC[108],TCC_BUBBLE[108],TCC_CYCLE[108],TCC_EA0_ATOMIC[108],TCC_ATOMIC[109],TCC_BUBBLE[109],TCC_CYCLE[109],TCC_EA0_ATOMIC[109],TCC_ATOMIC[110],TCC_BUBBLE[110],TCC_CYCLE[110],TCC_EA0_ATOMIC[110],TCC_ATOMIC[111],TCC_BUBBLE[111],TCC_CYCLE[111],TCC_EA0_ATOMIC[111],TCC_ATOMIC[112],TCC_BUBBLE[112],TCC_CYCLE[112],TCC_EA0_ATOMIC[112],TCC_ATOMIC[113],TCC_BUBBLE[113],TCC_CYCLE[113],TCC_EA0_ATOMIC[113],TCC_ATOMIC[114],TCC_BUBBLE[114],TCC_CYCLE[114],TCC_EA0_ATOMIC[114],TCC_ATOMIC[115],TCC_BUBBLE[115],TCC_CYCLE[115],TCC_EA0_ATOMIC[115],TCC_ATOMIC[116],TCC_BUBBLE[116],TCC_CYCLE[116],TCC_EA0_ATOMIC[116],TCC_ATOMIC[117],TCC_BUBBLE[117],TCC_CYCLE[117],TCC_EA0_ATOMIC[117],TCC_ATOMIC[118],TCC_BUBBLE[118],TCC_CYCLE[118],TCC_EA0_ATOMIC[118],TCC_ATOMIC[119],TCC_BUBBLE[119],TCC_CYCLE[119],TCC_EA0_ATOMIC[119],TCC_ATOMIC[120],TCC_BUBBLE[120],TCC_CYCLE[120],TCC_EA0_ATOMIC[120],TCC_ATOMIC[121],TCC_BUBBLE[121],TCC_CYCLE[121],TCC_EA0_ATOMIC[121],TCC_ATOMIC[122],TCC_BUBBLE[122],TCC_CYCLE[122],TCC_EA0_ATOMIC[122],TCC_ATOMIC[123],TCC_BUBBLE[123],TCC_CYCLE[123],TCC_EA0_ATOMIC[123],TCC_ATOMIC[124],TCC_BUBBLE[124],TCC_CYCLE[124],TCC_EA0_ATOMIC[124],TCC_ATOMIC[125],TCC_BUBBLE[125],TCC_CYCLE[125],TCC_EA0_ATOMIC[125],TCC_ATOMIC[126],TCC_BUBBLE[126],TCC_CYCLE[126],TCC_EA0_ATOMIC[126],TCC_ATOMIC[127],TCC_BUBBLE[127],TCC_CYCLE[127],TCC_EA0_ATOMIC[127],Wave_Size_2,Correlation_ID_2,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,TA_FLAT_ATOMIC_WAVEFRONTS_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,TCC_ALL_TC_OP_INV_EVICT_sum,TCC_EA0_ATOMIC_sum,TCC_NORMAL_EVICT_sum,TCC_TOO_MANY_EA_WRREQS_STALL_sum,TCP_TCC_CC_READ_REQ_sum,TCP_TCC_CC_WRITE_REQ_sum,TCP_TCC_UC_ATOMIC_REQ_sum,TCP_TCC_UC_WRITE_REQ_sum,Wave_Size_3,Correlation_ID_3,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,TCC_EA0_ATOMIC_LEVEL_sum,TCC_EA0_RDREQ_LEVEL_sum,TCC_EA0_WRREQ_LEVEL_sum,TCC_EA0_WRREQ_STALL_sum,TCP_TCC_CC_ATOMIC_REQ_sum,TCP_TCC_RW_ATOMIC_REQ_sum,TCP_TCC_RW_READ_REQ_sum,TCP_TCC_RW_WRITE_REQ_sum,Wave_Size_4,Correlation_ID_4,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SPI_RA_REQ_NO_ALLOC,SPI_RA_REQ_NO_ALLOC_CSN,CPC_CPC_STAT_STALL,CPC_UTCL1_STALL_ON_TRANSLATION,CPF_CPF_STAT_IDLE,CPF_CPF_TCIU_IDLE,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,TA_BUFFER_TOTAL_CYCLES_sum,TCC_HIT_sum,TCC_MISS_sum,TCC_REQ_sum,TCC_STREAMING_REQ_sum,TCP_TOTAL_ACCESSES_sum,TCP_TOTAL_READ_sum,TCP_TOTAL_WRITE_sum,TCP_VOLATILE_sum,TD_ATOMIC_WAVEFRONT_sum,TD_STORE_WAVEFRONT_sum,Wave_Size_5,Correlation_ID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SQ_INST_CYCLES_SALU,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,CPC_ME1_DC0_SPI_BUSY,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,TCC_BUBBLE_sum,TCC_EA0_RDREQ_32B_sum,TCC_EA0_RDREQ_sum,TCC_EA0_RD_UNCACHED_32B_sum,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,TCP_TCC_READ_REQ_sum,TCP_TCC_WRITE_REQ_sum,Start_Timestamp,End_Timestamp
+0,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) 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diff --git a/tests/workloads/dispatch_7/MI300X_A1/sysinfo.csv b/tests/workloads/dispatch_7/MI300X_A1/sysinfo.csv
new file mode 100644
index 0000000000..57080613a9
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300X_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+dispatch_7,./tests/vcopy -n 1048576 -b 256 -i 3,SQ|LDS|SQC|TA|TD|TCP|TCC|SPI|CPC|CPF,Wed 29 May 2024 12:00:37 PM  (CDT),2,splinter-126-wr-c6,AMD Ryzen 9 7950X 16-Core Processor,"American Megatrends International, LLC.VS2683299N.FD",Ubuntu 22.04.4 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,114656528,,6.2.0-13611,113-MI3SRIOV-001,SPX,NPS1,MI300X_A1,gfx942,32,4096,304,4,32,64,1024,32,2100,1300,2100,1300,128,32,160,4,5324.8,8
diff --git a/tests/workloads/dispatch_7/MI300X_A1/timestamps.csv b/tests/workloads/dispatch_7/MI300X_A1/timestamps.csv
new file mode 100644
index 0000000000..63827e1b25
--- /dev/null
+++ b/tests/workloads/dispatch_7/MI300X_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,60633,1,964579,964579,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716227786739855,716227786756614,0
+2,60633,1,964579,964579,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716227786779014,716227786792332,0
+3,60633,1,964579,964579,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716227786812052,716227786824851,0
diff --git a/tests/workloads/dispatch_inv/MI300A_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/dispatch_inv/MI300A_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..a0eeb7267f
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300A_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,11995,1,142118,142118,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73285541833672,73285541841404,0,202827.0,202827.0,16384.0,65536.0,28620.0,2297628.0
+1,11995,1,142118,142118,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73285541860632,73285541867162,0,202737.0,202737.0,16384.0,65536.0,13055.0,1048628.0
+2,11995,1,142118,142118,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73285541884388,73285541890838,0,162339.0,162339.0,16384.0,65536.0,13065.0,1049388.0
diff --git a/tests/workloads/dispatch_inv/MI300A_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/dispatch_inv/MI300A_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..f50f47d0b6
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300A_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,11995,1,142130,142130,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73285541833672,73285541841404,0,0.0,0.0,0.0
+1,11995,1,142130,142130,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73285541860632,73285541867162,0,0.0,0.0,0.0
+2,11995,1,142130,142130,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73285541884388,73285541890838,0,0.0,0.0,0.0
diff --git a/tests/workloads/dispatch_inv/MI300A_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/dispatch_inv/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..94301df8a3
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,142142,142142,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73285541833672,73285541841404,0,65536.0,341158.0,27350288.0
+1,11995,1,142142,142142,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73285541860632,73285541867162,0,65536.0,288638.0,23108600.0
+2,11995,1,142142,142142,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73285541884388,73285541890838,0,65536.0,195816.0,15617512.0
diff --git a/tests/workloads/dispatch_inv/MI300A_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/dispatch_inv/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..e00112cd48
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,142154,142154,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73285541833672,73285541841404,0,32768.0,538203.0,43053984.0
+1,11995,1,142154,142154,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73285541860632,73285541867162,0,32768.0,425515.0,34036704.0
+2,11995,1,142154,142154,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73285541884388,73285541890838,0,32768.0,430832.0,34453616.0
diff --git a/tests/workloads/dispatch_inv/MI300A_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/dispatch_inv/MI300A_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..e7699db76b
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300A_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,11995,1,142166,142166,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73285541833672,73285541841404,0,212714.0,212714.0,117273.0,850856.0,16384.0,13896876.0,258927.0,0.0,56015688.0
+1,11995,1,142166,142166,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73285541860632,73285541867162,0,200364.0,200364.0,117231.0,801456.0,16384.0,10727754.0,200440.0,0.0,43332436.0
+2,11995,1,142166,142166,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73285541884388,73285541890838,0,175947.0,175947.0,94374.0,703788.0,16384.0,10086001.0,192594.0,0.0,40773648.0
diff --git a/tests/workloads/dispatch_inv/MI300A_A1/log.txt b/tests/workloads/dispatch_inv/MI300A_A1/log.txt
new file mode 100644
index 0000000000..fad01bf4af
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300A_A1/log.txt
@@ -0,0 +1,233 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/dispatch_inv/MI300A_A1
+Target: MI300A_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: ['invalid']
+Hardware Blocks: All
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LEVEL_WAVES
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_13.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[0]
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_14.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[1]
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_15.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[1]
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_16.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[1]
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_17.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[2]
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F64
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_EXP_GDS
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_VALU
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_SCA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_MISC
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_WR
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_RD
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_SMEM
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_THREAD_CYCLES_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ADDR_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_UNALIGNED_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_EQ_64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_64
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ITEMS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_MEM_VIOLATIONS
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_VALU_MFMA_BUSY_CYCLES
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_INST_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_READ_REQ
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300A_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/dispatch_inv/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..e7209bdada
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..67fb5049bc
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..81efe0fd5b
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..bbf5c9dbb7
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..1422b5f0d7
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_0.txt b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..26f993c80e
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD GRBM_COUNT GRBM_GUI_ACTIVE TCP_GATE_EN1_sum TCP_GATE_EN2_sum TCP_TD_TCP_STALL_CYCLES_sum TCP_TCR_TCP_STALL_CYCLES_sum TA_TA_BUSY_sum TA_BUFFER_WAVEFRONTS_sum TD_TD_BUSY_sum TD_TC_STALL_sum SPI_CSN_WINDOW_VALID SPI_CSN_BUSY CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE CPF_CPF_STAT_BUSY CPF_CPF_STAT_STALL TCC_CYCLE_sum TCC_BUSY_sum TCC_PROBE_sum TCC_PROBE_ALL_sum
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_1.txt b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..8a0b8338d5
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 GRBM_SPI_BUSY TCP_READ_TAGCONFLICT_STALL_CYCLES_sum TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum TCP_TA_TCP_STATE_READ_sum TA_BUFFER_READ_WAVEFRONTS_sum TA_BUFFER_WRITE_WAVEFRONTS_sum TD_SPI_STALL_sum TD_LOAD_WAVEFRONT_sum SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE CPC_CPC_TCIU_BUSY CPC_CPC_TCIU_IDLE CPF_CPF_TCIU_BUSY CPF_CPF_TCIU_STALL TCC_NC_REQ_sum TCC_UC_REQ_sum TCC_CC_REQ_sum TCC_RW_REQ_sum
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_10.txt b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..668d46196a
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_11.txt b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..bd56969872
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_12.txt b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..0d33ae03c1
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_13.txt b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_13.txt
new file mode 100644
index 0000000000..3b7be35af5
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_13.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_ATOMIC[0] TCC_BUBBLE[0] TCC_CYCLE[0] TCC_EA0_ATOMIC[0] TCC_ATOMIC[1] TCC_BUBBLE[1] TCC_CYCLE[1] TCC_EA0_ATOMIC[1] TCC_ATOMIC[2] TCC_BUBBLE[2] TCC_CYCLE[2] TCC_EA0_ATOMIC[2] TCC_ATOMIC[3] TCC_BUBBLE[3] TCC_CYCLE[3] TCC_EA0_ATOMIC[3] TCC_ATOMIC[4] TCC_BUBBLE[4] TCC_CYCLE[4] TCC_EA0_ATOMIC[4] TCC_ATOMIC[5] TCC_BUBBLE[5] TCC_CYCLE[5] TCC_EA0_ATOMIC[5] TCC_ATOMIC[6] TCC_BUBBLE[6] TCC_CYCLE[6] TCC_EA0_ATOMIC[6] TCC_ATOMIC[7] TCC_BUBBLE[7] TCC_CYCLE[7] TCC_EA0_ATOMIC[7] TCC_ATOMIC[8] TCC_BUBBLE[8] TCC_CYCLE[8] TCC_EA0_ATOMIC[8] TCC_ATOMIC[9] TCC_BUBBLE[9] TCC_CYCLE[9] TCC_EA0_ATOMIC[9] TCC_ATOMIC[10] TCC_BUBBLE[10] TCC_CYCLE[10] TCC_EA0_ATOMIC[10] TCC_ATOMIC[11] TCC_BUBBLE[11] TCC_CYCLE[11] TCC_EA0_ATOMIC[11] TCC_ATOMIC[12] TCC_BUBBLE[12] TCC_CYCLE[12] TCC_EA0_ATOMIC[12] TCC_ATOMIC[13] TCC_BUBBLE[13] TCC_CYCLE[13] TCC_EA0_ATOMIC[13] TCC_ATOMIC[14] TCC_BUBBLE[14] TCC_CYCLE[14] TCC_EA0_ATOMIC[14] TCC_ATOMIC[15] TCC_BUBBLE[15] TCC_CYCLE[15] TCC_EA0_ATOMIC[15]
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_14.txt b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_14.txt
new file mode 100644
index 0000000000..59f5e1a186
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_14.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_ATOMIC_LEVEL[0] TCC_EA0_RDREQ[0] TCC_EA0_RDREQ_32B[0] TCC_EA0_RDREQ_LEVEL[0] TCC_EA0_ATOMIC_LEVEL[1] TCC_EA0_RDREQ[1] TCC_EA0_RDREQ_32B[1] TCC_EA0_RDREQ_LEVEL[1] TCC_EA0_ATOMIC_LEVEL[2] TCC_EA0_RDREQ[2] TCC_EA0_RDREQ_32B[2] TCC_EA0_RDREQ_LEVEL[2] TCC_EA0_ATOMIC_LEVEL[3] TCC_EA0_RDREQ[3] TCC_EA0_RDREQ_32B[3] TCC_EA0_RDREQ_LEVEL[3] TCC_EA0_ATOMIC_LEVEL[4] TCC_EA0_RDREQ[4] TCC_EA0_RDREQ_32B[4] TCC_EA0_RDREQ_LEVEL[4] TCC_EA0_ATOMIC_LEVEL[5] TCC_EA0_RDREQ[5] TCC_EA0_RDREQ_32B[5] TCC_EA0_RDREQ_LEVEL[5] TCC_EA0_ATOMIC_LEVEL[6] TCC_EA0_RDREQ[6] TCC_EA0_RDREQ_32B[6] TCC_EA0_RDREQ_LEVEL[6] TCC_EA0_ATOMIC_LEVEL[7] TCC_EA0_RDREQ[7] TCC_EA0_RDREQ_32B[7] TCC_EA0_RDREQ_LEVEL[7] TCC_EA0_ATOMIC_LEVEL[8] TCC_EA0_RDREQ[8] TCC_EA0_RDREQ_32B[8] TCC_EA0_RDREQ_LEVEL[8] TCC_EA0_ATOMIC_LEVEL[9] TCC_EA0_RDREQ[9] TCC_EA0_RDREQ_32B[9] TCC_EA0_RDREQ_LEVEL[9] TCC_EA0_ATOMIC_LEVEL[10] TCC_EA0_RDREQ[10] TCC_EA0_RDREQ_32B[10] TCC_EA0_RDREQ_LEVEL[10] TCC_EA0_ATOMIC_LEVEL[11] TCC_EA0_RDREQ[11] TCC_EA0_RDREQ_32B[11] TCC_EA0_RDREQ_LEVEL[11] TCC_EA0_ATOMIC_LEVEL[12] TCC_EA0_RDREQ[12] TCC_EA0_RDREQ_32B[12] TCC_EA0_RDREQ_LEVEL[12] TCC_EA0_ATOMIC_LEVEL[13] TCC_EA0_RDREQ[13] TCC_EA0_RDREQ_32B[13] TCC_EA0_RDREQ_LEVEL[13] TCC_EA0_ATOMIC_LEVEL[14] TCC_EA0_RDREQ[14] TCC_EA0_RDREQ_32B[14] TCC_EA0_RDREQ_LEVEL[14] TCC_EA0_ATOMIC_LEVEL[15] TCC_EA0_RDREQ[15] TCC_EA0_RDREQ_32B[15] TCC_EA0_RDREQ_LEVEL[15]
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_15.txt b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_15.txt
new file mode 100644
index 0000000000..a33c85a3a9
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_15.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_WRREQ[0] TCC_EA0_WRREQ_64B[0] TCC_EA0_WRREQ_LEVEL[0] TCC_HIT[0] TCC_EA0_WRREQ[1] TCC_EA0_WRREQ_64B[1] TCC_EA0_WRREQ_LEVEL[1] TCC_HIT[1] TCC_EA0_WRREQ[2] TCC_EA0_WRREQ_64B[2] TCC_EA0_WRREQ_LEVEL[2] TCC_HIT[2] TCC_EA0_WRREQ[3] TCC_EA0_WRREQ_64B[3] TCC_EA0_WRREQ_LEVEL[3] TCC_HIT[3] TCC_EA0_WRREQ[4] TCC_EA0_WRREQ_64B[4] TCC_EA0_WRREQ_LEVEL[4] TCC_HIT[4] TCC_EA0_WRREQ[5] TCC_EA0_WRREQ_64B[5] TCC_EA0_WRREQ_LEVEL[5] TCC_HIT[5] TCC_EA0_WRREQ[6] TCC_EA0_WRREQ_64B[6] TCC_EA0_WRREQ_LEVEL[6] TCC_HIT[6] TCC_EA0_WRREQ[7] TCC_EA0_WRREQ_64B[7] TCC_EA0_WRREQ_LEVEL[7] TCC_HIT[7] TCC_EA0_WRREQ[8] TCC_EA0_WRREQ_64B[8] TCC_EA0_WRREQ_LEVEL[8] TCC_HIT[8] TCC_EA0_WRREQ[9] TCC_EA0_WRREQ_64B[9] TCC_EA0_WRREQ_LEVEL[9] TCC_HIT[9] TCC_EA0_WRREQ[10] TCC_EA0_WRREQ_64B[10] TCC_EA0_WRREQ_LEVEL[10] TCC_HIT[10] TCC_EA0_WRREQ[11] TCC_EA0_WRREQ_64B[11] TCC_EA0_WRREQ_LEVEL[11] TCC_HIT[11] TCC_EA0_WRREQ[12] TCC_EA0_WRREQ_64B[12] TCC_EA0_WRREQ_LEVEL[12] TCC_HIT[12] TCC_EA0_WRREQ[13] TCC_EA0_WRREQ_64B[13] TCC_EA0_WRREQ_LEVEL[13] TCC_HIT[13] TCC_EA0_WRREQ[14] TCC_EA0_WRREQ_64B[14] TCC_EA0_WRREQ_LEVEL[14] TCC_HIT[14] TCC_EA0_WRREQ[15] TCC_EA0_WRREQ_64B[15] TCC_EA0_WRREQ_LEVEL[15] TCC_HIT[15]
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_16.txt b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_16.txt
new file mode 100644
index 0000000000..2616b4e94f
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_16.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_MISS[0] TCC_READ[0] TCC_REQ[0] TCC_RW_REQ[0] TCC_MISS[1] TCC_READ[1] TCC_REQ[1] TCC_RW_REQ[1] TCC_MISS[2] TCC_READ[2] TCC_REQ[2] TCC_RW_REQ[2] TCC_MISS[3] TCC_READ[3] TCC_REQ[3] TCC_RW_REQ[3] TCC_MISS[4] TCC_READ[4] TCC_REQ[4] TCC_RW_REQ[4] TCC_MISS[5] TCC_READ[5] TCC_REQ[5] TCC_RW_REQ[5] TCC_MISS[6] TCC_READ[6] TCC_REQ[6] TCC_RW_REQ[6] TCC_MISS[7] TCC_READ[7] TCC_REQ[7] TCC_RW_REQ[7] TCC_MISS[8] TCC_READ[8] TCC_REQ[8] TCC_RW_REQ[8] TCC_MISS[9] TCC_READ[9] TCC_REQ[9] TCC_RW_REQ[9] TCC_MISS[10] TCC_READ[10] TCC_REQ[10] TCC_RW_REQ[10] TCC_MISS[11] TCC_READ[11] TCC_REQ[11] TCC_RW_REQ[11] TCC_MISS[12] TCC_READ[12] TCC_REQ[12] TCC_RW_REQ[12] TCC_MISS[13] TCC_READ[13] TCC_REQ[13] TCC_RW_REQ[13] TCC_MISS[14] TCC_READ[14] TCC_REQ[14] TCC_RW_REQ[14] TCC_MISS[15] TCC_READ[15] TCC_REQ[15] TCC_RW_REQ[15]
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_17.txt b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_17.txt
new file mode 100644
index 0000000000..b22099e1dd
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_17.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_TAG_STALL[0] TCC_TOO_MANY_EA_WRREQS_STALL[0] TCC_WRITE[0] TCC_TAG_STALL[1] TCC_TOO_MANY_EA_WRREQS_STALL[1] TCC_WRITE[1] TCC_TAG_STALL[2] TCC_TOO_MANY_EA_WRREQS_STALL[2] TCC_WRITE[2] TCC_TAG_STALL[3] TCC_TOO_MANY_EA_WRREQS_STALL[3] TCC_WRITE[3] TCC_TAG_STALL[4] TCC_TOO_MANY_EA_WRREQS_STALL[4] TCC_WRITE[4] TCC_TAG_STALL[5] TCC_TOO_MANY_EA_WRREQS_STALL[5] TCC_WRITE[5] TCC_TAG_STALL[6] TCC_TOO_MANY_EA_WRREQS_STALL[6] TCC_WRITE[6] TCC_TAG_STALL[7] TCC_TOO_MANY_EA_WRREQS_STALL[7] TCC_WRITE[7] TCC_TAG_STALL[8] TCC_TOO_MANY_EA_WRREQS_STALL[8] TCC_WRITE[8] TCC_TAG_STALL[9] TCC_TOO_MANY_EA_WRREQS_STALL[9] TCC_WRITE[9] TCC_TAG_STALL[10] TCC_TOO_MANY_EA_WRREQS_STALL[10] TCC_WRITE[10] TCC_TAG_STALL[11] TCC_TOO_MANY_EA_WRREQS_STALL[11] TCC_WRITE[11] TCC_TAG_STALL[12] TCC_TOO_MANY_EA_WRREQS_STALL[12] TCC_WRITE[12] TCC_TAG_STALL[13] TCC_TOO_MANY_EA_WRREQS_STALL[13] TCC_WRITE[13] TCC_TAG_STALL[14] TCC_TOO_MANY_EA_WRREQS_STALL[14] TCC_WRITE[14] TCC_TAG_STALL[15] TCC_TOO_MANY_EA_WRREQS_STALL[15] TCC_WRITE[15]
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_2.txt b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..d9c92a3b9e
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 TCP_VOLATILE_sum TCP_TOTAL_ACCESSES_sum TCP_TOTAL_READ_sum TCP_TOTAL_WRITE_sum TA_BUFFER_ATOMIC_WAVEFRONTS_sum TA_BUFFER_TOTAL_CYCLES_sum TD_ATOMIC_WAVEFRONT_sum TD_STORE_WAVEFRONT_sum SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION CPF_CPF_STAT_IDLE CPF_CPF_TCIU_IDLE TCC_REQ_sum TCC_STREAMING_REQ_sum TCC_HIT_sum TCC_MISS_sum
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_3.txt b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..6aac684a26
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS TCP_TOTAL_ATOMIC_WITH_RET_sum TCP_TOTAL_ATOMIC_WITHOUT_RET_sum TCP_TOTAL_WRITEBACK_INVALIDATES_sum TCP_TOTAL_CACHE_ACCESSES_sum TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES_sum TD_COALESCABLE_WAVEFRONT_sum SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE CPF_CMP_UTCL1_STALL_ON_TRANSLATION TCC_READ_sum TCC_WRITE_sum TCC_ATOMIC_sum TCC_WRITEBACK_sum
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_4.txt b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..a4fff798ea
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAIT_ANY SQ_WAIT_INST_ANY SQ_ACTIVE_INST_ANY SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU TCP_UTCL1_TRANSLATION_MISS_sum TCP_UTCL1_TRANSLATION_HIT_sum TCP_UTCL1_PERMISSION_MISS_sum TCP_UTCL1_REQUEST_sum TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_TOTAL_WAVEFRONTS_sum SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE TCC_EA0_WRREQ_sum TCC_EA0_WRREQ_64B_sum TCC_EA0_WR_UNCACHED_32B_sum TCC_EA0_WRREQ_DRAM_sum
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_5.txt b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..696745c2f4
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_SCA SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU TCP_TCC_READ_REQ_sum TCP_TCC_WRITE_REQ_sum TCP_TCC_ATOMIC_WITH_RET_REQ_sum TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN CPC_ME1_DC0_SPI_BUSY TCC_EA0_RDREQ_sum TCC_EA0_RDREQ_32B_sum TCC_BUBBLE_sum TCC_EA0_RD_UNCACHED_32B_sum
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_6.txt b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..8a0ef62035
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_THREAD_CYCLES_VALU SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 TCP_TCC_NC_READ_REQ_sum TCP_TCC_NC_WRITE_REQ_sum TCP_TCC_NC_ATOMIC_REQ_sum TCP_TCC_UC_READ_REQ_sum TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN TCC_EA0_RDREQ_DRAM_sum TCC_TAG_STALL_sum TCC_NORMAL_WRITEBACK_sum TCC_ALL_TC_OP_WB_WRITEBACK_sum
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_7.txt b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..a0064f33a6
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED TCP_TCC_UC_WRITE_REQ_sum TCP_TCC_UC_ATOMIC_REQ_sum TCP_TCC_CC_READ_REQ_sum TCP_TCC_CC_WRITE_REQ_sum TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR TCC_NORMAL_EVICT_sum TCC_ALL_TC_OP_INV_EVICT_sum TCC_TOO_MANY_EA_WRREQS_STALL_sum TCC_EA0_ATOMIC_sum
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_8.txt b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..b6356cdf32
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES TCP_TCC_CC_ATOMIC_REQ_sum TCP_TCC_RW_READ_REQ_sum TCP_TCC_RW_WRITE_REQ_sum TCP_TCC_RW_ATOMIC_REQ_sum SPI_VWC_CSC_WR SPI_RA_BULKY_CU_FULL_CSN TCC_EA0_RDREQ_LEVEL_sum TCC_EA0_WRREQ_LEVEL_sum TCC_EA0_ATOMIC_LEVEL_sum TCC_EA0_WRREQ_STALL_sum
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_9.txt b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..6e7197bb13
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ TCP_PENDING_STALL_CYCLES_sum
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300A_A1/perfmon/timestamps.txt b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..6a128303a2
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300A_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300A_A1/pmc_perf.csv b/tests/workloads/dispatch_inv/MI300A_A1/pmc_perf.csv
new file mode 100644
index 0000000000..f5e3b1ba73
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300A_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SQ_INSTS_BRANCH,SQ_INSTS_SENDMSG,SQ_WAIT_ANY,SQ_WAIT_INST_ANY,SQ_ACTIVE_INST_ANY,SQ_ACTIVE_INST_VMEM,SQ_ACTIVE_INST_LDS,SQ_ACTIVE_INST_VALU,SPI_RA_WAVE_SIMD_FULL_CSN,SPI_RA_VGPR_SIMD_FULL_CSN,CPC_CPC_UTCL2IU_STALL,CPC_ME1_BUSY_FOR_PACKET_DECODE,TA_ADDR_STALLED_BY_TC_CYCLES_sum,TA_TOTAL_WAVEFRONTS_sum,TCC_EA0_WRREQ_64B_sum,TCC_EA0_WRREQ_DRAM_sum,TCC_EA0_WRREQ_sum,TCC_EA0_WR_UNCACHED_32B_sum,TCP_UTCL1_PERMISSION_MISS_sum,TCP_UTCL1_REQUEST_sum,TCP_UTCL1_TRANSLATION_HIT_sum,TCP_UTCL1_TRANSLATION_MISS_sum,Wave_Size_1,Correlation_ID_1,XCC_Index,TCC_EA0_WRREQ[0],TCC_EA0_WRREQ_64B[0],TCC_EA0_WRREQ_LEVEL[0],TCC_HIT[0],TCC_EA0_WRREQ[1],TCC_EA0_WRREQ_64B[1],TCC_EA0_WRREQ_LEVEL[1],TCC_HIT[1],TCC_EA0_WRREQ[2],TCC_EA0_WRREQ_64B[2],TCC_EA0_WRREQ_LEVEL[2],TCC_HIT[2],TCC_EA0_WRREQ[3],TCC_EA0_WRREQ_64B[3],TCC_EA0_WRREQ_LEVEL[3],TCC_HIT[3],TCC_EA0_WRREQ[4],TCC_EA0_WRREQ_64B[4],TCC_EA0_WRREQ_LEVEL[4],TCC_HIT[4],TCC_EA0_WRREQ[5],TCC_EA0_WRREQ_64B[5],TCC_EA0_WRREQ_LEVEL[5],TCC_HIT[5],TCC_EA0_WRREQ[6],TCC_EA0_WRREQ_64B[6],TCC_EA0_WRREQ_LEVEL[6],TCC_HIT[6],TCC_EA0_WRREQ[7],TCC_EA0_WRREQ_64B[7],TCC_EA0_WRREQ_LEVEL[7],TCC_HIT[7],TCC_EA0_WRREQ[8],TCC_EA0_WRREQ_64B[8],TCC_EA0_WRREQ_LEVEL[8],TCC_HIT[8],TCC_EA0_WRREQ[9],TCC_EA0_WRREQ_64B[9],TCC_EA0_WRREQ_LEVEL[9],TCC_HIT[9],TCC_EA0_WRREQ[10],TCC_EA0_WRREQ_64B[10],TCC_EA0_WRREQ_LEVEL[10],TCC_HIT[10],TCC_EA0_WRREQ[11],TCC_EA0_WRREQ_64B[11],TCC_EA0_WRREQ_LEVEL[11],TCC_HIT[11],TCC_EA0_WRREQ[12],TCC_EA0_WRREQ_64B[12],TCC_EA0_WRREQ_LEVEL[12],TCC_HIT[12],TCC_EA0_WRREQ[13],TCC_EA0_WRREQ_64B[13],TCC_EA0_WRREQ_LEVEL[13],TCC_HIT[13],TCC_EA0_WRREQ[14],TCC_EA0_WRREQ_64B[14],TCC_EA0_WRREQ_LEVEL[14],TCC_HIT[14],TCC_EA0_WRREQ[15],TCC_EA0_WRREQ_64B[15],TCC_EA0_WRREQ_LEVEL[15],TCC_HIT[15],TCC_EA0_WRREQ[16],TCC_EA0_WRREQ_64B[16],TCC_EA0_WRREQ_LEVEL[16],TCC_HIT[16],TCC_EA0_WRREQ[17],TCC_EA0_WRREQ_64B[17],TCC_EA0_WRREQ_LEVEL[17],TCC_HIT[17],TCC_EA0_WRREQ[18],TCC_EA0_WRREQ_64B[18],TCC_EA0_WRREQ_LEVEL[18],TCC_HIT[18],TCC_EA0_WRREQ[19],TCC_EA0_WRREQ_64B[19],TCC_EA0_WRREQ_LEVEL[19],TCC_HIT[19],TCC_EA0_WRREQ[20],TCC_EA0_WRREQ_64B[20],TCC_EA0_WRREQ_LEVEL[20],TCC_HIT[20],TCC_EA0_WRREQ[21],TCC_EA0_WRREQ_64B[21],TCC_EA0_WRREQ_LEVEL[21],TCC_HIT[21],TCC_EA0_WRREQ[22],TCC_EA0_WRREQ_64B[22],TCC_EA0_WRREQ_LEVEL[22],TCC_HIT[22],TCC_EA0_WRREQ[23],TCC_EA0_WRREQ_64B[23],TCC_EA0_WRREQ_LEVEL[23],TCC_HIT[23],TCC_EA0_WRREQ[24],TCC_EA0_WRREQ_64B[24],TCC_EA0_WRREQ_LEVEL[24],TCC_HIT[24],TCC_EA0_WRREQ[25],TCC_EA0_WRREQ_64B[25],TCC_EA0_WRREQ_LEVEL[25],TCC_HIT[25],TCC_EA0_WRREQ[26],TCC_EA0_WRREQ_64B[26],TCC_EA0_WRREQ_LEVEL[26],TCC_HIT[26],TCC_EA0_WRREQ[27],TCC_EA0_WRREQ_64B[27],TCC_EA0_WRREQ_LEVEL[27],TCC_HIT[27],TCC_EA0_WRREQ[28],TCC_EA0_WRREQ_64B[28],TCC_EA0_WRREQ_LEVEL[28],TCC_HIT[28],TCC_EA0_WRREQ[29],TCC_EA0_WRREQ_64B[29],TCC_EA0_WRREQ_LEVEL[29],TCC_HIT[29],TCC_EA0_WRREQ[30],TCC_EA0_WRREQ_64B[30],TCC_EA0_WRREQ_LEVEL[30],TCC_HIT[30],TCC_EA0_WRREQ[31],TCC_EA0_WRREQ_64B[31],TCC_EA0_WRREQ_LEVEL[31],TCC_HIT[31],TCC_EA0_WRREQ[32],TCC_EA0_WRREQ_64B[32],TCC_EA0_WRREQ_LEVEL[32],TCC_HIT[32],TCC_EA0_WRREQ[33],TCC_EA0_WRREQ_64B[33],TCC_EA0_WRREQ_LEVEL[33],TCC_HIT[33],TCC_EA0_WRREQ[34],TCC_EA0_WRREQ_64B[34],TCC_EA0_WRREQ_LEVEL[34],TCC_HIT[34],TCC_EA0_WRREQ[35],TCC_EA0_WRREQ_64B[35],TCC_EA0_WRREQ_LEVEL[35],TCC_HIT[35],TCC_EA0_WRREQ[36],TCC_EA0_WRREQ_64B[36],TCC_EA0_WRREQ_LEVEL[36],TCC_HIT[36],TCC_EA0_WRREQ[37],TCC_EA0_WRREQ_64B[37],TCC_EA0_WRREQ_LEVEL[37],TCC_HIT[37],TCC_EA0_WRREQ[38],TCC_EA0_WRREQ_64B[38],TCC_EA0_WRREQ_LEVEL[38],TCC_HIT[38],TCC_EA0_WRREQ[39],TCC_EA0_WRREQ_64B[39],TCC_EA0_WRREQ_LEVEL[39],TCC_HIT[39],TCC_EA0_WRREQ[40],TCC_EA0_WRREQ_64B[40],TCC_EA0_WRREQ_LEVEL[40],TCC_HIT[40],TCC_EA0_WRREQ[41],TCC_EA0_WRREQ_64B[41],TCC_EA0_WRREQ_LEVEL[41],TCC_HIT[41],TCC_EA0_WRREQ[42],TCC_EA0_WRREQ_64B[42],TCC_EA0_WRREQ_LEVEL[42],TCC_HIT[42],TCC_EA0_WRREQ[43],TCC_EA0_WRREQ_64B[43],TCC_EA0_WRREQ_LEVEL[43],TCC_HIT[43],TCC_EA0_WRREQ[44],TCC_EA0_WRREQ_64B[44],TCC_EA0_WRREQ_LEVEL[44],TCC_HIT[44],TCC_EA0_WRREQ[45],TCC_EA0_WRREQ_64B[45],TCC_EA0_WRREQ_LEVEL[45],TCC_HIT[45],TCC_EA0_WRREQ[46],TCC_EA0_WRREQ_64B[46],TCC_EA0_WRREQ_LEVEL[46],TCC_HIT[46],TCC_EA0_WRREQ[47],TCC_EA0_WRREQ_64B[47],TCC_EA0_WRREQ_LEVEL[47],TCC_HIT[47],TCC_EA0_WRREQ[48],TCC_EA0_WRREQ_64B[48],TCC_EA0_WRREQ_LEVEL[48],TCC_HIT[48],TCC_EA0_WRREQ[49],TCC_EA0_WRREQ_64B[49],TCC_EA0_WRREQ_LEVEL[49],TCC_HIT[49],TCC_EA0_WRREQ[50],TCC_EA0_WRREQ_64B[50],TCC_EA0_WRREQ_LEVEL[50],TCC_HIT[50],TCC_EA0_WRREQ[51],TCC_EA0_WRREQ_64B[51],TCC_EA0_WRREQ_LEVEL[51],TCC_HIT[51],TCC_EA0_WRREQ[52],TCC_EA0_WRREQ_64B[52],TCC_EA0_WRREQ_LEVEL[52],TCC_HIT[52],TCC_EA0_WRREQ[53],TCC_EA0_WRREQ_64B[53],TCC_EA0_WRREQ_LEVEL[53],TCC_HIT[53],TCC_EA0_WRREQ[54],TCC_EA0_WRREQ_64B[54],TCC_EA0_WRREQ_LEVEL[54],TCC_HIT[54],TCC_EA0_WRREQ[55],TCC_EA0_WRREQ_64B[55],TCC_EA0_WRREQ_LEVEL[55],TCC_HIT[55],TCC_EA0_WRREQ[56],TCC_EA0_WRREQ_64B[56],TCC_EA0_WRREQ_LEVEL[56],TCC_HIT[56],TCC_EA0_WRREQ[57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CED_WRITE_CYCLES_sum,TCC_ATOMIC_sum,TCC_READ_sum,TCC_WRITEBACK_sum,TCC_WRITE_sum,TCP_TOTAL_ATOMIC_WITHOUT_RET_sum,TCP_TOTAL_ATOMIC_WITH_RET_sum,TCP_TOTAL_CACHE_ACCESSES_sum,TCP_TOTAL_WRITEBACK_INVALIDATES_sum,TD_COALESCABLE_WAVEFRONT_sum,Wave_Size_5,Correlation_ID_5,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,TA_FLAT_ATOMIC_WAVEFRONTS_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,TCC_ALL_TC_OP_INV_EVICT_sum,TCC_EA0_ATOMIC_sum,TCC_NORMAL_EVICT_sum,TCC_TOO_MANY_EA_WRREQS_STALL_sum,TCP_TCC_CC_READ_REQ_sum,TCP_TCC_CC_WRITE_REQ_sum,TCP_TCC_UC_ATOMIC_REQ_sum,TCP_TCC_UC_WRITE_REQ_sum,Wave_Size_6,Correlation_ID_6,XCC_Index_6,TCC_MISS[0],TCC_READ[0],TCC_REQ[0],TCC_RW_REQ[0],TCC_MISS[1],TCC_READ[1],TCC_REQ[1],TCC_RW_REQ[1],TCC_MISS[2],TCC_READ[2],TCC_REQ[2],TCC_RW_REQ[2],TCC_MISS[3],TCC_READ[3],TCC_REQ[3],TCC_RW_REQ[3],TCC_MISS[4],TCC_READ[4],TCC_REQ[4],TCC_RW_REQ[4],TCC_MISS[5],TCC_READ[5],TCC_REQ[5],TCC_RW_REQ[5],TCC_MISS[6],TCC_READ[6],TCC_REQ[6],TCC_RW_REQ[6],TCC_MISS[7],TCC_READ[7],TCC_REQ[7],TCC_RW_REQ[7],TCC_MISS[8],TCC_READ[8],TCC_REQ[8],TCC_RW_REQ[8],TCC_MISS[9],TCC_READ[9],TCC_REQ[9],TCC_RW_REQ[9],TCC_MISS[10],TCC_READ[10],TCC_REQ[10],TCC_RW_REQ[10],TCC_MISS[11],TCC_READ[11],TCC_REQ[11],TCC_RW_REQ[11],TCC_MISS[12],TCC_READ[12],TCC_REQ[12],TCC_RW_REQ[12],TCC_MISS[13],TCC_READ[13],TCC_REQ[13],TCC_RW_REQ[13],TCC_MISS[14],TCC_READ[14],TCC_REQ[14],TCC_RW_REQ[14],TCC_MISS[15],TCC_READ[15],TCC_REQ[15],TCC_RW_REQ[15],TCC_MISS[16],TCC_READ[16],TCC_REQ[16],TCC_RW_REQ[16],TCC_MISS[17],TCC_READ[17],TCC_REQ[17],TCC_RW_REQ[17],TCC_MISS[18],TCC_READ[18],TCC_REQ[18],TCC_RW_REQ[18],TCC_MISS[19],TCC_READ[19],TCC_REQ[19],TCC_RW_REQ[19],TCC_MISS[20],TCC_READ[20],TCC_REQ[20],TCC_RW_REQ[20],TCC_MISS[21],TCC_READ[21],TCC_REQ[21],TCC_RW_REQ[21],TCC_MISS[22],TCC_READ[22],TCC_REQ[22],TCC_RW_REQ[22],TCC_MISS[23],TCC_READ[23],TCC_REQ[23],TCC_RW_REQ[23],TCC_MISS[24],TCC_READ[24],TCC_REQ[24],TCC_RW_REQ[24],TCC_MISS[25],TCC_READ[25],TCC_REQ[25],TCC_RW_REQ[25],TCC_MISS[26],TCC_READ[26],TCC_REQ[26],TCC_RW_REQ[26],TCC_MISS[27],TCC_READ[27],TCC_REQ[27],TCC_RW_REQ[27],TCC_MISS[28],TCC_READ[28],TCC_REQ[28],TCC_RW_REQ[28],TCC_MISS[29],TCC_READ[29],TCC_REQ[29],TCC_RW_REQ[29],TCC_MISS[30],TCC_READ[30],TCC_REQ[30],TCC_RW_REQ[30],TCC_MISS[31],TCC_READ[31],TCC_REQ[31],TCC_RW_REQ[31],TCC_MISS[32],TCC_READ[32],TCC_REQ[32],TCC_RW_REQ[32],TCC_MISS[33],TCC_READ[33],TCC_REQ[33],TCC_RW_REQ[33],TCC_MISS[34],TCC_READ[34],TCC_REQ[34],TCC_RW_REQ[34],TCC_MISS[35],TCC_READ[35],TCC_REQ[35],TCC_RW_REQ[35],TCC_MISS[36],TCC_READ[36],TCC_REQ[36],TCC_RW_REQ[36],TCC_MISS[37],TCC_READ[37],TCC_REQ[37],TCC_RW_REQ[37],TCC_MISS[38],TCC_READ[38],TCC_REQ[38],TCC_RW_REQ[38],TCC_MISS[39],TCC_READ[39],TCC_REQ[39],TCC_RW_REQ[39],TCC_MISS[40],TCC_READ[40],TCC_REQ[40],TCC_RW_REQ[40],TCC_MISS[41],TCC_READ[41],TCC_REQ[41],TCC_RW_REQ[41],TCC_MISS[42],TCC_READ[42],TCC_REQ[42],TCC_RW_REQ[42],TCC_MISS[43],TCC_READ[43],TCC_REQ[43],TCC_RW_REQ[43],TCC_MISS[44],TCC_READ[44],TCC_REQ[44],TCC_RW_REQ[44],TCC_MISS[45],TCC_READ[45],TCC_REQ[45],TCC_RW_REQ[45],TCC_MISS[46],TCC_READ[46],TCC_REQ[46],TCC_RW_REQ[46],TCC_MISS[47],TCC_READ[47],TCC_REQ[47],TCC_RW_REQ[47],TCC_MISS[48],TCC_READ[48],TCC_REQ[48],TCC_RW_REQ[48],TCC_MISS[49],TCC_READ[49],TCC_REQ[49],TCC_RW_REQ[49],TCC_MISS[50],TCC_READ[50],TCC_REQ[50],TCC_RW_REQ[50],TCC_MISS[51],TCC_READ[51],TCC_REQ[51],TCC_RW_REQ[51],TCC_MISS[52],TCC_READ[52],TCC_REQ[52],TCC_RW_REQ[52],TCC_MISS[53],TCC_READ[53],TCC_REQ[53],TCC_RW_REQ[53],TCC_MISS[54],TCC_READ[54],TCC_REQ[54],TCC_RW_REQ[54],TCC_MISS[55],TCC_READ[55],TCC_REQ[55],TCC_RW_REQ[55],TCC_MISS[56],TCC_READ[56],TCC_REQ[56],TCC_RW_REQ[56],TCC_MISS[57],TCC_READ[57],TCC_REQ[57],TCC_RW_REQ[57],TCC_MISS[58],TCC_READ[58],TCC_REQ[58],TCC_RW_REQ[58],TCC_MISS[59],TCC_READ[59],TCC_REQ[59],TCC_RW_REQ[59],TCC_MISS[60],TCC_READ[60],TCC_REQ[60],TCC_RW_REQ[60],TCC_MISS[61],TCC_READ[61],TCC_REQ[61],TCC_RW_REQ[61],TCC_MISS[62],TCC_READ[62],TCC_REQ[62],TCC_RW_REQ[62],TCC_MISS[63],TCC_READ[63],TCC_REQ[63],TCC_RW_REQ[63],TCC_MISS[64],TCC_READ[64],TCC_REQ[64],TCC_RW_REQ[64],TCC_MISS[65],TCC_READ[65],TCC_REQ[65],TCC_RW_REQ[65],TCC_MISS[66],TCC_READ[66],TCC_REQ[66],TCC_RW_REQ[66],TCC_MISS[67],TCC_READ[67],TCC_REQ[67],TCC_RW_REQ[67],TCC_MISS[68],TCC_READ[68],TCC_REQ[68],TCC_RW_REQ[68],TCC_MISS[69],TCC_READ[69],TCC_REQ[69],TCC_RW_REQ[69],TCC_MISS[70],TCC_READ[70],TCC_REQ[70],TCC_RW_REQ[70],TCC_MISS[71],TCC_READ[71],TCC_REQ[71],TCC_RW_REQ[71],TCC_MISS[72],TCC_READ[72],TCC_REQ[72],TCC_RW_REQ[72],TCC_MISS[73],TCC_READ[73],TCC_REQ[73],TCC_RW_REQ[73],TCC_MISS[74],TCC_READ[74],TCC_REQ[74],TCC_RW_REQ[74],TCC_MISS[75],TCC_READ[75],TCC_REQ[75],TCC_RW_REQ[75],TCC_MISS[76],TCC_READ[76],TCC_REQ[76],TCC_RW_REQ[76],TCC_MISS[77],TCC_READ[77],TCC_REQ[77],TCC_RW_REQ[77],TCC_MISS[78],TCC_READ[78],TCC_REQ[78],TCC_RW_REQ[78],TCC_MISS[79],TCC_READ[79],TCC_REQ[79],TCC_RW_REQ[79],TCC_MISS[80],TCC_READ[80],TCC_REQ[80],TCC_RW_REQ[80],TCC_MISS[81],TCC_READ[81],TCC_REQ[81],TCC_RW_REQ[81],TCC_MISS[82],TCC_READ[82],TCC_REQ[82],TCC_RW_REQ[82],TCC_MISS[83],TCC_READ[83],TCC_REQ[83],TCC_RW_REQ[83],TCC_MISS[84],TCC_READ[84],TCC_REQ[84],TCC_RW_REQ[84],TCC_MISS[85],TCC_READ[85],TCC_REQ[85],TCC_RW_REQ[85],TCC_MISS[86],TCC_READ[86],TCC_REQ[86],TCC_RW_REQ[86],TCC_MISS[87],TCC_READ[87],TCC_REQ[87],TCC_RW_REQ[87],TCC_MISS[88],TCC_READ[88],TCC_REQ[88],TCC_RW_REQ[88],TCC_MISS[89],TCC_READ[89],TCC_REQ[89],TCC_RW_REQ[89],TCC_MISS[90],TCC_READ[90],TCC_REQ[90],TCC_RW_REQ[90],TCC_MISS[91],TCC_READ[91],TCC_REQ[91],TCC_RW_REQ[91],TCC_MISS[92],TCC_READ[92],TCC_REQ[92],TCC_RW_REQ[92],TCC_MISS[93],TCC_READ[93],TCC_REQ[93],TCC_RW_REQ[93],TCC_MISS[94],TCC_READ[94],TCC_REQ[94],TCC_RW_REQ[94],TCC_MISS[95],TCC_READ[95],TCC_REQ[95],TCC_RW_REQ[95],Wave_Size_7,Correlation_ID_7,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SPI_RA_REQ_NO_ALLOC,SPI_RA_REQ_NO_ALLOC_CSN,CPC_CPC_STAT_STALL,CPC_UTCL1_STALL_ON_TRANSLATION,CPF_CPF_STAT_IDLE,CPF_CPF_TCIU_IDLE,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,TA_BUFFER_TOTAL_CYCLES_sum,TCC_HIT_sum,TCC_MISS_sum,TCC_REQ_sum,TCC_STREAMING_REQ_sum,TCP_TOTAL_ACCESSES_sum,TCP_TOTAL_READ_sum,TCP_TOTAL_WRITE_sum,TCP_VOLATILE_sum,TD_ATOMIC_WAVEFRONT_sum,TD_STORE_WAVEFRONT_sum,Wave_Size_8,Correlation_ID_8,XCC_Index_8,TCC_ATOMIC[0],TCC_BUBBLE[0],TCC_CYCLE[0],TCC_EA0_ATOMIC[0],TCC_ATOMIC[1],TCC_BUBBLE[1],TCC_CYCLE[1],TCC_EA0_ATOMIC[1],TCC_ATOMIC[2],TCC_BUBBLE[2],TCC_CYCLE[2],TCC_EA0_ATOMIC[2],TCC_ATOMIC[3],TCC_BUBBLE[3],TCC_CYCLE[3],TCC_EA0_ATOMIC[3],TCC_ATOMIC[4],TCC_BUBBLE[4],TCC_CYCLE[4],TCC_EA0_ATOMIC[4],TCC_ATOMIC[5],TCC_BUBBLE[5],TCC_CYCLE[5],TCC_EA0_ATOMIC[5],TCC_ATOMIC[6],TCC_BUBBLE[6],TCC_CYCLE[6],TCC_EA0_ATOMIC[6],TCC_ATOMIC[7],TCC_BUBBLE[7],TCC_CYCLE[7],TCC_EA0_ATOMIC[7],TCC_ATOMIC[8],TCC_BUBBLE[8],TCC_CYCLE[8],TCC_EA0_ATOMIC[8],TCC_ATOMIC[9],TCC_BUBBLE[9],TCC_CYCLE[9],TCC_EA0_ATOMIC[9],TCC_ATOMIC[10],TCC_BUBBLE[10],TCC_CYCLE[10],TCC_EA0_ATOMIC[10],TCC_ATOMIC[11],TCC_BUBBLE[11],TCC_CYCLE[11],TCC_EA0_ATOMIC[11],TCC_ATOMIC[12],TCC_BUBBLE[12],TCC_CYCLE[12],TCC_EA0_ATOMIC[12],TCC_ATOMIC[13],TCC_BUBBLE[13],TCC_CYCLE[13],TCC_EA0_ATOMIC[13],TCC_ATOMIC[14],TCC_BUBBLE[14],TCC_CYCLE[14],TCC_EA0_ATOMIC[14],TCC_ATOMIC[15],TCC_BUBBLE[15],TCC_CYCLE[15],TCC_EA0_ATOMIC[15],TCC_ATOMIC[16],TCC_BUBBLE[16],TCC_CYCLE[16],TCC_EA0_ATOMIC[16],TCC_ATOMIC[17],TCC_BUBBLE[17],TCC_CYCLE[17],TCC_EA0_ATOMIC[17],TCC_ATOMIC[18],TCC_BUBBLE[18],TCC_CYCLE[18],TCC_EA0_ATOMIC[18],TCC_ATOMIC[19],TCC_BUBBLE[19],TCC_CYCLE[19],TCC_EA0_ATOMIC[19],TCC_ATOMIC[20],TCC_BUBBLE[20],TCC_CYCLE[20],TCC_EA0_ATOMIC[20],TCC_ATOMIC[21],TCC_BUBBLE[21],TCC_CYCLE[21],TCC_EA0_ATOMIC[21],TCC_ATOMIC[22],TCC_BUBBLE[22],TCC_CYCLE[22],TCC_EA0_ATOMIC[22],TCC_ATOMIC[23],TCC_BUBBLE[23],TCC_CYCLE[23],TCC_EA0_ATOMIC[23],TCC_ATOMIC[24],TCC_BUBBLE[24],TCC_CYCLE[24],TCC_EA0_ATOMIC[24],TCC_ATOMIC[25],TCC_BUBBLE[25],TCC_CYCLE[25],TCC_EA0_ATOMIC[25],TCC_ATOMIC[26],TCC_BUBBLE[26],TCC_CYCLE[26],TCC_EA0_ATOMIC[26],TCC_ATOMIC[27],TCC_BUBBLE[27],TCC_CYCLE[27],TCC_EA0_ATOMIC[27],TCC_ATOMIC[28],TCC_BUBBLE[28],TCC_CYCLE[28],TCC_EA0_ATOMIC[28],TCC_ATOMIC[29],TCC_BUBBLE[29],TCC_CYCLE[29],TCC_EA0_ATOMIC[29],TCC_ATOMIC[30],TCC_BUBBLE[30],TCC_CYCLE[30],TCC_EA0_ATOMIC[30],TCC_ATOMIC[31],TCC_BUBBLE[31],TCC_CYCLE[31],TCC_EA0_ATOMIC[31],TCC_ATOMIC[32],TCC_BUBBLE[32],TCC_CYCLE[32],TCC_EA0_ATOMIC[32],TCC_ATOMIC[33],TCC_BUBBLE[33],TCC_CYCLE[33],TCC_EA0_ATOMIC[33],TCC_ATOMIC[34],TCC_BUBBLE[34],TCC_CYCLE[34],TCC_EA0_ATOMIC[34],TCC_ATOMIC[35],TCC_BUBBLE[35],TCC_CYCLE[35],TCC_EA0_ATOMIC[35],TCC_ATOMIC[36],TCC_BUBBLE[36],TCC_CYCLE[36],TCC_EA0_ATOMIC[36],TCC_ATOMIC[37],TCC_BUBBLE[37],TCC_CYCLE[37],TCC_EA0_ATOMIC[37],TCC_ATOMIC[38],TCC_BUBBLE[38],TCC_CYCLE[38],TCC_EA0_ATOMIC[38],TCC_ATOMIC[39],TCC_BUBBLE[39],TCC_CYCLE[39],TCC_EA0_ATOMIC[39],TCC_ATOMIC[40],TCC_BUBBLE[40],TCC_CYCLE[40],TCC_EA0_ATOMIC[40],TCC_ATOMIC[41],TCC_BUBBLE[41],TCC_CYCLE[41],TCC_EA0_ATOMIC[41],TCC_ATOMIC[42],TCC_BUBBLE[42],TCC_CYCLE[42],TCC_EA0_ATOMIC[42],TCC_ATOMIC[43],TCC_BUBBLE[43],TCC_CYCLE[43],TCC_EA0_ATOMIC[43],TCC_ATOMIC[44],TCC_BUBBLE[44],TCC_CYCLE[44],TCC_EA0_ATOMIC[44],TCC_ATOMIC[45],TCC_BUBBLE[45],TCC_CYCLE[45],TCC_EA0_ATOMIC[45],TCC_ATOMIC[46],TCC_BUBBLE[46],TCC_CYCLE[46],TCC_EA0_ATOMIC[46],TCC_ATOMIC[47],TCC_BUBBLE[47],TCC_CYCLE[47],TCC_EA0_ATOMIC[47],TCC_ATOMIC[48],TCC_BUBBLE[48],TCC_CYCLE[48],TCC_EA0_ATOMIC[48],TCC_ATOMIC[49],TCC_BUBBLE[49],TCC_CYCLE[49],TCC_EA0_ATOMIC[49],TCC_ATOMIC[50],TCC_BUBBLE[50],TCC_CYCLE[50],TCC_EA0_ATOMIC[50],TCC_ATOMIC[51],TCC_BUBBLE[51],TCC_CYCLE[51],TCC_EA0_ATOMIC[51],TCC_ATOMIC[52],TCC_BUBBLE[52],TCC_CYCLE[52],TCC_EA0_ATOMIC[52],TCC_ATOMIC[53],TCC_BUBBLE[53],TCC_CYCLE[53],TCC_EA0_ATOMIC[53],TCC_ATOMIC[54],TCC_BUBBLE[54],TCC_CYCLE[54],TCC_EA0_ATOMIC[54],TCC_ATOMIC[55],TCC_BUBBLE[55],TCC_CYCLE[55],TCC_EA0_ATOMIC[55],TCC_ATOMIC[56],TCC_BUBBLE[56],TCC_CYCLE[56],TCC_EA0_ATOMIC[56],TCC_ATOMIC[57],TCC_BUBBLE[57],TCC_CYCLE[57],TCC_EA0_ATOMIC[57],TCC_ATOMIC[58],TCC_BUBBLE[58],TCC_CYCLE[58],TCC_EA0_ATOMIC[58],TCC_ATOMIC[59],TCC_BUBBLE[59],TCC_CYCLE[59],TCC_EA0_ATOMIC[59],TCC_ATOMIC[60],TCC_BUBBLE[60],TCC_CYCLE[60],TCC_EA0_ATOMIC[60],TCC_ATOMIC[61],TCC_BUBBLE[61],TCC_CYCLE[61],TCC_EA0_ATOMIC[61],TCC_ATOMIC[62],TCC_BUBBLE[62],TCC_CYCLE[62],TCC_EA0_ATOMIC[62],TCC_ATOMIC[63],TCC_BUBBLE[63],TCC_CYCLE[63],TCC_EA0_ATOMIC[63],TCC_ATOMIC[64],TCC_BUBBLE[64],TCC_CYCLE[64],TCC_EA0_ATOMIC[64],TCC_ATOMIC[65],TCC_BUBBLE[65],TCC_CYCLE[65],TCC_EA0_ATOMIC[65],TCC_ATOMIC[66],TCC_BUBBLE[66],TCC_CYCLE[66],TCC_EA0_ATOMIC[66],TCC_ATOMIC[67],TCC_BUBBLE[67],TCC_CYCLE[67],TCC_EA0_ATOMIC[67],TCC_ATOMIC[68],TCC_BUBBLE[68],TCC_CYCLE[68],TCC_EA0_ATOMIC[68],TCC_ATOMIC[69],TCC_BUBBLE[69],TCC_CYCLE[69],TCC_EA0_ATOMIC[69],TCC_ATOMIC[70],TCC_BUBBLE[70],TCC_CYCLE[70],TCC_EA0_ATOMIC[70],TCC_ATOMIC[71],TCC_BUBBLE[71],TCC_CYCLE[71],TCC_EA0_ATOMIC[71],TCC_ATOMIC[72],TCC_BUBBLE[72],TCC_CYCLE[72],TCC_EA0_ATOMIC[72],TCC_ATOMIC[73],TCC_BUBBLE[73],TCC_CYCLE[73],TCC_EA0_ATOMIC[73],TCC_ATOMIC[74],TCC_BUBBLE[74],TCC_CYCLE[74],TCC_EA0_ATOMIC[74],TCC_ATOMIC[75],TCC_BUBBLE[75],TCC_CYCLE[75],TCC_EA0_ATOMIC[75],TCC_ATOMIC[76],TCC_BUBBLE[76],TCC_CYCLE[76],TCC_EA0_ATOMIC[76],TCC_ATOMIC[77],TCC_BUBBLE[77],TCC_CYCLE[77],TCC_EA0_ATOMIC[77],TCC_ATOMIC[78],TCC_BUBBLE[78],TCC_CYCLE[78],TCC_EA0_ATOMIC[78],TCC_ATOMIC[79],TCC_BUBBLE[79],TCC_CYCLE[79],TCC_EA0_ATOMIC[79],TCC_ATOMIC[80],TCC_BUBBLE[80],TCC_CYCLE[80],TCC_EA0_ATOMIC[80],TCC_ATOMIC[81],TCC_BUBBLE[81],TCC_CYCLE[81],TCC_EA0_ATOMIC[81],TCC_ATOMIC[82],TCC_BUBBLE[82],TCC_CYCLE[82],TCC_EA0_ATOMIC[82],TCC_ATOMIC[83],TCC_BUBBLE[83],TCC_CYCLE[83],TCC_EA0_ATOMIC[83],TCC_ATOMIC[84],TCC_BUBBLE[84],TCC_CYCLE[84],TCC_EA0_ATOMIC[84],TCC_ATOMIC[85],TCC_BUBBLE[85],TCC_CYCLE[85],TCC_EA0_ATOMIC[85],TCC_ATOMIC[86],TCC_BUBBLE[86],TCC_CYCLE[86],TCC_EA0_ATOMIC[86],TCC_ATOMIC[87],TCC_BUBBLE[87],TCC_CYCLE[87],TCC_EA0_ATOMIC[87],TCC_ATOMIC[88],TCC_BUBBLE[88],TCC_CYCLE[88],TCC_EA0_ATOMIC[88],TCC_ATOMIC[89],TCC_BUBBLE[89],TCC_CYCLE[89],TCC_EA0_ATOMIC[89],TCC_ATOMIC[90],TCC_BUBBLE[90],TCC_CYCLE[90],TCC_EA0_ATOMIC[90],TCC_ATOMIC[91],TCC_BUBBLE[91],TCC_CYCLE[91],TCC_EA0_ATOMIC[91],TCC_ATOMIC[92],TCC_BUBBLE[92],TCC_CYCLE[92],TCC_EA0_ATOMIC[92],TCC_ATOMIC[93],TCC_BUBBLE[93],TCC_CYCLE[93],TCC_EA0_ATOMIC[93],TCC_ATOMIC[94],TCC_BUBBLE[94],TCC_CYCLE[94],TCC_EA0_ATOMIC[94],TCC_ATOMIC[95],TCC_BUBBLE[95],TCC_CYCLE[95],TCC_EA0_ATOMIC[95],Wave_Size_9,Correlation_ID_9,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_10,Correlation_ID_10,SQC_TC_DATA_ATOMIC_REQ,SQC_TC_STALL,SQC_TC_REQ,SQC_DCACHE_REQ_READ_16,SQC_ICACHE_REQ,SQC_ICACHE_HITS,SQC_ICACHE_MISSES,SQC_ICACHE_MISSES_DUPLICATE,Wave_Size_11,Correlation_ID_11,SQ_INSTS_VALU_MFMA_MOPS_I8,SQ_INSTS_VALU_MFMA_MOPS_F16,SQ_INSTS_VALU_MFMA_MOPS_BF16,SQ_INSTS_VALU_MFMA_MOPS_F32,SQ_INSTS_VALU_MFMA_MOPS_F64,SQC_TC_INST_REQ,SQC_TC_DATA_READ_REQ,SQC_TC_DATA_WRITE_REQ,TCP_PENDING_STALL_CYCLES_sum,Wave_Size_12,Correlation_ID_12,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,TCC_EA0_ATOMIC_LEVEL_sum,TCC_EA0_RDREQ_LEVEL_sum,TCC_EA0_WRREQ_LEVEL_sum,TCC_EA0_WRREQ_STALL_sum,TCP_TCC_CC_ATOMIC_REQ_sum,TCP_TCC_RW_ATOMIC_REQ_sum,TCP_TCC_RW_READ_REQ_sum,TCP_TCC_RW_WRITE_REQ_sum,Wave_Size_13,Correlation_ID_13,SQC_DCACHE_REQ_READ_2,SQC_DCACHE_REQ_READ_4,Wave_Size_14,Correlation_ID_14,SQ_ACTIVE_INST_SCA,SQ_ACTIVE_INST_EXP_GDS,SQ_ACTIVE_INST_MISC,SQ_ACTIVE_INST_FLAT,SQ_INST_CYCLES_VMEM_WR,SQ_INST_CYCLES_VMEM_RD,SQ_INST_CYCLES_SMEM,SQ_INST_CYCLES_SALU,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,CPC_ME1_DC0_SPI_BUSY,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,TCC_BUBBLE_sum,TCC_EA0_RDREQ_32B_sum,TCC_EA0_RDREQ_sum,TCC_EA0_RD_UNCACHED_32B_sum,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,TCP_TCC_READ_REQ_sum,TCP_TCC_WRITE_REQ_sum,Wave_Size_15,Correlation_ID_15,XCC_Index_15,TCC_EA0_ATOMIC_LEVEL[0],TCC_EA0_RDREQ[0],TCC_EA0_RDREQ_32B[0],TCC_EA0_RDREQ_LEVEL[0],TCC_EA0_ATOMIC_LEVEL[1],TCC_EA0_RDREQ[1],TCC_EA0_RDREQ_32B[1],TCC_EA0_RDREQ_LEVEL[1],TCC_EA0_ATOMIC_LEVEL[2],TCC_EA0_RDREQ[2],TCC_EA0_RDREQ_32B[2],TCC_EA0_RDREQ_LEVEL[2],TCC_EA0_ATOMIC_LEVEL[3],TCC_EA0_RDREQ[3],TCC_EA0_RDREQ_32B[3],TCC_EA0_RDREQ_LEVEL[3],TCC_EA0_ATOMIC_LEVEL[4],TCC_EA0_RDREQ[4],TCC_EA0_RDREQ_32B[4],TCC_EA0_RDREQ_LEVEL[4],TCC_EA0_ATOMIC_LEVEL[5],TCC_EA0_RDREQ[5],TCC_EA0_RDREQ_32B[5],TCC_EA0_RDREQ_LEVEL[5],TCC_EA0_ATOMIC_LEVEL[6],TCC_EA0_RDREQ[6],TCC_EA0_RDREQ_32B[6],TCC_EA0_RDREQ_LEVEL[6],TCC_EA0_ATOMIC_LEVEL[7],TCC_EA0_RDREQ[7],TCC_EA0_RDREQ_32B[7],TCC_EA0_RDREQ_LEVEL[7],TCC_EA0_ATOMIC_LEVEL[8],TCC_EA0_RDREQ[8],TCC_EA0_RDREQ_32B[8],TCC_EA0_RDREQ_LEVEL[8],TCC_EA0_ATOMIC_LEVEL[9],TCC_EA0_RDREQ[9],TCC_EA0_RDREQ_32B[9],TCC_EA0_RDREQ_LEVEL[9],TCC_EA0_ATOMIC_LEVEL[10],TCC_EA0_RDREQ[10],TCC_EA0_RDREQ_32B[10],TCC_EA0_RDREQ_LEVEL[10],TCC_EA0_ATOMIC_LEVEL[11],TCC_EA0_RDREQ[11],TCC_EA0_RDREQ_32B[11],TCC_EA0_RDREQ_LEVEL[11],TCC_EA0_ATOMIC_LEVEL[12],TCC_EA0_RDREQ[12],TCC_EA0_RDREQ_32B[12],TCC_EA0_RDREQ_LEVEL[12],TCC_EA0_ATOMIC_LEVEL[13],TCC_EA0_RDREQ[13],TCC_EA0_RDREQ_32B[13],TCC_EA0_RDREQ_LEVEL[13],TCC_EA0_ATOMIC_LEVEL[14],TCC_EA0_RDREQ[14],TCC_EA0_RDREQ_32B[14],TCC_EA0_RDREQ_LEVEL[14],TCC_EA0_ATOMIC_LEVEL[15],TCC_EA0_RDREQ[15],TCC_EA0_RDREQ_32B[15],TCC_EA0_RDREQ_LEVEL[15],TCC_EA0_ATOMIC_LEVEL[16],TCC_EA0_RDREQ[16],TCC_EA0_RDREQ_32B[16],TCC_EA0_RDREQ_LEVEL[16],TCC_EA0_ATOMIC_LEVEL[17],TCC_EA0_RDREQ[17],TCC_EA0_RDREQ_32B[17],TCC_EA0_RDREQ_LEVEL[17],TCC_EA0_ATOMIC_LEVEL[18],TCC_EA0_RDREQ[18],TCC_EA0_RDREQ_32B[18],TCC_EA0_RDREQ_LEVEL[18],TCC_EA0_ATOMIC_LEVEL[19],TCC_EA0_RDREQ[19],TCC_EA0_RDREQ_32B[19],TCC_EA0_RDREQ_LEVEL[19],TCC_EA0_ATOMIC_LEVEL[20],TCC_EA0_RDREQ[20],TCC_EA0_RDREQ_32B[20],TCC_EA0_RDREQ_LEVEL[20],TCC_EA0_ATOMIC_LEVEL[21],TCC_EA0_RDREQ[21],TCC_EA0_RDREQ_32B[21],TCC_EA0_RDREQ_LEVEL[21],TCC_EA0_ATOMIC_LEVEL[22],TCC_EA0_RDREQ[22],TCC_EA0_RDREQ_32B[22],TCC_EA0_RDREQ_LEVEL[22],TCC_EA0_ATOMIC_LEVEL[23],TCC_EA0_RDREQ[23],TCC_EA0_RDREQ_32B[23],TCC_EA0_RDREQ_LEVEL[23],TCC_EA0_ATOMIC_LEVEL[24],TCC_EA0_RDREQ[24],TCC_EA0_RDREQ_32B[24],TCC_EA0_RDREQ_LEVEL[24],TCC_EA0_ATOMIC_LEVEL[25],TCC_EA0_RDREQ[25],TCC_EA0_RDREQ_32B[25],TCC_EA0_RDREQ_LEVEL[25],TCC_EA0_ATOMIC_LEVEL[26],TCC_EA0_RDREQ[26],TCC_EA0_RDREQ_32B[26],TCC_EA0_RDREQ_LEVEL[26],TCC_EA0_ATOMIC_LEVEL[27],TCC_EA0_RDREQ[27],TCC_EA0_RDREQ_32B[27],TCC_EA0_RDREQ_LEVEL[27],TCC_EA0_ATOMIC_LEVEL[28],TCC_EA0_RDREQ[28],TCC_EA0_RDREQ_32B[28],TCC_EA0_RDREQ_LEVEL[28],TCC_EA0_ATOMIC_LEVEL[29],TCC_EA0_RDREQ[29],TCC_EA0_RDREQ_32B[29],TCC_EA0_RDREQ_LEVEL[29],TCC_EA0_ATOMIC_LEVEL[30],TCC_EA0_RDREQ[30],TCC_EA0_RDREQ_32B[30],TCC_EA0_RDREQ_LEVEL[30],TCC_EA0_ATOMIC_LEVEL[31],TCC_EA0_RDREQ[31],TCC_EA0_RDREQ_32B[31],TCC_EA0_RDREQ_LEVEL[31],TCC_EA0_ATOMIC_LEVEL[32],TCC_EA0_RDREQ[32],TCC_EA0_RDREQ_32B[32],TCC_EA0_RDREQ_LEVEL[32],TCC_EA0_ATOMIC_LEVEL[33],TCC_EA0_RDREQ[33],TCC_EA0_RDREQ_32B[33],TCC_EA0_RDREQ_LEVEL[33],TCC_EA0_ATOMIC_LEVEL[34],TCC_EA0_RDREQ[34],TCC_EA0_RDREQ_32B[34],TCC_EA0_RDREQ_LEVEL[34],TCC_EA0_ATOMIC_LEVEL[35],TCC_EA0_RDREQ[35],TCC_EA0_RDREQ_32B[35],TCC_EA0_RDREQ_LEVEL[35],TCC_EA0_ATOMIC_LEVEL[36],TCC_EA0_RDREQ[36],TCC_EA0_RDREQ_32B[36],TCC_EA0_RDREQ_LEVEL[36],TCC_EA0_ATOMIC_LEVEL[37],TCC_EA0_RDREQ[37],TCC_EA0_RDREQ_32B[37],TCC_EA0_RDREQ_LEVEL[37],TCC_EA0_ATOMIC_LEVEL[38],TCC_EA0_RDREQ[38],TCC_EA0_RDREQ_32B[38],TCC_EA0_RDREQ_LEVEL[38],TCC_EA0_ATOMIC_LEVEL[39],TCC_EA0_RDREQ[39],TCC_EA0_RDREQ_32B[39],TCC_EA0_RDREQ_LEVEL[39],TCC_EA0_ATOMIC_LEVEL[40],TCC_EA0_RDREQ[40],TCC_EA0_RDREQ_32B[40],TCC_EA0_RDREQ_LEVEL[40],TCC_EA0_ATOMIC_LEVEL[41],TCC_EA0_RDREQ[41],TCC_EA0_RDREQ_32B[41],TCC_EA0_RDREQ_LEVEL[41],TCC_EA0_ATOMIC_LEVEL[42],TCC_EA0_RDREQ[42],TCC_EA0_RDREQ_32B[42],TCC_EA0_RDREQ_LEVEL[42],TCC_EA0_ATOMIC_LEVEL[43],TCC_EA0_RDREQ[43],TCC_EA0_RDREQ_32B[43],TCC_EA0_RDREQ_LEVEL[43],TCC_EA0_ATOMIC_LEVEL[44],TCC_EA0_RDREQ[44],TCC_EA0_RDREQ_32B[44],TCC_EA0_RDREQ_LEVEL[44],TCC_EA0_ATOMIC_LEVEL[45],TCC_EA0_RDREQ[45],TCC_EA0_RDREQ_32B[45],TCC_EA0_RDREQ_LEVEL[45],TCC_EA0_ATOMIC_LEVEL[46],TCC_EA0_RDREQ[46],TCC_EA0_RDREQ_32B[46],TCC_EA0_RDREQ_LEVEL[46],TCC_EA0_ATOMIC_LEVEL[47],TCC_EA0_RDREQ[47],TCC_EA0_RDREQ_32B[47],TCC_EA0_RDREQ_LEVEL[47],TCC_EA0_ATOMIC_LEVEL[48],TCC_EA0_RDREQ[48],TCC_EA0_RDREQ_32B[48],TCC_EA0_RDREQ_LEVEL[48],TCC_EA0_ATOMIC_LEVEL[49],TCC_EA0_RDREQ[49],TCC_EA0_RDREQ_32B[49],TCC_EA0_RDREQ_LEVEL[49],TCC_EA0_ATOMIC_LEVEL[50],TCC_EA0_RDREQ[50],TCC_EA0_RDREQ_32B[50],TCC_EA0_RDREQ_LEVEL[50],TCC_EA0_ATOMIC_LEVEL[51],TCC_EA0_RDREQ[51],TCC_EA0_RDREQ_32B[51],TCC_EA0_RDREQ_LEVEL[51],TCC_EA0_ATOMIC_LEVEL[52],TCC_EA0_RDREQ[52],TCC_EA0_RDREQ_32B[52],TCC_EA0_RDREQ_LEVEL[52],TCC_EA0_ATOMIC_LEVEL[53],TCC_EA0_RDREQ[53],TCC_EA0_RDREQ_32B[53],TCC_EA0_RDREQ_LEVEL[53],TCC_EA0_ATOMIC_LEVEL[54],TCC_EA0_RDREQ[54],TCC_EA0_RDREQ_32B[54],TCC_EA0_RDREQ_LEVEL[54],TCC_EA0_ATOMIC_LEVEL[55],TCC_EA0_RDREQ[55],TCC_EA0_RDREQ_32B[55],TCC_EA0_RDREQ_LEVEL[55],TCC_EA0_ATOMIC_LEVEL[56],TCC_EA0_RDREQ[56],TCC_EA0_RDREQ_32B[56],TCC_EA0_RDREQ_LEVEL[56],TCC_EA0_ATOMIC_LEVEL[57],TCC_EA0_RDREQ[57],TCC_EA0_RDREQ_32B[57],TCC_EA0_RDREQ_LEVEL[57],TCC_EA0_ATOMIC_LEVEL[58],TCC_EA0_RDREQ[58],TCC_EA0_RDREQ_32B[58],TCC_EA0_RDREQ_LEVEL[58],TCC_EA0_ATOMIC_LEVEL[59],TCC_EA0_RDREQ[59],TCC_EA0_RDREQ_32B[59],TCC_EA0_RDREQ_LEVEL[59],TCC_EA0_ATOMIC_LEVEL[60],TCC_EA0_RDREQ[60],TCC_EA0_RDREQ_32B[60],TCC_EA0_RDREQ_LEVEL[60],TCC_EA0_ATOMIC_LEVEL[61],TCC_EA0_RDREQ[61],TCC_EA0_RDREQ_32B[61],TCC_EA0_RDREQ_LEVEL[61],TCC_EA0_ATOMIC_LEVEL[62],TCC_EA0_RDREQ[62],TCC_EA0_RDREQ_32B[62],TCC_EA0_RDREQ_LEVEL[62],TCC_EA0_ATOMIC_LEVEL[63],TCC_EA0_RDREQ[63],TCC_EA0_RDREQ_32B[63],TCC_EA0_RDREQ_LEVEL[63],TCC_EA0_ATOMIC_LEVEL[64],TCC_EA0_RDREQ[64],TCC_EA0_RDREQ_32B[64],TCC_EA0_RDREQ_LEVEL[64],TCC_EA0_ATOMIC_LEVEL[65],TCC_EA0_RDREQ[65],TCC_EA0_RDREQ_32B[65],TCC_EA0_RDREQ_LEVEL[65],TCC_EA0_ATOMIC_LEVEL[66],TCC_EA0_RDREQ[66],TCC_EA0_RDREQ_32B[66],TCC_EA0_RDREQ_LEVEL[66],TCC_EA0_ATOMIC_LEVEL[67],TCC_EA0_RDREQ[67],TCC_EA0_RDREQ_32B[67],TCC_EA0_RDREQ_LEVEL[67],TCC_EA0_ATOMIC_LEVEL[68],TCC_EA0_RDREQ[68],TCC_EA0_RDREQ_32B[68],TCC_EA0_RDREQ_LEVEL[68],TCC_EA0_ATOMIC_LEVEL[69],TCC_EA0_RDREQ[69],TCC_EA0_RDREQ_32B[69],TCC_EA0_RDREQ_LEVEL[69],TCC_EA0_ATOMIC_LEVEL[70],TCC_EA0_RDREQ[70],TCC_EA0_RDREQ_32B[70],TCC_EA0_RDREQ_LEVEL[70],TCC_EA0_ATOMIC_LEVEL[71],TCC_EA0_RDREQ[71],TCC_EA0_RDREQ_32B[71],TCC_EA0_RDREQ_LEVEL[71],TCC_EA0_ATOMIC_LEVEL[72],TCC_EA0_RDREQ[72],TCC_EA0_RDREQ_32B[72],TCC_EA0_RDREQ_LEVEL[72],TCC_EA0_ATOMIC_LEVEL[73],TCC_EA0_RDREQ[73],TCC_EA0_RDREQ_32B[73],TCC_EA0_RDREQ_LEVEL[73],TCC_EA0_ATOMIC_LEVEL[74],TCC_EA0_RDREQ[74],TCC_EA0_RDREQ_32B[74],TCC_EA0_RDREQ_LEVEL[74],TCC_EA0_ATOMIC_LEVEL[75],TCC_EA0_RDREQ[75],TCC_EA0_RDREQ_32B[75],TCC_EA0_RDREQ_LEVEL[75],TCC_EA0_ATOMIC_LEVEL[76],TCC_EA0_RDREQ[76],TCC_EA0_RDREQ_32B[76],TCC_EA0_RDREQ_LEVEL[76],TCC_EA0_ATOMIC_LEVEL[77],TCC_EA0_RDREQ[77],TCC_EA0_RDREQ_32B[77],TCC_EA0_RDREQ_LEVEL[77],TCC_EA0_ATOMIC_LEVEL[78],TCC_EA0_RDREQ[78],TCC_EA0_RDREQ_32B[78],TCC_EA0_RDREQ_LEVEL[78],TCC_EA0_ATOMIC_LEVEL[79],TCC_EA0_RDREQ[79],TCC_EA0_RDREQ_32B[79],TCC_EA0_RDREQ_LEVEL[79],TCC_EA0_ATOMIC_LEVEL[80],TCC_EA0_RDREQ[80],TCC_EA0_RDREQ_32B[80],TCC_EA0_RDREQ_LEVEL[80],TCC_EA0_ATOMIC_LEVEL[81],TCC_EA0_RDREQ[81],TCC_EA0_RDREQ_32B[81],TCC_EA0_RDREQ_LEVEL[81],TCC_EA0_ATOMIC_LEVEL[82],TCC_EA0_RDREQ[82],TCC_EA0_RDREQ_32B[82],TCC_EA0_RDREQ_LEVEL[82],TCC_EA0_ATOMIC_LEVEL[83],TCC_EA0_RDREQ[83],TCC_EA0_RDREQ_32B[83],TCC_EA0_RDREQ_LEVEL[83],TCC_EA0_ATOMIC_LEVEL[84],TCC_EA0_RDREQ[84],TCC_EA0_RDREQ_32B[84],TCC_EA0_RDREQ_LEVEL[84],TCC_EA0_ATOMIC_LEVEL[85],TCC_EA0_RDREQ[85],TCC_EA0_RDREQ_32B[85],TCC_EA0_RDREQ_LEVEL[85],TCC_EA0_ATOMIC_LEVEL[86],TCC_EA0_RDREQ[86],TCC_EA0_RDREQ_32B[86],TCC_EA0_RDREQ_LEVEL[86],TCC_EA0_ATOMIC_LEVEL[87],TCC_EA0_RDREQ[87],TCC_EA0_RDREQ_32B[87],TCC_EA0_RDREQ_LEVEL[87],TCC_EA0_ATOMIC_LEVEL[88],TCC_EA0_RDREQ[88],TCC_EA0_RDREQ_32B[88],TCC_EA0_RDREQ_LEVEL[88],TCC_EA0_ATOMIC_LEVEL[89],TCC_EA0_RDREQ[89],TCC_EA0_RDREQ_32B[89],TCC_EA0_RDREQ_LEVEL[89],TCC_EA0_ATOMIC_LEVEL[90],TCC_EA0_RDREQ[90],TCC_EA0_RDREQ_32B[90],TCC_EA0_RDREQ_LEVEL[90],TCC_EA0_ATOMIC_LEVEL[91],TCC_EA0_RDREQ[91],TCC_EA0_RDREQ_32B[91],TCC_EA0_RDREQ_LEVEL[91],TCC_EA0_ATOMIC_LEVEL[92],TCC_EA0_RDREQ[92],TCC_EA0_RDREQ_32B[92],TCC_EA0_RDREQ_LEVEL[92],TCC_EA0_ATOMIC_LEVEL[93],TCC_EA0_RDREQ[93],TCC_EA0_RDREQ_32B[93],TCC_EA0_RDREQ_LEVEL[93],TCC_EA0_ATOMIC_LEVEL[94],TCC_EA0_RDREQ[94],TCC_EA0_RDREQ_32B[94],TCC_EA0_RDREQ_LEVEL[94],TCC_EA0_ATOMIC_LEVEL[95],TCC_EA0_RDREQ[95],TCC_EA0_RDREQ_32B[95],TCC_EA0_RDREQ_LEVEL[95],Wave_Size_16,Correlation_ID_16,SQ_INSTS_VMEM,SQ_INSTS_SALU,SQ_INSTS_VSKIPPED,SQ_INSTS,SQ_INSTS_VALU,SQ_INSTS_VALU_ADD_F16,SQ_INSTS_VALU_MUL_F16,SQ_INSTS_VALU_FMA_F16,GRBM_SPI_BUSY,SPI_CSN_NUM_THREADGROUPS,SPI_CSN_WAVE,CPC_CPC_TCIU_BUSY,CPC_CPC_TCIU_IDLE,CPF_CPF_TCIU_BUSY,CPF_CPF_TCIU_STALL,TA_BUFFER_READ_WAVEFRONTS_sum,TA_BUFFER_WRITE_WAVEFRONTS_sum,TCC_CC_REQ_sum,TCC_NC_REQ_sum,TCC_RW_REQ_sum,TCC_UC_REQ_sum,TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum,TCP_READ_TAGCONFLICT_STALL_CYCLES_sum,TCP_TA_TCP_STATE_READ_sum,TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum,TD_LOAD_WAVEFRONT_sum,TD_SPI_STALL_sum,Wave_Size_17,Correlation_ID_17,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_BUSY_CU_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_INSTS_VALU_CVT,SQ_INSTS_VMEM_WR,SQ_INSTS_VMEM_RD,GRBM_COUNT,GRBM_GUI_ACTIVE,SPI_CSN_WINDOW_VALID,SPI_CSN_BUSY,CPC_CPC_STAT_BUSY,CPC_CPC_STAT_IDLE,CPF_CPF_STAT_BUSY,CPF_CPF_STAT_STALL,TA_BUFFER_WAVEFRONTS_sum,TA_TA_BUSY_sum,TCC_BUSY_sum,TCC_CYCLE_sum,TCC_PROBE_ALL_sum,TCC_PROBE_sum,TCP_GATE_EN1_sum,TCP_GATE_EN2_sum,TCP_TCR_TCP_STALL_CYCLES_sum,TCP_TD_TCP_STALL_CYCLES_sum,TD_TC_STALL_sum,TD_TD_BUSY_sum,Start_Timestamp,End_Timestamp
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diff --git a/tests/workloads/dispatch_inv/MI300A_A1/sysinfo.csv b/tests/workloads/dispatch_inv/MI300A_A1/sysinfo.csv
new file mode 100644
index 0000000000..94076fe3b6
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300A_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+dispatch_inv,./tests/vcopy -n 1048576 -b 256 -i 3,SQ|LDS|SQC|TA|TD|TCP|TCC|SPI|CPC|CPF,Wed 29 May 2024 01:30:08 PM  (CDT),2,sh5-1w300-rg3-3,AMD Instinct MI300A Accelerator,"American Megatrends International, LLC.RMO1002DS",Ubuntu 22.04.2 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,131174852,,6.1.2-110,N/A,SPX,NPS1,MI300A_A1,gfx942,32,24576,228,4,24,64,1024,32,2100,1300,2100,1300,96,32,120,4,5324.8,6
diff --git a/tests/workloads/dispatch_inv/MI300A_A1/timestamps.csv b/tests/workloads/dispatch_inv/MI300A_A1/timestamps.csv
new file mode 100644
index 0000000000..90ed6cd1c7
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300A_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,11995,1,142399,142399,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73285541833672,73285541841404,0
+2,11995,1,142399,142399,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73285541860632,73285541867162,0
+3,11995,1,142399,142399,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73285541884388,73285541890838,0
diff --git a/tests/workloads/dispatch_inv/MI300X_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/dispatch_inv/MI300X_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..fe0517e0f9
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300X_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,60633,1,960190,960190,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716011730095458,716011730117977,0,414337.0,414337.0,16384.0,65536.0,32415.0,2598568.0
+1,60633,1,960190,960190,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716011730139495,716011730153215,0,379448.0,379448.0,16384.0,65536.0,13011.0,1048576.0
+2,60633,1,960190,960190,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716011730173414,716011730187774,0,335474.0,335474.0,16384.0,65536.0,13087.0,1048576.0
diff --git a/tests/workloads/dispatch_inv/MI300X_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/dispatch_inv/MI300X_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..ea897c179c
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300X_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,60633,1,960217,960217,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716011730095458,716011730117977,0,0.0,0.0,0.0
+1,60633,1,960217,960217,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716011730139495,716011730153215,0,0.0,0.0,0.0
+2,60633,1,960217,960217,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716011730173414,716011730187774,0,0.0,0.0,0.0
diff --git a/tests/workloads/dispatch_inv/MI300X_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/dispatch_inv/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..0e705f7165
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,960244,960244,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716011730095458,716011730117977,0,65536.0,3820564.0,305702704.0
+1,60633,1,960244,960244,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716011730139495,716011730153215,0,65536.0,3956762.0,316492352.0
+2,60633,1,960244,960244,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716011730173414,716011730187774,0,65536.0,3780070.0,302466928.0
diff --git a/tests/workloads/dispatch_inv/MI300X_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/dispatch_inv/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..35783d08a7
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,960271,960271,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716011730095458,716011730117977,0,32768.0,447440.0,35784180.0
+1,60633,1,960271,960271,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716011730139495,716011730153215,0,32768.0,277891.0,22219424.0
+2,60633,1,960271,960271,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716011730173414,716011730187774,0,32768.0,291000.0,23271064.0
diff --git a/tests/workloads/dispatch_inv/MI300X_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/dispatch_inv/MI300X_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..40283696d1
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300X_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,60633,1,960283,960283,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716011730095458,716011730117977,0,447610.0,447610.0,261596.0,1790440.0,16384.0,34553195.0,562377.0,0.0,138553848.0
+1,60633,1,960283,960283,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716011730139495,716011730153215,0,423311.0,423311.0,246620.0,1693244.0,16384.0,31439535.0,504434.0,0.0,126111788.0
+2,60633,1,960283,960283,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716011730173414,716011730187774,0,365800.0,365800.0,194280.0,1463200.0,16384.0,29593510.0,483473.0,0.0,118729636.0
diff --git a/tests/workloads/dispatch_inv/MI300X_A1/log.txt b/tests/workloads/dispatch_inv/MI300X_A1/log.txt
new file mode 100644
index 0000000000..84c63e72a9
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300X_A1/log.txt
@@ -0,0 +1,202 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/dispatch_inv/MI300X_A1
+Target: MI300X_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: ['invalid']
+Hardware Blocks: All
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH_LEVEL
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_16
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_13.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[1]
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_14.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[0]
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_15.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[1]
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_16.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[1]
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_17.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[1]
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F32
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_LDS
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_SCA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_MISC
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_WR
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_RD
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_THREAD_CYCLES_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ADDR_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_UNALIGNED_STALL
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ITEMS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_MEM_VIOLATIONS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ATOMIC_RETURN
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_BF16
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F32
+
+[profiling] Current input file: tests/workloads/dispatch_inv/MI300X_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/dispatch_inv/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..e7209bdada
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..67fb5049bc
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..81efe0fd5b
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..bbf5c9dbb7
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..1422b5f0d7
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_0.txt b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..26f993c80e
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD GRBM_COUNT GRBM_GUI_ACTIVE TCP_GATE_EN1_sum TCP_GATE_EN2_sum TCP_TD_TCP_STALL_CYCLES_sum TCP_TCR_TCP_STALL_CYCLES_sum TA_TA_BUSY_sum TA_BUFFER_WAVEFRONTS_sum TD_TD_BUSY_sum TD_TC_STALL_sum SPI_CSN_WINDOW_VALID SPI_CSN_BUSY CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE CPF_CPF_STAT_BUSY CPF_CPF_STAT_STALL TCC_CYCLE_sum TCC_BUSY_sum TCC_PROBE_sum TCC_PROBE_ALL_sum
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_1.txt b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..8a0b8338d5
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 GRBM_SPI_BUSY TCP_READ_TAGCONFLICT_STALL_CYCLES_sum TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum TCP_TA_TCP_STATE_READ_sum TA_BUFFER_READ_WAVEFRONTS_sum TA_BUFFER_WRITE_WAVEFRONTS_sum TD_SPI_STALL_sum TD_LOAD_WAVEFRONT_sum SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE CPC_CPC_TCIU_BUSY CPC_CPC_TCIU_IDLE CPF_CPF_TCIU_BUSY CPF_CPF_TCIU_STALL TCC_NC_REQ_sum TCC_UC_REQ_sum TCC_CC_REQ_sum TCC_RW_REQ_sum
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_10.txt b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..668d46196a
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_11.txt b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..bd56969872
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_12.txt b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..0d33ae03c1
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_13.txt b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_13.txt
new file mode 100644
index 0000000000..3b7be35af5
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_13.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_ATOMIC[0] TCC_BUBBLE[0] TCC_CYCLE[0] TCC_EA0_ATOMIC[0] TCC_ATOMIC[1] TCC_BUBBLE[1] TCC_CYCLE[1] TCC_EA0_ATOMIC[1] TCC_ATOMIC[2] TCC_BUBBLE[2] TCC_CYCLE[2] TCC_EA0_ATOMIC[2] TCC_ATOMIC[3] TCC_BUBBLE[3] TCC_CYCLE[3] TCC_EA0_ATOMIC[3] TCC_ATOMIC[4] TCC_BUBBLE[4] TCC_CYCLE[4] TCC_EA0_ATOMIC[4] TCC_ATOMIC[5] TCC_BUBBLE[5] TCC_CYCLE[5] TCC_EA0_ATOMIC[5] TCC_ATOMIC[6] TCC_BUBBLE[6] TCC_CYCLE[6] TCC_EA0_ATOMIC[6] TCC_ATOMIC[7] TCC_BUBBLE[7] TCC_CYCLE[7] TCC_EA0_ATOMIC[7] TCC_ATOMIC[8] TCC_BUBBLE[8] TCC_CYCLE[8] TCC_EA0_ATOMIC[8] TCC_ATOMIC[9] TCC_BUBBLE[9] TCC_CYCLE[9] TCC_EA0_ATOMIC[9] TCC_ATOMIC[10] TCC_BUBBLE[10] TCC_CYCLE[10] TCC_EA0_ATOMIC[10] TCC_ATOMIC[11] TCC_BUBBLE[11] TCC_CYCLE[11] TCC_EA0_ATOMIC[11] TCC_ATOMIC[12] TCC_BUBBLE[12] TCC_CYCLE[12] TCC_EA0_ATOMIC[12] TCC_ATOMIC[13] TCC_BUBBLE[13] TCC_CYCLE[13] TCC_EA0_ATOMIC[13] TCC_ATOMIC[14] TCC_BUBBLE[14] TCC_CYCLE[14] TCC_EA0_ATOMIC[14] TCC_ATOMIC[15] TCC_BUBBLE[15] TCC_CYCLE[15] TCC_EA0_ATOMIC[15]
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_14.txt b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_14.txt
new file mode 100644
index 0000000000..59f5e1a186
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_14.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_ATOMIC_LEVEL[0] TCC_EA0_RDREQ[0] TCC_EA0_RDREQ_32B[0] TCC_EA0_RDREQ_LEVEL[0] TCC_EA0_ATOMIC_LEVEL[1] TCC_EA0_RDREQ[1] TCC_EA0_RDREQ_32B[1] TCC_EA0_RDREQ_LEVEL[1] TCC_EA0_ATOMIC_LEVEL[2] TCC_EA0_RDREQ[2] TCC_EA0_RDREQ_32B[2] TCC_EA0_RDREQ_LEVEL[2] TCC_EA0_ATOMIC_LEVEL[3] TCC_EA0_RDREQ[3] TCC_EA0_RDREQ_32B[3] TCC_EA0_RDREQ_LEVEL[3] TCC_EA0_ATOMIC_LEVEL[4] TCC_EA0_RDREQ[4] TCC_EA0_RDREQ_32B[4] TCC_EA0_RDREQ_LEVEL[4] TCC_EA0_ATOMIC_LEVEL[5] TCC_EA0_RDREQ[5] TCC_EA0_RDREQ_32B[5] TCC_EA0_RDREQ_LEVEL[5] TCC_EA0_ATOMIC_LEVEL[6] TCC_EA0_RDREQ[6] TCC_EA0_RDREQ_32B[6] TCC_EA0_RDREQ_LEVEL[6] TCC_EA0_ATOMIC_LEVEL[7] TCC_EA0_RDREQ[7] TCC_EA0_RDREQ_32B[7] TCC_EA0_RDREQ_LEVEL[7] TCC_EA0_ATOMIC_LEVEL[8] TCC_EA0_RDREQ[8] TCC_EA0_RDREQ_32B[8] TCC_EA0_RDREQ_LEVEL[8] TCC_EA0_ATOMIC_LEVEL[9] TCC_EA0_RDREQ[9] TCC_EA0_RDREQ_32B[9] TCC_EA0_RDREQ_LEVEL[9] TCC_EA0_ATOMIC_LEVEL[10] TCC_EA0_RDREQ[10] TCC_EA0_RDREQ_32B[10] TCC_EA0_RDREQ_LEVEL[10] TCC_EA0_ATOMIC_LEVEL[11] TCC_EA0_RDREQ[11] TCC_EA0_RDREQ_32B[11] TCC_EA0_RDREQ_LEVEL[11] TCC_EA0_ATOMIC_LEVEL[12] TCC_EA0_RDREQ[12] TCC_EA0_RDREQ_32B[12] TCC_EA0_RDREQ_LEVEL[12] TCC_EA0_ATOMIC_LEVEL[13] TCC_EA0_RDREQ[13] TCC_EA0_RDREQ_32B[13] TCC_EA0_RDREQ_LEVEL[13] TCC_EA0_ATOMIC_LEVEL[14] TCC_EA0_RDREQ[14] TCC_EA0_RDREQ_32B[14] TCC_EA0_RDREQ_LEVEL[14] TCC_EA0_ATOMIC_LEVEL[15] TCC_EA0_RDREQ[15] TCC_EA0_RDREQ_32B[15] TCC_EA0_RDREQ_LEVEL[15]
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_15.txt b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_15.txt
new file mode 100644
index 0000000000..a33c85a3a9
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_15.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_WRREQ[0] TCC_EA0_WRREQ_64B[0] TCC_EA0_WRREQ_LEVEL[0] TCC_HIT[0] TCC_EA0_WRREQ[1] TCC_EA0_WRREQ_64B[1] TCC_EA0_WRREQ_LEVEL[1] TCC_HIT[1] TCC_EA0_WRREQ[2] TCC_EA0_WRREQ_64B[2] TCC_EA0_WRREQ_LEVEL[2] TCC_HIT[2] TCC_EA0_WRREQ[3] TCC_EA0_WRREQ_64B[3] TCC_EA0_WRREQ_LEVEL[3] TCC_HIT[3] TCC_EA0_WRREQ[4] TCC_EA0_WRREQ_64B[4] TCC_EA0_WRREQ_LEVEL[4] TCC_HIT[4] TCC_EA0_WRREQ[5] TCC_EA0_WRREQ_64B[5] TCC_EA0_WRREQ_LEVEL[5] TCC_HIT[5] TCC_EA0_WRREQ[6] TCC_EA0_WRREQ_64B[6] TCC_EA0_WRREQ_LEVEL[6] TCC_HIT[6] TCC_EA0_WRREQ[7] TCC_EA0_WRREQ_64B[7] TCC_EA0_WRREQ_LEVEL[7] TCC_HIT[7] TCC_EA0_WRREQ[8] TCC_EA0_WRREQ_64B[8] TCC_EA0_WRREQ_LEVEL[8] TCC_HIT[8] TCC_EA0_WRREQ[9] TCC_EA0_WRREQ_64B[9] TCC_EA0_WRREQ_LEVEL[9] TCC_HIT[9] TCC_EA0_WRREQ[10] TCC_EA0_WRREQ_64B[10] TCC_EA0_WRREQ_LEVEL[10] TCC_HIT[10] TCC_EA0_WRREQ[11] TCC_EA0_WRREQ_64B[11] TCC_EA0_WRREQ_LEVEL[11] TCC_HIT[11] TCC_EA0_WRREQ[12] TCC_EA0_WRREQ_64B[12] TCC_EA0_WRREQ_LEVEL[12] TCC_HIT[12] TCC_EA0_WRREQ[13] TCC_EA0_WRREQ_64B[13] TCC_EA0_WRREQ_LEVEL[13] TCC_HIT[13] TCC_EA0_WRREQ[14] TCC_EA0_WRREQ_64B[14] TCC_EA0_WRREQ_LEVEL[14] TCC_HIT[14] TCC_EA0_WRREQ[15] TCC_EA0_WRREQ_64B[15] TCC_EA0_WRREQ_LEVEL[15] TCC_HIT[15]
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_16.txt b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_16.txt
new file mode 100644
index 0000000000..2616b4e94f
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_16.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_MISS[0] TCC_READ[0] TCC_REQ[0] TCC_RW_REQ[0] TCC_MISS[1] TCC_READ[1] TCC_REQ[1] TCC_RW_REQ[1] TCC_MISS[2] TCC_READ[2] TCC_REQ[2] TCC_RW_REQ[2] TCC_MISS[3] TCC_READ[3] TCC_REQ[3] TCC_RW_REQ[3] TCC_MISS[4] TCC_READ[4] TCC_REQ[4] TCC_RW_REQ[4] TCC_MISS[5] TCC_READ[5] TCC_REQ[5] TCC_RW_REQ[5] TCC_MISS[6] TCC_READ[6] TCC_REQ[6] TCC_RW_REQ[6] TCC_MISS[7] TCC_READ[7] TCC_REQ[7] TCC_RW_REQ[7] TCC_MISS[8] TCC_READ[8] TCC_REQ[8] TCC_RW_REQ[8] TCC_MISS[9] TCC_READ[9] TCC_REQ[9] TCC_RW_REQ[9] TCC_MISS[10] TCC_READ[10] TCC_REQ[10] TCC_RW_REQ[10] TCC_MISS[11] TCC_READ[11] TCC_REQ[11] TCC_RW_REQ[11] TCC_MISS[12] TCC_READ[12] TCC_REQ[12] TCC_RW_REQ[12] TCC_MISS[13] TCC_READ[13] TCC_REQ[13] TCC_RW_REQ[13] TCC_MISS[14] TCC_READ[14] TCC_REQ[14] TCC_RW_REQ[14] TCC_MISS[15] TCC_READ[15] TCC_REQ[15] TCC_RW_REQ[15]
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_17.txt b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_17.txt
new file mode 100644
index 0000000000..b22099e1dd
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_17.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_TAG_STALL[0] TCC_TOO_MANY_EA_WRREQS_STALL[0] TCC_WRITE[0] TCC_TAG_STALL[1] TCC_TOO_MANY_EA_WRREQS_STALL[1] TCC_WRITE[1] TCC_TAG_STALL[2] TCC_TOO_MANY_EA_WRREQS_STALL[2] TCC_WRITE[2] TCC_TAG_STALL[3] TCC_TOO_MANY_EA_WRREQS_STALL[3] TCC_WRITE[3] TCC_TAG_STALL[4] TCC_TOO_MANY_EA_WRREQS_STALL[4] TCC_WRITE[4] TCC_TAG_STALL[5] TCC_TOO_MANY_EA_WRREQS_STALL[5] TCC_WRITE[5] TCC_TAG_STALL[6] TCC_TOO_MANY_EA_WRREQS_STALL[6] TCC_WRITE[6] TCC_TAG_STALL[7] TCC_TOO_MANY_EA_WRREQS_STALL[7] TCC_WRITE[7] TCC_TAG_STALL[8] TCC_TOO_MANY_EA_WRREQS_STALL[8] TCC_WRITE[8] TCC_TAG_STALL[9] TCC_TOO_MANY_EA_WRREQS_STALL[9] TCC_WRITE[9] TCC_TAG_STALL[10] TCC_TOO_MANY_EA_WRREQS_STALL[10] TCC_WRITE[10] TCC_TAG_STALL[11] TCC_TOO_MANY_EA_WRREQS_STALL[11] TCC_WRITE[11] TCC_TAG_STALL[12] TCC_TOO_MANY_EA_WRREQS_STALL[12] TCC_WRITE[12] TCC_TAG_STALL[13] TCC_TOO_MANY_EA_WRREQS_STALL[13] TCC_WRITE[13] TCC_TAG_STALL[14] TCC_TOO_MANY_EA_WRREQS_STALL[14] TCC_WRITE[14] TCC_TAG_STALL[15] TCC_TOO_MANY_EA_WRREQS_STALL[15] TCC_WRITE[15]
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_2.txt b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..d9c92a3b9e
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 TCP_VOLATILE_sum TCP_TOTAL_ACCESSES_sum TCP_TOTAL_READ_sum TCP_TOTAL_WRITE_sum TA_BUFFER_ATOMIC_WAVEFRONTS_sum TA_BUFFER_TOTAL_CYCLES_sum TD_ATOMIC_WAVEFRONT_sum TD_STORE_WAVEFRONT_sum SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION CPF_CPF_STAT_IDLE CPF_CPF_TCIU_IDLE TCC_REQ_sum TCC_STREAMING_REQ_sum TCC_HIT_sum TCC_MISS_sum
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_3.txt b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..6aac684a26
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS TCP_TOTAL_ATOMIC_WITH_RET_sum TCP_TOTAL_ATOMIC_WITHOUT_RET_sum TCP_TOTAL_WRITEBACK_INVALIDATES_sum TCP_TOTAL_CACHE_ACCESSES_sum TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES_sum TD_COALESCABLE_WAVEFRONT_sum SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE CPF_CMP_UTCL1_STALL_ON_TRANSLATION TCC_READ_sum TCC_WRITE_sum TCC_ATOMIC_sum TCC_WRITEBACK_sum
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_4.txt b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..a4fff798ea
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAIT_ANY SQ_WAIT_INST_ANY SQ_ACTIVE_INST_ANY SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU TCP_UTCL1_TRANSLATION_MISS_sum TCP_UTCL1_TRANSLATION_HIT_sum TCP_UTCL1_PERMISSION_MISS_sum TCP_UTCL1_REQUEST_sum TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_TOTAL_WAVEFRONTS_sum SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE TCC_EA0_WRREQ_sum TCC_EA0_WRREQ_64B_sum TCC_EA0_WR_UNCACHED_32B_sum TCC_EA0_WRREQ_DRAM_sum
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_5.txt b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..696745c2f4
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_SCA SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU TCP_TCC_READ_REQ_sum TCP_TCC_WRITE_REQ_sum TCP_TCC_ATOMIC_WITH_RET_REQ_sum TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN CPC_ME1_DC0_SPI_BUSY TCC_EA0_RDREQ_sum TCC_EA0_RDREQ_32B_sum TCC_BUBBLE_sum TCC_EA0_RD_UNCACHED_32B_sum
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_6.txt b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..8a0ef62035
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_THREAD_CYCLES_VALU SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 TCP_TCC_NC_READ_REQ_sum TCP_TCC_NC_WRITE_REQ_sum TCP_TCC_NC_ATOMIC_REQ_sum TCP_TCC_UC_READ_REQ_sum TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN TCC_EA0_RDREQ_DRAM_sum TCC_TAG_STALL_sum TCC_NORMAL_WRITEBACK_sum TCC_ALL_TC_OP_WB_WRITEBACK_sum
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_7.txt b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..a0064f33a6
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED TCP_TCC_UC_WRITE_REQ_sum TCP_TCC_UC_ATOMIC_REQ_sum TCP_TCC_CC_READ_REQ_sum TCP_TCC_CC_WRITE_REQ_sum TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR TCC_NORMAL_EVICT_sum TCC_ALL_TC_OP_INV_EVICT_sum TCC_TOO_MANY_EA_WRREQS_STALL_sum TCC_EA0_ATOMIC_sum
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_8.txt b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..b6356cdf32
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES TCP_TCC_CC_ATOMIC_REQ_sum TCP_TCC_RW_READ_REQ_sum TCP_TCC_RW_WRITE_REQ_sum TCP_TCC_RW_ATOMIC_REQ_sum SPI_VWC_CSC_WR SPI_RA_BULKY_CU_FULL_CSN TCC_EA0_RDREQ_LEVEL_sum TCC_EA0_WRREQ_LEVEL_sum TCC_EA0_ATOMIC_LEVEL_sum TCC_EA0_WRREQ_STALL_sum
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_9.txt b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..6e7197bb13
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ TCP_PENDING_STALL_CYCLES_sum
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300X_A1/perfmon/timestamps.txt b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..6a128303a2
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300X_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range: invalid
+kernel:
diff --git a/tests/workloads/dispatch_inv/MI300X_A1/pmc_perf.csv b/tests/workloads/dispatch_inv/MI300X_A1/pmc_perf.csv
new file mode 100644
index 0000000000..f128bdfc54
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300X_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_1,Correlation_ID_1,XCC_Index,TCC_ATOMIC[0],TCC_BUBBLE[0],TCC_CYCLE[0],TCC_EA0_ATOMIC[0],TCC_ATOMIC[1],TCC_BUBBLE[1],TCC_CYCLE[1],TCC_EA0_ATOMIC[1],TCC_ATOMIC[2],TCC_BUBBLE[2],TCC_CYCLE[2],TCC_EA0_ATOMIC[2],TCC_ATOMIC[3],TCC_BUBBLE[3],TCC_CYCLE[3],TCC_EA0_ATOMIC[3],TCC_ATOMIC[4],TCC_BUBBLE[4],TCC_CYCLE[4],TCC_EA0_ATOMIC[4],TCC_ATOMIC[5],TCC_BUBBLE[5],TCC_CYCLE[5],TCC_EA0_ATOMIC[5],TCC_ATOMIC[6],TCC_BUBBLE[6],TCC_CYCLE[6],TCC_EA0_ATOMIC[6],TCC_ATOMIC[7],TCC_BUBBLE[7],TCC_CYCLE[7],TCC_EA0_ATOMIC[7],TCC_ATOMIC[8],TCC_BUBBLE[8],TCC_CYCLE[8],TCC_EA0_ATOMIC[8],TCC_ATOMIC[9],TCC_BUBBLE[9],TCC_CYCLE[9],TCC_EA0_ATOMIC[9],TCC_ATOMIC[10],TCC_BUBBLE[10],TCC_CYCLE[10],TCC_EA0_ATOMIC[10],TCC_ATOMIC[11],TCC_BUBBLE[11],TCC_CYCLE[11],TCC_EA0_ATOMIC[11],TCC_ATOMIC[12],TCC_BUBBLE[12],TCC_CYCLE[12],TCC_EA0_ATOMIC[12],TCC_ATOMIC[13],TCC_BUBBLE[13],TCC_CYCLE[13],TCC_EA0_ATOMIC[13],TCC_ATOMIC[14],TCC_BUBBLE[14],TCC_CYCLE[14],TCC_EA0_ATOMIC[14],TCC_ATOMIC[15],TCC_BUBBLE[15],TCC_CYCLE[15],TCC_EA0_ATOMIC[15],TCC_ATOMIC[16],TCC_BUBBLE[16],TCC_CYCLE[16],TCC_EA0_ATOMIC[16],TCC_ATOMIC[17],TCC_BUBBLE[17],TCC_CYCLE[17],TCC_EA0_ATOMIC[17],TCC_ATOMIC[18],TCC_BUBBLE[18],TCC_CYCLE[18],TCC_EA0_ATOMIC[18],TCC_ATOMIC[19],TCC_BUBBLE[19],TCC_CYCLE[19],TCC_EA0_ATOMIC[19],TCC_ATOMIC[20],TCC_BUBBLE[20],TCC_CYCLE[20],TCC_EA0_ATOMIC[20],TCC_ATOMIC[21],TCC_BUBBLE[21],TCC_CYCLE[21],TCC_EA0_ATOMIC[21],TCC_ATOMIC[22],TCC_BUBBLE[22],TCC_CYCLE[22],TCC_EA0_ATOMIC[22],TCC_ATOMIC[23],TCC_BUBBLE[23],TCC_CYCLE[23],TCC_EA0_ATOMIC[23],TCC_ATOMIC[24],TCC_BUBBLE[24],TCC_CYCLE[24],TCC_EA0_ATOMIC[24],TCC_ATOMIC[25],TCC_BUBBLE[25],TCC_CYCLE[25],TCC_EA0_ATOMIC[25],TCC_ATOMIC[26],TCC_BUBBLE[26],TCC_CYCLE[26],TCC_EA0_ATOMIC[26],TCC_ATOMIC[27],TCC_BUBBLE[27],TCC_CYCLE[27],TCC_EA0_ATOMIC[27],TCC_ATOMIC[28],TCC_BUBBLE[28],TCC_CYCLE[28],TCC_EA0_ATOMIC[28],TCC_ATOMIC[29],TCC_BUBBLE[29],TCC_CYCLE[29],TCC_EA0_ATOMIC[29],TCC_ATOMIC[30],TCC_BUBBLE[30],TCC_CYCLE[30],TCC_EA0_ATOMIC[30],TCC_ATOMIC[31],TCC_BUBBLE[31],TCC_CYCLE[31],TCC_EA0_ATOMIC[31],TCC_ATOMIC[32],TCC_BUBBLE[32],TCC_CYCLE[32],TCC_EA0_ATOMIC[32],TCC_ATOMIC[33],TCC_BUBBLE[33],TCC_CYCLE[33],TCC_EA0_ATOMIC[33],TCC_ATOMIC[34],TCC_BUBBLE[34],TCC_CYCLE[34],TCC_EA0_ATOMIC[34],TCC_ATOMIC[35],TCC_BUBBLE[35],TCC_CYCLE[35],TCC_EA0_ATOMIC[35],TCC_ATOMIC[36],TCC_BUBBLE[36],TCC_CYCLE[36],TCC_EA0_ATOMIC[36],TCC_ATOMIC[37],TCC_BUBBLE[37],TCC_CYCLE[37],TCC_EA0_ATOMIC[37],TCC_ATOMIC[38],TCC_BUBBLE[38],TCC_CYCLE[38],TCC_EA0_ATOMIC[38],TCC_ATOMIC[39],TCC_BUBBLE[39],TCC_CYCLE[39],TCC_EA0_ATOMIC[39],TCC_ATOMIC[40],TCC_BUBBLE[40],TCC_CYCLE[40],TCC_EA0_ATOMIC[40],TCC_ATOMIC[41],TCC_BUBBLE[41],TCC_CYCLE[41],TCC_EA0_ATOMIC[41],TCC_ATOMIC[42],TCC_BUBBLE[42],TCC_CYCLE[42],TCC_EA0_ATOMIC[42],TCC_ATOMIC[43],TCC_BUBBLE[43],TCC_CYCLE[43],TCC_EA0_ATOMIC[43],TCC_ATOMIC[44],TCC_BUBBLE[44],TCC_CYCLE[44],TCC_EA0_ATOMIC[44],TCC_ATOMIC[45],TCC_BUBBLE[45],TCC_CYCLE[45],TCC_EA0_ATOMIC[45],TCC_ATOMIC[46],TCC_BUBBLE[46],TCC_CYCLE[46],TCC_EA0_ATOMIC[46],TCC_ATOMIC[47],TCC_BUBBLE[47],TCC_CYCLE[47],TCC_EA0_ATOMIC[47],TCC_ATOMIC[48],TCC_BUBBLE[48],TCC_CYCLE[48],TCC_EA0_ATOMIC[48],TCC_ATOMIC[49],TCC_BUBBLE[49],TCC_CYCLE[49],TCC_EA0_ATOMIC[49],TCC_ATOMIC[50],TCC_BUBBLE[50],TCC_CYCLE[50],TCC_EA0_ATOMIC[50],TCC_ATOMIC[51],TCC_BUBBLE[51],TCC_CYCLE[51],TCC_EA0_ATOMIC[51],TCC_ATOMIC[52],TCC_BUBBLE[52],TCC_CYCLE[52],TCC_EA0_ATOMIC[52],TCC_ATOMIC[53],TCC_BUBBLE[53],TCC_CYCLE[53],TCC_EA0_ATOMIC[53],TCC_ATOMIC[54],TCC_BUBBLE[54],TCC_CYCLE[54],TCC_EA0_ATOMIC[54],TCC_ATOMIC[55],TCC_BUBBLE[55],TCC_CYCLE[55],TCC_EA0_ATOMIC[55],TCC_ATOMIC[56],TCC_BUBBLE[56],TCC_CYCLE[56],TCC_EA0_ATOMIC[56],TCC_ATOMIC[57],TCC_BUBBLE[57],TCC_CYCLE[57],TCC_EA0_ATOMIC[57],TCC_ATOMIC[58],TCC_BUBBLE[58],TCC_CYCLE[58],TCC_EA0_ATOMIC[58],TCC_ATOMIC[59],TCC_BUBBLE[59],TCC_CYCLE[59],TCC_EA0_ATOMIC[59],TCC_ATOMIC[60],TCC_BUBBLE[60],TCC_CYCLE[60],TCC_EA0_ATOMIC[60],TCC_ATOMIC[61],TCC_BUBBLE[61],TCC_CYCLE[61],TCC_EA0_ATOMIC[61],TCC_ATOMIC[62],TCC_BUBBLE[62],TCC_CYCLE[62],TCC_EA0_ATOMIC[62],TCC_ATOMIC[63],TCC_BUBBLE[63],TCC_CYCLE[63],TCC_EA0_ATOMIC[63],TCC_ATOMIC[64],TCC_BUBBLE[64],TCC_CYCLE[64],TCC_EA0_ATOMIC[64],TCC_ATOMIC[65],TCC_BUBBLE[65],TCC_CYCLE[65],TCC_EA0_ATOMIC[65],TCC_ATOMIC[66],TCC_BUBBLE[66],TCC_CYCLE[66],TCC_EA0_ATOMIC[66],TCC_ATOMIC[67],TCC_BUBBLE[67],TCC_CYCLE[67],TCC_EA0_ATOMIC[67],TCC_ATOMIC[68],TCC_BUBBLE[68],TCC_CYCLE[68],TCC_EA0_ATOMIC[68],TCC_ATOMIC[69],TCC_BUBBLE[69],TCC_CYCLE[69],TCC_EA0_ATOMIC[69],TCC_ATOMIC[70],TCC_BUBBLE[70],TCC_CYCLE[70],TCC_EA0_ATOMIC[70],TCC_ATOMIC[71],TCC_BUBBLE[71],TCC_CYCLE[71],TCC_EA0_ATOMIC[71],TCC_ATOMIC[72],TCC_BUBBLE[72],TCC_CYCLE[72],TCC_EA0_ATOMIC[72],TCC_ATOMIC[73],TCC_BUBBLE[73],TCC_CYCLE[73],TCC_EA0_ATOMIC[73],TCC_ATOMIC[74],TCC_BUBBLE[74],TCC_CYCLE[74],TCC_EA0_ATOMIC[74],TCC_ATOMIC[75],TCC_BUBBLE[75],TCC_CYCLE[75],TCC_EA0_ATOMIC[75],TCC_ATOMIC[76],TCC_BUBBLE[76],TCC_CYCLE[76],TCC_EA0_ATOMIC[76],TCC_ATOMIC[77],TCC_BUBBLE[77],TCC_CYCLE[77],TCC_EA0_ATOMIC[77],TCC_ATOMIC[78],TCC_BUBBLE[78],TCC_CYCLE[78],TCC_EA0_ATOMIC[78],TCC_ATOMIC[79],TCC_BUBBLE[79],TCC_CYCLE[79],TCC_EA0_ATOMIC[79],TCC_ATOMIC[80],TCC_BUBBLE[80],TCC_CYCLE[80],TCC_EA0_ATOMIC[80],TCC_ATOMIC[81],TCC_BUBBLE[81],TCC_CYCLE[81],TCC_EA0_ATOMIC[81],TCC_ATOMIC[82],TCC_BUBBLE[82],TCC_CYCLE[82],TCC_EA0_ATOMIC[82],TCC_ATOMIC[83],TCC_BUBBLE[83],TCC_CYCLE[83],TCC_EA0_ATOMIC[83],TCC_ATOMIC[84],TCC_BUBBLE[84],TCC_CYCLE[84],TCC_EA0_ATOMIC[84],TCC_ATOMIC[85],TCC_BUBBLE[85],TCC_CYCLE[85],TCC_EA0_ATOMIC[85],TCC_ATOMIC[86],TCC_BUBBLE[86],TCC_CYCLE[86],TCC_EA0_ATOMIC[86],TCC_ATOMIC[87],TCC_BUBBLE[87],TCC_CYCLE[87],TCC_EA0_ATOMIC[87],TCC_ATOMIC[88],TCC_BUBBLE[88],TCC_CYCLE[88],TCC_EA0_ATOMIC[88],TCC_ATOMIC[89],TCC_BUBBLE[89],TCC_CYCLE[89],TCC_EA0_ATOMIC[89],TCC_ATOMIC[90],TCC_BUBBLE[90],TCC_CYCLE[90],TCC_EA0_ATOMIC[90],TCC_ATOMIC[91],TCC_BUBBLE[91],TCC_CYCLE[91],TCC_EA0_ATOMIC[91],TCC_ATOMIC[92],TCC_BUBBLE[92],TCC_CYCLE[92],TCC_EA0_ATOMIC[92],TCC_ATOMIC[93],TCC_BUBBLE[93],TCC_CYCLE[93],TCC_EA0_ATOMIC[93],TCC_ATOMIC[94],TCC_BUBBLE[94],TCC_CYCLE[94],TCC_EA0_ATOMIC[94],TCC_ATOMIC[95],TCC_BUBBLE[95],TCC_CYCLE[95],TCC_EA0_ATOMIC[95],TCC_ATOMIC[96],TCC_BUBBLE[96],TCC_CYCLE[96],TCC_EA0_ATOMIC[96],TCC_ATOMIC[97],TCC_BUBBLE[97],TCC_CYCLE[97],TCC_EA0_ATOMIC[97],TCC_ATOMIC[98],TCC_BUBBLE[98],TCC_CYCLE[98],TCC_EA0_ATOMIC[98],TCC_ATOMIC[99],TCC_BUBBLE[99],TCC_CYCLE[99],TCC_EA0_ATOMIC[99],TCC_ATOMIC[100],TCC_BUBBLE[100],TCC_CYCLE[100],TCC_EA0_ATOMIC[100],TCC_ATOMIC[101],TCC_BUBBLE[101],TCC_CYCLE[101],TCC_EA0_ATOMIC[101],TCC_ATOMIC[102],TCC_BUBBLE[102],TCC_CYCLE[102],TCC_EA0_ATOMIC[102],TCC_ATOMIC[103],TCC_BUBBLE[103],TCC_CYCLE[103],TCC_EA0_ATOMIC[103],TCC_ATOMIC[104],TCC_BUBBLE[104],TCC_CYCLE[104],TCC_EA0_ATOMIC[104],TCC_ATOMIC[105],TCC_BUBBLE[105],TCC_CYCLE[105],TCC_EA0_ATOMIC[105],TCC_ATOMIC[106],TCC_BUBBLE[106],TCC_CYCLE[106],TCC_EA0_ATOMIC[106],TCC_ATOMIC[107],TCC_BUBBLE[107],TCC_CYCLE[107],TCC_EA0_ATOMIC[107],TCC_ATOMIC[108],TCC_BUBBLE[108],TCC_CYCLE[108],TCC_EA0_ATOMIC[108],TCC_ATOMIC[109],TCC_BUBBLE[109],TCC_CYCLE[109],TCC_EA0_ATOMIC[109],TCC_ATOMIC[110],TCC_BUBBLE[110],TCC_CYCLE[110],TCC_EA0_ATOMIC[110],TCC_ATOMIC[111],TCC_BUBBLE[111],TCC_CYCLE[111],TCC_EA0_ATOMIC[111],TCC_ATOMIC[112],TCC_BUBBLE[112],TCC_CYCLE[112],TCC_EA0_ATOMIC[112],TCC_ATOMIC[113],TCC_BUBBLE[113],TCC_CYCLE[113],TCC_EA0_ATOMIC[113],TCC_ATOMIC[114],TCC_BUBBLE[114],TCC_CYCLE[114],TCC_EA0_ATOMIC[114],TCC_ATOMIC[115],TCC_BUBBLE[115],TCC_CYCLE[115],TCC_EA0_ATOMIC[115],TCC_ATOMIC[116],TCC_BUBBLE[116],TCC_CYCLE[116],TCC_EA0_ATOMIC[116],TCC_ATOMIC[117],TCC_BUBBLE[117],TCC_CYCLE[117],TCC_EA0_ATOMIC[117],TCC_ATOMIC[118],TCC_BUBBLE[118],TCC_CYCLE[118],TCC_EA0_ATOMIC[118],TCC_ATOMIC[119],TCC_BUBBLE[119],TCC_CYCLE[119],TCC_EA0_ATOMIC[119],TCC_ATOMIC[120],TCC_BUBBLE[120],TCC_CYCLE[120],TCC_EA0_ATOMIC[120],TCC_ATOMIC[121],TCC_BUBBLE[121],TCC_CYCLE[121],TCC_EA0_ATOMIC[121],TCC_ATOMIC[122],TCC_BUBBLE[122],TCC_CYCLE[122],TCC_EA0_ATOMIC[122],TCC_ATOMIC[123],TCC_BUBBLE[123],TCC_CYCLE[123],TCC_EA0_ATOMIC[123],TCC_ATOMIC[124],TCC_BUBBLE[124],TCC_CYCLE[124],TCC_EA0_ATOMIC[124],TCC_ATOMIC[125],TCC_BUBBLE[125],TCC_CYCLE[125],TCC_EA0_ATOMIC[125],TCC_ATOMIC[126],TCC_BUBBLE[126],TCC_CYCLE[126],TCC_EA0_ATOMIC[126],TCC_ATOMIC[127],TCC_BUBBLE[127],TCC_CYCLE[127],TCC_EA0_ATOMIC[127],Wave_Size_2,Correlation_ID_2,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,TA_FLAT_ATOMIC_WAVEFRONTS_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,TCC_ALL_TC_OP_INV_EVICT_sum,TCC_EA0_ATOMIC_sum,TCC_NORMAL_EVICT_sum,TCC_TOO_MANY_EA_WRREQS_STALL_sum,TCP_TCC_CC_READ_REQ_sum,TCP_TCC_CC_WRITE_REQ_sum,TCP_TCC_UC_ATOMIC_REQ_sum,TCP_TCC_UC_WRITE_REQ_sum,Wave_Size_3,Correlation_ID_3,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,TCC_EA0_ATOMIC_LEVEL_sum,TCC_EA0_RDREQ_LEVEL_sum,TCC_EA0_WRREQ_LEVEL_sum,TCC_EA0_WRREQ_STALL_sum,TCP_TCC_CC_ATOMIC_REQ_sum,TCP_TCC_RW_ATOMIC_REQ_sum,TCP_TCC_RW_READ_REQ_sum,TCP_TCC_RW_WRITE_REQ_sum,Wave_Size_4,Correlation_ID_4,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SPI_RA_REQ_NO_ALLOC,SPI_RA_REQ_NO_ALLOC_CSN,CPC_CPC_STAT_STALL,CPC_UTCL1_STALL_ON_TRANSLATION,CPF_CPF_STAT_IDLE,CPF_CPF_TCIU_IDLE,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,TA_BUFFER_TOTAL_CYCLES_sum,TCC_HIT_sum,TCC_MISS_sum,TCC_REQ_sum,TCC_STREAMING_REQ_sum,TCP_TOTAL_ACCESSES_sum,TCP_TOTAL_READ_sum,TCP_TOTAL_WRITE_sum,TCP_VOLATILE_sum,TD_ATOMIC_WAVEFRONT_sum,TD_STORE_WAVEFRONT_sum,Wave_Size_5,Correlation_ID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SQ_INST_CYCLES_SALU,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,CPC_ME1_DC0_SPI_BUSY,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,TCC_BUBBLE_sum,TCC_EA0_RDREQ_32B_sum,TCC_EA0_RDREQ_sum,TCC_EA0_RD_UNCACHED_32B_sum,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,TCP_TCC_READ_REQ_sum,TCP_TCC_WRITE_REQ_sum,Start_Timestamp,End_Timestamp
+0,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) 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diff --git a/tests/workloads/dispatch_inv/MI300X_A1/sysinfo.csv b/tests/workloads/dispatch_inv/MI300X_A1/sysinfo.csv
new file mode 100644
index 0000000000..62c90e56a2
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300X_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+dispatch_inv,./tests/vcopy -n 1048576 -b 256 -i 3,SQ|LDS|SQC|TA|TD|TCP|TCC|SPI|CPC|CPF,Wed 29 May 2024 11:57:01 AM  (CDT),2,splinter-126-wr-c6,AMD Ryzen 9 7950X 16-Core Processor,"American Megatrends International, LLC.VS2683299N.FD",Ubuntu 22.04.4 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,114656528,,6.2.0-13611,113-MI3SRIOV-001,SPX,NPS1,MI300X_A1,gfx942,32,4096,304,4,32,64,1024,32,2100,1300,2100,1300,128,32,160,4,5324.8,8
diff --git a/tests/workloads/dispatch_inv/MI300X_A1/timestamps.csv b/tests/workloads/dispatch_inv/MI300X_A1/timestamps.csv
new file mode 100644
index 0000000000..e855ce44af
--- /dev/null
+++ b/tests/workloads/dispatch_inv/MI300X_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,60633,1,960575,960575,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716011730095458,716011730117977,0
+2,60633,1,960575,960575,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716011730139495,716011730153215,0
+3,60633,1,960575,960575,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716011730173414,716011730187774,0
diff --git a/tests/workloads/ipblocks_CPC/MI300A_A1/log.txt b/tests/workloads/ipblocks_CPC/MI300A_A1/log.txt
new file mode 100644
index 0000000000..2972db4a0f
--- /dev/null
+++ b/tests/workloads/ipblocks_CPC/MI300A_A1/log.txt
@@ -0,0 +1,67 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/ipblocks_CPC/MI300A_A1
+Target: MI300A_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: None
+Hardware Blocks: ['cpc']
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+[profiling] Current input file: tests/workloads/ipblocks_CPC/MI300A_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+[profiling] Current input file: tests/workloads/ipblocks_CPC/MI300A_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_CPC_TCIU_BUSY
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_CPC_TCIU_IDLE
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+[profiling] Current input file: tests/workloads/ipblocks_CPC/MI300A_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_CPC_STAT_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_UTCL1_STALL_ON_TRANSLATION
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+[profiling] Current input file: tests/workloads/ipblocks_CPC/MI300A_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_CPC_UTCL2IU_BUSY
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_CPC_UTCL2IU_IDLE
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/ipblocks_CPC/MI300A_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_CPC_UTCL2IU_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+[profiling] Current input file: tests/workloads/ipblocks_CPC/MI300A_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_DC0_SPI_BUSY
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+[profiling] Current input file: tests/workloads/ipblocks_CPC/MI300A_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/ipblocks_CPC/MI300A_A1/perfmon/pmc_perf_0.txt b/tests/workloads/ipblocks_CPC/MI300A_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..88a77748fe
--- /dev/null
+++ b/tests/workloads/ipblocks_CPC/MI300A_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_WAVES GRBM_COUNT GRBM_GUI_ACTIVE CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_CPC/MI300A_A1/perfmon/pmc_perf_1.txt b/tests/workloads/ipblocks_CPC/MI300A_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..8dc8d3bfb1
--- /dev/null
+++ b/tests/workloads/ipblocks_CPC/MI300A_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  CPC_CPC_TCIU_BUSY CPC_CPC_TCIU_IDLE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_CPC/MI300A_A1/perfmon/pmc_perf_2.txt b/tests/workloads/ipblocks_CPC/MI300A_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..8192b00754
--- /dev/null
+++ b/tests/workloads/ipblocks_CPC/MI300A_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_CPC/MI300A_A1/perfmon/pmc_perf_3.txt b/tests/workloads/ipblocks_CPC/MI300A_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..15c1f1d090
--- /dev/null
+++ b/tests/workloads/ipblocks_CPC/MI300A_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_CPC/MI300A_A1/perfmon/pmc_perf_4.txt b/tests/workloads/ipblocks_CPC/MI300A_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..9ed05c8b61
--- /dev/null
+++ b/tests/workloads/ipblocks_CPC/MI300A_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_CPC/MI300A_A1/perfmon/pmc_perf_5.txt b/tests/workloads/ipblocks_CPC/MI300A_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..0c50a1f2f4
--- /dev/null
+++ b/tests/workloads/ipblocks_CPC/MI300A_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  CPC_ME1_DC0_SPI_BUSY
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_CPC/MI300A_A1/perfmon/timestamps.txt b/tests/workloads/ipblocks_CPC/MI300A_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..676cca1b80
--- /dev/null
+++ b/tests/workloads/ipblocks_CPC/MI300A_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_CPC/MI300A_A1/pmc_perf.csv b/tests/workloads/ipblocks_CPC/MI300A_A1/pmc_perf.csv
new file mode 100644
index 0000000000..11704247ff
--- /dev/null
+++ b/tests/workloads/ipblocks_CPC/MI300A_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,CPC_CPC_UTCL2IU_STALL,CPC_ME1_BUSY_FOR_PACKET_DECODE,Wave_Size_1,Correlation_ID_1,CPC_CPC_UTCL2IU_BUSY,CPC_CPC_UTCL2IU_IDLE,Wave_Size_2,Correlation_ID_2,CPC_CPC_STAT_STALL,CPC_UTCL1_STALL_ON_TRANSLATION,Wave_Size_3,Correlation_ID_3,CPC_ME1_DC0_SPI_BUSY,Wave_Size_4,Correlation_ID_4,CPC_CPC_TCIU_BUSY,CPC_CPC_TCIU_IDLE,Wave_Size_5,Correlation_ID_5,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_WAVES,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_CPC_STAT_BUSY,CPC_CPC_STAT_IDLE,Start_Timestamp,End_Timestamp
+0,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,0.0,107842.0,64,0,510.0,191739.0,64,0,60910.0,522.0,64,0,53291.0,64,0,1234.0,189048.0,64,0,852624.0,261739.0,16384.0,213156.0,213156.0,213156.0,0.0,73741741031486,73741741039458
+1,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,0.0,102304.0,64,0,6312.0,173520.0,64,0,44619.0,6542.0,64,0,42229.0,64,0,1234.0,175350.0,64,0,758300.0,204398.0,16384.0,189575.0,189575.0,189575.0,0.0,73741741057045,73741741063375
+2,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,0.0,85546.0,64,0,6277.0,162721.0,64,0,37505.0,6062.0,64,0,39727.0,64,0,1234.0,157522.0,64,0,683356.0,197056.0,16384.0,170839.0,170839.0,170839.0,0.0,73741741078197,73741741084367
diff --git a/tests/workloads/ipblocks_CPC/MI300A_A1/sysinfo.csv b/tests/workloads/ipblocks_CPC/MI300A_A1/sysinfo.csv
new file mode 100644
index 0000000000..4a1a8a1b53
--- /dev/null
+++ b/tests/workloads/ipblocks_CPC/MI300A_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+ipblocks_CPC,./tests/vcopy -n 1048576 -b 256 -i 3,cpc,Wed 29 May 2024 01:38:07 PM  (CDT),2,sh5-1w300-rg3-3,AMD Instinct MI300A Accelerator,"American Megatrends International, LLC.RMO1002DS",Ubuntu 22.04.2 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,131174852,,6.1.2-110,N/A,SPX,NPS1,MI300A_A1,gfx942,32,24576,228,4,24,64,1024,32,2100,1300,2100,1300,96,32,120,4,5324.8,6
diff --git a/tests/workloads/ipblocks_CPC/MI300A_A1/timestamps.csv b/tests/workloads/ipblocks_CPC/MI300A_A1/timestamps.csv
new file mode 100644
index 0000000000..93ae52396c
--- /dev/null
+++ b/tests/workloads/ipblocks_CPC/MI300A_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,11995,1,147544,147544,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73741741031486,73741741039458,0
+2,11995,1,147544,147544,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73741741057045,73741741063375,0
+3,11995,1,147544,147544,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73741741078197,73741741084367,0
diff --git a/tests/workloads/ipblocks_CPC/MI300X_A1/log.txt b/tests/workloads/ipblocks_CPC/MI300X_A1/log.txt
new file mode 100644
index 0000000000..ceafeaaf39
--- /dev/null
+++ b/tests/workloads/ipblocks_CPC/MI300X_A1/log.txt
@@ -0,0 +1,60 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/ipblocks_CPC/MI300X_A1
+Target: MI300X_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: None
+Hardware Blocks: ['cpc']
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+[profiling] Current input file: tests/workloads/ipblocks_CPC/MI300X_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_CPC_STAT_BUSY
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_CPC_STAT_IDLE
+[profiling] Current input file: tests/workloads/ipblocks_CPC/MI300X_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_CPC_TCIU_BUSY
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_CPC_TCIU_IDLE
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+[profiling] Current input file: tests/workloads/ipblocks_CPC/MI300X_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_CPC_STAT_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_UTCL1_STALL_ON_TRANSLATION
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+[profiling] Current input file: tests/workloads/ipblocks_CPC/MI300X_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_CPC_UTCL2IU_BUSY
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_CPC_UTCL2IU_IDLE
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/ipblocks_CPC/MI300X_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_CPC_UTCL2IU_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/ipblocks_CPC/MI300X_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_DC0_SPI_BUSY
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+[profiling] Current input file: tests/workloads/ipblocks_CPC/MI300X_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/ipblocks_CPC/MI300X_A1/perfmon/pmc_perf_0.txt b/tests/workloads/ipblocks_CPC/MI300X_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..88a77748fe
--- /dev/null
+++ b/tests/workloads/ipblocks_CPC/MI300X_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_WAVES GRBM_COUNT GRBM_GUI_ACTIVE CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_CPC/MI300X_A1/perfmon/pmc_perf_1.txt b/tests/workloads/ipblocks_CPC/MI300X_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..8dc8d3bfb1
--- /dev/null
+++ b/tests/workloads/ipblocks_CPC/MI300X_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  CPC_CPC_TCIU_BUSY CPC_CPC_TCIU_IDLE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_CPC/MI300X_A1/perfmon/pmc_perf_2.txt b/tests/workloads/ipblocks_CPC/MI300X_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..8192b00754
--- /dev/null
+++ b/tests/workloads/ipblocks_CPC/MI300X_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_CPC/MI300X_A1/perfmon/pmc_perf_3.txt b/tests/workloads/ipblocks_CPC/MI300X_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..15c1f1d090
--- /dev/null
+++ b/tests/workloads/ipblocks_CPC/MI300X_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_CPC/MI300X_A1/perfmon/pmc_perf_4.txt b/tests/workloads/ipblocks_CPC/MI300X_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..9ed05c8b61
--- /dev/null
+++ b/tests/workloads/ipblocks_CPC/MI300X_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_CPC/MI300X_A1/perfmon/pmc_perf_5.txt b/tests/workloads/ipblocks_CPC/MI300X_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..0c50a1f2f4
--- /dev/null
+++ b/tests/workloads/ipblocks_CPC/MI300X_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  CPC_ME1_DC0_SPI_BUSY
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_CPC/MI300X_A1/perfmon/timestamps.txt b/tests/workloads/ipblocks_CPC/MI300X_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..676cca1b80
--- /dev/null
+++ b/tests/workloads/ipblocks_CPC/MI300X_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_CPC/MI300X_A1/pmc_perf.csv b/tests/workloads/ipblocks_CPC/MI300X_A1/pmc_perf.csv
new file mode 100644
index 0000000000..ef96b167f2
--- /dev/null
+++ b/tests/workloads/ipblocks_CPC/MI300X_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,CPC_CPC_STAT_STALL,CPC_UTCL1_STALL_ON_TRANSLATION,Wave_Size_1,Correlation_ID_1,CPC_CPC_UTCL2IU_STALL,CPC_ME1_BUSY_FOR_PACKET_DECODE,Wave_Size_2,Correlation_ID_2,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_WAVES,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_CPC_STAT_BUSY,CPC_CPC_STAT_IDLE,Wave_Size_3,Correlation_ID_3,CPC_CPC_TCIU_BUSY,CPC_CPC_TCIU_IDLE,Wave_Size_4,Correlation_ID_4,CPC_CPC_UTCL2IU_BUSY,CPC_CPC_UTCL2IU_IDLE,Wave_Size_5,Correlation_ID_5,CPC_ME1_DC0_SPI_BUSY,Start_Timestamp,End_Timestamp
+0,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,101738.0,696.0,64,0,0.0,164842.0,64,0,1503456.0,557349.0,16384.0,375864.0,375864.0,375864.0,0.0,64,0,1586.0,369562.0,64,0,680.0,372187.0,64,0,129516.0,716313132765508,716313132781268
+1,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,61540.0,9351.0,64,0,0.0,187067.0,64,0,1354068.0,508235.0,16384.0,338517.0,338517.0,338517.0,0.0,64,0,1586.0,337454.0,64,0,8161.0,369372.0,64,0,115086.0,716313132803946,716313132817626
+2,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,67523.0,9210.0,64,0,0.0,145438.0,64,0,1387956.0,485341.0,16384.0,346989.0,346989.0,346989.0,0.0,64,0,1586.0,283998.0,64,0,8898.0,313225.0,64,0,112815.0,716313132838346,716313132851186
diff --git a/tests/workloads/ipblocks_CPC/MI300X_A1/sysinfo.csv b/tests/workloads/ipblocks_CPC/MI300X_A1/sysinfo.csv
new file mode 100644
index 0000000000..1449d3414b
--- /dev/null
+++ b/tests/workloads/ipblocks_CPC/MI300X_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+ipblocks_CPC,./tests/vcopy -n 1048576 -b 256 -i 3,cpc,Wed 29 May 2024 12:02:18 PM  (CDT),2,splinter-126-wr-c6,AMD Ryzen 9 7950X 16-Core Processor,"American Megatrends International, LLC.VS2683299N.FD",Ubuntu 22.04.4 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,114656528,,6.2.0-13611,113-MI3SRIOV-001,SPX,NPS1,MI300X_A1,gfx942,32,4096,304,4,32,64,1024,32,2100,1300,2100,1300,128,32,160,4,5324.8,8
diff --git a/tests/workloads/ipblocks_CPC/MI300X_A1/timestamps.csv b/tests/workloads/ipblocks_CPC/MI300X_A1/timestamps.csv
new file mode 100644
index 0000000000..59ce026fea
--- /dev/null
+++ b/tests/workloads/ipblocks_CPC/MI300X_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,60633,1,966068,966068,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716313132765508,716313132781268,0
+2,60633,1,966068,966068,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716313132803946,716313132817626,0
+3,60633,1,966068,966068,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716313132838346,716313132851186,0
diff --git a/tests/workloads/ipblocks_CPF/MI300A_A1/log.txt b/tests/workloads/ipblocks_CPF/MI300A_A1/log.txt
new file mode 100644
index 0000000000..53100f85b8
--- /dev/null
+++ b/tests/workloads/ipblocks_CPF/MI300A_A1/log.txt
@@ -0,0 +1,68 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/ipblocks_CPF/MI300A_A1
+Target: MI300A_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: None
+Hardware Blocks: ['cpf']
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+[profiling] Current input file: tests/workloads/ipblocks_CPF/MI300A_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+[profiling] Current input file: tests/workloads/ipblocks_CPF/MI300A_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - CPF_CPF_TCIU_BUSY
+   |-> [/opt/rocm/bin/rocprofv2] - CPF_CPF_TCIU_STALL
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying the output vector from the GPU to the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Releasing GPU memory
+   |-> [/opt/rocm/bin/rocprofv2] Releasing CPU memory
+   |-> [/opt/rocm/bin/rocprofv2] Results File: "tests/workloads/ipblocks_CPF/MI300A_A1/out/pmc_1/results_pmc_perf_1.csv"
+   |-> [/opt/rocm/bin/rocprofv2] 
+   |-> [/opt/rocm/bin/rocprofv2] The output path for the following counters: tests/workloads/ipblocks_CPF/MI300A_A1/out/pmc_1
+[profiling] Current input file: tests/workloads/ipblocks_CPF/MI300A_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - CPF_CPF_STAT_IDLE
+   |-> [/opt/rocm/bin/rocprofv2] - CPF_CPF_TCIU_IDLE
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+[profiling] Current input file: tests/workloads/ipblocks_CPF/MI300A_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - CPF_CMP_UTCL1_STALL_ON_TRANSLATION
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+[profiling] Current input file: tests/workloads/ipblocks_CPF/MI300A_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/ipblocks_CPF/MI300A_A1/perfmon/pmc_perf_0.txt b/tests/workloads/ipblocks_CPF/MI300A_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..a0c27ffe5c
--- /dev/null
+++ b/tests/workloads/ipblocks_CPF/MI300A_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_WAVES GRBM_COUNT GRBM_GUI_ACTIVE CPF_CPF_STAT_BUSY CPF_CPF_STAT_STALL
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_CPF/MI300A_A1/perfmon/pmc_perf_1.txt b/tests/workloads/ipblocks_CPF/MI300A_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..1b469a07ef
--- /dev/null
+++ b/tests/workloads/ipblocks_CPF/MI300A_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  CPF_CPF_TCIU_BUSY CPF_CPF_TCIU_STALL
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_CPF/MI300A_A1/perfmon/pmc_perf_2.txt b/tests/workloads/ipblocks_CPF/MI300A_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..4b8f76a224
--- /dev/null
+++ b/tests/workloads/ipblocks_CPF/MI300A_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  CPF_CPF_STAT_IDLE CPF_CPF_TCIU_IDLE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_CPF/MI300A_A1/perfmon/pmc_perf_3.txt b/tests/workloads/ipblocks_CPF/MI300A_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..2b6588a9bb
--- /dev/null
+++ b/tests/workloads/ipblocks_CPF/MI300A_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  CPF_CMP_UTCL1_STALL_ON_TRANSLATION
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_CPF/MI300A_A1/perfmon/timestamps.txt b/tests/workloads/ipblocks_CPF/MI300A_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..676cca1b80
--- /dev/null
+++ b/tests/workloads/ipblocks_CPF/MI300A_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_CPF/MI300A_A1/pmc_perf.csv b/tests/workloads/ipblocks_CPF/MI300A_A1/pmc_perf.csv
new file mode 100644
index 0000000000..74c52df99b
--- /dev/null
+++ b/tests/workloads/ipblocks_CPF/MI300A_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,CPF_CMP_UTCL1_STALL_ON_TRANSLATION,Wave_Size_1,Correlation_ID_1,CPF_CPF_STAT_IDLE,CPF_CPF_TCIU_IDLE,Wave_Size_2,Correlation_ID_2,CPF_CPF_TCIU_BUSY,CPF_CPF_TCIU_STALL,Wave_Size_3,Correlation_ID_3,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_WAVES,GRBM_COUNT,GRBM_GUI_ACTIVE,CPF_CPF_STAT_BUSY,CPF_CPF_STAT_STALL,Start_Timestamp,End_Timestamp
+0,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,78.0,64,0,0.0,224514.0,64,0,7278.0,0.0,64,0,836064.0,261654.0,16384.0,209016.0,209016.0,209016.0,78.0,73731283666697,73731283674509
+1,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,910.0,64,0,0.0,169976.0,64,0,8656.0,0.0,64,0,730504.0,201578.0,16384.0,182626.0,182626.0,182626.0,898.0,73731283691695,73731283697824
+2,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,0.0,64,0,0.0,152913.0,64,0,10327.0,0.0,64,0,682224.0,193388.0,16384.0,170556.0,170556.0,170556.0,0.0,73731283713167,73731283719337
diff --git a/tests/workloads/ipblocks_CPF/MI300A_A1/sysinfo.csv b/tests/workloads/ipblocks_CPF/MI300A_A1/sysinfo.csv
new file mode 100644
index 0000000000..dd765013da
--- /dev/null
+++ b/tests/workloads/ipblocks_CPF/MI300A_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+ipblocks_CPF,./tests/vcopy -n 1048576 -b 256 -i 3,cpf,Wed 29 May 2024 01:37:59 PM  (CDT),2,sh5-1w300-rg3-3,AMD Instinct MI300A Accelerator,"American Megatrends International, LLC.RMO1002DS",Ubuntu 22.04.2 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,131174852,,6.1.2-110,N/A,SPX,NPS1,MI300A_A1,gfx942,32,24576,228,4,24,64,1024,32,2100,1300,2100,1300,96,32,120,4,5324.8,6
diff --git a/tests/workloads/ipblocks_CPF/MI300A_A1/timestamps.csv b/tests/workloads/ipblocks_CPF/MI300A_A1/timestamps.csv
new file mode 100644
index 0000000000..223091785e
--- /dev/null
+++ b/tests/workloads/ipblocks_CPF/MI300A_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,11995,1,147390,147390,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73731283666697,73731283674509,0
+2,11995,1,147390,147390,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73731283691695,73731283697824,0
+3,11995,1,147390,147390,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73731283713167,73731283719337,0
diff --git a/tests/workloads/ipblocks_CPF/MI300X_A1/log.txt b/tests/workloads/ipblocks_CPF/MI300X_A1/log.txt
new file mode 100644
index 0000000000..77ea69322b
--- /dev/null
+++ b/tests/workloads/ipblocks_CPF/MI300X_A1/log.txt
@@ -0,0 +1,54 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/ipblocks_CPF/MI300X_A1
+Target: MI300X_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: None
+Hardware Blocks: ['cpf']
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+[profiling] Current input file: tests/workloads/ipblocks_CPF/MI300X_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPF_CPF_STAT_BUSY
+   |-> [/opt/rocm/bin/rocprofv2] - CPF_CPF_STAT_STALL
+[profiling] Current input file: tests/workloads/ipblocks_CPF/MI300X_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - CPF_CPF_TCIU_BUSY
+   |-> [/opt/rocm/bin/rocprofv2] - CPF_CPF_TCIU_STALL
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+[profiling] Current input file: tests/workloads/ipblocks_CPF/MI300X_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - CPF_CPF_STAT_IDLE
+   |-> [/opt/rocm/bin/rocprofv2] - CPF_CPF_TCIU_IDLE
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+[profiling] Current input file: tests/workloads/ipblocks_CPF/MI300X_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - CPF_CMP_UTCL1_STALL_ON_TRANSLATION
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+[profiling] Current input file: tests/workloads/ipblocks_CPF/MI300X_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/ipblocks_CPF/MI300X_A1/perfmon/pmc_perf_0.txt b/tests/workloads/ipblocks_CPF/MI300X_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..a0c27ffe5c
--- /dev/null
+++ b/tests/workloads/ipblocks_CPF/MI300X_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_WAVES GRBM_COUNT GRBM_GUI_ACTIVE CPF_CPF_STAT_BUSY CPF_CPF_STAT_STALL
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_CPF/MI300X_A1/perfmon/pmc_perf_1.txt b/tests/workloads/ipblocks_CPF/MI300X_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..1b469a07ef
--- /dev/null
+++ b/tests/workloads/ipblocks_CPF/MI300X_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  CPF_CPF_TCIU_BUSY CPF_CPF_TCIU_STALL
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_CPF/MI300X_A1/perfmon/pmc_perf_2.txt b/tests/workloads/ipblocks_CPF/MI300X_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..4b8f76a224
--- /dev/null
+++ b/tests/workloads/ipblocks_CPF/MI300X_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  CPF_CPF_STAT_IDLE CPF_CPF_TCIU_IDLE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_CPF/MI300X_A1/perfmon/pmc_perf_3.txt b/tests/workloads/ipblocks_CPF/MI300X_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..2b6588a9bb
--- /dev/null
+++ b/tests/workloads/ipblocks_CPF/MI300X_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  CPF_CMP_UTCL1_STALL_ON_TRANSLATION
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_CPF/MI300X_A1/perfmon/timestamps.txt b/tests/workloads/ipblocks_CPF/MI300X_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..676cca1b80
--- /dev/null
+++ b/tests/workloads/ipblocks_CPF/MI300X_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_CPF/MI300X_A1/pmc_perf.csv b/tests/workloads/ipblocks_CPF/MI300X_A1/pmc_perf.csv
new file mode 100644
index 0000000000..e22036ded4
--- /dev/null
+++ b/tests/workloads/ipblocks_CPF/MI300X_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,CPF_CPF_STAT_IDLE,CPF_CPF_TCIU_IDLE,Wave_Size_1,Correlation_ID_1,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_WAVES,GRBM_COUNT,GRBM_GUI_ACTIVE,CPF_CPF_STAT_BUSY,CPF_CPF_STAT_STALL,Wave_Size_2,Correlation_ID_2,CPF_CPF_TCIU_BUSY,CPF_CPF_TCIU_STALL,Wave_Size_3,Correlation_ID_3,CPF_CMP_UTCL1_STALL_ON_TRANSLATION,Start_Timestamp,End_Timestamp
+0,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,0.0,345171.0,64,0,1789656.0,603841.0,16384.0,447414.0,447414.0,447414.0,78.0,64,0,27458.0,0.0,64,0,78.0,716306206848753,716306206863873
+1,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,0.0,314246.0,64,0,1392904.0,524339.0,16384.0,348226.0,348226.0,348226.0,1071.0,64,0,28687.0,0.0,64,0,1043.0,716306206884711,716306206897111
+2,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,0.0,247249.0,64,0,1445772.0,506532.0,16384.0,361443.0,361443.0,361443.0,0.0,64,0,29906.0,0.0,64,0,0.0,716306206916830,716306206929150
diff --git a/tests/workloads/ipblocks_CPF/MI300X_A1/sysinfo.csv b/tests/workloads/ipblocks_CPF/MI300X_A1/sysinfo.csv
new file mode 100644
index 0000000000..0082d377bc
--- /dev/null
+++ b/tests/workloads/ipblocks_CPF/MI300X_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+ipblocks_CPF,./tests/vcopy -n 1048576 -b 256 -i 3,cpf,Wed 29 May 2024 12:02:13 PM  (CDT),2,splinter-126-wr-c6,AMD Ryzen 9 7950X 16-Core Processor,"American Megatrends International, LLC.VS2683299N.FD",Ubuntu 22.04.4 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,114656528,,6.2.0-13611,113-MI3SRIOV-001,SPX,NPS1,MI300X_A1,gfx942,32,4096,304,4,32,64,1024,32,2100,1300,2100,1300,128,32,160,4,5324.8,8
diff --git a/tests/workloads/ipblocks_CPF/MI300X_A1/timestamps.csv b/tests/workloads/ipblocks_CPF/MI300X_A1/timestamps.csv
new file mode 100644
index 0000000000..bd879514e1
--- /dev/null
+++ b/tests/workloads/ipblocks_CPF/MI300X_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,60633,1,965930,965930,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716306206848753,716306206863873,0
+2,60633,1,965930,965930,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716306206884711,716306206897111,0
+3,60633,1,965930,965930,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716306206916830,716306206929150,0
diff --git a/tests/workloads/ipblocks_SPI/MI300A_A1/log.txt b/tests/workloads/ipblocks_SPI/MI300A_A1/log.txt
new file mode 100644
index 0000000000..6ca78b69f0
--- /dev/null
+++ b/tests/workloads/ipblocks_SPI/MI300A_A1/log.txt
@@ -0,0 +1,105 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/ipblocks_SPI/MI300A_A1
+Target: MI300A_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: None
+Hardware Blocks: ['spi']
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+[profiling] Current input file: tests/workloads/ipblocks_SPI/MI300A_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+[profiling] Current input file: tests/workloads/ipblocks_SPI/MI300A_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_SPI_BUSY
+   |-> [/opt/rocm/bin/rocprofv2] - SPI_CSN_NUM_THREADGROUPS
+[profiling] Current input file: tests/workloads/ipblocks_SPI/MI300A_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SPI_RA_REQ_NO_ALLOC
+   |-> [/opt/rocm/bin/rocprofv2] - SPI_RA_REQ_NO_ALLOC_CSN
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying the output vector from the GPU to the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Releasing GPU memory
+   |-> [/opt/rocm/bin/rocprofv2] Releasing CPU memory
+   |-> [/opt/rocm/bin/rocprofv2] Results File: "tests/workloads/ipblocks_SPI/MI300A_A1/out/pmc_1/results_pmc_perf_2.csv"
+   |-> [/opt/rocm/bin/rocprofv2] 
+   |-> [/opt/rocm/bin/rocprofv2] The output path for the following counters: tests/workloads/ipblocks_SPI/MI300A_A1/out/pmc_1
+[profiling] Current input file: tests/workloads/ipblocks_SPI/MI300A_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SPI_RA_RES_STALL_CSN
+   |-> [/opt/rocm/bin/rocprofv2] - SPI_RA_TMP_STALL_CSN
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+[profiling] Current input file: tests/workloads/ipblocks_SPI/MI300A_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SPI_RA_WAVE_SIMD_FULL_CSN
+   |-> [/opt/rocm/bin/rocprofv2] - SPI_RA_VGPR_SIMD_FULL_CSN
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/ipblocks_SPI/MI300A_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SPI_RA_SGPR_SIMD_FULL_CSN
+   |-> [/opt/rocm/bin/rocprofv2] - SPI_RA_LDS_CU_FULL_CSN
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+[profiling] Current input file: tests/workloads/ipblocks_SPI/MI300A_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SPI_RA_BAR_CU_FULL_CSN
+   |-> [/opt/rocm/bin/rocprofv2] - SPI_RA_TGLIM_CU_FULL_CSN
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+[profiling] Current input file: tests/workloads/ipblocks_SPI/MI300A_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SPI_RA_WVLIM_STALL_CSN
+   |-> [/opt/rocm/bin/rocprofv2] - SPI_SWC_CSC_WR
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+[profiling] Current input file: tests/workloads/ipblocks_SPI/MI300A_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SPI_VWC_CSC_WR
+   |-> [/opt/rocm/bin/rocprofv2] - SPI_RA_BULKY_CU_FULL_CSN
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+[profiling] Current input file: tests/workloads/ipblocks_SPI/MI300A_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/ipblocks_SPI/MI300A_A1/perfmon/pmc_perf_0.txt b/tests/workloads/ipblocks_SPI/MI300A_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..cef0ece5fa
--- /dev/null
+++ b/tests/workloads/ipblocks_SPI/MI300A_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_WAVES GRBM_COUNT GRBM_GUI_ACTIVE SPI_CSN_WINDOW_VALID SPI_CSN_BUSY
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SPI/MI300A_A1/perfmon/pmc_perf_1.txt b/tests/workloads/ipblocks_SPI/MI300A_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..7bc758b39a
--- /dev/null
+++ b/tests/workloads/ipblocks_SPI/MI300A_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  GRBM_SPI_BUSY SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SPI/MI300A_A1/perfmon/pmc_perf_2.txt b/tests/workloads/ipblocks_SPI/MI300A_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..731670f3c3
--- /dev/null
+++ b/tests/workloads/ipblocks_SPI/MI300A_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SPI/MI300A_A1/perfmon/pmc_perf_3.txt b/tests/workloads/ipblocks_SPI/MI300A_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..1619932f59
--- /dev/null
+++ b/tests/workloads/ipblocks_SPI/MI300A_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SPI/MI300A_A1/perfmon/pmc_perf_4.txt b/tests/workloads/ipblocks_SPI/MI300A_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..6c6eb69559
--- /dev/null
+++ b/tests/workloads/ipblocks_SPI/MI300A_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SPI/MI300A_A1/perfmon/pmc_perf_5.txt b/tests/workloads/ipblocks_SPI/MI300A_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..d3a4bf5d24
--- /dev/null
+++ b/tests/workloads/ipblocks_SPI/MI300A_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SPI/MI300A_A1/perfmon/pmc_perf_6.txt b/tests/workloads/ipblocks_SPI/MI300A_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..e08c6c9abd
--- /dev/null
+++ b/tests/workloads/ipblocks_SPI/MI300A_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SPI/MI300A_A1/perfmon/pmc_perf_7.txt b/tests/workloads/ipblocks_SPI/MI300A_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..3c0c370859
--- /dev/null
+++ b/tests/workloads/ipblocks_SPI/MI300A_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SPI/MI300A_A1/perfmon/pmc_perf_8.txt b/tests/workloads/ipblocks_SPI/MI300A_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..948b95e01b
--- /dev/null
+++ b/tests/workloads/ipblocks_SPI/MI300A_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SPI_VWC_CSC_WR SPI_RA_BULKY_CU_FULL_CSN
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SPI/MI300A_A1/perfmon/timestamps.txt b/tests/workloads/ipblocks_SPI/MI300A_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..676cca1b80
--- /dev/null
+++ b/tests/workloads/ipblocks_SPI/MI300A_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SPI/MI300A_A1/pmc_perf.csv b/tests/workloads/ipblocks_SPI/MI300A_A1/pmc_perf.csv
new file mode 100644
index 0000000000..75bbeed484
--- /dev/null
+++ b/tests/workloads/ipblocks_SPI/MI300A_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SPI_RA_WAVE_SIMD_FULL_CSN,SPI_RA_VGPR_SIMD_FULL_CSN,Wave_Size_1,Correlation_ID_1,SPI_RA_BAR_CU_FULL_CSN,SPI_RA_TGLIM_CU_FULL_CSN,Wave_Size_2,Correlation_ID_2,SPI_RA_RES_STALL_CSN,SPI_RA_TMP_STALL_CSN,Wave_Size_3,Correlation_ID_3,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,Wave_Size_4,Correlation_ID_4,SPI_RA_REQ_NO_ALLOC,SPI_RA_REQ_NO_ALLOC_CSN,Wave_Size_5,Correlation_ID_5,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,Wave_Size_6,Correlation_ID_6,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,Wave_Size_7,Correlation_ID_7,GRBM_SPI_BUSY,SPI_CSN_NUM_THREADGROUPS,SPI_CSN_WAVE,Wave_Size_8,Correlation_ID_8,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_WAVES,GRBM_COUNT,GRBM_GUI_ACTIVE,SPI_CSN_WINDOW_VALID,SPI_CSN_BUSY,Start_Timestamp,End_Timestamp
+0,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,402545.0,0.0,64,0,0.0,0.0,64,0,12133.0,0.0,64,0,0.0,32768.0,64,0,16523.0,19837.0,64,0,16384.0,0.0,64,0,0.0,0.0,64,0,75254.0,4096.0,16384.0,64,0,798500.0,247273.0,16384.0,199625.0,199625.0,793454.0,277144.0,74011718238011,74011718245943
+1,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,265297.0,0.0,64,0,0.0,0.0,64,0,7778.0,0.0,64,0,0.0,32768.0,64,0,9506.0,18066.0,64,0,16384.0,0.0,64,0,0.0,0.0,64,0,61704.0,4096.0,16384.0,64,0,722728.0,202932.0,16384.0,180682.0,180682.0,722728.0,237872.0,74011718283760,74011718289849
+2,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,225961.0,0.0,64,0,0.0,0.0,64,0,6145.0,0.0,64,0,0.0,32768.0,64,0,8485.0,18175.0,64,0,16384.0,0.0,64,0,0.0,0.0,64,0,59617.0,4096.0,16384.0,64,0,701016.0,195549.0,16384.0,175254.0,175254.0,701016.0,230496.0,74011718262608,74011718268697
diff --git a/tests/workloads/ipblocks_SPI/MI300A_A1/sysinfo.csv b/tests/workloads/ipblocks_SPI/MI300A_A1/sysinfo.csv
new file mode 100644
index 0000000000..8dffd88a9c
--- /dev/null
+++ b/tests/workloads/ipblocks_SPI/MI300A_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+ipblocks_SPI,./tests/vcopy -n 1048576 -b 256 -i 3,spi,Wed 29 May 2024 01:42:33 PM  (CDT),2,sh5-1w300-rg3-3,AMD Instinct MI300A Accelerator,"American Megatrends International, LLC.RMO1002DS",Ubuntu 22.04.2 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,131174852,,6.1.2-110,N/A,SPX,NPS1,MI300A_A1,gfx942,32,24576,228,4,24,64,1024,32,2100,1300,2100,1300,96,32,120,4,5324.8,6
diff --git a/tests/workloads/ipblocks_SPI/MI300A_A1/timestamps.csv b/tests/workloads/ipblocks_SPI/MI300A_A1/timestamps.csv
new file mode 100644
index 0000000000..6cd39cc33b
--- /dev/null
+++ b/tests/workloads/ipblocks_SPI/MI300A_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,11995,1,151180,151180,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",74011718238011,74011718245943,0
+3,11995,1,151180,151180,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",74011718283760,74011718289849,0
+2,11995,1,151180,151180,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",74011718262608,74011718268697,0
diff --git a/tests/workloads/ipblocks_SPI/MI300X_A1/log.txt b/tests/workloads/ipblocks_SPI/MI300X_A1/log.txt
new file mode 100644
index 0000000000..3b04cf589d
--- /dev/null
+++ b/tests/workloads/ipblocks_SPI/MI300X_A1/log.txt
@@ -0,0 +1,85 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/ipblocks_SPI/MI300X_A1
+Target: MI300X_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: None
+Hardware Blocks: ['spi']
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+[profiling] Current input file: tests/workloads/ipblocks_SPI/MI300X_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SPI_CSN_WINDOW_VALID
+   |-> [/opt/rocm/bin/rocprofv2] - SPI_CSN_BUSY
+[profiling] Current input file: tests/workloads/ipblocks_SPI/MI300X_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_SPI_BUSY
+   |-> [/opt/rocm/bin/rocprofv2] - SPI_CSN_NUM_THREADGROUPS
+   |-> [/opt/rocm/bin/rocprofv2] - SPI_CSN_WAVE
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+[profiling] Current input file: tests/workloads/ipblocks_SPI/MI300X_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SPI_RA_REQ_NO_ALLOC
+   |-> [/opt/rocm/bin/rocprofv2] - SPI_RA_REQ_NO_ALLOC_CSN
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+[profiling] Current input file: tests/workloads/ipblocks_SPI/MI300X_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SPI_RA_RES_STALL_CSN
+   |-> [/opt/rocm/bin/rocprofv2] - SPI_RA_TMP_STALL_CSN
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+[profiling] Current input file: tests/workloads/ipblocks_SPI/MI300X_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SPI_RA_WAVE_SIMD_FULL_CSN
+   |-> [/opt/rocm/bin/rocprofv2] - SPI_RA_VGPR_SIMD_FULL_CSN
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+[profiling] Current input file: tests/workloads/ipblocks_SPI/MI300X_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SPI_RA_SGPR_SIMD_FULL_CSN
+   |-> [/opt/rocm/bin/rocprofv2] - SPI_RA_LDS_CU_FULL_CSN
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/ipblocks_SPI/MI300X_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SPI_RA_BAR_CU_FULL_CSN
+   |-> [/opt/rocm/bin/rocprofv2] - SPI_RA_TGLIM_CU_FULL_CSN
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+[profiling] Current input file: tests/workloads/ipblocks_SPI/MI300X_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SPI_RA_WVLIM_STALL_CSN
+   |-> [/opt/rocm/bin/rocprofv2] - SPI_SWC_CSC_WR
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/ipblocks_SPI/MI300X_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SPI_VWC_CSC_WR
+   |-> [/opt/rocm/bin/rocprofv2] - SPI_RA_BULKY_CU_FULL_CSN
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+[profiling] Current input file: tests/workloads/ipblocks_SPI/MI300X_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/ipblocks_SPI/MI300X_A1/perfmon/pmc_perf_0.txt b/tests/workloads/ipblocks_SPI/MI300X_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..cef0ece5fa
--- /dev/null
+++ b/tests/workloads/ipblocks_SPI/MI300X_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_WAVES GRBM_COUNT GRBM_GUI_ACTIVE SPI_CSN_WINDOW_VALID SPI_CSN_BUSY
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SPI/MI300X_A1/perfmon/pmc_perf_1.txt b/tests/workloads/ipblocks_SPI/MI300X_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..7bc758b39a
--- /dev/null
+++ b/tests/workloads/ipblocks_SPI/MI300X_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  GRBM_SPI_BUSY SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SPI/MI300X_A1/perfmon/pmc_perf_2.txt b/tests/workloads/ipblocks_SPI/MI300X_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..731670f3c3
--- /dev/null
+++ b/tests/workloads/ipblocks_SPI/MI300X_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SPI/MI300X_A1/perfmon/pmc_perf_3.txt b/tests/workloads/ipblocks_SPI/MI300X_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..1619932f59
--- /dev/null
+++ b/tests/workloads/ipblocks_SPI/MI300X_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SPI/MI300X_A1/perfmon/pmc_perf_4.txt b/tests/workloads/ipblocks_SPI/MI300X_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..6c6eb69559
--- /dev/null
+++ b/tests/workloads/ipblocks_SPI/MI300X_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SPI/MI300X_A1/perfmon/pmc_perf_5.txt b/tests/workloads/ipblocks_SPI/MI300X_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..d3a4bf5d24
--- /dev/null
+++ b/tests/workloads/ipblocks_SPI/MI300X_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SPI/MI300X_A1/perfmon/pmc_perf_6.txt b/tests/workloads/ipblocks_SPI/MI300X_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..e08c6c9abd
--- /dev/null
+++ b/tests/workloads/ipblocks_SPI/MI300X_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SPI/MI300X_A1/perfmon/pmc_perf_7.txt b/tests/workloads/ipblocks_SPI/MI300X_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..3c0c370859
--- /dev/null
+++ b/tests/workloads/ipblocks_SPI/MI300X_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SPI/MI300X_A1/perfmon/pmc_perf_8.txt b/tests/workloads/ipblocks_SPI/MI300X_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..948b95e01b
--- /dev/null
+++ b/tests/workloads/ipblocks_SPI/MI300X_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SPI_VWC_CSC_WR SPI_RA_BULKY_CU_FULL_CSN
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SPI/MI300X_A1/perfmon/timestamps.txt b/tests/workloads/ipblocks_SPI/MI300X_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..676cca1b80
--- /dev/null
+++ b/tests/workloads/ipblocks_SPI/MI300X_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SPI/MI300X_A1/pmc_perf.csv b/tests/workloads/ipblocks_SPI/MI300X_A1/pmc_perf.csv
new file mode 100644
index 0000000000..0b176de0ac
--- /dev/null
+++ b/tests/workloads/ipblocks_SPI/MI300X_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,Wave_Size_1,Correlation_ID_1,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,Wave_Size_2,Correlation_ID_2,SPI_RA_REQ_NO_ALLOC,SPI_RA_REQ_NO_ALLOC_CSN,Wave_Size_3,Correlation_ID_3,SPI_RA_WAVE_SIMD_FULL_CSN,SPI_RA_VGPR_SIMD_FULL_CSN,Wave_Size_4,Correlation_ID_4,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_WAVES,GRBM_COUNT,GRBM_GUI_ACTIVE,SPI_CSN_WINDOW_VALID,SPI_CSN_BUSY,Wave_Size_5,Correlation_ID_5,SPI_RA_BAR_CU_FULL_CSN,SPI_RA_TGLIM_CU_FULL_CSN,Wave_Size_6,Correlation_ID_6,GRBM_SPI_BUSY,SPI_CSN_NUM_THREADGROUPS,SPI_CSN_WAVE,Wave_Size_7,Correlation_ID_7,SPI_RA_RES_STALL_CSN,SPI_RA_TMP_STALL_CSN,Wave_Size_8,Correlation_ID_8,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,Start_Timestamp,End_Timestamp
+0,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,0.0,32768.0,64,0,16384.0,0.0,64,0,49647.0,24227.0,64,0,1314731.0,0.0,64,0,1886116.0,641466.0,16384.0,471529.0,471529.0,1879388.0,681314.0,64,0,0.0,0.0,64,0,180522.0,4096.0,16384.0,64,0,39558.0,0.0,64,0,0.0,0.0,716512935719977,716512935735936
+1,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,0.0,32768.0,64,0,16384.0,0.0,64,0,49418.0,29030.0,64,0,1092539.0,0.0,64,0,1787556.0,553535.0,16384.0,446889.0,446889.0,1787556.0,600096.0,64,0,0.0,0.0,64,0,153237.0,4096.0,16384.0,64,0,34801.0,0.0,64,0,0.0,0.0,716512935758096,716512935772294
+2,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,0.0,32768.0,64,0,16384.0,0.0,64,0,47413.0,30311.0,64,0,1119170.0,0.0,64,0,1535920.0,558840.0,16384.0,383980.0,383980.0,1535920.0,605416.0,64,0,0.0,0.0,64,0,146755.0,4096.0,16384.0,64,0,33150.0,0.0,64,0,0.0,0.0,716512935792093,716512935804813
diff --git a/tests/workloads/ipblocks_SPI/MI300X_A1/sysinfo.csv b/tests/workloads/ipblocks_SPI/MI300X_A1/sysinfo.csv
new file mode 100644
index 0000000000..163e311c46
--- /dev/null
+++ b/tests/workloads/ipblocks_SPI/MI300X_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+ipblocks_SPI,./tests/vcopy -n 1048576 -b 256 -i 3,spi,Wed 29 May 2024 12:05:35 PM  (CDT),2,splinter-126-wr-c6,AMD Ryzen 9 7950X 16-Core Processor,"American Megatrends International, LLC.VS2683299N.FD",Ubuntu 22.04.4 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,114656528,,6.2.0-13611,113-MI3SRIOV-001,SPX,NPS1,MI300X_A1,gfx942,32,4096,304,4,32,64,1024,32,2100,1300,2100,1300,128,32,160,4,5324.8,8
diff --git a/tests/workloads/ipblocks_SPI/MI300X_A1/timestamps.csv b/tests/workloads/ipblocks_SPI/MI300X_A1/timestamps.csv
new file mode 100644
index 0000000000..0203a0fae8
--- /dev/null
+++ b/tests/workloads/ipblocks_SPI/MI300X_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,60633,1,969683,969683,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716512935719977,716512935735936,0
+2,60633,1,969683,969683,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716512935758096,716512935772294,0
+3,60633,1,969683,969683,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716512935792093,716512935804813,0
diff --git a/tests/workloads/ipblocks_SQ/MI300A_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/ipblocks_SQ/MI300A_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..38f948b325
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300A_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,11995,1,148803,148803,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73872514256816,73872514264588,0,212629.0,212629.0,16384.0,65536.0,20360.0,1623424.0
+1,11995,1,148803,148803,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73872514281133,73872514286982,0,184846.0,184846.0,16384.0,65536.0,13013.0,1048800.0
+2,11995,1,148803,148803,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73872514302045,73872514307814,0,178618.0,178618.0,16384.0,65536.0,13188.0,1049176.0
diff --git a/tests/workloads/ipblocks_SQ/MI300A_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/ipblocks_SQ/MI300A_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..17fccb5170
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300A_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,11995,1,148814,148814,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73872514256816,73872514264588,0,0.0,0.0,0.0
+1,11995,1,148814,148814,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73872514281133,73872514286982,0,0.0,0.0,0.0
+2,11995,1,148814,148814,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73872514302045,73872514307814,0,0.0,0.0,0.0
diff --git a/tests/workloads/ipblocks_SQ/MI300A_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/ipblocks_SQ/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..20992f6b07
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,148825,148825,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73872514256816,73872514264588,0,65536.0,375624.0,29992264.0
+1,11995,1,148825,148825,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73872514281133,73872514286982,0,65536.0,275840.0,22023168.0
+2,11995,1,148825,148825,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73872514302045,73872514307814,0,65536.0,179632.0,14331952.0
diff --git a/tests/workloads/ipblocks_SQ/MI300A_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/ipblocks_SQ/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..c1116304aa
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,148836,148836,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73872514256816,73872514264588,0,32768.0,531950.0,42560568.0
+1,11995,1,148836,148836,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73872514281133,73872514286982,0,32768.0,428613.0,34273880.0
+2,11995,1,148836,148836,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73872514302045,73872514307814,0,32768.0,431278.0,34503608.0
diff --git a/tests/workloads/ipblocks_SQ/MI300A_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/ipblocks_SQ/MI300A_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..6d6e737bcd
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300A_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,11995,1,148847,148847,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73872514256816,73872514264588,0,227982.0,227982.0,133714.0,911928.0,16384.0,13877957.0,261373.0,0.0,55939764.0
+1,11995,1,148847,148847,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73872514281133,73872514286982,0,199759.0,199759.0,116253.0,799036.0,16384.0,10688970.0,200764.0,0.0,43183500.0
+2,11995,1,148847,148847,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73872514302045,73872514307814,0,178047.0,178047.0,98048.0,712188.0,16384.0,10030688.0,191385.0,0.0,40556792.0
diff --git a/tests/workloads/ipblocks_SQ/MI300A_A1/log.txt b/tests/workloads/ipblocks_SQ/MI300A_A1/log.txt
new file mode 100644
index 0000000000..cc84014503
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300A_A1/log.txt
@@ -0,0 +1,191 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/ipblocks_SQ/MI300A_A1
+Target: MI300A_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: None
+Hardware Blocks: ['sq']
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+[profiling] Current input file: tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH_LEVEL
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+[profiling] Current input file: tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying the output vector from the GPU to the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Releasing GPU memory
+[profiling] Current input file: tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+[profiling] Current input file: tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+[profiling] Current input file: tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LEVEL_WAVES
+[profiling] Current input file: tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_CVT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_WR
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_RD
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU
+[profiling] Current input file: tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F32
+[profiling] Current input file: tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_HITS
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_MISSES
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_MISSES_DUPLICATE
+[profiling] Current input file: tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_HITS
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES_DUPLICATE
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_1
+[profiling] Current input file: tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+[profiling] Current input file: tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+[profiling] Current input file: tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
+[profiling] Current input file: tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_VALU
+[profiling] Current input file: tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_MISC
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_WR
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_RD
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_SALU
+[profiling] Current input file: tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ADDR_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_UNALIGNED_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_EQ_64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_64
+[profiling] Current input file: tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ITEMS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_MEM_VIOLATIONS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ATOMIC_RETURN
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_IDX_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_RESTORED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_SAVED
+[profiling] Current input file: tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+[profiling] Current input file: tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_BF16
+[profiling] Current input file: tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..293092f641
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..08439eedce
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..6cca322d4e
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..e527ad31ba
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..3f8e04adb3
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_0.txt b/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..a8af39a86a
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU GRBM_COUNT GRBM_GUI_ACTIVE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_1.txt b/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..0ffea7de49
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_10.txt b/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..21c59688f7
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_11.txt b/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..df6d67d7b7
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_12.txt b/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..6e5320c11c
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_2.txt b/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..35225290be
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_3.txt b/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..50681b4ad7
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAVE_CYCLES SQ_WAIT_ANY SQ_WAIT_INST_ANY
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_4.txt b/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..a2a744969f
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_ANY SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU SQ_ACTIVE_INST_SCA
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_5.txt b/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..b6746a54f9
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU SQ_THREAD_CYCLES_VALU
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_6.txt b/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..e6e2d40811
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_7.txt b/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..86671fadbb
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_8.txt b/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..f01548a76d
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_9.txt b/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..970806d4fb
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/timestamps.txt b/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..676cca1b80
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300A_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ/MI300A_A1/pmc_perf.csv b/tests/workloads/ipblocks_SQ/MI300A_A1/pmc_perf.csv
new file mode 100644
index 0000000000..35b5f4636c
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300A_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SQ_ACTIVE_INST_ANY,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_BUSY_CU_CYCLES,SQ_ACTIVE_INST_VMEM,SQ_ACTIVE_INST_LDS,SQ_ACTIVE_INST_VALU,SQ_ACTIVE_INST_SCA,Wave_Size_1,Correlation_ID_1,SQ_IFETCH,SQ_LDS_BANK_CONFLICT,SQ_LDS_ADDR_CONFLICT,SQ_LDS_UNALIGNED_STALL,SQ_WAVES,SQ_WAVES_EQ_64,SQ_WAVES_LT_64,SQ_WAVES_LT_48,Wave_Size_2,Correlation_ID_2,SQ_INSTS_LDS,SQ_INSTS_GDS,SQ_INSTS_EXP_GDS,SQ_INSTS_BRANCH,SQ_INSTS_SENDMSG,SQ_WAVE_CYCLES,SQ_WAIT_ANY,SQ_WAIT_INST_ANY,Wave_Size_3,Correlation_ID_3,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,Wave_Size_4,Correlation_ID_4,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SQ_INSTS_VALU_TRANS_F64,SQ_INSTS_VALU_INT32,SQ_INSTS_VALU_INT64,SQ_INSTS_SMEM,SQ_INSTS_FLAT,Wave_Size_5,Correlation_ID_5,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_6,Correlation_ID_6,SQC_TC_DATA_ATOMIC_REQ,SQC_TC_STALL,SQC_TC_REQ,SQC_DCACHE_REQ_READ_16,SQC_ICACHE_REQ,SQC_ICACHE_HITS,SQC_ICACHE_MISSES,SQC_ICACHE_MISSES_DUPLICATE,Wave_Size_7,Correlation_ID_7,SQ_INSTS_VALU_MFMA_MOPS_I8,SQ_INSTS_VALU_MFMA_MOPS_F16,SQ_INSTS_VALU_MFMA_MOPS_BF16,SQ_INSTS_VALU_MFMA_MOPS_F32,SQ_INSTS_VALU_MFMA_MOPS_F64,SQC_TC_INST_REQ,SQC_TC_DATA_READ_REQ,SQC_TC_DATA_WRITE_REQ,Wave_Size_8,Correlation_ID_8,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,Wave_Size_9,Correlation_ID_9,SQC_DCACHE_REQ_READ_2,SQC_DCACHE_REQ_READ_4,Wave_Size_10,Correlation_ID_10,SQ_ACTIVE_INST_EXP_GDS,SQ_ACTIVE_INST_MISC,SQ_ACTIVE_INST_FLAT,SQ_INST_CYCLES_VMEM_WR,SQ_INST_CYCLES_VMEM_RD,SQ_INST_CYCLES_SMEM,SQ_INST_CYCLES_SALU,SQ_THREAD_CYCLES_VALU,Wave_Size_11,Correlation_ID_11,SQ_INSTS_VALU_ADD_F16,SQ_INSTS_VALU_MUL_F16,SQ_INSTS_VALU_FMA_F16,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,Wave_Size_12,Correlation_ID_12,SQ_INSTS_VALU_CVT,SQ_INSTS_VMEM_WR,SQ_INSTS_VMEM_RD,SQ_INSTS_VMEM,SQ_INSTS_SALU,SQ_INSTS_VSKIPPED,SQ_INSTS,SQ_INSTS_VALU,GRBM_COUNT,GRBM_GUI_ACTIVE,Start_Timestamp,End_Timestamp
+0,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,278528.0,858420.0,241893.0,2086474.0,0.0,0.0,98304.0,114688.0,64,0,65536.0,0.0,0.0,0.0,16384.0,16384.0,0.0,0.0,64,0,0.0,0.0,0.0,16384.0,16384.0,13735053.0,12341424.0,1115101.0,64,0,0.0,0.0,1048576.0,0.0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,49152.0,32768.0,65536.0,32768.0,64,0,188514.0,0.0,0.0,65536.0,61816.0,120.0,3600.0,32768.0,64,0,0.0,0.0,480.0,0.0,65536.0,62292.0,120.0,3124.0,64,0,0.0,0.0,0.0,0.0,0.0,360.0,120.0,0.0,64,0,131072.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,32768.0,0.0,64,0,0.0,32768.0,32768.0,16384.0,16384.0,65536.0,49152.0,6291456.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,0.0,16384.0,16384.0,32768.0,49152.0,0.0,327680.0,98304.0,229015.0,229015.0,73872514256816,73872514264588
+1,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,278528.0,774112.0,198617.0,1784503.0,0.0,0.0,98304.0,114688.0,64,0,65536.0,0.0,0.0,0.0,16384.0,16384.0,0.0,0.0,64,0,0.0,0.0,0.0,16384.0,16384.0,11271534.0,10038810.0,954196.0,64,0,0.0,0.0,1048576.0,0.0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,49152.0,32768.0,65536.0,32768.0,64,0,139339.0,0.0,0.0,65536.0,61816.0,120.0,3600.0,32768.0,64,0,0.0,0.0,120.0,0.0,65536.0,65536.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,120.0,0.0,64,0,131072.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,32768.0,0.0,64,0,0.0,32768.0,32768.0,16384.0,16384.0,65536.0,49152.0,6291456.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,0.0,16384.0,16384.0,32768.0,49152.0,0.0,327680.0,98304.0,201678.0,201678.0,73872514281133,73872514286982
+2,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,278528.0,758272.0,190467.0,1704717.0,0.0,0.0,98304.0,114688.0,64,0,65536.0,0.0,0.0,0.0,16384.0,16384.0,0.0,0.0,64,0,0.0,0.0,0.0,16384.0,16384.0,10689890.0,9725313.0,686049.0,64,0,0.0,0.0,1048576.0,0.0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,49152.0,32768.0,65536.0,32768.0,64,0,139901.0,0.0,0.0,65536.0,61816.0,120.0,3600.0,32768.0,64,0,0.0,0.0,120.0,0.0,65536.0,65536.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,120.0,0.0,64,0,131072.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,32768.0,0.0,64,0,0.0,32768.0,32768.0,16384.0,16384.0,65536.0,49152.0,6291456.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,0.0,16384.0,16384.0,32768.0,49152.0,0.0,327680.0,98304.0,191675.0,191675.0,73872514302045,73872514307814
diff --git a/tests/workloads/ipblocks_SQ/MI300A_A1/sysinfo.csv b/tests/workloads/ipblocks_SQ/MI300A_A1/sysinfo.csv
new file mode 100644
index 0000000000..43356d7b12
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300A_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+ipblocks_SQ,./tests/vcopy -n 1048576 -b 256 -i 3,sq,Wed 29 May 2024 01:40:01 PM  (CDT),2,sh5-1w300-rg3-3,AMD Instinct MI300A Accelerator,"American Megatrends International, LLC.RMO1002DS",Ubuntu 22.04.2 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,131174852,,6.1.2-110,N/A,SPX,NPS1,MI300A_A1,gfx942,32,24576,228,4,24,64,1024,32,2100,1300,2100,1300,96,32,120,4,5324.8,6
diff --git a/tests/workloads/ipblocks_SQ/MI300A_A1/timestamps.csv b/tests/workloads/ipblocks_SQ/MI300A_A1/timestamps.csv
new file mode 100644
index 0000000000..fcd7cd9ea7
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300A_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,11995,1,149001,149001,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73872514256816,73872514264588,0
+2,11995,1,149001,149001,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73872514281133,73872514286982,0
+3,11995,1,149001,149001,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73872514302045,73872514307814,0
diff --git a/tests/workloads/ipblocks_SQ/MI300X_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/ipblocks_SQ/MI300X_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..16576503f1
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300X_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,60633,1,967247,967247,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716399362513939,716399362556218,0,462047.0,462047.0,16384.0,65536.0,35082.0,2825932.0
+1,60633,1,967247,967247,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716399362578376,716399362592136,0,355217.0,355217.0,16384.0,65536.0,13222.0,1048576.0
+2,60633,1,967247,967247,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716399362612615,716399362626495,0,363725.0,363725.0,16384.0,65536.0,13097.0,1048584.0
diff --git a/tests/workloads/ipblocks_SQ/MI300X_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/ipblocks_SQ/MI300X_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..fa2c87c996
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300X_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,60633,1,967258,967258,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716399362513939,716399362556218,0,0.0,0.0,0.0
+1,60633,1,967258,967258,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716399362578376,716399362592136,0,0.0,0.0,0.0
+2,60633,1,967258,967258,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716399362612615,716399362626495,0,0.0,0.0,0.0
diff --git a/tests/workloads/ipblocks_SQ/MI300X_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/ipblocks_SQ/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..61b005c371
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,967269,967269,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716399362513939,716399362556218,0,65536.0,3525042.0,282055448.0
+1,60633,1,967269,967269,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716399362578376,716399362592136,0,65536.0,3597690.0,287816792.0
+2,60633,1,967269,967269,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716399362612615,716399362626495,0,65536.0,3616422.0,289347128.0
diff --git a/tests/workloads/ipblocks_SQ/MI300X_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/ipblocks_SQ/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..2d93c771a2
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,967280,967280,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716399362513939,716399362556218,0,32768.0,413694.0,33095616.0
+1,60633,1,967280,967280,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716399362578376,716399362592136,0,32768.0,285525.0,22835308.0
+2,60633,1,967280,967280,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716399362612615,716399362626495,0,32768.0,289625.0,23165928.0
diff --git a/tests/workloads/ipblocks_SQ/MI300X_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/ipblocks_SQ/MI300X_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..54d8157a0d
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300X_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,60633,1,967291,967291,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716399362513939,716399362556218,0,459357.0,459357.0,268038.0,1837428.0,16384.0,34534338.0,567515.0,0.0,138485668.0
+1,60633,1,967291,967291,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716399362578376,716399362592136,0,462300.0,462300.0,279517.0,1849200.0,16384.0,33267340.0,531236.0,0.0,133429564.0
+2,60633,1,967291,967291,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716399362612615,716399362626495,0,383426.0,383426.0,213030.0,1533704.0,16384.0,29431329.0,495375.0,0.0,118081120.0
diff --git a/tests/workloads/ipblocks_SQ/MI300X_A1/log.txt b/tests/workloads/ipblocks_SQ/MI300X_A1/log.txt
new file mode 100644
index 0000000000..e30cd0df79
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300X_A1/log.txt
@@ -0,0 +1,121 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/ipblocks_SQ/MI300X_A1
+Target: MI300X_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: None
+Hardware Blocks: ['sq']
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+[profiling] Current input file: tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH_LEVEL
+[profiling] Current input file: tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+[profiling] Current input file: tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+[profiling] Current input file: tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_CVT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_WR
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_RD
+[profiling] Current input file: tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F16
+[profiling] Current input file: tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+[profiling] Current input file: tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+[profiling] Current input file: tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+[profiling] Current input file: tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
+[profiling] Current input file: tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+[profiling] Current input file: tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+[profiling] Current input file: tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_MISC
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_WR
+[profiling] Current input file: tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ADDR_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_UNALIGNED_STALL
+[profiling] Current input file: tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ITEMS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_MEM_VIOLATIONS
+[profiling] Current input file: tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+[profiling] Current input file: tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F32
+[profiling] Current input file: tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..293092f641
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..08439eedce
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..6cca322d4e
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..e527ad31ba
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..3f8e04adb3
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_0.txt b/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..a8af39a86a
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU GRBM_COUNT GRBM_GUI_ACTIVE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_1.txt b/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..0ffea7de49
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_10.txt b/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..21c59688f7
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_11.txt b/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..df6d67d7b7
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_12.txt b/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..6e5320c11c
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_2.txt b/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..35225290be
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_3.txt b/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..50681b4ad7
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAVE_CYCLES SQ_WAIT_ANY SQ_WAIT_INST_ANY
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_4.txt b/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..a2a744969f
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_ANY SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU SQ_ACTIVE_INST_SCA
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_5.txt b/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..b6746a54f9
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU SQ_THREAD_CYCLES_VALU
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_6.txt b/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..e6e2d40811
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_7.txt b/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..86671fadbb
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_8.txt b/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..f01548a76d
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_9.txt b/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..970806d4fb
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/timestamps.txt b/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..676cca1b80
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300X_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ/MI300X_A1/pmc_perf.csv b/tests/workloads/ipblocks_SQ/MI300X_A1/pmc_perf.csv
new file mode 100644
index 0000000000..3cfd8e18bc
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300X_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_1,Correlation_ID_1,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,Wave_Size_2,Correlation_ID_2,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,Wave_Size_3,Correlation_ID_3,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SQ_INSTS_VALU_TRANS_F64,SQ_INSTS_VALU_INT32,SQ_INSTS_VALU_INT64,SQ_INSTS_SMEM,SQ_INSTS_FLAT,Wave_Size_4,Correlation_ID_4,SQ_ACTIVE_INST_ANY,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_BUSY_CU_CYCLES,SQ_ACTIVE_INST_VMEM,SQ_ACTIVE_INST_LDS,SQ_ACTIVE_INST_VALU,SQ_ACTIVE_INST_SCA,Wave_Size_5,Correlation_ID_5,SQC_DCACHE_REQ_READ_2,SQC_DCACHE_REQ_READ_4,Wave_Size_6,Correlation_ID_6,SQ_INSTS_VALU_CVT,SQ_INSTS_VMEM_WR,SQ_INSTS_VMEM_RD,SQ_INSTS_VMEM,SQ_INSTS_SALU,SQ_INSTS_VSKIPPED,SQ_INSTS,SQ_INSTS_VALU,GRBM_COUNT,GRBM_GUI_ACTIVE,Wave_Size_7,Correlation_ID_7,SQ_IFETCH,SQ_LDS_BANK_CONFLICT,SQ_LDS_ADDR_CONFLICT,SQ_LDS_UNALIGNED_STALL,SQ_WAVES,SQ_WAVES_EQ_64,SQ_WAVES_LT_64,SQ_WAVES_LT_48,Wave_Size_8,Correlation_ID_8,SQ_INSTS_VALU_ADD_F16,SQ_INSTS_VALU_MUL_F16,SQ_INSTS_VALU_FMA_F16,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,Wave_Size_9,Correlation_ID_9,SQ_INSTS_VALU_MFMA_MOPS_I8,SQ_INSTS_VALU_MFMA_MOPS_F16,SQ_INSTS_VALU_MFMA_MOPS_BF16,SQ_INSTS_VALU_MFMA_MOPS_F32,SQ_INSTS_VALU_MFMA_MOPS_F64,SQC_TC_INST_REQ,SQC_TC_DATA_READ_REQ,SQC_TC_DATA_WRITE_REQ,Wave_Size_10,Correlation_ID_10,SQ_INSTS_LDS,SQ_INSTS_GDS,SQ_INSTS_EXP_GDS,SQ_INSTS_BRANCH,SQ_INSTS_SENDMSG,SQ_WAVE_CYCLES,SQ_WAIT_ANY,SQ_WAIT_INST_ANY,Wave_Size_11,Correlation_ID_11,SQC_TC_DATA_ATOMIC_REQ,SQC_TC_STALL,SQC_TC_REQ,SQC_DCACHE_REQ_READ_16,SQC_ICACHE_REQ,SQC_ICACHE_HITS,SQC_ICACHE_MISSES,SQC_ICACHE_MISSES_DUPLICATE,Wave_Size_12,Correlation_ID_12,SQ_ACTIVE_INST_EXP_GDS,SQ_ACTIVE_INST_MISC,SQ_ACTIVE_INST_FLAT,SQ_INST_CYCLES_VMEM_WR,SQ_INST_CYCLES_VMEM_RD,SQ_INST_CYCLES_SMEM,SQ_INST_CYCLES_SALU,SQ_THREAD_CYCLES_VALU,Start_Timestamp,End_Timestamp
+0,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,3120012.0,0.0,0.0,65536.0,60576.0,160.0,4800.0,32768.0,64,0,0.0,0.0,1048576.0,0.0,0.0,0.0,0.0,0.0,64,0,131072.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,49152.0,32768.0,65536.0,32768.0,64,0,278528.0,1953556.0,608558.0,5415862.0,0.0,0.0,98304.0,114688.0,64,0,32768.0,0.0,64,0,0.0,16384.0,16384.0,32768.0,49152.0,0.0,327680.0,98304.0,496789.0,496789.0,64,0,65536.0,0.0,0.0,0.0,16384.0,16384.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,0.0,640.0,160.0,0.0,64,0,0.0,0.0,0.0,16384.0,16384.0,37030946.0,29302145.0,7450273.0,64,0,0.0,0.0,800.0,0.0,65536.0,61499.0,160.0,3877.0,64,0,0.0,32768.0,32768.0,16384.0,16384.0,65536.0,49152.0,6291456.0,716399362513939,716399362556218
+1,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,3007300.0,0.0,0.0,65536.0,60576.0,160.0,4800.0,32768.0,64,0,0.0,0.0,1048576.0,0.0,0.0,0.0,0.0,0.0,64,0,131072.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,49152.0,32768.0,65536.0,32768.0,64,0,278528.0,1861700.0,501773.0,4564763.0,0.0,0.0,98304.0,114688.0,64,0,32768.0,0.0,64,0,0.0,16384.0,16384.0,32768.0,49152.0,0.0,327680.0,98304.0,432417.0,432417.0,64,0,65536.0,0.0,0.0,0.0,16384.0,16384.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,160.0,0.0,64,0,0.0,0.0,0.0,16384.0,16384.0,31744131.0,24613776.0,6851827.0,64,0,0.0,0.0,160.0,0.0,65536.0,65536.0,0.0,0.0,64,0,0.0,32768.0,32768.0,16384.0,16384.0,65536.0,49152.0,6291456.0,716399362578376,716399362592136
+2,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,2825301.0,0.0,0.0,65536.0,60576.0,160.0,4800.0,32768.0,64,0,0.0,0.0,1048576.0,0.0,0.0,0.0,0.0,0.0,64,0,131072.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,49152.0,32768.0,65536.0,32768.0,64,0,278528.0,1663256.0,491384.0,4375679.0,0.0,0.0,98304.0,114688.0,64,0,32768.0,0.0,64,0,0.0,16384.0,16384.0,32768.0,49152.0,0.0,327680.0,98304.0,419163.0,419163.0,64,0,65536.0,0.0,0.0,0.0,16384.0,16384.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,160.0,0.0,64,0,0.0,0.0,0.0,16384.0,16384.0,30550058.0,23765896.0,6505634.0,64,0,0.0,0.0,160.0,0.0,65536.0,65536.0,0.0,0.0,64,0,0.0,32768.0,32768.0,16384.0,16384.0,65536.0,49152.0,6291456.0,716399362612615,716399362626495
diff --git a/tests/workloads/ipblocks_SQ/MI300X_A1/sysinfo.csv b/tests/workloads/ipblocks_SQ/MI300X_A1/sysinfo.csv
new file mode 100644
index 0000000000..d75de2ff8f
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300X_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+ipblocks_SQ,./tests/vcopy -n 1048576 -b 256 -i 3,sq,Wed 29 May 2024 12:03:33 PM  (CDT),2,splinter-126-wr-c6,AMD Ryzen 9 7950X 16-Core Processor,"American Megatrends International, LLC.VS2683299N.FD",Ubuntu 22.04.4 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,114656528,,6.2.0-13611,113-MI3SRIOV-001,SPX,NPS1,MI300X_A1,gfx942,32,4096,304,4,32,64,1024,32,2100,1300,2100,1300,128,32,160,4,5324.8,8
diff --git a/tests/workloads/ipblocks_SQ/MI300X_A1/timestamps.csv b/tests/workloads/ipblocks_SQ/MI300X_A1/timestamps.csv
new file mode 100644
index 0000000000..79f0565080
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ/MI300X_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,60633,1,967445,967445,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716399362513939,716399362556218,0
+2,60633,1,967445,967445,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716399362578376,716399362592136,0
+3,60633,1,967445,967445,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716399362612615,716399362626495,0
diff --git a/tests/workloads/ipblocks_SQC/MI300A_A1/log.txt b/tests/workloads/ipblocks_SQC/MI300A_A1/log.txt
new file mode 100644
index 0000000000..99f9c0648c
--- /dev/null
+++ b/tests/workloads/ipblocks_SQC/MI300A_A1/log.txt
@@ -0,0 +1,61 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/ipblocks_SQC/MI300A_A1
+Target: MI300A_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: None
+Hardware Blocks: ['sqc']
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+[profiling] Current input file: tests/workloads/ipblocks_SQC/MI300A_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_INST_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_READ_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_WRITE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+[profiling] Current input file: tests/workloads/ipblocks_SQC/MI300A_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_16
+[profiling] Current input file: tests/workloads/ipblocks_SQC/MI300A_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_HITS
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES_DUPLICATE
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_1
+[profiling] Current input file: tests/workloads/ipblocks_SQC/MI300A_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+[profiling] Current input file: tests/workloads/ipblocks_SQC/MI300A_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/ipblocks_SQC/MI300A_A1/perfmon/pmc_perf_0.txt b/tests/workloads/ipblocks_SQC/MI300A_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..bdc62f52a1
--- /dev/null
+++ b/tests/workloads/ipblocks_SQC/MI300A_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ GRBM_COUNT GRBM_GUI_ACTIVE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQC/MI300A_A1/perfmon/pmc_perf_1.txt b/tests/workloads/ipblocks_SQC/MI300A_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..21c59688f7
--- /dev/null
+++ b/tests/workloads/ipblocks_SQC/MI300A_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQC/MI300A_A1/perfmon/pmc_perf_2.txt b/tests/workloads/ipblocks_SQC/MI300A_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..df6d67d7b7
--- /dev/null
+++ b/tests/workloads/ipblocks_SQC/MI300A_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQC/MI300A_A1/perfmon/pmc_perf_3.txt b/tests/workloads/ipblocks_SQC/MI300A_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..6e5320c11c
--- /dev/null
+++ b/tests/workloads/ipblocks_SQC/MI300A_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQC/MI300A_A1/perfmon/timestamps.txt b/tests/workloads/ipblocks_SQC/MI300A_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..676cca1b80
--- /dev/null
+++ b/tests/workloads/ipblocks_SQC/MI300A_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQC/MI300A_A1/pmc_perf.csv b/tests/workloads/ipblocks_SQC/MI300A_A1/pmc_perf.csv
new file mode 100644
index 0000000000..49abe2ea98
--- /dev/null
+++ b/tests/workloads/ipblocks_SQC/MI300A_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SQC_DCACHE_REQ_READ_2,SQC_DCACHE_REQ_READ_4,Wave_Size_1,Correlation_ID_1,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_2,Correlation_ID_2,SQC_TC_DATA_ATOMIC_REQ,SQC_TC_STALL,SQC_TC_REQ,SQC_DCACHE_REQ_READ_16,SQC_ICACHE_REQ,SQC_ICACHE_HITS,SQC_ICACHE_MISSES,SQC_ICACHE_MISSES_DUPLICATE,Wave_Size_3,Correlation_ID_3,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_BUSY_CU_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQC_TC_INST_REQ,SQC_TC_DATA_READ_REQ,SQC_TC_DATA_WRITE_REQ,GRBM_COUNT,GRBM_GUI_ACTIVE,Start_Timestamp,End_Timestamp
+0,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,32768.0,0.0,64,0,182384.0,0.0,0.0,65536.0,61816.0,120.0,3600.0,32768.0,64,0,0.0,0.0,480.0,0.0,65536.0,62460.0,120.0,2956.0,64,0,870376.0,260343.0,2194462.0,16384.0,14170699.0,360.0,120.0,0.0,217594.0,217594.0,73723508700705,73723508709038
+1,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,32768.0,0.0,64,0,147225.0,0.0,0.0,65536.0,61830.0,120.0,3586.0,32768.0,64,0,0.0,0.0,120.0,0.0,65536.0,65536.0,0.0,0.0,64,0,810912.0,208429.0,1869368.0,16384.0,11440392.0,0.0,120.0,0.0,202728.0,202728.0,73723508747296,73723508753465
+2,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,32768.0,0.0,64,0,64520.0,0.0,0.0,65536.0,61893.0,120.0,3523.0,32768.0,64,0,0.0,0.0,120.0,0.0,65536.0,65536.0,0.0,0.0,64,0,750740.0,203331.0,1830303.0,16384.0,11168047.0,0.0,120.0,0.0,187685.0,187685.0,73723508725383,73723508731712
diff --git a/tests/workloads/ipblocks_SQC/MI300A_A1/sysinfo.csv b/tests/workloads/ipblocks_SQC/MI300A_A1/sysinfo.csv
new file mode 100644
index 0000000000..bda035de64
--- /dev/null
+++ b/tests/workloads/ipblocks_SQC/MI300A_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+ipblocks_SQC,./tests/vcopy -n 1048576 -b 256 -i 3,sqc,Wed 29 May 2024 01:37:51 PM  (CDT),2,sh5-1w300-rg3-3,AMD Instinct MI300A Accelerator,"American Megatrends International, LLC.RMO1002DS",Ubuntu 22.04.2 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,131174852,,6.1.2-110,N/A,SPX,NPS1,MI300A_A1,gfx942,32,24576,228,4,24,64,1024,32,2100,1300,2100,1300,96,32,120,4,5324.8,6
diff --git a/tests/workloads/ipblocks_SQC/MI300A_A1/timestamps.csv b/tests/workloads/ipblocks_SQC/MI300A_A1/timestamps.csv
new file mode 100644
index 0000000000..4b4b636a7b
--- /dev/null
+++ b/tests/workloads/ipblocks_SQC/MI300A_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,11995,1,147259,147259,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73723508700705,73723508709038,0
+3,11995,1,147259,147259,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73723508747296,73723508753465,0
+2,11995,1,147259,147259,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73723508725383,73723508731712,0
diff --git a/tests/workloads/ipblocks_SQC/MI300X_A1/log.txt b/tests/workloads/ipblocks_SQC/MI300X_A1/log.txt
new file mode 100644
index 0000000000..80a3b86629
--- /dev/null
+++ b/tests/workloads/ipblocks_SQC/MI300X_A1/log.txt
@@ -0,0 +1,46 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/ipblocks_SQC/MI300X_A1
+Target: MI300X_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: None
+Hardware Blocks: ['sqc']
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+[profiling] Current input file: tests/workloads/ipblocks_SQC/MI300X_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+[profiling] Current input file: tests/workloads/ipblocks_SQC/MI300X_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_16
+[profiling] Current input file: tests/workloads/ipblocks_SQC/MI300X_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+[profiling] Current input file: tests/workloads/ipblocks_SQC/MI300X_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+[profiling] Current input file: tests/workloads/ipblocks_SQC/MI300X_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/ipblocks_SQC/MI300X_A1/perfmon/pmc_perf_0.txt b/tests/workloads/ipblocks_SQC/MI300X_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..bdc62f52a1
--- /dev/null
+++ b/tests/workloads/ipblocks_SQC/MI300X_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ GRBM_COUNT GRBM_GUI_ACTIVE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQC/MI300X_A1/perfmon/pmc_perf_1.txt b/tests/workloads/ipblocks_SQC/MI300X_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..21c59688f7
--- /dev/null
+++ b/tests/workloads/ipblocks_SQC/MI300X_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQC/MI300X_A1/perfmon/pmc_perf_2.txt b/tests/workloads/ipblocks_SQC/MI300X_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..df6d67d7b7
--- /dev/null
+++ b/tests/workloads/ipblocks_SQC/MI300X_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQC/MI300X_A1/perfmon/pmc_perf_3.txt b/tests/workloads/ipblocks_SQC/MI300X_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..6e5320c11c
--- /dev/null
+++ b/tests/workloads/ipblocks_SQC/MI300X_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQC/MI300X_A1/perfmon/timestamps.txt b/tests/workloads/ipblocks_SQC/MI300X_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..676cca1b80
--- /dev/null
+++ b/tests/workloads/ipblocks_SQC/MI300X_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQC/MI300X_A1/pmc_perf.csv b/tests/workloads/ipblocks_SQC/MI300X_A1/pmc_perf.csv
new file mode 100644
index 0000000000..def5db1a4d
--- /dev/null
+++ b/tests/workloads/ipblocks_SQC/MI300X_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_1,Correlation_ID_1,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_BUSY_CU_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQC_TC_INST_REQ,SQC_TC_DATA_READ_REQ,SQC_TC_DATA_WRITE_REQ,GRBM_COUNT,GRBM_GUI_ACTIVE,Wave_Size_2,Correlation_ID_2,SQC_TC_DATA_ATOMIC_REQ,SQC_TC_STALL,SQC_TC_REQ,SQC_DCACHE_REQ_READ_16,SQC_ICACHE_REQ,SQC_ICACHE_HITS,SQC_ICACHE_MISSES,SQC_ICACHE_MISSES_DUPLICATE,Wave_Size_3,Correlation_ID_3,SQC_DCACHE_REQ_READ_2,SQC_DCACHE_REQ_READ_4,Start_Timestamp,End_Timestamp
+0,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,2764352.0,0.0,0.0,65536.0,60576.0,160.0,4800.0,32768.0,64,0,2012320.0,586570.0,5270935.0,16384.0,37329555.0,640.0,160.0,0.0,503080.0,503080.0,64,0,0.0,0.0,800.0,0.0,65536.0,61796.0,160.0,3580.0,64,0,32768.0,0.0,716301079137597,716301079152196
+1,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,2817766.0,0.0,0.0,65536.0,60576.0,160.0,4800.0,32768.0,64,0,1991372.0,507540.0,4582334.0,16384.0,31730246.0,0.0,160.0,0.0,497843.0,497843.0,64,0,0.0,0.0,160.0,0.0,65536.0,65536.0,0.0,0.0,64,0,32768.0,0.0,716301079173754,716301079186274
+2,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,2932467.0,0.0,0.0,65536.0,60576.0,160.0,4800.0,32768.0,64,0,1658940.0,511364.0,4549768.0,16384.0,31572131.0,0.0,160.0,0.0,414735.0,414735.0,64,0,0.0,0.0,160.0,0.0,65536.0,65536.0,0.0,0.0,64,0,32768.0,0.0,716301079205793,716301079218592
diff --git a/tests/workloads/ipblocks_SQC/MI300X_A1/sysinfo.csv b/tests/workloads/ipblocks_SQC/MI300X_A1/sysinfo.csv
new file mode 100644
index 0000000000..28015acbe2
--- /dev/null
+++ b/tests/workloads/ipblocks_SQC/MI300X_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+ipblocks_SQC,./tests/vcopy -n 1048576 -b 256 -i 3,sqc,Wed 29 May 2024 12:02:07 PM  (CDT),2,splinter-126-wr-c6,AMD Ryzen 9 7950X 16-Core Processor,"American Megatrends International, LLC.VS2683299N.FD",Ubuntu 22.04.4 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,114656528,,6.2.0-13611,113-MI3SRIOV-001,SPX,NPS1,MI300X_A1,gfx942,32,4096,304,4,32,64,1024,32,2100,1300,2100,1300,128,32,160,4,5324.8,8
diff --git a/tests/workloads/ipblocks_SQC/MI300X_A1/timestamps.csv b/tests/workloads/ipblocks_SQC/MI300X_A1/timestamps.csv
new file mode 100644
index 0000000000..811a2ac33c
--- /dev/null
+++ b/tests/workloads/ipblocks_SQC/MI300X_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,60633,1,965814,965814,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716301079137597,716301079152196,0
+2,60633,1,965814,965814,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716301079173754,716301079186274,0
+3,60633,1,965814,965814,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716301079205793,716301079218592,0
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..9e329ff003
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,11995,1,149088,149088,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73899368929172,73899368940108,0,204190.0,204190.0,16384.0,65536.0,26922.0,2164996.0
+1,11995,1,149088,149088,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73899368959017,73899368965025,0,185120.0,185120.0,16384.0,65536.0,12939.0,1048768.0
+2,11995,1,149088,149088,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73899368980969,73899368987058,0,175910.0,175910.0,16384.0,65536.0,13202.0,1049548.0
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..708897d022
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,11995,1,149099,149099,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73899368929172,73899368940108,0,0.0,0.0,0.0
+1,11995,1,149099,149099,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73899368959017,73899368965025,0,0.0,0.0,0.0
+2,11995,1,149099,149099,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73899368980969,73899368987058,0,0.0,0.0,0.0
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..2e125e0446
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,149110,149110,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73899368929172,73899368940108,0,65536.0,309986.0,24806736.0
+1,11995,1,149110,149110,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73899368959017,73899368965025,0,65536.0,228650.0,18274088.0
+2,11995,1,149110,149110,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73899368980969,73899368987058,0,65536.0,193964.0,15506360.0
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..6d766c3856
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,149121,149121,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73899368929172,73899368940108,0,32768.0,513245.0,41056276.0
+1,11995,1,149121,149121,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73899368959017,73899368965025,0,32768.0,408578.0,32680576.0
+2,11995,1,149121,149121,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73899368980969,73899368987058,0,32768.0,416038.0,33272736.0
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..f77398c064
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,11995,1,149132,149132,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73899368929172,73899368940108,0,214629.0,214629.0,121402.0,858516.0,16384.0,13734354.0,250897.0,0.0,55358216.0
+1,11995,1,149132,149132,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73899368959017,73899368965025,0,192095.0,192095.0,107449.0,768380.0,16384.0,11248495.0,206848.0,0.0,45388416.0
+2,11995,1,149132,149132,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73899368980969,73899368987058,0,174858.0,174858.0,94309.0,699432.0,16384.0,10567769.0,195992.0,0.0,42658744.0
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/log.txt b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/log.txt
new file mode 100644
index 0000000000..7d296b7b20
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/log.txt
@@ -0,0 +1,175 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/ipblocks_SQ_CPC/MI300A_A1
+Target: MI300A_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: None
+Hardware Blocks: ['sq', 'cpc']
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+[profiling] Current input file: tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+[profiling] Current input file: tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+[profiling] Current input file: tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+[profiling] Current input file: tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+[profiling] Current input file: tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LEVEL_WAVES
+[profiling] Current input file: tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_CVT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_WR
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_RD
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS
+[profiling] Current input file: tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F32
+[profiling] Current input file: tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_HITS
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_MISSES
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_MISSES_DUPLICATE
+[profiling] Current input file: tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_HITS
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES_DUPLICATE
+[profiling] Current input file: tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+[profiling] Current input file: tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_FLAT
+[profiling] Current input file: tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_INST_ANY
+[profiling] Current input file: tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+[profiling] Current input file: tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_MISC
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_FLAT
+[profiling] Current input file: tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ADDR_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_UNALIGNED_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_EQ_64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_48
+[profiling] Current input file: tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ITEMS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_MEM_VIOLATIONS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ATOMIC_RETURN
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_IDX_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_RESTORED
+[profiling] Current input file: tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F64
+[profiling] Current input file: tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_INST_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_READ_REQ
+[profiling] Current input file: tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..293092f641
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..08439eedce
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..6cca322d4e
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..e527ad31ba
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..3f8e04adb3
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_0.txt b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..45a3daf103
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU GRBM_COUNT GRBM_GUI_ACTIVE CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_1.txt b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..3eed6ed7c9
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 CPC_CPC_TCIU_BUSY CPC_CPC_TCIU_IDLE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_10.txt b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..21c59688f7
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_11.txt b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..df6d67d7b7
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_12.txt b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..6e5320c11c
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_2.txt b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..adf1880635
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_3.txt b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..fc22e552ae
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAVE_CYCLES SQ_WAIT_ANY SQ_WAIT_INST_ANY CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_4.txt b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..637dd5dfc6
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_ANY SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU SQ_ACTIVE_INST_SCA CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_5.txt b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..7272d68e44
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU SQ_THREAD_CYCLES_VALU CPC_ME1_DC0_SPI_BUSY
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_6.txt b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..e6e2d40811
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_7.txt b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..86671fadbb
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_8.txt b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..f01548a76d
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_9.txt b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..970806d4fb
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/timestamps.txt b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..676cca1b80
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/pmc_perf.csv b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/pmc_perf.csv
new file mode 100644
index 0000000000..789bd5011f
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SQ_ACTIVE_INST_ANY,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_BUSY_CU_CYCLES,SQ_ACTIVE_INST_VMEM,SQ_ACTIVE_INST_LDS,SQ_ACTIVE_INST_VALU,SQ_ACTIVE_INST_SCA,CPC_CPC_UTCL2IU_STALL,CPC_ME1_BUSY_FOR_PACKET_DECODE,Wave_Size_1,Correlation_ID_1,SQ_IFETCH,SQ_LDS_BANK_CONFLICT,SQ_LDS_ADDR_CONFLICT,SQ_LDS_UNALIGNED_STALL,SQ_WAVES,SQ_WAVES_EQ_64,SQ_WAVES_LT_64,SQ_WAVES_LT_48,Wave_Size_2,Correlation_ID_2,SQ_INSTS_LDS,SQ_INSTS_GDS,SQ_INSTS_EXP_GDS,SQ_INSTS_BRANCH,SQ_INSTS_SENDMSG,SQ_WAVE_CYCLES,SQ_WAIT_ANY,SQ_WAIT_INST_ANY,CPC_CPC_UTCL2IU_BUSY,CPC_CPC_UTCL2IU_IDLE,Wave_Size_3,Correlation_ID_3,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,Wave_Size_4,Correlation_ID_4,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SQ_INSTS_VALU_TRANS_F64,SQ_INSTS_VALU_INT32,SQ_INSTS_VALU_INT64,SQ_INSTS_SMEM,SQ_INSTS_FLAT,CPC_CPC_STAT_STALL,CPC_UTCL1_STALL_ON_TRANSLATION,Wave_Size_5,Correlation_ID_5,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_6,Correlation_ID_6,SQC_TC_DATA_ATOMIC_REQ,SQC_TC_STALL,SQC_TC_REQ,SQC_DCACHE_REQ_READ_16,SQC_ICACHE_REQ,SQC_ICACHE_HITS,SQC_ICACHE_MISSES,SQC_ICACHE_MISSES_DUPLICATE,Wave_Size_7,Correlation_ID_7,SQ_INSTS_VALU_MFMA_MOPS_I8,SQ_INSTS_VALU_MFMA_MOPS_F16,SQ_INSTS_VALU_MFMA_MOPS_BF16,SQ_INSTS_VALU_MFMA_MOPS_F32,SQ_INSTS_VALU_MFMA_MOPS_F64,SQC_TC_INST_REQ,SQC_TC_DATA_READ_REQ,SQC_TC_DATA_WRITE_REQ,Wave_Size_8,Correlation_ID_8,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,Wave_Size_9,Correlation_ID_9,SQC_DCACHE_REQ_READ_2,SQC_DCACHE_REQ_READ_4,Wave_Size_10,Correlation_ID_10,SQ_ACTIVE_INST_EXP_GDS,SQ_ACTIVE_INST_MISC,SQ_ACTIVE_INST_FLAT,SQ_INST_CYCLES_VMEM_WR,SQ_INST_CYCLES_VMEM_RD,SQ_INST_CYCLES_SMEM,SQ_INST_CYCLES_SALU,SQ_THREAD_CYCLES_VALU,CPC_ME1_DC0_SPI_BUSY,Wave_Size_11,Correlation_ID_11,SQ_INSTS_VALU_ADD_F16,SQ_INSTS_VALU_MUL_F16,SQ_INSTS_VALU_FMA_F16,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,CPC_CPC_TCIU_BUSY,CPC_CPC_TCIU_IDLE,Wave_Size_12,Correlation_ID_12,SQ_INSTS_VALU_CVT,SQ_INSTS_VMEM_WR,SQ_INSTS_VMEM_RD,SQ_INSTS_VMEM,SQ_INSTS_SALU,SQ_INSTS_VSKIPPED,SQ_INSTS,SQ_INSTS_VALU,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_CPC_STAT_BUSY,CPC_CPC_STAT_IDLE,Start_Timestamp,End_Timestamp
+0,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,278528.0,866108.0,267069.0,2313971.0,0.0,0.0,98304.0,114688.0,0.0,117837.0,64,0,65536.0,0.0,0.0,0.0,16384.0,16384.0,0.0,0.0,64,0,0.0,0.0,0.0,16384.0,16384.0,13500769.0,12158931.0,1063310.0,510.0,212756.0,64,0,0.0,0.0,1048576.0,0.0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,49152.0,32768.0,65536.0,32768.0,81457.0,522.0,64,0,192899.0,0.0,0.0,65536.0,61816.0,120.0,3600.0,32768.0,64,0,0.0,0.0,480.0,0.0,65536.0,62418.0,120.0,2998.0,64,0,0.0,0.0,0.0,0.0,0.0,360.0,120.0,0.0,64,0,131072.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,32768.0,0.0,64,0,0.0,32768.0,32768.0,16384.0,16384.0,65536.0,49152.0,6291456.0,53361.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,1234.0,221710.0,64,0,0.0,16384.0,16384.0,32768.0,49152.0,0.0,327680.0,98304.0,222878.0,222878.0,222878.0,0.0,73899368929172,73899368940108
+1,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,278528.0,793272.0,206776.0,1862531.0,0.0,0.0,98304.0,114688.0,0.0,115584.0,64,0,65536.0,0.0,0.0,0.0,16384.0,16384.0,0.0,0.0,64,0,0.0,0.0,0.0,16384.0,16384.0,11311361.0,10029085.0,1003748.0,6694.0,193737.0,64,0,0.0,0.0,1048576.0,0.0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,49152.0,32768.0,65536.0,32768.0,58632.0,6085.0,64,0,130601.0,0.0,0.0,65536.0,61816.0,120.0,3600.0,32768.0,64,0,0.0,0.0,120.0,0.0,65536.0,65536.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,120.0,0.0,64,0,131072.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,32768.0,0.0,64,0,0.0,32768.0,32768.0,16384.0,16384.0,65536.0,49152.0,6291456.0,41407.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,1234.0,206065.0,64,0,0.0,16384.0,16384.0,32768.0,49152.0,0.0,327680.0,98304.0,209587.0,209587.0,209587.0,0.0,73899368959017,73899368965025
+2,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,278528.0,733192.0,207062.0,1863895.0,0.0,0.0,98304.0,114688.0,0.0,99631.0,64,0,65536.0,0.0,0.0,0.0,16384.0,16384.0,0.0,0.0,64,0,0.0,0.0,0.0,16384.0,16384.0,10570950.0,9596604.0,695818.0,5739.0,177444.0,64,0,0.0,0.0,1048576.0,0.0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,49152.0,32768.0,65536.0,32768.0,56510.0,5822.0,64,0,121780.0,0.0,0.0,65536.0,61816.0,120.0,3600.0,32768.0,64,0,0.0,0.0,120.0,0.0,65536.0,65536.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,120.0,0.0,64,0,131072.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,32768.0,0.0,64,0,0.0,32768.0,32768.0,16384.0,16384.0,65536.0,49152.0,6291456.0,39574.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,1234.0,188312.0,64,0,0.0,16384.0,16384.0,32768.0,49152.0,0.0,327680.0,98304.0,189132.0,189132.0,189132.0,0.0,73899368980969,73899368987058
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/sysinfo.csv b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/sysinfo.csv
new file mode 100644
index 0000000000..bb29c43a78
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+ipblocks_SQ_CPC,./tests/vcopy -n 1048576 -b 256 -i 3,sq|cpc,Wed 29 May 2024 01:40:28 PM  (CDT),2,sh5-1w300-rg3-3,AMD Instinct MI300A Accelerator,"American Megatrends International, LLC.RMO1002DS",Ubuntu 22.04.2 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,131174852,,6.1.2-110,N/A,SPX,NPS1,MI300A_A1,gfx942,32,24576,228,4,24,64,1024,32,2100,1300,2100,1300,96,32,120,4,5324.8,6
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/timestamps.csv b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/timestamps.csv
new file mode 100644
index 0000000000..83ab68f4f5
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300A_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,11995,1,149286,149286,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73899368929172,73899368940108,0
+2,11995,1,149286,149286,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73899368959017,73899368965025,0
+3,11995,1,149286,149286,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73899368980969,73899368987058,0
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..83413e8e77
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,60633,1,967516,967516,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716417074716318,716417074732757,0,439176.0,439176.0,16384.0,65536.0,35461.0,2828084.0
+1,60633,1,967516,967516,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716417074754637,716417074768435,0,420874.0,420874.0,16384.0,65536.0,13247.0,1048588.0
+2,60633,1,967516,967516,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716417074788355,716417074800594,0,408189.0,408189.0,16384.0,65536.0,13022.0,1048588.0
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..521535320e
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,60633,1,967527,967527,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716417074716318,716417074732757,0,0.0,0.0,0.0
+1,60633,1,967527,967527,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716417074754637,716417074768435,0,0.0,0.0,0.0
+2,60633,1,967527,967527,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716417074788355,716417074800594,0,0.0,0.0,0.0
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..9873a4450e
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,967538,967538,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716417074716318,716417074732757,0,65536.0,3950190.0,316080376.0
+1,60633,1,967538,967538,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716417074754637,716417074768435,0,65536.0,3930462.0,314487904.0
+2,60633,1,967538,967538,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716417074788355,716417074800594,0,65536.0,3605174.0,288440008.0
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..3276af808b
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,967549,967549,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716417074716318,716417074732757,0,32768.0,443994.0,35514208.0
+1,60633,1,967549,967549,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716417074754637,716417074768435,0,32768.0,272888.0,21826664.0
+2,60633,1,967549,967549,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716417074788355,716417074800594,0,32768.0,265760.0,21257500.0
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..2c2087412e
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,60633,1,967560,967560,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716417074716318,716417074732757,0,485795.0,485795.0,291778.0,1943180.0,16384.0,34925386.0,575794.0,0.0,140053508.0
+1,60633,1,967560,967560,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716417074754637,716417074768435,0,451111.0,451111.0,268509.0,1804444.0,16384.0,32482590.0,524591.0,0.0,130285436.0
+2,60633,1,967560,967560,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716417074788355,716417074800594,0,394474.0,394474.0,218094.0,1577896.0,16384.0,31257253.0,512255.0,0.0,125378916.0
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/log.txt b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/log.txt
new file mode 100644
index 0000000000..a76736a5cd
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/log.txt
@@ -0,0 +1,141 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/ipblocks_SQ_CPC/MI300X_A1
+Target: MI300X_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: None
+Hardware Blocks: ['sq', 'cpc']
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+[profiling] Current input file: tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+[profiling] Current input file: tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+[profiling] Current input file: tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+[profiling] Current input file: tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+[profiling] Current input file: tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_CVT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_WR
+[profiling] Current input file: tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+[profiling] Current input file: tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_16
+[profiling] Current input file: tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_HITS
+[profiling] Current input file: tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+[profiling] Current input file: tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
+[profiling] Current input file: tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+[profiling] Current input file: tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_VMEM
+[profiling] Current input file: tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_SCA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_MISC
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_WR
+[profiling] Current input file: tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_THREAD_CYCLES_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ADDR_CONFLICT
+[profiling] Current input file: tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ITEMS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_MEM_VIOLATIONS
+[profiling] Current input file: tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+[profiling] Current input file: tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F32
+[profiling] Current input file: tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..293092f641
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..08439eedce
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..6cca322d4e
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..e527ad31ba
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..3f8e04adb3
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_0.txt b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..15224c37ef
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_WAVES SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD SQ_INSTS_VMEM SQ_INSTS_SALU GRBM_COUNT GRBM_GUI_ACTIVE CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_1.txt b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..80a8021efe
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 CPC_CPC_TCIU_BUSY CPC_CPC_TCIU_IDLE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_10.txt b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..21c59688f7
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_11.txt b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..df6d67d7b7
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_12.txt b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..6e5320c11c
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_2.txt b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..e7d3bc2ffd
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_3.txt b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..3fe9c9f059
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS SQ_INSTS_BRANCH SQ_INSTS_SENDMSG CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_4.txt b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..8c49c96bc4
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVE_CYCLES SQ_WAIT_ANY SQ_WAIT_INST_ANY SQ_ACTIVE_INST_ANY SQ_BUSY_CU_CYCLES SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_5.txt b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..558677d9a9
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_SCA SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU CPC_ME1_DC0_SPI_BUSY
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_6.txt b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..d0b41c885e
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_THREAD_CYCLES_VALU SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_7.txt b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..86671fadbb
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_8.txt b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..f01548a76d
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_9.txt b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..970806d4fb
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/timestamps.txt b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..676cca1b80
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/pmc_perf.csv b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/pmc_perf.csv
new file mode 100644
index 0000000000..afa5e0c148
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_1,Correlation_ID_1,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,Wave_Size_2,Correlation_ID_2,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,Wave_Size_3,Correlation_ID_3,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SQ_INSTS_VALU_TRANS_F64,SQ_INSTS_VALU_INT32,CPC_CPC_STAT_STALL,CPC_UTCL1_STALL_ON_TRANSLATION,Wave_Size_4,Correlation_ID_4,SQ_WAVE_CYCLES,SQ_WAIT_ANY,SQ_WAIT_INST_ANY,SQ_ACTIVE_INST_ANY,SQ_BUSY_CU_CYCLES,SQ_ACTIVE_INST_VMEM,SQ_ACTIVE_INST_LDS,SQ_ACTIVE_INST_VALU,CPC_CPC_UTCL2IU_STALL,CPC_ME1_BUSY_FOR_PACKET_DECODE,Wave_Size_5,Correlation_ID_5,SQC_DCACHE_REQ_READ_2,SQC_DCACHE_REQ_READ_4,Wave_Size_6,Correlation_ID_6,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_WAVES,SQ_INSTS_VALU_CVT,SQ_INSTS_VMEM_WR,SQ_INSTS_VMEM_RD,SQ_INSTS_VMEM,SQ_INSTS_SALU,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_CPC_STAT_BUSY,CPC_CPC_STAT_IDLE,Wave_Size_7,Correlation_ID_7,SQ_THREAD_CYCLES_VALU,SQ_IFETCH,SQ_LDS_BANK_CONFLICT,SQ_LDS_ADDR_CONFLICT,SQ_LDS_UNALIGNED_STALL,SQ_WAVES_EQ_64,SQ_WAVES_LT_64,SQ_WAVES_LT_48,Wave_Size_8,Correlation_ID_8,SQ_INSTS_VSKIPPED,SQ_INSTS,SQ_INSTS_VALU,SQ_INSTS_VALU_ADD_F16,SQ_INSTS_VALU_MUL_F16,SQ_INSTS_VALU_FMA_F16,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,CPC_CPC_TCIU_BUSY,CPC_CPC_TCIU_IDLE,Wave_Size_9,Correlation_ID_9,SQ_INSTS_VALU_MFMA_MOPS_I8,SQ_INSTS_VALU_MFMA_MOPS_F16,SQ_INSTS_VALU_MFMA_MOPS_BF16,SQ_INSTS_VALU_MFMA_MOPS_F32,SQ_INSTS_VALU_MFMA_MOPS_F64,SQC_TC_INST_REQ,SQC_TC_DATA_READ_REQ,SQC_TC_DATA_WRITE_REQ,Wave_Size_10,Correlation_ID_10,SQ_INSTS_VALU_INT64,SQ_INSTS_SMEM,SQ_INSTS_FLAT,SQ_INSTS_LDS,SQ_INSTS_GDS,SQ_INSTS_EXP_GDS,SQ_INSTS_BRANCH,SQ_INSTS_SENDMSG,CPC_CPC_UTCL2IU_BUSY,CPC_CPC_UTCL2IU_IDLE,Wave_Size_11,Correlation_ID_11,SQC_TC_DATA_ATOMIC_REQ,SQC_TC_STALL,SQC_TC_REQ,SQC_DCACHE_REQ_READ_16,SQC_ICACHE_REQ,SQC_ICACHE_HITS,SQC_ICACHE_MISSES,SQC_ICACHE_MISSES_DUPLICATE,Wave_Size_12,Correlation_ID_12,SQ_ACTIVE_INST_SCA,SQ_ACTIVE_INST_EXP_GDS,SQ_ACTIVE_INST_MISC,SQ_ACTIVE_INST_FLAT,SQ_INST_CYCLES_VMEM_WR,SQ_INST_CYCLES_VMEM_RD,SQ_INST_CYCLES_SMEM,SQ_INST_CYCLES_SALU,CPC_ME1_DC0_SPI_BUSY,Start_Timestamp,End_Timestamp
+0,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,2958424.0,0.0,0.0,65536.0,60576.0,160.0,4800.0,32768.0,64,0,0.0,0.0,1048576.0,0.0,0.0,0.0,0.0,0.0,64,0,131072.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,49152.0,192473.0,696.0,64,0,35240910.0,28099487.0,6862895.0,278528.0,5195270.0,0.0,0.0,98304.0,0.0,309806.0,64,0,32768.0,0.0,64,0,2303460.0,617289.0,16384.0,0.0,16384.0,16384.0,32768.0,49152.0,575865.0,575865.0,512105.0,63760.0,64,0,6291456.0,65536.0,0.0,0.0,0.0,16384.0,0.0,0.0,64,0,0.0,327680.0,98304.0,0.0,0.0,0.0,0.0,0.0,1586.0,500387.0,64,0,0.0,0.0,0.0,0.0,0.0,640.0,160.0,0.0,64,0,32768.0,65536.0,32768.0,0.0,0.0,0.0,16384.0,16384.0,680.0,512237.0,64,0,0.0,0.0,800.0,0.0,65536.0,61736.0,160.0,3640.0,64,0,114688.0,0.0,32768.0,32768.0,16384.0,16384.0,65536.0,49152.0,136312.0,716417074716318,716417074732757
+1,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,2805389.0,0.0,0.0,65536.0,60576.0,160.0,4800.0,32768.0,64,0,0.0,0.0,1048576.0,0.0,0.0,0.0,0.0,0.0,64,0,131072.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,49152.0,164503.0,9259.0,64,0,32041640.0,24999009.0,6764103.0,278528.0,4656903.0,0.0,0.0,98304.0,0.0,226525.0,64,0,32768.0,0.0,64,0,2038312.0,540754.0,16384.0,0.0,16384.0,16384.0,32768.0,49152.0,509578.0,509578.0,509578.0,0.0,64,0,6291456.0,65536.0,0.0,0.0,0.0,16384.0,0.0,0.0,64,0,0.0,327680.0,98304.0,0.0,0.0,0.0,0.0,0.0,1586.0,447750.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,160.0,0.0,64,0,32768.0,65536.0,32768.0,0.0,0.0,0.0,16384.0,16384.0,8883.0,398604.0,64,0,0.0,0.0,160.0,0.0,65536.0,65536.0,0.0,0.0,64,0,114688.0,0.0,32768.0,32768.0,16384.0,16384.0,65536.0,49152.0,117971.0,716417074754637,716417074768435
+2,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,2736043.0,0.0,0.0,65536.0,60576.0,160.0,4800.0,32768.0,64,0,0.0,0.0,1048576.0,0.0,0.0,0.0,0.0,0.0,64,0,131072.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,49152.0,174041.0,9276.0,64,0,33823036.0,27013117.0,6531391.0,278528.0,4850501.0,0.0,0.0,98304.0,0.0,253728.0,64,0,32768.0,0.0,64,0,1729848.0,490660.0,16384.0,0.0,16384.0,16384.0,32768.0,49152.0,432462.0,432462.0,432462.0,0.0,64,0,6291456.0,65536.0,0.0,0.0,0.0,16384.0,0.0,0.0,64,0,0.0,327680.0,98304.0,0.0,0.0,0.0,0.0,0.0,1586.0,428282.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,160.0,0.0,64,0,32768.0,65536.0,32768.0,0.0,0.0,0.0,16384.0,16384.0,8117.0,448575.0,64,0,0.0,0.0,160.0,0.0,65536.0,65536.0,0.0,0.0,64,0,114688.0,0.0,32768.0,32768.0,16384.0,16384.0,65536.0,49152.0,113355.0,716417074788355,716417074800594
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/sysinfo.csv b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/sysinfo.csv
new file mode 100644
index 0000000000..216eb6362b
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+ipblocks_SQ_CPC,./tests/vcopy -n 1048576 -b 256 -i 3,sq|cpc,Wed 29 May 2024 12:03:51 PM  (CDT),2,splinter-126-wr-c6,AMD Ryzen 9 7950X 16-Core Processor,"American Megatrends International, LLC.VS2683299N.FD",Ubuntu 22.04.4 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,114656528,,6.2.0-13611,113-MI3SRIOV-001,SPX,NPS1,MI300X_A1,gfx942,32,4096,304,4,32,64,1024,32,2100,1300,2100,1300,128,32,160,4,5324.8,8
diff --git a/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/timestamps.csv b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/timestamps.csv
new file mode 100644
index 0000000000..5309175521
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_CPC/MI300X_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,60633,1,967714,967714,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716417074716318,716417074732757,0
+2,60633,1,967714,967714,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716417074754637,716417074768435,0
+3,60633,1,967714,967714,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716417074788355,716417074800594,0
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..79fa7dd82f
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,11995,1,145008,145008,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73544293367920,73544293376814,0,226713.0,226713.0,16384.0,65536.0,27848.0,2206620.0
+1,11995,1,145008,145008,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73544293394320,73544293400289,0,185082.0,185082.0,16384.0,65536.0,12981.0,1048688.0
+2,11995,1,145008,145008,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73544293415513,73544293421161,0,173705.0,173705.0,16384.0,65536.0,13249.0,1049452.0
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..a1699e9da5
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,11995,1,145019,145019,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73544293367920,73544293376814,0,0.0,0.0,0.0
+1,11995,1,145019,145019,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73544293394320,73544293400289,0,0.0,0.0,0.0
+2,11995,1,145019,145019,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73544293415513,73544293421161,0,0.0,0.0,0.0
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..a52c76814f
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,145031,145031,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73544293367920,73544293376814,0,65536.0,229650.0,18364024.0
+1,11995,1,145031,145031,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73544293394320,73544293400289,0,65536.0,263630.0,21081224.0
+2,11995,1,145031,145031,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73544293415513,73544293421161,0,65536.0,110992.0,8838880.0
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..9e6d9e7ecf
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,145042,145042,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73544293367920,73544293376814,0,32768.0,540476.0,43233656.0
+1,11995,1,145042,145042,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73544293394320,73544293400289,0,32768.0,418458.0,33468920.0
+2,11995,1,145042,145042,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73544293415513,73544293421161,0,32768.0,421850.0,33746492.0
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..19db9cbac4
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,11995,1,145053,145053,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73544293367920,73544293376814,0,211991.0,211991.0,116599.0,847964.0,16384.0,14112348.0,265604.0,0.0,56874916.0
+1,11995,1,145053,145053,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73544293394320,73544293400289,0,172708.0,172708.0,90558.0,690832.0,16384.0,10899471.0,199647.0,0.0,43981196.0
+2,11995,1,145053,145053,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73544293415513,73544293421161,0,173202.0,173202.0,90616.0,692808.0,16384.0,10705190.0,195945.0,0.0,43202572.0
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/log.txt b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/log.txt
new file mode 100644
index 0000000000..59746e9dd3
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/log.txt
@@ -0,0 +1,244 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/ipblocks_SQ_SPI/MI300A_A1
+Target: MI300A_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: None
+Hardware Blocks: ['sq', 'spi']
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH_LEVEL
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LEVEL_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying the output vector from the GPU to the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Releasing GPU memory
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_CVT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_WR
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_RD
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SPI_CSN_WINDOW_VALID
+   |-> [/opt/rocm/bin/rocprofv2] - SPI_CSN_BUSY
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_SPI_BUSY
+   |-> [/opt/rocm/bin/rocprofv2] - SPI_CSN_NUM_THREADGROUPS
+   |-> [/opt/rocm/bin/rocprofv2] - SPI_CSN_WAVE
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_HITS
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_MISSES
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_MISSES_DUPLICATE
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying the output vector from the GPU to the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Releasing GPU memory
+   |-> [/opt/rocm/bin/rocprofv2] Releasing CPU memory
+   |-> [/opt/rocm/bin/rocprofv2] Results File: "tests/workloads/ipblocks_SQ_SPI/MI300A_A1/out/pmc_1/results_pmc_perf_10.csv"
+   |-> [/opt/rocm/bin/rocprofv2] 
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_HITS
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES_DUPLICATE
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_1
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F64
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_INST_ANY
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_MISC
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_WR
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ADDR_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_UNALIGNED_STALL
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ITEMS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_MEM_VIOLATIONS
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_VALU_MFMA_BUSY_CYCLES
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_INST_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_READ_REQ
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..293092f641
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..08439eedce
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..6cca322d4e
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..e527ad31ba
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..3f8e04adb3
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_0.txt b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..25b3939875
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU GRBM_COUNT GRBM_GUI_ACTIVE SPI_CSN_WINDOW_VALID SPI_CSN_BUSY
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_1.txt b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..406a4234a6
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 GRBM_SPI_BUSY SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_10.txt b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..21c59688f7
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_11.txt b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..df6d67d7b7
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_12.txt b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..6e5320c11c
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_2.txt b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..971524626e
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_3.txt b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..59067067dc
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAVE_CYCLES SQ_WAIT_ANY SQ_WAIT_INST_ANY SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_4.txt b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..2c49ab07dd
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_ANY SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU SQ_ACTIVE_INST_SCA SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_5.txt b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..9e42b0b86c
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU SQ_THREAD_CYCLES_VALU SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_6.txt b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..5c9a93c55d
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_7.txt b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..30c806c977
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_8.txt b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..9e33272f73
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES SPI_VWC_CSC_WR SPI_RA_BULKY_CU_FULL_CSN
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_9.txt b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..970806d4fb
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/timestamps.txt b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..676cca1b80
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/pmc_perf.csv b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/pmc_perf.csv
new file mode 100644
index 0000000000..8b1d0e92c2
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SQ_ACTIVE_INST_ANY,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_BUSY_CU_CYCLES,SQ_ACTIVE_INST_VMEM,SQ_ACTIVE_INST_LDS,SQ_ACTIVE_INST_VALU,SQ_ACTIVE_INST_SCA,SPI_RA_WAVE_SIMD_FULL_CSN,SPI_RA_VGPR_SIMD_FULL_CSN,Wave_Size_1,Correlation_ID_1,SQ_IFETCH,SQ_LDS_BANK_CONFLICT,SQ_LDS_ADDR_CONFLICT,SQ_LDS_UNALIGNED_STALL,SQ_WAVES,SQ_WAVES_EQ_64,SQ_WAVES_LT_64,SQ_WAVES_LT_48,SPI_RA_BAR_CU_FULL_CSN,SPI_RA_TGLIM_CU_FULL_CSN,Wave_Size_2,Correlation_ID_2,SQ_INSTS_LDS,SQ_INSTS_GDS,SQ_INSTS_EXP_GDS,SQ_INSTS_BRANCH,SQ_INSTS_SENDMSG,SQ_WAVE_CYCLES,SQ_WAIT_ANY,SQ_WAIT_INST_ANY,SPI_RA_RES_STALL_CSN,SPI_RA_TMP_STALL_CSN,Wave_Size_3,Correlation_ID_3,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,Wave_Size_4,Correlation_ID_4,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SQ_INSTS_VALU_TRANS_F64,SQ_INSTS_VALU_INT32,SQ_INSTS_VALU_INT64,SQ_INSTS_SMEM,SQ_INSTS_FLAT,SPI_RA_REQ_NO_ALLOC,SPI_RA_REQ_NO_ALLOC_CSN,Wave_Size_5,Correlation_ID_5,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_6,Correlation_ID_6,SQC_TC_DATA_ATOMIC_REQ,SQC_TC_STALL,SQC_TC_REQ,SQC_DCACHE_REQ_READ_16,SQC_ICACHE_REQ,SQC_ICACHE_HITS,SQC_ICACHE_MISSES,SQC_ICACHE_MISSES_DUPLICATE,Wave_Size_7,Correlation_ID_7,SQ_INSTS_VALU_MFMA_MOPS_I8,SQ_INSTS_VALU_MFMA_MOPS_F16,SQ_INSTS_VALU_MFMA_MOPS_BF16,SQ_INSTS_VALU_MFMA_MOPS_F32,SQ_INSTS_VALU_MFMA_MOPS_F64,SQC_TC_INST_REQ,SQC_TC_DATA_READ_REQ,SQC_TC_DATA_WRITE_REQ,Wave_Size_8,Correlation_ID_8,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,Wave_Size_9,Correlation_ID_9,SQC_DCACHE_REQ_READ_2,SQC_DCACHE_REQ_READ_4,Wave_Size_10,Correlation_ID_10,SQ_ACTIVE_INST_EXP_GDS,SQ_ACTIVE_INST_MISC,SQ_ACTIVE_INST_FLAT,SQ_INST_CYCLES_VMEM_WR,SQ_INST_CYCLES_VMEM_RD,SQ_INST_CYCLES_SMEM,SQ_INST_CYCLES_SALU,SQ_THREAD_CYCLES_VALU,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,Wave_Size_11,Correlation_ID_11,SQ_INSTS_VALU_ADD_F16,SQ_INSTS_VALU_MUL_F16,SQ_INSTS_VALU_FMA_F16,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,GRBM_SPI_BUSY,SPI_CSN_NUM_THREADGROUPS,SPI_CSN_WAVE,Wave_Size_12,Correlation_ID_12,SQ_INSTS_VALU_CVT,SQ_INSTS_VMEM_WR,SQ_INSTS_VMEM_RD,SQ_INSTS_VMEM,SQ_INSTS_SALU,SQ_INSTS_VSKIPPED,SQ_INSTS,SQ_INSTS_VALU,GRBM_COUNT,GRBM_GUI_ACTIVE,SPI_CSN_WINDOW_VALID,SPI_CSN_BUSY,Start_Timestamp,End_Timestamp
+0,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,278528.0,880404.0,246514.0,2132861.0,0.0,0.0,98304.0,114688.0,426060.0,0.0,64,0,65536.0,0.0,0.0,0.0,16384.0,16384.0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,0.0,16384.0,16384.0,14254867.0,12790571.0,1185768.0,13267.0,0.0,64,0,0.0,0.0,1048576.0,0.0,0.0,0.0,0.0,0.0,0.0,32768.0,64,0,0.0,0.0,0.0,0.0,49152.0,32768.0,65536.0,32768.0,18387.0,19468.0,64,0,187391.0,0.0,0.0,65536.0,61816.0,120.0,3600.0,32768.0,64,0,0.0,0.0,480.0,0.0,65536.0,62374.0,120.0,3042.0,64,0,0.0,0.0,0.0,0.0,0.0,360.0,120.0,0.0,64,0,131072.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,16384.0,0.0,64,0,32768.0,0.0,64,0,0.0,32768.0,32768.0,16384.0,16384.0,65536.0,49152.0,6291456.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,77789.0,4096.0,16384.0,64,0,0.0,16384.0,16384.0,32768.0,49152.0,0.0,327680.0,98304.0,223440.0,223440.0,888714.0,285632.0,73544293367920,73544293376814
+1,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,278528.0,798936.0,199539.0,1792139.0,0.0,0.0,98304.0,114688.0,245682.0,0.0,64,0,65536.0,0.0,0.0,0.0,16384.0,16384.0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,0.0,16384.0,16384.0,10957355.0,9837644.0,841183.0,7650.0,0.0,64,0,0.0,0.0,1048576.0,0.0,0.0,0.0,0.0,0.0,0.0,32768.0,64,0,0.0,0.0,0.0,0.0,49152.0,32768.0,65536.0,32768.0,10201.0,17598.0,64,0,137768.0,0.0,0.0,65536.0,61816.0,120.0,3600.0,32768.0,64,0,0.0,0.0,120.0,0.0,65536.0,65536.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,120.0,0.0,64,0,131072.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,16384.0,0.0,64,0,32768.0,0.0,64,0,0.0,32768.0,32768.0,16384.0,16384.0,65536.0,49152.0,6291456.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,62430.0,4096.0,16384.0,64,0,0.0,16384.0,16384.0,32768.0,49152.0,0.0,327680.0,98304.0,204270.0,204270.0,817080.0,239152.0,73544293394320,73544293400289
+2,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,278528.0,720164.0,193102.0,1719664.0,0.0,0.0,98304.0,114688.0,217821.0,0.0,64,0,65536.0,0.0,0.0,0.0,16384.0,16384.0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,0.0,16384.0,16384.0,10427126.0,9487370.0,661228.0,6910.0,0.0,64,0,0.0,0.0,1048576.0,0.0,0.0,0.0,0.0,0.0,0.0,32768.0,64,0,0.0,0.0,0.0,0.0,49152.0,32768.0,65536.0,32768.0,9223.0,17500.0,64,0,120240.0,0.0,0.0,65536.0,61816.0,120.0,3600.0,32768.0,64,0,0.0,0.0,120.0,0.0,65536.0,65536.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,120.0,0.0,64,0,131072.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,16384.0,0.0,64,0,32768.0,0.0,64,0,0.0,32768.0,32768.0,16384.0,16384.0,65536.0,49152.0,6291456.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,59483.0,4096.0,16384.0,64,0,0.0,16384.0,16384.0,32768.0,49152.0,0.0,327680.0,98304.0,192145.0,192145.0,768580.0,234114.0,73544293415513,73544293421161
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/sysinfo.csv b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/sysinfo.csv
new file mode 100644
index 0000000000..9539ecf94a
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+ipblocks_SQ_SPI,./tests/vcopy -n 1048576 -b 256 -i 3,sq|spi,Wed 29 May 2024 01:34:33 PM  (CDT),2,sh5-1w300-rg3-3,AMD Instinct MI300A Accelerator,"American Megatrends International, LLC.RMO1002DS",Ubuntu 22.04.2 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,131174852,,6.1.2-110,N/A,SPX,NPS1,MI300A_A1,gfx942,32,24576,228,4,24,64,1024,32,2100,1300,2100,1300,96,32,120,4,5324.8,6
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/timestamps.csv b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/timestamps.csv
new file mode 100644
index 0000000000..2d88775939
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300A_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,11995,1,145207,145207,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73544293367920,73544293376814,0
+2,11995,1,145207,145207,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73544293394320,73544293400289,0
+3,11995,1,145207,145207,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73544293415513,73544293421161,0
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..766414d7f3
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,60633,1,963680,963680,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716183001105014,716183001120013,0,428173.0,428173.0,16384.0,65536.0,33212.0,2657372.0
+1,60633,1,963680,963680,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716183001141531,716183001154211,0,408069.0,408069.0,16384.0,65536.0,13009.0,1048576.0
+2,60633,1,963680,963680,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716183001173810,716183001185530,0,361052.0,361052.0,16384.0,65536.0,12900.0,1048584.0
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..403cea6558
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,60633,1,963691,963691,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716183001105014,716183001120013,0,0.0,0.0,0.0
+1,60633,1,963691,963691,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716183001141531,716183001154211,0,0.0,0.0,0.0
+2,60633,1,963691,963691,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716183001173810,716183001185530,0,0.0,0.0,0.0
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..48a078d236
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,963703,963703,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716183001105014,716183001120013,0,65536.0,3697936.0,295925760.0
+1,60633,1,963703,963703,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716183001141531,716183001154211,0,65536.0,3783156.0,302638360.0
+2,60633,1,963703,963703,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716183001173810,716183001185530,0,65536.0,3945152.0,315581464.0
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..72f3e4dde9
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,963714,963714,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716183001105014,716183001120013,0,32768.0,493243.0,39446604.0
+1,60633,1,963714,963714,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716183001141531,716183001154211,0,32768.0,402067.0,32159404.0
+2,60633,1,963714,963714,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716183001173810,716183001185530,0,32768.0,419504.0,33554624.0
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..7da5b07e65
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,60633,1,963725,963725,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716183001105014,716183001120013,0,423599.0,423599.0,230643.0,1694396.0,16384.0,36561736.0,615976.0,0.0,146592816.0
+1,60633,1,963725,963725,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716183001141531,716183001154211,0,377764.0,377764.0,197266.0,1511056.0,16384.0,32180265.0,522414.0,0.0,129083672.0
+2,60633,1,963725,963725,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716183001173810,716183001185530,0,542096.0,542096.0,296569.0,2168384.0,16384.0,29630425.0,489228.0,0.0,118880116.0
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/log.txt b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/log.txt
new file mode 100644
index 0000000000..c1db4fa812
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/log.txt
@@ -0,0 +1,154 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/ipblocks_SQ_SPI/MI300X_A1
+Target: MI300X_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: None
+Hardware Blocks: ['sq', 'spi']
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH_LEVEL
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_CVT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_WR
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_RD
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_REQ
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_HITS
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES_DUPLICATE
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_1
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying the output vector from the GPU to the CPU
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F64
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_MISC
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_FLAT
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ADDR_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_UNALIGNED_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_BF16
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F64
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..293092f641
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..08439eedce
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..6cca322d4e
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..e527ad31ba
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..3f8e04adb3
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_0.txt b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..25b3939875
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU GRBM_COUNT GRBM_GUI_ACTIVE SPI_CSN_WINDOW_VALID SPI_CSN_BUSY
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_1.txt b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..406a4234a6
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 GRBM_SPI_BUSY SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_10.txt b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..21c59688f7
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_11.txt b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..df6d67d7b7
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_12.txt b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..6e5320c11c
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_2.txt b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..971524626e
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_3.txt b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..59067067dc
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAVE_CYCLES SQ_WAIT_ANY SQ_WAIT_INST_ANY SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_4.txt b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..2c49ab07dd
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_ANY SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU SQ_ACTIVE_INST_SCA SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_5.txt b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..9e42b0b86c
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU SQ_THREAD_CYCLES_VALU SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_6.txt b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..5c9a93c55d
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_7.txt b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..30c806c977
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_8.txt b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..9e33272f73
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES SPI_VWC_CSC_WR SPI_RA_BULKY_CU_FULL_CSN
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_9.txt b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..970806d4fb
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/timestamps.txt b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..676cca1b80
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/pmc_perf.csv b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/pmc_perf.csv
new file mode 100644
index 0000000000..bd3dd6bb89
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_1,Correlation_ID_1,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,Wave_Size_2,Correlation_ID_2,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,Wave_Size_3,Correlation_ID_3,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SQ_INSTS_VALU_TRANS_F64,SQ_INSTS_VALU_INT32,SQ_INSTS_VALU_INT64,SQ_INSTS_SMEM,SQ_INSTS_FLAT,SPI_RA_REQ_NO_ALLOC,SPI_RA_REQ_NO_ALLOC_CSN,Wave_Size_4,Correlation_ID_4,SQ_ACTIVE_INST_ANY,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_BUSY_CU_CYCLES,SQ_ACTIVE_INST_VMEM,SQ_ACTIVE_INST_LDS,SQ_ACTIVE_INST_VALU,SQ_ACTIVE_INST_SCA,SPI_RA_WAVE_SIMD_FULL_CSN,SPI_RA_VGPR_SIMD_FULL_CSN,Wave_Size_5,Correlation_ID_5,SQC_DCACHE_REQ_READ_2,SQC_DCACHE_REQ_READ_4,Wave_Size_6,Correlation_ID_6,SQ_INSTS_VALU_CVT,SQ_INSTS_VMEM_WR,SQ_INSTS_VMEM_RD,SQ_INSTS_VMEM,SQ_INSTS_SALU,SQ_INSTS_VSKIPPED,SQ_INSTS,SQ_INSTS_VALU,GRBM_COUNT,GRBM_GUI_ACTIVE,SPI_CSN_WINDOW_VALID,SPI_CSN_BUSY,Wave_Size_7,Correlation_ID_7,SQ_IFETCH,SQ_LDS_BANK_CONFLICT,SQ_LDS_ADDR_CONFLICT,SQ_LDS_UNALIGNED_STALL,SQ_WAVES,SQ_WAVES_EQ_64,SQ_WAVES_LT_64,SQ_WAVES_LT_48,SPI_RA_BAR_CU_FULL_CSN,SPI_RA_TGLIM_CU_FULL_CSN,Wave_Size_8,Correlation_ID_8,SQ_INSTS_VALU_ADD_F16,SQ_INSTS_VALU_MUL_F16,SQ_INSTS_VALU_FMA_F16,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,GRBM_SPI_BUSY,SPI_CSN_NUM_THREADGROUPS,SPI_CSN_WAVE,Wave_Size_9,Correlation_ID_9,SQ_INSTS_VALU_MFMA_MOPS_I8,SQ_INSTS_VALU_MFMA_MOPS_F16,SQ_INSTS_VALU_MFMA_MOPS_BF16,SQ_INSTS_VALU_MFMA_MOPS_F32,SQ_INSTS_VALU_MFMA_MOPS_F64,SQC_TC_INST_REQ,SQC_TC_DATA_READ_REQ,SQC_TC_DATA_WRITE_REQ,Wave_Size_10,Correlation_ID_10,SQ_INSTS_LDS,SQ_INSTS_GDS,SQ_INSTS_EXP_GDS,SQ_INSTS_BRANCH,SQ_INSTS_SENDMSG,SQ_WAVE_CYCLES,SQ_WAIT_ANY,SQ_WAIT_INST_ANY,SPI_RA_RES_STALL_CSN,SPI_RA_TMP_STALL_CSN,Wave_Size_11,Correlation_ID_11,SQC_TC_DATA_ATOMIC_REQ,SQC_TC_STALL,SQC_TC_REQ,SQC_DCACHE_REQ_READ_16,SQC_ICACHE_REQ,SQC_ICACHE_HITS,SQC_ICACHE_MISSES,SQC_ICACHE_MISSES_DUPLICATE,Wave_Size_12,Correlation_ID_12,SQ_ACTIVE_INST_EXP_GDS,SQ_ACTIVE_INST_MISC,SQ_ACTIVE_INST_FLAT,SQ_INST_CYCLES_VMEM_WR,SQ_INST_CYCLES_VMEM_RD,SQ_INST_CYCLES_SMEM,SQ_INST_CYCLES_SALU,SQ_THREAD_CYCLES_VALU,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,Start_Timestamp,End_Timestamp
+0,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,2680991.0,0.0,0.0,65536.0,60576.0,160.0,4800.0,32768.0,64,0,0.0,0.0,1048576.0,0.0,0.0,0.0,0.0,0.0,0.0,32768.0,64,0,131072.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,16384.0,0.0,64,0,0.0,0.0,0.0,0.0,49152.0,32768.0,65536.0,32768.0,65071.0,38946.0,64,0,278528.0,1983056.0,568713.0,5111608.0,0.0,0.0,98304.0,114688.0,1320674.0,0.0,64,0,32768.0,0.0,64,0,0.0,16384.0,16384.0,32768.0,49152.0,0.0,327680.0,98304.0,519093.0,519093.0,2069644.0,660700.0,64,0,65536.0,0.0,0.0,0.0,16384.0,16384.0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,154065.0,4096.0,16384.0,64,0,0.0,0.0,0.0,0.0,0.0,640.0,160.0,0.0,64,0,0.0,0.0,0.0,16384.0,16384.0,37793126.0,29708990.0,7805608.0,44426.0,0.0,64,0,0.0,0.0,800.0,0.0,65536.0,62222.0,160.0,3154.0,64,0,0.0,32768.0,32768.0,16384.0,16384.0,65536.0,49152.0,6291456.0,0.0,0.0,716183001105014,716183001120013
+1,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,3216074.0,0.0,0.0,65536.0,60576.0,160.0,4800.0,32768.0,64,0,0.0,0.0,1048576.0,0.0,0.0,0.0,0.0,0.0,0.0,32768.0,64,0,131072.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,16384.0,0.0,64,0,0.0,0.0,0.0,0.0,49152.0,32768.0,65536.0,32768.0,49649.0,32884.0,64,0,278528.0,1617976.0,482981.0,4148994.0,0.0,0.0,98304.0,114688.0,965302.0,0.0,64,0,32768.0,0.0,64,0,0.0,16384.0,16384.0,32768.0,49152.0,0.0,327680.0,98304.0,497251.0,497251.0,1989004.0,583524.0,64,0,65536.0,0.0,0.0,0.0,16384.0,16384.0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,140323.0,4096.0,16384.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,160.0,0.0,64,0,0.0,0.0,0.0,16384.0,16384.0,34334610.0,27095534.0,6960548.0,42221.0,0.0,64,0,0.0,0.0,160.0,0.0,65536.0,65536.0,0.0,0.0,64,0,0.0,32768.0,32768.0,16384.0,16384.0,65536.0,49152.0,6291456.0,0.0,0.0,716183001141531,716183001154211
+2,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,3309874.0,0.0,0.0,65536.0,60576.0,160.0,4800.0,32768.0,64,0,0.0,0.0,1048576.0,0.0,0.0,0.0,0.0,0.0,0.0,32768.0,64,0,131072.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,16384.0,0.0,64,0,0.0,0.0,0.0,0.0,49152.0,32768.0,65536.0,32768.0,52563.0,34487.0,64,0,278528.0,1774524.0,484057.0,4206860.0,0.0,0.0,98304.0,114688.0,1031453.0,0.0,64,0,32768.0,0.0,64,0,0.0,16384.0,16384.0,32768.0,49152.0,0.0,327680.0,98304.0,461424.0,461424.0,1845696.0,573274.0,64,0,65536.0,0.0,0.0,0.0,16384.0,16384.0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,144317.0,4096.0,16384.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,160.0,0.0,64,0,0.0,0.0,0.0,16384.0,16384.0,33584229.0,26522242.0,6783459.0,40145.0,0.0,64,0,0.0,0.0,160.0,0.0,65536.0,65536.0,0.0,0.0,64,0,0.0,32768.0,32768.0,16384.0,16384.0,65536.0,49152.0,6291456.0,0.0,0.0,716183001173810,716183001185530
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/sysinfo.csv b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/sysinfo.csv
new file mode 100644
index 0000000000..30bd8163c8
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+ipblocks_SQ_SPI,./tests/vcopy -n 1048576 -b 256 -i 3,sq|spi,Wed 29 May 2024 11:59:57 AM  (CDT),2,splinter-126-wr-c6,AMD Ryzen 9 7950X 16-Core Processor,"American Megatrends International, LLC.VS2683299N.FD",Ubuntu 22.04.4 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,114656528,,6.2.0-13611,113-MI3SRIOV-001,SPX,NPS1,MI300X_A1,gfx942,32,4096,304,4,32,64,1024,32,2100,1300,2100,1300,128,32,160,4,5324.8,8
diff --git a/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/timestamps.csv b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/timestamps.csv
new file mode 100644
index 0000000000..c5f7968faa
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI/MI300X_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,60633,1,963881,963881,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716183001105014,716183001120013,0
+2,60633,1,963881,963881,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716183001141531,716183001154211,0
+3,60633,1,963881,963881,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716183001173810,716183001185530,0
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..d4af93147d
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,11995,1,143385,143385,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73389116906653,73389116913984,0,208456.0,208456.0,16384.0,65536.0,27314.0,2182972.0
+1,11995,1,143385,143385,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73389116952843,73389116959173,0,187235.0,187235.0,16384.0,65536.0,13133.0,1048684.0
+2,11995,1,143385,143385,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73389116930930,73389116937059,0,178918.0,178918.0,16384.0,65536.0,13182.0,1049160.0
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..c4ebb6a4c5
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,11995,1,143396,143396,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73389116906653,73389116913984,0,0.0,0.0,0.0
+1,11995,1,143396,143396,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73389116952843,73389116959173,0,0.0,0.0,0.0
+2,11995,1,143396,143396,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73389116930930,73389116937059,0,0.0,0.0,0.0
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..e220b9f9cf
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,143407,143407,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73389116906653,73389116913984,0,65536.0,218150.0,17423832.0
+1,11995,1,143407,143407,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73389116952843,73389116959173,0,65536.0,101414.0,8123904.0
+2,11995,1,143407,143407,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73389116930930,73389116937059,0,65536.0,102818.0,8227080.0
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..08a6c57e8a
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,143418,143418,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73389116906653,73389116913984,0,32768.0,529973.0,42384604.0
+1,11995,1,143418,143418,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73389116952843,73389116959173,0,32768.0,420855.0,33658108.0
+2,11995,1,143418,143418,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73389116930930,73389116937059,0,32768.0,414383.0,33143596.0
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..ba5c51086a
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,11995,1,143429,143429,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73389116906653,73389116913984,0,219770.0,219770.0,122430.0,879080.0,16384.0,15002885.0,264379.0,0.0,60418484.0
+1,11995,1,143429,143429,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73389116952843,73389116959173,0,199390.0,199390.0,115475.0,797560.0,16384.0,11381126.0,205234.0,0.0,45917096.0
+2,11995,1,143429,143429,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73389116930930,73389116937059,0,182134.0,182134.0,97757.0,728536.0,16384.0,11366271.0,205451.0,0.0,45849360.0
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/log.txt b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/log.txt
new file mode 100644
index 0000000000..ae7b910240
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/log.txt
@@ -0,0 +1,197 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1
+Target: MI300A_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: None
+Hardware Blocks: ['sq', 'spi', 'ta', 'tcc', 'cpf']
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH_LEVEL
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LEVEL_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F16
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_16
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_HITS
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES_DUPLICATE
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_1
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F64
+   |-> [/opt/rocm/bin/rocprofv2] - TA_BUFFER_ATOMIC_WAVEFRONTS_sum
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_EXP_GDS
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_SCA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_MISC
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_WR
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_RD
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_SALU
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_THREAD_CYCLES_VALU
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ITEMS
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_VALU_MFMA_BUSY_CYCLES
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F64
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying the output vector from the GPU to the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Releasing GPU memory
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..293092f641
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..08439eedce
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..6cca322d4e
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..e527ad31ba
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..3f8e04adb3
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_0.txt b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..387dfe345d
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD GRBM_COUNT GRBM_GUI_ACTIVE TA_TA_BUSY_sum TA_BUFFER_WAVEFRONTS_sum SPI_CSN_WINDOW_VALID SPI_CSN_BUSY CPF_CPF_STAT_BUSY CPF_CPF_STAT_STALL TCC_CYCLE_sum TCC_BUSY_sum TCC_PROBE_sum TCC_PROBE_ALL_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_1.txt b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..b3bda316af
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 GRBM_SPI_BUSY TA_BUFFER_READ_WAVEFRONTS_sum TA_BUFFER_WRITE_WAVEFRONTS_sum SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE CPF_CPF_TCIU_BUSY CPF_CPF_TCIU_STALL TCC_NC_REQ_sum TCC_UC_REQ_sum TCC_CC_REQ_sum TCC_RW_REQ_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_10.txt b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..21c59688f7
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_11.txt b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..df6d67d7b7
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_12.txt b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..6e5320c11c
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_2.txt b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..497736b0b6
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 TA_BUFFER_ATOMIC_WAVEFRONTS_sum TA_BUFFER_TOTAL_CYCLES_sum SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN CPF_CPF_STAT_IDLE CPF_CPF_TCIU_IDLE TCC_REQ_sum TCC_STREAMING_REQ_sum TCC_HIT_sum TCC_MISS_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_3.txt b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..544ee46582
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES_sum SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN CPF_CMP_UTCL1_STALL_ON_TRANSLATION TCC_READ_sum TCC_WRITE_sum TCC_ATOMIC_sum TCC_WRITEBACK_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_4.txt b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..0ffc1105d5
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAIT_ANY SQ_WAIT_INST_ANY SQ_ACTIVE_INST_ANY SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_TOTAL_WAVEFRONTS_sum SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN TCC_EA0_WRREQ_sum TCC_EA0_WRREQ_64B_sum TCC_EA0_WR_UNCACHED_32B_sum TCC_EA0_WRREQ_DRAM_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_5.txt b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..b37a745816
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_SCA SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN TCC_EA0_RDREQ_sum TCC_EA0_RDREQ_32B_sum TCC_BUBBLE_sum TCC_EA0_RD_UNCACHED_32B_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_6.txt b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..5543f64699
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_THREAD_CYCLES_VALU SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN TCC_EA0_RDREQ_DRAM_sum TCC_TAG_STALL_sum TCC_NORMAL_WRITEBACK_sum TCC_ALL_TC_OP_WB_WRITEBACK_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_7.txt b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..a3ea010a01
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR TCC_NORMAL_EVICT_sum TCC_ALL_TC_OP_INV_EVICT_sum TCC_TOO_MANY_EA_WRREQS_STALL_sum TCC_EA0_ATOMIC_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_8.txt b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..e65f5a1528
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES SPI_VWC_CSC_WR SPI_RA_BULKY_CU_FULL_CSN TCC_EA0_RDREQ_LEVEL_sum TCC_EA0_WRREQ_LEVEL_sum TCC_EA0_ATOMIC_LEVEL_sum TCC_EA0_WRREQ_STALL_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_9.txt b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..970806d4fb
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/timestamps.txt b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..676cca1b80
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/pmc_perf.csv b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/pmc_perf.csv
new file mode 100644
index 0000000000..e72a77e167
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SQ_INSTS_BRANCH,SQ_INSTS_SENDMSG,SQ_WAIT_ANY,SQ_WAIT_INST_ANY,SQ_ACTIVE_INST_ANY,SQ_ACTIVE_INST_VMEM,SQ_ACTIVE_INST_LDS,SQ_ACTIVE_INST_VALU,SPI_RA_WAVE_SIMD_FULL_CSN,SPI_RA_VGPR_SIMD_FULL_CSN,TA_ADDR_STALLED_BY_TC_CYCLES_sum,TA_TOTAL_WAVEFRONTS_sum,TCC_EA0_WRREQ_64B_sum,TCC_EA0_WRREQ_DRAM_sum,TCC_EA0_WRREQ_sum,TCC_EA0_WR_UNCACHED_32B_sum,Wave_Size_1,Correlation_ID_1,SQ_THREAD_CYCLES_VALU,SQ_IFETCH,SQ_LDS_BANK_CONFLICT,SQ_LDS_ADDR_CONFLICT,SQ_LDS_UNALIGNED_STALL,SQ_WAVES_EQ_64,SQ_WAVES_LT_64,SQ_WAVES_LT_48,SPI_RA_BAR_CU_FULL_CSN,SPI_RA_TGLIM_CU_FULL_CSN,TA_FLAT_READ_WAVEFRONTS_sum,TA_FLAT_WAVEFRONTS_sum,TCC_ALL_TC_OP_WB_WRITEBACK_sum,TCC_EA0_RDREQ_DRAM_sum,TCC_NORMAL_WRITEBACK_sum,TCC_TAG_STALL_sum,Wave_Size_2,Correlation_ID_2,SQ_INSTS_VALU_TRANS_F64,SQ_INSTS_VALU_INT32,SQ_INSTS_VALU_INT64,SQ_INSTS_SMEM,SQ_INSTS_FLAT,SQ_INSTS_LDS,SQ_INSTS_GDS,SQ_INSTS_EXP_GDS,SPI_RA_RES_STALL_CSN,SPI_RA_TMP_STALL_CSN,CPF_CMP_UTCL1_STALL_ON_TRANSLATION,TA_BUFFER_COALESCED_READ_CYCLES_sum,TA_BUFFER_COALESCED_WRITE_CYCLES_sum,TCC_ATOMIC_sum,TCC_READ_sum,TCC_WRITEBACK_sum,TCC_WRITE_sum,Wave_Size_3,Correlation_ID_3,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,TA_FLAT_ATOMIC_WAVEFRONTS_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,TCC_ALL_TC_OP_INV_EVICT_sum,TCC_EA0_ATOMIC_sum,TCC_NORMAL_EVICT_sum,TCC_TOO_MANY_EA_WRREQS_STALL_sum,Wave_Size_4,Correlation_ID_4,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SPI_RA_REQ_NO_ALLOC,SPI_RA_REQ_NO_ALLOC_CSN,CPF_CPF_STAT_IDLE,CPF_CPF_TCIU_IDLE,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,TA_BUFFER_TOTAL_CYCLES_sum,TCC_HIT_sum,TCC_MISS_sum,TCC_REQ_sum,TCC_STREAMING_REQ_sum,Wave_Size_5,Correlation_ID_5,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_6,Correlation_ID_6,SQC_TC_DATA_ATOMIC_REQ,SQC_TC_STALL,SQC_TC_REQ,SQC_DCACHE_REQ_READ_16,SQC_ICACHE_REQ,SQC_ICACHE_HITS,SQC_ICACHE_MISSES,SQC_ICACHE_MISSES_DUPLICATE,Wave_Size_7,Correlation_ID_7,SQ_INSTS_VALU_MFMA_MOPS_I8,SQ_INSTS_VALU_MFMA_MOPS_F16,SQ_INSTS_VALU_MFMA_MOPS_BF16,SQ_INSTS_VALU_MFMA_MOPS_F32,SQ_INSTS_VALU_MFMA_MOPS_F64,SQC_TC_INST_REQ,SQC_TC_DATA_READ_REQ,SQC_TC_DATA_WRITE_REQ,Wave_Size_8,Correlation_ID_8,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,TCC_EA0_ATOMIC_LEVEL_sum,TCC_EA0_RDREQ_LEVEL_sum,TCC_EA0_WRREQ_LEVEL_sum,TCC_EA0_WRREQ_STALL_sum,Wave_Size_9,Correlation_ID_9,SQC_DCACHE_REQ_READ_2,SQC_DCACHE_REQ_READ_4,Wave_Size_10,Correlation_ID_10,SQ_ACTIVE_INST_SCA,SQ_ACTIVE_INST_EXP_GDS,SQ_ACTIVE_INST_MISC,SQ_ACTIVE_INST_FLAT,SQ_INST_CYCLES_VMEM_WR,SQ_INST_CYCLES_VMEM_RD,SQ_INST_CYCLES_SMEM,SQ_INST_CYCLES_SALU,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,TCC_BUBBLE_sum,TCC_EA0_RDREQ_32B_sum,TCC_EA0_RDREQ_sum,TCC_EA0_RD_UNCACHED_32B_sum,Wave_Size_11,Correlation_ID_11,SQ_INSTS_VMEM,SQ_INSTS_SALU,SQ_INSTS_VSKIPPED,SQ_INSTS,SQ_INSTS_VALU,SQ_INSTS_VALU_ADD_F16,SQ_INSTS_VALU_MUL_F16,SQ_INSTS_VALU_FMA_F16,GRBM_SPI_BUSY,SPI_CSN_NUM_THREADGROUPS,SPI_CSN_WAVE,CPF_CPF_TCIU_BUSY,CPF_CPF_TCIU_STALL,TA_BUFFER_READ_WAVEFRONTS_sum,TA_BUFFER_WRITE_WAVEFRONTS_sum,TCC_CC_REQ_sum,TCC_NC_REQ_sum,TCC_RW_REQ_sum,TCC_UC_REQ_sum,Wave_Size_12,Correlation_ID_12,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_BUSY_CU_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_INSTS_VALU_CVT,SQ_INSTS_VMEM_WR,SQ_INSTS_VMEM_RD,GRBM_COUNT,GRBM_GUI_ACTIVE,SPI_CSN_WINDOW_VALID,SPI_CSN_BUSY,CPF_CPF_STAT_BUSY,CPF_CPF_STAT_STALL,TA_BUFFER_WAVEFRONTS_sum,TA_TA_BUSY_sum,TCC_BUSY_sum,TCC_CYCLE_sum,TCC_PROBE_ALL_sum,TCC_PROBE_sum,Start_Timestamp,End_Timestamp
+0,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,16384.0,16384.0,12015832.0,1162618.0,278528.0,0.0,0.0,98304.0,385762.0,0.0,113622.0,32768.0,131072.0,131072.0,131072.0,0.0,64,0,6291456.0,65536.0,0.0,0.0,0.0,16384.0,0.0,0.0,0.0,0.0,16384.0,32768.0,53272.0,65579.0,12264.0,45854.0,64,0,0.0,49152.0,32768.0,65536.0,32768.0,0.0,0.0,0.0,14031.0,0.0,78.0,0.0,0.0,0.0,66048.0,65584.0,131072.0,64,0,0.0,0.0,1048576.0,0.0,0.0,0.0,0.0,0.0,0.0,32768.0,0.0,16384.0,0.0,0.0,2828.0,0.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,16573.0,19160.0,0.0,195790.0,0.0,0.0,65998.0,131119.0,197117.0,0.0,64,0,144136.0,0.0,0.0,65536.0,61816.0,120.0,3600.0,32768.0,64,0,0.0,0.0,480.0,0.0,65536.0,62306.0,120.0,3110.0,64,0,0.0,0.0,0.0,0.0,0.0,360.0,120.0,0.0,64,0,131072.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,16384.0,0.0,0.0,103217316.0,52896131.0,199297.0,64,0,32768.0,0.0,64,0,114688.0,0.0,32768.0,32768.0,16384.0,16384.0,65536.0,49152.0,0.0,0.0,0.0,318729.0,65536.0,0.0,65582.0,44.0,64,0,32768.0,49152.0,0.0,327680.0,98304.0,0.0,0.0,0.0,69043.0,4096.0,16384.0,189358.0,0.0,0.0,0.0,0.0,0.0,197088.0,26.0,64,0,1452152.0,243600.0,2091781.0,16384.0,13135275.0,0.0,16384.0,16384.0,363038.0,363038.0,1447106.0,270148.0,363038.0,78.0,0.0,1169860.0,1796255.0,5808608.0,0.0,0.0,73389116906653,73389116913984
+1,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,16384.0,16384.0,9900867.0,942724.0,278528.0,0.0,0.0,98304.0,257267.0,0.0,110480.0,32768.0,131072.0,131072.0,131072.0,0.0,64,0,6291456.0,65536.0,0.0,0.0,0.0,16384.0,0.0,0.0,0.0,0.0,16384.0,32768.0,52713.0,65579.0,12823.0,68583.0,64,0,0.0,49152.0,32768.0,65536.0,32768.0,0.0,0.0,0.0,10336.0,0.0,858.0,0.0,0.0,0.0,65718.0,65536.0,131072.0,64,0,0.0,0.0,1048576.0,0.0,0.0,0.0,0.0,0.0,0.0,32768.0,0.0,16384.0,0.0,0.0,27935.0,0.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,13797.0,19954.0,0.0,178521.0,0.0,0.0,65650.0,131123.0,196773.0,0.0,64,0,128735.0,0.0,0.0,65536.0,61816.0,120.0,3600.0,32768.0,64,0,0.0,0.0,120.0,0.0,65536.0,65536.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,120.0,0.0,64,0,131072.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,16384.0,0.0,0.0,71740148.0,55944448.0,202497.0,64,0,32768.0,0.0,64,0,114688.0,0.0,32768.0,32768.0,16384.0,16384.0,65536.0,49152.0,0.0,0.0,0.0,419467.0,65536.0,0.0,65579.0,74.0,64,0,32768.0,49152.0,0.0,327680.0,98304.0,0.0,0.0,0.0,62664.0,4096.0,16384.0,213194.0,0.0,0.0,0.0,0.0,0.0,196728.0,48.0,64,0,1346220.0,205445.0,1848188.0,16384.0,11327609.0,0.0,16384.0,16384.0,336555.0,336555.0,1346220.0,240382.0,336555.0,77.0,0.0,1267182.0,1711094.0,5384880.0,0.0,0.0,73389116952843,73389116959173
+2,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,16384.0,16384.0,9790115.0,792531.0,278528.0,0.0,0.0,98304.0,241160.0,0.0,112765.0,32768.0,131072.0,131072.0,131072.0,0.0,64,0,6291456.0,65536.0,0.0,0.0,0.0,16384.0,0.0,0.0,0.0,0.0,16384.0,32768.0,52741.0,65589.0,12795.0,62540.0,64,0,0.0,49152.0,32768.0,65536.0,32768.0,0.0,0.0,0.0,9952.0,0.0,0.0,0.0,0.0,0.0,65697.0,65536.0,131072.0,64,0,0.0,0.0,1048576.0,0.0,0.0,0.0,0.0,0.0,0.0,32768.0,0.0,16384.0,0.0,0.0,61318.0,0.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,13423.0,20280.0,0.0,164815.0,0.0,0.0,65650.0,131119.0,196769.0,0.0,64,0,118479.0,0.0,0.0,65536.0,61816.0,120.0,3600.0,32768.0,64,0,0.0,0.0,120.0,0.0,65536.0,65536.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,120.0,0.0,64,0,131072.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,16384.0,0.0,0.0,71370539.0,55719442.0,200592.0,64,0,32768.0,0.0,64,0,114688.0,0.0,32768.0,32768.0,16384.0,16384.0,65536.0,49152.0,0.0,0.0,0.0,422130.0,65536.0,0.0,65572.0,60.0,64,0,32768.0,49152.0,0.0,327680.0,98304.0,0.0,0.0,0.0,60348.0,4096.0,16384.0,178194.0,0.0,0.0,0.0,0.0,0.0,196728.0,41.0,64,0,1310512.0,205483.0,1838620.0,16384.0,11273155.0,0.0,16384.0,16384.0,327628.0,327628.0,1310512.0,240424.0,327628.0,0.0,0.0,1261824.0,1690467.0,5242048.0,0.0,0.0,73389116930930,73389116937059
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/sysinfo.csv b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/sysinfo.csv
new file mode 100644
index 0000000000..184ffd9f90
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+ipblocks_SQ_SPI_TA_TCC_CPF,./tests/vcopy -n 1048576 -b 256 -i 3,sq|spi|ta|tcc|cpf,Wed 29 May 2024 01:31:58 PM  (CDT),2,sh5-1w300-rg3-3,AMD Instinct MI300A Accelerator,"American Megatrends International, LLC.RMO1002DS",Ubuntu 22.04.2 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,131174852,,6.1.2-110,N/A,SPX,NPS1,MI300A_A1,gfx942,32,24576,228,4,24,64,1024,32,2100,1300,2100,1300,96,32,120,4,5324.8,6
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/timestamps.csv b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/timestamps.csv
new file mode 100644
index 0000000000..a4e71c1f6b
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300A_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,11995,1,143584,143584,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73389116906653,73389116913984,0
+3,11995,1,143584,143584,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73389116952843,73389116959173,0
+2,11995,1,143584,143584,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73389116930930,73389116937059,0
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..27fbf7ff07
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,60633,1,961602,961602,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716080244671556,716080244694556,0,447012.0,447012.0,16384.0,65536.0,41122.0,3303160.0
+1,60633,1,961602,961602,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716080244715514,716080244728274,0,459130.0,459130.0,16384.0,65536.0,13040.0,1048588.0
+2,60633,1,961602,961602,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716080244748434,716080244761153,0,367012.0,367012.0,16384.0,65536.0,13075.0,1048588.0
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..70bb12a8c4
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,60633,1,961614,961614,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716080244671556,716080244694556,0,0.0,0.0,0.0
+1,60633,1,961614,961614,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716080244715514,716080244728274,0,0.0,0.0,0.0
+2,60633,1,961614,961614,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716080244748434,716080244761153,0,0.0,0.0,0.0
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..b8090969c6
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,961640,961640,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716080244671556,716080244694556,0,65536.0,3964530.0,317127256.0
+1,60633,1,961640,961640,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716080244715514,716080244728274,0,65536.0,3794512.0,303536696.0
+2,60633,1,961640,961640,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716080244748434,716080244761153,0,65536.0,3814094.0,305121568.0
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..3186e2f825
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,961651,961651,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716080244671556,716080244694556,0,32768.0,530128.0,42404468.0
+1,60633,1,961651,961651,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716080244715514,716080244728274,0,32768.0,385905.0,30869900.0
+2,60633,1,961651,961651,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716080244748434,716080244761153,0,32768.0,340138.0,27212992.0
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..01848f3b53
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,60633,1,961662,961662,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716080244671556,716080244694556,0,563439.0,563439.0,282792.0,2253756.0,16384.0,38958675.0,626744.0,0.0,156188384.0
+1,60633,1,961662,961662,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716080244715514,716080244728274,0,388676.0,388676.0,204918.0,1554704.0,16384.0,33293825.0,530170.0,0.0,133534748.0
+2,60633,1,961662,961662,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716080244748434,716080244761153,0,410457.0,410457.0,223655.0,1641828.0,16384.0,33839779.0,535958.0,0.0,135720796.0
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/log.txt b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/log.txt
new file mode 100644
index 0000000000..0372470149
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/log.txt
@@ -0,0 +1,140 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1
+Target: MI300X_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: None
+Hardware Blocks: ['sq', 'spi', 'ta', 'tcc', 'cpf']
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH_LEVEL
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_16
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_HITS
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F32
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT64
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_ANY
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_SCA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_MISC
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_FLAT
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_THREAD_CYCLES_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ADDR_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_UNALIGNED_STALL
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ITEMS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_MEM_VIOLATIONS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ATOMIC_RETURN
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F16
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F32
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..293092f641
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..08439eedce
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..6cca322d4e
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..e527ad31ba
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..3f8e04adb3
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_0.txt b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..387dfe345d
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD GRBM_COUNT GRBM_GUI_ACTIVE TA_TA_BUSY_sum TA_BUFFER_WAVEFRONTS_sum SPI_CSN_WINDOW_VALID SPI_CSN_BUSY CPF_CPF_STAT_BUSY CPF_CPF_STAT_STALL TCC_CYCLE_sum TCC_BUSY_sum TCC_PROBE_sum TCC_PROBE_ALL_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_1.txt b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..b3bda316af
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 GRBM_SPI_BUSY TA_BUFFER_READ_WAVEFRONTS_sum TA_BUFFER_WRITE_WAVEFRONTS_sum SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE CPF_CPF_TCIU_BUSY CPF_CPF_TCIU_STALL TCC_NC_REQ_sum TCC_UC_REQ_sum TCC_CC_REQ_sum TCC_RW_REQ_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_10.txt b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..21c59688f7
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_11.txt b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..df6d67d7b7
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_12.txt b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..6e5320c11c
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_2.txt b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..497736b0b6
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 TA_BUFFER_ATOMIC_WAVEFRONTS_sum TA_BUFFER_TOTAL_CYCLES_sum SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN CPF_CPF_STAT_IDLE CPF_CPF_TCIU_IDLE TCC_REQ_sum TCC_STREAMING_REQ_sum TCC_HIT_sum TCC_MISS_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_3.txt b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..544ee46582
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES_sum SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN CPF_CMP_UTCL1_STALL_ON_TRANSLATION TCC_READ_sum TCC_WRITE_sum TCC_ATOMIC_sum TCC_WRITEBACK_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_4.txt b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..0ffc1105d5
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAIT_ANY SQ_WAIT_INST_ANY SQ_ACTIVE_INST_ANY SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_TOTAL_WAVEFRONTS_sum SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN TCC_EA0_WRREQ_sum TCC_EA0_WRREQ_64B_sum TCC_EA0_WR_UNCACHED_32B_sum TCC_EA0_WRREQ_DRAM_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_5.txt b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..b37a745816
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_SCA SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN TCC_EA0_RDREQ_sum TCC_EA0_RDREQ_32B_sum TCC_BUBBLE_sum TCC_EA0_RD_UNCACHED_32B_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_6.txt b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..5543f64699
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_THREAD_CYCLES_VALU SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN TCC_EA0_RDREQ_DRAM_sum TCC_TAG_STALL_sum TCC_NORMAL_WRITEBACK_sum TCC_ALL_TC_OP_WB_WRITEBACK_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_7.txt b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..a3ea010a01
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR TCC_NORMAL_EVICT_sum TCC_ALL_TC_OP_INV_EVICT_sum TCC_TOO_MANY_EA_WRREQS_STALL_sum TCC_EA0_ATOMIC_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_8.txt b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..e65f5a1528
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES SPI_VWC_CSC_WR SPI_RA_BULKY_CU_FULL_CSN TCC_EA0_RDREQ_LEVEL_sum TCC_EA0_WRREQ_LEVEL_sum TCC_EA0_ATOMIC_LEVEL_sum TCC_EA0_WRREQ_STALL_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_9.txt b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..970806d4fb
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/timestamps.txt b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..676cca1b80
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/pmc_perf.csv b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/pmc_perf.csv
new file mode 100644
index 0000000000..77b9cb5ed4
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_1,Correlation_ID_1,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,TA_FLAT_ATOMIC_WAVEFRONTS_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,TCC_ALL_TC_OP_INV_EVICT_sum,TCC_EA0_ATOMIC_sum,TCC_NORMAL_EVICT_sum,TCC_TOO_MANY_EA_WRREQS_STALL_sum,Wave_Size_2,Correlation_ID_2,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,TCC_EA0_ATOMIC_LEVEL_sum,TCC_EA0_RDREQ_LEVEL_sum,TCC_EA0_WRREQ_LEVEL_sum,TCC_EA0_WRREQ_STALL_sum,Wave_Size_3,Correlation_ID_3,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SPI_RA_REQ_NO_ALLOC,SPI_RA_REQ_NO_ALLOC_CSN,CPF_CPF_STAT_IDLE,CPF_CPF_TCIU_IDLE,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,TA_BUFFER_TOTAL_CYCLES_sum,TCC_HIT_sum,TCC_MISS_sum,TCC_REQ_sum,TCC_STREAMING_REQ_sum,Wave_Size_4,Correlation_ID_4,SQ_INSTS_BRANCH,SQ_INSTS_SENDMSG,SQ_WAIT_ANY,SQ_WAIT_INST_ANY,SQ_ACTIVE_INST_ANY,SQ_ACTIVE_INST_VMEM,SQ_ACTIVE_INST_LDS,SQ_ACTIVE_INST_VALU,SPI_RA_WAVE_SIMD_FULL_CSN,SPI_RA_VGPR_SIMD_FULL_CSN,TA_ADDR_STALLED_BY_TC_CYCLES_sum,TA_TOTAL_WAVEFRONTS_sum,TCC_EA0_WRREQ_64B_sum,TCC_EA0_WRREQ_DRAM_sum,TCC_EA0_WRREQ_sum,TCC_EA0_WR_UNCACHED_32B_sum,Wave_Size_5,Correlation_ID_5,SQC_DCACHE_REQ_READ_2,SQC_DCACHE_REQ_READ_4,Wave_Size_6,Correlation_ID_6,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_BUSY_CU_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_INSTS_VALU_CVT,SQ_INSTS_VMEM_WR,SQ_INSTS_VMEM_RD,GRBM_COUNT,GRBM_GUI_ACTIVE,SPI_CSN_WINDOW_VALID,SPI_CSN_BUSY,CPF_CPF_STAT_BUSY,CPF_CPF_STAT_STALL,TA_BUFFER_WAVEFRONTS_sum,TA_TA_BUSY_sum,TCC_BUSY_sum,TCC_CYCLE_sum,TCC_PROBE_ALL_sum,TCC_PROBE_sum,Wave_Size_7,Correlation_ID_7,SQ_THREAD_CYCLES_VALU,SQ_IFETCH,SQ_LDS_BANK_CONFLICT,SQ_LDS_ADDR_CONFLICT,SQ_LDS_UNALIGNED_STALL,SQ_WAVES_EQ_64,SQ_WAVES_LT_64,SQ_WAVES_LT_48,SPI_RA_BAR_CU_FULL_CSN,SPI_RA_TGLIM_CU_FULL_CSN,TA_FLAT_READ_WAVEFRONTS_sum,TA_FLAT_WAVEFRONTS_sum,TCC_ALL_TC_OP_WB_WRITEBACK_sum,TCC_EA0_RDREQ_DRAM_sum,TCC_NORMAL_WRITEBACK_sum,TCC_TAG_STALL_sum,Wave_Size_8,Correlation_ID_8,SQ_INSTS_VMEM,SQ_INSTS_SALU,SQ_INSTS_VSKIPPED,SQ_INSTS,SQ_INSTS_VALU,SQ_INSTS_VALU_ADD_F16,SQ_INSTS_VALU_MUL_F16,SQ_INSTS_VALU_FMA_F16,GRBM_SPI_BUSY,SPI_CSN_NUM_THREADGROUPS,SPI_CSN_WAVE,CPF_CPF_TCIU_BUSY,CPF_CPF_TCIU_STALL,TA_BUFFER_READ_WAVEFRONTS_sum,TA_BUFFER_WRITE_WAVEFRONTS_sum,TCC_CC_REQ_sum,TCC_NC_REQ_sum,TCC_RW_REQ_sum,TCC_UC_REQ_sum,Wave_Size_9,Correlation_ID_9,SQ_INSTS_VALU_MFMA_MOPS_I8,SQ_INSTS_VALU_MFMA_MOPS_F16,SQ_INSTS_VALU_MFMA_MOPS_BF16,SQ_INSTS_VALU_MFMA_MOPS_F32,SQ_INSTS_VALU_MFMA_MOPS_F64,SQC_TC_INST_REQ,SQC_TC_DATA_READ_REQ,SQC_TC_DATA_WRITE_REQ,Wave_Size_10,Correlation_ID_10,SQ_INSTS_VALU_TRANS_F64,SQ_INSTS_VALU_INT32,SQ_INSTS_VALU_INT64,SQ_INSTS_SMEM,SQ_INSTS_FLAT,SQ_INSTS_LDS,SQ_INSTS_GDS,SQ_INSTS_EXP_GDS,SPI_RA_RES_STALL_CSN,SPI_RA_TMP_STALL_CSN,CPF_CMP_UTCL1_STALL_ON_TRANSLATION,TA_BUFFER_COALESCED_READ_CYCLES_sum,TA_BUFFER_COALESCED_WRITE_CYCLES_sum,TCC_ATOMIC_sum,TCC_READ_sum,TCC_WRITEBACK_sum,TCC_WRITE_sum,Wave_Size_11,Correlation_ID_11,SQC_TC_DATA_ATOMIC_REQ,SQC_TC_STALL,SQC_TC_REQ,SQC_DCACHE_REQ_READ_16,SQC_ICACHE_REQ,SQC_ICACHE_HITS,SQC_ICACHE_MISSES,SQC_ICACHE_MISSES_DUPLICATE,Wave_Size_12,Correlation_ID_12,SQ_ACTIVE_INST_SCA,SQ_ACTIVE_INST_EXP_GDS,SQ_ACTIVE_INST_MISC,SQ_ACTIVE_INST_FLAT,SQ_INST_CYCLES_VMEM_WR,SQ_INST_CYCLES_VMEM_RD,SQ_INST_CYCLES_SMEM,SQ_INST_CYCLES_SALU,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,TCC_BUBBLE_sum,TCC_EA0_RDREQ_32B_sum,TCC_EA0_RDREQ_sum,TCC_EA0_RD_UNCACHED_32B_sum,Start_Timestamp,End_Timestamp
+0,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,2900893.0,0.0,0.0,65536.0,60576.0,160.0,4800.0,32768.0,64,0,0.0,0.0,1048576.0,0.0,0.0,0.0,0.0,0.0,0.0,32768.0,0.0,16384.0,0.0,0.0,0.0,0.0,64,0,131072.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,16384.0,0.0,0.0,121011246.0,71631294.0,224541.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,70446.0,42971.0,0.0,368607.0,0.0,0.0,66160.0,131291.0,197451.0,0.0,64,0,16384.0,16384.0,29559797.0,7138233.0,278528.0,0.0,0.0,98304.0,1389562.0,0.0,46963.0,32768.0,131072.0,131072.0,131072.0,0.0,64,0,32768.0,0.0,64,0,5337700.0,593047.0,5335449.0,16384.0,37337852.0,0.0,16384.0,16384.0,1334425.0,1334425.0,5330972.0,635934.0,1334425.0,233.0,0.0,911808.0,5472553.0,21350800.0,0.0,0.0,64,0,6291456.0,65536.0,0.0,0.0,0.0,16384.0,0.0,0.0,0.0,0.0,16384.0,32768.0,65536.0,65634.0,0.0,33053.0,64,0,32768.0,49152.0,0.0,327680.0,98304.0,0.0,0.0,0.0,158508.0,4096.0,16384.0,884954.0,0.0,0.0,0.0,0.0,0.0,197248.0,208.0,64,0,0.0,0.0,0.0,0.0,0.0,640.0,160.0,0.0,64,0,0.0,49152.0,32768.0,65536.0,32768.0,0.0,0.0,0.0,39823.0,0.0,78.0,0.0,0.0,0.0,66392.0,65656.0,131072.0,64,0,0.0,0.0,800.0,0.0,65536.0,61407.0,160.0,3969.0,64,0,114688.0,0.0,32768.0,32768.0,16384.0,16384.0,65536.0,49152.0,0.0,0.0,0.0,188182.0,65536.0,0.0,65780.0,424.0,716080244671556,716080244694556
+1,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,3023002.0,0.0,0.0,65536.0,60576.0,160.0,4800.0,32768.0,64,0,0.0,0.0,1048576.0,0.0,0.0,0.0,0.0,0.0,0.0,32768.0,0.0,16384.0,0.0,0.0,0.0,0.0,64,0,131072.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,16384.0,0.0,0.0,58255970.0,84877837.0,307170.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,56667.0,34835.0,0.0,282075.0,0.0,0.0,65536.0,131307.0,196843.0,0.0,64,0,16384.0,16384.0,24170323.0,6344092.0,278528.0,0.0,0.0,98304.0,1140078.0,0.0,52037.0,32768.0,131072.0,131072.0,131072.0,0.0,64,0,32768.0,0.0,64,0,5009808.0,518148.0,4669709.0,16384.0,32234229.0,0.0,16384.0,16384.0,1252452.0,1252452.0,5009808.0,564732.0,1252452.0,1104.0,0.0,890554.0,5589719.0,20039232.0,0.0,0.0,64,0,6291456.0,65536.0,0.0,0.0,0.0,16384.0,0.0,0.0,0.0,0.0,16384.0,32768.0,65533.0,65635.0,3.0,0.0,64,0,32768.0,49152.0,0.0,327680.0,98304.0,0.0,0.0,0.0,139186.0,4096.0,16384.0,883393.0,0.0,0.0,0.0,0.0,0.0,196608.0,234.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,160.0,0.0,64,0,0.0,49152.0,32768.0,65536.0,32768.0,0.0,0.0,0.0,35188.0,0.0,942.0,0.0,0.0,0.0,65779.0,65536.0,131072.0,64,0,0.0,0.0,160.0,0.0,65536.0,65536.0,0.0,0.0,64,0,114688.0,0.0,32768.0,32768.0,16384.0,16384.0,65536.0,49152.0,0.0,0.0,0.0,209700.0,65536.0,0.0,65782.0,492.0,716080244715514,716080244728274
+2,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,3117290.0,0.0,0.0,65536.0,60576.0,160.0,4800.0,32768.0,64,0,0.0,0.0,1048576.0,0.0,0.0,0.0,0.0,0.0,0.0,32768.0,0.0,16384.0,0.0,0.0,41.0,0.0,64,0,131072.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,16384.0,0.0,0.0,55095489.0,71746937.0,195457.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,55064.0,32526.0,0.0,276370.0,0.0,0.0,65536.0,131295.0,196831.0,0.0,64,0,16384.0,16384.0,25542919.0,6527215.0,278528.0,0.0,0.0,98304.0,1195479.0,0.0,60528.0,32768.0,131072.0,131072.0,131072.0,0.0,64,0,32768.0,0.0,64,0,4954476.0,511770.0,4612921.0,16384.0,31779481.0,0.0,16384.0,16384.0,1238619.0,1238619.0,4954476.0,558358.0,1238619.0,0.0,0.0,891631.0,5564191.0,19817904.0,0.0,0.0,64,0,6291456.0,65536.0,0.0,0.0,0.0,16384.0,0.0,0.0,0.0,0.0,16384.0,32768.0,65536.0,65628.0,0.0,0.0,64,0,32768.0,49152.0,0.0,327680.0,98304.0,0.0,0.0,0.0,137808.0,4096.0,16384.0,880483.0,0.0,0.0,0.0,0.0,0.0,196608.0,229.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,160.0,0.0,64,0,0.0,49152.0,32768.0,65536.0,32768.0,0.0,0.0,0.0,31338.0,0.0,0.0,0.0,0.0,0.0,65776.0,65536.0,131072.0,64,0,0.0,0.0,160.0,0.0,65536.0,65536.0,0.0,0.0,64,0,114688.0,0.0,32768.0,32768.0,16384.0,16384.0,65536.0,49152.0,0.0,0.0,0.0,210457.0,65536.0,0.0,65782.0,492.0,716080244748434,716080244761153
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/sysinfo.csv b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/sysinfo.csv
new file mode 100644
index 0000000000..ae3d84ac8b
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+ipblocks_SQ_SPI_TA_TCC_CPF,./tests/vcopy -n 1048576 -b 256 -i 3,sq|spi|ta|tcc|cpf,Wed 29 May 2024 11:58:14 AM  (CDT),2,splinter-126-wr-c6,AMD Ryzen 9 7950X 16-Core Processor,"American Megatrends International, LLC.VS2683299N.FD",Ubuntu 22.04.4 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,114656528,,6.2.0-13611,113-MI3SRIOV-001,SPX,NPS1,MI300X_A1,gfx942,32,4096,304,4,32,64,1024,32,2100,1300,2100,1300,128,32,160,4,5324.8,8
diff --git a/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/timestamps.csv b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/timestamps.csv
new file mode 100644
index 0000000000..b26b9367f0
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SPI_TA_TCC_CPF/MI300X_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,60633,1,961818,961818,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716080244671556,716080244694556,0
+2,60633,1,961818,961818,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716080244715514,716080244728274,0
+3,60633,1,961818,961818,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716080244748434,716080244761153,0
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..fe6dc194eb
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,11995,1,144012,144012,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73449758390097,73449758398430,0,210605.0,210605.0,16384.0,65536.0,27346.0,2190760.0
+1,11995,1,144012,144012,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73449758436968,73449758443418,0,188089.0,188089.0,16384.0,65536.0,13039.0,1048696.0
+2,11995,1,144012,144012,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73449758414775,73449758421104,0,170150.0,170150.0,16384.0,65536.0,13185.0,1049316.0
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..18a4f0100e
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,11995,1,144023,144023,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73449758390097,73449758398430,0,0.0,0.0,0.0
+1,11995,1,144023,144023,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73449758436968,73449758443418,0,0.0,0.0,0.0
+2,11995,1,144023,144023,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73449758414775,73449758421104,0,0.0,0.0,0.0
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..cb4638506a
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,144034,144034,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73449758390097,73449758398430,0,65536.0,307292.0,24542784.0
+1,11995,1,144034,144034,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73449758436968,73449758443418,0,65536.0,270470.0,21650064.0
+2,11995,1,144034,144034,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73449758414775,73449758421104,0,65536.0,175706.0,14073216.0
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..9140a723f8
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,144045,144045,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73449758390097,73449758398430,0,32768.0,516546.0,41323468.0
+1,11995,1,144045,144045,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73449758436968,73449758443418,0,32768.0,398547.0,31882448.0
+2,11995,1,144045,144045,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73449758414775,73449758421104,0,32768.0,405941.0,32463320.0
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..925248d420
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,11995,1,144057,144057,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73449758390097,73449758398430,0,200599.0,200599.0,108184.0,802396.0,16384.0,13590984.0,244142.0,0.0,54760720.0
+1,11995,1,144057,144057,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73449758436968,73449758443418,0,197860.0,197860.0,112954.0,791440.0,16384.0,12199599.0,218315.0,0.0,49189368.0
+2,11995,1,144057,144057,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73449758414775,73449758421104,0,174971.0,174971.0,94364.0,699884.0,16384.0,10555652.0,195563.0,0.0,42614424.0
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/log.txt b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/log.txt
new file mode 100644
index 0000000000..549d35387b
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/log.txt
@@ -0,0 +1,159 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1
+Target: MI300A_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: None
+Hardware Blocks: ['sq', 'sqc', 'tcp', 'cpc']
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_CVT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_WR
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_RD
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F32
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F64
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_INST_ANY
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_SCA
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_MISC
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_FLAT
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ADDR_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_UNALIGNED_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_EQ_64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_64
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ITEMS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_MEM_VIOLATIONS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ATOMIC_RETURN
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_IDX_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_RESTORED
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F64
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_BF16
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..293092f641
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..08439eedce
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..6cca322d4e
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..e527ad31ba
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..3f8e04adb3
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_0.txt b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..362468befa
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU GRBM_COUNT GRBM_GUI_ACTIVE TCP_GATE_EN1_sum TCP_GATE_EN2_sum TCP_TD_TCP_STALL_CYCLES_sum TCP_TCR_TCP_STALL_CYCLES_sum CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_1.txt b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..8f02917f2f
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 TCP_READ_TAGCONFLICT_STALL_CYCLES_sum TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum TCP_TA_TCP_STATE_READ_sum CPC_CPC_TCIU_BUSY CPC_CPC_TCIU_IDLE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_10.txt b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..21c59688f7
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_11.txt b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..df6d67d7b7
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_12.txt b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..6e5320c11c
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_2.txt b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..876bc44376
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT TCP_VOLATILE_sum TCP_TOTAL_ACCESSES_sum TCP_TOTAL_READ_sum TCP_TOTAL_WRITE_sum CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_3.txt b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..a502338117
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAVE_CYCLES SQ_WAIT_ANY SQ_WAIT_INST_ANY TCP_TOTAL_ATOMIC_WITH_RET_sum TCP_TOTAL_ATOMIC_WITHOUT_RET_sum TCP_TOTAL_WRITEBACK_INVALIDATES_sum TCP_TOTAL_CACHE_ACCESSES_sum CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_4.txt b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..cea1a640aa
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_ANY SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU SQ_ACTIVE_INST_SCA TCP_UTCL1_TRANSLATION_MISS_sum TCP_UTCL1_TRANSLATION_HIT_sum TCP_UTCL1_PERMISSION_MISS_sum TCP_UTCL1_REQUEST_sum CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_5.txt b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..a32a8d79c6
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU SQ_THREAD_CYCLES_VALU TCP_TCC_READ_REQ_sum TCP_TCC_WRITE_REQ_sum TCP_TCC_ATOMIC_WITH_RET_REQ_sum TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum CPC_ME1_DC0_SPI_BUSY
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_6.txt b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..e66befcdc3
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 TCP_TCC_NC_READ_REQ_sum TCP_TCC_NC_WRITE_REQ_sum TCP_TCC_NC_ATOMIC_REQ_sum TCP_TCC_UC_READ_REQ_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_7.txt b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..19684bbe33
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED TCP_TCC_UC_WRITE_REQ_sum TCP_TCC_UC_ATOMIC_REQ_sum TCP_TCC_CC_READ_REQ_sum TCP_TCC_CC_WRITE_REQ_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_8.txt b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..89b4b997e8
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES TCP_TCC_CC_ATOMIC_REQ_sum TCP_TCC_RW_READ_REQ_sum TCP_TCC_RW_WRITE_REQ_sum TCP_TCC_RW_ATOMIC_REQ_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_9.txt b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..60ceab315a
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ TCP_PENDING_STALL_CYCLES_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/timestamps.txt b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..676cca1b80
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/pmc_perf.csv b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/pmc_perf.csv
new file mode 100644
index 0000000000..3f13842773
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SQ_ACTIVE_INST_ANY,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_BUSY_CU_CYCLES,SQ_ACTIVE_INST_VMEM,SQ_ACTIVE_INST_LDS,SQ_ACTIVE_INST_VALU,SQ_ACTIVE_INST_SCA,CPC_CPC_UTCL2IU_STALL,CPC_ME1_BUSY_FOR_PACKET_DECODE,TCP_UTCL1_PERMISSION_MISS_sum,TCP_UTCL1_REQUEST_sum,TCP_UTCL1_TRANSLATION_HIT_sum,TCP_UTCL1_TRANSLATION_MISS_sum,Wave_Size_1,Correlation_ID_1,SQ_IFETCH,SQ_LDS_BANK_CONFLICT,SQ_LDS_ADDR_CONFLICT,SQ_LDS_UNALIGNED_STALL,SQ_WAVES,SQ_WAVES_EQ_64,SQ_WAVES_LT_64,SQ_WAVES_LT_48,TCP_TCC_NC_ATOMIC_REQ_sum,TCP_TCC_NC_READ_REQ_sum,TCP_TCC_NC_WRITE_REQ_sum,TCP_TCC_UC_READ_REQ_sum,Wave_Size_2,Correlation_ID_2,SQ_INSTS_LDS,SQ_INSTS_GDS,SQ_INSTS_EXP_GDS,SQ_INSTS_BRANCH,SQ_INSTS_SENDMSG,SQ_WAVE_CYCLES,SQ_WAIT_ANY,SQ_WAIT_INST_ANY,CPC_CPC_UTCL2IU_BUSY,CPC_CPC_UTCL2IU_IDLE,TCP_TOTAL_ATOMIC_WITHOUT_RET_sum,TCP_TOTAL_ATOMIC_WITH_RET_sum,TCP_TOTAL_CACHE_ACCESSES_sum,TCP_TOTAL_WRITEBACK_INVALIDATES_sum,Wave_Size_3,Correlation_ID_3,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,TCP_TCC_CC_READ_REQ_sum,TCP_TCC_CC_WRITE_REQ_sum,TCP_TCC_UC_ATOMIC_REQ_sum,TCP_TCC_UC_WRITE_REQ_sum,Wave_Size_4,Correlation_ID_4,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SQ_INSTS_VALU_TRANS_F64,SQ_INSTS_VALU_INT32,SQ_INSTS_VALU_INT64,SQ_INSTS_SMEM,SQ_INSTS_FLAT,CPC_CPC_STAT_STALL,CPC_UTCL1_STALL_ON_TRANSLATION,TCP_TOTAL_ACCESSES_sum,TCP_TOTAL_READ_sum,TCP_TOTAL_WRITE_sum,TCP_VOLATILE_sum,Wave_Size_5,Correlation_ID_5,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_6,Correlation_ID_6,SQC_TC_DATA_ATOMIC_REQ,SQC_TC_STALL,SQC_TC_REQ,SQC_DCACHE_REQ_READ_16,SQC_ICACHE_REQ,SQC_ICACHE_HITS,SQC_ICACHE_MISSES,SQC_ICACHE_MISSES_DUPLICATE,Wave_Size_7,Correlation_ID_7,SQ_INSTS_VALU_MFMA_MOPS_I8,SQ_INSTS_VALU_MFMA_MOPS_F16,SQ_INSTS_VALU_MFMA_MOPS_BF16,SQ_INSTS_VALU_MFMA_MOPS_F32,SQ_INSTS_VALU_MFMA_MOPS_F64,SQC_TC_INST_REQ,SQC_TC_DATA_READ_REQ,SQC_TC_DATA_WRITE_REQ,TCP_PENDING_STALL_CYCLES_sum,Wave_Size_8,Correlation_ID_8,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,TCP_TCC_CC_ATOMIC_REQ_sum,TCP_TCC_RW_ATOMIC_REQ_sum,TCP_TCC_RW_READ_REQ_sum,TCP_TCC_RW_WRITE_REQ_sum,Wave_Size_9,Correlation_ID_9,SQC_DCACHE_REQ_READ_2,SQC_DCACHE_REQ_READ_4,Wave_Size_10,Correlation_ID_10,SQ_ACTIVE_INST_EXP_GDS,SQ_ACTIVE_INST_MISC,SQ_ACTIVE_INST_FLAT,SQ_INST_CYCLES_VMEM_WR,SQ_INST_CYCLES_VMEM_RD,SQ_INST_CYCLES_SMEM,SQ_INST_CYCLES_SALU,SQ_THREAD_CYCLES_VALU,CPC_ME1_DC0_SPI_BUSY,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,TCP_TCC_READ_REQ_sum,TCP_TCC_WRITE_REQ_sum,Wave_Size_11,Correlation_ID_11,SQ_INSTS_VALU_ADD_F16,SQ_INSTS_VALU_MUL_F16,SQ_INSTS_VALU_FMA_F16,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,CPC_CPC_TCIU_BUSY,CPC_CPC_TCIU_IDLE,TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum,TCP_READ_TAGCONFLICT_STALL_CYCLES_sum,TCP_TA_TCP_STATE_READ_sum,TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum,Wave_Size_12,Correlation_ID_12,SQ_INSTS_VALU_CVT,SQ_INSTS_VMEM_WR,SQ_INSTS_VMEM_RD,SQ_INSTS_VMEM,SQ_INSTS_SALU,SQ_INSTS_VSKIPPED,SQ_INSTS,SQ_INSTS_VALU,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_CPC_STAT_BUSY,CPC_CPC_STAT_IDLE,TCP_GATE_EN1_sum,TCP_GATE_EN2_sum,TCP_TCR_TCP_STALL_CYCLES_sum,TCP_TD_TCP_STALL_CYCLES_sum,Start_Timestamp,End_Timestamp
+0,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,278528.0,1559724.0,252187.0,2113571.0,0.0,0.0,98304.0,114688.0,0.0,297875.0,0.0,524288.0,453818.0,1824.0,64,0,65536.0,0.0,0.0,0.0,16384.0,16384.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,0.0,16384.0,16384.0,12468736.0,11427068.0,763140.0,510.0,378978.0,0.0,0.0,524288.0,228.0,64,0,0.0,0.0,1048576.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,49152.0,32768.0,65536.0,32768.0,182920.0,522.0,2097152.0,1048576.0,1048576.0,2097152.0,64,0,190896.0,0.0,0.0,65536.0,61816.0,120.0,3600.0,32768.0,64,0,0.0,0.0,480.0,0.0,65536.0,62728.0,120.0,2688.0,64,0,0.0,0.0,0.0,0.0,0.0,360.0,120.0,0.0,1164434.0,64,0,131072.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,65536.0,131072.0,64,0,32768.0,0.0,64,0,0.0,32768.0,32768.0,16384.0,16384.0,65536.0,49152.0,6291456.0,52747.0,0.0,0.0,65536.0,131072.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,1234.0,385836.0,0.0,0.0,32768.0,0.0,64,0,0.0,16384.0,16384.0,32768.0,49152.0,0.0,327680.0,98304.0,407214.0,407214.0,407214.0,0.0,3046426.0,1729575.0,2589.0,1740.0,73449758390097,73449758398430
+1,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,278528.0,1556012.0,204909.0,1844652.0,0.0,0.0,98304.0,114688.0,0.0,304847.0,0.0,524288.0,454101.0,1824.0,64,0,65536.0,0.0,0.0,0.0,16384.0,16384.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,0.0,16384.0,16384.0,10873476.0,9552735.0,1042213.0,7465.0,374332.0,0.0,0.0,524288.0,228.0,64,0,0.0,0.0,1048576.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,49152.0,32768.0,65536.0,32768.0,175273.0,5737.0,2097152.0,1048576.0,1048576.0,2097152.0,64,0,127846.0,0.0,0.0,65536.0,61823.0,120.0,3593.0,32768.0,64,0,0.0,0.0,120.0,0.0,65536.0,65536.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,120.0,0.0,1043645.0,64,0,131072.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,65536.0,131072.0,64,0,32768.0,0.0,64,0,0.0,32768.0,32768.0,16384.0,16384.0,65536.0,49152.0,6291456.0,41891.0,0.0,0.0,65536.0,131072.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,1234.0,401730.0,0.0,0.0,32768.0,0.0,64,0,0.0,16384.0,16384.0,32768.0,49152.0,0.0,327680.0,98304.0,371229.0,371229.0,371229.0,0.0,2639853.0,1479789.0,160.0,1729.0,73449758436968,73449758443418
+2,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,278528.0,1420388.0,200727.0,1806572.0,0.0,0.0,98304.0,114688.0,0.0,274264.0,0.0,524288.0,453144.0,1824.0,64,0,65536.0,0.0,0.0,0.0,16384.0,16384.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,0.0,16384.0,16384.0,10381581.0,9278787.0,824266.0,5492.0,381422.0,0.0,0.0,524288.0,228.0,64,0,0.0,0.0,1048576.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,49152.0,32768.0,65536.0,32768.0,173740.0,5404.0,2097152.0,1048576.0,1048576.0,2097152.0,64,0,115772.0,0.0,0.0,65536.0,61816.0,120.0,3600.0,32768.0,64,0,0.0,0.0,120.0,0.0,65536.0,65536.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,120.0,0.0,1042104.0,64,0,131072.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,65536.0,131072.0,64,0,32768.0,0.0,64,0,0.0,32768.0,32768.0,16384.0,16384.0,65536.0,49152.0,6291456.0,40822.0,0.0,0.0,65536.0,131072.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,1234.0,360028.0,0.0,0.0,32768.0,0.0,64,0,0.0,16384.0,16384.0,32768.0,49152.0,0.0,327680.0,98304.0,356970.0,356970.0,356970.0,0.0,2596265.0,1484381.0,78.0,1597.0,73449758414775,73449758421104
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/sysinfo.csv b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/sysinfo.csv
new file mode 100644
index 0000000000..fb4f3b9b2a
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+ipblocks_SQ_SQC_TCP_CPC,./tests/vcopy -n 1048576 -b 256 -i 3,sq|sqc|tcp|cpc,Wed 29 May 2024 01:32:59 PM  (CDT),2,sh5-1w300-rg3-3,AMD Instinct MI300A Accelerator,"American Megatrends International, LLC.RMO1002DS",Ubuntu 22.04.2 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,131174852,,6.1.2-110,N/A,SPX,NPS1,MI300A_A1,gfx942,32,24576,228,4,24,64,1024,32,2100,1300,2100,1300,96,32,120,4,5324.8,6
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/timestamps.csv b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/timestamps.csv
new file mode 100644
index 0000000000..4858f309b2
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300A_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,11995,1,144212,144212,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73449758390097,73449758398430,0
+3,11995,1,144212,144212,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73449758436968,73449758443418,0
+2,11995,1,144212,144212,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73449758414775,73449758421104,0
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..e496ec74ad
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,60633,1,962244,962244,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716120136311404,716120136328043,0,451166.0,451166.0,16384.0,65536.0,37290.0,2979532.0
+1,60633,1,962244,962244,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716120136350321,716120136363961,0,397963.0,397963.0,16384.0,65536.0,13131.0,1048588.0
+2,60633,1,962244,962244,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716120136384280,716120136398120,0,408809.0,408809.0,16384.0,65536.0,13201.0,1048580.0
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..d4fa94cbb0
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,60633,1,962255,962255,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716120136311404,716120136328043,0,0.0,0.0,0.0
+1,60633,1,962255,962255,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716120136350321,716120136363961,0,0.0,0.0,0.0
+2,60633,1,962255,962255,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716120136384280,716120136398120,0,0.0,0.0,0.0
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..d7ae27a7cc
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,962266,962266,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716120136311404,716120136328043,0,65536.0,3849536.0,307954344.0
+1,60633,1,962266,962266,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716120136350321,716120136363961,0,65536.0,3973980.0,317953896.0
+2,60633,1,962266,962266,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716120136384280,716120136398120,0,65536.0,3640476.0,291187752.0
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..4e15a6cdaa
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,962277,962277,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716120136311404,716120136328043,0,32768.0,517343.0,41382736.0
+1,60633,1,962277,962277,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716120136350321,716120136363961,0,32768.0,426113.0,34082960.0
+2,60633,1,962277,962277,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716120136384280,716120136398120,0,32768.0,385929.0,30873508.0
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..dd67c29987
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,60633,1,962288,962288,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716120136311404,716120136328043,0,385059.0,385059.0,197618.0,1540236.0,16384.0,34483481.0,545001.0,0.0,138280324.0
+1,60633,1,962288,962288,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716120136350321,716120136363961,0,430375.0,430375.0,258619.0,1721500.0,16384.0,30250898.0,501508.0,0.0,121354496.0
+2,60633,1,962288,962288,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716120136384280,716120136398120,0,375307.0,375307.0,208996.0,1501228.0,16384.0,27861942.0,470690.0,0.0,111801664.0
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/log.txt b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/log.txt
new file mode 100644
index 0000000000..3ec32e2f33
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/log.txt
@@ -0,0 +1,132 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1
+Target: MI300X_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: None
+Hardware Blocks: ['sq', 'sqc', 'tcp', 'cpc']
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH_LEVEL
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_HITS
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F32
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_ANY
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_SCA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_MISC
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_FLAT
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_THREAD_CYCLES_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ITEMS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_MEM_VIOLATIONS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ATOMIC_RETURN
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F16
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+[profiling] Current input file: tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..293092f641
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..08439eedce
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..6cca322d4e
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..e527ad31ba
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..3f8e04adb3
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_0.txt b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..95aad2cecb
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD GRBM_COUNT GRBM_GUI_ACTIVE TCP_GATE_EN1_sum TCP_GATE_EN2_sum TCP_TD_TCP_STALL_CYCLES_sum TCP_TCR_TCP_STALL_CYCLES_sum CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_1.txt b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..6e3d88907e
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 TCP_READ_TAGCONFLICT_STALL_CYCLES_sum TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum TCP_TA_TCP_STATE_READ_sum CPC_CPC_TCIU_BUSY CPC_CPC_TCIU_IDLE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_10.txt b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..21c59688f7
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_11.txt b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..df6d67d7b7
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_12.txt b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..6e5320c11c
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_2.txt b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..f6e2bfccfb
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 TCP_VOLATILE_sum TCP_TOTAL_ACCESSES_sum TCP_TOTAL_READ_sum TCP_TOTAL_WRITE_sum CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_3.txt b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..3e10cc91be
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS TCP_TOTAL_ATOMIC_WITH_RET_sum TCP_TOTAL_ATOMIC_WITHOUT_RET_sum TCP_TOTAL_WRITEBACK_INVALIDATES_sum TCP_TOTAL_CACHE_ACCESSES_sum CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_4.txt b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..e75b3a3f75
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAIT_ANY SQ_WAIT_INST_ANY SQ_ACTIVE_INST_ANY SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU TCP_UTCL1_TRANSLATION_MISS_sum TCP_UTCL1_TRANSLATION_HIT_sum TCP_UTCL1_PERMISSION_MISS_sum TCP_UTCL1_REQUEST_sum CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_5.txt b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..a070a8a538
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_SCA SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU TCP_TCC_READ_REQ_sum TCP_TCC_WRITE_REQ_sum TCP_TCC_ATOMIC_WITH_RET_REQ_sum TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum CPC_ME1_DC0_SPI_BUSY
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_6.txt b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..a08bda1a6c
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_THREAD_CYCLES_VALU SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 TCP_TCC_NC_READ_REQ_sum TCP_TCC_NC_WRITE_REQ_sum TCP_TCC_NC_ATOMIC_REQ_sum TCP_TCC_UC_READ_REQ_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_7.txt b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..19684bbe33
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED TCP_TCC_UC_WRITE_REQ_sum TCP_TCC_UC_ATOMIC_REQ_sum TCP_TCC_CC_READ_REQ_sum TCP_TCC_CC_WRITE_REQ_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_8.txt b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..89b4b997e8
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES TCP_TCC_CC_ATOMIC_REQ_sum TCP_TCC_RW_READ_REQ_sum TCP_TCC_RW_WRITE_REQ_sum TCP_TCC_RW_ATOMIC_REQ_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_9.txt b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..60ceab315a
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ TCP_PENDING_STALL_CYCLES_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/timestamps.txt b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..676cca1b80
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/pmc_perf.csv b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/pmc_perf.csv
new file mode 100644
index 0000000000..784166465e
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_1,Correlation_ID_1,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,TCP_TCC_CC_READ_REQ_sum,TCP_TCC_CC_WRITE_REQ_sum,TCP_TCC_UC_ATOMIC_REQ_sum,TCP_TCC_UC_WRITE_REQ_sum,Wave_Size_2,Correlation_ID_2,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,TCP_TCC_CC_ATOMIC_REQ_sum,TCP_TCC_RW_ATOMIC_REQ_sum,TCP_TCC_RW_READ_REQ_sum,TCP_TCC_RW_WRITE_REQ_sum,Wave_Size_3,Correlation_ID_3,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,CPC_CPC_STAT_STALL,CPC_UTCL1_STALL_ON_TRANSLATION,TCP_TOTAL_ACCESSES_sum,TCP_TOTAL_READ_sum,TCP_TOTAL_WRITE_sum,TCP_VOLATILE_sum,Wave_Size_4,Correlation_ID_4,SQ_INSTS_BRANCH,SQ_INSTS_SENDMSG,SQ_WAIT_ANY,SQ_WAIT_INST_ANY,SQ_ACTIVE_INST_ANY,SQ_ACTIVE_INST_VMEM,SQ_ACTIVE_INST_LDS,SQ_ACTIVE_INST_VALU,CPC_CPC_UTCL2IU_STALL,CPC_ME1_BUSY_FOR_PACKET_DECODE,TCP_UTCL1_PERMISSION_MISS_sum,TCP_UTCL1_REQUEST_sum,TCP_UTCL1_TRANSLATION_HIT_sum,TCP_UTCL1_TRANSLATION_MISS_sum,Wave_Size_5,Correlation_ID_5,SQC_DCACHE_REQ_READ_2,SQC_DCACHE_REQ_READ_4,Wave_Size_6,Correlation_ID_6,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_BUSY_CU_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_INSTS_VALU_CVT,SQ_INSTS_VMEM_WR,SQ_INSTS_VMEM_RD,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_CPC_STAT_BUSY,CPC_CPC_STAT_IDLE,TCP_GATE_EN1_sum,TCP_GATE_EN2_sum,TCP_TCR_TCP_STALL_CYCLES_sum,TCP_TD_TCP_STALL_CYCLES_sum,Wave_Size_7,Correlation_ID_7,SQ_THREAD_CYCLES_VALU,SQ_IFETCH,SQ_LDS_BANK_CONFLICT,SQ_LDS_ADDR_CONFLICT,SQ_LDS_UNALIGNED_STALL,SQ_WAVES_EQ_64,SQ_WAVES_LT_64,SQ_WAVES_LT_48,TCP_TCC_NC_ATOMIC_REQ_sum,TCP_TCC_NC_READ_REQ_sum,TCP_TCC_NC_WRITE_REQ_sum,TCP_TCC_UC_READ_REQ_sum,Wave_Size_8,Correlation_ID_8,SQ_INSTS_VMEM,SQ_INSTS_SALU,SQ_INSTS_VSKIPPED,SQ_INSTS,SQ_INSTS_VALU,SQ_INSTS_VALU_ADD_F16,SQ_INSTS_VALU_MUL_F16,SQ_INSTS_VALU_FMA_F16,CPC_CPC_TCIU_BUSY,CPC_CPC_TCIU_IDLE,TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum,TCP_READ_TAGCONFLICT_STALL_CYCLES_sum,TCP_TA_TCP_STATE_READ_sum,TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum,Wave_Size_9,Correlation_ID_9,SQ_INSTS_VALU_MFMA_MOPS_I8,SQ_INSTS_VALU_MFMA_MOPS_F16,SQ_INSTS_VALU_MFMA_MOPS_BF16,SQ_INSTS_VALU_MFMA_MOPS_F32,SQ_INSTS_VALU_MFMA_MOPS_F64,SQC_TC_INST_REQ,SQC_TC_DATA_READ_REQ,SQC_TC_DATA_WRITE_REQ,TCP_PENDING_STALL_CYCLES_sum,Wave_Size_10,Correlation_ID_10,SQ_INSTS_VALU_TRANS_F64,SQ_INSTS_VALU_INT32,SQ_INSTS_VALU_INT64,SQ_INSTS_SMEM,SQ_INSTS_FLAT,SQ_INSTS_LDS,SQ_INSTS_GDS,SQ_INSTS_EXP_GDS,CPC_CPC_UTCL2IU_BUSY,CPC_CPC_UTCL2IU_IDLE,TCP_TOTAL_ATOMIC_WITHOUT_RET_sum,TCP_TOTAL_ATOMIC_WITH_RET_sum,TCP_TOTAL_CACHE_ACCESSES_sum,TCP_TOTAL_WRITEBACK_INVALIDATES_sum,Wave_Size_11,Correlation_ID_11,SQC_TC_DATA_ATOMIC_REQ,SQC_TC_STALL,SQC_TC_REQ,SQC_DCACHE_REQ_READ_16,SQC_ICACHE_REQ,SQC_ICACHE_HITS,SQC_ICACHE_MISSES,SQC_ICACHE_MISSES_DUPLICATE,Wave_Size_12,Correlation_ID_12,SQ_ACTIVE_INST_SCA,SQ_ACTIVE_INST_EXP_GDS,SQ_ACTIVE_INST_MISC,SQ_ACTIVE_INST_FLAT,SQ_INST_CYCLES_VMEM_WR,SQ_INST_CYCLES_VMEM_RD,SQ_INST_CYCLES_SMEM,SQ_INST_CYCLES_SALU,CPC_ME1_DC0_SPI_BUSY,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,TCP_TCC_READ_REQ_sum,TCP_TCC_WRITE_REQ_sum,Start_Timestamp,End_Timestamp
+0,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,2709496.0,0.0,0.0,65536.0,60576.0,160.0,4800.0,32768.0,64,0,0.0,0.0,1048576.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,131072.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,65536.0,131072.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,1033497.0,696.0,2097152.0,1048576.0,1048576.0,2097152.0,64,0,16384.0,16384.0,31032382.0,8098470.0,278528.0,0.0,0.0,98304.0,0.0,1241393.0,0.0,524288.0,447435.0,2246.0,64,0,32768.0,0.0,64,0,5628704.0,612405.0,5312260.0,16384.0,37637116.0,0.0,16384.0,16384.0,1407176.0,1407176.0,1407176.0,0.0,6811180.0,1499578.0,0.0,1896.0,64,0,6291456.0,65536.0,0.0,0.0,0.0,16384.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,32768.0,49152.0,0.0,327680.0,98304.0,0.0,0.0,0.0,1586.0,1425904.0,0.0,0.0,32768.0,0.0,64,0,0.0,0.0,0.0,0.0,0.0,640.0,160.0,0.0,1220427.0,64,0,0.0,49152.0,32768.0,65536.0,32768.0,0.0,0.0,0.0,680.0,1441800.0,0.0,0.0,524288.0,304.0,64,0,0.0,0.0,800.0,0.0,65536.0,61742.0,160.0,3634.0,64,0,114688.0,0.0,32768.0,32768.0,16384.0,16384.0,65536.0,49152.0,134651.0,0.0,0.0,65536.0,131072.0,716120136311404,716120136328043
+1,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,2870032.0,0.0,0.0,65536.0,60576.0,160.0,4800.0,32768.0,64,0,0.0,0.0,1048576.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,131072.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,65536.0,131072.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,974969.0,10794.0,2097152.0,1048576.0,1048576.0,2097152.0,64,0,16384.0,16384.0,26947097.0,7318752.0,278528.0,0.0,0.0,98304.0,0.0,1157949.0,0.0,524288.0,445090.0,2300.0,64,0,32768.0,0.0,64,0,5216452.0,480624.0,4284296.0,16384.0,29324665.0,0.0,16384.0,16384.0,1304113.0,1304113.0,1304113.0,0.0,5537454.0,1092638.0,0.0,684.0,64,0,6291456.0,65536.0,0.0,0.0,0.0,16384.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,32768.0,49152.0,0.0,327680.0,98304.0,0.0,0.0,0.0,1586.0,1349518.0,0.0,0.0,32768.0,0.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,160.0,0.0,912612.0,64,0,0.0,49152.0,32768.0,65536.0,32768.0,0.0,0.0,0.0,12503.0,1332597.0,0.0,0.0,524288.0,304.0,64,0,0.0,0.0,160.0,0.0,65536.0,65536.0,0.0,0.0,64,0,114688.0,0.0,32768.0,32768.0,16384.0,16384.0,65536.0,49152.0,114272.0,0.0,0.0,65536.0,131072.0,716120136350321,716120136363961
+2,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,2758064.0,0.0,0.0,65536.0,60576.0,160.0,4800.0,32768.0,64,0,0.0,0.0,1048576.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,131072.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,65536.0,131072.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,949457.0,7595.0,2097152.0,1048576.0,1048576.0,2097152.0,64,0,16384.0,16384.0,25596476.0,7128492.0,278528.0,0.0,0.0,98304.0,0.0,1137352.0,0.0,524288.0,446401.0,2270.0,64,0,32768.0,0.0,64,0,5196964.0,482961.0,4291353.0,16384.0,29508793.0,0.0,16384.0,16384.0,1299241.0,1299241.0,1299241.0,0.0,5552832.0,1113222.0,0.0,1037.0,64,0,6291456.0,65536.0,0.0,0.0,0.0,16384.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,32768.0,49152.0,0.0,327680.0,98304.0,0.0,0.0,0.0,1586.0,1355566.0,0.0,0.0,32768.0,0.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,160.0,0.0,929243.0,64,0,0.0,49152.0,32768.0,65536.0,32768.0,0.0,0.0,0.0,10785.0,1372707.0,0.0,0.0,524288.0,304.0,64,0,0.0,0.0,160.0,0.0,65536.0,65536.0,0.0,0.0,64,0,114688.0,0.0,32768.0,32768.0,16384.0,16384.0,65536.0,49152.0,110740.0,0.0,0.0,65536.0,131072.0,716120136384280,716120136398120
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/sysinfo.csv b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/sysinfo.csv
new file mode 100644
index 0000000000..56b9feb8ae
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+ipblocks_SQ_SQC_TCP_CPC,./tests/vcopy -n 1048576 -b 256 -i 3,sq|sqc|tcp|cpc,Wed 29 May 2024 11:58:54 AM  (CDT),2,splinter-126-wr-c6,AMD Ryzen 9 7950X 16-Core Processor,"American Megatrends International, LLC.VS2683299N.FD",Ubuntu 22.04.4 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,114656528,,6.2.0-13611,113-MI3SRIOV-001,SPX,NPS1,MI300X_A1,gfx942,32,4096,304,4,32,64,1024,32,2100,1300,2100,1300,128,32,160,4,5324.8,8
diff --git a/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/timestamps.csv b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/timestamps.csv
new file mode 100644
index 0000000000..ec100e0a95
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_SQC_TCP_CPC/MI300X_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,60633,1,962471,962471,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716120136311404,716120136328043,0
+2,60633,1,962471,962471,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716120136350321,716120136363961,0
+3,60633,1,962471,962471,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716120136384280,716120136398120,0
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300A_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..189a989526
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,11995,1,143099,143099,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73362565680302,73362565689636,0,215591.0,215591.0,16384.0,65536.0,28678.0,2302288.0
+1,11995,1,143099,143099,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73362565707704,73362565713993,0,192478.0,192478.0,16384.0,65536.0,13032.0,1048660.0
+2,11995,1,143099,143099,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73362565730138,73362565736467,0,166497.0,166497.0,16384.0,65536.0,13000.0,1049396.0
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300A_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..674a08df5b
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,11995,1,143110,143110,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73362565680302,73362565689636,0,0.0,0.0,0.0
+1,11995,1,143110,143110,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73362565707704,73362565713993,0,0.0,0.0,0.0
+2,11995,1,143110,143110,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73362565730138,73362565736467,0,0.0,0.0,0.0
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300A_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..9f2f67f71b
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,143121,143121,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73362565680302,73362565689636,0,65536.0,410366.0,32696736.0
+1,11995,1,143121,143121,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73362565707704,73362565713993,0,65536.0,285570.0,22832368.0
+2,11995,1,143121,143121,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73362565730138,73362565736467,0,65536.0,185264.0,14851944.0
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300A_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..d20d4df688
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,143132,143132,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73362565680302,73362565689636,0,32768.0,538035.0,43038784.0
+1,11995,1,143132,143132,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73362565707704,73362565713993,0,32768.0,420201.0,33610592.0
+2,11995,1,143132,143132,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73362565730138,73362565736467,0,32768.0,420681.0,33653252.0
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300A_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..0294efc031
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,11995,1,143143,143143,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73362565680302,73362565689636,0,222621.0,222621.0,128947.0,890484.0,16384.0,13986389.0,263521.0,0.0,56368820.0
+1,11995,1,143143,143143,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73362565707704,73362565713993,0,197260.0,197260.0,113874.0,789040.0,16384.0,10888181.0,201570.0,0.0,43948564.0
+2,11995,1,143143,143143,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73362565730138,73362565736467,0,178997.0,178997.0,98798.0,715988.0,16384.0,10365733.0,195169.0,0.0,41858744.0
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300A_A1/log.txt b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/log.txt
new file mode 100644
index 0000000000..219c48d8ae
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/log.txt
@@ -0,0 +1,175 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/ipblocks_SQ_TA/MI300A_A1
+Target: MI300A_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: None
+Hardware Blocks: ['sq', 'ta']
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+[profiling] Current input file: tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH_LEVEL
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+[profiling] Current input file: tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+[profiling] Current input file: tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+[profiling] Current input file: tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+[profiling] Current input file: tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LEVEL_WAVES
+[profiling] Current input file: tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_CVT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_WR
+[profiling] Current input file: tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F16
+[profiling] Current input file: tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_HITS
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_MISSES
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_MISSES_DUPLICATE
+[profiling] Current input file: tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_HITS
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES_DUPLICATE
+[profiling] Current input file: tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F64
+[profiling] Current input file: tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT64
+[profiling] Current input file: tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_VALU
+[profiling] Current input file: tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_SCA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_MISC
+[profiling] Current input file: tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_THREAD_CYCLES_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ADDR_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_UNALIGNED_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_EQ_64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_48
+[profiling] Current input file: tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ITEMS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_MEM_VIOLATIONS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ATOMIC_RETURN
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_IDX_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_RESTORED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_SAVED
+[profiling] Current input file: tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+[profiling] Current input file: tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+[profiling] Current input file: tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..293092f641
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..08439eedce
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..6cca322d4e
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..e527ad31ba
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..3f8e04adb3
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_0.txt b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..5e4c478473
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD GRBM_COUNT GRBM_GUI_ACTIVE TA_TA_BUSY_sum TA_BUFFER_WAVEFRONTS_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_1.txt b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..afaef3c64c
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 TA_BUFFER_READ_WAVEFRONTS_sum TA_BUFFER_WRITE_WAVEFRONTS_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_10.txt b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..21c59688f7
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_11.txt b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..df6d67d7b7
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_12.txt b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..6e5320c11c
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_2.txt b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..67c0574797
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 TA_BUFFER_ATOMIC_WAVEFRONTS_sum TA_BUFFER_TOTAL_CYCLES_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_3.txt b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..1e80425d43
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_4.txt b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..448bf0930c
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAIT_ANY SQ_WAIT_INST_ANY SQ_ACTIVE_INST_ANY SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_TOTAL_WAVEFRONTS_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_5.txt b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..38f4ee36fd
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_SCA SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_6.txt b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..c7de19208b
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_THREAD_CYCLES_VALU SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_7.txt b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..eb72f3a2c7
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_8.txt b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..f01548a76d
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_9.txt b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..970806d4fb
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/timestamps.txt b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..676cca1b80
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300A_A1/pmc_perf.csv b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/pmc_perf.csv
new file mode 100644
index 0000000000..e05a1ea079
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SQ_INSTS_BRANCH,SQ_INSTS_SENDMSG,SQ_WAIT_ANY,SQ_WAIT_INST_ANY,SQ_ACTIVE_INST_ANY,SQ_ACTIVE_INST_VMEM,SQ_ACTIVE_INST_LDS,SQ_ACTIVE_INST_VALU,TA_ADDR_STALLED_BY_TC_CYCLES_sum,TA_TOTAL_WAVEFRONTS_sum,Wave_Size_1,Correlation_ID_1,SQ_THREAD_CYCLES_VALU,SQ_IFETCH,SQ_LDS_BANK_CONFLICT,SQ_LDS_ADDR_CONFLICT,SQ_LDS_UNALIGNED_STALL,SQ_WAVES_EQ_64,SQ_WAVES_LT_64,SQ_WAVES_LT_48,TA_FLAT_READ_WAVEFRONTS_sum,TA_FLAT_WAVEFRONTS_sum,Wave_Size_2,Correlation_ID_2,SQ_INSTS_VALU_TRANS_F64,SQ_INSTS_VALU_INT32,SQ_INSTS_VALU_INT64,SQ_INSTS_SMEM,SQ_INSTS_FLAT,SQ_INSTS_LDS,SQ_INSTS_GDS,SQ_INSTS_EXP_GDS,TA_BUFFER_COALESCED_READ_CYCLES_sum,TA_BUFFER_COALESCED_WRITE_CYCLES_sum,Wave_Size_3,Correlation_ID_3,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,TA_FLAT_ATOMIC_WAVEFRONTS_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,Wave_Size_4,Correlation_ID_4,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,TA_BUFFER_TOTAL_CYCLES_sum,Wave_Size_5,Correlation_ID_5,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_6,Correlation_ID_6,SQC_TC_DATA_ATOMIC_REQ,SQC_TC_STALL,SQC_TC_REQ,SQC_DCACHE_REQ_READ_16,SQC_ICACHE_REQ,SQC_ICACHE_HITS,SQC_ICACHE_MISSES,SQC_ICACHE_MISSES_DUPLICATE,Wave_Size_7,Correlation_ID_7,SQ_INSTS_VALU_MFMA_MOPS_I8,SQ_INSTS_VALU_MFMA_MOPS_F16,SQ_INSTS_VALU_MFMA_MOPS_BF16,SQ_INSTS_VALU_MFMA_MOPS_F32,SQ_INSTS_VALU_MFMA_MOPS_F64,SQC_TC_INST_REQ,SQC_TC_DATA_READ_REQ,SQC_TC_DATA_WRITE_REQ,Wave_Size_8,Correlation_ID_8,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,Wave_Size_9,Correlation_ID_9,SQC_DCACHE_REQ_READ_2,SQC_DCACHE_REQ_READ_4,Wave_Size_10,Correlation_ID_10,SQ_ACTIVE_INST_SCA,SQ_ACTIVE_INST_EXP_GDS,SQ_ACTIVE_INST_MISC,SQ_ACTIVE_INST_FLAT,SQ_INST_CYCLES_VMEM_WR,SQ_INST_CYCLES_VMEM_RD,SQ_INST_CYCLES_SMEM,SQ_INST_CYCLES_SALU,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,Wave_Size_11,Correlation_ID_11,SQ_INSTS_VMEM,SQ_INSTS_SALU,SQ_INSTS_VSKIPPED,SQ_INSTS,SQ_INSTS_VALU,SQ_INSTS_VALU_ADD_F16,SQ_INSTS_VALU_MUL_F16,SQ_INSTS_VALU_FMA_F16,TA_BUFFER_READ_WAVEFRONTS_sum,TA_BUFFER_WRITE_WAVEFRONTS_sum,Wave_Size_12,Correlation_ID_12,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_BUSY_CU_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_INSTS_VALU_CVT,SQ_INSTS_VMEM_WR,SQ_INSTS_VMEM_RD,GRBM_COUNT,GRBM_GUI_ACTIVE,TA_BUFFER_WAVEFRONTS_sum,TA_TA_BUSY_sum,Start_Timestamp,End_Timestamp
+0,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,16384.0,16384.0,12516090.0,1173873.0,278528.0,0.0,0.0,98304.0,115488.0,32768.0,64,0,6291456.0,65536.0,0.0,0.0,0.0,16384.0,0.0,0.0,16384.0,32768.0,64,0,0.0,49152.0,32768.0,65536.0,32768.0,0.0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,1048576.0,0.0,0.0,0.0,0.0,0.0,0.0,16384.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,139574.0,0.0,0.0,65536.0,61816.0,120.0,3600.0,32768.0,64,0,0.0,0.0,480.0,0.0,65536.0,62607.0,120.0,2809.0,64,0,0.0,0.0,0.0,0.0,0.0,360.0,120.0,0.0,64,0,131072.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,32768.0,0.0,64,0,114688.0,0.0,32768.0,32768.0,16384.0,16384.0,65536.0,49152.0,0.0,596516.0,64,0,32768.0,49152.0,0.0,327680.0,98304.0,0.0,0.0,0.0,0.0,0.0,64,0,1293988.0,254640.0,2210075.0,16384.0,14358434.0,0.0,16384.0,16384.0,323497.0,323497.0,0.0,1139823.0,73362565680302,73362565689636
+1,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,16384.0,16384.0,9876103.0,819828.0,278528.0,0.0,0.0,98304.0,104688.0,32768.0,64,0,6291456.0,65536.0,0.0,0.0,0.0,16384.0,0.0,0.0,16384.0,32768.0,64,0,0.0,49152.0,32768.0,65536.0,32768.0,0.0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,1048576.0,0.0,0.0,0.0,0.0,0.0,0.0,16384.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,151562.0,0.0,0.0,65536.0,61816.0,120.0,3600.0,32768.0,64,0,0.0,0.0,120.0,0.0,65536.0,65536.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,120.0,0.0,64,0,131072.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,32768.0,0.0,64,0,114688.0,0.0,32768.0,32768.0,16384.0,16384.0,65536.0,49152.0,0.0,512360.0,64,0,32768.0,49152.0,0.0,327680.0,98304.0,0.0,0.0,0.0,0.0,0.0,64,0,1172636.0,195350.0,1757167.0,16384.0,10528262.0,0.0,16384.0,16384.0,293159.0,293159.0,0.0,1110718.0,73362565707704,73362565713993
+2,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,16384.0,16384.0,9534209.0,605698.0,278528.0,0.0,0.0,98304.0,113243.0,32768.0,64,0,6291456.0,65536.0,0.0,0.0,0.0,16384.0,0.0,0.0,16384.0,32768.0,64,0,0.0,49152.0,32768.0,65536.0,32768.0,0.0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,1048576.0,0.0,0.0,0.0,0.0,0.0,0.0,16384.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,126154.0,0.0,0.0,65536.0,61816.0,120.0,3600.0,32768.0,64,0,0.0,0.0,120.0,0.0,65536.0,65536.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,120.0,0.0,64,0,131072.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,32768.0,0.0,64,0,114688.0,0.0,32768.0,32768.0,16384.0,16384.0,65536.0,49152.0,0.0,461099.0,64,0,32768.0,49152.0,0.0,327680.0,98304.0,0.0,0.0,0.0,0.0,0.0,64,0,1129232.0,190708.0,1711440.0,16384.0,10233000.0,0.0,16384.0,16384.0,282308.0,282308.0,0.0,1120641.0,73362565730138,73362565736467
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300A_A1/sysinfo.csv b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/sysinfo.csv
new file mode 100644
index 0000000000..e7e5150aed
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+ipblocks_SQ_TA,./tests/vcopy -n 1048576 -b 256 -i 3,sq|ta,Wed 29 May 2024 01:31:31 PM  (CDT),2,sh5-1w300-rg3-3,AMD Instinct MI300A Accelerator,"American Megatrends International, LLC.RMO1002DS",Ubuntu 22.04.2 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,131174852,,6.1.2-110,N/A,SPX,NPS1,MI300A_A1,gfx942,32,24576,228,4,24,64,1024,32,2100,1300,2100,1300,96,32,120,4,5324.8,6
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300A_A1/timestamps.csv b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/timestamps.csv
new file mode 100644
index 0000000000..c1b9bc03cc
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300A_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,11995,1,143298,143298,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73362565680302,73362565689636,0
+2,11995,1,143298,143298,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73362565707704,73362565713993,0
+3,11995,1,143298,143298,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73362565730138,73362565736467,0
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300X_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..7b5c3a285c
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,60633,1,961320,961320,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716062741676325,716062741693325,0,411031.0,411031.0,16384.0,65536.0,29692.0,2372332.0
+1,60633,1,961320,961320,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716062741714483,716062741728363,0,355126.0,355126.0,16384.0,65536.0,13145.0,1048576.0
+2,60633,1,961320,961320,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716062741749163,716062741762363,0,346134.0,346134.0,16384.0,65536.0,13028.0,1048584.0
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300X_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..a431475b32
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,60633,1,961331,961331,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716062741676325,716062741693325,0,0.0,0.0,0.0
+1,60633,1,961331,961331,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716062741714483,716062741728363,0,0.0,0.0,0.0
+2,60633,1,961331,961331,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716062741749163,716062741762363,0,0.0,0.0,0.0
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300X_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..2b2cc8e79f
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,961342,961342,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716062741676325,716062741693325,0,65536.0,4145922.0,331758616.0
+1,60633,1,961342,961342,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716062741714483,716062741728363,0,65536.0,3717138.0,297380952.0
+2,60633,1,961342,961342,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716062741749163,716062741762363,0,65536.0,3832206.0,306590720.0
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300X_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..beda55e27f
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,961353,961353,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716062741676325,716062741693325,0,32768.0,515042.0,41193908.0
+1,60633,1,961353,961353,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716062741714483,716062741728363,0,32768.0,339877.0,27188564.0
+2,60633,1,961353,961353,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716062741749163,716062741762363,0,32768.0,343169.0,27453048.0
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300X_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..6c7968b678
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,60633,1,961364,961364,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716062741676325,716062741693325,0,486613.0,486613.0,281051.0,1946452.0,16384.0,39780263.0,654393.0,0.0,159455076.0
+1,60633,1,961364,961364,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716062741714483,716062741728363,0,397285.0,397285.0,208419.0,1589140.0,16384.0,34522332.0,549242.0,0.0,138446904.0
+2,60633,1,961364,961364,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716062741749163,716062741762363,0,442939.0,442939.0,254428.0,1771756.0,16384.0,34371820.0,550942.0,0.0,137841760.0
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300X_A1/log.txt b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/log.txt
new file mode 100644
index 0000000000..073d536242
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/log.txt
@@ -0,0 +1,141 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/ipblocks_SQ_TA/MI300X_A1
+Target: MI300X_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: None
+Hardware Blocks: ['sq', 'ta']
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+[profiling] Current input file: tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH_LEVEL
+[profiling] Current input file: tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+[profiling] Current input file: tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+[profiling] Current input file: tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+[profiling] Current input file: tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+[profiling] Current input file: tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+[profiling] Current input file: tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU
+[profiling] Current input file: tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_REQ
+[profiling] Current input file: tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_HITS
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES_DUPLICATE
+[profiling] Current input file: tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+[profiling] Current input file: tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F64
+[profiling] Current input file: tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_FLAT
+[profiling] Current input file: tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
+[profiling] Current input file: tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_SCA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_MISC
+[profiling] Current input file: tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_THREAD_CYCLES_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ADDR_CONFLICT
+[profiling] Current input file: tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ITEMS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_MEM_VIOLATIONS
+[profiling] Current input file: tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_BF16
+[profiling] Current input file: tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_BF16
+[profiling] Current input file: tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..293092f641
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..08439eedce
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..6cca322d4e
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..e527ad31ba
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..3f8e04adb3
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_0.txt b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..5e4c478473
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD GRBM_COUNT GRBM_GUI_ACTIVE TA_TA_BUSY_sum TA_BUFFER_WAVEFRONTS_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_1.txt b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..afaef3c64c
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 TA_BUFFER_READ_WAVEFRONTS_sum TA_BUFFER_WRITE_WAVEFRONTS_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_10.txt b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..21c59688f7
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_11.txt b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..df6d67d7b7
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_12.txt b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..6e5320c11c
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_2.txt b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..67c0574797
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 TA_BUFFER_ATOMIC_WAVEFRONTS_sum TA_BUFFER_TOTAL_CYCLES_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_3.txt b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..1e80425d43
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_4.txt b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..448bf0930c
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAIT_ANY SQ_WAIT_INST_ANY SQ_ACTIVE_INST_ANY SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_TOTAL_WAVEFRONTS_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_5.txt b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..38f4ee36fd
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_SCA SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_6.txt b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..c7de19208b
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_THREAD_CYCLES_VALU SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_7.txt b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..eb72f3a2c7
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_8.txt b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..f01548a76d
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_9.txt b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..970806d4fb
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/timestamps.txt b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..676cca1b80
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300X_A1/pmc_perf.csv b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/pmc_perf.csv
new file mode 100644
index 0000000000..af51ee1aff
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_1,Correlation_ID_1,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,TA_FLAT_ATOMIC_WAVEFRONTS_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,Wave_Size_2,Correlation_ID_2,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,Wave_Size_3,Correlation_ID_3,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,TA_BUFFER_TOTAL_CYCLES_sum,Wave_Size_4,Correlation_ID_4,SQ_INSTS_BRANCH,SQ_INSTS_SENDMSG,SQ_WAIT_ANY,SQ_WAIT_INST_ANY,SQ_ACTIVE_INST_ANY,SQ_ACTIVE_INST_VMEM,SQ_ACTIVE_INST_LDS,SQ_ACTIVE_INST_VALU,TA_ADDR_STALLED_BY_TC_CYCLES_sum,TA_TOTAL_WAVEFRONTS_sum,Wave_Size_5,Correlation_ID_5,SQC_DCACHE_REQ_READ_2,SQC_DCACHE_REQ_READ_4,Wave_Size_6,Correlation_ID_6,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_BUSY_CU_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_INSTS_VALU_CVT,SQ_INSTS_VMEM_WR,SQ_INSTS_VMEM_RD,GRBM_COUNT,GRBM_GUI_ACTIVE,TA_BUFFER_WAVEFRONTS_sum,TA_TA_BUSY_sum,Wave_Size_7,Correlation_ID_7,SQ_THREAD_CYCLES_VALU,SQ_IFETCH,SQ_LDS_BANK_CONFLICT,SQ_LDS_ADDR_CONFLICT,SQ_LDS_UNALIGNED_STALL,SQ_WAVES_EQ_64,SQ_WAVES_LT_64,SQ_WAVES_LT_48,TA_FLAT_READ_WAVEFRONTS_sum,TA_FLAT_WAVEFRONTS_sum,Wave_Size_8,Correlation_ID_8,SQ_INSTS_VMEM,SQ_INSTS_SALU,SQ_INSTS_VSKIPPED,SQ_INSTS,SQ_INSTS_VALU,SQ_INSTS_VALU_ADD_F16,SQ_INSTS_VALU_MUL_F16,SQ_INSTS_VALU_FMA_F16,TA_BUFFER_READ_WAVEFRONTS_sum,TA_BUFFER_WRITE_WAVEFRONTS_sum,Wave_Size_9,Correlation_ID_9,SQ_INSTS_VALU_MFMA_MOPS_I8,SQ_INSTS_VALU_MFMA_MOPS_F16,SQ_INSTS_VALU_MFMA_MOPS_BF16,SQ_INSTS_VALU_MFMA_MOPS_F32,SQ_INSTS_VALU_MFMA_MOPS_F64,SQC_TC_INST_REQ,SQC_TC_DATA_READ_REQ,SQC_TC_DATA_WRITE_REQ,Wave_Size_10,Correlation_ID_10,SQ_INSTS_VALU_TRANS_F64,SQ_INSTS_VALU_INT32,SQ_INSTS_VALU_INT64,SQ_INSTS_SMEM,SQ_INSTS_FLAT,SQ_INSTS_LDS,SQ_INSTS_GDS,SQ_INSTS_EXP_GDS,TA_BUFFER_COALESCED_READ_CYCLES_sum,TA_BUFFER_COALESCED_WRITE_CYCLES_sum,Wave_Size_11,Correlation_ID_11,SQC_TC_DATA_ATOMIC_REQ,SQC_TC_STALL,SQC_TC_REQ,SQC_DCACHE_REQ_READ_16,SQC_ICACHE_REQ,SQC_ICACHE_HITS,SQC_ICACHE_MISSES,SQC_ICACHE_MISSES_DUPLICATE,Wave_Size_12,Correlation_ID_12,SQ_ACTIVE_INST_SCA,SQ_ACTIVE_INST_EXP_GDS,SQ_ACTIVE_INST_MISC,SQ_ACTIVE_INST_FLAT,SQ_INST_CYCLES_VMEM_WR,SQ_INST_CYCLES_VMEM_RD,SQ_INST_CYCLES_SMEM,SQ_INST_CYCLES_SALU,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,Start_Timestamp,End_Timestamp
+0,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,2865336.0,0.0,0.0,65536.0,60576.0,160.0,4800.0,32768.0,64,0,0.0,0.0,1048576.0,0.0,0.0,0.0,0.0,0.0,0.0,16384.0,64,0,131072.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,16384.0,16384.0,27330279.0,6423179.0,278528.0,0.0,0.0,98304.0,89660.0,32768.0,64,0,32768.0,0.0,64,0,4446108.0,639053.0,5519108.0,16384.0,38775193.0,0.0,16384.0,16384.0,1111527.0,1111527.0,0.0,907949.0,64,0,6291456.0,65536.0,0.0,0.0,0.0,16384.0,0.0,0.0,16384.0,32768.0,64,0,32768.0,49152.0,0.0,327680.0,98304.0,0.0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,0.0,640.0,160.0,0.0,64,0,0.0,49152.0,32768.0,65536.0,32768.0,0.0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,800.0,0.0,65536.0,61773.0,160.0,3603.0,64,0,114688.0,0.0,32768.0,32768.0,16384.0,16384.0,65536.0,49152.0,0.0,166171.0,716062741676325,716062741693325
+1,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,2805466.0,0.0,0.0,65536.0,60576.0,160.0,4800.0,32768.0,64,0,0.0,0.0,1048576.0,0.0,0.0,0.0,0.0,0.0,0.0,16384.0,64,0,131072.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,16384.0,16384.0,24187098.0,6526031.0,278528.0,0.0,0.0,98304.0,61256.0,32768.0,64,0,32768.0,0.0,64,0,3845784.0,555959.0,4963222.0,16384.0,34526068.0,0.0,16384.0,16384.0,961446.0,961446.0,0.0,879928.0,64,0,6291456.0,65536.0,0.0,0.0,0.0,16384.0,0.0,0.0,16384.0,32768.0,64,0,32768.0,49152.0,0.0,327680.0,98304.0,0.0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,160.0,0.0,64,0,0.0,49152.0,32768.0,65536.0,32768.0,0.0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,160.0,0.0,65536.0,65536.0,0.0,0.0,64,0,114688.0,0.0,32768.0,32768.0,16384.0,16384.0,65536.0,49152.0,0.0,177007.0,716062741714483,716062741728363
+2,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,2835646.0,0.0,0.0,65536.0,60576.0,160.0,4800.0,32768.0,64,0,0.0,0.0,1048576.0,0.0,0.0,0.0,0.0,0.0,0.0,16384.0,64,0,131072.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,64,0,16384.0,16384.0,24272798.0,6562526.0,278528.0,0.0,0.0,98304.0,67888.0,32768.0,64,0,32768.0,0.0,64,0,3579104.0,521996.0,4680981.0,16384.0,32453989.0,0.0,16384.0,16384.0,894776.0,894776.0,0.0,878645.0,64,0,6291456.0,65536.0,0.0,0.0,0.0,16384.0,0.0,0.0,16384.0,32768.0,64,0,32768.0,49152.0,0.0,327680.0,98304.0,0.0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,0.0,0.0,0.0,0.0,160.0,0.0,64,0,0.0,49152.0,32768.0,65536.0,32768.0,0.0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,160.0,0.0,65536.0,65536.0,0.0,0.0,64,0,114688.0,0.0,32768.0,32768.0,16384.0,16384.0,65536.0,49152.0,0.0,171534.0,716062741749163,716062741762363
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300X_A1/sysinfo.csv b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/sysinfo.csv
new file mode 100644
index 0000000000..4d2493cdd3
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+ipblocks_SQ_TA,./tests/vcopy -n 1048576 -b 256 -i 3,sq|ta,Wed 29 May 2024 11:57:57 AM  (CDT),2,splinter-126-wr-c6,AMD Ryzen 9 7950X 16-Core Processor,"American Megatrends International, LLC.VS2683299N.FD",Ubuntu 22.04.4 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,114656528,,6.2.0-13611,113-MI3SRIOV-001,SPX,NPS1,MI300X_A1,gfx942,32,4096,304,4,32,64,1024,32,2100,1300,2100,1300,128,32,160,4,5324.8,8
diff --git a/tests/workloads/ipblocks_SQ_TA/MI300X_A1/timestamps.csv b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/timestamps.csv
new file mode 100644
index 0000000000..f3c95c30ce
--- /dev/null
+++ b/tests/workloads/ipblocks_SQ_TA/MI300X_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,60633,1,961531,961531,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716062741676325,716062741693325,0
+2,60633,1,961531,961531,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716062741714483,716062741728363,0
+3,60633,1,961531,961531,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716062741749163,716062741762363,0
diff --git a/tests/workloads/ipblocks_TA/MI300A_A1/log.txt b/tests/workloads/ipblocks_TA/MI300A_A1/log.txt
new file mode 100644
index 0000000000..4213a9906a
--- /dev/null
+++ b/tests/workloads/ipblocks_TA/MI300A_A1/log.txt
@@ -0,0 +1,114 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/ipblocks_TA/MI300A_A1
+Target: MI300A_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: None
+Hardware Blocks: ['ta']
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+[profiling] Current input file: tests/workloads/ipblocks_TA/MI300A_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - TA_TA_BUSY_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TA_BUFFER_WAVEFRONTS_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+[profiling] Current input file: tests/workloads/ipblocks_TA/MI300A_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TA_BUFFER_READ_WAVEFRONTS_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TA_BUFFER_WRITE_WAVEFRONTS_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying the output vector from the GPU to the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Releasing GPU memory
+   |-> [/opt/rocm/bin/rocprofv2] Releasing CPU memory
+   |-> [/opt/rocm/bin/rocprofv2] Results File: "tests/workloads/ipblocks_TA/MI300A_A1/out/pmc_1/results_pmc_perf_1.csv"
+   |-> [/opt/rocm/bin/rocprofv2] 
+   |-> [/opt/rocm/bin/rocprofv2] The output path for the following counters: tests/workloads/ipblocks_TA/MI300A_A1/out/pmc_1
+[profiling] Current input file: tests/workloads/ipblocks_TA/MI300A_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TA_BUFFER_ATOMIC_WAVEFRONTS_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TA_BUFFER_TOTAL_CYCLES_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+[profiling] Current input file: tests/workloads/ipblocks_TA/MI300A_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TA_BUFFER_COALESCED_READ_CYCLES_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TA_BUFFER_COALESCED_WRITE_CYCLES_sum
+[profiling] Current input file: tests/workloads/ipblocks_TA/MI300A_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TA_ADDR_STALLED_BY_TC_CYCLES_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TA_TOTAL_WAVEFRONTS_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+[profiling] Current input file: tests/workloads/ipblocks_TA/MI300A_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TA_ADDR_STALLED_BY_TD_CYCLES_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TA_DATA_STALLED_BY_TC_CYCLES_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+[profiling] Current input file: tests/workloads/ipblocks_TA/MI300A_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TA_FLAT_WAVEFRONTS_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TA_FLAT_READ_WAVEFRONTS_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+[profiling] Current input file: tests/workloads/ipblocks_TA/MI300A_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TA_FLAT_WRITE_WAVEFRONTS_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TA_FLAT_ATOMIC_WAVEFRONTS_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying the output vector from the GPU to the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Releasing GPU memory
+   |-> [/opt/rocm/bin/rocprofv2] Releasing CPU memory
+[profiling] Current input file: tests/workloads/ipblocks_TA/MI300A_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/ipblocks_TA/MI300A_A1/perfmon/pmc_perf_0.txt b/tests/workloads/ipblocks_TA/MI300A_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..96b3270b4c
--- /dev/null
+++ b/tests/workloads/ipblocks_TA/MI300A_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES GRBM_COUNT GRBM_GUI_ACTIVE TA_TA_BUSY_sum TA_BUFFER_WAVEFRONTS_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TA/MI300A_A1/perfmon/pmc_perf_1.txt b/tests/workloads/ipblocks_TA/MI300A_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..a397846c1a
--- /dev/null
+++ b/tests/workloads/ipblocks_TA/MI300A_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  TA_BUFFER_READ_WAVEFRONTS_sum TA_BUFFER_WRITE_WAVEFRONTS_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TA/MI300A_A1/perfmon/pmc_perf_2.txt b/tests/workloads/ipblocks_TA/MI300A_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..e037603986
--- /dev/null
+++ b/tests/workloads/ipblocks_TA/MI300A_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  TA_BUFFER_ATOMIC_WAVEFRONTS_sum TA_BUFFER_TOTAL_CYCLES_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TA/MI300A_A1/perfmon/pmc_perf_3.txt b/tests/workloads/ipblocks_TA/MI300A_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..ee090ea5d3
--- /dev/null
+++ b/tests/workloads/ipblocks_TA/MI300A_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TA/MI300A_A1/perfmon/pmc_perf_4.txt b/tests/workloads/ipblocks_TA/MI300A_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..b4e096fbcc
--- /dev/null
+++ b/tests/workloads/ipblocks_TA/MI300A_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_TOTAL_WAVEFRONTS_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TA/MI300A_A1/perfmon/pmc_perf_5.txt b/tests/workloads/ipblocks_TA/MI300A_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..8f2eb4c560
--- /dev/null
+++ b/tests/workloads/ipblocks_TA/MI300A_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TA/MI300A_A1/perfmon/pmc_perf_6.txt b/tests/workloads/ipblocks_TA/MI300A_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..340f00c69e
--- /dev/null
+++ b/tests/workloads/ipblocks_TA/MI300A_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TA/MI300A_A1/perfmon/pmc_perf_7.txt b/tests/workloads/ipblocks_TA/MI300A_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..7befec94eb
--- /dev/null
+++ b/tests/workloads/ipblocks_TA/MI300A_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TA/MI300A_A1/perfmon/timestamps.txt b/tests/workloads/ipblocks_TA/MI300A_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..676cca1b80
--- /dev/null
+++ b/tests/workloads/ipblocks_TA/MI300A_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TA/MI300A_A1/pmc_perf.csv b/tests/workloads/ipblocks_TA/MI300A_A1/pmc_perf.csv
new file mode 100644
index 0000000000..6c14dfb637
--- /dev/null
+++ b/tests/workloads/ipblocks_TA/MI300A_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,TA_ADDR_STALLED_BY_TC_CYCLES_sum,TA_TOTAL_WAVEFRONTS_sum,Wave_Size_1,Correlation_ID_1,TA_FLAT_READ_WAVEFRONTS_sum,TA_FLAT_WAVEFRONTS_sum,Wave_Size_2,Correlation_ID_2,TA_BUFFER_COALESCED_READ_CYCLES_sum,TA_BUFFER_COALESCED_WRITE_CYCLES_sum,Wave_Size_3,Correlation_ID_3,TA_FLAT_ATOMIC_WAVEFRONTS_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,Wave_Size_4,Correlation_ID_4,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,TA_BUFFER_TOTAL_CYCLES_sum,Wave_Size_5,Correlation_ID_5,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,Wave_Size_6,Correlation_ID_6,TA_BUFFER_READ_WAVEFRONTS_sum,TA_BUFFER_WRITE_WAVEFRONTS_sum,Wave_Size_7,Correlation_ID_7,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_BUSY_CU_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,GRBM_COUNT,GRBM_GUI_ACTIVE,TA_BUFFER_WAVEFRONTS_sum,TA_TA_BUSY_sum,Start_Timestamp,End_Timestamp
+0,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,136650.0,32768.0,64,0,16384.0,32768.0,64,0,0.0,0.0,64,0,0.0,16384.0,64,0,0.0,0.0,64,0,0.0,328673.0,64,0,0.0,0.0,64,0,1159148.0,248317.0,2087790.0,16384.0,13362175.0,289787.0,289787.0,0.0,1059647.0,73912752730396,73912752738167
+1,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,109545.0,32768.0,64,0,16384.0,32768.0,64,0,0.0,0.0,64,0,0.0,16384.0,64,0,0.0,0.0,64,0,0.0,428974.0,64,0,0.0,0.0,64,0,1164764.0,202817.0,1824268.0,16384.0,11214355.0,291191.0,291191.0,0.0,1149557.0,73912752775865,73912752781954
+2,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,116983.0,32768.0,64,0,16384.0,32768.0,64,0,0.0,0.0,64,0,0.0,16384.0,64,0,0.0,0.0,64,0,0.0,425432.0,64,0,0.0,0.0,64,0,1115220.0,194018.0,1740672.0,16384.0,10552719.0,278805.0,278805.0,0.0,1167835.0,73912752754152,73912752760441
diff --git a/tests/workloads/ipblocks_TA/MI300A_A1/sysinfo.csv b/tests/workloads/ipblocks_TA/MI300A_A1/sysinfo.csv
new file mode 100644
index 0000000000..c8d0617047
--- /dev/null
+++ b/tests/workloads/ipblocks_TA/MI300A_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+ipblocks_TA,./tests/vcopy -n 1048576 -b 256 -i 3,ta,Wed 29 May 2024 01:40:55 PM  (CDT),2,sh5-1w300-rg3-3,AMD Instinct MI300A Accelerator,"American Megatrends International, LLC.RMO1002DS",Ubuntu 22.04.2 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,131174852,,6.1.2-110,N/A,SPX,NPS1,MI300A_A1,gfx942,32,24576,228,4,24,64,1024,32,2100,1300,2100,1300,96,32,120,4,5324.8,6
diff --git a/tests/workloads/ipblocks_TA/MI300A_A1/timestamps.csv b/tests/workloads/ipblocks_TA/MI300A_A1/timestamps.csv
new file mode 100644
index 0000000000..9afac1e70e
--- /dev/null
+++ b/tests/workloads/ipblocks_TA/MI300A_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,11995,1,149461,149461,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73912752730396,73912752738167,0
+3,11995,1,149461,149461,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73912752775865,73912752781954,0
+2,11995,1,149461,149461,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73912752754152,73912752760441,0
diff --git a/tests/workloads/ipblocks_TA/MI300X_A1/log.txt b/tests/workloads/ipblocks_TA/MI300X_A1/log.txt
new file mode 100644
index 0000000000..27d448d6aa
--- /dev/null
+++ b/tests/workloads/ipblocks_TA/MI300X_A1/log.txt
@@ -0,0 +1,69 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/ipblocks_TA/MI300X_A1
+Target: MI300X_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: None
+Hardware Blocks: ['ta']
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+[profiling] Current input file: tests/workloads/ipblocks_TA/MI300X_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+[profiling] Current input file: tests/workloads/ipblocks_TA/MI300X_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TA_BUFFER_READ_WAVEFRONTS_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TA_BUFFER_WRITE_WAVEFRONTS_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+[profiling] Current input file: tests/workloads/ipblocks_TA/MI300X_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TA_BUFFER_ATOMIC_WAVEFRONTS_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TA_BUFFER_TOTAL_CYCLES_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+[profiling] Current input file: tests/workloads/ipblocks_TA/MI300X_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TA_BUFFER_COALESCED_READ_CYCLES_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TA_BUFFER_COALESCED_WRITE_CYCLES_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+[profiling] Current input file: tests/workloads/ipblocks_TA/MI300X_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TA_ADDR_STALLED_BY_TC_CYCLES_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TA_TOTAL_WAVEFRONTS_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+[profiling] Current input file: tests/workloads/ipblocks_TA/MI300X_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TA_ADDR_STALLED_BY_TD_CYCLES_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TA_DATA_STALLED_BY_TC_CYCLES_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+[profiling] Current input file: tests/workloads/ipblocks_TA/MI300X_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TA_FLAT_WAVEFRONTS_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TA_FLAT_READ_WAVEFRONTS_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+[profiling] Current input file: tests/workloads/ipblocks_TA/MI300X_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TA_FLAT_WRITE_WAVEFRONTS_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TA_FLAT_ATOMIC_WAVEFRONTS_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/ipblocks_TA/MI300X_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/ipblocks_TA/MI300X_A1/perfmon/pmc_perf_0.txt b/tests/workloads/ipblocks_TA/MI300X_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..96b3270b4c
--- /dev/null
+++ b/tests/workloads/ipblocks_TA/MI300X_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES GRBM_COUNT GRBM_GUI_ACTIVE TA_TA_BUSY_sum TA_BUFFER_WAVEFRONTS_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TA/MI300X_A1/perfmon/pmc_perf_1.txt b/tests/workloads/ipblocks_TA/MI300X_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..a397846c1a
--- /dev/null
+++ b/tests/workloads/ipblocks_TA/MI300X_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  TA_BUFFER_READ_WAVEFRONTS_sum TA_BUFFER_WRITE_WAVEFRONTS_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TA/MI300X_A1/perfmon/pmc_perf_2.txt b/tests/workloads/ipblocks_TA/MI300X_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..e037603986
--- /dev/null
+++ b/tests/workloads/ipblocks_TA/MI300X_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  TA_BUFFER_ATOMIC_WAVEFRONTS_sum TA_BUFFER_TOTAL_CYCLES_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TA/MI300X_A1/perfmon/pmc_perf_3.txt b/tests/workloads/ipblocks_TA/MI300X_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..ee090ea5d3
--- /dev/null
+++ b/tests/workloads/ipblocks_TA/MI300X_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TA/MI300X_A1/perfmon/pmc_perf_4.txt b/tests/workloads/ipblocks_TA/MI300X_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..b4e096fbcc
--- /dev/null
+++ b/tests/workloads/ipblocks_TA/MI300X_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_TOTAL_WAVEFRONTS_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TA/MI300X_A1/perfmon/pmc_perf_5.txt b/tests/workloads/ipblocks_TA/MI300X_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..8f2eb4c560
--- /dev/null
+++ b/tests/workloads/ipblocks_TA/MI300X_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TA/MI300X_A1/perfmon/pmc_perf_6.txt b/tests/workloads/ipblocks_TA/MI300X_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..340f00c69e
--- /dev/null
+++ b/tests/workloads/ipblocks_TA/MI300X_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TA/MI300X_A1/perfmon/pmc_perf_7.txt b/tests/workloads/ipblocks_TA/MI300X_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..7befec94eb
--- /dev/null
+++ b/tests/workloads/ipblocks_TA/MI300X_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TA/MI300X_A1/perfmon/timestamps.txt b/tests/workloads/ipblocks_TA/MI300X_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..676cca1b80
--- /dev/null
+++ b/tests/workloads/ipblocks_TA/MI300X_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TA/MI300X_A1/pmc_perf.csv b/tests/workloads/ipblocks_TA/MI300X_A1/pmc_perf.csv
new file mode 100644
index 0000000000..67e7b1bcbc
--- /dev/null
+++ b/tests/workloads/ipblocks_TA/MI300X_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,TA_FLAT_ATOMIC_WAVEFRONTS_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,Wave_Size_1,Correlation_ID_1,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,TA_BUFFER_TOTAL_CYCLES_sum,Wave_Size_2,Correlation_ID_2,TA_ADDR_STALLED_BY_TC_CYCLES_sum,TA_TOTAL_WAVEFRONTS_sum,Wave_Size_3,Correlation_ID_3,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_BUSY_CU_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,GRBM_COUNT,GRBM_GUI_ACTIVE,TA_BUFFER_WAVEFRONTS_sum,TA_TA_BUSY_sum,Wave_Size_4,Correlation_ID_4,TA_FLAT_READ_WAVEFRONTS_sum,TA_FLAT_WAVEFRONTS_sum,Wave_Size_5,Correlation_ID_5,TA_BUFFER_READ_WAVEFRONTS_sum,TA_BUFFER_WRITE_WAVEFRONTS_sum,Wave_Size_6,Correlation_ID_6,TA_BUFFER_COALESCED_READ_CYCLES_sum,TA_BUFFER_COALESCED_WRITE_CYCLES_sum,Wave_Size_7,Correlation_ID_7,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,Start_Timestamp,End_Timestamp
+0,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,0.0,16384.0,64,0,0.0,0.0,64,0,95379.0,32768.0,64,0,3714440.0,606805.0,5291692.0,16384.0,35976111.0,928610.0,928610.0,0.0,891424.0,64,0,16384.0,32768.0,64,0,0.0,0.0,64,0,0.0,0.0,64,0,0.0,205821.0,716425881043566,716425881060085
+1,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,0.0,16384.0,64,0,0.0,0.0,64,0,67463.0,32768.0,64,0,3635024.0,525698.0,4729516.0,16384.0,32739852.0,908756.0,908756.0,0.0,863009.0,64,0,16384.0,32768.0,64,0,0.0,0.0,64,0,0.0,0.0,64,0,0.0,245894.0,716425881087003,716425881100803
+2,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,0.0,16384.0,64,0,0.0,0.0,64,0,69026.0,32768.0,64,0,3417512.0,513878.0,4569491.0,16384.0,31630449.0,854378.0,854378.0,0.0,869046.0,64,0,16384.0,32768.0,64,0,0.0,0.0,64,0,0.0,0.0,64,0,0.0,230264.0,716425881121522,716425881135762
diff --git a/tests/workloads/ipblocks_TA/MI300X_A1/sysinfo.csv b/tests/workloads/ipblocks_TA/MI300X_A1/sysinfo.csv
new file mode 100644
index 0000000000..74a5783762
--- /dev/null
+++ b/tests/workloads/ipblocks_TA/MI300X_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+ipblocks_TA,./tests/vcopy -n 1048576 -b 256 -i 3,ta,Wed 29 May 2024 12:04:09 PM  (CDT),2,splinter-126-wr-c6,AMD Ryzen 9 7950X 16-Core Processor,"American Megatrends International, LLC.VS2683299N.FD",Ubuntu 22.04.4 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,114656528,,6.2.0-13611,113-MI3SRIOV-001,SPX,NPS1,MI300X_A1,gfx942,32,4096,304,4,32,64,1024,32,2100,1300,2100,1300,128,32,160,4,5324.8,8
diff --git a/tests/workloads/ipblocks_TA/MI300X_A1/timestamps.csv b/tests/workloads/ipblocks_TA/MI300X_A1/timestamps.csv
new file mode 100644
index 0000000000..e5ecc0b506
--- /dev/null
+++ b/tests/workloads/ipblocks_TA/MI300X_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,60633,1,967874,967874,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716425881043566,716425881060085,0
+2,60633,1,967874,967874,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716425881087003,716425881100803,0
+3,60633,1,967874,967874,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716425881121522,716425881135762,0
diff --git a/tests/workloads/ipblocks_TCC/MI300A_A1/log.txt b/tests/workloads/ipblocks_TCC/MI300A_A1/log.txt
new file mode 100644
index 0000000000..c3ed3c72a5
--- /dev/null
+++ b/tests/workloads/ipblocks_TCC/MI300A_A1/log.txt
@@ -0,0 +1,98 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/ipblocks_TCC/MI300A_A1
+Target: MI300A_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: None
+Hardware Blocks: ['tcc']
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+[profiling] Current input file: tests/workloads/ipblocks_TCC/MI300A_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUSY_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_PROBE_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_PROBE_ALL_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+[profiling] Current input file: tests/workloads/ipblocks_TCC/MI300A_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_NC_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_UC_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CC_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ_sum
+[profiling] Current input file: tests/workloads/ipblocks_TCC/MI300A_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_STREAMING_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT_sum
+[profiling] Current input file: tests/workloads/ipblocks_TCC/MI300A_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC_sum
+[profiling] Current input file: tests/workloads/ipblocks_TCC/MI300A_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WR_UNCACHED_32B_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_DRAM_sum
+[profiling] Current input file: tests/workloads/ipblocks_TCC/MI300A_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RD_UNCACHED_32B_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+[profiling] Current input file: tests/workloads/ipblocks_TCC/MI300A_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_DRAM_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_NORMAL_WRITEBACK_sum
+[profiling] Current input file: tests/workloads/ipblocks_TCC/MI300A_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_NORMAL_EVICT_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ALL_TC_OP_INV_EVICT_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+[profiling] Current input file: tests/workloads/ipblocks_TCC/MI300A_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_STALL_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+[profiling] Current input file: tests/workloads/ipblocks_TCC/MI300A_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/ipblocks_TCC/MI300A_A1/perfmon/pmc_perf_0.txt b/tests/workloads/ipblocks_TCC/MI300A_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..f504436b1b
--- /dev/null
+++ b/tests/workloads/ipblocks_TCC/MI300A_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_WAVES GRBM_COUNT GRBM_GUI_ACTIVE TCC_CYCLE_sum TCC_BUSY_sum TCC_PROBE_sum TCC_PROBE_ALL_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TCC/MI300A_A1/perfmon/pmc_perf_1.txt b/tests/workloads/ipblocks_TCC/MI300A_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..34fff42539
--- /dev/null
+++ b/tests/workloads/ipblocks_TCC/MI300A_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_NC_REQ_sum TCC_UC_REQ_sum TCC_CC_REQ_sum TCC_RW_REQ_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TCC/MI300A_A1/perfmon/pmc_perf_2.txt b/tests/workloads/ipblocks_TCC/MI300A_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..608725e21f
--- /dev/null
+++ b/tests/workloads/ipblocks_TCC/MI300A_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_REQ_sum TCC_STREAMING_REQ_sum TCC_HIT_sum TCC_MISS_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TCC/MI300A_A1/perfmon/pmc_perf_3.txt b/tests/workloads/ipblocks_TCC/MI300A_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..66b74f5c52
--- /dev/null
+++ b/tests/workloads/ipblocks_TCC/MI300A_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_READ_sum TCC_WRITE_sum TCC_ATOMIC_sum TCC_WRITEBACK_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TCC/MI300A_A1/perfmon/pmc_perf_4.txt b/tests/workloads/ipblocks_TCC/MI300A_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..5045f2f3ff
--- /dev/null
+++ b/tests/workloads/ipblocks_TCC/MI300A_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_WRREQ_sum TCC_EA0_WRREQ_64B_sum TCC_EA0_WR_UNCACHED_32B_sum TCC_EA0_WRREQ_DRAM_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TCC/MI300A_A1/perfmon/pmc_perf_5.txt b/tests/workloads/ipblocks_TCC/MI300A_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..5c27b22539
--- /dev/null
+++ b/tests/workloads/ipblocks_TCC/MI300A_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_RDREQ_sum TCC_EA0_RDREQ_32B_sum TCC_BUBBLE_sum TCC_EA0_RD_UNCACHED_32B_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TCC/MI300A_A1/perfmon/pmc_perf_6.txt b/tests/workloads/ipblocks_TCC/MI300A_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..64db9d0caf
--- /dev/null
+++ b/tests/workloads/ipblocks_TCC/MI300A_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_RDREQ_DRAM_sum TCC_TAG_STALL_sum TCC_NORMAL_WRITEBACK_sum TCC_ALL_TC_OP_WB_WRITEBACK_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TCC/MI300A_A1/perfmon/pmc_perf_7.txt b/tests/workloads/ipblocks_TCC/MI300A_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..c9597ea349
--- /dev/null
+++ b/tests/workloads/ipblocks_TCC/MI300A_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_NORMAL_EVICT_sum TCC_ALL_TC_OP_INV_EVICT_sum TCC_TOO_MANY_EA_WRREQS_STALL_sum TCC_EA0_ATOMIC_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TCC/MI300A_A1/perfmon/pmc_perf_8.txt b/tests/workloads/ipblocks_TCC/MI300A_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..2c69caccde
--- /dev/null
+++ b/tests/workloads/ipblocks_TCC/MI300A_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_RDREQ_LEVEL_sum TCC_EA0_WRREQ_LEVEL_sum TCC_EA0_ATOMIC_LEVEL_sum TCC_EA0_WRREQ_STALL_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TCC/MI300A_A1/perfmon/timestamps.txt b/tests/workloads/ipblocks_TCC/MI300A_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..676cca1b80
--- /dev/null
+++ b/tests/workloads/ipblocks_TCC/MI300A_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TCC/MI300A_A1/pmc_perf.csv b/tests/workloads/ipblocks_TCC/MI300A_A1/pmc_perf.csv
new file mode 100644
index 0000000000..0cefc836e7
--- /dev/null
+++ b/tests/workloads/ipblocks_TCC/MI300A_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,TCC_EA0_WRREQ_64B_sum,TCC_EA0_WRREQ_DRAM_sum,TCC_EA0_WRREQ_sum,TCC_EA0_WR_UNCACHED_32B_sum,Wave_Size_1,Correlation_ID_1,TCC_ALL_TC_OP_WB_WRITEBACK_sum,TCC_EA0_RDREQ_DRAM_sum,TCC_NORMAL_WRITEBACK_sum,TCC_TAG_STALL_sum,Wave_Size_2,Correlation_ID_2,TCC_ATOMIC_sum,TCC_READ_sum,TCC_WRITEBACK_sum,TCC_WRITE_sum,Wave_Size_3,Correlation_ID_3,TCC_ALL_TC_OP_INV_EVICT_sum,TCC_EA0_ATOMIC_sum,TCC_NORMAL_EVICT_sum,TCC_TOO_MANY_EA_WRREQS_STALL_sum,Wave_Size_4,Correlation_ID_4,TCC_HIT_sum,TCC_MISS_sum,TCC_REQ_sum,TCC_STREAMING_REQ_sum,Wave_Size_5,Correlation_ID_5,TCC_EA0_ATOMIC_LEVEL_sum,TCC_EA0_RDREQ_LEVEL_sum,TCC_EA0_WRREQ_LEVEL_sum,TCC_EA0_WRREQ_STALL_sum,Wave_Size_6,Correlation_ID_6,TCC_BUBBLE_sum,TCC_EA0_RDREQ_32B_sum,TCC_EA0_RDREQ_sum,TCC_EA0_RD_UNCACHED_32B_sum,Wave_Size_7,Correlation_ID_7,TCC_CC_REQ_sum,TCC_NC_REQ_sum,TCC_RW_REQ_sum,TCC_UC_REQ_sum,Wave_Size_8,Correlation_ID_8,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_WAVES,GRBM_COUNT,GRBM_GUI_ACTIVE,TCC_BUSY_sum,TCC_CYCLE_sum,TCC_PROBE_ALL_sum,TCC_PROBE_sum,Start_Timestamp,End_Timestamp
+0,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,131072.0,131072.0,131072.0,0.0,64,0,53323.0,65585.0,12213.0,99731.0,64,0,0.0,66028.0,65584.0,131072.0,64,0,0.0,0.0,2820.0,0.0,64,0,65998.0,131109.0,197107.0,0.0,64,0,0.0,102753221.0,52879084.0,199099.0,64,0,65536.0,0.0,65579.0,38.0,64,0,0.0,0.0,197088.0,19.0,64,0,982456.0,238738.0,16384.0,245614.0,245614.0,1386010.0,3929824.0,0.0,0.0,73251956163774,73251956171465
+1,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,131072.0,131072.0,131072.0,0.0,64,0,52721.0,65581.0,12815.0,98386.0,64,0,0.0,65694.0,65536.0,131072.0,64,0,0.0,0.0,24570.0,0.0,64,0,65650.0,131115.0,196765.0,0.0,64,0,0.0,70827250.0,55500891.0,202324.0,64,0,65536.0,0.0,65572.0,60.0,64,0,0.0,0.0,196728.0,30.0,64,0,959376.0,200496.0,16384.0,239844.0,239844.0,1291374.0,3837504.0,0.0,0.0,73251956187931,73251956194100
+2,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,131072.0,131072.0,131072.0,0.0,64,0,52834.0,65578.0,12702.0,97150.0,64,0,0.0,65680.0,65536.0,131072.0,64,0,0.0,0.0,53981.0,0.0,64,0,65650.0,131108.0,196758.0,0.0,64,0,0.0,71816855.0,55370121.0,199432.0,64,0,65536.0,0.0,65572.0,60.0,64,0,0.0,0.0,196728.0,30.0,64,0,900200.0,194253.0,16384.0,225050.0,225050.0,1288990.0,3600800.0,0.0,0.0,73251956209523,73251956215492
diff --git a/tests/workloads/ipblocks_TCC/MI300A_A1/sysinfo.csv b/tests/workloads/ipblocks_TCC/MI300A_A1/sysinfo.csv
new file mode 100644
index 0000000000..9c60fbf620
--- /dev/null
+++ b/tests/workloads/ipblocks_TCC/MI300A_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+ipblocks_TCC,./tests/vcopy -n 1048576 -b 256 -i 3,tcc,Wed 29 May 2024 01:29:53 PM  (CDT),2,sh5-1w300-rg3-3,AMD Instinct MI300A Accelerator,"American Megatrends International, LLC.RMO1002DS",Ubuntu 22.04.2 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,131174852,,6.1.2-110,N/A,SPX,NPS1,MI300A_A1,gfx942,32,24576,228,4,24,64,1024,32,2100,1300,2100,1300,96,32,120,4,5324.8,6
diff --git a/tests/workloads/ipblocks_TCC/MI300A_A1/timestamps.csv b/tests/workloads/ipblocks_TCC/MI300A_A1/timestamps.csv
new file mode 100644
index 0000000000..b6ba284419
--- /dev/null
+++ b/tests/workloads/ipblocks_TCC/MI300A_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,11995,1,142030,142030,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73251956163774,73251956171465,0
+2,11995,1,142030,142030,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73251956187931,73251956194100,0
+3,11995,1,142030,142030,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73251956209523,73251956215492,0
diff --git a/tests/workloads/ipblocks_TCC/MI300X_A1/log.txt b/tests/workloads/ipblocks_TCC/MI300X_A1/log.txt
new file mode 100644
index 0000000000..412abb7a1f
--- /dev/null
+++ b/tests/workloads/ipblocks_TCC/MI300X_A1/log.txt
@@ -0,0 +1,79 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/ipblocks_TCC/MI300X_A1
+Target: MI300X_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: None
+Hardware Blocks: ['tcc']
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+[profiling] Current input file: tests/workloads/ipblocks_TCC/MI300X_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+[profiling] Current input file: tests/workloads/ipblocks_TCC/MI300X_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_NC_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_UC_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CC_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ_sum
+[profiling] Current input file: tests/workloads/ipblocks_TCC/MI300X_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_STREAMING_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/ipblocks_TCC/MI300X_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITEBACK_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/ipblocks_TCC/MI300X_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WR_UNCACHED_32B_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_DRAM_sum
+[profiling] Current input file: tests/workloads/ipblocks_TCC/MI300X_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RD_UNCACHED_32B_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/ipblocks_TCC/MI300X_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_DRAM_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_NORMAL_WRITEBACK_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ALL_TC_OP_WB_WRITEBACK_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/ipblocks_TCC/MI300X_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_NORMAL_EVICT_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ALL_TC_OP_INV_EVICT_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+[profiling] Current input file: tests/workloads/ipblocks_TCC/MI300X_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_STALL_sum
+[profiling] Current input file: tests/workloads/ipblocks_TCC/MI300X_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/ipblocks_TCC/MI300X_A1/perfmon/pmc_perf_0.txt b/tests/workloads/ipblocks_TCC/MI300X_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..f504436b1b
--- /dev/null
+++ b/tests/workloads/ipblocks_TCC/MI300X_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_WAVES GRBM_COUNT GRBM_GUI_ACTIVE TCC_CYCLE_sum TCC_BUSY_sum TCC_PROBE_sum TCC_PROBE_ALL_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TCC/MI300X_A1/perfmon/pmc_perf_1.txt b/tests/workloads/ipblocks_TCC/MI300X_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..34fff42539
--- /dev/null
+++ b/tests/workloads/ipblocks_TCC/MI300X_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_NC_REQ_sum TCC_UC_REQ_sum TCC_CC_REQ_sum TCC_RW_REQ_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TCC/MI300X_A1/perfmon/pmc_perf_2.txt b/tests/workloads/ipblocks_TCC/MI300X_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..608725e21f
--- /dev/null
+++ b/tests/workloads/ipblocks_TCC/MI300X_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_REQ_sum TCC_STREAMING_REQ_sum TCC_HIT_sum TCC_MISS_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TCC/MI300X_A1/perfmon/pmc_perf_3.txt b/tests/workloads/ipblocks_TCC/MI300X_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..66b74f5c52
--- /dev/null
+++ b/tests/workloads/ipblocks_TCC/MI300X_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_READ_sum TCC_WRITE_sum TCC_ATOMIC_sum TCC_WRITEBACK_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TCC/MI300X_A1/perfmon/pmc_perf_4.txt b/tests/workloads/ipblocks_TCC/MI300X_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..5045f2f3ff
--- /dev/null
+++ b/tests/workloads/ipblocks_TCC/MI300X_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_WRREQ_sum TCC_EA0_WRREQ_64B_sum TCC_EA0_WR_UNCACHED_32B_sum TCC_EA0_WRREQ_DRAM_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TCC/MI300X_A1/perfmon/pmc_perf_5.txt b/tests/workloads/ipblocks_TCC/MI300X_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..5c27b22539
--- /dev/null
+++ b/tests/workloads/ipblocks_TCC/MI300X_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_RDREQ_sum TCC_EA0_RDREQ_32B_sum TCC_BUBBLE_sum TCC_EA0_RD_UNCACHED_32B_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TCC/MI300X_A1/perfmon/pmc_perf_6.txt b/tests/workloads/ipblocks_TCC/MI300X_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..64db9d0caf
--- /dev/null
+++ b/tests/workloads/ipblocks_TCC/MI300X_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_RDREQ_DRAM_sum TCC_TAG_STALL_sum TCC_NORMAL_WRITEBACK_sum TCC_ALL_TC_OP_WB_WRITEBACK_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TCC/MI300X_A1/perfmon/pmc_perf_7.txt b/tests/workloads/ipblocks_TCC/MI300X_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..c9597ea349
--- /dev/null
+++ b/tests/workloads/ipblocks_TCC/MI300X_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_NORMAL_EVICT_sum TCC_ALL_TC_OP_INV_EVICT_sum TCC_TOO_MANY_EA_WRREQS_STALL_sum TCC_EA0_ATOMIC_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TCC/MI300X_A1/perfmon/pmc_perf_8.txt b/tests/workloads/ipblocks_TCC/MI300X_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..2c69caccde
--- /dev/null
+++ b/tests/workloads/ipblocks_TCC/MI300X_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_RDREQ_LEVEL_sum TCC_EA0_WRREQ_LEVEL_sum TCC_EA0_ATOMIC_LEVEL_sum TCC_EA0_WRREQ_STALL_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TCC/MI300X_A1/perfmon/timestamps.txt b/tests/workloads/ipblocks_TCC/MI300X_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..676cca1b80
--- /dev/null
+++ b/tests/workloads/ipblocks_TCC/MI300X_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TCC/MI300X_A1/pmc_perf.csv b/tests/workloads/ipblocks_TCC/MI300X_A1/pmc_perf.csv
new file mode 100644
index 0000000000..1d7787a778
--- /dev/null
+++ b/tests/workloads/ipblocks_TCC/MI300X_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,TCC_ALL_TC_OP_INV_EVICT_sum,TCC_EA0_ATOMIC_sum,TCC_NORMAL_EVICT_sum,TCC_TOO_MANY_EA_WRREQS_STALL_sum,Wave_Size_1,Correlation_ID_1,TCC_EA0_ATOMIC_LEVEL_sum,TCC_EA0_RDREQ_LEVEL_sum,TCC_EA0_WRREQ_LEVEL_sum,TCC_EA0_WRREQ_STALL_sum,Wave_Size_2,Correlation_ID_2,TCC_HIT_sum,TCC_MISS_sum,TCC_REQ_sum,TCC_STREAMING_REQ_sum,Wave_Size_3,Correlation_ID_3,TCC_EA0_WRREQ_64B_sum,TCC_EA0_WRREQ_DRAM_sum,TCC_EA0_WRREQ_sum,TCC_EA0_WR_UNCACHED_32B_sum,Wave_Size_4,Correlation_ID_4,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_WAVES,GRBM_COUNT,GRBM_GUI_ACTIVE,TCC_BUSY_sum,TCC_CYCLE_sum,TCC_PROBE_ALL_sum,TCC_PROBE_sum,Wave_Size_5,Correlation_ID_5,TCC_ALL_TC_OP_WB_WRITEBACK_sum,TCC_EA0_RDREQ_DRAM_sum,TCC_NORMAL_WRITEBACK_sum,TCC_TAG_STALL_sum,Wave_Size_6,Correlation_ID_6,TCC_CC_REQ_sum,TCC_NC_REQ_sum,TCC_RW_REQ_sum,TCC_UC_REQ_sum,Wave_Size_7,Correlation_ID_7,TCC_ATOMIC_sum,TCC_READ_sum,TCC_WRITEBACK_sum,TCC_WRITE_sum,Wave_Size_8,Correlation_ID_8,TCC_BUBBLE_sum,TCC_EA0_RDREQ_32B_sum,TCC_EA0_RDREQ_sum,TCC_EA0_RD_UNCACHED_32B_sum,Start_Timestamp,End_Timestamp
+0,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,0.0,0.0,0.0,0.0,64,0,0.0,104495661.0,78620817.0,298536.0,64,0,66160.0,131312.0,197472.0,0.0,64,0,131072.0,131072.0,131072.0,0.0,64,0,2783044.0,564063.0,16384.0,695761.0,695761.0,3231807.0,11132176.0,0.0,0.0,64,0,65536.0,65619.0,0.0,39081.0,64,0,0.0,0.0,197248.0,225.0,64,0,0.0,66398.0,65656.0,131072.0,64,0,65536.0,0.0,65781.0,426.0,715989452559396,715989452576236
+1,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,0.0,0.0,0.0,0.0,64,0,0.0,52723070.0,81099416.0,288876.0,64,0,65536.0,131312.0,196848.0,0.0,64,0,131072.0,131072.0,131072.0,0.0,64,0,2550792.0,490952.0,16384.0,637698.0,637698.0,3023163.0,10203168.0,0.0,0.0,64,0,65536.0,65624.0,0.0,0.0,64,0,0.0,0.0,196608.0,243.0,64,0,0.0,65778.0,65536.0,131072.0,64,0,65536.0,0.0,65770.0,468.0,715989452598314,715989452613194
+2,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,0.0,0.0,30.0,0.0,64,0,0.0,57445086.0,77146527.0,242432.0,64,0,65536.0,131316.0,196852.0,0.0,64,0,131072.0,131072.0,131072.0,0.0,64,0,2391440.0,464720.0,16384.0,597860.0,597860.0,2829287.0,9565760.0,0.0,0.0,64,0,65536.0,65605.0,0.0,0.0,64,0,0.0,0.0,196608.0,243.0,64,0,0.0,65780.0,65536.0,131072.0,64,0,65536.0,0.0,65769.0,466.0,715989452633433,715989452647473
diff --git a/tests/workloads/ipblocks_TCC/MI300X_A1/sysinfo.csv b/tests/workloads/ipblocks_TCC/MI300X_A1/sysinfo.csv
new file mode 100644
index 0000000000..2812d02766
--- /dev/null
+++ b/tests/workloads/ipblocks_TCC/MI300X_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+ipblocks_TCC,./tests/vcopy -n 1048576 -b 256 -i 3,tcc,Wed 29 May 2024 11:56:51 AM  (CDT),2,splinter-126-wr-c6,AMD Ryzen 9 7950X 16-Core Processor,"American Megatrends International, LLC.VS2683299N.FD",Ubuntu 22.04.4 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,114656528,,6.2.0-13611,113-MI3SRIOV-001,SPX,NPS1,MI300X_A1,gfx942,32,4096,304,4,32,64,1024,32,2100,1300,2100,1300,128,32,160,4,5324.8,8
diff --git a/tests/workloads/ipblocks_TCC/MI300X_A1/timestamps.csv b/tests/workloads/ipblocks_TCC/MI300X_A1/timestamps.csv
new file mode 100644
index 0000000000..4e92bf6f09
--- /dev/null
+++ b/tests/workloads/ipblocks_TCC/MI300X_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,60633,1,960117,960117,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",715989452559396,715989452576236,0
+2,60633,1,960117,960117,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",715989452598314,715989452613194,0
+3,60633,1,960117,960117,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",715989452633433,715989452647473,0
diff --git a/tests/workloads/ipblocks_TCP/MI300A_A1/log.txt b/tests/workloads/ipblocks_TCP/MI300A_A1/log.txt
new file mode 100644
index 0000000000..f8716e322e
--- /dev/null
+++ b/tests/workloads/ipblocks_TCP/MI300A_A1/log.txt
@@ -0,0 +1,219 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/ipblocks_TCP/MI300A_A1
+Target: MI300A_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: None
+Hardware Blocks: ['tcp']
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+[profiling] Current input file: tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_GATE_EN1_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_GATE_EN2_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TD_TCP_STALL_CYCLES_sum
+[profiling] Current input file: tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_READ_TAGCONFLICT_STALL_CYCLES_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TA_TCP_STATE_READ_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+[profiling] Current input file: tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_VOLATILE_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TOTAL_ACCESSES_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TOTAL_READ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TOTAL_WRITE_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+[profiling] Current input file: tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TOTAL_ATOMIC_WITH_RET_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TOTAL_ATOMIC_WITHOUT_RET_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TOTAL_WRITEBACK_INVALIDATES_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TOTAL_CACHE_ACCESSES_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+[profiling] Current input file: tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_UTCL1_TRANSLATION_MISS_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_UTCL1_TRANSLATION_HIT_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_UTCL1_PERMISSION_MISS_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_UTCL1_REQUEST_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying the output vector from the GPU to the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Releasing GPU memory
+   |-> [/opt/rocm/bin/rocprofv2] Releasing CPU memory
+   |-> [/opt/rocm/bin/rocprofv2] Results File: "tests/workloads/ipblocks_TCP/MI300A_A1/out/pmc_1/results_pmc_perf_4.csv"
+   |-> [/opt/rocm/bin/rocprofv2] 
+   |-> [/opt/rocm/bin/rocprofv2] The output path for the following counters: tests/workloads/ipblocks_TCP/MI300A_A1/out/pmc_1
+[profiling] Current input file: tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TCC_READ_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TCC_WRITE_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TCC_ATOMIC_WITH_RET_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying the output vector from the GPU to the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Releasing GPU memory
+   |-> [/opt/rocm/bin/rocprofv2] Releasing CPU memory
+   |-> [/opt/rocm/bin/rocprofv2] Results File: "tests/workloads/ipblocks_TCP/MI300A_A1/out/pmc_1/results_pmc_perf_5.csv"
+   |-> [/opt/rocm/bin/rocprofv2] 
+[profiling] Current input file: tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TCC_NC_READ_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TCC_NC_WRITE_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TCC_NC_ATOMIC_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TCC_UC_READ_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying the output vector from the GPU to the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Releasing GPU memory
+   |-> [/opt/rocm/bin/rocprofv2] Releasing CPU memory
+   |-> [/opt/rocm/bin/rocprofv2] Results File: "tests/workloads/ipblocks_TCP/MI300A_A1/out/pmc_1/results_pmc_perf_6.csv"
+   |-> [/opt/rocm/bin/rocprofv2] 
+   |-> [/opt/rocm/bin/rocprofv2] The output path for the following counters: tests/workloads/ipblocks_TCP/MI300A_A1/out/pmc_1
+[profiling] Current input file: tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TCC_UC_WRITE_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TCC_UC_ATOMIC_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TCC_CC_READ_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TCC_CC_WRITE_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying the output vector from the GPU to the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Releasing GPU memory
+   |-> [/opt/rocm/bin/rocprofv2] Releasing CPU memory
+   |-> [/opt/rocm/bin/rocprofv2] Results File: "tests/workloads/ipblocks_TCP/MI300A_A1/out/pmc_1/results_pmc_perf_7.csv"
+   |-> [/opt/rocm/bin/rocprofv2] 
+   |-> [/opt/rocm/bin/rocprofv2] The output path for the following counters: tests/workloads/ipblocks_TCP/MI300A_A1/out/pmc_1
+[profiling] Current input file: tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TCC_CC_ATOMIC_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TCC_RW_READ_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TCC_RW_WRITE_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TCC_RW_ATOMIC_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying the output vector from the GPU to the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Releasing GPU memory
+   |-> [/opt/rocm/bin/rocprofv2] Releasing CPU memory
+   |-> [/opt/rocm/bin/rocprofv2] Results File: "tests/workloads/ipblocks_TCP/MI300A_A1/out/pmc_1/results_pmc_perf_8.csv"
+   |-> [/opt/rocm/bin/rocprofv2] 
+   |-> [/opt/rocm/bin/rocprofv2] The output path for the following counters: tests/workloads/ipblocks_TCP/MI300A_A1/out/pmc_1
+[profiling] Current input file: tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_PENDING_STALL_CYCLES_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying the output vector from the GPU to the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Releasing GPU memory
+   |-> [/opt/rocm/bin/rocprofv2] Releasing CPU memory
+   |-> [/opt/rocm/bin/rocprofv2] Results File: "tests/workloads/ipblocks_TCP/MI300A_A1/out/pmc_1/results_pmc_perf_9.csv"
+   |-> [/opt/rocm/bin/rocprofv2] 
+   |-> [/opt/rocm/bin/rocprofv2] The output path for the following counters: tests/workloads/ipblocks_TCP/MI300A_A1/out/pmc_1
+[profiling] Current input file: tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying the output vector from the GPU to the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Releasing GPU memory
+   |-> [/opt/rocm/bin/rocprofv2] Releasing CPU memory
+   |-> [/opt/rocm/bin/rocprofv2] Results File: "tests/workloads/ipblocks_TCP/MI300A_A1/out/pmc_1/results_timestamps.csv"
+   |-> [/opt/rocm/bin/rocprofv2] 
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/pmc_perf_0.txt b/tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..c976322613
--- /dev/null
+++ b/tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES GRBM_COUNT GRBM_GUI_ACTIVE TCP_GATE_EN1_sum TCP_GATE_EN2_sum TCP_TD_TCP_STALL_CYCLES_sum TCP_TCR_TCP_STALL_CYCLES_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/pmc_perf_1.txt b/tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..c97a94bb67
--- /dev/null
+++ b/tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  TCP_READ_TAGCONFLICT_STALL_CYCLES_sum TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum TCP_TA_TCP_STATE_READ_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/pmc_perf_2.txt b/tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..6bdbd65d97
--- /dev/null
+++ b/tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  TCP_VOLATILE_sum TCP_TOTAL_ACCESSES_sum TCP_TOTAL_READ_sum TCP_TOTAL_WRITE_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/pmc_perf_3.txt b/tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..a96f3c792d
--- /dev/null
+++ b/tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  TCP_TOTAL_ATOMIC_WITH_RET_sum TCP_TOTAL_ATOMIC_WITHOUT_RET_sum TCP_TOTAL_WRITEBACK_INVALIDATES_sum TCP_TOTAL_CACHE_ACCESSES_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/pmc_perf_4.txt b/tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..62b5dac3b5
--- /dev/null
+++ b/tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  TCP_UTCL1_TRANSLATION_MISS_sum TCP_UTCL1_TRANSLATION_HIT_sum TCP_UTCL1_PERMISSION_MISS_sum TCP_UTCL1_REQUEST_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/pmc_perf_5.txt b/tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..9c0e7f4c58
--- /dev/null
+++ b/tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  TCP_TCC_READ_REQ_sum TCP_TCC_WRITE_REQ_sum TCP_TCC_ATOMIC_WITH_RET_REQ_sum TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/pmc_perf_6.txt b/tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..78f03f7a7b
--- /dev/null
+++ b/tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  TCP_TCC_NC_READ_REQ_sum TCP_TCC_NC_WRITE_REQ_sum TCP_TCC_NC_ATOMIC_REQ_sum TCP_TCC_UC_READ_REQ_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/pmc_perf_7.txt b/tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..cb44aef49f
--- /dev/null
+++ b/tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  TCP_TCC_UC_WRITE_REQ_sum TCP_TCC_UC_ATOMIC_REQ_sum TCP_TCC_CC_READ_REQ_sum TCP_TCC_CC_WRITE_REQ_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/pmc_perf_8.txt b/tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..a91d73400a
--- /dev/null
+++ b/tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  TCP_TCC_CC_ATOMIC_REQ_sum TCP_TCC_RW_READ_REQ_sum TCP_TCC_RW_WRITE_REQ_sum TCP_TCC_RW_ATOMIC_REQ_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/pmc_perf_9.txt b/tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..036bbab179
--- /dev/null
+++ b/tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  TCP_PENDING_STALL_CYCLES_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/timestamps.txt b/tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..676cca1b80
--- /dev/null
+++ b/tests/workloads/ipblocks_TCP/MI300A_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TCP/MI300A_A1/pmc_perf.csv b/tests/workloads/ipblocks_TCP/MI300A_A1/pmc_perf.csv
new file mode 100644
index 0000000000..801c6ab1be
--- /dev/null
+++ b/tests/workloads/ipblocks_TCP/MI300A_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,TCP_UTCL1_PERMISSION_MISS_sum,TCP_UTCL1_REQUEST_sum,TCP_UTCL1_TRANSLATION_HIT_sum,TCP_UTCL1_TRANSLATION_MISS_sum,Wave_Size_1,Correlation_ID_1,TCP_TCC_NC_ATOMIC_REQ_sum,TCP_TCC_NC_READ_REQ_sum,TCP_TCC_NC_WRITE_REQ_sum,TCP_TCC_UC_READ_REQ_sum,Wave_Size_2,Correlation_ID_2,TCP_TOTAL_ATOMIC_WITHOUT_RET_sum,TCP_TOTAL_ATOMIC_WITH_RET_sum,TCP_TOTAL_CACHE_ACCESSES_sum,TCP_TOTAL_WRITEBACK_INVALIDATES_sum,Wave_Size_3,Correlation_ID_3,TCP_TCC_CC_READ_REQ_sum,TCP_TCC_CC_WRITE_REQ_sum,TCP_TCC_UC_ATOMIC_REQ_sum,TCP_TCC_UC_WRITE_REQ_sum,Wave_Size_4,Correlation_ID_4,TCP_TOTAL_ACCESSES_sum,TCP_TOTAL_READ_sum,TCP_TOTAL_WRITE_sum,TCP_VOLATILE_sum,Wave_Size_5,Correlation_ID_5,TCP_PENDING_STALL_CYCLES_sum,Wave_Size_6,Correlation_ID_6,TCP_TCC_CC_ATOMIC_REQ_sum,TCP_TCC_RW_ATOMIC_REQ_sum,TCP_TCC_RW_READ_REQ_sum,TCP_TCC_RW_WRITE_REQ_sum,Wave_Size_7,Correlation_ID_7,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,TCP_TCC_READ_REQ_sum,TCP_TCC_WRITE_REQ_sum,Wave_Size_8,Correlation_ID_8,TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum,TCP_READ_TAGCONFLICT_STALL_CYCLES_sum,TCP_TA_TCP_STATE_READ_sum,TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum,Wave_Size_9,Correlation_ID_9,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_BUSY_CU_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,GRBM_COUNT,GRBM_GUI_ACTIVE,TCP_GATE_EN1_sum,TCP_GATE_EN2_sum,TCP_TCR_TCP_STALL_CYCLES_sum,TCP_TD_TCP_STALL_CYCLES_sum,Start_Timestamp,End_Timestamp
+0,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,0.0,524288.0,452421.0,1816.0,64,0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,524288.0,228.0,64,0,0.0,0.0,0.0,0.0,64,0,2097152.0,1048576.0,1048576.0,2097152.0,64,0,1213065.0,64,0,0.0,0.0,65536.0,131072.0,64,0,0.0,0.0,65536.0,131072.0,64,0,0.0,0.0,32768.0,0.0,64,0,1646412.0,255706.0,2254864.0,16384.0,14679498.0,411603.0,411603.0,3126846.0,1648778.0,19.0,1861.0,73301221492233,73301221500325
+1,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,0.0,524288.0,453323.0,1824.0,64,0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,524288.0,228.0,64,0,0.0,0.0,0.0,0.0,64,0,2097152.0,1048576.0,1048576.0,2097152.0,64,0,1068371.0,64,0,0.0,0.0,65536.0,131072.0,64,0,0.0,0.0,65536.0,131072.0,64,0,0.0,0.0,32768.0,0.0,64,0,1498420.0,198379.0,1784894.0,16384.0,10885501.0,374605.0,374605.0,2611628.0,1470159.0,171.0,1755.0,73301221538624,73301221544713
+2,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,0.0,524288.0,453943.0,1824.0,64,0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,524288.0,228.0,64,0,0.0,0.0,0.0,0.0,64,0,2097152.0,1048576.0,1048576.0,2097152.0,64,0,1068012.0,64,0,0.0,0.0,65536.0,131072.0,64,0,0.0,0.0,65536.0,131072.0,64,0,0.0,0.0,32768.0,0.0,64,0,1474188.0,193964.0,1744569.0,16384.0,10536838.0,368547.0,368547.0,2569649.0,1449504.0,410.0,1714.0,73301221517712,73301221523881
diff --git a/tests/workloads/ipblocks_TCP/MI300A_A1/sysinfo.csv b/tests/workloads/ipblocks_TCP/MI300A_A1/sysinfo.csv
new file mode 100644
index 0000000000..a97497a0ef
--- /dev/null
+++ b/tests/workloads/ipblocks_TCP/MI300A_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+ipblocks_TCP,./tests/vcopy -n 1048576 -b 256 -i 3,tcp,Wed 29 May 2024 01:30:41 PM  (CDT),2,sh5-1w300-rg3-3,AMD Instinct MI300A Accelerator,"American Megatrends International, LLC.RMO1002DS",Ubuntu 22.04.2 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,131174852,,6.1.2-110,N/A,SPX,NPS1,MI300A_A1,gfx942,32,24576,228,4,24,64,1024,32,2100,1300,2100,1300,96,32,120,4,5324.8,6
diff --git a/tests/workloads/ipblocks_TCP/MI300A_A1/timestamps.csv b/tests/workloads/ipblocks_TCP/MI300A_A1/timestamps.csv
new file mode 100644
index 0000000000..91822e480a
--- /dev/null
+++ b/tests/workloads/ipblocks_TCP/MI300A_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,11995,1,142596,142596,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73301221492233,73301221500325,0
+3,11995,1,142596,142596,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73301221538624,73301221544713,0
+2,11995,1,142596,142596,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73301221517712,73301221523881,0
diff --git a/tests/workloads/ipblocks_TCP/MI300X_A1/log.txt b/tests/workloads/ipblocks_TCP/MI300X_A1/log.txt
new file mode 100644
index 0000000000..c7360b7b7a
--- /dev/null
+++ b/tests/workloads/ipblocks_TCP/MI300X_A1/log.txt
@@ -0,0 +1,102 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/ipblocks_TCP/MI300X_A1
+Target: MI300X_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: None
+Hardware Blocks: ['tcp']
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+[profiling] Current input file: tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_GATE_EN1_sum
+[profiling] Current input file: tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_READ_TAGCONFLICT_STALL_CYCLES_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TA_TCP_STATE_READ_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_VOLATILE_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TOTAL_ACCESSES_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TOTAL_READ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TOTAL_WRITE_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TOTAL_ATOMIC_WITH_RET_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TOTAL_ATOMIC_WITHOUT_RET_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TOTAL_WRITEBACK_INVALIDATES_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TOTAL_CACHE_ACCESSES_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_UTCL1_TRANSLATION_MISS_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_UTCL1_TRANSLATION_HIT_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_UTCL1_PERMISSION_MISS_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_UTCL1_REQUEST_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+[profiling] Current input file: tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TCC_READ_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TCC_WRITE_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TCC_ATOMIC_WITH_RET_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+[profiling] Current input file: tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TCC_NC_READ_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TCC_NC_WRITE_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TCC_NC_ATOMIC_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TCC_UC_READ_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+[profiling] Current input file: tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TCC_UC_WRITE_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TCC_UC_ATOMIC_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TCC_CC_READ_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TCC_CC_WRITE_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+[profiling] Current input file: tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TCC_CC_ATOMIC_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TCC_RW_READ_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TCC_RW_WRITE_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TCC_RW_ATOMIC_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+[profiling] Current input file: tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_PENDING_STALL_CYCLES_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+[profiling] Current input file: tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/pmc_perf_0.txt b/tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..c976322613
--- /dev/null
+++ b/tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES GRBM_COUNT GRBM_GUI_ACTIVE TCP_GATE_EN1_sum TCP_GATE_EN2_sum TCP_TD_TCP_STALL_CYCLES_sum TCP_TCR_TCP_STALL_CYCLES_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/pmc_perf_1.txt b/tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..c97a94bb67
--- /dev/null
+++ b/tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  TCP_READ_TAGCONFLICT_STALL_CYCLES_sum TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum TCP_TA_TCP_STATE_READ_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/pmc_perf_2.txt b/tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..6bdbd65d97
--- /dev/null
+++ b/tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  TCP_VOLATILE_sum TCP_TOTAL_ACCESSES_sum TCP_TOTAL_READ_sum TCP_TOTAL_WRITE_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/pmc_perf_3.txt b/tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..a96f3c792d
--- /dev/null
+++ b/tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  TCP_TOTAL_ATOMIC_WITH_RET_sum TCP_TOTAL_ATOMIC_WITHOUT_RET_sum TCP_TOTAL_WRITEBACK_INVALIDATES_sum TCP_TOTAL_CACHE_ACCESSES_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/pmc_perf_4.txt b/tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..62b5dac3b5
--- /dev/null
+++ b/tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  TCP_UTCL1_TRANSLATION_MISS_sum TCP_UTCL1_TRANSLATION_HIT_sum TCP_UTCL1_PERMISSION_MISS_sum TCP_UTCL1_REQUEST_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/pmc_perf_5.txt b/tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..9c0e7f4c58
--- /dev/null
+++ b/tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  TCP_TCC_READ_REQ_sum TCP_TCC_WRITE_REQ_sum TCP_TCC_ATOMIC_WITH_RET_REQ_sum TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/pmc_perf_6.txt b/tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..78f03f7a7b
--- /dev/null
+++ b/tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  TCP_TCC_NC_READ_REQ_sum TCP_TCC_NC_WRITE_REQ_sum TCP_TCC_NC_ATOMIC_REQ_sum TCP_TCC_UC_READ_REQ_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/pmc_perf_7.txt b/tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..cb44aef49f
--- /dev/null
+++ b/tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  TCP_TCC_UC_WRITE_REQ_sum TCP_TCC_UC_ATOMIC_REQ_sum TCP_TCC_CC_READ_REQ_sum TCP_TCC_CC_WRITE_REQ_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/pmc_perf_8.txt b/tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..a91d73400a
--- /dev/null
+++ b/tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  TCP_TCC_CC_ATOMIC_REQ_sum TCP_TCC_RW_READ_REQ_sum TCP_TCC_RW_WRITE_REQ_sum TCP_TCC_RW_ATOMIC_REQ_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/pmc_perf_9.txt b/tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..036bbab179
--- /dev/null
+++ b/tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  TCP_PENDING_STALL_CYCLES_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/timestamps.txt b/tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..676cca1b80
--- /dev/null
+++ b/tests/workloads/ipblocks_TCP/MI300X_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TCP/MI300X_A1/pmc_perf.csv b/tests/workloads/ipblocks_TCP/MI300X_A1/pmc_perf.csv
new file mode 100644
index 0000000000..f539ea700b
--- /dev/null
+++ b/tests/workloads/ipblocks_TCP/MI300X_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,TCP_TCC_CC_READ_REQ_sum,TCP_TCC_CC_WRITE_REQ_sum,TCP_TCC_UC_ATOMIC_REQ_sum,TCP_TCC_UC_WRITE_REQ_sum,Wave_Size_1,Correlation_ID_1,TCP_TCC_CC_ATOMIC_REQ_sum,TCP_TCC_RW_ATOMIC_REQ_sum,TCP_TCC_RW_READ_REQ_sum,TCP_TCC_RW_WRITE_REQ_sum,Wave_Size_2,Correlation_ID_2,TCP_TOTAL_ACCESSES_sum,TCP_TOTAL_READ_sum,TCP_TOTAL_WRITE_sum,TCP_VOLATILE_sum,Wave_Size_3,Correlation_ID_3,TCP_UTCL1_PERMISSION_MISS_sum,TCP_UTCL1_REQUEST_sum,TCP_UTCL1_TRANSLATION_HIT_sum,TCP_UTCL1_TRANSLATION_MISS_sum,Wave_Size_4,Correlation_ID_4,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_BUSY_CU_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,GRBM_COUNT,GRBM_GUI_ACTIVE,TCP_GATE_EN1_sum,TCP_GATE_EN2_sum,TCP_TCR_TCP_STALL_CYCLES_sum,TCP_TD_TCP_STALL_CYCLES_sum,Wave_Size_5,Correlation_ID_5,TCP_TCC_NC_ATOMIC_REQ_sum,TCP_TCC_NC_READ_REQ_sum,TCP_TCC_NC_WRITE_REQ_sum,TCP_TCC_UC_READ_REQ_sum,Wave_Size_6,Correlation_ID_6,TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum,TCP_READ_TAGCONFLICT_STALL_CYCLES_sum,TCP_TA_TCP_STATE_READ_sum,TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum,Wave_Size_7,Correlation_ID_7,TCP_PENDING_STALL_CYCLES_sum,Wave_Size_8,Correlation_ID_8,TCP_TOTAL_ATOMIC_WITHOUT_RET_sum,TCP_TOTAL_ATOMIC_WITH_RET_sum,TCP_TOTAL_CACHE_ACCESSES_sum,TCP_TOTAL_WRITEBACK_INVALIDATES_sum,Wave_Size_9,Correlation_ID_9,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,TCP_TCC_READ_REQ_sum,TCP_TCC_WRITE_REQ_sum,Start_Timestamp,End_Timestamp
+0,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,65536.0,131072.0,64,0,2097152.0,1048576.0,1048576.0,2097152.0,64,0,0.0,524288.0,448087.0,2254.0,64,0,5321028.0,581002.0,5137039.0,16384.0,35742282.0,1330257.0,1330257.0,6484434.0,1644717.0,0.0,1535.0,64,0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,32768.0,0.0,64,0,1317084.0,64,0,0.0,0.0,524288.0,304.0,64,0,0.0,0.0,65536.0,131072.0,716022282189471,716022282204470
+1,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,65536.0,131072.0,64,0,2097152.0,1048576.0,1048576.0,2097152.0,64,0,0.0,524288.0,446389.0,2292.0,64,0,5193332.0,466652.0,4196709.0,16384.0,28878733.0,1298333.0,1298333.0,5402663.0,1203996.0,0.0,1069.0,64,0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,32768.0,0.0,64,0,845075.0,64,0,0.0,0.0,524288.0,304.0,64,0,0.0,0.0,65536.0,131072.0,716022282226550,716022282240268
+2,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,65536.0,131072.0,64,0,2097152.0,1048576.0,1048576.0,2097152.0,64,0,0.0,524288.0,448106.0,2252.0,64,0,5113276.0,473466.0,4218497.0,16384.0,28788747.0,1278319.0,1278319.0,5467907.0,1129926.0,0.0,590.0,64,0,0.0,0.0,0.0,0.0,64,0,0.0,0.0,32768.0,0.0,64,0,831941.0,64,0,0.0,0.0,524288.0,304.0,64,0,0.0,0.0,65536.0,131072.0,716022282260707,716022282274427
diff --git a/tests/workloads/ipblocks_TCP/MI300X_A1/sysinfo.csv b/tests/workloads/ipblocks_TCP/MI300X_A1/sysinfo.csv
new file mode 100644
index 0000000000..b11dc04254
--- /dev/null
+++ b/tests/workloads/ipblocks_TCP/MI300X_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+ipblocks_TCP,./tests/vcopy -n 1048576 -b 256 -i 3,tcp,Wed 29 May 2024 11:57:23 AM  (CDT),2,splinter-126-wr-c6,AMD Ryzen 9 7950X 16-Core Processor,"American Megatrends International, LLC.VS2683299N.FD",Ubuntu 22.04.4 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,114656528,,6.2.0-13611,113-MI3SRIOV-001,SPX,NPS1,MI300X_A1,gfx942,32,4096,304,4,32,64,1024,32,2100,1300,2100,1300,128,32,160,4,5324.8,8
diff --git a/tests/workloads/ipblocks_TCP/MI300X_A1/timestamps.csv b/tests/workloads/ipblocks_TCP/MI300X_A1/timestamps.csv
new file mode 100644
index 0000000000..d91f06bfb3
--- /dev/null
+++ b/tests/workloads/ipblocks_TCP/MI300X_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,60633,1,960792,960792,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716022282189471,716022282204470,0
+2,60633,1,960792,960792,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716022282226550,716022282240268,0
+3,60633,1,960792,960792,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716022282260707,716022282274427,0
diff --git a/tests/workloads/ipblocks_TD/MI300A_A1/log.txt b/tests/workloads/ipblocks_TD/MI300A_A1/log.txt
new file mode 100644
index 0000000000..0dbbb323e3
--- /dev/null
+++ b/tests/workloads/ipblocks_TD/MI300A_A1/log.txt
@@ -0,0 +1,54 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/ipblocks_TD/MI300A_A1
+Target: MI300A_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: None
+Hardware Blocks: ['td']
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+[profiling] Current input file: tests/workloads/ipblocks_TD/MI300A_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - TD_TD_BUSY_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TD_TC_STALL_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+[profiling] Current input file: tests/workloads/ipblocks_TD/MI300A_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TD_SPI_STALL_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TD_LOAD_WAVEFRONT_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+[profiling] Current input file: tests/workloads/ipblocks_TD/MI300A_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TD_ATOMIC_WAVEFRONT_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TD_STORE_WAVEFRONT_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/ipblocks_TD/MI300A_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TD_COALESCABLE_WAVEFRONT_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+[profiling] Current input file: tests/workloads/ipblocks_TD/MI300A_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/ipblocks_TD/MI300A_A1/perfmon/pmc_perf_0.txt b/tests/workloads/ipblocks_TD/MI300A_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..694315e03e
--- /dev/null
+++ b/tests/workloads/ipblocks_TD/MI300A_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES GRBM_COUNT GRBM_GUI_ACTIVE TD_TD_BUSY_sum TD_TC_STALL_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TD/MI300A_A1/perfmon/pmc_perf_1.txt b/tests/workloads/ipblocks_TD/MI300A_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..1f572a724b
--- /dev/null
+++ b/tests/workloads/ipblocks_TD/MI300A_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  TD_SPI_STALL_sum TD_LOAD_WAVEFRONT_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TD/MI300A_A1/perfmon/pmc_perf_2.txt b/tests/workloads/ipblocks_TD/MI300A_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..6a7f8b1f73
--- /dev/null
+++ b/tests/workloads/ipblocks_TD/MI300A_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  TD_ATOMIC_WAVEFRONT_sum TD_STORE_WAVEFRONT_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TD/MI300A_A1/perfmon/pmc_perf_3.txt b/tests/workloads/ipblocks_TD/MI300A_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..fc3e8fe7c2
--- /dev/null
+++ b/tests/workloads/ipblocks_TD/MI300A_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  TD_COALESCABLE_WAVEFRONT_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TD/MI300A_A1/perfmon/timestamps.txt b/tests/workloads/ipblocks_TD/MI300A_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..676cca1b80
--- /dev/null
+++ b/tests/workloads/ipblocks_TD/MI300A_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TD/MI300A_A1/pmc_perf.csv b/tests/workloads/ipblocks_TD/MI300A_A1/pmc_perf.csv
new file mode 100644
index 0000000000..dbea42637e
--- /dev/null
+++ b/tests/workloads/ipblocks_TD/MI300A_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,TD_COALESCABLE_WAVEFRONT_sum,Wave_Size_1,Correlation_ID_1,TD_ATOMIC_WAVEFRONT_sum,TD_STORE_WAVEFRONT_sum,Wave_Size_2,Correlation_ID_2,TD_LOAD_WAVEFRONT_sum,TD_SPI_STALL_sum,Wave_Size_3,Correlation_ID_3,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_BUSY_CU_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,GRBM_COUNT,GRBM_GUI_ACTIVE,TD_TC_STALL_sum,TD_TD_BUSY_sum,Start_Timestamp,End_Timestamp
+0,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,0.0,64,0,0.0,16384.0,64,0,32768.0,206.0,64,0,1180604.0,270016.0,2289877.0,16384.0,15187286.0,295151.0,295151.0,1436412.0,1754147.0,73920555398366,73920555406177
+1,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,0.0,64,0,0.0,16384.0,64,0,32768.0,315.0,64,0,1033080.0,216636.0,1892143.0,16384.0,11765108.0,258270.0,258270.0,1209476.0,1518841.0,73920555427089,73920555433098
+2,11995,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,0.0,64,0,0.0,16384.0,64,0,32768.0,304.0,64,0,1083900.0,218683.0,1926274.0,16384.0,11945791.0,270975.0,270975.0,1209142.0,1518537.0,73920555452528,73920555458737
diff --git a/tests/workloads/ipblocks_TD/MI300A_A1/sysinfo.csv b/tests/workloads/ipblocks_TD/MI300A_A1/sysinfo.csv
new file mode 100644
index 0000000000..7c1fc793f7
--- /dev/null
+++ b/tests/workloads/ipblocks_TD/MI300A_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+ipblocks_TD,./tests/vcopy -n 1048576 -b 256 -i 3,td,Wed 29 May 2024 01:41:08 PM  (CDT),2,sh5-1w300-rg3-3,AMD Instinct MI300A Accelerator,"American Megatrends International, LLC.RMO1002DS",Ubuntu 22.04.2 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,131174852,,6.1.2-110,N/A,SPX,NPS1,MI300A_A1,gfx942,32,24576,228,4,24,64,1024,32,2100,1300,2100,1300,96,32,120,4,5324.8,6
diff --git a/tests/workloads/ipblocks_TD/MI300A_A1/timestamps.csv b/tests/workloads/ipblocks_TD/MI300A_A1/timestamps.csv
new file mode 100644
index 0000000000..cadb729b1c
--- /dev/null
+++ b/tests/workloads/ipblocks_TD/MI300A_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,11995,1,149592,149592,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73920555398366,73920555406177,0
+2,11995,1,149592,149592,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73920555427089,73920555433098,0
+3,11995,1,149592,149592,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73920555452528,73920555458737,0
diff --git a/tests/workloads/ipblocks_TD/MI300X_A1/log.txt b/tests/workloads/ipblocks_TD/MI300X_A1/log.txt
new file mode 100644
index 0000000000..4ccc9c03cc
--- /dev/null
+++ b/tests/workloads/ipblocks_TD/MI300X_A1/log.txt
@@ -0,0 +1,45 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/ipblocks_TD/MI300X_A1
+Target: MI300X_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: None
+Hardware Blocks: ['td']
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+[profiling] Current input file: tests/workloads/ipblocks_TD/MI300X_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+[profiling] Current input file: tests/workloads/ipblocks_TD/MI300X_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TD_SPI_STALL_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TD_LOAD_WAVEFRONT_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+[profiling] Current input file: tests/workloads/ipblocks_TD/MI300X_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TD_ATOMIC_WAVEFRONT_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TD_STORE_WAVEFRONT_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/ipblocks_TD/MI300X_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TD_COALESCABLE_WAVEFRONT_sum
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/ipblocks_TD/MI300X_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/ipblocks_TD/MI300X_A1/perfmon/pmc_perf_0.txt b/tests/workloads/ipblocks_TD/MI300X_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..694315e03e
--- /dev/null
+++ b/tests/workloads/ipblocks_TD/MI300X_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES GRBM_COUNT GRBM_GUI_ACTIVE TD_TD_BUSY_sum TD_TC_STALL_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TD/MI300X_A1/perfmon/pmc_perf_1.txt b/tests/workloads/ipblocks_TD/MI300X_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..1f572a724b
--- /dev/null
+++ b/tests/workloads/ipblocks_TD/MI300X_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  TD_SPI_STALL_sum TD_LOAD_WAVEFRONT_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TD/MI300X_A1/perfmon/pmc_perf_2.txt b/tests/workloads/ipblocks_TD/MI300X_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..6a7f8b1f73
--- /dev/null
+++ b/tests/workloads/ipblocks_TD/MI300X_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  TD_ATOMIC_WAVEFRONT_sum TD_STORE_WAVEFRONT_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TD/MI300X_A1/perfmon/pmc_perf_3.txt b/tests/workloads/ipblocks_TD/MI300X_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..fc3e8fe7c2
--- /dev/null
+++ b/tests/workloads/ipblocks_TD/MI300X_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  TD_COALESCABLE_WAVEFRONT_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TD/MI300X_A1/perfmon/timestamps.txt b/tests/workloads/ipblocks_TD/MI300X_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..676cca1b80
--- /dev/null
+++ b/tests/workloads/ipblocks_TD/MI300X_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/ipblocks_TD/MI300X_A1/pmc_perf.csv b/tests/workloads/ipblocks_TD/MI300X_A1/pmc_perf.csv
new file mode 100644
index 0000000000..f1e8931e27
--- /dev/null
+++ b/tests/workloads/ipblocks_TD/MI300X_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,TD_ATOMIC_WAVEFRONT_sum,TD_STORE_WAVEFRONT_sum,Wave_Size_1,Correlation_ID_1,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_BUSY_CU_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,GRBM_COUNT,GRBM_GUI_ACTIVE,TD_TC_STALL_sum,TD_TD_BUSY_sum,Wave_Size_2,Correlation_ID_2,TD_LOAD_WAVEFRONT_sum,TD_SPI_STALL_sum,Wave_Size_3,Correlation_ID_3,TD_COALESCABLE_WAVEFRONT_sum,Start_Timestamp,End_Timestamp
+0,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,0.0,16384.0,64,0,3437764.0,558012.0,5023501.0,16384.0,34414814.0,859441.0,859441.0,1461237.0,1773856.0,64,0,32768.0,160.0,64,0,0.0,716431078376832,716431078400511
+1,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,0.0,16384.0,64,0,3551884.0,500047.0,4466559.0,16384.0,30623877.0,887971.0,887971.0,1022829.0,1331163.0,64,0,32768.0,215.0,64,0,0.0,716431078422749,716431078435989
+2,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",0,0.0,16384.0,64,0,3220112.0,506272.0,4425953.0,16384.0,30236564.0,805028.0,805028.0,910401.0,1217999.0,64,0,32768.0,233.0,64,0,0.0,716431078456468,716431078469548
diff --git a/tests/workloads/ipblocks_TD/MI300X_A1/sysinfo.csv b/tests/workloads/ipblocks_TD/MI300X_A1/sysinfo.csv
new file mode 100644
index 0000000000..41fdfccb00
--- /dev/null
+++ b/tests/workloads/ipblocks_TD/MI300X_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+ipblocks_TD,./tests/vcopy -n 1048576 -b 256 -i 3,td,Wed 29 May 2024 12:04:17 PM  (CDT),2,splinter-126-wr-c6,AMD Ryzen 9 7950X 16-Core Processor,"American Megatrends International, LLC.VS2683299N.FD",Ubuntu 22.04.4 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,114656528,,6.2.0-13611,113-MI3SRIOV-001,SPX,NPS1,MI300X_A1,gfx942,32,4096,304,4,32,64,1024,32,2100,1300,2100,1300,128,32,160,4,5324.8,8
diff --git a/tests/workloads/ipblocks_TD/MI300X_A1/timestamps.csv b/tests/workloads/ipblocks_TD/MI300X_A1/timestamps.csv
new file mode 100644
index 0000000000..bcc2b4ff63
--- /dev/null
+++ b/tests/workloads/ipblocks_TD/MI300X_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,60633,1,967991,967991,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716431078376832,716431078400511,0
+2,60633,1,967991,967991,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716431078422749,716431078435989,0
+3,60633,1,967991,967991,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716431078456468,716431078469548,0
diff --git a/tests/workloads/join_type_grid/MI300A_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/join_type_grid/MI300A_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..5a884e5419
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300A_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,11995,1,143671,143671,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73422987353166,73422987361218,0,219810.0,219810.0,16384.0,65536.0,25635.0,2055404.0
+1,11995,1,143671,143671,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73422987403241,73422987409410,0,172119.0,172119.0,16384.0,65536.0,13078.0,1049232.0
+2,11995,1,143671,143671,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73422987380287,73422987386456,0,181234.0,181234.0,16384.0,65536.0,13125.0,1049364.0
diff --git a/tests/workloads/join_type_grid/MI300A_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/join_type_grid/MI300A_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..277e5af6fe
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300A_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,11995,1,143682,143682,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73422987353166,73422987361218,0,0.0,0.0,0.0
+1,11995,1,143682,143682,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73422987403241,73422987409410,0,0.0,0.0,0.0
+2,11995,1,143682,143682,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73422987380287,73422987386456,0,0.0,0.0,0.0
diff --git a/tests/workloads/join_type_grid/MI300A_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/join_type_grid/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..3cf6a0a7c3
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,143693,143693,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73422987353166,73422987361218,0,65536.0,283302.0,22615264.0
+1,11995,1,143693,143693,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73422987403241,73422987409410,0,65536.0,280858.0,22453312.0
+2,11995,1,143693,143693,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73422987380287,73422987386456,0,65536.0,199104.0,15914008.0
diff --git a/tests/workloads/join_type_grid/MI300A_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/join_type_grid/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..a0d375ee2c
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,143704,143704,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73422987353166,73422987361218,0,32768.0,536007.0,42875076.0
+1,11995,1,143704,143704,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73422987403241,73422987409410,0,32768.0,418295.0,33464720.0
+2,11995,1,143704,143704,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73422987380287,73422987386456,0,32768.0,418797.0,33511848.0
diff --git a/tests/workloads/join_type_grid/MI300A_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/join_type_grid/MI300A_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..44652264fc
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300A_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,11995,1,143715,143715,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73422987353166,73422987361218,0,235230.0,235230.0,132070.0,940920.0,16384.0,14180187.0,258054.0,0.0,57135608.0
+1,11995,1,143715,143715,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73422987403241,73422987409410,0,204804.0,204804.0,121787.0,819216.0,16384.0,11459300.0,208494.0,0.0,46223036.0
+2,11995,1,143715,143715,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73422987380287,73422987386456,0,188347.0,188347.0,105988.0,753388.0,16384.0,10967296.0,202025.0,0.0,44257024.0
diff --git a/tests/workloads/join_type_grid/MI300A_A1/log.txt b/tests/workloads/join_type_grid/MI300A_A1/log.txt
new file mode 100644
index 0000000000..74563e156f
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300A_A1/log.txt
@@ -0,0 +1,212 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/join_type_grid/MI300A_A1
+Target: MI300A_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: None
+Hardware Blocks: All
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+[profiling] Current input file: tests/workloads/join_type_grid/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+[profiling] Current input file: tests/workloads/join_type_grid/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/join_type_grid/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/join_type_grid/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+[profiling] Current input file: tests/workloads/join_type_grid/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+[profiling] Current input file: tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_CVT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_WR
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_RD
+[profiling] Current input file: tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F16
+[profiling] Current input file: tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_HITS
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_MISSES
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_MISSES_DUPLICATE
+[profiling] Current input file: tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_HITS
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES_DUPLICATE
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_1
+[profiling] Current input file: tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+[profiling] Current input file: tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_13.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[0]
+[profiling] Current input file: tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_14.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[1]
+[profiling] Current input file: tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_15.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[1]
+[profiling] Current input file: tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_16.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[1]
+[profiling] Current input file: tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_17.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[2]
+[profiling] Current input file: tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F64
+[profiling] Current input file: tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_GDS
+[profiling] Current input file: tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_INST_ANY
+[profiling] Current input file: tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_SCA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_MISC
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_WR
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_RD
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_SALU
+[profiling] Current input file: tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_THREAD_CYCLES_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ADDR_CONFLICT
+[profiling] Current input file: tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ITEMS
+[profiling] Current input file: tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_VALU_MFMA_BUSY_CYCLES
+[profiling] Current input file: tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_INST_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_READ_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_WRITE_REQ
+[profiling] Current input file: tests/workloads/join_type_grid/MI300A_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/join_type_grid/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/join_type_grid/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..293092f641
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/join_type_grid/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..08439eedce
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/join_type_grid/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..6cca322d4e
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/join_type_grid/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..e527ad31ba
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/join_type_grid/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..3f8e04adb3
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_0.txt b/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..ebc550fbfe
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD GRBM_COUNT GRBM_GUI_ACTIVE TCP_GATE_EN1_sum TCP_GATE_EN2_sum TCP_TD_TCP_STALL_CYCLES_sum TCP_TCR_TCP_STALL_CYCLES_sum TA_TA_BUSY_sum TA_BUFFER_WAVEFRONTS_sum TD_TD_BUSY_sum TD_TC_STALL_sum SPI_CSN_WINDOW_VALID SPI_CSN_BUSY CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE CPF_CPF_STAT_BUSY CPF_CPF_STAT_STALL TCC_CYCLE_sum TCC_BUSY_sum TCC_PROBE_sum TCC_PROBE_ALL_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_1.txt b/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..9ad887ddbb
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 GRBM_SPI_BUSY TCP_READ_TAGCONFLICT_STALL_CYCLES_sum TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum TCP_TA_TCP_STATE_READ_sum TA_BUFFER_READ_WAVEFRONTS_sum TA_BUFFER_WRITE_WAVEFRONTS_sum TD_SPI_STALL_sum TD_LOAD_WAVEFRONT_sum SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE CPC_CPC_TCIU_BUSY CPC_CPC_TCIU_IDLE CPF_CPF_TCIU_BUSY CPF_CPF_TCIU_STALL TCC_NC_REQ_sum TCC_UC_REQ_sum TCC_CC_REQ_sum TCC_RW_REQ_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_10.txt b/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..21c59688f7
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_11.txt b/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..df6d67d7b7
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_12.txt b/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..6e5320c11c
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_13.txt b/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_13.txt
new file mode 100644
index 0000000000..d95492c1cd
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_13.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_ATOMIC[0] TCC_BUBBLE[0] TCC_CYCLE[0] TCC_EA0_ATOMIC[0] TCC_ATOMIC[1] TCC_BUBBLE[1] TCC_CYCLE[1] TCC_EA0_ATOMIC[1] TCC_ATOMIC[2] TCC_BUBBLE[2] TCC_CYCLE[2] TCC_EA0_ATOMIC[2] TCC_ATOMIC[3] TCC_BUBBLE[3] TCC_CYCLE[3] TCC_EA0_ATOMIC[3] TCC_ATOMIC[4] TCC_BUBBLE[4] TCC_CYCLE[4] TCC_EA0_ATOMIC[4] TCC_ATOMIC[5] TCC_BUBBLE[5] TCC_CYCLE[5] TCC_EA0_ATOMIC[5] TCC_ATOMIC[6] TCC_BUBBLE[6] TCC_CYCLE[6] TCC_EA0_ATOMIC[6] TCC_ATOMIC[7] TCC_BUBBLE[7] TCC_CYCLE[7] TCC_EA0_ATOMIC[7] TCC_ATOMIC[8] TCC_BUBBLE[8] TCC_CYCLE[8] TCC_EA0_ATOMIC[8] TCC_ATOMIC[9] TCC_BUBBLE[9] TCC_CYCLE[9] TCC_EA0_ATOMIC[9] TCC_ATOMIC[10] TCC_BUBBLE[10] TCC_CYCLE[10] TCC_EA0_ATOMIC[10] TCC_ATOMIC[11] TCC_BUBBLE[11] TCC_CYCLE[11] TCC_EA0_ATOMIC[11] TCC_ATOMIC[12] TCC_BUBBLE[12] TCC_CYCLE[12] TCC_EA0_ATOMIC[12] TCC_ATOMIC[13] TCC_BUBBLE[13] TCC_CYCLE[13] TCC_EA0_ATOMIC[13] TCC_ATOMIC[14] TCC_BUBBLE[14] TCC_CYCLE[14] TCC_EA0_ATOMIC[14] TCC_ATOMIC[15] TCC_BUBBLE[15] TCC_CYCLE[15] TCC_EA0_ATOMIC[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_14.txt b/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_14.txt
new file mode 100644
index 0000000000..28327b86d3
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_14.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_ATOMIC_LEVEL[0] TCC_EA0_RDREQ[0] TCC_EA0_RDREQ_32B[0] TCC_EA0_RDREQ_LEVEL[0] TCC_EA0_ATOMIC_LEVEL[1] TCC_EA0_RDREQ[1] TCC_EA0_RDREQ_32B[1] TCC_EA0_RDREQ_LEVEL[1] TCC_EA0_ATOMIC_LEVEL[2] TCC_EA0_RDREQ[2] TCC_EA0_RDREQ_32B[2] TCC_EA0_RDREQ_LEVEL[2] TCC_EA0_ATOMIC_LEVEL[3] TCC_EA0_RDREQ[3] TCC_EA0_RDREQ_32B[3] TCC_EA0_RDREQ_LEVEL[3] TCC_EA0_ATOMIC_LEVEL[4] TCC_EA0_RDREQ[4] TCC_EA0_RDREQ_32B[4] TCC_EA0_RDREQ_LEVEL[4] TCC_EA0_ATOMIC_LEVEL[5] TCC_EA0_RDREQ[5] TCC_EA0_RDREQ_32B[5] TCC_EA0_RDREQ_LEVEL[5] TCC_EA0_ATOMIC_LEVEL[6] TCC_EA0_RDREQ[6] TCC_EA0_RDREQ_32B[6] TCC_EA0_RDREQ_LEVEL[6] TCC_EA0_ATOMIC_LEVEL[7] TCC_EA0_RDREQ[7] TCC_EA0_RDREQ_32B[7] TCC_EA0_RDREQ_LEVEL[7] TCC_EA0_ATOMIC_LEVEL[8] TCC_EA0_RDREQ[8] TCC_EA0_RDREQ_32B[8] TCC_EA0_RDREQ_LEVEL[8] TCC_EA0_ATOMIC_LEVEL[9] TCC_EA0_RDREQ[9] TCC_EA0_RDREQ_32B[9] TCC_EA0_RDREQ_LEVEL[9] TCC_EA0_ATOMIC_LEVEL[10] TCC_EA0_RDREQ[10] TCC_EA0_RDREQ_32B[10] TCC_EA0_RDREQ_LEVEL[10] TCC_EA0_ATOMIC_LEVEL[11] TCC_EA0_RDREQ[11] TCC_EA0_RDREQ_32B[11] TCC_EA0_RDREQ_LEVEL[11] TCC_EA0_ATOMIC_LEVEL[12] TCC_EA0_RDREQ[12] TCC_EA0_RDREQ_32B[12] TCC_EA0_RDREQ_LEVEL[12] TCC_EA0_ATOMIC_LEVEL[13] TCC_EA0_RDREQ[13] TCC_EA0_RDREQ_32B[13] TCC_EA0_RDREQ_LEVEL[13] TCC_EA0_ATOMIC_LEVEL[14] TCC_EA0_RDREQ[14] TCC_EA0_RDREQ_32B[14] TCC_EA0_RDREQ_LEVEL[14] TCC_EA0_ATOMIC_LEVEL[15] TCC_EA0_RDREQ[15] TCC_EA0_RDREQ_32B[15] TCC_EA0_RDREQ_LEVEL[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_15.txt b/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_15.txt
new file mode 100644
index 0000000000..033ae877ed
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_15.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_WRREQ[0] TCC_EA0_WRREQ_64B[0] TCC_EA0_WRREQ_LEVEL[0] TCC_HIT[0] TCC_EA0_WRREQ[1] TCC_EA0_WRREQ_64B[1] TCC_EA0_WRREQ_LEVEL[1] TCC_HIT[1] TCC_EA0_WRREQ[2] TCC_EA0_WRREQ_64B[2] TCC_EA0_WRREQ_LEVEL[2] TCC_HIT[2] TCC_EA0_WRREQ[3] TCC_EA0_WRREQ_64B[3] TCC_EA0_WRREQ_LEVEL[3] TCC_HIT[3] TCC_EA0_WRREQ[4] TCC_EA0_WRREQ_64B[4] TCC_EA0_WRREQ_LEVEL[4] TCC_HIT[4] TCC_EA0_WRREQ[5] TCC_EA0_WRREQ_64B[5] TCC_EA0_WRREQ_LEVEL[5] TCC_HIT[5] TCC_EA0_WRREQ[6] TCC_EA0_WRREQ_64B[6] TCC_EA0_WRREQ_LEVEL[6] TCC_HIT[6] TCC_EA0_WRREQ[7] TCC_EA0_WRREQ_64B[7] TCC_EA0_WRREQ_LEVEL[7] TCC_HIT[7] TCC_EA0_WRREQ[8] TCC_EA0_WRREQ_64B[8] TCC_EA0_WRREQ_LEVEL[8] TCC_HIT[8] TCC_EA0_WRREQ[9] TCC_EA0_WRREQ_64B[9] TCC_EA0_WRREQ_LEVEL[9] TCC_HIT[9] TCC_EA0_WRREQ[10] TCC_EA0_WRREQ_64B[10] TCC_EA0_WRREQ_LEVEL[10] TCC_HIT[10] TCC_EA0_WRREQ[11] TCC_EA0_WRREQ_64B[11] TCC_EA0_WRREQ_LEVEL[11] TCC_HIT[11] TCC_EA0_WRREQ[12] TCC_EA0_WRREQ_64B[12] TCC_EA0_WRREQ_LEVEL[12] TCC_HIT[12] TCC_EA0_WRREQ[13] TCC_EA0_WRREQ_64B[13] TCC_EA0_WRREQ_LEVEL[13] TCC_HIT[13] TCC_EA0_WRREQ[14] TCC_EA0_WRREQ_64B[14] TCC_EA0_WRREQ_LEVEL[14] TCC_HIT[14] TCC_EA0_WRREQ[15] TCC_EA0_WRREQ_64B[15] TCC_EA0_WRREQ_LEVEL[15] TCC_HIT[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_16.txt b/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_16.txt
new file mode 100644
index 0000000000..123269c3f9
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_16.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_MISS[0] TCC_READ[0] TCC_REQ[0] TCC_RW_REQ[0] TCC_MISS[1] TCC_READ[1] TCC_REQ[1] TCC_RW_REQ[1] TCC_MISS[2] TCC_READ[2] TCC_REQ[2] TCC_RW_REQ[2] TCC_MISS[3] TCC_READ[3] TCC_REQ[3] TCC_RW_REQ[3] TCC_MISS[4] TCC_READ[4] TCC_REQ[4] TCC_RW_REQ[4] TCC_MISS[5] TCC_READ[5] TCC_REQ[5] TCC_RW_REQ[5] TCC_MISS[6] TCC_READ[6] TCC_REQ[6] TCC_RW_REQ[6] TCC_MISS[7] TCC_READ[7] TCC_REQ[7] TCC_RW_REQ[7] TCC_MISS[8] TCC_READ[8] TCC_REQ[8] TCC_RW_REQ[8] TCC_MISS[9] TCC_READ[9] TCC_REQ[9] TCC_RW_REQ[9] TCC_MISS[10] TCC_READ[10] TCC_REQ[10] TCC_RW_REQ[10] TCC_MISS[11] TCC_READ[11] TCC_REQ[11] TCC_RW_REQ[11] TCC_MISS[12] TCC_READ[12] TCC_REQ[12] TCC_RW_REQ[12] TCC_MISS[13] TCC_READ[13] TCC_REQ[13] TCC_RW_REQ[13] TCC_MISS[14] TCC_READ[14] TCC_REQ[14] TCC_RW_REQ[14] TCC_MISS[15] TCC_READ[15] TCC_REQ[15] TCC_RW_REQ[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_17.txt b/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_17.txt
new file mode 100644
index 0000000000..102fb795bd
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_17.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_TAG_STALL[0] TCC_TOO_MANY_EA_WRREQS_STALL[0] TCC_WRITE[0] TCC_TAG_STALL[1] TCC_TOO_MANY_EA_WRREQS_STALL[1] TCC_WRITE[1] TCC_TAG_STALL[2] TCC_TOO_MANY_EA_WRREQS_STALL[2] TCC_WRITE[2] TCC_TAG_STALL[3] TCC_TOO_MANY_EA_WRREQS_STALL[3] TCC_WRITE[3] TCC_TAG_STALL[4] TCC_TOO_MANY_EA_WRREQS_STALL[4] TCC_WRITE[4] TCC_TAG_STALL[5] TCC_TOO_MANY_EA_WRREQS_STALL[5] TCC_WRITE[5] TCC_TAG_STALL[6] TCC_TOO_MANY_EA_WRREQS_STALL[6] TCC_WRITE[6] TCC_TAG_STALL[7] TCC_TOO_MANY_EA_WRREQS_STALL[7] TCC_WRITE[7] TCC_TAG_STALL[8] TCC_TOO_MANY_EA_WRREQS_STALL[8] TCC_WRITE[8] TCC_TAG_STALL[9] TCC_TOO_MANY_EA_WRREQS_STALL[9] TCC_WRITE[9] TCC_TAG_STALL[10] TCC_TOO_MANY_EA_WRREQS_STALL[10] TCC_WRITE[10] TCC_TAG_STALL[11] TCC_TOO_MANY_EA_WRREQS_STALL[11] TCC_WRITE[11] TCC_TAG_STALL[12] TCC_TOO_MANY_EA_WRREQS_STALL[12] TCC_WRITE[12] TCC_TAG_STALL[13] TCC_TOO_MANY_EA_WRREQS_STALL[13] TCC_WRITE[13] TCC_TAG_STALL[14] TCC_TOO_MANY_EA_WRREQS_STALL[14] TCC_WRITE[14] TCC_TAG_STALL[15] TCC_TOO_MANY_EA_WRREQS_STALL[15] TCC_WRITE[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_2.txt b/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..8ff8201c5a
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 TCP_VOLATILE_sum TCP_TOTAL_ACCESSES_sum TCP_TOTAL_READ_sum TCP_TOTAL_WRITE_sum TA_BUFFER_ATOMIC_WAVEFRONTS_sum TA_BUFFER_TOTAL_CYCLES_sum TD_ATOMIC_WAVEFRONT_sum TD_STORE_WAVEFRONT_sum SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION CPF_CPF_STAT_IDLE CPF_CPF_TCIU_IDLE TCC_REQ_sum TCC_STREAMING_REQ_sum TCC_HIT_sum TCC_MISS_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_3.txt b/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..cb10e4801d
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS TCP_TOTAL_ATOMIC_WITH_RET_sum TCP_TOTAL_ATOMIC_WITHOUT_RET_sum TCP_TOTAL_WRITEBACK_INVALIDATES_sum TCP_TOTAL_CACHE_ACCESSES_sum TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES_sum TD_COALESCABLE_WAVEFRONT_sum SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE CPF_CMP_UTCL1_STALL_ON_TRANSLATION TCC_READ_sum TCC_WRITE_sum TCC_ATOMIC_sum TCC_WRITEBACK_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_4.txt b/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..e4e6069e38
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAIT_ANY SQ_WAIT_INST_ANY SQ_ACTIVE_INST_ANY SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU TCP_UTCL1_TRANSLATION_MISS_sum TCP_UTCL1_TRANSLATION_HIT_sum TCP_UTCL1_PERMISSION_MISS_sum TCP_UTCL1_REQUEST_sum TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_TOTAL_WAVEFRONTS_sum SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE TCC_EA0_WRREQ_sum TCC_EA0_WRREQ_64B_sum TCC_EA0_WR_UNCACHED_32B_sum TCC_EA0_WRREQ_DRAM_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_5.txt b/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..77bd288232
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_SCA SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU TCP_TCC_READ_REQ_sum TCP_TCC_WRITE_REQ_sum TCP_TCC_ATOMIC_WITH_RET_REQ_sum TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN CPC_ME1_DC0_SPI_BUSY TCC_EA0_RDREQ_sum TCC_EA0_RDREQ_32B_sum TCC_BUBBLE_sum TCC_EA0_RD_UNCACHED_32B_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_6.txt b/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..609c184df8
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_THREAD_CYCLES_VALU SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 TCP_TCC_NC_READ_REQ_sum TCP_TCC_NC_WRITE_REQ_sum TCP_TCC_NC_ATOMIC_REQ_sum TCP_TCC_UC_READ_REQ_sum TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN TCC_EA0_RDREQ_DRAM_sum TCC_TAG_STALL_sum TCC_NORMAL_WRITEBACK_sum TCC_ALL_TC_OP_WB_WRITEBACK_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_7.txt b/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..5881e5fb8f
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED TCP_TCC_UC_WRITE_REQ_sum TCP_TCC_UC_ATOMIC_REQ_sum TCP_TCC_CC_READ_REQ_sum TCP_TCC_CC_WRITE_REQ_sum TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR TCC_NORMAL_EVICT_sum TCC_ALL_TC_OP_INV_EVICT_sum TCC_TOO_MANY_EA_WRREQS_STALL_sum TCC_EA0_ATOMIC_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_8.txt b/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..66317384f5
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES TCP_TCC_CC_ATOMIC_REQ_sum TCP_TCC_RW_READ_REQ_sum TCP_TCC_RW_WRITE_REQ_sum TCP_TCC_RW_ATOMIC_REQ_sum SPI_VWC_CSC_WR SPI_RA_BULKY_CU_FULL_CSN TCC_EA0_RDREQ_LEVEL_sum TCC_EA0_WRREQ_LEVEL_sum TCC_EA0_ATOMIC_LEVEL_sum TCC_EA0_WRREQ_STALL_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_9.txt b/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..60ceab315a
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300A_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ TCP_PENDING_STALL_CYCLES_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300A_A1/perfmon/timestamps.txt b/tests/workloads/join_type_grid/MI300A_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..676cca1b80
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300A_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300A_A1/pmc_perf.csv b/tests/workloads/join_type_grid/MI300A_A1/pmc_perf.csv
new file mode 100644
index 0000000000..21735ba858
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300A_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SQ_INSTS_BRANCH,SQ_INSTS_SENDMSG,SQ_WAIT_ANY,SQ_WAIT_INST_ANY,SQ_ACTIVE_INST_ANY,SQ_ACTIVE_INST_VMEM,SQ_ACTIVE_INST_LDS,SQ_ACTIVE_INST_VALU,SPI_RA_WAVE_SIMD_FULL_CSN,SPI_RA_VGPR_SIMD_FULL_CSN,CPC_CPC_UTCL2IU_STALL,CPC_ME1_BUSY_FOR_PACKET_DECODE,TA_ADDR_STALLED_BY_TC_CYCLES_sum,TA_TOTAL_WAVEFRONTS_sum,TCC_EA0_WRREQ_64B_sum,TCC_EA0_WRREQ_DRAM_sum,TCC_EA0_WRREQ_sum,TCC_EA0_WR_UNCACHED_32B_sum,TCP_UTCL1_PERMISSION_MISS_sum,TCP_UTCL1_REQUEST_sum,TCP_UTCL1_TRANSLATION_HIT_sum,TCP_UTCL1_TRANSLATION_MISS_sum,Wave_Size_1,Correlation_ID_1,XCC_Index,TCC_EA0_WRREQ[0],TCC_EA0_WRREQ_64B[0],TCC_EA0_WRREQ_LEVEL[0],TCC_HIT[0],TCC_EA0_WRREQ[1],TCC_EA0_WRREQ_64B[1],TCC_EA0_WRREQ_LEVEL[1],TCC_HIT[1],TCC_EA0_WRREQ[2],TCC_EA0_WRREQ_64B[2],TCC_EA0_WRREQ_LEVEL[2],TCC_HIT[2],TCC_EA0_WRREQ[3],TCC_EA0_WRREQ_64B[3],TCC_EA0_WRREQ_LEVEL[3],TCC_HIT[3],TCC_EA0_WRREQ[4],TCC_EA0_WRREQ_64B[4],TCC_EA0_WRREQ_LEVEL[4],TCC_HIT[4],TCC_EA0_WRREQ[5],TCC_EA0_WRREQ_64B[5],TCC_EA0_WRREQ_LEVEL[5],TCC_HIT[5],TCC_EA0_WRREQ[6],TCC_EA0_WRREQ_64B[6],TCC_EA0_WRREQ_LEVEL[6],TCC_HIT[6],TCC_EA0_WRREQ[7],TCC_EA0_WRREQ_64B[7],TCC_EA0_WRREQ_LEVEL[7],TCC_HIT[7],TCC_EA0_WRREQ[8],TCC_EA0_WRREQ_64B[8],TCC_EA0_WRREQ_LEVEL[8],TCC_HIT[8],TCC_EA0_WRREQ[9],TCC_EA0_WRREQ_64B[9],TCC_EA0_WRREQ_LEVEL[9],TCC_HIT[9],TCC_EA0_WRREQ[10],TCC_EA0_WRREQ_64B[10],TCC_EA0_WRREQ_LEVEL[10],TCC_HIT[10],TCC_EA0_WRREQ[11],TCC_EA0_WRREQ_64B[11],TCC_EA0_WRREQ_LEVEL[11],TCC_HIT[11],TCC_EA0_WRREQ[12],TCC_EA0_WRREQ_64B[12],TCC_EA0_WRREQ_LEVEL[12],TCC_HIT[12],TCC_EA0_WRREQ[13],TCC_EA0_WRREQ_64B[13],TCC_EA0_WRREQ_LEVEL[13],TCC_HIT[13],TCC_EA0_WRREQ[14],TCC_EA0_WRREQ_64B[14],TCC_EA0_WRREQ_LEVEL[14],TCC_HIT[14],TCC_EA0_WRREQ[15],TCC_EA0_WRREQ_64B[15],TCC_EA0_WRREQ_LEVEL[15],TCC_HIT[15],TCC_EA0_WRREQ[16],TCC_EA0_WRREQ_64B[16],TCC_EA0_WRREQ_LEVEL[16],TCC_HIT[16],TCC_EA0_WRREQ[17],TCC_EA0_WRREQ_64B[17],TCC_EA0_WRREQ_LEVEL[17],TCC_HIT[17],TCC_EA0_WRREQ[18],TCC_EA0_WRREQ_64B[18],TCC_EA0_WRREQ_LEVEL[18],TCC_HIT[18],TCC_EA0_WRREQ[19],TCC_EA0_WRREQ_64B[19],TCC_EA0_WRREQ_LEVEL[19],TCC_HIT[19],TCC_EA0_WRREQ[20],TCC_EA0_WRREQ_64B[20],TCC_EA0_WRREQ_LEVEL[20],TCC_HIT[20],TCC_EA0_WRREQ[21],TCC_EA0_WRREQ_64B[21],TCC_EA0_WRREQ_LEVEL[21],TCC_HIT[21],TCC_EA0_WRREQ[22],TCC_EA0_WRREQ_64B[22],TCC_EA0_WRREQ_LEVEL[22],TCC_HIT[22],TCC_EA0_WRREQ[23],TCC_EA0_WRREQ_64B[23],TCC_EA0_WRREQ_LEVEL[23],TCC_HIT[23],TCC_EA0_WRREQ[24],TCC_EA0_WRREQ_64B[24],TCC_EA0_WRREQ_LEVEL[24],TCC_HIT[24],TCC_EA0_WRREQ[25],TCC_EA0_WRREQ_64B[25],TCC_EA0_WRREQ_LEVEL[25],TCC_HIT[25],TCC_EA0_WRREQ[26],TCC_EA0_WRREQ_64B[26],TCC_EA0_WRREQ_LEVEL[26],TCC_HIT[26],TCC_EA0_WRREQ[27],TCC_EA0_WRREQ_64B[27],TCC_EA0_WRREQ_LEVEL[27],TCC_HIT[27],TCC_EA0_WRREQ[28],TCC_EA0_WRREQ_64B[28],TCC_EA0_WRREQ_LEVEL[28],TCC_HIT[28],TCC_EA0_WRREQ[29],TCC_EA0_WRREQ_64B[29],TCC_EA0_WRREQ_LEVEL[29],TCC_HIT[29],TCC_EA0_WRREQ[30],TCC_EA0_WRREQ_64B[30],TCC_EA0_WRREQ_LEVEL[30],TCC_HIT[30],TCC_EA0_WRREQ[31],TCC_EA0_WRREQ_64B[31],TCC_EA0_WRREQ_LEVEL[31],TCC_HIT[31],TCC_EA0_WRREQ[32],TCC_EA0_WRREQ_64B[32],TCC_EA0_WRREQ_LEVEL[32],TCC_HIT[32],TCC_EA0_WRREQ[33],TCC_EA0_WRREQ_64B[33],TCC_EA0_WRREQ_LEVEL[33],TCC_HIT[33],TCC_EA0_WRREQ[34],TCC_EA0_WRREQ_64B[34],TCC_EA0_WRREQ_LEVEL[34],TCC_HIT[34],TCC_EA0_WRREQ[35],TCC_EA0_WRREQ_64B[35],TCC_EA0_WRREQ_LEVEL[35],TCC_HIT[35],TCC_EA0_WRREQ[36],TCC_EA0_WRREQ_64B[36],TCC_EA0_WRREQ_LEVEL[36],TCC_HIT[36],TCC_EA0_WRREQ[37],TCC_EA0_WRREQ_64B[37],TCC_EA0_WRREQ_LEVEL[37],TCC_HIT[37],TCC_EA0_WRREQ[38],TCC_EA0_WRREQ_64B[38],TCC_EA0_WRREQ_LEVEL[38],TCC_HIT[38],TCC_EA0_WRREQ[39],TCC_EA0_WRREQ_64B[39],TCC_EA0_WRREQ_LEVEL[39],TCC_HIT[39],TCC_EA0_WRREQ[40],TCC_EA0_WRREQ_64B[40],TCC_EA0_WRREQ_LEVEL[40],TCC_HIT[40],TCC_EA0_WRREQ[41],TCC_EA0_WRREQ_64B[41],TCC_EA0_WRREQ_LEVEL[41],TCC_HIT[41],TCC_EA0_WRREQ[42],TCC_EA0_WRREQ_64B[42],TCC_EA0_WRREQ_LEVEL[42],TCC_HIT[42],TCC_EA0_WRREQ[43],TCC_EA0_WRREQ_64B[43],TCC_EA0_WRREQ_LEVEL[43],TCC_HIT[43],TCC_EA0_WRREQ[44],TCC_EA0_WRREQ_64B[44],TCC_EA0_WRREQ_LEVEL[44],TCC_HIT[44],TCC_EA0_WRREQ[45],TCC_EA0_WRREQ_64B[45],TCC_EA0_WRREQ_LEVEL[45],TCC_HIT[45],TCC_EA0_WRREQ[46],TCC_EA0_WRREQ_64B[46],TCC_EA0_WRREQ_LEVEL[46],TCC_HIT[46],TCC_EA0_WRREQ[47],TCC_EA0_WRREQ_64B[47],TCC_EA0_WRREQ_LEVEL[47],TCC_HIT[47],TCC_EA0_WRREQ[48],TCC_EA0_WRREQ_64B[48],TCC_EA0_WRREQ_LEVEL[48],TCC_HIT[48],TCC_EA0_WRREQ[49],TCC_EA0_WRREQ_64B[49],TCC_EA0_WRREQ_LEVEL[49],TCC_HIT[49],TCC_EA0_WRREQ[50],TCC_EA0_WRREQ_64B[50],TCC_EA0_WRREQ_LEVEL[50],TCC_HIT[50],TCC_EA0_WRREQ[51],TCC_EA0_WRREQ_64B[51],TCC_EA0_WRREQ_LEVEL[51],TCC_HIT[51],TCC_EA0_WRREQ[52],TCC_EA0_WRREQ_64B[52],TCC_EA0_WRREQ_LEVEL[52],TCC_HIT[52],TCC_EA0_WRREQ[53],TCC_EA0_WRREQ_64B[53],TCC_EA0_WRREQ_LEVEL[53],TCC_HIT[53],TCC_EA0_WRREQ[54],TCC_EA0_WRREQ_64B[54],TCC_EA0_WRREQ_LEVEL[54],TCC_HIT[54],TCC_EA0_WRREQ[55],TCC_EA0_WRREQ_64B[55],TCC_EA0_WRREQ_LEVEL[55],TCC_HIT[55],TCC_EA0_WRREQ[56],TCC_EA0_WRREQ_64B[56],TCC_EA0_WRREQ_LEVEL[56],TCC_HIT[56],TCC_EA0_WRREQ[57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CED_WRITE_CYCLES_sum,TCC_ATOMIC_sum,TCC_READ_sum,TCC_WRITEBACK_sum,TCC_WRITE_sum,TCP_TOTAL_ATOMIC_WITHOUT_RET_sum,TCP_TOTAL_ATOMIC_WITH_RET_sum,TCP_TOTAL_CACHE_ACCESSES_sum,TCP_TOTAL_WRITEBACK_INVALIDATES_sum,TD_COALESCABLE_WAVEFRONT_sum,Wave_Size_5,Correlation_ID_5,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,TA_FLAT_ATOMIC_WAVEFRONTS_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,TCC_ALL_TC_OP_INV_EVICT_sum,TCC_EA0_ATOMIC_sum,TCC_NORMAL_EVICT_sum,TCC_TOO_MANY_EA_WRREQS_STALL_sum,TCP_TCC_CC_READ_REQ_sum,TCP_TCC_CC_WRITE_REQ_sum,TCP_TCC_UC_ATOMIC_REQ_sum,TCP_TCC_UC_WRITE_REQ_sum,Wave_Size_6,Correlation_ID_6,XCC_Index_6,TCC_MISS[0],TCC_READ[0],TCC_REQ[0],TCC_RW_REQ[0],TCC_MISS[1],TCC_READ[1],TCC_REQ[1],TCC_RW_REQ[1],TCC_MISS[2],TCC_READ[2],TCC_REQ[2],TCC_RW_REQ[2],TCC_MISS[3],TCC_READ[3],TCC_REQ[3],TCC_RW_REQ[3],TCC_MISS[4],TCC_READ[4],TCC_REQ[4],TCC_RW_REQ[4],TCC_MISS[5],TCC_READ[5],TCC_REQ[5],TCC_RW_REQ[5],TCC_MISS[6],TCC_READ[6],TCC_REQ[6],TCC_RW_REQ[6],TCC_MISS[7],TCC_READ[7],TCC_REQ[7],TCC_RW_REQ[7],TCC_MISS[8],TCC_READ[8],TCC_REQ[8],TCC_RW_REQ[8],TCC_MISS[9],TCC_READ[9],TCC_REQ[9],TCC_RW_REQ[9],TCC_MISS[10],TCC_READ[10],TCC_REQ[10],TCC_RW_REQ[10],TCC_MISS[11],TCC_READ[11],TCC_REQ[11],TCC_RW_REQ[11],TCC_MISS[12],TCC_READ[12],TCC_REQ[12],TCC_RW_REQ[12],TCC_MISS[13],TCC_READ[13],TCC_REQ[13],TCC_RW_REQ[13],TCC_MISS[14],TCC_READ[14],TCC_REQ[14],TCC_RW_REQ[14],TCC_MISS[15],TCC_READ[15],TCC_REQ[15],TCC_RW_REQ[15],TCC_MISS[16],TCC_READ[16],TCC_REQ[16],TCC_RW_REQ[16],TCC_MISS[17],TCC_READ[17],TCC_REQ[17],TCC_RW_REQ[17],TCC_MISS[18],TCC_READ[18],TCC_REQ[18],TCC_RW_REQ[18],TCC_MISS[19],TCC_READ[19],TCC_REQ[19],TCC_RW_REQ[19],TCC_MISS[20],TCC_READ[20],TCC_REQ[20],TCC_RW_REQ[20],TCC_MISS[21],TCC_READ[21],TCC_REQ[21],TCC_RW_REQ[21],TCC_MISS[22],TCC_READ[22],TCC_REQ[22],TCC_RW_REQ[22],TCC_MISS[23],TCC_READ[23],TCC_REQ[23],TCC_RW_REQ[23],TCC_MISS[24],TCC_READ[24],TCC_REQ[24],TCC_RW_REQ[24],TCC_MISS[25],TCC_READ[25],TCC_REQ[25],TCC_RW_REQ[25],TCC_MISS[26],TCC_READ[26],TCC_REQ[26],TCC_RW_REQ[26],TCC_MISS[27],TCC_READ[27],TCC_REQ[27],TCC_RW_REQ[27],TCC_MISS[28],TCC_READ[28],TCC_REQ[28],TCC_RW_REQ[28],TCC_MISS[29],TCC_READ[29],TCC_REQ[29],TCC_RW_REQ[29],TCC_MISS[30],TCC_READ[30],TCC_REQ[30],TCC_RW_REQ[30],TCC_MISS[31],TCC_READ[31],TCC_REQ[31],TCC_RW_REQ[31],TCC_MISS[32],TCC_READ[32],TCC_REQ[32],TCC_RW_REQ[32],TCC_MISS[33],TCC_READ[33],TCC_REQ[33],TCC_RW_REQ[33],TCC_MISS[34],TCC_READ[34],TCC_REQ[34],TCC_RW_REQ[34],TCC_MISS[35],TCC_READ[35],TCC_REQ[35],TCC_RW_REQ[35],TCC_MISS[36],TCC_READ[36],TCC_REQ[36],TCC_RW_REQ[36],TCC_MISS[37],TCC_READ[37],TCC_REQ[37],TCC_RW_REQ[37],TCC_MISS[38],TCC_READ[38],TCC_REQ[38],TCC_RW_REQ[38],TCC_MISS[39],TCC_READ[39],TCC_REQ[39],TCC_RW_REQ[39],TCC_MISS[40],TCC_READ[40],TCC_REQ[40],TCC_RW_REQ[40],TCC_MISS[41],TCC_READ[41],TCC_REQ[41],TCC_RW_REQ[41],TCC_MISS[42],TCC_READ[42],TCC_REQ[42],TCC_RW_REQ[42],TCC_MISS[43],TCC_READ[43],TCC_REQ[43],TCC_RW_REQ[43],TCC_MISS[44],TCC_READ[44],TCC_REQ[44],TCC_RW_REQ[44],TCC_MISS[45],TCC_READ[45],TCC_REQ[45],TCC_RW_REQ[45],TCC_MISS[46],TCC_READ[46],TCC_REQ[46],TCC_RW_REQ[46],TCC_MISS[47],TCC_READ[47],TCC_REQ[47],TCC_RW_REQ[47],TCC_MISS[48],TCC_READ[48],TCC_REQ[48],TCC_RW_REQ[48],TCC_MISS[49],TCC_READ[49],TCC_REQ[49],TCC_RW_REQ[49],TCC_MISS[50],TCC_READ[50],TCC_REQ[50],TCC_RW_REQ[50],TCC_MISS[51],TCC_READ[51],TCC_REQ[51],TCC_RW_REQ[51],TCC_MISS[52],TCC_READ[52],TCC_REQ[52],TCC_RW_REQ[52],TCC_MISS[53],TCC_READ[53],TCC_REQ[53],TCC_RW_REQ[53],TCC_MISS[54],TCC_READ[54],TCC_REQ[54],TCC_RW_REQ[54],TCC_MISS[55],TCC_READ[55],TCC_REQ[55],TCC_RW_REQ[55],TCC_MISS[56],TCC_READ[56],TCC_REQ[56],TCC_RW_REQ[56],TCC_MISS[57],TCC_READ[57],TCC_REQ[57],TCC_RW_REQ[57],TCC_MISS[58],TCC_READ[58],TCC_REQ[58],TCC_RW_REQ[58],TCC_MISS[59],TCC_READ[59],TCC_REQ[59],TCC_RW_REQ[59],TCC_MISS[60],TCC_READ[60],TCC_REQ[60],TCC_RW_REQ[60],TCC_MISS[61],TCC_READ[61],TCC_REQ[61],TCC_RW_REQ[61],TCC_MISS[62],TCC_READ[62],TCC_REQ[62],TCC_RW_REQ[62],TCC_MISS[63],TCC_READ[63],TCC_REQ[63],TCC_RW_REQ[63],TCC_MISS[64],TCC_READ[64],TCC_REQ[64],TCC_RW_REQ[64],TCC_MISS[65],TCC_READ[65],TCC_REQ[65],TCC_RW_REQ[65],TCC_MISS[66],TCC_READ[66],TCC_REQ[66],TCC_RW_REQ[66],TCC_MISS[67],TCC_READ[67],TCC_REQ[67],TCC_RW_REQ[67],TCC_MISS[68],TCC_READ[68],TCC_REQ[68],TCC_RW_REQ[68],TCC_MISS[69],TCC_READ[69],TCC_REQ[69],TCC_RW_REQ[69],TCC_MISS[70],TCC_READ[70],TCC_REQ[70],TCC_RW_REQ[70],TCC_MISS[71],TCC_READ[71],TCC_REQ[71],TCC_RW_REQ[71],TCC_MISS[72],TCC_READ[72],TCC_REQ[72],TCC_RW_REQ[72],TCC_MISS[73],TCC_READ[73],TCC_REQ[73],TCC_RW_REQ[73],TCC_MISS[74],TCC_READ[74],TCC_REQ[74],TCC_RW_REQ[74],TCC_MISS[75],TCC_READ[75],TCC_REQ[75],TCC_RW_REQ[75],TCC_MISS[76],TCC_READ[76],TCC_REQ[76],TCC_RW_REQ[76],TCC_MISS[77],TCC_READ[77],TCC_REQ[77],TCC_RW_REQ[77],TCC_MISS[78],TCC_READ[78],TCC_REQ[78],TCC_RW_REQ[78],TCC_MISS[79],TCC_READ[79],TCC_REQ[79],TCC_RW_REQ[79],TCC_MISS[80],TCC_READ[80],TCC_REQ[80],TCC_RW_REQ[80],TCC_MISS[81],TCC_READ[81],TCC_REQ[81],TCC_RW_REQ[81],TCC_MISS[82],TCC_READ[82],TCC_REQ[82],TCC_RW_REQ[82],TCC_MISS[83],TCC_READ[83],TCC_REQ[83],TCC_RW_REQ[83],TCC_MISS[84],TCC_READ[84],TCC_REQ[84],TCC_RW_REQ[84],TCC_MISS[85],TCC_READ[85],TCC_REQ[85],TCC_RW_REQ[85],TCC_MISS[86],TCC_READ[86],TCC_REQ[86],TCC_RW_REQ[86],TCC_MISS[87],TCC_READ[87],TCC_REQ[87],TCC_RW_REQ[87],TCC_MISS[88],TCC_READ[88],TCC_REQ[88],TCC_RW_REQ[88],TCC_MISS[89],TCC_READ[89],TCC_REQ[89],TCC_RW_REQ[89],TCC_MISS[90],TCC_READ[90],TCC_REQ[90],TCC_RW_REQ[90],TCC_MISS[91],TCC_READ[91],TCC_REQ[91],TCC_RW_REQ[91],TCC_MISS[92],TCC_READ[92],TCC_REQ[92],TCC_RW_REQ[92],TCC_MISS[93],TCC_READ[93],TCC_REQ[93],TCC_RW_REQ[93],TCC_MISS[94],TCC_READ[94],TCC_REQ[94],TCC_RW_REQ[94],TCC_MISS[95],TCC_READ[95],TCC_REQ[95],TCC_RW_REQ[95],Wave_Size_7,Correlation_ID_7,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SPI_RA_REQ_NO_ALLOC,SPI_RA_REQ_NO_ALLOC_CSN,CPC_CPC_STAT_STALL,CPC_UTCL1_STALL_ON_TRANSLATION,CPF_CPF_STAT_IDLE,CPF_CPF_TCIU_IDLE,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,TA_BUFFER_TOTAL_CYCLES_sum,TCC_HIT_sum,TCC_MISS_sum,TCC_REQ_sum,TCC_STREAMING_REQ_sum,TCP_TOTAL_ACCESSES_sum,TCP_TOTAL_READ_sum,TCP_TOTAL_WRITE_sum,TCP_VOLATILE_sum,TD_ATOMIC_WAVEFRONT_sum,TD_STORE_WAVEFRONT_sum,Wave_Size_8,Correlation_ID_8,XCC_Index_8,TCC_ATOMIC[0],TCC_BUBBLE[0],TCC_CYCLE[0],TCC_EA0_ATOMIC[0],TCC_ATOMIC[1],TCC_BUBBLE[1],TCC_CYCLE[1],TCC_EA0_ATOMIC[1],TCC_ATOMIC[2],TCC_BUBBLE[2],TCC_CYCLE[2],TCC_EA0_ATOMIC[2],TCC_ATOMIC[3],TCC_BUBBLE[3],TCC_CYCLE[3],TCC_EA0_ATOMIC[3],TCC_ATOMIC[4],TCC_BUBBLE[4],TCC_CYCLE[4],TCC_EA0_ATOMIC[4],TCC_ATOMIC[5],TCC_BUBBLE[5],TCC_CYCLE[5],TCC_EA0_ATOMIC[5],TCC_ATOMIC[6],TCC_BUBBLE[6],TCC_CYCLE[6],TCC_EA0_ATOMIC[6],TCC_ATOMIC[7],TCC_BUBBLE[7],TCC_CYCLE[7],TCC_EA0_ATOMIC[7],TCC_ATOMIC[8],TCC_BUBBLE[8],TCC_CYCLE[8],TCC_EA0_ATOMIC[8],TCC_ATOMIC[9],TCC_BUBBLE[9],TCC_CYCLE[9],TCC_EA0_ATOMIC[9],TCC_ATOMIC[10],TCC_BUBBLE[10],TCC_CYCLE[10],TCC_EA0_ATOMIC[10],TCC_ATOMIC[11],TCC_BUBBLE[11],TCC_CYCLE[11],TCC_EA0_ATOMIC[11],TCC_ATOMIC[12],TCC_BUBBLE[12],TCC_CYCLE[12],TCC_EA0_ATOMIC[12],TCC_ATOMIC[13],TCC_BUBBLE[13],TCC_CYCLE[13],TCC_EA0_ATOMIC[13],TCC_ATOMIC[14],TCC_BUBBLE[14],TCC_CYCLE[14],TCC_EA0_ATOMIC[14],TCC_ATOMIC[15],TCC_BUBBLE[15],TCC_CYCLE[15],TCC_EA0_ATOMIC[15],TCC_ATOMIC[16],TCC_BUBBLE[16],TCC_CYCLE[16],TCC_EA0_ATOMIC[16],TCC_ATOMIC[17],TCC_BUBBLE[17],TCC_CYCLE[17],TCC_EA0_ATOMIC[17],TCC_ATOMIC[18],TCC_BUBBLE[18],TCC_CYCLE[18],TCC_EA0_ATOMIC[18],TCC_ATOMIC[19],TCC_BUBBLE[19],TCC_CYCLE[19],TCC_EA0_ATOMIC[19],TCC_ATOMIC[20],TCC_BUBBLE[20],TCC_CYCLE[20],TCC_EA0_ATOMIC[20],TCC_ATOMIC[21],TCC_BUBBLE[21],TCC_CYCLE[21],TCC_EA0_ATOMIC[21],TCC_ATOMIC[22],TCC_BUBBLE[22],TCC_CYCLE[22],TCC_EA0_ATOMIC[22],TCC_ATOMIC[23],TCC_BUBBLE[23],TCC_CYCLE[23],TCC_EA0_ATOMIC[23],TCC_ATOMIC[24],TCC_BUBBLE[24],TCC_CYCLE[24],TCC_EA0_ATOMIC[24],TCC_ATOMIC[25],TCC_BUBBLE[25],TCC_CYCLE[25],TCC_EA0_ATOMIC[25],TCC_ATOMIC[26],TCC_BUBBLE[26],TCC_CYCLE[26],TCC_EA0_ATOMIC[26],TCC_ATOMIC[27],TCC_BUBBLE[27],TCC_CYCLE[27],TCC_EA0_ATOMIC[27],TCC_ATOMIC[28],TCC_BUBBLE[28],TCC_CYCLE[28],TCC_EA0_ATOMIC[28],TCC_ATOMIC[29],TCC_BUBBLE[29],TCC_CYCLE[29],TCC_EA0_ATOMIC[29],TCC_ATOMIC[30],TCC_BUBBLE[30],TCC_CYCLE[30],TCC_EA0_ATOMIC[30],TCC_ATOMIC[31],TCC_BUBBLE[31],TCC_CYCLE[31],TCC_EA0_ATOMIC[31],TCC_ATOMIC[32],TCC_BUBBLE[32],TCC_CYCLE[32],TCC_EA0_ATOMIC[32],TCC_ATOMIC[33],TCC_BUBBLE[33],TCC_CYCLE[33],TCC_EA0_ATOMIC[33],TCC_ATOMIC[34],TCC_BUBBLE[34],TCC_CYCLE[34],TCC_EA0_ATOMIC[34],TCC_ATOMIC[35],TCC_BUBBLE[35],TCC_CYCLE[35],TCC_EA0_ATOMIC[35],TCC_ATOMIC[36],TCC_BUBBLE[36],TCC_CYCLE[36],TCC_EA0_ATOMIC[36],TCC_ATOMIC[37],TCC_BUBBLE[37],TCC_CYCLE[37],TCC_EA0_ATOMIC[37],TCC_ATOMIC[38],TCC_BUBBLE[38],TCC_CYCLE[38],TCC_EA0_ATOMIC[38],TCC_ATOMIC[39],TCC_BUBBLE[39],TCC_CYCLE[39],TCC_EA0_ATOMIC[39],TCC_ATOMIC[40],TCC_BUBBLE[40],TCC_CYCLE[40],TCC_EA0_ATOMIC[40],TCC_ATOMIC[41],TCC_BUBBLE[41],TCC_CYCLE[41],TCC_EA0_ATOMIC[41],TCC_ATOMIC[42],TCC_BUBBLE[42],TCC_CYCLE[42],TCC_EA0_ATOMIC[42],TCC_ATOMIC[43],TCC_BUBBLE[43],TCC_CYCLE[43],TCC_EA0_ATOMIC[43],TCC_ATOMIC[44],TCC_BUBBLE[44],TCC_CYCLE[44],TCC_EA0_ATOMIC[44],TCC_ATOMIC[45],TCC_BUBBLE[45],TCC_CYCLE[45],TCC_EA0_ATOMIC[45],TCC_ATOMIC[46],TCC_BUBBLE[46],TCC_CYCLE[46],TCC_EA0_ATOMIC[46],TCC_ATOMIC[47],TCC_BUBBLE[47],TCC_CYCLE[47],TCC_EA0_ATOMIC[47],TCC_ATOMIC[48],TCC_BUBBLE[48],TCC_CYCLE[48],TCC_EA0_ATOMIC[48],TCC_ATOMIC[49],TCC_BUBBLE[49],TCC_CYCLE[49],TCC_EA0_ATOMIC[49],TCC_ATOMIC[50],TCC_BUBBLE[50],TCC_CYCLE[50],TCC_EA0_ATOMIC[50],TCC_ATOMIC[51],TCC_BUBBLE[51],TCC_CYCLE[51],TCC_EA0_ATOMIC[51],TCC_ATOMIC[52],TCC_BUBBLE[52],TCC_CYCLE[52],TCC_EA0_ATOMIC[52],TCC_ATOMIC[53],TCC_BUBBLE[53],TCC_CYCLE[53],TCC_EA0_ATOMIC[53],TCC_ATOMIC[54],TCC_BUBBLE[54],TCC_CYCLE[54],TCC_EA0_ATOMIC[54],TCC_ATOMIC[55],TCC_BUBBLE[55],TCC_CYCLE[55],TCC_EA0_ATOMIC[55],TCC_ATOMIC[56],TCC_BUBBLE[56],TCC_CYCLE[56],TCC_EA0_ATOMIC[56],TCC_ATOMIC[57],TCC_BUBBLE[57],TCC_CYCLE[57],TCC_EA0_ATOMIC[57],TCC_ATOMIC[58],TCC_BUBBLE[58],TCC_CYCLE[58],TCC_EA0_ATOMIC[58],TCC_ATOMIC[59],TCC_BUBBLE[59],TCC_CYCLE[59],TCC_EA0_ATOMIC[59],TCC_ATOMIC[60],TCC_BUBBLE[60],TCC_CYCLE[60],TCC_EA0_ATOMIC[60],TCC_ATOMIC[61],TCC_BUBBLE[61],TCC_CYCLE[61],TCC_EA0_ATOMIC[61],TCC_ATOMIC[62],TCC_BUBBLE[62],TCC_CYCLE[62],TCC_EA0_ATOMIC[62],TCC_ATOMIC[63],TCC_BUBBLE[63],TCC_CYCLE[63],TCC_EA0_ATOMIC[63],TCC_ATOMIC[64],TCC_BUBBLE[64],TCC_CYCLE[64],TCC_EA0_ATOMIC[64],TCC_ATOMIC[65],TCC_BUBBLE[65],TCC_CYCLE[65],TCC_EA0_ATOMIC[65],TCC_ATOMIC[66],TCC_BUBBLE[66],TCC_CYCLE[66],TCC_EA0_ATOMIC[66],TCC_ATOMIC[67],TCC_BUBBLE[67],TCC_CYCLE[67],TCC_EA0_ATOMIC[67],TCC_ATOMIC[68],TCC_BUBBLE[68],TCC_CYCLE[68],TCC_EA0_ATOMIC[68],TCC_ATOMIC[69],TCC_BUBBLE[69],TCC_CYCLE[69],TCC_EA0_ATOMIC[69],TCC_ATOMIC[70],TCC_BUBBLE[70],TCC_CYCLE[70],TCC_EA0_ATOMIC[70],TCC_ATOMIC[71],TCC_BUBBLE[71],TCC_CYCLE[71],TCC_EA0_ATOMIC[71],TCC_ATOMIC[72],TCC_BUBBLE[72],TCC_CYCLE[72],TCC_EA0_ATOMIC[72],TCC_ATOMIC[73],TCC_BUBBLE[73],TCC_CYCLE[73],TCC_EA0_ATOMIC[73],TCC_ATOMIC[74],TCC_BUBBLE[74],TCC_CYCLE[74],TCC_EA0_ATOMIC[74],TCC_ATOMIC[75],TCC_BUBBLE[75],TCC_CYCLE[75],TCC_EA0_ATOMIC[75],TCC_ATOMIC[76],TCC_BUBBLE[76],TCC_CYCLE[76],TCC_EA0_ATOMIC[76],TCC_ATOMIC[77],TCC_BUBBLE[77],TCC_CYCLE[77],TCC_EA0_ATOMIC[77],TCC_ATOMIC[78],TCC_BUBBLE[78],TCC_CYCLE[78],TCC_EA0_ATOMIC[78],TCC_ATOMIC[79],TCC_BUBBLE[79],TCC_CYCLE[79],TCC_EA0_ATOMIC[79],TCC_ATOMIC[80],TCC_BUBBLE[80],TCC_CYCLE[80],TCC_EA0_ATOMIC[80],TCC_ATOMIC[81],TCC_BUBBLE[81],TCC_CYCLE[81],TCC_EA0_ATOMIC[81],TCC_ATOMIC[82],TCC_BUBBLE[82],TCC_CYCLE[82],TCC_EA0_ATOMIC[82],TCC_ATOMIC[83],TCC_BUBBLE[83],TCC_CYCLE[83],TCC_EA0_ATOMIC[83],TCC_ATOMIC[84],TCC_BUBBLE[84],TCC_CYCLE[84],TCC_EA0_ATOMIC[84],TCC_ATOMIC[85],TCC_BUBBLE[85],TCC_CYCLE[85],TCC_EA0_ATOMIC[85],TCC_ATOMIC[86],TCC_BUBBLE[86],TCC_CYCLE[86],TCC_EA0_ATOMIC[86],TCC_ATOMIC[87],TCC_BUBBLE[87],TCC_CYCLE[87],TCC_EA0_ATOMIC[87],TCC_ATOMIC[88],TCC_BUBBLE[88],TCC_CYCLE[88],TCC_EA0_ATOMIC[88],TCC_ATOMIC[89],TCC_BUBBLE[89],TCC_CYCLE[89],TCC_EA0_ATOMIC[89],TCC_ATOMIC[90],TCC_BUBBLE[90],TCC_CYCLE[90],TCC_EA0_ATOMIC[90],TCC_ATOMIC[91],TCC_BUBBLE[91],TCC_CYCLE[91],TCC_EA0_ATOMIC[91],TCC_ATOMIC[92],TCC_BUBBLE[92],TCC_CYCLE[92],TCC_EA0_ATOMIC[92],TCC_ATOMIC[93],TCC_BUBBLE[93],TCC_CYCLE[93],TCC_EA0_ATOMIC[93],TCC_ATOMIC[94],TCC_BUBBLE[94],TCC_CYCLE[94],TCC_EA0_ATOMIC[94],TCC_ATOMIC[95],TCC_BUBBLE[95],TCC_CYCLE[95],TCC_EA0_ATOMIC[95],Wave_Size_9,Correlation_ID_9,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_10,Correlation_ID_10,SQC_TC_DATA_ATOMIC_REQ,SQC_TC_STALL,SQC_TC_REQ,SQC_DCACHE_REQ_READ_16,SQC_ICACHE_REQ,SQC_ICACHE_HITS,SQC_ICACHE_MISSES,SQC_ICACHE_MISSES_DUPLICATE,Wave_Size_11,Correlation_ID_11,SQ_INSTS_VALU_MFMA_MOPS_I8,SQ_INSTS_VALU_MFMA_MOPS_F16,SQ_INSTS_VALU_MFMA_MOPS_BF16,SQ_INSTS_VALU_MFMA_MOPS_F32,SQ_INSTS_VALU_MFMA_MOPS_F64,SQC_TC_INST_REQ,SQC_TC_DATA_READ_REQ,SQC_TC_DATA_WRITE_REQ,TCP_PENDING_STALL_CYCLES_sum,Wave_Size_12,Correlation_ID_12,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,TCC_EA0_ATOMIC_LEVEL_sum,TCC_EA0_RDREQ_LEVEL_sum,TCC_EA0_WRREQ_LEVEL_sum,TCC_EA0_WRREQ_STALL_sum,TCP_TCC_CC_ATOMIC_REQ_sum,TCP_TCC_RW_ATOMIC_REQ_sum,TCP_TCC_RW_READ_REQ_sum,TCP_TCC_RW_WRITE_REQ_sum,Wave_Size_13,Correlation_ID_13,SQC_DCACHE_REQ_READ_2,SQC_DCACHE_REQ_READ_4,Wave_Size_14,Correlation_ID_14,SQ_ACTIVE_INST_SCA,SQ_ACTIVE_INST_EXP_GDS,SQ_ACTIVE_INST_MISC,SQ_ACTIVE_INST_FLAT,SQ_INST_CYCLES_VMEM_WR,SQ_INST_CYCLES_VMEM_RD,SQ_INST_CYCLES_SMEM,SQ_INST_CYCLES_SALU,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,CPC_ME1_DC0_SPI_BUSY,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,TCC_BUBBLE_sum,TCC_EA0_RDREQ_32B_sum,TCC_EA0_RDREQ_sum,TCC_EA0_RD_UNCACHED_32B_sum,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,TCP_TCC_READ_REQ_sum,TCP_TCC_WRITE_REQ_sum,Wave_Size_15,Correlation_ID_15,XCC_Index_15,TCC_EA0_ATOMIC_LEVEL[0],TCC_EA0_RDREQ[0],TCC_EA0_RDREQ_32B[0],TCC_EA0_RDREQ_LEVEL[0],TCC_EA0_ATOMIC_LEVEL[1],TCC_EA0_RDREQ[1],TCC_EA0_RDREQ_32B[1],TCC_EA0_RDREQ_LEVEL[1],TCC_EA0_ATOMIC_LEVEL[2],TCC_EA0_RDREQ[2],TCC_EA0_RDREQ_32B[2],TCC_EA0_RDREQ_LEVEL[2],TCC_EA0_ATOMIC_LEVEL[3],TCC_EA0_RDREQ[3],TCC_EA0_RDREQ_32B[3],TCC_EA0_RDREQ_LEVEL[3],TCC_EA0_ATOMIC_LEVEL[4],TCC_EA0_RDREQ[4],TCC_EA0_RDREQ_32B[4],TCC_EA0_RDREQ_LEVEL[4],TCC_EA0_ATOMIC_LEVEL[5],TCC_EA0_RDREQ[5],TCC_EA0_RDREQ_32B[5],TCC_EA0_RDREQ_LEVEL[5],TCC_EA0_ATOMIC_LEVEL[6],TCC_EA0_RDREQ[6],TCC_EA0_RDREQ_32B[6],TCC_EA0_RDREQ_LEVEL[6],TCC_EA0_ATOMIC_LEVEL[7],TCC_EA0_RDREQ[7],TCC_EA0_RDREQ_32B[7],TCC_EA0_RDREQ_LEVEL[7],TCC_EA0_ATOMIC_LEVEL[8],TCC_EA0_RDREQ[8],TCC_EA0_RDREQ_32B[8],TCC_EA0_RDREQ_LEVEL[8],TCC_EA0_ATOMIC_LEVEL[9],TCC_EA0_RDREQ[9],TCC_EA0_RDREQ_32B[9],TCC_EA0_RDREQ_LEVEL[9],TCC_EA0_ATOMIC_LEVEL[10],TCC_EA0_RDREQ[10],TCC_EA0_RDREQ_32B[10],TCC_EA0_RDREQ_LEVEL[10],TCC_EA0_ATOMIC_LEVEL[11],TCC_EA0_RDREQ[11],TCC_EA0_RDREQ_32B[11],TCC_EA0_RDREQ_LEVEL[11],TCC_EA0_ATOMIC_LEVEL[12],TCC_EA0_RDREQ[12],TCC_EA0_RDREQ_32B[12],TCC_EA0_RDREQ_LEVEL[12],TCC_EA0_ATOMIC_LEVEL[13],TCC_EA0_RDREQ[13],TCC_EA0_RDREQ_32B[13],TCC_EA0_RDREQ_LEVEL[13],TCC_EA0_ATOMIC_LEVEL[14],TCC_EA0_RDREQ[14],TCC_EA0_RDREQ_32B[14],TCC_EA0_RDREQ_LEVEL[14],TCC_EA0_ATOMIC_LEVEL[15],TCC_EA0_RDREQ[15],TCC_EA0_RDREQ_32B[15],TCC_EA0_RDREQ_LEVEL[15],TCC_EA0_ATOMIC_LEVEL[16],TCC_EA0_RDREQ[16],TCC_EA0_RDREQ_32B[16],TCC_EA0_RDREQ_LEVEL[16],TCC_EA0_ATOMIC_LEVEL[17],TCC_EA0_RDREQ[17],TCC_EA0_RDREQ_32B[17],TCC_EA0_RDREQ_LEVEL[17],TCC_EA0_ATOMIC_LEVEL[18],TCC_EA0_RDREQ[18],TCC_EA0_RDREQ_32B[18],TCC_EA0_RDREQ_LEVEL[18],TCC_EA0_ATOMIC_LEVEL[19],TCC_EA0_RDREQ[19],TCC_EA0_RDREQ_32B[19],TCC_EA0_RDREQ_LEVEL[19],TCC_EA0_ATOMIC_LEVEL[20],TCC_EA0_RDREQ[20],TCC_EA0_RDREQ_32B[20],TCC_EA0_RDREQ_LEVEL[20],TCC_EA0_ATOMIC_LEVEL[21],TCC_EA0_RDREQ[21],TCC_EA0_RDREQ_32B[21],TCC_EA0_RDREQ_LEVEL[21],TCC_EA0_ATOMIC_LEVEL[22],TCC_EA0_RDREQ[22],TCC_EA0_RDREQ_32B[22],TCC_EA0_RDREQ_LEVEL[22],TCC_EA0_ATOMIC_LEVEL[23],TCC_EA0_RDREQ[23],TCC_EA0_RDREQ_32B[23],TCC_EA0_RDREQ_LEVEL[23],TCC_EA0_ATOMIC_LEVEL[24],TCC_EA0_RDREQ[24],TCC_EA0_RDREQ_32B[24],TCC_EA0_RDREQ_LEVEL[24],TCC_EA0_ATOMIC_LEVEL[25],TCC_EA0_RDREQ[25],TCC_EA0_RDREQ_32B[25],TCC_EA0_RDREQ_LEVEL[25],TCC_EA0_ATOMIC_LEVEL[26],TCC_EA0_RDREQ[26],TCC_EA0_RDREQ_32B[26],TCC_EA0_RDREQ_LEVEL[26],TCC_EA0_ATOMIC_LEVEL[27],TCC_EA0_RDREQ[27],TCC_EA0_RDREQ_32B[27],TCC_EA0_RDREQ_LEVEL[27],TCC_EA0_ATOMIC_LEVEL[28],TCC_EA0_RDREQ[28],TCC_EA0_RDREQ_32B[28],TCC_EA0_RDREQ_LEVEL[28],TCC_EA0_ATOMIC_LEVEL[29],TCC_EA0_RDREQ[29],TCC_EA0_RDREQ_32B[29],TCC_EA0_RDREQ_LEVEL[29],TCC_EA0_ATOMIC_LEVEL[30],TCC_EA0_RDREQ[30],TCC_EA0_RDREQ_32B[30],TCC_EA0_RDREQ_LEVEL[30],TCC_EA0_ATOMIC_LEVEL[31],TCC_EA0_RDREQ[31],TCC_EA0_RDREQ_32B[31],TCC_EA0_RDREQ_LEVEL[31],TCC_EA0_ATOMIC_LEVEL[32],TCC_EA0_RDREQ[32],TCC_EA0_RDREQ_32B[32],TCC_EA0_RDREQ_LEVEL[32],TCC_EA0_ATOMIC_LEVEL[33],TCC_EA0_RDREQ[33],TCC_EA0_RDREQ_32B[33],TCC_EA0_RDREQ_LEVEL[33],TCC_EA0_ATOMIC_LEVEL[34],TCC_EA0_RDREQ[34],TCC_EA0_RDREQ_32B[34],TCC_EA0_RDREQ_LEVEL[34],TCC_EA0_ATOMIC_LEVEL[35],TCC_EA0_RDREQ[35],TCC_EA0_RDREQ_32B[35],TCC_EA0_RDREQ_LEVEL[35],TCC_EA0_ATOMIC_LEVEL[36],TCC_EA0_RDREQ[36],TCC_EA0_RDREQ_32B[36],TCC_EA0_RDREQ_LEVEL[36],TCC_EA0_ATOMIC_LEVEL[37],TCC_EA0_RDREQ[37],TCC_EA0_RDREQ_32B[37],TCC_EA0_RDREQ_LEVEL[37],TCC_EA0_ATOMIC_LEVEL[38],TCC_EA0_RDREQ[38],TCC_EA0_RDREQ_32B[38],TCC_EA0_RDREQ_LEVEL[38],TCC_EA0_ATOMIC_LEVEL[39],TCC_EA0_RDREQ[39],TCC_EA0_RDREQ_32B[39],TCC_EA0_RDREQ_LEVEL[39],TCC_EA0_ATOMIC_LEVEL[40],TCC_EA0_RDREQ[40],TCC_EA0_RDREQ_32B[40],TCC_EA0_RDREQ_LEVEL[40],TCC_EA0_ATOMIC_LEVEL[41],TCC_EA0_RDREQ[41],TCC_EA0_RDREQ_32B[41],TCC_EA0_RDREQ_LEVEL[41],TCC_EA0_ATOMIC_LEVEL[42],TCC_EA0_RDREQ[42],TCC_EA0_RDREQ_32B[42],TCC_EA0_RDREQ_LEVEL[42],TCC_EA0_ATOMIC_LEVEL[43],TCC_EA0_RDREQ[43],TCC_EA0_RDREQ_32B[43],TCC_EA0_RDREQ_LEVEL[43],TCC_EA0_ATOMIC_LEVEL[44],TCC_EA0_RDREQ[44],TCC_EA0_RDREQ_32B[44],TCC_EA0_RDREQ_LEVEL[44],TCC_EA0_ATOMIC_LEVEL[45],TCC_EA0_RDREQ[45],TCC_EA0_RDREQ_32B[45],TCC_EA0_RDREQ_LEVEL[45],TCC_EA0_ATOMIC_LEVEL[46],TCC_EA0_RDREQ[46],TCC_EA0_RDREQ_32B[46],TCC_EA0_RDREQ_LEVEL[46],TCC_EA0_ATOMIC_LEVEL[47],TCC_EA0_RDREQ[47],TCC_EA0_RDREQ_32B[47],TCC_EA0_RDREQ_LEVEL[47],TCC_EA0_ATOMIC_LEVEL[48],TCC_EA0_RDREQ[48],TCC_EA0_RDREQ_32B[48],TCC_EA0_RDREQ_LEVEL[48],TCC_EA0_ATOMIC_LEVEL[49],TCC_EA0_RDREQ[49],TCC_EA0_RDREQ_32B[49],TCC_EA0_RDREQ_LEVEL[49],TCC_EA0_ATOMIC_LEVEL[50],TCC_EA0_RDREQ[50],TCC_EA0_RDREQ_32B[50],TCC_EA0_RDREQ_LEVEL[50],TCC_EA0_ATOMIC_LEVEL[51],TCC_EA0_RDREQ[51],TCC_EA0_RDREQ_32B[51],TCC_EA0_RDREQ_LEVEL[51],TCC_EA0_ATOMIC_LEVEL[52],TCC_EA0_RDREQ[52],TCC_EA0_RDREQ_32B[52],TCC_EA0_RDREQ_LEVEL[52],TCC_EA0_ATOMIC_LEVEL[53],TCC_EA0_RDREQ[53],TCC_EA0_RDREQ_32B[53],TCC_EA0_RDREQ_LEVEL[53],TCC_EA0_ATOMIC_LEVEL[54],TCC_EA0_RDREQ[54],TCC_EA0_RDREQ_32B[54],TCC_EA0_RDREQ_LEVEL[54],TCC_EA0_ATOMIC_LEVEL[55],TCC_EA0_RDREQ[55],TCC_EA0_RDREQ_32B[55],TCC_EA0_RDREQ_LEVEL[55],TCC_EA0_ATOMIC_LEVEL[56],TCC_EA0_RDREQ[56],TCC_EA0_RDREQ_32B[56],TCC_EA0_RDREQ_LEVEL[56],TCC_EA0_ATOMIC_LEVEL[57],TCC_EA0_RDREQ[57],TCC_EA0_RDREQ_32B[57],TCC_EA0_RDREQ_LEVEL[57],TCC_EA0_ATOMIC_LEVEL[58],TCC_EA0_RDREQ[58],TCC_EA0_RDREQ_32B[58],TCC_EA0_RDREQ_LEVEL[58],TCC_EA0_ATOMIC_LEVEL[59],TCC_EA0_RDREQ[59],TCC_EA0_RDREQ_32B[59],TCC_EA0_RDREQ_LEVEL[59],TCC_EA0_ATOMIC_LEVEL[60],TCC_EA0_RDREQ[60],TCC_EA0_RDREQ_32B[60],TCC_EA0_RDREQ_LEVEL[60],TCC_EA0_ATOMIC_LEVEL[61],TCC_EA0_RDREQ[61],TCC_EA0_RDREQ_32B[61],TCC_EA0_RDREQ_LEVEL[61],TCC_EA0_ATOMIC_LEVEL[62],TCC_EA0_RDREQ[62],TCC_EA0_RDREQ_32B[62],TCC_EA0_RDREQ_LEVEL[62],TCC_EA0_ATOMIC_LEVEL[63],TCC_EA0_RDREQ[63],TCC_EA0_RDREQ_32B[63],TCC_EA0_RDREQ_LEVEL[63],TCC_EA0_ATOMIC_LEVEL[64],TCC_EA0_RDREQ[64],TCC_EA0_RDREQ_32B[64],TCC_EA0_RDREQ_LEVEL[64],TCC_EA0_ATOMIC_LEVEL[65],TCC_EA0_RDREQ[65],TCC_EA0_RDREQ_32B[65],TCC_EA0_RDREQ_LEVEL[65],TCC_EA0_ATOMIC_LEVEL[66],TCC_EA0_RDREQ[66],TCC_EA0_RDREQ_32B[66],TCC_EA0_RDREQ_LEVEL[66],TCC_EA0_ATOMIC_LEVEL[67],TCC_EA0_RDREQ[67],TCC_EA0_RDREQ_32B[67],TCC_EA0_RDREQ_LEVEL[67],TCC_EA0_ATOMIC_LEVEL[68],TCC_EA0_RDREQ[68],TCC_EA0_RDREQ_32B[68],TCC_EA0_RDREQ_LEVEL[68],TCC_EA0_ATOMIC_LEVEL[69],TCC_EA0_RDREQ[69],TCC_EA0_RDREQ_32B[69],TCC_EA0_RDREQ_LEVEL[69],TCC_EA0_ATOMIC_LEVEL[70],TCC_EA0_RDREQ[70],TCC_EA0_RDREQ_32B[70],TCC_EA0_RDREQ_LEVEL[70],TCC_EA0_ATOMIC_LEVEL[71],TCC_EA0_RDREQ[71],TCC_EA0_RDREQ_32B[71],TCC_EA0_RDREQ_LEVEL[71],TCC_EA0_ATOMIC_LEVEL[72],TCC_EA0_RDREQ[72],TCC_EA0_RDREQ_32B[72],TCC_EA0_RDREQ_LEVEL[72],TCC_EA0_ATOMIC_LEVEL[73],TCC_EA0_RDREQ[73],TCC_EA0_RDREQ_32B[73],TCC_EA0_RDREQ_LEVEL[73],TCC_EA0_ATOMIC_LEVEL[74],TCC_EA0_RDREQ[74],TCC_EA0_RDREQ_32B[74],TCC_EA0_RDREQ_LEVEL[74],TCC_EA0_ATOMIC_LEVEL[75],TCC_EA0_RDREQ[75],TCC_EA0_RDREQ_32B[75],TCC_EA0_RDREQ_LEVEL[75],TCC_EA0_ATOMIC_LEVEL[76],TCC_EA0_RDREQ[76],TCC_EA0_RDREQ_32B[76],TCC_EA0_RDREQ_LEVEL[76],TCC_EA0_ATOMIC_LEVEL[77],TCC_EA0_RDREQ[77],TCC_EA0_RDREQ_32B[77],TCC_EA0_RDREQ_LEVEL[77],TCC_EA0_ATOMIC_LEVEL[78],TCC_EA0_RDREQ[78],TCC_EA0_RDREQ_32B[78],TCC_EA0_RDREQ_LEVEL[78],TCC_EA0_ATOMIC_LEVEL[79],TCC_EA0_RDREQ[79],TCC_EA0_RDREQ_32B[79],TCC_EA0_RDREQ_LEVEL[79],TCC_EA0_ATOMIC_LEVEL[80],TCC_EA0_RDREQ[80],TCC_EA0_RDREQ_32B[80],TCC_EA0_RDREQ_LEVEL[80],TCC_EA0_ATOMIC_LEVEL[81],TCC_EA0_RDREQ[81],TCC_EA0_RDREQ_32B[81],TCC_EA0_RDREQ_LEVEL[81],TCC_EA0_ATOMIC_LEVEL[82],TCC_EA0_RDREQ[82],TCC_EA0_RDREQ_32B[82],TCC_EA0_RDREQ_LEVEL[82],TCC_EA0_ATOMIC_LEVEL[83],TCC_EA0_RDREQ[83],TCC_EA0_RDREQ_32B[83],TCC_EA0_RDREQ_LEVEL[83],TCC_EA0_ATOMIC_LEVEL[84],TCC_EA0_RDREQ[84],TCC_EA0_RDREQ_32B[84],TCC_EA0_RDREQ_LEVEL[84],TCC_EA0_ATOMIC_LEVEL[85],TCC_EA0_RDREQ[85],TCC_EA0_RDREQ_32B[85],TCC_EA0_RDREQ_LEVEL[85],TCC_EA0_ATOMIC_LEVEL[86],TCC_EA0_RDREQ[86],TCC_EA0_RDREQ_32B[86],TCC_EA0_RDREQ_LEVEL[86],TCC_EA0_ATOMIC_LEVEL[87],TCC_EA0_RDREQ[87],TCC_EA0_RDREQ_32B[87],TCC_EA0_RDREQ_LEVEL[87],TCC_EA0_ATOMIC_LEVEL[88],TCC_EA0_RDREQ[88],TCC_EA0_RDREQ_32B[88],TCC_EA0_RDREQ_LEVEL[88],TCC_EA0_ATOMIC_LEVEL[89],TCC_EA0_RDREQ[89],TCC_EA0_RDREQ_32B[89],TCC_EA0_RDREQ_LEVEL[89],TCC_EA0_ATOMIC_LEVEL[90],TCC_EA0_RDREQ[90],TCC_EA0_RDREQ_32B[90],TCC_EA0_RDREQ_LEVEL[90],TCC_EA0_ATOMIC_LEVEL[91],TCC_EA0_RDREQ[91],TCC_EA0_RDREQ_32B[91],TCC_EA0_RDREQ_LEVEL[91],TCC_EA0_ATOMIC_LEVEL[92],TCC_EA0_RDREQ[92],TCC_EA0_RDREQ_32B[92],TCC_EA0_RDREQ_LEVEL[92],TCC_EA0_ATOMIC_LEVEL[93],TCC_EA0_RDREQ[93],TCC_EA0_RDREQ_32B[93],TCC_EA0_RDREQ_LEVEL[93],TCC_EA0_ATOMIC_LEVEL[94],TCC_EA0_RDREQ[94],TCC_EA0_RDREQ_32B[94],TCC_EA0_RDREQ_LEVEL[94],TCC_EA0_ATOMIC_LEVEL[95],TCC_EA0_RDREQ[95],TCC_EA0_RDREQ_32B[95],TCC_EA0_RDREQ_LEVEL[95],Wave_Size_16,Correlation_ID_16,SQ_INSTS_VMEM,SQ_INSTS_SALU,SQ_INSTS_VSKIPPED,SQ_INSTS,SQ_INSTS_VALU,SQ_INSTS_VALU_ADD_F16,SQ_INSTS_VALU_MUL_F16,SQ_INSTS_VALU_FMA_F16,GRBM_SPI_BUSY,SPI_CSN_NUM_THREADGROUPS,SPI_CSN_WAVE,CPC_CPC_TCIU_BUSY,CPC_CPC_TCIU_IDLE,CPF_CPF_TCIU_BUSY,CPF_CPF_TCIU_STALL,TA_BUFFER_READ_WAVEFRONTS_sum,TA_BUFFER_WRITE_WAVEFRONTS_sum,TCC_CC_REQ_sum,TCC_NC_REQ_sum,TCC_RW_REQ_sum,TCC_UC_REQ_sum,TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum,TCP_READ_TAGCONFLICT_STALL_CYCLES_sum,TCP_TA_TCP_STATE_READ_sum,TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum,TD_LOAD_WAVEFRONT_sum,TD_SPI_STALL_sum,Wave_Size_17,Correlation_ID_17,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_BUSY_CU_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_INSTS_VALU_CVT,SQ_INSTS_VMEM_WR,SQ_INSTS_VMEM_RD,GRBM_COUNT,GRBM_GUI_ACTIVE,SPI_CSN_WINDOW_VALID,SPI_CSN_BUSY,CPC_CPC_STAT_BUSY,CPC_CPC_STAT_IDLE,CPF_CPF_STAT_BUSY,CPF_CPF_STAT_STALL,TA_BUFFER_WAVEFRONTS_sum,TA_TA_BUSY_sum,TCC_BUSY_sum,TCC_CYCLE_sum,TCC_PROBE_ALL_sum,TCC_PROBE_sum,TCP_GATE_EN1_sum,TCP_GATE_EN2_sum,TCP_TCR_TCP_STALL_CYCLES_sum,TCP_TD_TCP_STALL_CYCLES_sum,TD_TC_STALL_sum,TD_TD_BUSY_sum,Start_Timestamp,End_Timestamp
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diff --git a/tests/workloads/join_type_grid/MI300A_A1/sysinfo.csv b/tests/workloads/join_type_grid/MI300A_A1/sysinfo.csv
new file mode 100644
index 0000000000..b681dcbbb1
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300A_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+join_type_grid,./tests/vcopy -n 1048576 -b 256 -i 3,SQ|LDS|SQC|TA|TD|TCP|TCC|SPI|CPC|CPF,Wed 29 May 2024 01:32:25 PM  (CDT),2,sh5-1w300-rg3-3,AMD Instinct MI300A Accelerator,"American Megatrends International, LLC.RMO1002DS",Ubuntu 22.04.2 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,131174852,,6.1.2-110,N/A,SPX,NPS1,MI300A_A1,gfx942,32,24576,228,4,24,64,1024,32,2100,1300,2100,1300,96,32,120,4,5324.8,6
diff --git a/tests/workloads/join_type_grid/MI300A_A1/timestamps.csv b/tests/workloads/join_type_grid/MI300A_A1/timestamps.csv
new file mode 100644
index 0000000000..0fcab17762
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300A_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,11995,1,143925,143925,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73422987353166,73422987361218,0
+3,11995,1,143925,143925,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73422987403241,73422987409410,0
+2,11995,1,143925,143925,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73422987380287,73422987386456,0
diff --git a/tests/workloads/join_type_grid/MI300X_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/join_type_grid/MI300X_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..c2c3881bd3
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300X_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,60633,1,961889,961889,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716102495744196,716102495759036,0,413158.0,413158.0,16384.0,65536.0,33172.0,2664448.0
+1,60633,1,961889,961889,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716102495780394,716102495826473,0,390350.0,390350.0,16384.0,65536.0,13063.0,1048576.0
+2,60633,1,961889,961889,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716102495846112,716102495858592,0,326725.0,326725.0,16384.0,65536.0,13123.0,1048576.0
diff --git a/tests/workloads/join_type_grid/MI300X_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/join_type_grid/MI300X_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..41c916c421
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300X_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,60633,1,961900,961900,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716102495744196,716102495759036,0,0.0,0.0,0.0
+1,60633,1,961900,961900,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716102495780394,716102495826473,0,0.0,0.0,0.0
+2,60633,1,961900,961900,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716102495846112,716102495858592,0,0.0,0.0,0.0
diff --git a/tests/workloads/join_type_grid/MI300X_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/join_type_grid/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..e7b61c522b
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,961911,961911,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716102495744196,716102495759036,0,65536.0,3816814.0,305234040.0
+1,60633,1,961911,961911,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716102495780394,716102495826473,0,65536.0,4028462.0,322281328.0
+2,60633,1,961911,961911,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716102495846112,716102495858592,0,65536.0,3437892.0,274978880.0
diff --git a/tests/workloads/join_type_grid/MI300X_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/join_type_grid/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..538d8d0213
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,961922,961922,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716102495744196,716102495759036,0,32768.0,449888.0,35978664.0
+1,60633,1,961922,961922,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716102495780394,716102495826473,0,32768.0,293292.0,23456724.0
+2,60633,1,961922,961922,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716102495846112,716102495858592,0,32768.0,265021.0,21199976.0
diff --git a/tests/workloads/join_type_grid/MI300X_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/join_type_grid/MI300X_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..1b0bd7e9ca
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300X_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,60633,1,961933,961933,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716102495744196,716102495759036,0,492002.0,492002.0,287507.0,1968008.0,16384.0,39703949.0,662623.0,0.0,159154592.0
+1,60633,1,961933,961933,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716102495780394,716102495826473,0,402905.0,402905.0,224822.0,1611620.0,16384.0,31533919.0,501359.0,0.0,126496000.0
+2,60633,1,961933,961933,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716102495846112,716102495858592,0,404292.0,404292.0,217240.0,1617168.0,16384.0,33612498.0,534883.0,0.0,134810572.0
diff --git a/tests/workloads/join_type_grid/MI300X_A1/log.txt b/tests/workloads/join_type_grid/MI300X_A1/log.txt
new file mode 100644
index 0000000000..742f2cd590
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300X_A1/log.txt
@@ -0,0 +1,180 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/join_type_grid/MI300X_A1
+Target: MI300X_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: None
+Hardware Blocks: All
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+[profiling] Current input file: tests/workloads/join_type_grid/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+[profiling] Current input file: tests/workloads/join_type_grid/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+[profiling] Current input file: tests/workloads/join_type_grid/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+[profiling] Current input file: tests/workloads/join_type_grid/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/join_type_grid/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+[profiling] Current input file: tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+[profiling] Current input file: tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F16
+[profiling] Current input file: tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_REQ
+[profiling] Current input file: tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_HITS
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES_DUPLICATE
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_1
+[profiling] Current input file: tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_13.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[1]
+[profiling] Current input file: tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_14.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[1]
+[profiling] Current input file: tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_15.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[0]
+[profiling] Current input file: tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_16.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[1]
+[profiling] Current input file: tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_17.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[1]
+[profiling] Current input file: tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F32
+[profiling] Current input file: tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_FLAT
+[profiling] Current input file: tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_VMEM
+[profiling] Current input file: tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_SCA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_MISC
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_WR
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_RD
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TCC_READ_REQ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TCC_WRITE_REQ_sum
+[profiling] Current input file: tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_THREAD_CYCLES_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ADDR_CONFLICT
+[profiling] Current input file: tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ITEMS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_MEM_VIOLATIONS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ATOMIC_RETURN
+[profiling] Current input file: tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_BF16
+[profiling] Current input file: tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F32
+[profiling] Current input file: tests/workloads/join_type_grid/MI300X_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/join_type_grid/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/join_type_grid/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..293092f641
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/join_type_grid/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..08439eedce
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/join_type_grid/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..6cca322d4e
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/join_type_grid/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..e527ad31ba
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/join_type_grid/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..3f8e04adb3
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_0.txt b/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..ebc550fbfe
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD GRBM_COUNT GRBM_GUI_ACTIVE TCP_GATE_EN1_sum TCP_GATE_EN2_sum TCP_TD_TCP_STALL_CYCLES_sum TCP_TCR_TCP_STALL_CYCLES_sum TA_TA_BUSY_sum TA_BUFFER_WAVEFRONTS_sum TD_TD_BUSY_sum TD_TC_STALL_sum SPI_CSN_WINDOW_VALID SPI_CSN_BUSY CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE CPF_CPF_STAT_BUSY CPF_CPF_STAT_STALL TCC_CYCLE_sum TCC_BUSY_sum TCC_PROBE_sum TCC_PROBE_ALL_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_1.txt b/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..9ad887ddbb
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 GRBM_SPI_BUSY TCP_READ_TAGCONFLICT_STALL_CYCLES_sum TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum TCP_TA_TCP_STATE_READ_sum TA_BUFFER_READ_WAVEFRONTS_sum TA_BUFFER_WRITE_WAVEFRONTS_sum TD_SPI_STALL_sum TD_LOAD_WAVEFRONT_sum SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE CPC_CPC_TCIU_BUSY CPC_CPC_TCIU_IDLE CPF_CPF_TCIU_BUSY CPF_CPF_TCIU_STALL TCC_NC_REQ_sum TCC_UC_REQ_sum TCC_CC_REQ_sum TCC_RW_REQ_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_10.txt b/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..21c59688f7
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_11.txt b/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..df6d67d7b7
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_12.txt b/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..6e5320c11c
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_13.txt b/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_13.txt
new file mode 100644
index 0000000000..d95492c1cd
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_13.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_ATOMIC[0] TCC_BUBBLE[0] TCC_CYCLE[0] TCC_EA0_ATOMIC[0] TCC_ATOMIC[1] TCC_BUBBLE[1] TCC_CYCLE[1] TCC_EA0_ATOMIC[1] TCC_ATOMIC[2] TCC_BUBBLE[2] TCC_CYCLE[2] TCC_EA0_ATOMIC[2] TCC_ATOMIC[3] TCC_BUBBLE[3] TCC_CYCLE[3] TCC_EA0_ATOMIC[3] TCC_ATOMIC[4] TCC_BUBBLE[4] TCC_CYCLE[4] TCC_EA0_ATOMIC[4] TCC_ATOMIC[5] TCC_BUBBLE[5] TCC_CYCLE[5] TCC_EA0_ATOMIC[5] TCC_ATOMIC[6] TCC_BUBBLE[6] TCC_CYCLE[6] TCC_EA0_ATOMIC[6] TCC_ATOMIC[7] TCC_BUBBLE[7] TCC_CYCLE[7] TCC_EA0_ATOMIC[7] TCC_ATOMIC[8] TCC_BUBBLE[8] TCC_CYCLE[8] TCC_EA0_ATOMIC[8] TCC_ATOMIC[9] TCC_BUBBLE[9] TCC_CYCLE[9] TCC_EA0_ATOMIC[9] TCC_ATOMIC[10] TCC_BUBBLE[10] TCC_CYCLE[10] TCC_EA0_ATOMIC[10] TCC_ATOMIC[11] TCC_BUBBLE[11] TCC_CYCLE[11] TCC_EA0_ATOMIC[11] TCC_ATOMIC[12] TCC_BUBBLE[12] TCC_CYCLE[12] TCC_EA0_ATOMIC[12] TCC_ATOMIC[13] TCC_BUBBLE[13] TCC_CYCLE[13] TCC_EA0_ATOMIC[13] TCC_ATOMIC[14] TCC_BUBBLE[14] TCC_CYCLE[14] TCC_EA0_ATOMIC[14] TCC_ATOMIC[15] TCC_BUBBLE[15] TCC_CYCLE[15] TCC_EA0_ATOMIC[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_14.txt b/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_14.txt
new file mode 100644
index 0000000000..28327b86d3
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_14.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_ATOMIC_LEVEL[0] TCC_EA0_RDREQ[0] TCC_EA0_RDREQ_32B[0] TCC_EA0_RDREQ_LEVEL[0] TCC_EA0_ATOMIC_LEVEL[1] TCC_EA0_RDREQ[1] TCC_EA0_RDREQ_32B[1] TCC_EA0_RDREQ_LEVEL[1] TCC_EA0_ATOMIC_LEVEL[2] TCC_EA0_RDREQ[2] TCC_EA0_RDREQ_32B[2] TCC_EA0_RDREQ_LEVEL[2] TCC_EA0_ATOMIC_LEVEL[3] TCC_EA0_RDREQ[3] TCC_EA0_RDREQ_32B[3] TCC_EA0_RDREQ_LEVEL[3] TCC_EA0_ATOMIC_LEVEL[4] TCC_EA0_RDREQ[4] TCC_EA0_RDREQ_32B[4] TCC_EA0_RDREQ_LEVEL[4] TCC_EA0_ATOMIC_LEVEL[5] TCC_EA0_RDREQ[5] TCC_EA0_RDREQ_32B[5] TCC_EA0_RDREQ_LEVEL[5] TCC_EA0_ATOMIC_LEVEL[6] TCC_EA0_RDREQ[6] TCC_EA0_RDREQ_32B[6] TCC_EA0_RDREQ_LEVEL[6] TCC_EA0_ATOMIC_LEVEL[7] TCC_EA0_RDREQ[7] TCC_EA0_RDREQ_32B[7] TCC_EA0_RDREQ_LEVEL[7] TCC_EA0_ATOMIC_LEVEL[8] TCC_EA0_RDREQ[8] TCC_EA0_RDREQ_32B[8] TCC_EA0_RDREQ_LEVEL[8] TCC_EA0_ATOMIC_LEVEL[9] TCC_EA0_RDREQ[9] TCC_EA0_RDREQ_32B[9] TCC_EA0_RDREQ_LEVEL[9] TCC_EA0_ATOMIC_LEVEL[10] TCC_EA0_RDREQ[10] TCC_EA0_RDREQ_32B[10] TCC_EA0_RDREQ_LEVEL[10] TCC_EA0_ATOMIC_LEVEL[11] TCC_EA0_RDREQ[11] TCC_EA0_RDREQ_32B[11] TCC_EA0_RDREQ_LEVEL[11] TCC_EA0_ATOMIC_LEVEL[12] TCC_EA0_RDREQ[12] TCC_EA0_RDREQ_32B[12] TCC_EA0_RDREQ_LEVEL[12] TCC_EA0_ATOMIC_LEVEL[13] TCC_EA0_RDREQ[13] TCC_EA0_RDREQ_32B[13] TCC_EA0_RDREQ_LEVEL[13] TCC_EA0_ATOMIC_LEVEL[14] TCC_EA0_RDREQ[14] TCC_EA0_RDREQ_32B[14] TCC_EA0_RDREQ_LEVEL[14] TCC_EA0_ATOMIC_LEVEL[15] TCC_EA0_RDREQ[15] TCC_EA0_RDREQ_32B[15] TCC_EA0_RDREQ_LEVEL[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_15.txt b/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_15.txt
new file mode 100644
index 0000000000..033ae877ed
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_15.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_WRREQ[0] TCC_EA0_WRREQ_64B[0] TCC_EA0_WRREQ_LEVEL[0] TCC_HIT[0] TCC_EA0_WRREQ[1] TCC_EA0_WRREQ_64B[1] TCC_EA0_WRREQ_LEVEL[1] TCC_HIT[1] TCC_EA0_WRREQ[2] TCC_EA0_WRREQ_64B[2] TCC_EA0_WRREQ_LEVEL[2] TCC_HIT[2] TCC_EA0_WRREQ[3] TCC_EA0_WRREQ_64B[3] TCC_EA0_WRREQ_LEVEL[3] TCC_HIT[3] TCC_EA0_WRREQ[4] TCC_EA0_WRREQ_64B[4] TCC_EA0_WRREQ_LEVEL[4] TCC_HIT[4] TCC_EA0_WRREQ[5] TCC_EA0_WRREQ_64B[5] TCC_EA0_WRREQ_LEVEL[5] TCC_HIT[5] TCC_EA0_WRREQ[6] TCC_EA0_WRREQ_64B[6] TCC_EA0_WRREQ_LEVEL[6] TCC_HIT[6] TCC_EA0_WRREQ[7] TCC_EA0_WRREQ_64B[7] TCC_EA0_WRREQ_LEVEL[7] TCC_HIT[7] TCC_EA0_WRREQ[8] TCC_EA0_WRREQ_64B[8] TCC_EA0_WRREQ_LEVEL[8] TCC_HIT[8] TCC_EA0_WRREQ[9] TCC_EA0_WRREQ_64B[9] TCC_EA0_WRREQ_LEVEL[9] TCC_HIT[9] TCC_EA0_WRREQ[10] TCC_EA0_WRREQ_64B[10] TCC_EA0_WRREQ_LEVEL[10] TCC_HIT[10] TCC_EA0_WRREQ[11] TCC_EA0_WRREQ_64B[11] TCC_EA0_WRREQ_LEVEL[11] TCC_HIT[11] TCC_EA0_WRREQ[12] TCC_EA0_WRREQ_64B[12] TCC_EA0_WRREQ_LEVEL[12] TCC_HIT[12] TCC_EA0_WRREQ[13] TCC_EA0_WRREQ_64B[13] TCC_EA0_WRREQ_LEVEL[13] TCC_HIT[13] TCC_EA0_WRREQ[14] TCC_EA0_WRREQ_64B[14] TCC_EA0_WRREQ_LEVEL[14] TCC_HIT[14] TCC_EA0_WRREQ[15] TCC_EA0_WRREQ_64B[15] TCC_EA0_WRREQ_LEVEL[15] TCC_HIT[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_16.txt b/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_16.txt
new file mode 100644
index 0000000000..123269c3f9
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_16.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_MISS[0] TCC_READ[0] TCC_REQ[0] TCC_RW_REQ[0] TCC_MISS[1] TCC_READ[1] TCC_REQ[1] TCC_RW_REQ[1] TCC_MISS[2] TCC_READ[2] TCC_REQ[2] TCC_RW_REQ[2] TCC_MISS[3] TCC_READ[3] TCC_REQ[3] TCC_RW_REQ[3] TCC_MISS[4] TCC_READ[4] TCC_REQ[4] TCC_RW_REQ[4] TCC_MISS[5] TCC_READ[5] TCC_REQ[5] TCC_RW_REQ[5] TCC_MISS[6] TCC_READ[6] TCC_REQ[6] TCC_RW_REQ[6] TCC_MISS[7] TCC_READ[7] TCC_REQ[7] TCC_RW_REQ[7] TCC_MISS[8] TCC_READ[8] TCC_REQ[8] TCC_RW_REQ[8] TCC_MISS[9] TCC_READ[9] TCC_REQ[9] TCC_RW_REQ[9] TCC_MISS[10] TCC_READ[10] TCC_REQ[10] TCC_RW_REQ[10] TCC_MISS[11] TCC_READ[11] TCC_REQ[11] TCC_RW_REQ[11] TCC_MISS[12] TCC_READ[12] TCC_REQ[12] TCC_RW_REQ[12] TCC_MISS[13] TCC_READ[13] TCC_REQ[13] TCC_RW_REQ[13] TCC_MISS[14] TCC_READ[14] TCC_REQ[14] TCC_RW_REQ[14] TCC_MISS[15] TCC_READ[15] TCC_REQ[15] TCC_RW_REQ[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_17.txt b/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_17.txt
new file mode 100644
index 0000000000..102fb795bd
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_17.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_TAG_STALL[0] TCC_TOO_MANY_EA_WRREQS_STALL[0] TCC_WRITE[0] TCC_TAG_STALL[1] TCC_TOO_MANY_EA_WRREQS_STALL[1] TCC_WRITE[1] TCC_TAG_STALL[2] TCC_TOO_MANY_EA_WRREQS_STALL[2] TCC_WRITE[2] TCC_TAG_STALL[3] TCC_TOO_MANY_EA_WRREQS_STALL[3] TCC_WRITE[3] TCC_TAG_STALL[4] TCC_TOO_MANY_EA_WRREQS_STALL[4] TCC_WRITE[4] TCC_TAG_STALL[5] TCC_TOO_MANY_EA_WRREQS_STALL[5] TCC_WRITE[5] TCC_TAG_STALL[6] TCC_TOO_MANY_EA_WRREQS_STALL[6] TCC_WRITE[6] TCC_TAG_STALL[7] TCC_TOO_MANY_EA_WRREQS_STALL[7] TCC_WRITE[7] TCC_TAG_STALL[8] TCC_TOO_MANY_EA_WRREQS_STALL[8] TCC_WRITE[8] TCC_TAG_STALL[9] TCC_TOO_MANY_EA_WRREQS_STALL[9] TCC_WRITE[9] TCC_TAG_STALL[10] TCC_TOO_MANY_EA_WRREQS_STALL[10] TCC_WRITE[10] TCC_TAG_STALL[11] TCC_TOO_MANY_EA_WRREQS_STALL[11] TCC_WRITE[11] TCC_TAG_STALL[12] TCC_TOO_MANY_EA_WRREQS_STALL[12] TCC_WRITE[12] TCC_TAG_STALL[13] TCC_TOO_MANY_EA_WRREQS_STALL[13] TCC_WRITE[13] TCC_TAG_STALL[14] TCC_TOO_MANY_EA_WRREQS_STALL[14] TCC_WRITE[14] TCC_TAG_STALL[15] TCC_TOO_MANY_EA_WRREQS_STALL[15] TCC_WRITE[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_2.txt b/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..8ff8201c5a
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 TCP_VOLATILE_sum TCP_TOTAL_ACCESSES_sum TCP_TOTAL_READ_sum TCP_TOTAL_WRITE_sum TA_BUFFER_ATOMIC_WAVEFRONTS_sum TA_BUFFER_TOTAL_CYCLES_sum TD_ATOMIC_WAVEFRONT_sum TD_STORE_WAVEFRONT_sum SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION CPF_CPF_STAT_IDLE CPF_CPF_TCIU_IDLE TCC_REQ_sum TCC_STREAMING_REQ_sum TCC_HIT_sum TCC_MISS_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_3.txt b/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..cb10e4801d
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS TCP_TOTAL_ATOMIC_WITH_RET_sum TCP_TOTAL_ATOMIC_WITHOUT_RET_sum TCP_TOTAL_WRITEBACK_INVALIDATES_sum TCP_TOTAL_CACHE_ACCESSES_sum TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES_sum TD_COALESCABLE_WAVEFRONT_sum SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE CPF_CMP_UTCL1_STALL_ON_TRANSLATION TCC_READ_sum TCC_WRITE_sum TCC_ATOMIC_sum TCC_WRITEBACK_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_4.txt b/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..e4e6069e38
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAIT_ANY SQ_WAIT_INST_ANY SQ_ACTIVE_INST_ANY SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU TCP_UTCL1_TRANSLATION_MISS_sum TCP_UTCL1_TRANSLATION_HIT_sum TCP_UTCL1_PERMISSION_MISS_sum TCP_UTCL1_REQUEST_sum TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_TOTAL_WAVEFRONTS_sum SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE TCC_EA0_WRREQ_sum TCC_EA0_WRREQ_64B_sum TCC_EA0_WR_UNCACHED_32B_sum TCC_EA0_WRREQ_DRAM_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_5.txt b/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..77bd288232
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_SCA SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU TCP_TCC_READ_REQ_sum TCP_TCC_WRITE_REQ_sum TCP_TCC_ATOMIC_WITH_RET_REQ_sum TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN CPC_ME1_DC0_SPI_BUSY TCC_EA0_RDREQ_sum TCC_EA0_RDREQ_32B_sum TCC_BUBBLE_sum TCC_EA0_RD_UNCACHED_32B_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_6.txt b/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..609c184df8
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_THREAD_CYCLES_VALU SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 TCP_TCC_NC_READ_REQ_sum TCP_TCC_NC_WRITE_REQ_sum TCP_TCC_NC_ATOMIC_REQ_sum TCP_TCC_UC_READ_REQ_sum TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN TCC_EA0_RDREQ_DRAM_sum TCC_TAG_STALL_sum TCC_NORMAL_WRITEBACK_sum TCC_ALL_TC_OP_WB_WRITEBACK_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_7.txt b/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..5881e5fb8f
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED TCP_TCC_UC_WRITE_REQ_sum TCP_TCC_UC_ATOMIC_REQ_sum TCP_TCC_CC_READ_REQ_sum TCP_TCC_CC_WRITE_REQ_sum TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR TCC_NORMAL_EVICT_sum TCC_ALL_TC_OP_INV_EVICT_sum TCC_TOO_MANY_EA_WRREQS_STALL_sum TCC_EA0_ATOMIC_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_8.txt b/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..66317384f5
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES TCP_TCC_CC_ATOMIC_REQ_sum TCP_TCC_RW_READ_REQ_sum TCP_TCC_RW_WRITE_REQ_sum TCP_TCC_RW_ATOMIC_REQ_sum SPI_VWC_CSC_WR SPI_RA_BULKY_CU_FULL_CSN TCC_EA0_RDREQ_LEVEL_sum TCC_EA0_WRREQ_LEVEL_sum TCC_EA0_ATOMIC_LEVEL_sum TCC_EA0_WRREQ_STALL_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_9.txt b/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..60ceab315a
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300X_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ TCP_PENDING_STALL_CYCLES_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300X_A1/perfmon/timestamps.txt b/tests/workloads/join_type_grid/MI300X_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..676cca1b80
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300X_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_grid/MI300X_A1/pmc_perf.csv b/tests/workloads/join_type_grid/MI300X_A1/pmc_perf.csv
new file mode 100644
index 0000000000..a93ab52883
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300X_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_1,Correlation_ID_1,XCC_Index,TCC_ATOMIC[0],TCC_BUBBLE[0],TCC_CYCLE[0],TCC_EA0_ATOMIC[0],TCC_ATOMIC[1],TCC_BUBBLE[1],TCC_CYCLE[1],TCC_EA0_ATOMIC[1],TCC_ATOMIC[2],TCC_BUBBLE[2],TCC_CYCLE[2],TCC_EA0_ATOMIC[2],TCC_ATOMIC[3],TCC_BUBBLE[3],TCC_CYCLE[3],TCC_EA0_ATOMIC[3],TCC_ATOMIC[4],TCC_BUBBLE[4],TCC_CYCLE[4],TCC_EA0_ATOMIC[4],TCC_ATOMIC[5],TCC_BUBBLE[5],TCC_CYCLE[5],TCC_EA0_ATOMIC[5],TCC_ATOMIC[6],TCC_BUBBLE[6],TCC_CYCLE[6],TCC_EA0_ATOMIC[6],TCC_ATOMIC[7],TCC_BUBBLE[7],TCC_CYCLE[7],TCC_EA0_ATOMIC[7],TCC_ATOMIC[8],TCC_BUBBLE[8],TCC_CYCLE[8],TCC_EA0_ATOMIC[8],TCC_ATOMIC[9],TCC_BUBBLE[9],TCC_CYCLE[9],TCC_EA0_ATOMIC[9],TCC_ATOMIC[10],TCC_BUBBLE[10],TCC_CYCLE[10],TCC_EA0_ATOMIC[10],TCC_ATOMIC[11],TCC_BUBBLE[11],TCC_CYCLE[11],TCC_EA0_ATOMIC[11],TCC_ATOMIC[12],TCC_BUBBLE[12],TCC_CYCLE[12],TCC_EA0_ATOMIC[12],TCC_ATOMIC[13],TCC_BUBBLE[13],TCC_CYCLE[13],TCC_EA0_ATOMIC[13],TCC_ATOMIC[14],TCC_BUBBLE[14],TCC_CYCLE[14],TCC_EA0_ATOMIC[14],TCC_ATOMIC[15],TCC_BUBBLE[15],TCC_CYCLE[15],TCC_EA0_ATOMIC[15],TCC_ATOMIC[16],TCC_BUBBLE[16],TCC_CYCLE[16],TCC_EA0_ATOMIC[16],TCC_ATOMIC[17],TCC_BUBBLE[17],TCC_CYCLE[17],TCC_EA0_ATOMIC[17],TCC_ATOMIC[18],TCC_BUBBLE[18],TCC_CYCLE[18],TCC_EA0_ATOMIC[18],TCC_ATOMIC[19],TCC_BUBBLE[19],TCC_CYCLE[19],TCC_EA0_ATOMIC[19],TCC_ATOMIC[20],TCC_BUBBLE[20],TCC_CYCLE[20],TCC_EA0_ATOMIC[20],TCC_ATOMIC[21],TCC_BUBBLE[21],TCC_CYCLE[21],TCC_EA0_ATOMIC[21],TCC_ATOMIC[22],TCC_BUBBLE[22],TCC_CYCLE[22],TCC_EA0_ATOMIC[22],TCC_ATOMIC[23],TCC_BUBBLE[23],TCC_CYCLE[23],TCC_EA0_ATOMIC[23],TCC_ATOMIC[24],TCC_BUBBLE[24],TCC_CYCLE[24],TCC_EA0_ATOMIC[24],TCC_ATOMIC[25],TCC_BUBBLE[25],TCC_CYCLE[25],TCC_EA0_ATOMIC[25],TCC_ATOMIC[26],TCC_BUBBLE[26],TCC_CYCLE[26],TCC_EA0_ATOMIC[26],TCC_ATOMIC[27],TCC_BUBBLE[27],TCC_CYCLE[27],TCC_EA0_ATOMIC[27],TCC_ATOMIC[28],TCC_BUBBLE[28],TCC_CYCLE[28],TCC_EA0_ATOMIC[28],TCC_ATOMIC[29],TCC_BUBBLE[29],TCC_CYCLE[29],TCC_EA0_ATOMIC[29],TCC_ATOMIC[30],TCC_BUBBLE[30],TCC_CYCLE[30],TCC_EA0_ATOMIC[30],TCC_ATOMIC[31],TCC_BUBBLE[31],TCC_CYCLE[31],TCC_EA0_ATOMIC[31],TCC_ATOMIC[32],TCC_BUBBLE[32],TCC_CYCLE[32],TCC_EA0_ATOMIC[32],TCC_ATOMIC[33],TCC_BUBBLE[33],TCC_CYCLE[33],TCC_EA0_ATOMIC[33],TCC_ATOMIC[34],TCC_BUBBLE[34],TCC_CYCLE[34],TCC_EA0_ATOMIC[34],TCC_ATOMIC[35],TCC_BUBBLE[35],TCC_CYCLE[35],TCC_EA0_ATOMIC[35],TCC_ATOMIC[36],TCC_BUBBLE[36],TCC_CYCLE[36],TCC_EA0_ATOMIC[36],TCC_ATOMIC[37],TCC_BUBBLE[37],TCC_CYCLE[37],TCC_EA0_ATOMIC[37],TCC_ATOMIC[38],TCC_BUBBLE[38],TCC_CYCLE[38],TCC_EA0_ATOMIC[38],TCC_ATOMIC[39],TCC_BUBBLE[39],TCC_CYCLE[39],TCC_EA0_ATOMIC[39],TCC_ATOMIC[40],TCC_BUBBLE[40],TCC_CYCLE[40],TCC_EA0_ATOMIC[40],TCC_ATOMIC[41],TCC_BUBBLE[41],TCC_CYCLE[41],TCC_EA0_ATOMIC[41],TCC_ATOMIC[42],TCC_BUBBLE[42],TCC_CYCLE[42],TCC_EA0_ATOMIC[42],TCC_ATOMIC[43],TCC_BUBBLE[43],TCC_CYCLE[43],TCC_EA0_ATOMIC[43],TCC_ATOMIC[44],TCC_BUBBLE[44],TCC_CYCLE[44],TCC_EA0_ATOMIC[44],TCC_ATOMIC[45],TCC_BUBBLE[45],TCC_CYCLE[45],TCC_EA0_ATOMIC[45],TCC_ATOMIC[46],TCC_BUBBLE[46],TCC_CYCLE[46],TCC_EA0_ATOMIC[46],TCC_ATOMIC[47],TCC_BUBBLE[47],TCC_CYCLE[47],TCC_EA0_ATOMIC[47],TCC_ATOMIC[48],TCC_BUBBLE[48],TCC_CYCLE[48],TCC_EA0_ATOMIC[48],TCC_ATOMIC[49],TCC_BUBBLE[49],TCC_CYCLE[49],TCC_EA0_ATOMIC[49],TCC_ATOMIC[50],TCC_BUBBLE[50],TCC_CYCLE[50],TCC_EA0_ATOMIC[50],TCC_ATOMIC[51],TCC_BUBBLE[51],TCC_CYCLE[51],TCC_EA0_ATOMIC[51],TCC_ATOMIC[52],TCC_BUBBLE[52],TCC_CYCLE[52],TCC_EA0_ATOMIC[52],TCC_ATOMIC[53],TCC_BUBBLE[53],TCC_CYCLE[53],TCC_EA0_ATOMIC[53],TCC_ATOMIC[54],TCC_BUBBLE[54],TCC_CYCLE[54],TCC_EA0_ATOMIC[54],TCC_ATOMIC[55],TCC_BUBBLE[55],TCC_CYCLE[55],TCC_EA0_ATOMIC[55],TCC_ATOMIC[56],TCC_BUBBLE[56],TCC_CYCLE[56],TCC_EA0_ATOMIC[56],TCC_ATOMIC[57],TCC_BUBBLE[57],TCC_CYCLE[57],TCC_EA0_ATOMIC[57],TCC_ATOMIC[58],TCC_BUBBLE[58],TCC_CYCLE[58],TCC_EA0_ATOMIC[58],TCC_ATOMIC[59],TCC_BUBBLE[59],TCC_CYCLE[59],TCC_EA0_ATOMIC[59],TCC_ATOMIC[60],TCC_BUBBLE[60],TCC_CYCLE[60],TCC_EA0_ATOMIC[60],TCC_ATOMIC[61],TCC_BUBBLE[61],TCC_CYCLE[61],TCC_EA0_ATOMIC[61],TCC_ATOMIC[62],TCC_BUBBLE[62],TCC_CYCLE[62],TCC_EA0_ATOMIC[62],TCC_ATOMIC[63],TCC_BUBBLE[63],TCC_CYCLE[63],TCC_EA0_ATOMIC[63],TCC_ATOMIC[64],TCC_BUBBLE[64],TCC_CYCLE[64],TCC_EA0_ATOMIC[64],TCC_ATOMIC[65],TCC_BUBBLE[65],TCC_CYCLE[65],TCC_EA0_ATOMIC[65],TCC_ATOMIC[66],TCC_BUBBLE[66],TCC_CYCLE[66],TCC_EA0_ATOMIC[66],TCC_ATOMIC[67],TCC_BUBBLE[67],TCC_CYCLE[67],TCC_EA0_ATOMIC[67],TCC_ATOMIC[68],TCC_BUBBLE[68],TCC_CYCLE[68],TCC_EA0_ATOMIC[68],TCC_ATOMIC[69],TCC_BUBBLE[69],TCC_CYCLE[69],TCC_EA0_ATOMIC[69],TCC_ATOMIC[70],TCC_BUBBLE[70],TCC_CYCLE[70],TCC_EA0_ATOMIC[70],TCC_ATOMIC[71],TCC_BUBBLE[71],TCC_CYCLE[71],TCC_EA0_ATOMIC[71],TCC_ATOMIC[72],TCC_BUBBLE[72],TCC_CYCLE[72],TCC_EA0_ATOMIC[72],TCC_ATOMIC[73],TCC_BUBBLE[73],TCC_CYCLE[73],TCC_EA0_ATOMIC[73],TCC_ATOMIC[74],TCC_BUBBLE[74],TCC_CYCLE[74],TCC_EA0_ATOMIC[74],TCC_ATOMIC[75],TCC_BUBBLE[75],TCC_CYCLE[75],TCC_EA0_ATOMIC[75],TCC_ATOMIC[76],TCC_BUBBLE[76],TCC_CYCLE[76],TCC_EA0_ATOMIC[76],TCC_ATOMIC[77],TCC_BUBBLE[77],TCC_CYCLE[77],TCC_EA0_ATOMIC[77],TCC_ATOMIC[78],TCC_BUBBLE[78],TCC_CYCLE[78],TCC_EA0_ATOMIC[78],TCC_ATOMIC[79],TCC_BUBBLE[79],TCC_CYCLE[79],TCC_EA0_ATOMIC[79],TCC_ATOMIC[80],TCC_BUBBLE[80],TCC_CYCLE[80],TCC_EA0_ATOMIC[80],TCC_ATOMIC[81],TCC_BUBBLE[81],TCC_CYCLE[81],TCC_EA0_ATOMIC[81],TCC_ATOMIC[82],TCC_BUBBLE[82],TCC_CYCLE[82],TCC_EA0_ATOMIC[82],TCC_ATOMIC[83],TCC_BUBBLE[83],TCC_CYCLE[83],TCC_EA0_ATOMIC[83],TCC_ATOMIC[84],TCC_BUBBLE[84],TCC_CYCLE[84],TCC_EA0_ATOMIC[84],TCC_ATOMIC[85],TCC_BUBBLE[85],TCC_CYCLE[85],TCC_EA0_ATOMIC[85],TCC_ATOMIC[86],TCC_BUBBLE[86],TCC_CYCLE[86],TCC_EA0_ATOMIC[86],TCC_ATOMIC[87],TCC_BUBBLE[87],TCC_CYCLE[87],TCC_EA0_ATOMIC[87],TCC_ATOMIC[88],TCC_BUBBLE[88],TCC_CYCLE[88],TCC_EA0_ATOMIC[88],TCC_ATOMIC[89],TCC_BUBBLE[89],TCC_CYCLE[89],TCC_EA0_ATOMIC[89],TCC_ATOMIC[90],TCC_BUBBLE[90],TCC_CYCLE[90],TCC_EA0_ATOMIC[90],TCC_ATOMIC[91],TCC_BUBBLE[91],TCC_CYCLE[91],TCC_EA0_ATOMIC[91],TCC_ATOMIC[92],TCC_BUBBLE[92],TCC_CYCLE[92],TCC_EA0_ATOMIC[92],TCC_ATOMIC[93],TCC_BUBBLE[93],TCC_CYCLE[93],TCC_EA0_ATOMIC[93],TCC_ATOMIC[94],TCC_BUBBLE[94],TCC_CYCLE[94],TCC_EA0_ATOMIC[94],TCC_ATOMIC[95],TCC_BUBBLE[95],TCC_CYCLE[95],TCC_EA0_ATOMIC[95],TCC_ATOMIC[96],TCC_BUBBLE[96],TCC_CYCLE[96],TCC_EA0_ATOMIC[96],TCC_ATOMIC[97],TCC_BUBBLE[97],TCC_CYCLE[97],TCC_EA0_ATOMIC[97],TCC_ATOMIC[98],TCC_BUBBLE[98],TCC_CYCLE[98],TCC_EA0_ATOMIC[98],TCC_ATOMIC[99],TCC_BUBBLE[99],TCC_CYCLE[99],TCC_EA0_ATOMIC[99],TCC_ATOMIC[100],TCC_BUBBLE[100],TCC_CYCLE[100],TCC_EA0_ATOMIC[100],TCC_ATOMIC[101],TCC_BUBBLE[101],TCC_CYCLE[101],TCC_EA0_ATOMIC[101],TCC_ATOMIC[102],TCC_BUBBLE[102],TCC_CYCLE[102],TCC_EA0_ATOMIC[102],TCC_ATOMIC[103],TCC_BUBBLE[103],TCC_CYCLE[103],TCC_EA0_ATOMIC[103],TCC_ATOMIC[104],TCC_BUBBLE[104],TCC_CYCLE[104],TCC_EA0_ATOMIC[104],TCC_ATOMIC[105],TCC_BUBBLE[105],TCC_CYCLE[105],TCC_EA0_ATOMIC[105],TCC_ATOMIC[106],TCC_BUBBLE[106],TCC_CYCLE[106],TCC_EA0_ATOMIC[106],TCC_ATOMIC[107],TCC_BUBBLE[107],TCC_CYCLE[107],TCC_EA0_ATOMIC[107],TCC_ATOMIC[108],TCC_BUBBLE[108],TCC_CYCLE[108],TCC_EA0_ATOMIC[108],TCC_ATOMIC[109],TCC_BUBBLE[109],TCC_CYCLE[109],TCC_EA0_ATOMIC[109],TCC_ATOMIC[110],TCC_BUBBLE[110],TCC_CYCLE[110],TCC_EA0_ATOMIC[110],TCC_ATOMIC[111],TCC_BUBBLE[111],TCC_CYCLE[111],TCC_EA0_ATOMIC[111],TCC_ATOMIC[112],TCC_BUBBLE[112],TCC_CYCLE[112],TCC_EA0_ATOMIC[112],TCC_ATOMIC[113],TCC_BUBBLE[113],TCC_CYCLE[113],TCC_EA0_ATOMIC[113],TCC_ATOMIC[114],TCC_BUBBLE[114],TCC_CYCLE[114],TCC_EA0_ATOMIC[114],TCC_ATOMIC[115],TCC_BUBBLE[115],TCC_CYCLE[115],TCC_EA0_ATOMIC[115],TCC_ATOMIC[116],TCC_BUBBLE[116],TCC_CYCLE[116],TCC_EA0_ATOMIC[116],TCC_ATOMIC[117],TCC_BUBBLE[117],TCC_CYCLE[117],TCC_EA0_ATOMIC[117],TCC_ATOMIC[118],TCC_BUBBLE[118],TCC_CYCLE[118],TCC_EA0_ATOMIC[118],TCC_ATOMIC[119],TCC_BUBBLE[119],TCC_CYCLE[119],TCC_EA0_ATOMIC[119],TCC_ATOMIC[120],TCC_BUBBLE[120],TCC_CYCLE[120],TCC_EA0_ATOMIC[120],TCC_ATOMIC[121],TCC_BUBBLE[121],TCC_CYCLE[121],TCC_EA0_ATOMIC[121],TCC_ATOMIC[122],TCC_BUBBLE[122],TCC_CYCLE[122],TCC_EA0_ATOMIC[122],TCC_ATOMIC[123],TCC_BUBBLE[123],TCC_CYCLE[123],TCC_EA0_ATOMIC[123],TCC_ATOMIC[124],TCC_BUBBLE[124],TCC_CYCLE[124],TCC_EA0_ATOMIC[124],TCC_ATOMIC[125],TCC_BUBBLE[125],TCC_CYCLE[125],TCC_EA0_ATOMIC[125],TCC_ATOMIC[126],TCC_BUBBLE[126],TCC_CYCLE[126],TCC_EA0_ATOMIC[126],TCC_ATOMIC[127],TCC_BUBBLE[127],TCC_CYCLE[127],TCC_EA0_ATOMIC[127],Wave_Size_2,Correlation_ID_2,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,TA_FLAT_ATOMIC_WAVEFRONTS_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,TCC_ALL_TC_OP_INV_EVICT_sum,TCC_EA0_ATOMIC_sum,TCC_NORMAL_EVICT_sum,TCC_TOO_MANY_EA_WRREQS_STALL_sum,TCP_TCC_CC_READ_REQ_sum,TCP_TCC_CC_WRITE_REQ_sum,TCP_TCC_UC_ATOMIC_REQ_sum,TCP_TCC_UC_WRITE_REQ_sum,Wave_Size_3,Correlation_ID_3,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,TCC_EA0_ATOMIC_LEVEL_sum,TCC_EA0_RDREQ_LEVEL_sum,TCC_EA0_WRREQ_LEVEL_sum,TCC_EA0_WRREQ_STALL_sum,TCP_TCC_CC_ATOMIC_REQ_sum,TCP_TCC_RW_ATOMIC_REQ_sum,TCP_TCC_RW_READ_REQ_sum,TCP_TCC_RW_WRITE_REQ_sum,Wave_Size_4,Correlation_ID_4,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SPI_RA_REQ_NO_ALLOC,SPI_RA_REQ_NO_ALLOC_CSN,CPC_CPC_STAT_STALL,CPC_UTCL1_STALL_ON_TRANSLATION,CPF_CPF_STAT_IDLE,CPF_CPF_TCIU_IDLE,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,TA_BUFFER_TOTAL_CYCLES_sum,TCC_HIT_sum,TCC_MISS_sum,TCC_REQ_sum,TCC_STREAMING_REQ_sum,TCP_TOTAL_ACCESSES_sum,TCP_TOTAL_READ_sum,TCP_TOTAL_WRITE_sum,TCP_VOLATILE_sum,TD_ATOMIC_WAVEFRONT_sum,TD_STORE_WAVEFRONT_sum,Wave_Size_5,Correlation_ID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SQ_INST_CYCLES_SALU,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,CPC_ME1_DC0_SPI_BUSY,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,TCC_BUBBLE_sum,TCC_EA0_RDREQ_32B_sum,TCC_EA0_RDREQ_sum,TCC_EA0_RD_UNCACHED_32B_sum,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,TCP_TCC_READ_REQ_sum,TCP_TCC_WRITE_REQ_sum,Start_Timestamp,End_Timestamp
+0,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) 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diff --git a/tests/workloads/join_type_grid/MI300X_A1/sysinfo.csv b/tests/workloads/join_type_grid/MI300X_A1/sysinfo.csv
new file mode 100644
index 0000000000..dac86af145
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300X_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+join_type_grid,./tests/vcopy -n 1048576 -b 256 -i 3,SQ|LDS|SQC|TA|TD|TCP|TCC|SPI|CPC|CPF,Wed 29 May 2024 11:58:32 AM  (CDT),2,splinter-126-wr-c6,AMD Ryzen 9 7950X 16-Core Processor,"American Megatrends International, LLC.VS2683299N.FD",Ubuntu 22.04.4 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,114656528,,6.2.0-13611,113-MI3SRIOV-001,SPX,NPS1,MI300X_A1,gfx942,32,4096,304,4,32,64,1024,32,2100,1300,2100,1300,128,32,160,4,5324.8,8
diff --git a/tests/workloads/join_type_grid/MI300X_A1/timestamps.csv b/tests/workloads/join_type_grid/MI300X_A1/timestamps.csv
new file mode 100644
index 0000000000..d7d88c55bf
--- /dev/null
+++ b/tests/workloads/join_type_grid/MI300X_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,60633,1,962173,962173,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716102495744196,716102495759036,0
+2,60633,1,962173,962173,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716102495780394,716102495826473,0
+3,60633,1,962173,962173,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716102495846112,716102495858592,0
diff --git a/tests/workloads/join_type_kernel/MI300A_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/join_type_kernel/MI300A_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..26507acadd
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300A_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,11995,1,142758,142758,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73335731255741,73335731263472,0,216071.0,216071.0,16384.0,65536.0,25864.0,2081352.0
+1,11995,1,142758,142758,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73335731301410,73335731307379,0,185901.0,185901.0,16384.0,65536.0,13070.0,1048632.0
+2,11995,1,142758,142758,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73335731280057,73335731285866,0,173018.0,173018.0,16384.0,65536.0,13088.0,1049764.0
diff --git a/tests/workloads/join_type_kernel/MI300A_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/join_type_kernel/MI300A_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..f31411d0ca
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300A_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,11995,1,142769,142769,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73335731255741,73335731263472,0,0.0,0.0,0.0
+1,11995,1,142769,142769,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73335731301410,73335731307379,0,0.0,0.0,0.0
+2,11995,1,142769,142769,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73335731280057,73335731285866,0,0.0,0.0,0.0
diff --git a/tests/workloads/join_type_kernel/MI300A_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/join_type_kernel/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..533bf3abb9
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,142780,142780,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73335731255741,73335731263472,0,65536.0,399806.0,31901896.0
+1,11995,1,142780,142780,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73335731301410,73335731307379,0,65536.0,327988.0,26243952.0
+2,11995,1,142780,142780,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73335731280057,73335731285866,0,65536.0,224462.0,17968920.0
diff --git a/tests/workloads/join_type_kernel/MI300A_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/join_type_kernel/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..0e97d77499
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,142792,142792,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73335731255741,73335731263472,0,32768.0,521845.0,41747340.0
+1,11995,1,142792,142792,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73335731301410,73335731307379,0,32768.0,409982.0,32798568.0
+2,11995,1,142792,142792,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73335731280057,73335731285866,0,32768.0,411857.0,32946476.0
diff --git a/tests/workloads/join_type_kernel/MI300A_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/join_type_kernel/MI300A_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..444bdf82c0
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300A_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,11995,1,142803,142803,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73335731255741,73335731263472,0,226109.0,226109.0,130840.0,904436.0,16384.0,14140229.0,265572.0,0.0,56989988.0
+1,11995,1,142803,142803,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73335731301410,73335731307379,0,177924.0,177924.0,96217.0,711696.0,16384.0,10235824.0,197189.0,0.0,41392924.0
+2,11995,1,142803,142803,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73335731280057,73335731285866,0,188395.0,188395.0,106434.0,753580.0,16384.0,10297099.0,197924.0,0.0,41647424.0
diff --git a/tests/workloads/join_type_kernel/MI300A_A1/log.txt b/tests/workloads/join_type_kernel/MI300A_A1/log.txt
new file mode 100644
index 0000000000..fd74f404f6
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300A_A1/log.txt
@@ -0,0 +1,274 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/join_type_kernel/MI300A_A1
+Target: MI300A_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: None
+Hardware Blocks: All
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LEVEL_WAVES
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_CVT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_WR
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_RD
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F16
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_SPI_BUSY
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_READ_TAGCONFLICT_STALL_CYCLES_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TA_TCP_STATE_READ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TA_BUFFER_READ_WAVEFRONTS_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TA_BUFFER_WRITE_WAVEFRONTS_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TD_SPI_STALL_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TD_LOAD_WAVEFRONT_sum
+   |-> [/opt/rocm/bin/rocprofv2] - SPI_CSN_NUM_THREADGROUPS
+   |-> [/opt/rocm/bin/rocprofv2] - SPI_CSN_WAVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_CPC_TCIU_BUSY
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_CPC_TCIU_IDLE
+   |-> [/opt/rocm/bin/rocprofv2] - CPF_CPF_TCIU_BUSY
+   |-> [/opt/rocm/bin/rocprofv2] - CPF_CPF_TCIU_STALL
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_HITS
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_MISSES
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_MISSES_DUPLICATE
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_13.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[1]
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_14.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[1]
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_15.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[1]
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_16.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[3]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[3]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[3]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[3]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[4]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[4]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[4]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[4]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[5]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[5]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[5]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[5]
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_17.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[3]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[3]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[3]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[4]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[4]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[4]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[5]
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F64
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_VOLATILE_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TOTAL_ACCESSES_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TOTAL_READ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TOTAL_WRITE_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TA_BUFFER_ATOMIC_WAVEFRONTS_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TA_BUFFER_TOTAL_CYCLES_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TD_ATOMIC_WAVEFRONT_sum
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_EXP_GDS
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_VALU
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_SCA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_MISC
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_WR
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_RD
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_SALU
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_THREAD_CYCLES_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ITEMS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_MEM_VIOLATIONS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ATOMIC_RETURN
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_IDX_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_RESTORED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_SAVED
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TCC_UC_WRITE_REQ_sum
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_INST_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_READ_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_WRITE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_PENDING_STALL_CYCLES_sum
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300A_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/join_type_kernel/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..293092f641
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..08439eedce
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..6cca322d4e
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..e527ad31ba
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..3f8e04adb3
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_0.txt b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..ebc550fbfe
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD GRBM_COUNT GRBM_GUI_ACTIVE TCP_GATE_EN1_sum TCP_GATE_EN2_sum TCP_TD_TCP_STALL_CYCLES_sum TCP_TCR_TCP_STALL_CYCLES_sum TA_TA_BUSY_sum TA_BUFFER_WAVEFRONTS_sum TD_TD_BUSY_sum TD_TC_STALL_sum SPI_CSN_WINDOW_VALID SPI_CSN_BUSY CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE CPF_CPF_STAT_BUSY CPF_CPF_STAT_STALL TCC_CYCLE_sum TCC_BUSY_sum TCC_PROBE_sum TCC_PROBE_ALL_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_1.txt b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..9ad887ddbb
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 GRBM_SPI_BUSY TCP_READ_TAGCONFLICT_STALL_CYCLES_sum TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum TCP_TA_TCP_STATE_READ_sum TA_BUFFER_READ_WAVEFRONTS_sum TA_BUFFER_WRITE_WAVEFRONTS_sum TD_SPI_STALL_sum TD_LOAD_WAVEFRONT_sum SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE CPC_CPC_TCIU_BUSY CPC_CPC_TCIU_IDLE CPF_CPF_TCIU_BUSY CPF_CPF_TCIU_STALL TCC_NC_REQ_sum TCC_UC_REQ_sum TCC_CC_REQ_sum TCC_RW_REQ_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_10.txt b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..21c59688f7
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_11.txt b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..df6d67d7b7
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_12.txt b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..6e5320c11c
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_13.txt b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_13.txt
new file mode 100644
index 0000000000..d95492c1cd
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_13.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_ATOMIC[0] TCC_BUBBLE[0] TCC_CYCLE[0] TCC_EA0_ATOMIC[0] TCC_ATOMIC[1] TCC_BUBBLE[1] TCC_CYCLE[1] TCC_EA0_ATOMIC[1] TCC_ATOMIC[2] TCC_BUBBLE[2] TCC_CYCLE[2] TCC_EA0_ATOMIC[2] TCC_ATOMIC[3] TCC_BUBBLE[3] TCC_CYCLE[3] TCC_EA0_ATOMIC[3] TCC_ATOMIC[4] TCC_BUBBLE[4] TCC_CYCLE[4] TCC_EA0_ATOMIC[4] TCC_ATOMIC[5] TCC_BUBBLE[5] TCC_CYCLE[5] TCC_EA0_ATOMIC[5] TCC_ATOMIC[6] TCC_BUBBLE[6] TCC_CYCLE[6] TCC_EA0_ATOMIC[6] TCC_ATOMIC[7] TCC_BUBBLE[7] TCC_CYCLE[7] TCC_EA0_ATOMIC[7] TCC_ATOMIC[8] TCC_BUBBLE[8] TCC_CYCLE[8] TCC_EA0_ATOMIC[8] TCC_ATOMIC[9] TCC_BUBBLE[9] TCC_CYCLE[9] TCC_EA0_ATOMIC[9] TCC_ATOMIC[10] TCC_BUBBLE[10] TCC_CYCLE[10] TCC_EA0_ATOMIC[10] TCC_ATOMIC[11] TCC_BUBBLE[11] TCC_CYCLE[11] TCC_EA0_ATOMIC[11] TCC_ATOMIC[12] TCC_BUBBLE[12] TCC_CYCLE[12] TCC_EA0_ATOMIC[12] TCC_ATOMIC[13] TCC_BUBBLE[13] TCC_CYCLE[13] TCC_EA0_ATOMIC[13] TCC_ATOMIC[14] TCC_BUBBLE[14] TCC_CYCLE[14] TCC_EA0_ATOMIC[14] TCC_ATOMIC[15] TCC_BUBBLE[15] TCC_CYCLE[15] TCC_EA0_ATOMIC[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_14.txt b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_14.txt
new file mode 100644
index 0000000000..28327b86d3
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_14.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_ATOMIC_LEVEL[0] TCC_EA0_RDREQ[0] TCC_EA0_RDREQ_32B[0] TCC_EA0_RDREQ_LEVEL[0] TCC_EA0_ATOMIC_LEVEL[1] TCC_EA0_RDREQ[1] TCC_EA0_RDREQ_32B[1] TCC_EA0_RDREQ_LEVEL[1] TCC_EA0_ATOMIC_LEVEL[2] TCC_EA0_RDREQ[2] TCC_EA0_RDREQ_32B[2] TCC_EA0_RDREQ_LEVEL[2] TCC_EA0_ATOMIC_LEVEL[3] TCC_EA0_RDREQ[3] TCC_EA0_RDREQ_32B[3] TCC_EA0_RDREQ_LEVEL[3] TCC_EA0_ATOMIC_LEVEL[4] TCC_EA0_RDREQ[4] TCC_EA0_RDREQ_32B[4] TCC_EA0_RDREQ_LEVEL[4] TCC_EA0_ATOMIC_LEVEL[5] TCC_EA0_RDREQ[5] TCC_EA0_RDREQ_32B[5] TCC_EA0_RDREQ_LEVEL[5] TCC_EA0_ATOMIC_LEVEL[6] TCC_EA0_RDREQ[6] TCC_EA0_RDREQ_32B[6] TCC_EA0_RDREQ_LEVEL[6] TCC_EA0_ATOMIC_LEVEL[7] TCC_EA0_RDREQ[7] TCC_EA0_RDREQ_32B[7] TCC_EA0_RDREQ_LEVEL[7] TCC_EA0_ATOMIC_LEVEL[8] TCC_EA0_RDREQ[8] TCC_EA0_RDREQ_32B[8] TCC_EA0_RDREQ_LEVEL[8] TCC_EA0_ATOMIC_LEVEL[9] TCC_EA0_RDREQ[9] TCC_EA0_RDREQ_32B[9] TCC_EA0_RDREQ_LEVEL[9] TCC_EA0_ATOMIC_LEVEL[10] TCC_EA0_RDREQ[10] TCC_EA0_RDREQ_32B[10] TCC_EA0_RDREQ_LEVEL[10] TCC_EA0_ATOMIC_LEVEL[11] TCC_EA0_RDREQ[11] TCC_EA0_RDREQ_32B[11] TCC_EA0_RDREQ_LEVEL[11] TCC_EA0_ATOMIC_LEVEL[12] TCC_EA0_RDREQ[12] TCC_EA0_RDREQ_32B[12] TCC_EA0_RDREQ_LEVEL[12] TCC_EA0_ATOMIC_LEVEL[13] TCC_EA0_RDREQ[13] TCC_EA0_RDREQ_32B[13] TCC_EA0_RDREQ_LEVEL[13] TCC_EA0_ATOMIC_LEVEL[14] TCC_EA0_RDREQ[14] TCC_EA0_RDREQ_32B[14] TCC_EA0_RDREQ_LEVEL[14] TCC_EA0_ATOMIC_LEVEL[15] TCC_EA0_RDREQ[15] TCC_EA0_RDREQ_32B[15] TCC_EA0_RDREQ_LEVEL[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_15.txt b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_15.txt
new file mode 100644
index 0000000000..033ae877ed
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_15.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_WRREQ[0] TCC_EA0_WRREQ_64B[0] TCC_EA0_WRREQ_LEVEL[0] TCC_HIT[0] TCC_EA0_WRREQ[1] TCC_EA0_WRREQ_64B[1] TCC_EA0_WRREQ_LEVEL[1] TCC_HIT[1] TCC_EA0_WRREQ[2] TCC_EA0_WRREQ_64B[2] TCC_EA0_WRREQ_LEVEL[2] TCC_HIT[2] TCC_EA0_WRREQ[3] TCC_EA0_WRREQ_64B[3] TCC_EA0_WRREQ_LEVEL[3] TCC_HIT[3] TCC_EA0_WRREQ[4] TCC_EA0_WRREQ_64B[4] TCC_EA0_WRREQ_LEVEL[4] TCC_HIT[4] TCC_EA0_WRREQ[5] TCC_EA0_WRREQ_64B[5] TCC_EA0_WRREQ_LEVEL[5] TCC_HIT[5] TCC_EA0_WRREQ[6] TCC_EA0_WRREQ_64B[6] TCC_EA0_WRREQ_LEVEL[6] TCC_HIT[6] TCC_EA0_WRREQ[7] TCC_EA0_WRREQ_64B[7] TCC_EA0_WRREQ_LEVEL[7] TCC_HIT[7] TCC_EA0_WRREQ[8] TCC_EA0_WRREQ_64B[8] TCC_EA0_WRREQ_LEVEL[8] TCC_HIT[8] TCC_EA0_WRREQ[9] TCC_EA0_WRREQ_64B[9] TCC_EA0_WRREQ_LEVEL[9] TCC_HIT[9] TCC_EA0_WRREQ[10] TCC_EA0_WRREQ_64B[10] TCC_EA0_WRREQ_LEVEL[10] TCC_HIT[10] TCC_EA0_WRREQ[11] TCC_EA0_WRREQ_64B[11] TCC_EA0_WRREQ_LEVEL[11] TCC_HIT[11] TCC_EA0_WRREQ[12] TCC_EA0_WRREQ_64B[12] TCC_EA0_WRREQ_LEVEL[12] TCC_HIT[12] TCC_EA0_WRREQ[13] TCC_EA0_WRREQ_64B[13] TCC_EA0_WRREQ_LEVEL[13] TCC_HIT[13] TCC_EA0_WRREQ[14] TCC_EA0_WRREQ_64B[14] TCC_EA0_WRREQ_LEVEL[14] TCC_HIT[14] TCC_EA0_WRREQ[15] TCC_EA0_WRREQ_64B[15] TCC_EA0_WRREQ_LEVEL[15] TCC_HIT[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_16.txt b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_16.txt
new file mode 100644
index 0000000000..123269c3f9
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_16.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_MISS[0] TCC_READ[0] TCC_REQ[0] TCC_RW_REQ[0] TCC_MISS[1] TCC_READ[1] TCC_REQ[1] TCC_RW_REQ[1] TCC_MISS[2] TCC_READ[2] TCC_REQ[2] TCC_RW_REQ[2] TCC_MISS[3] TCC_READ[3] TCC_REQ[3] TCC_RW_REQ[3] TCC_MISS[4] TCC_READ[4] TCC_REQ[4] TCC_RW_REQ[4] TCC_MISS[5] TCC_READ[5] TCC_REQ[5] TCC_RW_REQ[5] TCC_MISS[6] TCC_READ[6] TCC_REQ[6] TCC_RW_REQ[6] TCC_MISS[7] TCC_READ[7] TCC_REQ[7] TCC_RW_REQ[7] TCC_MISS[8] TCC_READ[8] TCC_REQ[8] TCC_RW_REQ[8] TCC_MISS[9] TCC_READ[9] TCC_REQ[9] TCC_RW_REQ[9] TCC_MISS[10] TCC_READ[10] TCC_REQ[10] TCC_RW_REQ[10] TCC_MISS[11] TCC_READ[11] TCC_REQ[11] TCC_RW_REQ[11] TCC_MISS[12] TCC_READ[12] TCC_REQ[12] TCC_RW_REQ[12] TCC_MISS[13] TCC_READ[13] TCC_REQ[13] TCC_RW_REQ[13] TCC_MISS[14] TCC_READ[14] TCC_REQ[14] TCC_RW_REQ[14] TCC_MISS[15] TCC_READ[15] TCC_REQ[15] TCC_RW_REQ[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_17.txt b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_17.txt
new file mode 100644
index 0000000000..102fb795bd
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_17.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_TAG_STALL[0] TCC_TOO_MANY_EA_WRREQS_STALL[0] TCC_WRITE[0] TCC_TAG_STALL[1] TCC_TOO_MANY_EA_WRREQS_STALL[1] TCC_WRITE[1] TCC_TAG_STALL[2] TCC_TOO_MANY_EA_WRREQS_STALL[2] TCC_WRITE[2] TCC_TAG_STALL[3] TCC_TOO_MANY_EA_WRREQS_STALL[3] TCC_WRITE[3] TCC_TAG_STALL[4] TCC_TOO_MANY_EA_WRREQS_STALL[4] TCC_WRITE[4] TCC_TAG_STALL[5] TCC_TOO_MANY_EA_WRREQS_STALL[5] TCC_WRITE[5] TCC_TAG_STALL[6] TCC_TOO_MANY_EA_WRREQS_STALL[6] TCC_WRITE[6] TCC_TAG_STALL[7] TCC_TOO_MANY_EA_WRREQS_STALL[7] TCC_WRITE[7] TCC_TAG_STALL[8] TCC_TOO_MANY_EA_WRREQS_STALL[8] TCC_WRITE[8] TCC_TAG_STALL[9] TCC_TOO_MANY_EA_WRREQS_STALL[9] TCC_WRITE[9] TCC_TAG_STALL[10] TCC_TOO_MANY_EA_WRREQS_STALL[10] TCC_WRITE[10] TCC_TAG_STALL[11] TCC_TOO_MANY_EA_WRREQS_STALL[11] TCC_WRITE[11] TCC_TAG_STALL[12] TCC_TOO_MANY_EA_WRREQS_STALL[12] TCC_WRITE[12] TCC_TAG_STALL[13] TCC_TOO_MANY_EA_WRREQS_STALL[13] TCC_WRITE[13] TCC_TAG_STALL[14] TCC_TOO_MANY_EA_WRREQS_STALL[14] TCC_WRITE[14] TCC_TAG_STALL[15] TCC_TOO_MANY_EA_WRREQS_STALL[15] TCC_WRITE[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_2.txt b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..8ff8201c5a
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 TCP_VOLATILE_sum TCP_TOTAL_ACCESSES_sum TCP_TOTAL_READ_sum TCP_TOTAL_WRITE_sum TA_BUFFER_ATOMIC_WAVEFRONTS_sum TA_BUFFER_TOTAL_CYCLES_sum TD_ATOMIC_WAVEFRONT_sum TD_STORE_WAVEFRONT_sum SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION CPF_CPF_STAT_IDLE CPF_CPF_TCIU_IDLE TCC_REQ_sum TCC_STREAMING_REQ_sum TCC_HIT_sum TCC_MISS_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_3.txt b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..cb10e4801d
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS TCP_TOTAL_ATOMIC_WITH_RET_sum TCP_TOTAL_ATOMIC_WITHOUT_RET_sum TCP_TOTAL_WRITEBACK_INVALIDATES_sum TCP_TOTAL_CACHE_ACCESSES_sum TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES_sum TD_COALESCABLE_WAVEFRONT_sum SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE CPF_CMP_UTCL1_STALL_ON_TRANSLATION TCC_READ_sum TCC_WRITE_sum TCC_ATOMIC_sum TCC_WRITEBACK_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_4.txt b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..e4e6069e38
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAIT_ANY SQ_WAIT_INST_ANY SQ_ACTIVE_INST_ANY SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU TCP_UTCL1_TRANSLATION_MISS_sum TCP_UTCL1_TRANSLATION_HIT_sum TCP_UTCL1_PERMISSION_MISS_sum TCP_UTCL1_REQUEST_sum TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_TOTAL_WAVEFRONTS_sum SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE TCC_EA0_WRREQ_sum TCC_EA0_WRREQ_64B_sum TCC_EA0_WR_UNCACHED_32B_sum TCC_EA0_WRREQ_DRAM_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_5.txt b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..77bd288232
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_SCA SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU TCP_TCC_READ_REQ_sum TCP_TCC_WRITE_REQ_sum TCP_TCC_ATOMIC_WITH_RET_REQ_sum TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN CPC_ME1_DC0_SPI_BUSY TCC_EA0_RDREQ_sum TCC_EA0_RDREQ_32B_sum TCC_BUBBLE_sum TCC_EA0_RD_UNCACHED_32B_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_6.txt b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..609c184df8
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_THREAD_CYCLES_VALU SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 TCP_TCC_NC_READ_REQ_sum TCP_TCC_NC_WRITE_REQ_sum TCP_TCC_NC_ATOMIC_REQ_sum TCP_TCC_UC_READ_REQ_sum TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN TCC_EA0_RDREQ_DRAM_sum TCC_TAG_STALL_sum TCC_NORMAL_WRITEBACK_sum TCC_ALL_TC_OP_WB_WRITEBACK_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_7.txt b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..5881e5fb8f
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED TCP_TCC_UC_WRITE_REQ_sum TCP_TCC_UC_ATOMIC_REQ_sum TCP_TCC_CC_READ_REQ_sum TCP_TCC_CC_WRITE_REQ_sum TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR TCC_NORMAL_EVICT_sum TCC_ALL_TC_OP_INV_EVICT_sum TCC_TOO_MANY_EA_WRREQS_STALL_sum TCC_EA0_ATOMIC_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_8.txt b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..66317384f5
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES TCP_TCC_CC_ATOMIC_REQ_sum TCP_TCC_RW_READ_REQ_sum TCP_TCC_RW_WRITE_REQ_sum TCP_TCC_RW_ATOMIC_REQ_sum SPI_VWC_CSC_WR SPI_RA_BULKY_CU_FULL_CSN TCC_EA0_RDREQ_LEVEL_sum TCC_EA0_WRREQ_LEVEL_sum TCC_EA0_ATOMIC_LEVEL_sum TCC_EA0_WRREQ_STALL_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_9.txt b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..60ceab315a
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ TCP_PENDING_STALL_CYCLES_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300A_A1/perfmon/timestamps.txt b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..676cca1b80
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300A_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300A_A1/pmc_perf.csv b/tests/workloads/join_type_kernel/MI300A_A1/pmc_perf.csv
new file mode 100644
index 0000000000..598f0c7a40
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300A_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
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CED_WRITE_CYCLES_sum,TCC_ATOMIC_sum,TCC_READ_sum,TCC_WRITEBACK_sum,TCC_WRITE_sum,TCP_TOTAL_ATOMIC_WITHOUT_RET_sum,TCP_TOTAL_ATOMIC_WITH_RET_sum,TCP_TOTAL_CACHE_ACCESSES_sum,TCP_TOTAL_WRITEBACK_INVALIDATES_sum,TD_COALESCABLE_WAVEFRONT_sum,Wave_Size_5,Correlation_ID_5,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,TA_FLAT_ATOMIC_WAVEFRONTS_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,TCC_ALL_TC_OP_INV_EVICT_sum,TCC_EA0_ATOMIC_sum,TCC_NORMAL_EVICT_sum,TCC_TOO_MANY_EA_WRREQS_STALL_sum,TCP_TCC_CC_READ_REQ_sum,TCP_TCC_CC_WRITE_REQ_sum,TCP_TCC_UC_ATOMIC_REQ_sum,TCP_TCC_UC_WRITE_REQ_sum,Wave_Size_6,Correlation_ID_6,XCC_Index_6,TCC_MISS[0],TCC_READ[0],TCC_REQ[0],TCC_RW_REQ[0],TCC_MISS[1],TCC_READ[1],TCC_REQ[1],TCC_RW_REQ[1],TCC_MISS[2],TCC_READ[2],TCC_REQ[2],TCC_RW_REQ[2],TCC_MISS[3],TCC_READ[3],TCC_REQ[3],TCC_RW_REQ[3],TCC_MISS[4],TCC_READ[4],TCC_REQ[4],TCC_RW_REQ[4],TCC_MISS[5],TCC_READ[5],TCC_REQ[5],TCC_RW_REQ[5],TCC_MISS[6],TCC_READ[6],TCC_REQ[6],TCC_RW_REQ[6],TCC_MISS[7],TCC_READ[7],TCC_REQ[7],TCC_RW_REQ[7],TCC_MISS[8],TCC_READ[8],TCC_REQ[8],TCC_RW_REQ[8],TCC_MISS[9],TCC_READ[9],TCC_REQ[9],TCC_RW_REQ[9],TCC_MISS[10],TCC_READ[10],TCC_REQ[10],TCC_RW_REQ[10],TCC_MISS[11],TCC_READ[11],TCC_REQ[11],TCC_RW_REQ[11],TCC_MISS[12],TCC_READ[12],TCC_REQ[12],TCC_RW_REQ[12],TCC_MISS[13],TCC_READ[13],TCC_REQ[13],TCC_RW_REQ[13],TCC_MISS[14],TCC_READ[14],TCC_REQ[14],TCC_RW_REQ[14],TCC_MISS[15],TCC_READ[15],TCC_REQ[15],TCC_RW_REQ[15],TCC_MISS[16],TCC_READ[16],TCC_REQ[16],TCC_RW_REQ[16],TCC_MISS[17],TCC_READ[17],TCC_REQ[17],TCC_RW_REQ[17],TCC_MISS[18],TCC_READ[18],TCC_REQ[18],TCC_RW_REQ[18],TCC_MISS[19],TCC_READ[19],TCC_REQ[19],TCC_RW_REQ[19],TCC_MISS[20],TCC_READ[20],TCC_REQ[20],TCC_RW_REQ[20],TCC_MISS[21],TCC_READ[21],TCC_REQ[21],TCC_RW_REQ[21],TCC_MISS[22],TCC_READ[22],TCC_REQ[22],TCC_RW_REQ[22],TCC_MISS[23],TCC_READ[23],TCC_REQ[23],TCC_RW_REQ[23],TCC_MISS[24],TCC_READ[24],TCC_REQ[24],TCC_RW_REQ[24],TCC_MISS[25],TCC_READ[25],TCC_REQ[25],TCC_RW_REQ[25],TCC_MISS[26],TCC_READ[26],TCC_REQ[26],TCC_RW_REQ[26],TCC_MISS[27],TCC_READ[27],TCC_REQ[27],TCC_RW_REQ[27],TCC_MISS[28],TCC_READ[28],TCC_REQ[28],TCC_RW_REQ[28],TCC_MISS[29],TCC_READ[29],TCC_REQ[29],TCC_RW_REQ[29],TCC_MISS[30],TCC_READ[30],TCC_REQ[30],TCC_RW_REQ[30],TCC_MISS[31],TCC_READ[31],TCC_REQ[31],TCC_RW_REQ[31],TCC_MISS[32],TCC_READ[32],TCC_REQ[32],TCC_RW_REQ[32],TCC_MISS[33],TCC_READ[33],TCC_REQ[33],TCC_RW_REQ[33],TCC_MISS[34],TCC_READ[34],TCC_REQ[34],TCC_RW_REQ[34],TCC_MISS[35],TCC_READ[35],TCC_REQ[35],TCC_RW_REQ[35],TCC_MISS[36],TCC_READ[36],TCC_REQ[36],TCC_RW_REQ[36],TCC_MISS[37],TCC_READ[37],TCC_REQ[37],TCC_RW_REQ[37],TCC_MISS[38],TCC_READ[38],TCC_REQ[38],TCC_RW_REQ[38],TCC_MISS[39],TCC_READ[39],TCC_REQ[39],TCC_RW_REQ[39],TCC_MISS[40],TCC_READ[40],TCC_REQ[40],TCC_RW_REQ[40],TCC_MISS[41],TCC_READ[41],TCC_REQ[41],TCC_RW_REQ[41],TCC_MISS[42],TCC_READ[42],TCC_REQ[42],TCC_RW_REQ[42],TCC_MISS[43],TCC_READ[43],TCC_REQ[43],TCC_RW_REQ[43],TCC_MISS[44],TCC_READ[44],TCC_REQ[44],TCC_RW_REQ[44],TCC_MISS[45],TCC_READ[45],TCC_REQ[45],TCC_RW_REQ[45],TCC_MISS[46],TCC_READ[46],TCC_REQ[46],TCC_RW_REQ[46],TCC_MISS[47],TCC_READ[47],TCC_REQ[47],TCC_RW_REQ[47],TCC_MISS[48],TCC_READ[48],TCC_REQ[48],TCC_RW_REQ[48],TCC_MISS[49],TCC_READ[49],TCC_REQ[49],TCC_RW_REQ[49],TCC_MISS[50],TCC_READ[50],TCC_REQ[50],TCC_RW_REQ[50],TCC_MISS[51],TCC_READ[51],TCC_REQ[51],TCC_RW_REQ[51],TCC_MISS[52],TCC_READ[52],TCC_REQ[52],TCC_RW_REQ[52],TCC_MISS[53],TCC_READ[53],TCC_REQ[53],TCC_RW_REQ[53],TCC_MISS[54],TCC_READ[54],TCC_REQ[54],TCC_RW_REQ[54],TCC_MISS[55],TCC_READ[55],TCC_REQ[55],TCC_RW_REQ[55],TCC_MISS[56],TCC_READ[56],TCC_REQ[56],TCC_RW_REQ[56],TCC_MISS[57],TCC_READ[57],TCC_REQ[57],TCC_RW_REQ[57],TCC_MISS[58],TCC_READ[58],TCC_REQ[58],TCC_RW_REQ[58],TCC_MISS[59],TCC_READ[59],TCC_REQ[59],TCC_RW_REQ[59],TCC_MISS[60],TCC_READ[60],TCC_REQ[60],TCC_RW_REQ[60],TCC_MISS[61],TCC_READ[61],TCC_REQ[61],TCC_RW_REQ[61],TCC_MISS[62],TCC_READ[62],TCC_REQ[62],TCC_RW_REQ[62],TCC_MISS[63],TCC_READ[63],TCC_REQ[63],TCC_RW_REQ[63],TCC_MISS[64],TCC_READ[64],TCC_REQ[64],TCC_RW_REQ[64],TCC_MISS[65],TCC_READ[65],TCC_REQ[65],TCC_RW_REQ[65],TCC_MISS[66],TCC_READ[66],TCC_REQ[66],TCC_RW_REQ[66],TCC_MISS[67],TCC_READ[67],TCC_REQ[67],TCC_RW_REQ[67],TCC_MISS[68],TCC_READ[68],TCC_REQ[68],TCC_RW_REQ[68],TCC_MISS[69],TCC_READ[69],TCC_REQ[69],TCC_RW_REQ[69],TCC_MISS[70],TCC_READ[70],TCC_REQ[70],TCC_RW_REQ[70],TCC_MISS[71],TCC_READ[71],TCC_REQ[71],TCC_RW_REQ[71],TCC_MISS[72],TCC_READ[72],TCC_REQ[72],TCC_RW_REQ[72],TCC_MISS[73],TCC_READ[73],TCC_REQ[73],TCC_RW_REQ[73],TCC_MISS[74],TCC_READ[74],TCC_REQ[74],TCC_RW_REQ[74],TCC_MISS[75],TCC_READ[75],TCC_REQ[75],TCC_RW_REQ[75],TCC_MISS[76],TCC_READ[76],TCC_REQ[76],TCC_RW_REQ[76],TCC_MISS[77],TCC_READ[77],TCC_REQ[77],TCC_RW_REQ[77],TCC_MISS[78],TCC_READ[78],TCC_REQ[78],TCC_RW_REQ[78],TCC_MISS[79],TCC_READ[79],TCC_REQ[79],TCC_RW_REQ[79],TCC_MISS[80],TCC_READ[80],TCC_REQ[80],TCC_RW_REQ[80],TCC_MISS[81],TCC_READ[81],TCC_REQ[81],TCC_RW_REQ[81],TCC_MISS[82],TCC_READ[82],TCC_REQ[82],TCC_RW_REQ[82],TCC_MISS[83],TCC_READ[83],TCC_REQ[83],TCC_RW_REQ[83],TCC_MISS[84],TCC_READ[84],TCC_REQ[84],TCC_RW_REQ[84],TCC_MISS[85],TCC_READ[85],TCC_REQ[85],TCC_RW_REQ[85],TCC_MISS[86],TCC_READ[86],TCC_REQ[86],TCC_RW_REQ[86],TCC_MISS[87],TCC_READ[87],TCC_REQ[87],TCC_RW_REQ[87],TCC_MISS[88],TCC_READ[88],TCC_REQ[88],TCC_RW_REQ[88],TCC_MISS[89],TCC_READ[89],TCC_REQ[89],TCC_RW_REQ[89],TCC_MISS[90],TCC_READ[90],TCC_REQ[90],TCC_RW_REQ[90],TCC_MISS[91],TCC_READ[91],TCC_REQ[91],TCC_RW_REQ[91],TCC_MISS[92],TCC_READ[92],TCC_REQ[92],TCC_RW_REQ[92],TCC_MISS[93],TCC_READ[93],TCC_REQ[93],TCC_RW_REQ[93],TCC_MISS[94],TCC_READ[94],TCC_REQ[94],TCC_RW_REQ[94],TCC_MISS[95],TCC_READ[95],TCC_REQ[95],TCC_RW_REQ[95],Wave_Size_7,Correlation_ID_7,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SPI_RA_REQ_NO_ALLOC,SPI_RA_REQ_NO_ALLOC_CSN,CPC_CPC_STAT_STALL,CPC_UTCL1_STALL_ON_TRANSLATION,CPF_CPF_STAT_IDLE,CPF_CPF_TCIU_IDLE,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,TA_BUFFER_TOTAL_CYCLES_sum,TCC_HIT_sum,TCC_MISS_sum,TCC_REQ_sum,TCC_STREAMING_REQ_sum,TCP_TOTAL_ACCESSES_sum,TCP_TOTAL_READ_sum,TCP_TOTAL_WRITE_sum,TCP_VOLATILE_sum,TD_ATOMIC_WAVEFRONT_sum,TD_STORE_WAVEFRONT_sum,Wave_Size_8,Correlation_ID_8,XCC_Index_8,TCC_ATOMIC[0],TCC_BUBBLE[0],TCC_CYCLE[0],TCC_EA0_ATOMIC[0],TCC_ATOMIC[1],TCC_BUBBLE[1],TCC_CYCLE[1],TCC_EA0_ATOMIC[1],TCC_ATOMIC[2],TCC_BUBBLE[2],TCC_CYCLE[2],TCC_EA0_ATOMIC[2],TCC_ATOMIC[3],TCC_BUBBLE[3],TCC_CYCLE[3],TCC_EA0_ATOMIC[3],TCC_ATOMIC[4],TCC_BUBBLE[4],TCC_CYCLE[4],TCC_EA0_ATOMIC[4],TCC_ATOMIC[5],TCC_BUBBLE[5],TCC_CYCLE[5],TCC_EA0_ATOMIC[5],TCC_ATOMIC[6],TCC_BUBBLE[6],TCC_CYCLE[6],TCC_EA0_ATOMIC[6],TCC_ATOMIC[7],TCC_BUBBLE[7],TCC_CYCLE[7],TCC_EA0_ATOMIC[7],TCC_ATOMIC[8],TCC_BUBBLE[8],TCC_CYCLE[8],TCC_EA0_ATOMIC[8],TCC_ATOMIC[9],TCC_BUBBLE[9],TCC_CYCLE[9],TCC_EA0_ATOMIC[9],TCC_ATOMIC[10],TCC_BUBBLE[10],TCC_CYCLE[10],TCC_EA0_ATOMIC[10],TCC_ATOMIC[11],TCC_BUBBLE[11],TCC_CYCLE[11],TCC_EA0_ATOMIC[11],TCC_ATOMIC[12],TCC_BUBBLE[12],TCC_CYCLE[12],TCC_EA0_ATOMIC[12],TCC_ATOMIC[13],TCC_BUBBLE[13],TCC_CYCLE[13],TCC_EA0_ATOMIC[13],TCC_ATOMIC[14],TCC_BUBBLE[14],TCC_CYCLE[14],TCC_EA0_ATOMIC[14],TCC_ATOMIC[15],TCC_BUBBLE[15],TCC_CYCLE[15],TCC_EA0_ATOMIC[15],TCC_ATOMIC[16],TCC_BUBBLE[16],TCC_CYCLE[16],TCC_EA0_ATOMIC[16],TCC_ATOMIC[17],TCC_BUBBLE[17],TCC_CYCLE[17],TCC_EA0_ATOMIC[17],TCC_ATOMIC[18],TCC_BUBBLE[18],TCC_CYCLE[18],TCC_EA0_ATOMIC[18],TCC_ATOMIC[19],TCC_BUBBLE[19],TCC_CYCLE[19],TCC_EA0_ATOMIC[19],TCC_ATOMIC[20],TCC_BUBBLE[20],TCC_CYCLE[20],TCC_EA0_ATOMIC[20],TCC_ATOMIC[21],TCC_BUBBLE[21],TCC_CYCLE[21],TCC_EA0_ATOMIC[21],TCC_ATOMIC[22],TCC_BUBBLE[22],TCC_CYCLE[22],TCC_EA0_ATOMIC[22],TCC_ATOMIC[23],TCC_BUBBLE[23],TCC_CYCLE[23],TCC_EA0_ATOMIC[23],TCC_ATOMIC[24],TCC_BUBBLE[24],TCC_CYCLE[24],TCC_EA0_ATOMIC[24],TCC_ATOMIC[25],TCC_BUBBLE[25],TCC_CYCLE[25],TCC_EA0_ATOMIC[25],TCC_ATOMIC[26],TCC_BUBBLE[26],TCC_CYCLE[26],TCC_EA0_ATOMIC[26],TCC_ATOMIC[27],TCC_BUBBLE[27],TCC_CYCLE[27],TCC_EA0_ATOMIC[27],TCC_ATOMIC[28],TCC_BUBBLE[28],TCC_CYCLE[28],TCC_EA0_ATOMIC[28],TCC_ATOMIC[29],TCC_BUBBLE[29],TCC_CYCLE[29],TCC_EA0_ATOMIC[29],TCC_ATOMIC[30],TCC_BUBBLE[30],TCC_CYCLE[30],TCC_EA0_ATOMIC[30],TCC_ATOMIC[31],TCC_BUBBLE[31],TCC_CYCLE[31],TCC_EA0_ATOMIC[31],TCC_ATOMIC[32],TCC_BUBBLE[32],TCC_CYCLE[32],TCC_EA0_ATOMIC[32],TCC_ATOMIC[33],TCC_BUBBLE[33],TCC_CYCLE[33],TCC_EA0_ATOMIC[33],TCC_ATOMIC[34],TCC_BUBBLE[34],TCC_CYCLE[34],TCC_EA0_ATOMIC[34],TCC_ATOMIC[35],TCC_BUBBLE[35],TCC_CYCLE[35],TCC_EA0_ATOMIC[35],TCC_ATOMIC[36],TCC_BUBBLE[36],TCC_CYCLE[36],TCC_EA0_ATOMIC[36],TCC_ATOMIC[37],TCC_BUBBLE[37],TCC_CYCLE[37],TCC_EA0_ATOMIC[37],TCC_ATOMIC[38],TCC_BUBBLE[38],TCC_CYCLE[38],TCC_EA0_ATOMIC[38],TCC_ATOMIC[39],TCC_BUBBLE[39],TCC_CYCLE[39],TCC_EA0_ATOMIC[39],TCC_ATOMIC[40],TCC_BUBBLE[40],TCC_CYCLE[40],TCC_EA0_ATOMIC[40],TCC_ATOMIC[41],TCC_BUBBLE[41],TCC_CYCLE[41],TCC_EA0_ATOMIC[41],TCC_ATOMIC[42],TCC_BUBBLE[42],TCC_CYCLE[42],TCC_EA0_ATOMIC[42],TCC_ATOMIC[43],TCC_BUBBLE[43],TCC_CYCLE[43],TCC_EA0_ATOMIC[43],TCC_ATOMIC[44],TCC_BUBBLE[44],TCC_CYCLE[44],TCC_EA0_ATOMIC[44],TCC_ATOMIC[45],TCC_BUBBLE[45],TCC_CYCLE[45],TCC_EA0_ATOMIC[45],TCC_ATOMIC[46],TCC_BUBBLE[46],TCC_CYCLE[46],TCC_EA0_ATOMIC[46],TCC_ATOMIC[47],TCC_BUBBLE[47],TCC_CYCLE[47],TCC_EA0_ATOMIC[47],TCC_ATOMIC[48],TCC_BUBBLE[48],TCC_CYCLE[48],TCC_EA0_ATOMIC[48],TCC_ATOMIC[49],TCC_BUBBLE[49],TCC_CYCLE[49],TCC_EA0_ATOMIC[49],TCC_ATOMIC[50],TCC_BUBBLE[50],TCC_CYCLE[50],TCC_EA0_ATOMIC[50],TCC_ATOMIC[51],TCC_BUBBLE[51],TCC_CYCLE[51],TCC_EA0_ATOMIC[51],TCC_ATOMIC[52],TCC_BUBBLE[52],TCC_CYCLE[52],TCC_EA0_ATOMIC[52],TCC_ATOMIC[53],TCC_BUBBLE[53],TCC_CYCLE[53],TCC_EA0_ATOMIC[53],TCC_ATOMIC[54],TCC_BUBBLE[54],TCC_CYCLE[54],TCC_EA0_ATOMIC[54],TCC_ATOMIC[55],TCC_BUBBLE[55],TCC_CYCLE[55],TCC_EA0_ATOMIC[55],TCC_ATOMIC[56],TCC_BUBBLE[56],TCC_CYCLE[56],TCC_EA0_ATOMIC[56],TCC_ATOMIC[57],TCC_BUBBLE[57],TCC_CYCLE[57],TCC_EA0_ATOMIC[57],TCC_ATOMIC[58],TCC_BUBBLE[58],TCC_CYCLE[58],TCC_EA0_ATOMIC[58],TCC_ATOMIC[59],TCC_BUBBLE[59],TCC_CYCLE[59],TCC_EA0_ATOMIC[59],TCC_ATOMIC[60],TCC_BUBBLE[60],TCC_CYCLE[60],TCC_EA0_ATOMIC[60],TCC_ATOMIC[61],TCC_BUBBLE[61],TCC_CYCLE[61],TCC_EA0_ATOMIC[61],TCC_ATOMIC[62],TCC_BUBBLE[62],TCC_CYCLE[62],TCC_EA0_ATOMIC[62],TCC_ATOMIC[63],TCC_BUBBLE[63],TCC_CYCLE[63],TCC_EA0_ATOMIC[63],TCC_ATOMIC[64],TCC_BUBBLE[64],TCC_CYCLE[64],TCC_EA0_ATOMIC[64],TCC_ATOMIC[65],TCC_BUBBLE[65],TCC_CYCLE[65],TCC_EA0_ATOMIC[65],TCC_ATOMIC[66],TCC_BUBBLE[66],TCC_CYCLE[66],TCC_EA0_ATOMIC[66],TCC_ATOMIC[67],TCC_BUBBLE[67],TCC_CYCLE[67],TCC_EA0_ATOMIC[67],TCC_ATOMIC[68],TCC_BUBBLE[68],TCC_CYCLE[68],TCC_EA0_ATOMIC[68],TCC_ATOMIC[69],TCC_BUBBLE[69],TCC_CYCLE[69],TCC_EA0_ATOMIC[69],TCC_ATOMIC[70],TCC_BUBBLE[70],TCC_CYCLE[70],TCC_EA0_ATOMIC[70],TCC_ATOMIC[71],TCC_BUBBLE[71],TCC_CYCLE[71],TCC_EA0_ATOMIC[71],TCC_ATOMIC[72],TCC_BUBBLE[72],TCC_CYCLE[72],TCC_EA0_ATOMIC[72],TCC_ATOMIC[73],TCC_BUBBLE[73],TCC_CYCLE[73],TCC_EA0_ATOMIC[73],TCC_ATOMIC[74],TCC_BUBBLE[74],TCC_CYCLE[74],TCC_EA0_ATOMIC[74],TCC_ATOMIC[75],TCC_BUBBLE[75],TCC_CYCLE[75],TCC_EA0_ATOMIC[75],TCC_ATOMIC[76],TCC_BUBBLE[76],TCC_CYCLE[76],TCC_EA0_ATOMIC[76],TCC_ATOMIC[77],TCC_BUBBLE[77],TCC_CYCLE[77],TCC_EA0_ATOMIC[77],TCC_ATOMIC[78],TCC_BUBBLE[78],TCC_CYCLE[78],TCC_EA0_ATOMIC[78],TCC_ATOMIC[79],TCC_BUBBLE[79],TCC_CYCLE[79],TCC_EA0_ATOMIC[79],TCC_ATOMIC[80],TCC_BUBBLE[80],TCC_CYCLE[80],TCC_EA0_ATOMIC[80],TCC_ATOMIC[81],TCC_BUBBLE[81],TCC_CYCLE[81],TCC_EA0_ATOMIC[81],TCC_ATOMIC[82],TCC_BUBBLE[82],TCC_CYCLE[82],TCC_EA0_ATOMIC[82],TCC_ATOMIC[83],TCC_BUBBLE[83],TCC_CYCLE[83],TCC_EA0_ATOMIC[83],TCC_ATOMIC[84],TCC_BUBBLE[84],TCC_CYCLE[84],TCC_EA0_ATOMIC[84],TCC_ATOMIC[85],TCC_BUBBLE[85],TCC_CYCLE[85],TCC_EA0_ATOMIC[85],TCC_ATOMIC[86],TCC_BUBBLE[86],TCC_CYCLE[86],TCC_EA0_ATOMIC[86],TCC_ATOMIC[87],TCC_BUBBLE[87],TCC_CYCLE[87],TCC_EA0_ATOMIC[87],TCC_ATOMIC[88],TCC_BUBBLE[88],TCC_CYCLE[88],TCC_EA0_ATOMIC[88],TCC_ATOMIC[89],TCC_BUBBLE[89],TCC_CYCLE[89],TCC_EA0_ATOMIC[89],TCC_ATOMIC[90],TCC_BUBBLE[90],TCC_CYCLE[90],TCC_EA0_ATOMIC[90],TCC_ATOMIC[91],TCC_BUBBLE[91],TCC_CYCLE[91],TCC_EA0_ATOMIC[91],TCC_ATOMIC[92],TCC_BUBBLE[92],TCC_CYCLE[92],TCC_EA0_ATOMIC[92],TCC_ATOMIC[93],TCC_BUBBLE[93],TCC_CYCLE[93],TCC_EA0_ATOMIC[93],TCC_ATOMIC[94],TCC_BUBBLE[94],TCC_CYCLE[94],TCC_EA0_ATOMIC[94],TCC_ATOMIC[95],TCC_BUBBLE[95],TCC_CYCLE[95],TCC_EA0_ATOMIC[95],Wave_Size_9,Correlation_ID_9,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_10,Correlation_ID_10,SQC_TC_DATA_ATOMIC_REQ,SQC_TC_STALL,SQC_TC_REQ,SQC_DCACHE_REQ_READ_16,SQC_ICACHE_REQ,SQC_ICACHE_HITS,SQC_ICACHE_MISSES,SQC_ICACHE_MISSES_DUPLICATE,Wave_Size_11,Correlation_ID_11,SQ_INSTS_VALU_MFMA_MOPS_I8,SQ_INSTS_VALU_MFMA_MOPS_F16,SQ_INSTS_VALU_MFMA_MOPS_BF16,SQ_INSTS_VALU_MFMA_MOPS_F32,SQ_INSTS_VALU_MFMA_MOPS_F64,SQC_TC_INST_REQ,SQC_TC_DATA_READ_REQ,SQC_TC_DATA_WRITE_REQ,TCP_PENDING_STALL_CYCLES_sum,Wave_Size_12,Correlation_ID_12,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,TCC_EA0_ATOMIC_LEVEL_sum,TCC_EA0_RDREQ_LEVEL_sum,TCC_EA0_WRREQ_LEVEL_sum,TCC_EA0_WRREQ_STALL_sum,TCP_TCC_CC_ATOMIC_REQ_sum,TCP_TCC_RW_ATOMIC_REQ_sum,TCP_TCC_RW_READ_REQ_sum,TCP_TCC_RW_WRITE_REQ_sum,Wave_Size_13,Correlation_ID_13,SQC_DCACHE_REQ_READ_2,SQC_DCACHE_REQ_READ_4,Wave_Size_14,Correlation_ID_14,SQ_ACTIVE_INST_SCA,SQ_ACTIVE_INST_EXP_GDS,SQ_ACTIVE_INST_MISC,SQ_ACTIVE_INST_FLAT,SQ_INST_CYCLES_VMEM_WR,SQ_INST_CYCLES_VMEM_RD,SQ_INST_CYCLES_SMEM,SQ_INST_CYCLES_SALU,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,CPC_ME1_DC0_SPI_BUSY,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,TCC_BUBBLE_sum,TCC_EA0_RDREQ_32B_sum,TCC_EA0_RDREQ_sum,TCC_EA0_RD_UNCACHED_32B_sum,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,TCP_TCC_READ_REQ_sum,TCP_TCC_WRITE_REQ_sum,Wave_Size_15,Correlation_ID_15,XCC_Index_15,TCC_EA0_ATOMIC_LEVEL[0],TCC_EA0_RDREQ[0],TCC_EA0_RDREQ_32B[0],TCC_EA0_RDREQ_LEVEL[0],TCC_EA0_ATOMIC_LEVEL[1],TCC_EA0_RDREQ[1],TCC_EA0_RDREQ_32B[1],TCC_EA0_RDREQ_LEVEL[1],TCC_EA0_ATOMIC_LEVEL[2],TCC_EA0_RDREQ[2],TCC_EA0_RDREQ_32B[2],TCC_EA0_RDREQ_LEVEL[2],TCC_EA0_ATOMIC_LEVEL[3],TCC_EA0_RDREQ[3],TCC_EA0_RDREQ_32B[3],TCC_EA0_RDREQ_LEVEL[3],TCC_EA0_ATOMIC_LEVEL[4],TCC_EA0_RDREQ[4],TCC_EA0_RDREQ_32B[4],TCC_EA0_RDREQ_LEVEL[4],TCC_EA0_ATOMIC_LEVEL[5],TCC_EA0_RDREQ[5],TCC_EA0_RDREQ_32B[5],TCC_EA0_RDREQ_LEVEL[5],TCC_EA0_ATOMIC_LEVEL[6],TCC_EA0_RDREQ[6],TCC_EA0_RDREQ_32B[6],TCC_EA0_RDREQ_LEVEL[6],TCC_EA0_ATOMIC_LEVEL[7],TCC_EA0_RDREQ[7],TCC_EA0_RDREQ_32B[7],TCC_EA0_RDREQ_LEVEL[7],TCC_EA0_ATOMIC_LEVEL[8],TCC_EA0_RDREQ[8],TCC_EA0_RDREQ_32B[8],TCC_EA0_RDREQ_LEVEL[8],TCC_EA0_ATOMIC_LEVEL[9],TCC_EA0_RDREQ[9],TCC_EA0_RDREQ_32B[9],TCC_EA0_RDREQ_LEVEL[9],TCC_EA0_ATOMIC_LEVEL[10],TCC_EA0_RDREQ[10],TCC_EA0_RDREQ_32B[10],TCC_EA0_RDREQ_LEVEL[10],TCC_EA0_ATOMIC_LEVEL[11],TCC_EA0_RDREQ[11],TCC_EA0_RDREQ_32B[11],TCC_EA0_RDREQ_LEVEL[11],TCC_EA0_ATOMIC_LEVEL[12],TCC_EA0_RDREQ[12],TCC_EA0_RDREQ_32B[12],TCC_EA0_RDREQ_LEVEL[12],TCC_EA0_ATOMIC_LEVEL[13],TCC_EA0_RDREQ[13],TCC_EA0_RDREQ_32B[13],TCC_EA0_RDREQ_LEVEL[13],TCC_EA0_ATOMIC_LEVEL[14],TCC_EA0_RDREQ[14],TCC_EA0_RDREQ_32B[14],TCC_EA0_RDREQ_LEVEL[14],TCC_EA0_ATOMIC_LEVEL[15],TCC_EA0_RDREQ[15],TCC_EA0_RDREQ_32B[15],TCC_EA0_RDREQ_LEVEL[15],TCC_EA0_ATOMIC_LEVEL[16],TCC_EA0_RDREQ[16],TCC_EA0_RDREQ_32B[16],TCC_EA0_RDREQ_LEVEL[16],TCC_EA0_ATOMIC_LEVEL[17],TCC_EA0_RDREQ[17],TCC_EA0_RDREQ_32B[17],TCC_EA0_RDREQ_LEVEL[17],TCC_EA0_ATOMIC_LEVEL[18],TCC_EA0_RDREQ[18],TCC_EA0_RDREQ_32B[18],TCC_EA0_RDREQ_LEVEL[18],TCC_EA0_ATOMIC_LEVEL[19],TCC_EA0_RDREQ[19],TCC_EA0_RDREQ_32B[19],TCC_EA0_RDREQ_LEVEL[19],TCC_EA0_ATOMIC_LEVEL[20],TCC_EA0_RDREQ[20],TCC_EA0_RDREQ_32B[20],TCC_EA0_RDREQ_LEVEL[20],TCC_EA0_ATOMIC_LEVEL[21],TCC_EA0_RDREQ[21],TCC_EA0_RDREQ_32B[21],TCC_EA0_RDREQ_LEVEL[21],TCC_EA0_ATOMIC_LEVEL[22],TCC_EA0_RDREQ[22],TCC_EA0_RDREQ_32B[22],TCC_EA0_RDREQ_LEVEL[22],TCC_EA0_ATOMIC_LEVEL[23],TCC_EA0_RDREQ[23],TCC_EA0_RDREQ_32B[23],TCC_EA0_RDREQ_LEVEL[23],TCC_EA0_ATOMIC_LEVEL[24],TCC_EA0_RDREQ[24],TCC_EA0_RDREQ_32B[24],TCC_EA0_RDREQ_LEVEL[24],TCC_EA0_ATOMIC_LEVEL[25],TCC_EA0_RDREQ[25],TCC_EA0_RDREQ_32B[25],TCC_EA0_RDREQ_LEVEL[25],TCC_EA0_ATOMIC_LEVEL[26],TCC_EA0_RDREQ[26],TCC_EA0_RDREQ_32B[26],TCC_EA0_RDREQ_LEVEL[26],TCC_EA0_ATOMIC_LEVEL[27],TCC_EA0_RDREQ[27],TCC_EA0_RDREQ_32B[27],TCC_EA0_RDREQ_LEVEL[27],TCC_EA0_ATOMIC_LEVEL[28],TCC_EA0_RDREQ[28],TCC_EA0_RDREQ_32B[28],TCC_EA0_RDREQ_LEVEL[28],TCC_EA0_ATOMIC_LEVEL[29],TCC_EA0_RDREQ[29],TCC_EA0_RDREQ_32B[29],TCC_EA0_RDREQ_LEVEL[29],TCC_EA0_ATOMIC_LEVEL[30],TCC_EA0_RDREQ[30],TCC_EA0_RDREQ_32B[30],TCC_EA0_RDREQ_LEVEL[30],TCC_EA0_ATOMIC_LEVEL[31],TCC_EA0_RDREQ[31],TCC_EA0_RDREQ_32B[31],TCC_EA0_RDREQ_LEVEL[31],TCC_EA0_ATOMIC_LEVEL[32],TCC_EA0_RDREQ[32],TCC_EA0_RDREQ_32B[32],TCC_EA0_RDREQ_LEVEL[32],TCC_EA0_ATOMIC_LEVEL[33],TCC_EA0_RDREQ[33],TCC_EA0_RDREQ_32B[33],TCC_EA0_RDREQ_LEVEL[33],TCC_EA0_ATOMIC_LEVEL[34],TCC_EA0_RDREQ[34],TCC_EA0_RDREQ_32B[34],TCC_EA0_RDREQ_LEVEL[34],TCC_EA0_ATOMIC_LEVEL[35],TCC_EA0_RDREQ[35],TCC_EA0_RDREQ_32B[35],TCC_EA0_RDREQ_LEVEL[35],TCC_EA0_ATOMIC_LEVEL[36],TCC_EA0_RDREQ[36],TCC_EA0_RDREQ_32B[36],TCC_EA0_RDREQ_LEVEL[36],TCC_EA0_ATOMIC_LEVEL[37],TCC_EA0_RDREQ[37],TCC_EA0_RDREQ_32B[37],TCC_EA0_RDREQ_LEVEL[37],TCC_EA0_ATOMIC_LEVEL[38],TCC_EA0_RDREQ[38],TCC_EA0_RDREQ_32B[38],TCC_EA0_RDREQ_LEVEL[38],TCC_EA0_ATOMIC_LEVEL[39],TCC_EA0_RDREQ[39],TCC_EA0_RDREQ_32B[39],TCC_EA0_RDREQ_LEVEL[39],TCC_EA0_ATOMIC_LEVEL[40],TCC_EA0_RDREQ[40],TCC_EA0_RDREQ_32B[40],TCC_EA0_RDREQ_LEVEL[40],TCC_EA0_ATOMIC_LEVEL[41],TCC_EA0_RDREQ[41],TCC_EA0_RDREQ_32B[41],TCC_EA0_RDREQ_LEVEL[41],TCC_EA0_ATOMIC_LEVEL[42],TCC_EA0_RDREQ[42],TCC_EA0_RDREQ_32B[42],TCC_EA0_RDREQ_LEVEL[42],TCC_EA0_ATOMIC_LEVEL[43],TCC_EA0_RDREQ[43],TCC_EA0_RDREQ_32B[43],TCC_EA0_RDREQ_LEVEL[43],TCC_EA0_ATOMIC_LEVEL[44],TCC_EA0_RDREQ[44],TCC_EA0_RDREQ_32B[44],TCC_EA0_RDREQ_LEVEL[44],TCC_EA0_ATOMIC_LEVEL[45],TCC_EA0_RDREQ[45],TCC_EA0_RDREQ_32B[45],TCC_EA0_RDREQ_LEVEL[45],TCC_EA0_ATOMIC_LEVEL[46],TCC_EA0_RDREQ[46],TCC_EA0_RDREQ_32B[46],TCC_EA0_RDREQ_LEVEL[46],TCC_EA0_ATOMIC_LEVEL[47],TCC_EA0_RDREQ[47],TCC_EA0_RDREQ_32B[47],TCC_EA0_RDREQ_LEVEL[47],TCC_EA0_ATOMIC_LEVEL[48],TCC_EA0_RDREQ[48],TCC_EA0_RDREQ_32B[48],TCC_EA0_RDREQ_LEVEL[48],TCC_EA0_ATOMIC_LEVEL[49],TCC_EA0_RDREQ[49],TCC_EA0_RDREQ_32B[49],TCC_EA0_RDREQ_LEVEL[49],TCC_EA0_ATOMIC_LEVEL[50],TCC_EA0_RDREQ[50],TCC_EA0_RDREQ_32B[50],TCC_EA0_RDREQ_LEVEL[50],TCC_EA0_ATOMIC_LEVEL[51],TCC_EA0_RDREQ[51],TCC_EA0_RDREQ_32B[51],TCC_EA0_RDREQ_LEVEL[51],TCC_EA0_ATOMIC_LEVEL[52],TCC_EA0_RDREQ[52],TCC_EA0_RDREQ_32B[52],TCC_EA0_RDREQ_LEVEL[52],TCC_EA0_ATOMIC_LEVEL[53],TCC_EA0_RDREQ[53],TCC_EA0_RDREQ_32B[53],TCC_EA0_RDREQ_LEVEL[53],TCC_EA0_ATOMIC_LEVEL[54],TCC_EA0_RDREQ[54],TCC_EA0_RDREQ_32B[54],TCC_EA0_RDREQ_LEVEL[54],TCC_EA0_ATOMIC_LEVEL[55],TCC_EA0_RDREQ[55],TCC_EA0_RDREQ_32B[55],TCC_EA0_RDREQ_LEVEL[55],TCC_EA0_ATOMIC_LEVEL[56],TCC_EA0_RDREQ[56],TCC_EA0_RDREQ_32B[56],TCC_EA0_RDREQ_LEVEL[56],TCC_EA0_ATOMIC_LEVEL[57],TCC_EA0_RDREQ[57],TCC_EA0_RDREQ_32B[57],TCC_EA0_RDREQ_LEVEL[57],TCC_EA0_ATOMIC_LEVEL[58],TCC_EA0_RDREQ[58],TCC_EA0_RDREQ_32B[58],TCC_EA0_RDREQ_LEVEL[58],TCC_EA0_ATOMIC_LEVEL[59],TCC_EA0_RDREQ[59],TCC_EA0_RDREQ_32B[59],TCC_EA0_RDREQ_LEVEL[59],TCC_EA0_ATOMIC_LEVEL[60],TCC_EA0_RDREQ[60],TCC_EA0_RDREQ_32B[60],TCC_EA0_RDREQ_LEVEL[60],TCC_EA0_ATOMIC_LEVEL[61],TCC_EA0_RDREQ[61],TCC_EA0_RDREQ_32B[61],TCC_EA0_RDREQ_LEVEL[61],TCC_EA0_ATOMIC_LEVEL[62],TCC_EA0_RDREQ[62],TCC_EA0_RDREQ_32B[62],TCC_EA0_RDREQ_LEVEL[62],TCC_EA0_ATOMIC_LEVEL[63],TCC_EA0_RDREQ[63],TCC_EA0_RDREQ_32B[63],TCC_EA0_RDREQ_LEVEL[63],TCC_EA0_ATOMIC_LEVEL[64],TCC_EA0_RDREQ[64],TCC_EA0_RDREQ_32B[64],TCC_EA0_RDREQ_LEVEL[64],TCC_EA0_ATOMIC_LEVEL[65],TCC_EA0_RDREQ[65],TCC_EA0_RDREQ_32B[65],TCC_EA0_RDREQ_LEVEL[65],TCC_EA0_ATOMIC_LEVEL[66],TCC_EA0_RDREQ[66],TCC_EA0_RDREQ_32B[66],TCC_EA0_RDREQ_LEVEL[66],TCC_EA0_ATOMIC_LEVEL[67],TCC_EA0_RDREQ[67],TCC_EA0_RDREQ_32B[67],TCC_EA0_RDREQ_LEVEL[67],TCC_EA0_ATOMIC_LEVEL[68],TCC_EA0_RDREQ[68],TCC_EA0_RDREQ_32B[68],TCC_EA0_RDREQ_LEVEL[68],TCC_EA0_ATOMIC_LEVEL[69],TCC_EA0_RDREQ[69],TCC_EA0_RDREQ_32B[69],TCC_EA0_RDREQ_LEVEL[69],TCC_EA0_ATOMIC_LEVEL[70],TCC_EA0_RDREQ[70],TCC_EA0_RDREQ_32B[70],TCC_EA0_RDREQ_LEVEL[70],TCC_EA0_ATOMIC_LEVEL[71],TCC_EA0_RDREQ[71],TCC_EA0_RDREQ_32B[71],TCC_EA0_RDREQ_LEVEL[71],TCC_EA0_ATOMIC_LEVEL[72],TCC_EA0_RDREQ[72],TCC_EA0_RDREQ_32B[72],TCC_EA0_RDREQ_LEVEL[72],TCC_EA0_ATOMIC_LEVEL[73],TCC_EA0_RDREQ[73],TCC_EA0_RDREQ_32B[73],TCC_EA0_RDREQ_LEVEL[73],TCC_EA0_ATOMIC_LEVEL[74],TCC_EA0_RDREQ[74],TCC_EA0_RDREQ_32B[74],TCC_EA0_RDREQ_LEVEL[74],TCC_EA0_ATOMIC_LEVEL[75],TCC_EA0_RDREQ[75],TCC_EA0_RDREQ_32B[75],TCC_EA0_RDREQ_LEVEL[75],TCC_EA0_ATOMIC_LEVEL[76],TCC_EA0_RDREQ[76],TCC_EA0_RDREQ_32B[76],TCC_EA0_RDREQ_LEVEL[76],TCC_EA0_ATOMIC_LEVEL[77],TCC_EA0_RDREQ[77],TCC_EA0_RDREQ_32B[77],TCC_EA0_RDREQ_LEVEL[77],TCC_EA0_ATOMIC_LEVEL[78],TCC_EA0_RDREQ[78],TCC_EA0_RDREQ_32B[78],TCC_EA0_RDREQ_LEVEL[78],TCC_EA0_ATOMIC_LEVEL[79],TCC_EA0_RDREQ[79],TCC_EA0_RDREQ_32B[79],TCC_EA0_RDREQ_LEVEL[79],TCC_EA0_ATOMIC_LEVEL[80],TCC_EA0_RDREQ[80],TCC_EA0_RDREQ_32B[80],TCC_EA0_RDREQ_LEVEL[80],TCC_EA0_ATOMIC_LEVEL[81],TCC_EA0_RDREQ[81],TCC_EA0_RDREQ_32B[81],TCC_EA0_RDREQ_LEVEL[81],TCC_EA0_ATOMIC_LEVEL[82],TCC_EA0_RDREQ[82],TCC_EA0_RDREQ_32B[82],TCC_EA0_RDREQ_LEVEL[82],TCC_EA0_ATOMIC_LEVEL[83],TCC_EA0_RDREQ[83],TCC_EA0_RDREQ_32B[83],TCC_EA0_RDREQ_LEVEL[83],TCC_EA0_ATOMIC_LEVEL[84],TCC_EA0_RDREQ[84],TCC_EA0_RDREQ_32B[84],TCC_EA0_RDREQ_LEVEL[84],TCC_EA0_ATOMIC_LEVEL[85],TCC_EA0_RDREQ[85],TCC_EA0_RDREQ_32B[85],TCC_EA0_RDREQ_LEVEL[85],TCC_EA0_ATOMIC_LEVEL[86],TCC_EA0_RDREQ[86],TCC_EA0_RDREQ_32B[86],TCC_EA0_RDREQ_LEVEL[86],TCC_EA0_ATOMIC_LEVEL[87],TCC_EA0_RDREQ[87],TCC_EA0_RDREQ_32B[87],TCC_EA0_RDREQ_LEVEL[87],TCC_EA0_ATOMIC_LEVEL[88],TCC_EA0_RDREQ[88],TCC_EA0_RDREQ_32B[88],TCC_EA0_RDREQ_LEVEL[88],TCC_EA0_ATOMIC_LEVEL[89],TCC_EA0_RDREQ[89],TCC_EA0_RDREQ_32B[89],TCC_EA0_RDREQ_LEVEL[89],TCC_EA0_ATOMIC_LEVEL[90],TCC_EA0_RDREQ[90],TCC_EA0_RDREQ_32B[90],TCC_EA0_RDREQ_LEVEL[90],TCC_EA0_ATOMIC_LEVEL[91],TCC_EA0_RDREQ[91],TCC_EA0_RDREQ_32B[91],TCC_EA0_RDREQ_LEVEL[91],TCC_EA0_ATOMIC_LEVEL[92],TCC_EA0_RDREQ[92],TCC_EA0_RDREQ_32B[92],TCC_EA0_RDREQ_LEVEL[92],TCC_EA0_ATOMIC_LEVEL[93],TCC_EA0_RDREQ[93],TCC_EA0_RDREQ_32B[93],TCC_EA0_RDREQ_LEVEL[93],TCC_EA0_ATOMIC_LEVEL[94],TCC_EA0_RDREQ[94],TCC_EA0_RDREQ_32B[94],TCC_EA0_RDREQ_LEVEL[94],TCC_EA0_ATOMIC_LEVEL[95],TCC_EA0_RDREQ[95],TCC_EA0_RDREQ_32B[95],TCC_EA0_RDREQ_LEVEL[95],Wave_Size_16,Correlation_ID_16,SQ_INSTS_VMEM,SQ_INSTS_SALU,SQ_INSTS_VSKIPPED,SQ_INSTS,SQ_INSTS_VALU,SQ_INSTS_VALU_ADD_F16,SQ_INSTS_VALU_MUL_F16,SQ_INSTS_VALU_FMA_F16,GRBM_SPI_BUSY,SPI_CSN_NUM_THREADGROUPS,SPI_CSN_WAVE,CPC_CPC_TCIU_BUSY,CPC_CPC_TCIU_IDLE,CPF_CPF_TCIU_BUSY,CPF_CPF_TCIU_STALL,TA_BUFFER_READ_WAVEFRONTS_sum,TA_BUFFER_WRITE_WAVEFRONTS_sum,TCC_CC_REQ_sum,TCC_NC_REQ_sum,TCC_RW_REQ_sum,TCC_UC_REQ_sum,TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum,TCP_READ_TAGCONFLICT_STALL_CYCLES_sum,TCP_TA_TCP_STATE_READ_sum,TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum,TD_LOAD_WAVEFRONT_sum,TD_SPI_STALL_sum,Wave_Size_17,Correlation_ID_17,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_BUSY_CU_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_INSTS_VALU_CVT,SQ_INSTS_VMEM_WR,SQ_INSTS_VMEM_RD,GRBM_COUNT,GRBM_GUI_ACTIVE,SPI_CSN_WINDOW_VALID,SPI_CSN_BUSY,CPC_CPC_STAT_BUSY,CPC_CPC_STAT_IDLE,CPF_CPF_STAT_BUSY,CPF_CPF_STAT_STALL,TA_BUFFER_WAVEFRONTS_sum,TA_TA_BUSY_sum,TCC_BUSY_sum,TCC_CYCLE_sum,TCC_PROBE_ALL_sum,TCC_PROBE_sum,TCP_GATE_EN1_sum,TCP_GATE_EN2_sum,TCP_TCR_TCP_STALL_CYCLES_sum,TCP_TD_TCP_STALL_CYCLES_sum,TD_TC_STALL_sum,TD_TD_BUSY_sum,Start_Timestamp,End_Timestamp
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diff --git a/tests/workloads/join_type_kernel/MI300A_A1/sysinfo.csv b/tests/workloads/join_type_kernel/MI300A_A1/sysinfo.csv
new file mode 100644
index 0000000000..9f2958e717
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300A_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+join_type_kernel,./tests/vcopy -n 1048576 -b 256 -i 3,SQ|LDS|SQC|TA|TD|TCP|TCC|SPI|CPC|CPF,Wed 29 May 2024 01:30:58 PM  (CDT),2,sh5-1w300-rg3-3,AMD Instinct MI300A Accelerator,"American Megatrends International, LLC.RMO1002DS",Ubuntu 22.04.2 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,131174852,,6.1.2-110,N/A,SPX,NPS1,MI300A_A1,gfx942,32,24576,228,4,24,64,1024,32,2100,1300,2100,1300,96,32,120,4,5324.8,6
diff --git a/tests/workloads/join_type_kernel/MI300A_A1/timestamps.csv b/tests/workloads/join_type_kernel/MI300A_A1/timestamps.csv
new file mode 100644
index 0000000000..4c3ec8ca1a
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300A_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,11995,1,143012,143012,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73335731255741,73335731263472,0
+3,11995,1,143012,143012,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73335731301410,73335731307379,0
+2,11995,1,143012,143012,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73335731280057,73335731285866,0
diff --git a/tests/workloads/join_type_kernel/MI300X_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/join_type_kernel/MI300X_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..149b75176b
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300X_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,60633,1,960924,960924,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716045124943676,716045124959076,0,406071.0,406071.0,16384.0,65536.0,32127.0,2577980.0
+1,60633,1,960924,960924,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716045124980274,716045124992914,0,396936.0,396936.0,16384.0,65536.0,13175.0,1048576.0
+2,60633,1,960924,960924,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716045125012633,716045125024713,0,375918.0,375918.0,16384.0,65536.0,13233.0,1048580.0
diff --git a/tests/workloads/join_type_kernel/MI300X_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/join_type_kernel/MI300X_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..3564e23496
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300X_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,60633,1,960948,960948,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716045124943676,716045124959076,0,0.0,0.0,0.0
+1,60633,1,960948,960948,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716045124980274,716045124992914,0,0.0,0.0,0.0
+2,60633,1,960948,960948,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716045125012633,716045125024713,0,0.0,0.0,0.0
diff --git a/tests/workloads/join_type_kernel/MI300X_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/join_type_kernel/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..d50e3ae360
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,960961,960961,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716045124943676,716045124959076,0,65536.0,3794316.0,303556200.0
+1,60633,1,960961,960961,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716045124980274,716045124992914,0,65536.0,3872306.0,309778040.0
+2,60633,1,960961,960961,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716045125012633,716045125024713,0,65536.0,3626488.0,290109656.0
diff --git a/tests/workloads/join_type_kernel/MI300X_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/join_type_kernel/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..99d042ed81
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,960975,960975,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716045124943676,716045124959076,0,32768.0,495113.0,39604312.0
+1,60633,1,960975,960975,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716045124980274,716045124992914,0,32768.0,396526.0,31714328.0
+2,60633,1,960975,960975,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716045125012633,716045125024713,0,32768.0,383912.0,30715136.0
diff --git a/tests/workloads/join_type_kernel/MI300X_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/join_type_kernel/MI300X_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..f96d1d3f52
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300X_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,60633,1,960997,960997,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716045124943676,716045124959076,0,460469.0,460469.0,260908.0,1841876.0,16384.0,37639817.0,617003.0,0.0,150907392.0
+1,60633,1,960997,960997,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716045124980274,716045124992914,0,429037.0,429037.0,250401.0,1716148.0,16384.0,31149428.0,507804.0,0.0,124952496.0
+2,60633,1,960997,960997,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716045125012633,716045125024713,0,364536.0,364536.0,185656.0,1458144.0,16384.0,31310430.0,506707.0,0.0,125600672.0
diff --git a/tests/workloads/join_type_kernel/MI300X_A1/log.txt b/tests/workloads/join_type_kernel/MI300X_A1/log.txt
new file mode 100644
index 0000000000..a123653ebf
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300X_A1/log.txt
@@ -0,0 +1,173 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/join_type_kernel/MI300X_A1
+Target: MI300X_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: None
+Hardware Blocks: All
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_REQ
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_HITS
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_13.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[0]
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_14.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[1]
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_15.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[0]
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_16.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[1]
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_17.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[0]
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F32
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_FLAT
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_ANY
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_SCA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_MISC
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_THREAD_CYCLES_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ADDR_CONFLICT
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F16
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_INST_REQ
+[profiling] Current input file: tests/workloads/join_type_kernel/MI300X_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/join_type_kernel/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..293092f641
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..08439eedce
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..6cca322d4e
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..e527ad31ba
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..3f8e04adb3
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_0.txt b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..ebc550fbfe
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD GRBM_COUNT GRBM_GUI_ACTIVE TCP_GATE_EN1_sum TCP_GATE_EN2_sum TCP_TD_TCP_STALL_CYCLES_sum TCP_TCR_TCP_STALL_CYCLES_sum TA_TA_BUSY_sum TA_BUFFER_WAVEFRONTS_sum TD_TD_BUSY_sum TD_TC_STALL_sum SPI_CSN_WINDOW_VALID SPI_CSN_BUSY CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE CPF_CPF_STAT_BUSY CPF_CPF_STAT_STALL TCC_CYCLE_sum TCC_BUSY_sum TCC_PROBE_sum TCC_PROBE_ALL_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_1.txt b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..9ad887ddbb
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 GRBM_SPI_BUSY TCP_READ_TAGCONFLICT_STALL_CYCLES_sum TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum TCP_TA_TCP_STATE_READ_sum TA_BUFFER_READ_WAVEFRONTS_sum TA_BUFFER_WRITE_WAVEFRONTS_sum TD_SPI_STALL_sum TD_LOAD_WAVEFRONT_sum SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE CPC_CPC_TCIU_BUSY CPC_CPC_TCIU_IDLE CPF_CPF_TCIU_BUSY CPF_CPF_TCIU_STALL TCC_NC_REQ_sum TCC_UC_REQ_sum TCC_CC_REQ_sum TCC_RW_REQ_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_10.txt b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..21c59688f7
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_11.txt b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..df6d67d7b7
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_12.txt b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..6e5320c11c
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_13.txt b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_13.txt
new file mode 100644
index 0000000000..d95492c1cd
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_13.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_ATOMIC[0] TCC_BUBBLE[0] TCC_CYCLE[0] TCC_EA0_ATOMIC[0] TCC_ATOMIC[1] TCC_BUBBLE[1] TCC_CYCLE[1] TCC_EA0_ATOMIC[1] TCC_ATOMIC[2] TCC_BUBBLE[2] TCC_CYCLE[2] TCC_EA0_ATOMIC[2] TCC_ATOMIC[3] TCC_BUBBLE[3] TCC_CYCLE[3] TCC_EA0_ATOMIC[3] TCC_ATOMIC[4] TCC_BUBBLE[4] TCC_CYCLE[4] TCC_EA0_ATOMIC[4] TCC_ATOMIC[5] TCC_BUBBLE[5] TCC_CYCLE[5] TCC_EA0_ATOMIC[5] TCC_ATOMIC[6] TCC_BUBBLE[6] TCC_CYCLE[6] TCC_EA0_ATOMIC[6] TCC_ATOMIC[7] TCC_BUBBLE[7] TCC_CYCLE[7] TCC_EA0_ATOMIC[7] TCC_ATOMIC[8] TCC_BUBBLE[8] TCC_CYCLE[8] TCC_EA0_ATOMIC[8] TCC_ATOMIC[9] TCC_BUBBLE[9] TCC_CYCLE[9] TCC_EA0_ATOMIC[9] TCC_ATOMIC[10] TCC_BUBBLE[10] TCC_CYCLE[10] TCC_EA0_ATOMIC[10] TCC_ATOMIC[11] TCC_BUBBLE[11] TCC_CYCLE[11] TCC_EA0_ATOMIC[11] TCC_ATOMIC[12] TCC_BUBBLE[12] TCC_CYCLE[12] TCC_EA0_ATOMIC[12] TCC_ATOMIC[13] TCC_BUBBLE[13] TCC_CYCLE[13] TCC_EA0_ATOMIC[13] TCC_ATOMIC[14] TCC_BUBBLE[14] TCC_CYCLE[14] TCC_EA0_ATOMIC[14] TCC_ATOMIC[15] TCC_BUBBLE[15] TCC_CYCLE[15] TCC_EA0_ATOMIC[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_14.txt b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_14.txt
new file mode 100644
index 0000000000..28327b86d3
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_14.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_ATOMIC_LEVEL[0] TCC_EA0_RDREQ[0] TCC_EA0_RDREQ_32B[0] TCC_EA0_RDREQ_LEVEL[0] TCC_EA0_ATOMIC_LEVEL[1] TCC_EA0_RDREQ[1] TCC_EA0_RDREQ_32B[1] TCC_EA0_RDREQ_LEVEL[1] TCC_EA0_ATOMIC_LEVEL[2] TCC_EA0_RDREQ[2] TCC_EA0_RDREQ_32B[2] TCC_EA0_RDREQ_LEVEL[2] TCC_EA0_ATOMIC_LEVEL[3] TCC_EA0_RDREQ[3] TCC_EA0_RDREQ_32B[3] TCC_EA0_RDREQ_LEVEL[3] TCC_EA0_ATOMIC_LEVEL[4] TCC_EA0_RDREQ[4] TCC_EA0_RDREQ_32B[4] TCC_EA0_RDREQ_LEVEL[4] TCC_EA0_ATOMIC_LEVEL[5] TCC_EA0_RDREQ[5] TCC_EA0_RDREQ_32B[5] TCC_EA0_RDREQ_LEVEL[5] TCC_EA0_ATOMIC_LEVEL[6] TCC_EA0_RDREQ[6] TCC_EA0_RDREQ_32B[6] TCC_EA0_RDREQ_LEVEL[6] TCC_EA0_ATOMIC_LEVEL[7] TCC_EA0_RDREQ[7] TCC_EA0_RDREQ_32B[7] TCC_EA0_RDREQ_LEVEL[7] TCC_EA0_ATOMIC_LEVEL[8] TCC_EA0_RDREQ[8] TCC_EA0_RDREQ_32B[8] TCC_EA0_RDREQ_LEVEL[8] TCC_EA0_ATOMIC_LEVEL[9] TCC_EA0_RDREQ[9] TCC_EA0_RDREQ_32B[9] TCC_EA0_RDREQ_LEVEL[9] TCC_EA0_ATOMIC_LEVEL[10] TCC_EA0_RDREQ[10] TCC_EA0_RDREQ_32B[10] TCC_EA0_RDREQ_LEVEL[10] TCC_EA0_ATOMIC_LEVEL[11] TCC_EA0_RDREQ[11] TCC_EA0_RDREQ_32B[11] TCC_EA0_RDREQ_LEVEL[11] TCC_EA0_ATOMIC_LEVEL[12] TCC_EA0_RDREQ[12] TCC_EA0_RDREQ_32B[12] TCC_EA0_RDREQ_LEVEL[12] TCC_EA0_ATOMIC_LEVEL[13] TCC_EA0_RDREQ[13] TCC_EA0_RDREQ_32B[13] TCC_EA0_RDREQ_LEVEL[13] TCC_EA0_ATOMIC_LEVEL[14] TCC_EA0_RDREQ[14] TCC_EA0_RDREQ_32B[14] TCC_EA0_RDREQ_LEVEL[14] TCC_EA0_ATOMIC_LEVEL[15] TCC_EA0_RDREQ[15] TCC_EA0_RDREQ_32B[15] TCC_EA0_RDREQ_LEVEL[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_15.txt b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_15.txt
new file mode 100644
index 0000000000..033ae877ed
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_15.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_WRREQ[0] TCC_EA0_WRREQ_64B[0] TCC_EA0_WRREQ_LEVEL[0] TCC_HIT[0] TCC_EA0_WRREQ[1] TCC_EA0_WRREQ_64B[1] TCC_EA0_WRREQ_LEVEL[1] TCC_HIT[1] TCC_EA0_WRREQ[2] TCC_EA0_WRREQ_64B[2] TCC_EA0_WRREQ_LEVEL[2] TCC_HIT[2] TCC_EA0_WRREQ[3] TCC_EA0_WRREQ_64B[3] TCC_EA0_WRREQ_LEVEL[3] TCC_HIT[3] TCC_EA0_WRREQ[4] TCC_EA0_WRREQ_64B[4] TCC_EA0_WRREQ_LEVEL[4] TCC_HIT[4] TCC_EA0_WRREQ[5] TCC_EA0_WRREQ_64B[5] TCC_EA0_WRREQ_LEVEL[5] TCC_HIT[5] TCC_EA0_WRREQ[6] TCC_EA0_WRREQ_64B[6] TCC_EA0_WRREQ_LEVEL[6] TCC_HIT[6] TCC_EA0_WRREQ[7] TCC_EA0_WRREQ_64B[7] TCC_EA0_WRREQ_LEVEL[7] TCC_HIT[7] TCC_EA0_WRREQ[8] TCC_EA0_WRREQ_64B[8] TCC_EA0_WRREQ_LEVEL[8] TCC_HIT[8] TCC_EA0_WRREQ[9] TCC_EA0_WRREQ_64B[9] TCC_EA0_WRREQ_LEVEL[9] TCC_HIT[9] TCC_EA0_WRREQ[10] TCC_EA0_WRREQ_64B[10] TCC_EA0_WRREQ_LEVEL[10] TCC_HIT[10] TCC_EA0_WRREQ[11] TCC_EA0_WRREQ_64B[11] TCC_EA0_WRREQ_LEVEL[11] TCC_HIT[11] TCC_EA0_WRREQ[12] TCC_EA0_WRREQ_64B[12] TCC_EA0_WRREQ_LEVEL[12] TCC_HIT[12] TCC_EA0_WRREQ[13] TCC_EA0_WRREQ_64B[13] TCC_EA0_WRREQ_LEVEL[13] TCC_HIT[13] TCC_EA0_WRREQ[14] TCC_EA0_WRREQ_64B[14] TCC_EA0_WRREQ_LEVEL[14] TCC_HIT[14] TCC_EA0_WRREQ[15] TCC_EA0_WRREQ_64B[15] TCC_EA0_WRREQ_LEVEL[15] TCC_HIT[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_16.txt b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_16.txt
new file mode 100644
index 0000000000..123269c3f9
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_16.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_MISS[0] TCC_READ[0] TCC_REQ[0] TCC_RW_REQ[0] TCC_MISS[1] TCC_READ[1] TCC_REQ[1] TCC_RW_REQ[1] TCC_MISS[2] TCC_READ[2] TCC_REQ[2] TCC_RW_REQ[2] TCC_MISS[3] TCC_READ[3] TCC_REQ[3] TCC_RW_REQ[3] TCC_MISS[4] TCC_READ[4] TCC_REQ[4] TCC_RW_REQ[4] TCC_MISS[5] TCC_READ[5] TCC_REQ[5] TCC_RW_REQ[5] TCC_MISS[6] TCC_READ[6] TCC_REQ[6] TCC_RW_REQ[6] TCC_MISS[7] TCC_READ[7] TCC_REQ[7] TCC_RW_REQ[7] TCC_MISS[8] TCC_READ[8] TCC_REQ[8] TCC_RW_REQ[8] TCC_MISS[9] TCC_READ[9] TCC_REQ[9] TCC_RW_REQ[9] TCC_MISS[10] TCC_READ[10] TCC_REQ[10] TCC_RW_REQ[10] TCC_MISS[11] TCC_READ[11] TCC_REQ[11] TCC_RW_REQ[11] TCC_MISS[12] TCC_READ[12] TCC_REQ[12] TCC_RW_REQ[12] TCC_MISS[13] TCC_READ[13] TCC_REQ[13] TCC_RW_REQ[13] TCC_MISS[14] TCC_READ[14] TCC_REQ[14] TCC_RW_REQ[14] TCC_MISS[15] TCC_READ[15] TCC_REQ[15] TCC_RW_REQ[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_17.txt b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_17.txt
new file mode 100644
index 0000000000..102fb795bd
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_17.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_TAG_STALL[0] TCC_TOO_MANY_EA_WRREQS_STALL[0] TCC_WRITE[0] TCC_TAG_STALL[1] TCC_TOO_MANY_EA_WRREQS_STALL[1] TCC_WRITE[1] TCC_TAG_STALL[2] TCC_TOO_MANY_EA_WRREQS_STALL[2] TCC_WRITE[2] TCC_TAG_STALL[3] TCC_TOO_MANY_EA_WRREQS_STALL[3] TCC_WRITE[3] TCC_TAG_STALL[4] TCC_TOO_MANY_EA_WRREQS_STALL[4] TCC_WRITE[4] TCC_TAG_STALL[5] TCC_TOO_MANY_EA_WRREQS_STALL[5] TCC_WRITE[5] TCC_TAG_STALL[6] TCC_TOO_MANY_EA_WRREQS_STALL[6] TCC_WRITE[6] TCC_TAG_STALL[7] TCC_TOO_MANY_EA_WRREQS_STALL[7] TCC_WRITE[7] TCC_TAG_STALL[8] TCC_TOO_MANY_EA_WRREQS_STALL[8] TCC_WRITE[8] TCC_TAG_STALL[9] TCC_TOO_MANY_EA_WRREQS_STALL[9] TCC_WRITE[9] TCC_TAG_STALL[10] TCC_TOO_MANY_EA_WRREQS_STALL[10] TCC_WRITE[10] TCC_TAG_STALL[11] TCC_TOO_MANY_EA_WRREQS_STALL[11] TCC_WRITE[11] TCC_TAG_STALL[12] TCC_TOO_MANY_EA_WRREQS_STALL[12] TCC_WRITE[12] TCC_TAG_STALL[13] TCC_TOO_MANY_EA_WRREQS_STALL[13] TCC_WRITE[13] TCC_TAG_STALL[14] TCC_TOO_MANY_EA_WRREQS_STALL[14] TCC_WRITE[14] TCC_TAG_STALL[15] TCC_TOO_MANY_EA_WRREQS_STALL[15] TCC_WRITE[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_2.txt b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..8ff8201c5a
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 TCP_VOLATILE_sum TCP_TOTAL_ACCESSES_sum TCP_TOTAL_READ_sum TCP_TOTAL_WRITE_sum TA_BUFFER_ATOMIC_WAVEFRONTS_sum TA_BUFFER_TOTAL_CYCLES_sum TD_ATOMIC_WAVEFRONT_sum TD_STORE_WAVEFRONT_sum SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION CPF_CPF_STAT_IDLE CPF_CPF_TCIU_IDLE TCC_REQ_sum TCC_STREAMING_REQ_sum TCC_HIT_sum TCC_MISS_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_3.txt b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..cb10e4801d
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS TCP_TOTAL_ATOMIC_WITH_RET_sum TCP_TOTAL_ATOMIC_WITHOUT_RET_sum TCP_TOTAL_WRITEBACK_INVALIDATES_sum TCP_TOTAL_CACHE_ACCESSES_sum TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES_sum TD_COALESCABLE_WAVEFRONT_sum SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE CPF_CMP_UTCL1_STALL_ON_TRANSLATION TCC_READ_sum TCC_WRITE_sum TCC_ATOMIC_sum TCC_WRITEBACK_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_4.txt b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..e4e6069e38
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAIT_ANY SQ_WAIT_INST_ANY SQ_ACTIVE_INST_ANY SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU TCP_UTCL1_TRANSLATION_MISS_sum TCP_UTCL1_TRANSLATION_HIT_sum TCP_UTCL1_PERMISSION_MISS_sum TCP_UTCL1_REQUEST_sum TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_TOTAL_WAVEFRONTS_sum SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE TCC_EA0_WRREQ_sum TCC_EA0_WRREQ_64B_sum TCC_EA0_WR_UNCACHED_32B_sum TCC_EA0_WRREQ_DRAM_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_5.txt b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..77bd288232
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_SCA SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU TCP_TCC_READ_REQ_sum TCP_TCC_WRITE_REQ_sum TCP_TCC_ATOMIC_WITH_RET_REQ_sum TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN CPC_ME1_DC0_SPI_BUSY TCC_EA0_RDREQ_sum TCC_EA0_RDREQ_32B_sum TCC_BUBBLE_sum TCC_EA0_RD_UNCACHED_32B_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_6.txt b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..609c184df8
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_THREAD_CYCLES_VALU SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 TCP_TCC_NC_READ_REQ_sum TCP_TCC_NC_WRITE_REQ_sum TCP_TCC_NC_ATOMIC_REQ_sum TCP_TCC_UC_READ_REQ_sum TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN TCC_EA0_RDREQ_DRAM_sum TCC_TAG_STALL_sum TCC_NORMAL_WRITEBACK_sum TCC_ALL_TC_OP_WB_WRITEBACK_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_7.txt b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..5881e5fb8f
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED TCP_TCC_UC_WRITE_REQ_sum TCP_TCC_UC_ATOMIC_REQ_sum TCP_TCC_CC_READ_REQ_sum TCP_TCC_CC_WRITE_REQ_sum TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR TCC_NORMAL_EVICT_sum TCC_ALL_TC_OP_INV_EVICT_sum TCC_TOO_MANY_EA_WRREQS_STALL_sum TCC_EA0_ATOMIC_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_8.txt b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..66317384f5
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES TCP_TCC_CC_ATOMIC_REQ_sum TCP_TCC_RW_READ_REQ_sum TCP_TCC_RW_WRITE_REQ_sum TCP_TCC_RW_ATOMIC_REQ_sum SPI_VWC_CSC_WR SPI_RA_BULKY_CU_FULL_CSN TCC_EA0_RDREQ_LEVEL_sum TCC_EA0_WRREQ_LEVEL_sum TCC_EA0_ATOMIC_LEVEL_sum TCC_EA0_WRREQ_STALL_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_9.txt b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..60ceab315a
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ TCP_PENDING_STALL_CYCLES_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300X_A1/perfmon/timestamps.txt b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..676cca1b80
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300X_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/join_type_kernel/MI300X_A1/pmc_perf.csv b/tests/workloads/join_type_kernel/MI300X_A1/pmc_perf.csv
new file mode 100644
index 0000000000..7c6e7b61e3
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300X_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_1,Correlation_ID_1,XCC_Index,TCC_ATOMIC[0],TCC_BUBBLE[0],TCC_CYCLE[0],TCC_EA0_ATOMIC[0],TCC_ATOMIC[1],TCC_BUBBLE[1],TCC_CYCLE[1],TCC_EA0_ATOMIC[1],TCC_ATOMIC[2],TCC_BUBBLE[2],TCC_CYCLE[2],TCC_EA0_ATOMIC[2],TCC_ATOMIC[3],TCC_BUBBLE[3],TCC_CYCLE[3],TCC_EA0_ATOMIC[3],TCC_ATOMIC[4],TCC_BUBBLE[4],TCC_CYCLE[4],TCC_EA0_ATOMIC[4],TCC_ATOMIC[5],TCC_BUBBLE[5],TCC_CYCLE[5],TCC_EA0_ATOMIC[5],TCC_ATOMIC[6],TCC_BUBBLE[6],TCC_CYCLE[6],TCC_EA0_ATOMIC[6],TCC_ATOMIC[7],TCC_BUBBLE[7],TCC_CYCLE[7],TCC_EA0_ATOMIC[7],TCC_ATOMIC[8],TCC_BUBBLE[8],TCC_CYCLE[8],TCC_EA0_ATOMIC[8],TCC_ATOMIC[9],TCC_BUBBLE[9],TCC_CYCLE[9],TCC_EA0_ATOMIC[9],TCC_ATOMIC[10],TCC_BUBBLE[10],TCC_CYCLE[10],TCC_EA0_ATOMIC[10],TCC_ATOMIC[11],TCC_BUBBLE[11],TCC_CYCLE[11],TCC_EA0_ATOMIC[11],TCC_ATOMIC[12],TCC_BUBBLE[12],TCC_CYCLE[12],TCC_EA0_ATOMIC[12],TCC_ATOMIC[13],TCC_BUBBLE[13],TCC_CYCLE[13],TCC_EA0_ATOMIC[13],TCC_ATOMIC[14],TCC_BUBBLE[14],TCC_CYCLE[14],TCC_EA0_ATOMIC[14],TCC_ATOMIC[15],TCC_BUBBLE[15],TCC_CYCLE[15],TCC_EA0_ATOMIC[15],TCC_ATOMIC[16],TCC_BUBBLE[16],TCC_CYCLE[16],TCC_EA0_ATOMIC[16],TCC_ATOMIC[17],TCC_BUBBLE[17],TCC_CYCLE[17],TCC_EA0_ATOMIC[17],TCC_ATOMIC[18],TCC_BUBBLE[18],TCC_CYCLE[18],TCC_EA0_ATOMIC[18],TCC_ATOMIC[19],TCC_BUBBLE[19],TCC_CYCLE[19],TCC_EA0_ATOMIC[19],TCC_ATOMIC[20],TCC_BUBBLE[20],TCC_CYCLE[20],TCC_EA0_ATOMIC[20],TCC_ATOMIC[21],TCC_BUBBLE[21],TCC_CYCLE[21],TCC_EA0_ATOMIC[21],TCC_ATOMIC[22],TCC_BUBBLE[22],TCC_CYCLE[22],TCC_EA0_ATOMIC[22],TCC_ATOMIC[23],TCC_BUBBLE[23],TCC_CYCLE[23],TCC_EA0_ATOMIC[23],TCC_ATOMIC[24],TCC_BUBBLE[24],TCC_CYCLE[24],TCC_EA0_ATOMIC[24],TCC_ATOMIC[25],TCC_BUBBLE[25],TCC_CYCLE[25],TCC_EA0_ATOMIC[25],TCC_ATOMIC[26],TCC_BUBBLE[26],TCC_CYCLE[26],TCC_EA0_ATOMIC[26],TCC_ATOMIC[27],TCC_BUBBLE[27],TCC_CYCLE[27],TCC_EA0_ATOMIC[27],TCC_ATOMIC[28],TCC_BUBBLE[28],TCC_CYCLE[28],TCC_EA0_ATOMIC[28],TCC_ATOMIC[29],TCC_BUBBLE[29],TCC_CYCLE[29],TCC_EA0_ATOMIC[29],TCC_ATOMIC[30],TCC_BUBBLE[30],TCC_CYCLE[30],TCC_EA0_ATOMIC[30],TCC_ATOMIC[31],TCC_BUBBLE[31],TCC_CYCLE[31],TCC_EA0_ATOMIC[31],TCC_ATOMIC[32],TCC_BUBBLE[32],TCC_CYCLE[32],TCC_EA0_ATOMIC[32],TCC_ATOMIC[33],TCC_BUBBLE[33],TCC_CYCLE[33],TCC_EA0_ATOMIC[33],TCC_ATOMIC[34],TCC_BUBBLE[34],TCC_CYCLE[34],TCC_EA0_ATOMIC[34],TCC_ATOMIC[35],TCC_BUBBLE[35],TCC_CYCLE[35],TCC_EA0_ATOMIC[35],TCC_ATOMIC[36],TCC_BUBBLE[36],TCC_CYCLE[36],TCC_EA0_ATOMIC[36],TCC_ATOMIC[37],TCC_BUBBLE[37],TCC_CYCLE[37],TCC_EA0_ATOMIC[37],TCC_ATOMIC[38],TCC_BUBBLE[38],TCC_CYCLE[38],TCC_EA0_ATOMIC[38],TCC_ATOMIC[39],TCC_BUBBLE[39],TCC_CYCLE[39],TCC_EA0_ATOMIC[39],TCC_ATOMIC[40],TCC_BUBBLE[40],TCC_CYCLE[40],TCC_EA0_ATOMIC[40],TCC_ATOMIC[41],TCC_BUBBLE[41],TCC_CYCLE[41],TCC_EA0_ATOMIC[41],TCC_ATOMIC[42],TCC_BUBBLE[42],TCC_CYCLE[42],TCC_EA0_ATOMIC[42],TCC_ATOMIC[43],TCC_BUBBLE[43],TCC_CYCLE[43],TCC_EA0_ATOMIC[43],TCC_ATOMIC[44],TCC_BUBBLE[44],TCC_CYCLE[44],TCC_EA0_ATOMIC[44],TCC_ATOMIC[45],TCC_BUBBLE[45],TCC_CYCLE[45],TCC_EA0_ATOMIC[45],TCC_ATOMIC[46],TCC_BUBBLE[46],TCC_CYCLE[46],TCC_EA0_ATOMIC[46],TCC_ATOMIC[47],TCC_BUBBLE[47],TCC_CYCLE[47],TCC_EA0_ATOMIC[47],TCC_ATOMIC[48],TCC_BUBBLE[48],TCC_CYCLE[48],TCC_EA0_ATOMIC[48],TCC_ATOMIC[49],TCC_BUBBLE[49],TCC_CYCLE[49],TCC_EA0_ATOMIC[49],TCC_ATOMIC[50],TCC_BUBBLE[50],TCC_CYCLE[50],TCC_EA0_ATOMIC[50],TCC_ATOMIC[51],TCC_BUBBLE[51],TCC_CYCLE[51],TCC_EA0_ATOMIC[51],TCC_ATOMIC[52],TCC_BUBBLE[52],TCC_CYCLE[52],TCC_EA0_ATOMIC[52],TCC_ATOMIC[53],TCC_BUBBLE[53],TCC_CYCLE[53],TCC_EA0_ATOMIC[53],TCC_ATOMIC[54],TCC_BUBBLE[54],TCC_CYCLE[54],TCC_EA0_ATOMIC[54],TCC_ATOMIC[55],TCC_BUBBLE[55],TCC_CYCLE[55],TCC_EA0_ATOMIC[55],TCC_ATOMIC[56],TCC_BUBBLE[56],TCC_CYCLE[56],TCC_EA0_ATOMIC[56],TCC_ATOMIC[57],TCC_BUBBLE[57],TCC_CYCLE[57],TCC_EA0_ATOMIC[57],TCC_ATOMIC[58],TCC_BUBBLE[58],TCC_CYCLE[58],TCC_EA0_ATOMIC[58],TCC_ATOMIC[59],TCC_BUBBLE[59],TCC_CYCLE[59],TCC_EA0_ATOMIC[59],TCC_ATOMIC[60],TCC_BUBBLE[60],TCC_CYCLE[60],TCC_EA0_ATOMIC[60],TCC_ATOMIC[61],TCC_BUBBLE[61],TCC_CYCLE[61],TCC_EA0_ATOMIC[61],TCC_ATOMIC[62],TCC_BUBBLE[62],TCC_CYCLE[62],TCC_EA0_ATOMIC[62],TCC_ATOMIC[63],TCC_BUBBLE[63],TCC_CYCLE[63],TCC_EA0_ATOMIC[63],TCC_ATOMIC[64],TCC_BUBBLE[64],TCC_CYCLE[64],TCC_EA0_ATOMIC[64],TCC_ATOMIC[65],TCC_BUBBLE[65],TCC_CYCLE[65],TCC_EA0_ATOMIC[65],TCC_ATOMIC[66],TCC_BUBBLE[66],TCC_CYCLE[66],TCC_EA0_ATOMIC[66],TCC_ATOMIC[67],TCC_BUBBLE[67],TCC_CYCLE[67],TCC_EA0_ATOMIC[67],TCC_ATOMIC[68],TCC_BUBBLE[68],TCC_CYCLE[68],TCC_EA0_ATOMIC[68],TCC_ATOMIC[69],TCC_BUBBLE[69],TCC_CYCLE[69],TCC_EA0_ATOMIC[69],TCC_ATOMIC[70],TCC_BUBBLE[70],TCC_CYCLE[70],TCC_EA0_ATOMIC[70],TCC_ATOMIC[71],TCC_BUBBLE[71],TCC_CYCLE[71],TCC_EA0_ATOMIC[71],TCC_ATOMIC[72],TCC_BUBBLE[72],TCC_CYCLE[72],TCC_EA0_ATOMIC[72],TCC_ATOMIC[73],TCC_BUBBLE[73],TCC_CYCLE[73],TCC_EA0_ATOMIC[73],TCC_ATOMIC[74],TCC_BUBBLE[74],TCC_CYCLE[74],TCC_EA0_ATOMIC[74],TCC_ATOMIC[75],TCC_BUBBLE[75],TCC_CYCLE[75],TCC_EA0_ATOMIC[75],TCC_ATOMIC[76],TCC_BUBBLE[76],TCC_CYCLE[76],TCC_EA0_ATOMIC[76],TCC_ATOMIC[77],TCC_BUBBLE[77],TCC_CYCLE[77],TCC_EA0_ATOMIC[77],TCC_ATOMIC[78],TCC_BUBBLE[78],TCC_CYCLE[78],TCC_EA0_ATOMIC[78],TCC_ATOMIC[79],TCC_BUBBLE[79],TCC_CYCLE[79],TCC_EA0_ATOMIC[79],TCC_ATOMIC[80],TCC_BUBBLE[80],TCC_CYCLE[80],TCC_EA0_ATOMIC[80],TCC_ATOMIC[81],TCC_BUBBLE[81],TCC_CYCLE[81],TCC_EA0_ATOMIC[81],TCC_ATOMIC[82],TCC_BUBBLE[82],TCC_CYCLE[82],TCC_EA0_ATOMIC[82],TCC_ATOMIC[83],TCC_BUBBLE[83],TCC_CYCLE[83],TCC_EA0_ATOMIC[83],TCC_ATOMIC[84],TCC_BUBBLE[84],TCC_CYCLE[84],TCC_EA0_ATOMIC[84],TCC_ATOMIC[85],TCC_BUBBLE[85],TCC_CYCLE[85],TCC_EA0_ATOMIC[85],TCC_ATOMIC[86],TCC_BUBBLE[86],TCC_CYCLE[86],TCC_EA0_ATOMIC[86],TCC_ATOMIC[87],TCC_BUBBLE[87],TCC_CYCLE[87],TCC_EA0_ATOMIC[87],TCC_ATOMIC[88],TCC_BUBBLE[88],TCC_CYCLE[88],TCC_EA0_ATOMIC[88],TCC_ATOMIC[89],TCC_BUBBLE[89],TCC_CYCLE[89],TCC_EA0_ATOMIC[89],TCC_ATOMIC[90],TCC_BUBBLE[90],TCC_CYCLE[90],TCC_EA0_ATOMIC[90],TCC_ATOMIC[91],TCC_BUBBLE[91],TCC_CYCLE[91],TCC_EA0_ATOMIC[91],TCC_ATOMIC[92],TCC_BUBBLE[92],TCC_CYCLE[92],TCC_EA0_ATOMIC[92],TCC_ATOMIC[93],TCC_BUBBLE[93],TCC_CYCLE[93],TCC_EA0_ATOMIC[93],TCC_ATOMIC[94],TCC_BUBBLE[94],TCC_CYCLE[94],TCC_EA0_ATOMIC[94],TCC_ATOMIC[95],TCC_BUBBLE[95],TCC_CYCLE[95],TCC_EA0_ATOMIC[95],TCC_ATOMIC[96],TCC_BUBBLE[96],TCC_CYCLE[96],TCC_EA0_ATOMIC[96],TCC_ATOMIC[97],TCC_BUBBLE[97],TCC_CYCLE[97],TCC_EA0_ATOMIC[97],TCC_ATOMIC[98],TCC_BUBBLE[98],TCC_CYCLE[98],TCC_EA0_ATOMIC[98],TCC_ATOMIC[99],TCC_BUBBLE[99],TCC_CYCLE[99],TCC_EA0_ATOMIC[99],TCC_ATOMIC[100],TCC_BUBBLE[100],TCC_CYCLE[100],TCC_EA0_ATOMIC[100],TCC_ATOMIC[101],TCC_BUBBLE[101],TCC_CYCLE[101],TCC_EA0_ATOMIC[101],TCC_ATOMIC[102],TCC_BUBBLE[102],TCC_CYCLE[102],TCC_EA0_ATOMIC[102],TCC_ATOMIC[103],TCC_BUBBLE[103],TCC_CYCLE[103],TCC_EA0_ATOMIC[103],TCC_ATOMIC[104],TCC_BUBBLE[104],TCC_CYCLE[104],TCC_EA0_ATOMIC[104],TCC_ATOMIC[105],TCC_BUBBLE[105],TCC_CYCLE[105],TCC_EA0_ATOMIC[105],TCC_ATOMIC[106],TCC_BUBBLE[106],TCC_CYCLE[106],TCC_EA0_ATOMIC[106],TCC_ATOMIC[107],TCC_BUBBLE[107],TCC_CYCLE[107],TCC_EA0_ATOMIC[107],TCC_ATOMIC[108],TCC_BUBBLE[108],TCC_CYCLE[108],TCC_EA0_ATOMIC[108],TCC_ATOMIC[109],TCC_BUBBLE[109],TCC_CYCLE[109],TCC_EA0_ATOMIC[109],TCC_ATOMIC[110],TCC_BUBBLE[110],TCC_CYCLE[110],TCC_EA0_ATOMIC[110],TCC_ATOMIC[111],TCC_BUBBLE[111],TCC_CYCLE[111],TCC_EA0_ATOMIC[111],TCC_ATOMIC[112],TCC_BUBBLE[112],TCC_CYCLE[112],TCC_EA0_ATOMIC[112],TCC_ATOMIC[113],TCC_BUBBLE[113],TCC_CYCLE[113],TCC_EA0_ATOMIC[113],TCC_ATOMIC[114],TCC_BUBBLE[114],TCC_CYCLE[114],TCC_EA0_ATOMIC[114],TCC_ATOMIC[115],TCC_BUBBLE[115],TCC_CYCLE[115],TCC_EA0_ATOMIC[115],TCC_ATOMIC[116],TCC_BUBBLE[116],TCC_CYCLE[116],TCC_EA0_ATOMIC[116],TCC_ATOMIC[117],TCC_BUBBLE[117],TCC_CYCLE[117],TCC_EA0_ATOMIC[117],TCC_ATOMIC[118],TCC_BUBBLE[118],TCC_CYCLE[118],TCC_EA0_ATOMIC[118],TCC_ATOMIC[119],TCC_BUBBLE[119],TCC_CYCLE[119],TCC_EA0_ATOMIC[119],TCC_ATOMIC[120],TCC_BUBBLE[120],TCC_CYCLE[120],TCC_EA0_ATOMIC[120],TCC_ATOMIC[121],TCC_BUBBLE[121],TCC_CYCLE[121],TCC_EA0_ATOMIC[121],TCC_ATOMIC[122],TCC_BUBBLE[122],TCC_CYCLE[122],TCC_EA0_ATOMIC[122],TCC_ATOMIC[123],TCC_BUBBLE[123],TCC_CYCLE[123],TCC_EA0_ATOMIC[123],TCC_ATOMIC[124],TCC_BUBBLE[124],TCC_CYCLE[124],TCC_EA0_ATOMIC[124],TCC_ATOMIC[125],TCC_BUBBLE[125],TCC_CYCLE[125],TCC_EA0_ATOMIC[125],TCC_ATOMIC[126],TCC_BUBBLE[126],TCC_CYCLE[126],TCC_EA0_ATOMIC[126],TCC_ATOMIC[127],TCC_BUBBLE[127],TCC_CYCLE[127],TCC_EA0_ATOMIC[127],Wave_Size_2,Correlation_ID_2,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,TA_FLAT_ATOMIC_WAVEFRONTS_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,TCC_ALL_TC_OP_INV_EVICT_sum,TCC_EA0_ATOMIC_sum,TCC_NORMAL_EVICT_sum,TCC_TOO_MANY_EA_WRREQS_STALL_sum,TCP_TCC_CC_READ_REQ_sum,TCP_TCC_CC_WRITE_REQ_sum,TCP_TCC_UC_ATOMIC_REQ_sum,TCP_TCC_UC_WRITE_REQ_sum,Wave_Size_3,Correlation_ID_3,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,TCC_EA0_ATOMIC_LEVEL_sum,TCC_EA0_RDREQ_LEVEL_sum,TCC_EA0_WRREQ_LEVEL_sum,TCC_EA0_WRREQ_STALL_sum,TCP_TCC_CC_ATOMIC_REQ_sum,TCP_TCC_RW_ATOMIC_REQ_sum,TCP_TCC_RW_READ_REQ_sum,TCP_TCC_RW_WRITE_REQ_sum,Wave_Size_4,Correlation_ID_4,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SPI_RA_REQ_NO_ALLOC,SPI_RA_REQ_NO_ALLOC_CSN,CPC_CPC_STAT_STALL,CPC_UTCL1_STALL_ON_TRANSLATION,CPF_CPF_STAT_IDLE,CPF_CPF_TCIU_IDLE,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,TA_BUFFER_TOTAL_CYCLES_sum,TCC_HIT_sum,TCC_MISS_sum,TCC_REQ_sum,TCC_STREAMING_REQ_sum,TCP_TOTAL_ACCESSES_sum,TCP_TOTAL_READ_sum,TCP_TOTAL_WRITE_sum,TCP_VOLATILE_sum,TD_ATOMIC_WAVEFRONT_sum,TD_STORE_WAVEFRONT_sum,Wave_Size_5,Correlation_ID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SQ_INST_CYCLES_SALU,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,CPC_ME1_DC0_SPI_BUSY,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,TCC_BUBBLE_sum,TCC_EA0_RDREQ_32B_sum,TCC_EA0_RDREQ_sum,TCC_EA0_RD_UNCACHED_32B_sum,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,TCP_TCC_READ_REQ_sum,TCP_TCC_WRITE_REQ_sum,Start_Timestamp,End_Timestamp
+0,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) 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diff --git a/tests/workloads/join_type_kernel/MI300X_A1/sysinfo.csv b/tests/workloads/join_type_kernel/MI300X_A1/sysinfo.csv
new file mode 100644
index 0000000000..3343f02299
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300X_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+join_type_kernel,./tests/vcopy -n 1048576 -b 256 -i 3,SQ|LDS|SQC|TA|TD|TCP|TCC|SPI|CPC|CPF,Wed 29 May 2024 11:57:34 AM  (CDT),2,splinter-126-wr-c6,AMD Ryzen 9 7950X 16-Core Processor,"American Megatrends International, LLC.VS2683299N.FD",Ubuntu 22.04.4 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,114656528,,6.2.0-13611,113-MI3SRIOV-001,SPX,NPS1,MI300X_A1,gfx942,32,4096,304,4,32,64,1024,32,2100,1300,2100,1300,128,32,160,4,5324.8,8
diff --git a/tests/workloads/join_type_kernel/MI300X_A1/timestamps.csv b/tests/workloads/join_type_kernel/MI300X_A1/timestamps.csv
new file mode 100644
index 0000000000..1ed4cf7ee3
--- /dev/null
+++ b/tests/workloads/join_type_kernel/MI300X_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,60633,1,961249,961249,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716045124943676,716045124959076,0
+2,60633,1,961249,961249,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716045124980274,716045124992914,0
+3,60633,1,961249,961249,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716045125012633,716045125024713,0
diff --git a/tests/workloads/kernel/MI300A_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/kernel/MI300A_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..ceebedc3e0
--- /dev/null
+++ b/tests/workloads/kernel/MI300A_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,11995,1,150565,150565,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73994741709003,73994741716935,0,162848.0,162848.0,16384.0,65536.0,23275.0,1854956.0
+1,11995,1,150565,150565,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73994741753751,73994741759760,0,183427.0,183427.0,16384.0,65536.0,13062.0,1048728.0
+2,11995,1,150565,150565,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73994741733040,73994741738809,0,169147.0,169147.0,16384.0,65536.0,13160.0,1049428.0
diff --git a/tests/workloads/kernel/MI300A_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/kernel/MI300A_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..814ccd2476
--- /dev/null
+++ b/tests/workloads/kernel/MI300A_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,11995,1,150579,150579,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73994741709003,73994741716935,0,0.0,0.0,0.0
+1,11995,1,150579,150579,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73994741753751,73994741759760,0,0.0,0.0,0.0
+2,11995,1,150579,150579,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73994741733040,73994741738809,0,0.0,0.0,0.0
diff --git a/tests/workloads/kernel/MI300A_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/kernel/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..f0f87293ab
--- /dev/null
+++ b/tests/workloads/kernel/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,150591,150591,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73994741709003,73994741716935,0,65536.0,278636.0,22348096.0
+1,11995,1,150591,150591,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73994741753751,73994741759760,0,65536.0,275446.0,22108808.0
+2,11995,1,150591,150591,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73994741733040,73994741738809,0,65536.0,199560.0,15923520.0
diff --git a/tests/workloads/kernel/MI300A_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/kernel/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..cd8cc95de9
--- /dev/null
+++ b/tests/workloads/kernel/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,150603,150603,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73994741709003,73994741716935,0,32768.0,535005.0,42794664.0
+1,11995,1,150603,150603,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73994741753751,73994741759760,0,32768.0,421277.0,33695608.0
+2,11995,1,150603,150603,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73994741733040,73994741738809,0,32768.0,421240.0,33685740.0
diff --git a/tests/workloads/kernel/MI300A_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/kernel/MI300A_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..e7f826b3a1
--- /dev/null
+++ b/tests/workloads/kernel/MI300A_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,11995,1,150615,150615,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73994741709003,73994741716935,0,210164.0,210164.0,118323.0,840656.0,16384.0,12983237.0,245238.0,0.0,52328424.0
+1,11995,1,150615,150615,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73994741753751,73994741759760,0,192152.0,192152.0,107629.0,768608.0,16384.0,11427426.0,206240.0,0.0,46110964.0
+2,11995,1,150615,150615,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73994741733040,73994741738809,0,173684.0,173684.0,93734.0,694736.0,16384.0,9922380.0,188269.0,0.0,40094032.0
diff --git a/tests/workloads/kernel/MI300A_A1/log.txt b/tests/workloads/kernel/MI300A_A1/log.txt
new file mode 100644
index 0000000000..ee03d052b0
--- /dev/null
+++ b/tests/workloads/kernel/MI300A_A1/log.txt
@@ -0,0 +1,215 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/kernel/MI300A_A1
+Target: MI300A_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: ['"vecCopy(double*,', 'double*,', 'double*,', 'int,', 'int)', '[clone', '.kd]"']
+Dispatch Selection: None
+Hardware Blocks: All
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+
+[profiling] Current input file: tests/workloads/kernel/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+
+[profiling] Current input file: tests/workloads/kernel/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+
+[profiling] Current input file: tests/workloads/kernel/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+
+[profiling] Current input file: tests/workloads/kernel/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying the output vector from the GPU to the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Releasing GPU memory
+
+[profiling] Current input file: tests/workloads/kernel/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LEVEL_WAVES
+
+[profiling] Current input file: tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+
+[profiling] Current input file: tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+
+[profiling] Current input file: tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_HITS
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_MISSES
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_MISSES_DUPLICATE
+
+[profiling] Current input file: tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_HITS
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES_DUPLICATE
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_1
+
+[profiling] Current input file: tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+
+[profiling] Current input file: tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_13.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[1]
+
+[profiling] Current input file: tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_14.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[1]
+
+[profiling] Current input file: tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_15.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[1]
+
+[profiling] Current input file: tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_16.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[0]
+
+[profiling] Current input file: tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_17.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[0]
+
+[profiling] Current input file: tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F64
+
+[profiling] Current input file: tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT32
+
+[profiling] Current input file: tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_LDS
+
+[profiling] Current input file: tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_SCA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_MISC
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_WR
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_RD
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_SALU
+
+[profiling] Current input file: tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_THREAD_CYCLES_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ADDR_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_UNALIGNED_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_EQ_64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_48
+
+[profiling] Current input file: tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+
+[profiling] Current input file: tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+
+[profiling] Current input file: tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+
+[profiling] Current input file: tests/workloads/kernel/MI300A_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/kernel/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/kernel/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..7000361619
--- /dev/null
+++ b/tests/workloads/kernel/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/kernel/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..99cb19a588
--- /dev/null
+++ b/tests/workloads/kernel/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/kernel/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..567f8e862d
--- /dev/null
+++ b/tests/workloads/kernel/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/kernel/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..c1d8809b9c
--- /dev/null
+++ b/tests/workloads/kernel/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/kernel/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..5486e2758a
--- /dev/null
+++ b/tests/workloads/kernel/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_0.txt b/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..6b7ccd8e2e
--- /dev/null
+++ b/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD GRBM_COUNT GRBM_GUI_ACTIVE TCP_GATE_EN1_sum TCP_GATE_EN2_sum TCP_TD_TCP_STALL_CYCLES_sum TCP_TCR_TCP_STALL_CYCLES_sum TA_TA_BUSY_sum TA_BUFFER_WAVEFRONTS_sum TD_TD_BUSY_sum TD_TC_STALL_sum SPI_CSN_WINDOW_VALID SPI_CSN_BUSY CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE CPF_CPF_STAT_BUSY CPF_CPF_STAT_STALL TCC_CYCLE_sum TCC_BUSY_sum TCC_PROBE_sum TCC_PROBE_ALL_sum
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_1.txt b/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..13fe08c70f
--- /dev/null
+++ b/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 GRBM_SPI_BUSY TCP_READ_TAGCONFLICT_STALL_CYCLES_sum TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum TCP_TA_TCP_STATE_READ_sum TA_BUFFER_READ_WAVEFRONTS_sum TA_BUFFER_WRITE_WAVEFRONTS_sum TD_SPI_STALL_sum TD_LOAD_WAVEFRONT_sum SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE CPC_CPC_TCIU_BUSY CPC_CPC_TCIU_IDLE CPF_CPF_TCIU_BUSY CPF_CPF_TCIU_STALL TCC_NC_REQ_sum TCC_UC_REQ_sum TCC_CC_REQ_sum TCC_RW_REQ_sum
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_10.txt b/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..1af4b940e1
--- /dev/null
+++ b/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_11.txt b/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..674308c909
--- /dev/null
+++ b/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_12.txt b/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..4a914e8008
--- /dev/null
+++ b/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_13.txt b/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_13.txt
new file mode 100644
index 0000000000..7bb419d791
--- /dev/null
+++ b/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_13.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_ATOMIC[0] TCC_BUBBLE[0] TCC_CYCLE[0] TCC_EA0_ATOMIC[0] TCC_ATOMIC[1] TCC_BUBBLE[1] TCC_CYCLE[1] TCC_EA0_ATOMIC[1] TCC_ATOMIC[2] TCC_BUBBLE[2] TCC_CYCLE[2] TCC_EA0_ATOMIC[2] TCC_ATOMIC[3] TCC_BUBBLE[3] TCC_CYCLE[3] TCC_EA0_ATOMIC[3] TCC_ATOMIC[4] TCC_BUBBLE[4] TCC_CYCLE[4] TCC_EA0_ATOMIC[4] TCC_ATOMIC[5] TCC_BUBBLE[5] TCC_CYCLE[5] TCC_EA0_ATOMIC[5] TCC_ATOMIC[6] TCC_BUBBLE[6] TCC_CYCLE[6] TCC_EA0_ATOMIC[6] TCC_ATOMIC[7] TCC_BUBBLE[7] TCC_CYCLE[7] TCC_EA0_ATOMIC[7] TCC_ATOMIC[8] TCC_BUBBLE[8] TCC_CYCLE[8] TCC_EA0_ATOMIC[8] TCC_ATOMIC[9] TCC_BUBBLE[9] TCC_CYCLE[9] TCC_EA0_ATOMIC[9] TCC_ATOMIC[10] TCC_BUBBLE[10] TCC_CYCLE[10] TCC_EA0_ATOMIC[10] TCC_ATOMIC[11] TCC_BUBBLE[11] TCC_CYCLE[11] TCC_EA0_ATOMIC[11] TCC_ATOMIC[12] TCC_BUBBLE[12] TCC_CYCLE[12] TCC_EA0_ATOMIC[12] TCC_ATOMIC[13] TCC_BUBBLE[13] TCC_CYCLE[13] TCC_EA0_ATOMIC[13] TCC_ATOMIC[14] TCC_BUBBLE[14] TCC_CYCLE[14] TCC_EA0_ATOMIC[14] TCC_ATOMIC[15] TCC_BUBBLE[15] TCC_CYCLE[15] TCC_EA0_ATOMIC[15]
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_14.txt b/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_14.txt
new file mode 100644
index 0000000000..d35a9c3751
--- /dev/null
+++ b/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_14.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_ATOMIC_LEVEL[0] TCC_EA0_RDREQ[0] TCC_EA0_RDREQ_32B[0] TCC_EA0_RDREQ_LEVEL[0] TCC_EA0_ATOMIC_LEVEL[1] TCC_EA0_RDREQ[1] TCC_EA0_RDREQ_32B[1] TCC_EA0_RDREQ_LEVEL[1] TCC_EA0_ATOMIC_LEVEL[2] TCC_EA0_RDREQ[2] TCC_EA0_RDREQ_32B[2] TCC_EA0_RDREQ_LEVEL[2] TCC_EA0_ATOMIC_LEVEL[3] TCC_EA0_RDREQ[3] TCC_EA0_RDREQ_32B[3] TCC_EA0_RDREQ_LEVEL[3] TCC_EA0_ATOMIC_LEVEL[4] TCC_EA0_RDREQ[4] TCC_EA0_RDREQ_32B[4] TCC_EA0_RDREQ_LEVEL[4] TCC_EA0_ATOMIC_LEVEL[5] TCC_EA0_RDREQ[5] TCC_EA0_RDREQ_32B[5] TCC_EA0_RDREQ_LEVEL[5] TCC_EA0_ATOMIC_LEVEL[6] TCC_EA0_RDREQ[6] TCC_EA0_RDREQ_32B[6] TCC_EA0_RDREQ_LEVEL[6] TCC_EA0_ATOMIC_LEVEL[7] TCC_EA0_RDREQ[7] TCC_EA0_RDREQ_32B[7] TCC_EA0_RDREQ_LEVEL[7] TCC_EA0_ATOMIC_LEVEL[8] TCC_EA0_RDREQ[8] TCC_EA0_RDREQ_32B[8] TCC_EA0_RDREQ_LEVEL[8] TCC_EA0_ATOMIC_LEVEL[9] TCC_EA0_RDREQ[9] TCC_EA0_RDREQ_32B[9] TCC_EA0_RDREQ_LEVEL[9] TCC_EA0_ATOMIC_LEVEL[10] TCC_EA0_RDREQ[10] TCC_EA0_RDREQ_32B[10] TCC_EA0_RDREQ_LEVEL[10] TCC_EA0_ATOMIC_LEVEL[11] TCC_EA0_RDREQ[11] TCC_EA0_RDREQ_32B[11] TCC_EA0_RDREQ_LEVEL[11] TCC_EA0_ATOMIC_LEVEL[12] TCC_EA0_RDREQ[12] TCC_EA0_RDREQ_32B[12] TCC_EA0_RDREQ_LEVEL[12] TCC_EA0_ATOMIC_LEVEL[13] TCC_EA0_RDREQ[13] TCC_EA0_RDREQ_32B[13] TCC_EA0_RDREQ_LEVEL[13] TCC_EA0_ATOMIC_LEVEL[14] TCC_EA0_RDREQ[14] TCC_EA0_RDREQ_32B[14] TCC_EA0_RDREQ_LEVEL[14] TCC_EA0_ATOMIC_LEVEL[15] TCC_EA0_RDREQ[15] TCC_EA0_RDREQ_32B[15] TCC_EA0_RDREQ_LEVEL[15]
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_15.txt b/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_15.txt
new file mode 100644
index 0000000000..ea2157e89b
--- /dev/null
+++ b/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_15.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_WRREQ[0] TCC_EA0_WRREQ_64B[0] TCC_EA0_WRREQ_LEVEL[0] TCC_HIT[0] TCC_EA0_WRREQ[1] TCC_EA0_WRREQ_64B[1] TCC_EA0_WRREQ_LEVEL[1] TCC_HIT[1] TCC_EA0_WRREQ[2] TCC_EA0_WRREQ_64B[2] TCC_EA0_WRREQ_LEVEL[2] TCC_HIT[2] TCC_EA0_WRREQ[3] TCC_EA0_WRREQ_64B[3] TCC_EA0_WRREQ_LEVEL[3] TCC_HIT[3] TCC_EA0_WRREQ[4] TCC_EA0_WRREQ_64B[4] TCC_EA0_WRREQ_LEVEL[4] TCC_HIT[4] TCC_EA0_WRREQ[5] TCC_EA0_WRREQ_64B[5] TCC_EA0_WRREQ_LEVEL[5] TCC_HIT[5] TCC_EA0_WRREQ[6] TCC_EA0_WRREQ_64B[6] TCC_EA0_WRREQ_LEVEL[6] TCC_HIT[6] TCC_EA0_WRREQ[7] TCC_EA0_WRREQ_64B[7] TCC_EA0_WRREQ_LEVEL[7] TCC_HIT[7] TCC_EA0_WRREQ[8] TCC_EA0_WRREQ_64B[8] TCC_EA0_WRREQ_LEVEL[8] TCC_HIT[8] TCC_EA0_WRREQ[9] TCC_EA0_WRREQ_64B[9] TCC_EA0_WRREQ_LEVEL[9] TCC_HIT[9] TCC_EA0_WRREQ[10] TCC_EA0_WRREQ_64B[10] TCC_EA0_WRREQ_LEVEL[10] TCC_HIT[10] TCC_EA0_WRREQ[11] TCC_EA0_WRREQ_64B[11] TCC_EA0_WRREQ_LEVEL[11] TCC_HIT[11] TCC_EA0_WRREQ[12] TCC_EA0_WRREQ_64B[12] TCC_EA0_WRREQ_LEVEL[12] TCC_HIT[12] TCC_EA0_WRREQ[13] TCC_EA0_WRREQ_64B[13] TCC_EA0_WRREQ_LEVEL[13] TCC_HIT[13] TCC_EA0_WRREQ[14] TCC_EA0_WRREQ_64B[14] TCC_EA0_WRREQ_LEVEL[14] TCC_HIT[14] TCC_EA0_WRREQ[15] TCC_EA0_WRREQ_64B[15] TCC_EA0_WRREQ_LEVEL[15] TCC_HIT[15]
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_16.txt b/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_16.txt
new file mode 100644
index 0000000000..1d7df54ad8
--- /dev/null
+++ b/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_16.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_MISS[0] TCC_READ[0] TCC_REQ[0] TCC_RW_REQ[0] TCC_MISS[1] TCC_READ[1] TCC_REQ[1] TCC_RW_REQ[1] TCC_MISS[2] TCC_READ[2] TCC_REQ[2] TCC_RW_REQ[2] TCC_MISS[3] TCC_READ[3] TCC_REQ[3] TCC_RW_REQ[3] TCC_MISS[4] TCC_READ[4] TCC_REQ[4] TCC_RW_REQ[4] TCC_MISS[5] TCC_READ[5] TCC_REQ[5] TCC_RW_REQ[5] TCC_MISS[6] TCC_READ[6] TCC_REQ[6] TCC_RW_REQ[6] TCC_MISS[7] TCC_READ[7] TCC_REQ[7] TCC_RW_REQ[7] TCC_MISS[8] TCC_READ[8] TCC_REQ[8] TCC_RW_REQ[8] TCC_MISS[9] TCC_READ[9] TCC_REQ[9] TCC_RW_REQ[9] TCC_MISS[10] TCC_READ[10] TCC_REQ[10] TCC_RW_REQ[10] TCC_MISS[11] TCC_READ[11] TCC_REQ[11] TCC_RW_REQ[11] TCC_MISS[12] TCC_READ[12] TCC_REQ[12] TCC_RW_REQ[12] TCC_MISS[13] TCC_READ[13] TCC_REQ[13] TCC_RW_REQ[13] TCC_MISS[14] TCC_READ[14] TCC_REQ[14] TCC_RW_REQ[14] TCC_MISS[15] TCC_READ[15] TCC_REQ[15] TCC_RW_REQ[15]
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_17.txt b/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_17.txt
new file mode 100644
index 0000000000..771c82f7a6
--- /dev/null
+++ b/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_17.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_TAG_STALL[0] TCC_TOO_MANY_EA_WRREQS_STALL[0] TCC_WRITE[0] TCC_TAG_STALL[1] TCC_TOO_MANY_EA_WRREQS_STALL[1] TCC_WRITE[1] TCC_TAG_STALL[2] TCC_TOO_MANY_EA_WRREQS_STALL[2] TCC_WRITE[2] TCC_TAG_STALL[3] TCC_TOO_MANY_EA_WRREQS_STALL[3] TCC_WRITE[3] TCC_TAG_STALL[4] TCC_TOO_MANY_EA_WRREQS_STALL[4] TCC_WRITE[4] TCC_TAG_STALL[5] TCC_TOO_MANY_EA_WRREQS_STALL[5] TCC_WRITE[5] TCC_TAG_STALL[6] TCC_TOO_MANY_EA_WRREQS_STALL[6] TCC_WRITE[6] TCC_TAG_STALL[7] TCC_TOO_MANY_EA_WRREQS_STALL[7] TCC_WRITE[7] TCC_TAG_STALL[8] TCC_TOO_MANY_EA_WRREQS_STALL[8] TCC_WRITE[8] TCC_TAG_STALL[9] TCC_TOO_MANY_EA_WRREQS_STALL[9] TCC_WRITE[9] TCC_TAG_STALL[10] TCC_TOO_MANY_EA_WRREQS_STALL[10] TCC_WRITE[10] TCC_TAG_STALL[11] TCC_TOO_MANY_EA_WRREQS_STALL[11] TCC_WRITE[11] TCC_TAG_STALL[12] TCC_TOO_MANY_EA_WRREQS_STALL[12] TCC_WRITE[12] TCC_TAG_STALL[13] TCC_TOO_MANY_EA_WRREQS_STALL[13] TCC_WRITE[13] TCC_TAG_STALL[14] TCC_TOO_MANY_EA_WRREQS_STALL[14] TCC_WRITE[14] TCC_TAG_STALL[15] TCC_TOO_MANY_EA_WRREQS_STALL[15] TCC_WRITE[15]
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_2.txt b/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..ce68e08839
--- /dev/null
+++ b/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 TCP_VOLATILE_sum TCP_TOTAL_ACCESSES_sum TCP_TOTAL_READ_sum TCP_TOTAL_WRITE_sum TA_BUFFER_ATOMIC_WAVEFRONTS_sum TA_BUFFER_TOTAL_CYCLES_sum TD_ATOMIC_WAVEFRONT_sum TD_STORE_WAVEFRONT_sum SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION CPF_CPF_STAT_IDLE CPF_CPF_TCIU_IDLE TCC_REQ_sum TCC_STREAMING_REQ_sum TCC_HIT_sum TCC_MISS_sum
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_3.txt b/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..126e5bc987
--- /dev/null
+++ b/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS TCP_TOTAL_ATOMIC_WITH_RET_sum TCP_TOTAL_ATOMIC_WITHOUT_RET_sum TCP_TOTAL_WRITEBACK_INVALIDATES_sum TCP_TOTAL_CACHE_ACCESSES_sum TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES_sum TD_COALESCABLE_WAVEFRONT_sum SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE CPF_CMP_UTCL1_STALL_ON_TRANSLATION TCC_READ_sum TCC_WRITE_sum TCC_ATOMIC_sum TCC_WRITEBACK_sum
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_4.txt b/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..443c75b3f1
--- /dev/null
+++ b/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAIT_ANY SQ_WAIT_INST_ANY SQ_ACTIVE_INST_ANY SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU TCP_UTCL1_TRANSLATION_MISS_sum TCP_UTCL1_TRANSLATION_HIT_sum TCP_UTCL1_PERMISSION_MISS_sum TCP_UTCL1_REQUEST_sum TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_TOTAL_WAVEFRONTS_sum SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE TCC_EA0_WRREQ_sum TCC_EA0_WRREQ_64B_sum TCC_EA0_WR_UNCACHED_32B_sum TCC_EA0_WRREQ_DRAM_sum
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_5.txt b/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..8ead67c922
--- /dev/null
+++ b/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_SCA SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU TCP_TCC_READ_REQ_sum TCP_TCC_WRITE_REQ_sum TCP_TCC_ATOMIC_WITH_RET_REQ_sum TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN CPC_ME1_DC0_SPI_BUSY TCC_EA0_RDREQ_sum TCC_EA0_RDREQ_32B_sum TCC_BUBBLE_sum TCC_EA0_RD_UNCACHED_32B_sum
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_6.txt b/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..fce9a95e47
--- /dev/null
+++ b/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_THREAD_CYCLES_VALU SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 TCP_TCC_NC_READ_REQ_sum TCP_TCC_NC_WRITE_REQ_sum TCP_TCC_NC_ATOMIC_REQ_sum TCP_TCC_UC_READ_REQ_sum TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN TCC_EA0_RDREQ_DRAM_sum TCC_TAG_STALL_sum TCC_NORMAL_WRITEBACK_sum TCC_ALL_TC_OP_WB_WRITEBACK_sum
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_7.txt b/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..651d45b5d0
--- /dev/null
+++ b/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED TCP_TCC_UC_WRITE_REQ_sum TCP_TCC_UC_ATOMIC_REQ_sum TCP_TCC_CC_READ_REQ_sum TCP_TCC_CC_WRITE_REQ_sum TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR TCC_NORMAL_EVICT_sum TCC_ALL_TC_OP_INV_EVICT_sum TCC_TOO_MANY_EA_WRREQS_STALL_sum TCC_EA0_ATOMIC_sum
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_8.txt b/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..0539f399ec
--- /dev/null
+++ b/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES TCP_TCC_CC_ATOMIC_REQ_sum TCP_TCC_RW_READ_REQ_sum TCP_TCC_RW_WRITE_REQ_sum TCP_TCC_RW_ATOMIC_REQ_sum SPI_VWC_CSC_WR SPI_RA_BULKY_CU_FULL_CSN TCC_EA0_RDREQ_LEVEL_sum TCC_EA0_WRREQ_LEVEL_sum TCC_EA0_ATOMIC_LEVEL_sum TCC_EA0_WRREQ_STALL_sum
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_9.txt b/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..904365b6ef
--- /dev/null
+++ b/tests/workloads/kernel/MI300A_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ TCP_PENDING_STALL_CYCLES_sum
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300A_A1/perfmon/timestamps.txt b/tests/workloads/kernel/MI300A_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..b327c1ae1b
--- /dev/null
+++ b/tests/workloads/kernel/MI300A_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300A_A1/pmc_perf.csv b/tests/workloads/kernel/MI300A_A1/pmc_perf.csv
new file mode 100644
index 0000000000..8b28bac71b
--- /dev/null
+++ b/tests/workloads/kernel/MI300A_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SQ_INSTS_BRANCH,SQ_INSTS_SENDMSG,SQ_WAIT_ANY,SQ_WAIT_INST_ANY,SQ_ACTIVE_INST_ANY,SQ_ACTIVE_INST_VMEM,SQ_ACTIVE_INST_LDS,SQ_ACTIVE_INST_VALU,SPI_RA_WAVE_SIMD_FULL_CSN,SPI_RA_VGPR_SIMD_FULL_CSN,CPC_CPC_UTCL2IU_STALL,CPC_ME1_BUSY_FOR_PACKET_DECODE,TA_ADDR_STALLED_BY_TC_CYCLES_sum,TA_TOTAL_WAVEFRONTS_sum,TCC_EA0_WRREQ_64B_sum,TCC_EA0_WRREQ_DRAM_sum,TCC_EA0_WRREQ_sum,TCC_EA0_WR_UNCACHED_32B_sum,TCP_UTCL1_PERMISSION_MISS_sum,TCP_UTCL1_REQUEST_sum,TCP_UTCL1_TRANSLATION_HIT_sum,TCP_UTCL1_TRANSLATION_MISS_sum,Wave_Size_1,Correlation_ID_1,XCC_Index,TCC_EA0_WRREQ[0],TCC_EA0_WRREQ_64B[0],TCC_EA0_WRREQ_LEVEL[0],TCC_HIT[0],TCC_EA0_WRREQ[1],TCC_EA0_WRREQ_64B[1],TCC_EA0_WRREQ_LEVEL[1],TCC_HIT[1],TCC_EA0_WRREQ[2],TCC_EA0_WRREQ_64B[2],TCC_EA0_WRREQ_LEVEL[2],TCC_HIT[2],TCC_EA0_WRREQ[3],TCC_EA0_WRREQ_64B[3],TCC_EA0_WRREQ_LEVEL[3],TCC_HIT[3],TCC_EA0_WRREQ[4],TCC_EA0_WRREQ_64B[4],TCC_EA0_WRREQ_LEVEL[4],TCC_HIT[4],TCC_EA0_WRREQ[5],TCC_EA0_WRREQ_64B[5],TCC_EA0_WRREQ_LEVEL[5],TCC_HIT[5],TCC_EA0_WRREQ[6],TCC_EA0_WRREQ_64B[6],TCC_EA0_WRREQ_LEVEL[6],TCC_HIT[6],TCC_EA0_WRREQ[7],TCC_EA0_WRREQ_64B[7],TCC_EA0_WRREQ_LEVEL[7],TCC_HIT[7],TCC_EA0_WRREQ[8],TCC_EA0_WRREQ_64B[8],TCC_EA0_WRREQ_LEVEL[8],TCC_HIT[8],TCC_EA0_WRREQ[9],TCC_EA0_WRREQ_64B[9],TCC_EA0_WRREQ_LEVEL[9],TCC_HIT[9],TCC_EA0_WRREQ[10],TCC_EA0_WRREQ_64B[10],TCC_EA0_WRREQ_LEVEL[10],TCC_HIT[10],TCC_EA0_WRREQ[11],TCC_EA0_WRREQ_64B[11],TCC_EA0_WRREQ_LEVEL[11],TCC_HIT[11],TCC_EA0_WRREQ[12],TCC_EA0_WRREQ_64B[12],TCC_EA0_WRREQ_LEVEL[12],TCC_HIT[12],TCC_EA0_WRREQ[13],TCC_EA0_WRREQ_64B[13],TCC_EA0_WRREQ_LEVEL[13],TCC_HIT[13],TCC_EA0_WRREQ[14],TCC_EA0_WRREQ_64B[14],TCC_EA0_WRREQ_LEVEL[14],TCC_HIT[14],TCC_EA0_WRREQ[15],TCC_EA0_WRREQ_64B[15],TCC_EA0_WRREQ_LEVEL[15],TCC_HIT[15],TCC_EA0_WRREQ[16],TCC_EA0_WRREQ_64B[16],TCC_EA0_WRREQ_LEVEL[16],TCC_HIT[16],TCC_EA0_WRREQ[17],TCC_EA0_WRREQ_64B[17],TCC_EA0_WRREQ_LEVEL[17],TCC_HIT[17],TCC_EA0_WRREQ[18],TCC_EA0_WRREQ_64B[18],TCC_EA0_WRREQ_LEVEL[18],TCC_HIT[18],TCC_EA0_WRREQ[19],TCC_EA0_WRREQ_64B[19],TCC_EA0_WRREQ_LEVEL[19],TCC_HIT[19],TCC_EA0_WRREQ[20],TCC_EA0_WRREQ_64B[20],TCC_EA0_WRREQ_LEVEL[20],TCC_HIT[20],TCC_EA0_WRREQ[21],TCC_EA0_WRREQ_64B[21],TCC_EA0_WRREQ_LEVEL[21],TCC_HIT[21],TCC_EA0_WRREQ[22],TCC_EA0_WRREQ_64B[22],TCC_EA0_WRREQ_LEVEL[22],TCC_HIT[22],TCC_EA0_WRREQ[23],TCC_EA0_WRREQ_64B[23],TCC_EA0_WRREQ_LEVEL[23],TCC_HIT[23],TCC_EA0_WRREQ[24],TCC_EA0_WRREQ_64B[24],TCC_EA0_WRREQ_LEVEL[24],TCC_HIT[24],TCC_EA0_WRREQ[25],TCC_EA0_WRREQ_64B[25],TCC_EA0_WRREQ_LEVEL[25],TCC_HIT[25],TCC_EA0_WRREQ[26],TCC_EA0_WRREQ_64B[26],TCC_EA0_WRREQ_LEVEL[26],TCC_HIT[26],TCC_EA0_WRREQ[27],TCC_EA0_WRREQ_64B[27],TCC_EA0_WRREQ_LEVEL[27],TCC_HIT[27],TCC_EA0_WRREQ[28],TCC_EA0_WRREQ_64B[28],TCC_EA0_WRREQ_LEVEL[28],TCC_HIT[28],TCC_EA0_WRREQ[29],TCC_EA0_WRREQ_64B[29],TCC_EA0_WRREQ_LEVEL[29],TCC_HIT[29],TCC_EA0_WRREQ[30],TCC_EA0_WRREQ_64B[30],TCC_EA0_WRREQ_LEVEL[30],TCC_HIT[30],TCC_EA0_WRREQ[31],TCC_EA0_WRREQ_64B[31],TCC_EA0_WRREQ_LEVEL[31],TCC_HIT[31],TCC_EA0_WRREQ[32],TCC_EA0_WRREQ_64B[32],TCC_EA0_WRREQ_LEVEL[32],TCC_HIT[32],TCC_EA0_WRREQ[33],TCC_EA0_WRREQ_64B[33],TCC_EA0_WRREQ_LEVEL[33],TCC_HIT[33],TCC_EA0_WRREQ[34],TCC_EA0_WRREQ_64B[34],TCC_EA0_WRREQ_LEVEL[34],TCC_HIT[34],TCC_EA0_WRREQ[35],TCC_EA0_WRREQ_64B[35],TCC_EA0_WRREQ_LEVEL[35],TCC_HIT[35],TCC_EA0_WRREQ[36],TCC_EA0_WRREQ_64B[36],TCC_EA0_WRREQ_LEVEL[36],TCC_HIT[36],TCC_EA0_WRREQ[37],TCC_EA0_WRREQ_64B[37],TCC_EA0_WRREQ_LEVEL[37],TCC_HIT[37],TCC_EA0_WRREQ[38],TCC_EA0_WRREQ_64B[38],TCC_EA0_WRREQ_LEVEL[38],TCC_HIT[38],TCC_EA0_WRREQ[39],TCC_EA0_WRREQ_64B[39],TCC_EA0_WRREQ_LEVEL[39],TCC_HIT[39],TCC_EA0_WRREQ[40],TCC_EA0_WRREQ_64B[40],TCC_EA0_WRREQ_LEVEL[40],TCC_HIT[40],TCC_EA0_WRREQ[41],TCC_EA0_WRREQ_64B[41],TCC_EA0_WRREQ_LEVEL[41],TCC_HIT[41],TCC_EA0_WRREQ[42],TCC_EA0_WRREQ_64B[42],TCC_EA0_WRREQ_LEVEL[42],TCC_HIT[42],TCC_EA0_WRREQ[43],TCC_EA0_WRREQ_64B[43],TCC_EA0_WRREQ_LEVEL[43],TCC_HIT[43],TCC_EA0_WRREQ[44],TCC_EA0_WRREQ_64B[44],TCC_EA0_WRREQ_LEVEL[44],TCC_HIT[44],TCC_EA0_WRREQ[45],TCC_EA0_WRREQ_64B[45],TCC_EA0_WRREQ_LEVEL[45],TCC_HIT[45],TCC_EA0_WRREQ[46],TCC_EA0_WRREQ_64B[46],TCC_EA0_WRREQ_LEVEL[46],TCC_HIT[46],TCC_EA0_WRREQ[47],TCC_EA0_WRREQ_64B[47],TCC_EA0_WRREQ_LEVEL[47],TCC_HIT[47],TCC_EA0_WRREQ[48],TCC_EA0_WRREQ_64B[48],TCC_EA0_WRREQ_LEVEL[48],TCC_HIT[48],TCC_EA0_WRREQ[49],TCC_EA0_WRREQ_64B[49],TCC_EA0_WRREQ_LEVEL[49],TCC_HIT[49],TCC_EA0_WRREQ[50],TCC_EA0_WRREQ_64B[50],TCC_EA0_WRREQ_LEVEL[50],TCC_HIT[50],TCC_EA0_WRREQ[51],TCC_EA0_WRREQ_64B[51],TCC_EA0_WRREQ_LEVEL[51],TCC_HIT[51],TCC_EA0_WRREQ[52],TCC_EA0_WRREQ_64B[52],TCC_EA0_WRREQ_LEVEL[52],TCC_HIT[52],TCC_EA0_WRREQ[53],TCC_EA0_WRREQ_64B[53],TCC_EA0_WRREQ_LEVEL[53],TCC_HIT[53],TCC_EA0_WRREQ[54],TCC_EA0_WRREQ_64B[54],TCC_EA0_WRREQ_LEVEL[54],TCC_HIT[54],TCC_EA0_WRREQ[55],TCC_EA0_WRREQ_64B[55],TCC_EA0_WRREQ_LEVEL[55],TCC_HIT[55],TCC_EA0_WRREQ[56],TCC_EA0_WRREQ_64B[56],TCC_EA0_WRREQ_LEVEL[56],TCC_HIT[56],TCC_EA0_WRREQ[57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CED_WRITE_CYCLES_sum,TCC_ATOMIC_sum,TCC_READ_sum,TCC_WRITEBACK_sum,TCC_WRITE_sum,TCP_TOTAL_ATOMIC_WITHOUT_RET_sum,TCP_TOTAL_ATOMIC_WITH_RET_sum,TCP_TOTAL_CACHE_ACCESSES_sum,TCP_TOTAL_WRITEBACK_INVALIDATES_sum,TD_COALESCABLE_WAVEFRONT_sum,Wave_Size_5,Correlation_ID_5,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,TA_FLAT_ATOMIC_WAVEFRONTS_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,TCC_ALL_TC_OP_INV_EVICT_sum,TCC_EA0_ATOMIC_sum,TCC_NORMAL_EVICT_sum,TCC_TOO_MANY_EA_WRREQS_STALL_sum,TCP_TCC_CC_READ_REQ_sum,TCP_TCC_CC_WRITE_REQ_sum,TCP_TCC_UC_ATOMIC_REQ_sum,TCP_TCC_UC_WRITE_REQ_sum,Wave_Size_6,Correlation_ID_6,XCC_Index_6,TCC_MISS[0],TCC_READ[0],TCC_REQ[0],TCC_RW_REQ[0],TCC_MISS[1],TCC_READ[1],TCC_REQ[1],TCC_RW_REQ[1],TCC_MISS[2],TCC_READ[2],TCC_REQ[2],TCC_RW_REQ[2],TCC_MISS[3],TCC_READ[3],TCC_REQ[3],TCC_RW_REQ[3],TCC_MISS[4],TCC_READ[4],TCC_REQ[4],TCC_RW_REQ[4],TCC_MISS[5],TCC_READ[5],TCC_REQ[5],TCC_RW_REQ[5],TCC_MISS[6],TCC_READ[6],TCC_REQ[6],TCC_RW_REQ[6],TCC_MISS[7],TCC_READ[7],TCC_REQ[7],TCC_RW_REQ[7],TCC_MISS[8],TCC_READ[8],TCC_REQ[8],TCC_RW_REQ[8],TCC_MISS[9],TCC_READ[9],TCC_REQ[9],TCC_RW_REQ[9],TCC_MISS[10],TCC_READ[10],TCC_REQ[10],TCC_RW_REQ[10],TCC_MISS[11],TCC_READ[11],TCC_REQ[11],TCC_RW_REQ[11],TCC_MISS[12],TCC_READ[12],TCC_REQ[12],TCC_RW_REQ[12],TCC_MISS[13],TCC_READ[13],TCC_REQ[13],TCC_RW_REQ[13],TCC_MISS[14],TCC_READ[14],TCC_REQ[14],TCC_RW_REQ[14],TCC_MISS[15],TCC_READ[15],TCC_REQ[15],TCC_RW_REQ[15],TCC_MISS[16],TCC_READ[16],TCC_REQ[16],TCC_RW_REQ[16],TCC_MISS[17],TCC_READ[17],TCC_REQ[17],TCC_RW_REQ[17],TCC_MISS[18],TCC_READ[18],TCC_REQ[18],TCC_RW_REQ[18],TCC_MISS[19],TCC_READ[19],TCC_REQ[19],TCC_RW_REQ[19],TCC_MISS[20],TCC_READ[20],TCC_REQ[20],TCC_RW_REQ[20],TCC_MISS[21],TCC_READ[21],TCC_REQ[21],TCC_RW_REQ[21],TCC_MISS[22],TCC_READ[22],TCC_REQ[22],TCC_RW_REQ[22],TCC_MISS[23],TCC_READ[23],TCC_REQ[23],TCC_RW_REQ[23],TCC_MISS[24],TCC_READ[24],TCC_REQ[24],TCC_RW_REQ[24],TCC_MISS[25],TCC_READ[25],TCC_REQ[25],TCC_RW_REQ[25],TCC_MISS[26],TCC_READ[26],TCC_REQ[26],TCC_RW_REQ[26],TCC_MISS[27],TCC_READ[27],TCC_REQ[27],TCC_RW_REQ[27],TCC_MISS[28],TCC_READ[28],TCC_REQ[28],TCC_RW_REQ[28],TCC_MISS[29],TCC_READ[29],TCC_REQ[29],TCC_RW_REQ[29],TCC_MISS[30],TCC_READ[30],TCC_REQ[30],TCC_RW_REQ[30],TCC_MISS[31],TCC_READ[31],TCC_REQ[31],TCC_RW_REQ[31],TCC_MISS[32],TCC_READ[32],TCC_REQ[32],TCC_RW_REQ[32],TCC_MISS[33],TCC_READ[33],TCC_REQ[33],TCC_RW_REQ[33],TCC_MISS[34],TCC_READ[34],TCC_REQ[34],TCC_RW_REQ[34],TCC_MISS[35],TCC_READ[35],TCC_REQ[35],TCC_RW_REQ[35],TCC_MISS[36],TCC_READ[36],TCC_REQ[36],TCC_RW_REQ[36],TCC_MISS[37],TCC_READ[37],TCC_REQ[37],TCC_RW_REQ[37],TCC_MISS[38],TCC_READ[38],TCC_REQ[38],TCC_RW_REQ[38],TCC_MISS[39],TCC_READ[39],TCC_REQ[39],TCC_RW_REQ[39],TCC_MISS[40],TCC_READ[40],TCC_REQ[40],TCC_RW_REQ[40],TCC_MISS[41],TCC_READ[41],TCC_REQ[41],TCC_RW_REQ[41],TCC_MISS[42],TCC_READ[42],TCC_REQ[42],TCC_RW_REQ[42],TCC_MISS[43],TCC_READ[43],TCC_REQ[43],TCC_RW_REQ[43],TCC_MISS[44],TCC_READ[44],TCC_REQ[44],TCC_RW_REQ[44],TCC_MISS[45],TCC_READ[45],TCC_REQ[45],TCC_RW_REQ[45],TCC_MISS[46],TCC_READ[46],TCC_REQ[46],TCC_RW_REQ[46],TCC_MISS[47],TCC_READ[47],TCC_REQ[47],TCC_RW_REQ[47],TCC_MISS[48],TCC_READ[48],TCC_REQ[48],TCC_RW_REQ[48],TCC_MISS[49],TCC_READ[49],TCC_REQ[49],TCC_RW_REQ[49],TCC_MISS[50],TCC_READ[50],TCC_REQ[50],TCC_RW_REQ[50],TCC_MISS[51],TCC_READ[51],TCC_REQ[51],TCC_RW_REQ[51],TCC_MISS[52],TCC_READ[52],TCC_REQ[52],TCC_RW_REQ[52],TCC_MISS[53],TCC_READ[53],TCC_REQ[53],TCC_RW_REQ[53],TCC_MISS[54],TCC_READ[54],TCC_REQ[54],TCC_RW_REQ[54],TCC_MISS[55],TCC_READ[55],TCC_REQ[55],TCC_RW_REQ[55],TCC_MISS[56],TCC_READ[56],TCC_REQ[56],TCC_RW_REQ[56],TCC_MISS[57],TCC_READ[57],TCC_REQ[57],TCC_RW_REQ[57],TCC_MISS[58],TCC_READ[58],TCC_REQ[58],TCC_RW_REQ[58],TCC_MISS[59],TCC_READ[59],TCC_REQ[59],TCC_RW_REQ[59],TCC_MISS[60],TCC_READ[60],TCC_REQ[60],TCC_RW_REQ[60],TCC_MISS[61],TCC_READ[61],TCC_REQ[61],TCC_RW_REQ[61],TCC_MISS[62],TCC_READ[62],TCC_REQ[62],TCC_RW_REQ[62],TCC_MISS[63],TCC_READ[63],TCC_REQ[63],TCC_RW_REQ[63],TCC_MISS[64],TCC_READ[64],TCC_REQ[64],TCC_RW_REQ[64],TCC_MISS[65],TCC_READ[65],TCC_REQ[65],TCC_RW_REQ[65],TCC_MISS[66],TCC_READ[66],TCC_REQ[66],TCC_RW_REQ[66],TCC_MISS[67],TCC_READ[67],TCC_REQ[67],TCC_RW_REQ[67],TCC_MISS[68],TCC_READ[68],TCC_REQ[68],TCC_RW_REQ[68],TCC_MISS[69],TCC_READ[69],TCC_REQ[69],TCC_RW_REQ[69],TCC_MISS[70],TCC_READ[70],TCC_REQ[70],TCC_RW_REQ[70],TCC_MISS[71],TCC_READ[71],TCC_REQ[71],TCC_RW_REQ[71],TCC_MISS[72],TCC_READ[72],TCC_REQ[72],TCC_RW_REQ[72],TCC_MISS[73],TCC_READ[73],TCC_REQ[73],TCC_RW_REQ[73],TCC_MISS[74],TCC_READ[74],TCC_REQ[74],TCC_RW_REQ[74],TCC_MISS[75],TCC_READ[75],TCC_REQ[75],TCC_RW_REQ[75],TCC_MISS[76],TCC_READ[76],TCC_REQ[76],TCC_RW_REQ[76],TCC_MISS[77],TCC_READ[77],TCC_REQ[77],TCC_RW_REQ[77],TCC_MISS[78],TCC_READ[78],TCC_REQ[78],TCC_RW_REQ[78],TCC_MISS[79],TCC_READ[79],TCC_REQ[79],TCC_RW_REQ[79],TCC_MISS[80],TCC_READ[80],TCC_REQ[80],TCC_RW_REQ[80],TCC_MISS[81],TCC_READ[81],TCC_REQ[81],TCC_RW_REQ[81],TCC_MISS[82],TCC_READ[82],TCC_REQ[82],TCC_RW_REQ[82],TCC_MISS[83],TCC_READ[83],TCC_REQ[83],TCC_RW_REQ[83],TCC_MISS[84],TCC_READ[84],TCC_REQ[84],TCC_RW_REQ[84],TCC_MISS[85],TCC_READ[85],TCC_REQ[85],TCC_RW_REQ[85],TCC_MISS[86],TCC_READ[86],TCC_REQ[86],TCC_RW_REQ[86],TCC_MISS[87],TCC_READ[87],TCC_REQ[87],TCC_RW_REQ[87],TCC_MISS[88],TCC_READ[88],TCC_REQ[88],TCC_RW_REQ[88],TCC_MISS[89],TCC_READ[89],TCC_REQ[89],TCC_RW_REQ[89],TCC_MISS[90],TCC_READ[90],TCC_REQ[90],TCC_RW_REQ[90],TCC_MISS[91],TCC_READ[91],TCC_REQ[91],TCC_RW_REQ[91],TCC_MISS[92],TCC_READ[92],TCC_REQ[92],TCC_RW_REQ[92],TCC_MISS[93],TCC_READ[93],TCC_REQ[93],TCC_RW_REQ[93],TCC_MISS[94],TCC_READ[94],TCC_REQ[94],TCC_RW_REQ[94],TCC_MISS[95],TCC_READ[95],TCC_REQ[95],TCC_RW_REQ[95],Wave_Size_7,Correlation_ID_7,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SPI_RA_REQ_NO_ALLOC,SPI_RA_REQ_NO_ALLOC_CSN,CPC_CPC_STAT_STALL,CPC_UTCL1_STALL_ON_TRANSLATION,CPF_CPF_STAT_IDLE,CPF_CPF_TCIU_IDLE,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,TA_BUFFER_TOTAL_CYCLES_sum,TCC_HIT_sum,TCC_MISS_sum,TCC_REQ_sum,TCC_STREAMING_REQ_sum,TCP_TOTAL_ACCESSES_sum,TCP_TOTAL_READ_sum,TCP_TOTAL_WRITE_sum,TCP_VOLATILE_sum,TD_ATOMIC_WAVEFRONT_sum,TD_STORE_WAVEFRONT_sum,Wave_Size_8,Correlation_ID_8,XCC_Index_8,TCC_ATOMIC[0],TCC_BUBBLE[0],TCC_CYCLE[0],TCC_EA0_ATOMIC[0],TCC_ATOMIC[1],TCC_BUBBLE[1],TCC_CYCLE[1],TCC_EA0_ATOMIC[1],TCC_ATOMIC[2],TCC_BUBBLE[2],TCC_CYCLE[2],TCC_EA0_ATOMIC[2],TCC_ATOMIC[3],TCC_BUBBLE[3],TCC_CYCLE[3],TCC_EA0_ATOMIC[3],TCC_ATOMIC[4],TCC_BUBBLE[4],TCC_CYCLE[4],TCC_EA0_ATOMIC[4],TCC_ATOMIC[5],TCC_BUBBLE[5],TCC_CYCLE[5],TCC_EA0_ATOMIC[5],TCC_ATOMIC[6],TCC_BUBBLE[6],TCC_CYCLE[6],TCC_EA0_ATOMIC[6],TCC_ATOMIC[7],TCC_BUBBLE[7],TCC_CYCLE[7],TCC_EA0_ATOMIC[7],TCC_ATOMIC[8],TCC_BUBBLE[8],TCC_CYCLE[8],TCC_EA0_ATOMIC[8],TCC_ATOMIC[9],TCC_BUBBLE[9],TCC_CYCLE[9],TCC_EA0_ATOMIC[9],TCC_ATOMIC[10],TCC_BUBBLE[10],TCC_CYCLE[10],TCC_EA0_ATOMIC[10],TCC_ATOMIC[11],TCC_BUBBLE[11],TCC_CYCLE[11],TCC_EA0_ATOMIC[11],TCC_ATOMIC[12],TCC_BUBBLE[12],TCC_CYCLE[12],TCC_EA0_ATOMIC[12],TCC_ATOMIC[13],TCC_BUBBLE[13],TCC_CYCLE[13],TCC_EA0_ATOMIC[13],TCC_ATOMIC[14],TCC_BUBBLE[14],TCC_CYCLE[14],TCC_EA0_ATOMIC[14],TCC_ATOMIC[15],TCC_BUBBLE[15],TCC_CYCLE[15],TCC_EA0_ATOMIC[15],TCC_ATOMIC[16],TCC_BUBBLE[16],TCC_CYCLE[16],TCC_EA0_ATOMIC[16],TCC_ATOMIC[17],TCC_BUBBLE[17],TCC_CYCLE[17],TCC_EA0_ATOMIC[17],TCC_ATOMIC[18],TCC_BUBBLE[18],TCC_CYCLE[18],TCC_EA0_ATOMIC[18],TCC_ATOMIC[19],TCC_BUBBLE[19],TCC_CYCLE[19],TCC_EA0_ATOMIC[19],TCC_ATOMIC[20],TCC_BUBBLE[20],TCC_CYCLE[20],TCC_EA0_ATOMIC[20],TCC_ATOMIC[21],TCC_BUBBLE[21],TCC_CYCLE[21],TCC_EA0_ATOMIC[21],TCC_ATOMIC[22],TCC_BUBBLE[22],TCC_CYCLE[22],TCC_EA0_ATOMIC[22],TCC_ATOMIC[23],TCC_BUBBLE[23],TCC_CYCLE[23],TCC_EA0_ATOMIC[23],TCC_ATOMIC[24],TCC_BUBBLE[24],TCC_CYCLE[24],TCC_EA0_ATOMIC[24],TCC_ATOMIC[25],TCC_BUBBLE[25],TCC_CYCLE[25],TCC_EA0_ATOMIC[25],TCC_ATOMIC[26],TCC_BUBBLE[26],TCC_CYCLE[26],TCC_EA0_ATOMIC[26],TCC_ATOMIC[27],TCC_BUBBLE[27],TCC_CYCLE[27],TCC_EA0_ATOMIC[27],TCC_ATOMIC[28],TCC_BUBBLE[28],TCC_CYCLE[28],TCC_EA0_ATOMIC[28],TCC_ATOMIC[29],TCC_BUBBLE[29],TCC_CYCLE[29],TCC_EA0_ATOMIC[29],TCC_ATOMIC[30],TCC_BUBBLE[30],TCC_CYCLE[30],TCC_EA0_ATOMIC[30],TCC_ATOMIC[31],TCC_BUBBLE[31],TCC_CYCLE[31],TCC_EA0_ATOMIC[31],TCC_ATOMIC[32],TCC_BUBBLE[32],TCC_CYCLE[32],TCC_EA0_ATOMIC[32],TCC_ATOMIC[33],TCC_BUBBLE[33],TCC_CYCLE[33],TCC_EA0_ATOMIC[33],TCC_ATOMIC[34],TCC_BUBBLE[34],TCC_CYCLE[34],TCC_EA0_ATOMIC[34],TCC_ATOMIC[35],TCC_BUBBLE[35],TCC_CYCLE[35],TCC_EA0_ATOMIC[35],TCC_ATOMIC[36],TCC_BUBBLE[36],TCC_CYCLE[36],TCC_EA0_ATOMIC[36],TCC_ATOMIC[37],TCC_BUBBLE[37],TCC_CYCLE[37],TCC_EA0_ATOMIC[37],TCC_ATOMIC[38],TCC_BUBBLE[38],TCC_CYCLE[38],TCC_EA0_ATOMIC[38],TCC_ATOMIC[39],TCC_BUBBLE[39],TCC_CYCLE[39],TCC_EA0_ATOMIC[39],TCC_ATOMIC[40],TCC_BUBBLE[40],TCC_CYCLE[40],TCC_EA0_ATOMIC[40],TCC_ATOMIC[41],TCC_BUBBLE[41],TCC_CYCLE[41],TCC_EA0_ATOMIC[41],TCC_ATOMIC[42],TCC_BUBBLE[42],TCC_CYCLE[42],TCC_EA0_ATOMIC[42],TCC_ATOMIC[43],TCC_BUBBLE[43],TCC_CYCLE[43],TCC_EA0_ATOMIC[43],TCC_ATOMIC[44],TCC_BUBBLE[44],TCC_CYCLE[44],TCC_EA0_ATOMIC[44],TCC_ATOMIC[45],TCC_BUBBLE[45],TCC_CYCLE[45],TCC_EA0_ATOMIC[45],TCC_ATOMIC[46],TCC_BUBBLE[46],TCC_CYCLE[46],TCC_EA0_ATOMIC[46],TCC_ATOMIC[47],TCC_BUBBLE[47],TCC_CYCLE[47],TCC_EA0_ATOMIC[47],TCC_ATOMIC[48],TCC_BUBBLE[48],TCC_CYCLE[48],TCC_EA0_ATOMIC[48],TCC_ATOMIC[49],TCC_BUBBLE[49],TCC_CYCLE[49],TCC_EA0_ATOMIC[49],TCC_ATOMIC[50],TCC_BUBBLE[50],TCC_CYCLE[50],TCC_EA0_ATOMIC[50],TCC_ATOMIC[51],TCC_BUBBLE[51],TCC_CYCLE[51],TCC_EA0_ATOMIC[51],TCC_ATOMIC[52],TCC_BUBBLE[52],TCC_CYCLE[52],TCC_EA0_ATOMIC[52],TCC_ATOMIC[53],TCC_BUBBLE[53],TCC_CYCLE[53],TCC_EA0_ATOMIC[53],TCC_ATOMIC[54],TCC_BUBBLE[54],TCC_CYCLE[54],TCC_EA0_ATOMIC[54],TCC_ATOMIC[55],TCC_BUBBLE[55],TCC_CYCLE[55],TCC_EA0_ATOMIC[55],TCC_ATOMIC[56],TCC_BUBBLE[56],TCC_CYCLE[56],TCC_EA0_ATOMIC[56],TCC_ATOMIC[57],TCC_BUBBLE[57],TCC_CYCLE[57],TCC_EA0_ATOMIC[57],TCC_ATOMIC[58],TCC_BUBBLE[58],TCC_CYCLE[58],TCC_EA0_ATOMIC[58],TCC_ATOMIC[59],TCC_BUBBLE[59],TCC_CYCLE[59],TCC_EA0_ATOMIC[59],TCC_ATOMIC[60],TCC_BUBBLE[60],TCC_CYCLE[60],TCC_EA0_ATOMIC[60],TCC_ATOMIC[61],TCC_BUBBLE[61],TCC_CYCLE[61],TCC_EA0_ATOMIC[61],TCC_ATOMIC[62],TCC_BUBBLE[62],TCC_CYCLE[62],TCC_EA0_ATOMIC[62],TCC_ATOMIC[63],TCC_BUBBLE[63],TCC_CYCLE[63],TCC_EA0_ATOMIC[63],TCC_ATOMIC[64],TCC_BUBBLE[64],TCC_CYCLE[64],TCC_EA0_ATOMIC[64],TCC_ATOMIC[65],TCC_BUBBLE[65],TCC_CYCLE[65],TCC_EA0_ATOMIC[65],TCC_ATOMIC[66],TCC_BUBBLE[66],TCC_CYCLE[66],TCC_EA0_ATOMIC[66],TCC_ATOMIC[67],TCC_BUBBLE[67],TCC_CYCLE[67],TCC_EA0_ATOMIC[67],TCC_ATOMIC[68],TCC_BUBBLE[68],TCC_CYCLE[68],TCC_EA0_ATOMIC[68],TCC_ATOMIC[69],TCC_BUBBLE[69],TCC_CYCLE[69],TCC_EA0_ATOMIC[69],TCC_ATOMIC[70],TCC_BUBBLE[70],TCC_CYCLE[70],TCC_EA0_ATOMIC[70],TCC_ATOMIC[71],TCC_BUBBLE[71],TCC_CYCLE[71],TCC_EA0_ATOMIC[71],TCC_ATOMIC[72],TCC_BUBBLE[72],TCC_CYCLE[72],TCC_EA0_ATOMIC[72],TCC_ATOMIC[73],TCC_BUBBLE[73],TCC_CYCLE[73],TCC_EA0_ATOMIC[73],TCC_ATOMIC[74],TCC_BUBBLE[74],TCC_CYCLE[74],TCC_EA0_ATOMIC[74],TCC_ATOMIC[75],TCC_BUBBLE[75],TCC_CYCLE[75],TCC_EA0_ATOMIC[75],TCC_ATOMIC[76],TCC_BUBBLE[76],TCC_CYCLE[76],TCC_EA0_ATOMIC[76],TCC_ATOMIC[77],TCC_BUBBLE[77],TCC_CYCLE[77],TCC_EA0_ATOMIC[77],TCC_ATOMIC[78],TCC_BUBBLE[78],TCC_CYCLE[78],TCC_EA0_ATOMIC[78],TCC_ATOMIC[79],TCC_BUBBLE[79],TCC_CYCLE[79],TCC_EA0_ATOMIC[79],TCC_ATOMIC[80],TCC_BUBBLE[80],TCC_CYCLE[80],TCC_EA0_ATOMIC[80],TCC_ATOMIC[81],TCC_BUBBLE[81],TCC_CYCLE[81],TCC_EA0_ATOMIC[81],TCC_ATOMIC[82],TCC_BUBBLE[82],TCC_CYCLE[82],TCC_EA0_ATOMIC[82],TCC_ATOMIC[83],TCC_BUBBLE[83],TCC_CYCLE[83],TCC_EA0_ATOMIC[83],TCC_ATOMIC[84],TCC_BUBBLE[84],TCC_CYCLE[84],TCC_EA0_ATOMIC[84],TCC_ATOMIC[85],TCC_BUBBLE[85],TCC_CYCLE[85],TCC_EA0_ATOMIC[85],TCC_ATOMIC[86],TCC_BUBBLE[86],TCC_CYCLE[86],TCC_EA0_ATOMIC[86],TCC_ATOMIC[87],TCC_BUBBLE[87],TCC_CYCLE[87],TCC_EA0_ATOMIC[87],TCC_ATOMIC[88],TCC_BUBBLE[88],TCC_CYCLE[88],TCC_EA0_ATOMIC[88],TCC_ATOMIC[89],TCC_BUBBLE[89],TCC_CYCLE[89],TCC_EA0_ATOMIC[89],TCC_ATOMIC[90],TCC_BUBBLE[90],TCC_CYCLE[90],TCC_EA0_ATOMIC[90],TCC_ATOMIC[91],TCC_BUBBLE[91],TCC_CYCLE[91],TCC_EA0_ATOMIC[91],TCC_ATOMIC[92],TCC_BUBBLE[92],TCC_CYCLE[92],TCC_EA0_ATOMIC[92],TCC_ATOMIC[93],TCC_BUBBLE[93],TCC_CYCLE[93],TCC_EA0_ATOMIC[93],TCC_ATOMIC[94],TCC_BUBBLE[94],TCC_CYCLE[94],TCC_EA0_ATOMIC[94],TCC_ATOMIC[95],TCC_BUBBLE[95],TCC_CYCLE[95],TCC_EA0_ATOMIC[95],Wave_Size_9,Correlation_ID_9,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_10,Correlation_ID_10,SQC_TC_DATA_ATOMIC_REQ,SQC_TC_STALL,SQC_TC_REQ,SQC_DCACHE_REQ_READ_16,SQC_ICACHE_REQ,SQC_ICACHE_HITS,SQC_ICACHE_MISSES,SQC_ICACHE_MISSES_DUPLICATE,Wave_Size_11,Correlation_ID_11,SQ_INSTS_VALU_MFMA_MOPS_I8,SQ_INSTS_VALU_MFMA_MOPS_F16,SQ_INSTS_VALU_MFMA_MOPS_BF16,SQ_INSTS_VALU_MFMA_MOPS_F32,SQ_INSTS_VALU_MFMA_MOPS_F64,SQC_TC_INST_REQ,SQC_TC_DATA_READ_REQ,SQC_TC_DATA_WRITE_REQ,TCP_PENDING_STALL_CYCLES_sum,Wave_Size_12,Correlation_ID_12,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,TCC_EA0_ATOMIC_LEVEL_sum,TCC_EA0_RDREQ_LEVEL_sum,TCC_EA0_WRREQ_LEVEL_sum,TCC_EA0_WRREQ_STALL_sum,TCP_TCC_CC_ATOMIC_REQ_sum,TCP_TCC_RW_ATOMIC_REQ_sum,TCP_TCC_RW_READ_REQ_sum,TCP_TCC_RW_WRITE_REQ_sum,Wave_Size_13,Correlation_ID_13,SQC_DCACHE_REQ_READ_2,SQC_DCACHE_REQ_READ_4,Wave_Size_14,Correlation_ID_14,SQ_ACTIVE_INST_SCA,SQ_ACTIVE_INST_EXP_GDS,SQ_ACTIVE_INST_MISC,SQ_ACTIVE_INST_FLAT,SQ_INST_CYCLES_VMEM_WR,SQ_INST_CYCLES_VMEM_RD,SQ_INST_CYCLES_SMEM,SQ_INST_CYCLES_SALU,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,CPC_ME1_DC0_SPI_BUSY,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,TCC_BUBBLE_sum,TCC_EA0_RDREQ_32B_sum,TCC_EA0_RDREQ_sum,TCC_EA0_RD_UNCACHED_32B_sum,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,TCP_TCC_READ_REQ_sum,TCP_TCC_WRITE_REQ_sum,Wave_Size_15,Correlation_ID_15,XCC_Index_15,TCC_EA0_ATOMIC_LEVEL[0],TCC_EA0_RDREQ[0],TCC_EA0_RDREQ_32B[0],TCC_EA0_RDREQ_LEVEL[0],TCC_EA0_ATOMIC_LEVEL[1],TCC_EA0_RDREQ[1],TCC_EA0_RDREQ_32B[1],TCC_EA0_RDREQ_LEVEL[1],TCC_EA0_ATOMIC_LEVEL[2],TCC_EA0_RDREQ[2],TCC_EA0_RDREQ_32B[2],TCC_EA0_RDREQ_LEVEL[2],TCC_EA0_ATOMIC_LEVEL[3],TCC_EA0_RDREQ[3],TCC_EA0_RDREQ_32B[3],TCC_EA0_RDREQ_LEVEL[3],TCC_EA0_ATOMIC_LEVEL[4],TCC_EA0_RDREQ[4],TCC_EA0_RDREQ_32B[4],TCC_EA0_RDREQ_LEVEL[4],TCC_EA0_ATOMIC_LEVEL[5],TCC_EA0_RDREQ[5],TCC_EA0_RDREQ_32B[5],TCC_EA0_RDREQ_LEVEL[5],TCC_EA0_ATOMIC_LEVEL[6],TCC_EA0_RDREQ[6],TCC_EA0_RDREQ_32B[6],TCC_EA0_RDREQ_LEVEL[6],TCC_EA0_ATOMIC_LEVEL[7],TCC_EA0_RDREQ[7],TCC_EA0_RDREQ_32B[7],TCC_EA0_RDREQ_LEVEL[7],TCC_EA0_ATOMIC_LEVEL[8],TCC_EA0_RDREQ[8],TCC_EA0_RDREQ_32B[8],TCC_EA0_RDREQ_LEVEL[8],TCC_EA0_ATOMIC_LEVEL[9],TCC_EA0_RDREQ[9],TCC_EA0_RDREQ_32B[9],TCC_EA0_RDREQ_LEVEL[9],TCC_EA0_ATOMIC_LEVEL[10],TCC_EA0_RDREQ[10],TCC_EA0_RDREQ_32B[10],TCC_EA0_RDREQ_LEVEL[10],TCC_EA0_ATOMIC_LEVEL[11],TCC_EA0_RDREQ[11],TCC_EA0_RDREQ_32B[11],TCC_EA0_RDREQ_LEVEL[11],TCC_EA0_ATOMIC_LEVEL[12],TCC_EA0_RDREQ[12],TCC_EA0_RDREQ_32B[12],TCC_EA0_RDREQ_LEVEL[12],TCC_EA0_ATOMIC_LEVEL[13],TCC_EA0_RDREQ[13],TCC_EA0_RDREQ_32B[13],TCC_EA0_RDREQ_LEVEL[13],TCC_EA0_ATOMIC_LEVEL[14],TCC_EA0_RDREQ[14],TCC_EA0_RDREQ_32B[14],TCC_EA0_RDREQ_LEVEL[14],TCC_EA0_ATOMIC_LEVEL[15],TCC_EA0_RDREQ[15],TCC_EA0_RDREQ_32B[15],TCC_EA0_RDREQ_LEVEL[15],TCC_EA0_ATOMIC_LEVEL[16],TCC_EA0_RDREQ[16],TCC_EA0_RDREQ_32B[16],TCC_EA0_RDREQ_LEVEL[16],TCC_EA0_ATOMIC_LEVEL[17],TCC_EA0_RDREQ[17],TCC_EA0_RDREQ_32B[17],TCC_EA0_RDREQ_LEVEL[17],TCC_EA0_ATOMIC_LEVEL[18],TCC_EA0_RDREQ[18],TCC_EA0_RDREQ_32B[18],TCC_EA0_RDREQ_LEVEL[18],TCC_EA0_ATOMIC_LEVEL[19],TCC_EA0_RDREQ[19],TCC_EA0_RDREQ_32B[19],TCC_EA0_RDREQ_LEVEL[19],TCC_EA0_ATOMIC_LEVEL[20],TCC_EA0_RDREQ[20],TCC_EA0_RDREQ_32B[20],TCC_EA0_RDREQ_LEVEL[20],TCC_EA0_ATOMIC_LEVEL[21],TCC_EA0_RDREQ[21],TCC_EA0_RDREQ_32B[21],TCC_EA0_RDREQ_LEVEL[21],TCC_EA0_ATOMIC_LEVEL[22],TCC_EA0_RDREQ[22],TCC_EA0_RDREQ_32B[22],TCC_EA0_RDREQ_LEVEL[22],TCC_EA0_ATOMIC_LEVEL[23],TCC_EA0_RDREQ[23],TCC_EA0_RDREQ_32B[23],TCC_EA0_RDREQ_LEVEL[23],TCC_EA0_ATOMIC_LEVEL[24],TCC_EA0_RDREQ[24],TCC_EA0_RDREQ_32B[24],TCC_EA0_RDREQ_LEVEL[24],TCC_EA0_ATOMIC_LEVEL[25],TCC_EA0_RDREQ[25],TCC_EA0_RDREQ_32B[25],TCC_EA0_RDREQ_LEVEL[25],TCC_EA0_ATOMIC_LEVEL[26],TCC_EA0_RDREQ[26],TCC_EA0_RDREQ_32B[26],TCC_EA0_RDREQ_LEVEL[26],TCC_EA0_ATOMIC_LEVEL[27],TCC_EA0_RDREQ[27],TCC_EA0_RDREQ_32B[27],TCC_EA0_RDREQ_LEVEL[27],TCC_EA0_ATOMIC_LEVEL[28],TCC_EA0_RDREQ[28],TCC_EA0_RDREQ_32B[28],TCC_EA0_RDREQ_LEVEL[28],TCC_EA0_ATOMIC_LEVEL[29],TCC_EA0_RDREQ[29],TCC_EA0_RDREQ_32B[29],TCC_EA0_RDREQ_LEVEL[29],TCC_EA0_ATOMIC_LEVEL[30],TCC_EA0_RDREQ[30],TCC_EA0_RDREQ_32B[30],TCC_EA0_RDREQ_LEVEL[30],TCC_EA0_ATOMIC_LEVEL[31],TCC_EA0_RDREQ[31],TCC_EA0_RDREQ_32B[31],TCC_EA0_RDREQ_LEVEL[31],TCC_EA0_ATOMIC_LEVEL[32],TCC_EA0_RDREQ[32],TCC_EA0_RDREQ_32B[32],TCC_EA0_RDREQ_LEVEL[32],TCC_EA0_ATOMIC_LEVEL[33],TCC_EA0_RDREQ[33],TCC_EA0_RDREQ_32B[33],TCC_EA0_RDREQ_LEVEL[33],TCC_EA0_ATOMIC_LEVEL[34],TCC_EA0_RDREQ[34],TCC_EA0_RDREQ_32B[34],TCC_EA0_RDREQ_LEVEL[34],TCC_EA0_ATOMIC_LEVEL[35],TCC_EA0_RDREQ[35],TCC_EA0_RDREQ_32B[35],TCC_EA0_RDREQ_LEVEL[35],TCC_EA0_ATOMIC_LEVEL[36],TCC_EA0_RDREQ[36],TCC_EA0_RDREQ_32B[36],TCC_EA0_RDREQ_LEVEL[36],TCC_EA0_ATOMIC_LEVEL[37],TCC_EA0_RDREQ[37],TCC_EA0_RDREQ_32B[37],TCC_EA0_RDREQ_LEVEL[37],TCC_EA0_ATOMIC_LEVEL[38],TCC_EA0_RDREQ[38],TCC_EA0_RDREQ_32B[38],TCC_EA0_RDREQ_LEVEL[38],TCC_EA0_ATOMIC_LEVEL[39],TCC_EA0_RDREQ[39],TCC_EA0_RDREQ_32B[39],TCC_EA0_RDREQ_LEVEL[39],TCC_EA0_ATOMIC_LEVEL[40],TCC_EA0_RDREQ[40],TCC_EA0_RDREQ_32B[40],TCC_EA0_RDREQ_LEVEL[40],TCC_EA0_ATOMIC_LEVEL[41],TCC_EA0_RDREQ[41],TCC_EA0_RDREQ_32B[41],TCC_EA0_RDREQ_LEVEL[41],TCC_EA0_ATOMIC_LEVEL[42],TCC_EA0_RDREQ[42],TCC_EA0_RDREQ_32B[42],TCC_EA0_RDREQ_LEVEL[42],TCC_EA0_ATOMIC_LEVEL[43],TCC_EA0_RDREQ[43],TCC_EA0_RDREQ_32B[43],TCC_EA0_RDREQ_LEVEL[43],TCC_EA0_ATOMIC_LEVEL[44],TCC_EA0_RDREQ[44],TCC_EA0_RDREQ_32B[44],TCC_EA0_RDREQ_LEVEL[44],TCC_EA0_ATOMIC_LEVEL[45],TCC_EA0_RDREQ[45],TCC_EA0_RDREQ_32B[45],TCC_EA0_RDREQ_LEVEL[45],TCC_EA0_ATOMIC_LEVEL[46],TCC_EA0_RDREQ[46],TCC_EA0_RDREQ_32B[46],TCC_EA0_RDREQ_LEVEL[46],TCC_EA0_ATOMIC_LEVEL[47],TCC_EA0_RDREQ[47],TCC_EA0_RDREQ_32B[47],TCC_EA0_RDREQ_LEVEL[47],TCC_EA0_ATOMIC_LEVEL[48],TCC_EA0_RDREQ[48],TCC_EA0_RDREQ_32B[48],TCC_EA0_RDREQ_LEVEL[48],TCC_EA0_ATOMIC_LEVEL[49],TCC_EA0_RDREQ[49],TCC_EA0_RDREQ_32B[49],TCC_EA0_RDREQ_LEVEL[49],TCC_EA0_ATOMIC_LEVEL[50],TCC_EA0_RDREQ[50],TCC_EA0_RDREQ_32B[50],TCC_EA0_RDREQ_LEVEL[50],TCC_EA0_ATOMIC_LEVEL[51],TCC_EA0_RDREQ[51],TCC_EA0_RDREQ_32B[51],TCC_EA0_RDREQ_LEVEL[51],TCC_EA0_ATOMIC_LEVEL[52],TCC_EA0_RDREQ[52],TCC_EA0_RDREQ_32B[52],TCC_EA0_RDREQ_LEVEL[52],TCC_EA0_ATOMIC_LEVEL[53],TCC_EA0_RDREQ[53],TCC_EA0_RDREQ_32B[53],TCC_EA0_RDREQ_LEVEL[53],TCC_EA0_ATOMIC_LEVEL[54],TCC_EA0_RDREQ[54],TCC_EA0_RDREQ_32B[54],TCC_EA0_RDREQ_LEVEL[54],TCC_EA0_ATOMIC_LEVEL[55],TCC_EA0_RDREQ[55],TCC_EA0_RDREQ_32B[55],TCC_EA0_RDREQ_LEVEL[55],TCC_EA0_ATOMIC_LEVEL[56],TCC_EA0_RDREQ[56],TCC_EA0_RDREQ_32B[56],TCC_EA0_RDREQ_LEVEL[56],TCC_EA0_ATOMIC_LEVEL[57],TCC_EA0_RDREQ[57],TCC_EA0_RDREQ_32B[57],TCC_EA0_RDREQ_LEVEL[57],TCC_EA0_ATOMIC_LEVEL[58],TCC_EA0_RDREQ[58],TCC_EA0_RDREQ_32B[58],TCC_EA0_RDREQ_LEVEL[58],TCC_EA0_ATOMIC_LEVEL[59],TCC_EA0_RDREQ[59],TCC_EA0_RDREQ_32B[59],TCC_EA0_RDREQ_LEVEL[59],TCC_EA0_ATOMIC_LEVEL[60],TCC_EA0_RDREQ[60],TCC_EA0_RDREQ_32B[60],TCC_EA0_RDREQ_LEVEL[60],TCC_EA0_ATOMIC_LEVEL[61],TCC_EA0_RDREQ[61],TCC_EA0_RDREQ_32B[61],TCC_EA0_RDREQ_LEVEL[61],TCC_EA0_ATOMIC_LEVEL[62],TCC_EA0_RDREQ[62],TCC_EA0_RDREQ_32B[62],TCC_EA0_RDREQ_LEVEL[62],TCC_EA0_ATOMIC_LEVEL[63],TCC_EA0_RDREQ[63],TCC_EA0_RDREQ_32B[63],TCC_EA0_RDREQ_LEVEL[63],TCC_EA0_ATOMIC_LEVEL[64],TCC_EA0_RDREQ[64],TCC_EA0_RDREQ_32B[64],TCC_EA0_RDREQ_LEVEL[64],TCC_EA0_ATOMIC_LEVEL[65],TCC_EA0_RDREQ[65],TCC_EA0_RDREQ_32B[65],TCC_EA0_RDREQ_LEVEL[65],TCC_EA0_ATOMIC_LEVEL[66],TCC_EA0_RDREQ[66],TCC_EA0_RDREQ_32B[66],TCC_EA0_RDREQ_LEVEL[66],TCC_EA0_ATOMIC_LEVEL[67],TCC_EA0_RDREQ[67],TCC_EA0_RDREQ_32B[67],TCC_EA0_RDREQ_LEVEL[67],TCC_EA0_ATOMIC_LEVEL[68],TCC_EA0_RDREQ[68],TCC_EA0_RDREQ_32B[68],TCC_EA0_RDREQ_LEVEL[68],TCC_EA0_ATOMIC_LEVEL[69],TCC_EA0_RDREQ[69],TCC_EA0_RDREQ_32B[69],TCC_EA0_RDREQ_LEVEL[69],TCC_EA0_ATOMIC_LEVEL[70],TCC_EA0_RDREQ[70],TCC_EA0_RDREQ_32B[70],TCC_EA0_RDREQ_LEVEL[70],TCC_EA0_ATOMIC_LEVEL[71],TCC_EA0_RDREQ[71],TCC_EA0_RDREQ_32B[71],TCC_EA0_RDREQ_LEVEL[71],TCC_EA0_ATOMIC_LEVEL[72],TCC_EA0_RDREQ[72],TCC_EA0_RDREQ_32B[72],TCC_EA0_RDREQ_LEVEL[72],TCC_EA0_ATOMIC_LEVEL[73],TCC_EA0_RDREQ[73],TCC_EA0_RDREQ_32B[73],TCC_EA0_RDREQ_LEVEL[73],TCC_EA0_ATOMIC_LEVEL[74],TCC_EA0_RDREQ[74],TCC_EA0_RDREQ_32B[74],TCC_EA0_RDREQ_LEVEL[74],TCC_EA0_ATOMIC_LEVEL[75],TCC_EA0_RDREQ[75],TCC_EA0_RDREQ_32B[75],TCC_EA0_RDREQ_LEVEL[75],TCC_EA0_ATOMIC_LEVEL[76],TCC_EA0_RDREQ[76],TCC_EA0_RDREQ_32B[76],TCC_EA0_RDREQ_LEVEL[76],TCC_EA0_ATOMIC_LEVEL[77],TCC_EA0_RDREQ[77],TCC_EA0_RDREQ_32B[77],TCC_EA0_RDREQ_LEVEL[77],TCC_EA0_ATOMIC_LEVEL[78],TCC_EA0_RDREQ[78],TCC_EA0_RDREQ_32B[78],TCC_EA0_RDREQ_LEVEL[78],TCC_EA0_ATOMIC_LEVEL[79],TCC_EA0_RDREQ[79],TCC_EA0_RDREQ_32B[79],TCC_EA0_RDREQ_LEVEL[79],TCC_EA0_ATOMIC_LEVEL[80],TCC_EA0_RDREQ[80],TCC_EA0_RDREQ_32B[80],TCC_EA0_RDREQ_LEVEL[80],TCC_EA0_ATOMIC_LEVEL[81],TCC_EA0_RDREQ[81],TCC_EA0_RDREQ_32B[81],TCC_EA0_RDREQ_LEVEL[81],TCC_EA0_ATOMIC_LEVEL[82],TCC_EA0_RDREQ[82],TCC_EA0_RDREQ_32B[82],TCC_EA0_RDREQ_LEVEL[82],TCC_EA0_ATOMIC_LEVEL[83],TCC_EA0_RDREQ[83],TCC_EA0_RDREQ_32B[83],TCC_EA0_RDREQ_LEVEL[83],TCC_EA0_ATOMIC_LEVEL[84],TCC_EA0_RDREQ[84],TCC_EA0_RDREQ_32B[84],TCC_EA0_RDREQ_LEVEL[84],TCC_EA0_ATOMIC_LEVEL[85],TCC_EA0_RDREQ[85],TCC_EA0_RDREQ_32B[85],TCC_EA0_RDREQ_LEVEL[85],TCC_EA0_ATOMIC_LEVEL[86],TCC_EA0_RDREQ[86],TCC_EA0_RDREQ_32B[86],TCC_EA0_RDREQ_LEVEL[86],TCC_EA0_ATOMIC_LEVEL[87],TCC_EA0_RDREQ[87],TCC_EA0_RDREQ_32B[87],TCC_EA0_RDREQ_LEVEL[87],TCC_EA0_ATOMIC_LEVEL[88],TCC_EA0_RDREQ[88],TCC_EA0_RDREQ_32B[88],TCC_EA0_RDREQ_LEVEL[88],TCC_EA0_ATOMIC_LEVEL[89],TCC_EA0_RDREQ[89],TCC_EA0_RDREQ_32B[89],TCC_EA0_RDREQ_LEVEL[89],TCC_EA0_ATOMIC_LEVEL[90],TCC_EA0_RDREQ[90],TCC_EA0_RDREQ_32B[90],TCC_EA0_RDREQ_LEVEL[90],TCC_EA0_ATOMIC_LEVEL[91],TCC_EA0_RDREQ[91],TCC_EA0_RDREQ_32B[91],TCC_EA0_RDREQ_LEVEL[91],TCC_EA0_ATOMIC_LEVEL[92],TCC_EA0_RDREQ[92],TCC_EA0_RDREQ_32B[92],TCC_EA0_RDREQ_LEVEL[92],TCC_EA0_ATOMIC_LEVEL[93],TCC_EA0_RDREQ[93],TCC_EA0_RDREQ_32B[93],TCC_EA0_RDREQ_LEVEL[93],TCC_EA0_ATOMIC_LEVEL[94],TCC_EA0_RDREQ[94],TCC_EA0_RDREQ_32B[94],TCC_EA0_RDREQ_LEVEL[94],TCC_EA0_ATOMIC_LEVEL[95],TCC_EA0_RDREQ[95],TCC_EA0_RDREQ_32B[95],TCC_EA0_RDREQ_LEVEL[95],Wave_Size_16,Correlation_ID_16,SQ_INSTS_VMEM,SQ_INSTS_SALU,SQ_INSTS_VSKIPPED,SQ_INSTS,SQ_INSTS_VALU,SQ_INSTS_VALU_ADD_F16,SQ_INSTS_VALU_MUL_F16,SQ_INSTS_VALU_FMA_F16,GRBM_SPI_BUSY,SPI_CSN_NUM_THREADGROUPS,SPI_CSN_WAVE,CPC_CPC_TCIU_BUSY,CPC_CPC_TCIU_IDLE,CPF_CPF_TCIU_BUSY,CPF_CPF_TCIU_STALL,TA_BUFFER_READ_WAVEFRONTS_sum,TA_BUFFER_WRITE_WAVEFRONTS_sum,TCC_CC_REQ_sum,TCC_NC_REQ_sum,TCC_RW_REQ_sum,TCC_UC_REQ_sum,TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum,TCP_READ_TAGCONFLICT_STALL_CYCLES_sum,TCP_TA_TCP_STATE_READ_sum,TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum,TD_LOAD_WAVEFRONT_sum,TD_SPI_STALL_sum,Wave_Size_17,Correlation_ID_17,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_BUSY_CU_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_INSTS_VALU_CVT,SQ_INSTS_VMEM_WR,SQ_INSTS_VMEM_RD,GRBM_COUNT,GRBM_GUI_ACTIVE,SPI_CSN_WINDOW_VALID,SPI_CSN_BUSY,CPC_CPC_STAT_BUSY,CPC_CPC_STAT_IDLE,CPF_CPF_STAT_BUSY,CPF_CPF_STAT_STALL,TA_BUFFER_WAVEFRONTS_sum,TA_TA_BUSY_sum,TCC_BUSY_sum,TCC_CYCLE_sum,TCC_PROBE_ALL_sum,TCC_PROBE_sum,TCP_GATE_EN1_sum,TCP_GATE_EN2_sum,TCP_TCR_TCP_STALL_CYCLES_sum,TCP_TD_TCP_STALL_CYCLES_sum,TD_TC_STALL_sum,TD_TD_BUSY_sum,Start_Timestamp,End_Timestamp
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diff --git a/tests/workloads/kernel/MI300A_A1/sysinfo.csv b/tests/workloads/kernel/MI300A_A1/sysinfo.csv
new file mode 100644
index 0000000000..28264aef5b
--- /dev/null
+++ b/tests/workloads/kernel/MI300A_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+kernel,./tests/vcopy -n 1048576 -b 256 -i 3,SQ|LDS|SQC|TA|TD|TCP|TCC|SPI|CPC|CPF,Wed 29 May 2024 01:41:56 PM  (CDT),2,sh5-1w300-rg3-3,AMD Instinct MI300A Accelerator,"American Megatrends International, LLC.RMO1002DS",Ubuntu 22.04.2 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,131174852,,6.1.2-110,N/A,SPX,NPS1,MI300A_A1,gfx942,32,24576,228,4,24,64,1024,32,2100,1300,2100,1300,96,32,120,4,5324.8,6
diff --git a/tests/workloads/kernel/MI300A_A1/timestamps.csv b/tests/workloads/kernel/MI300A_A1/timestamps.csv
new file mode 100644
index 0000000000..7da679b6f1
--- /dev/null
+++ b/tests/workloads/kernel/MI300A_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,11995,1,150843,150843,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73994741709003,73994741716935,0
+3,11995,1,150843,150843,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73994741753751,73994741759760,0
+2,11995,1,150843,150843,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73994741733040,73994741738809,0
diff --git a/tests/workloads/kernel/MI300X_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/kernel/MI300X_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..be256a39e8
--- /dev/null
+++ b/tests/workloads/kernel/MI300X_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,60633,1,968792,968792,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716479545398906,716479545415785,0,360598.0,360598.0,16384.0,65536.0,33693.0,2684148.0
+1,60633,1,968792,968792,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716479545437823,716479545452103,0,389510.0,389510.0,16384.0,65536.0,13017.0,1048580.0
+2,60633,1,968792,968792,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716479545472702,716479545517861,0,323876.0,323876.0,16384.0,65536.0,13119.0,1048580.0
diff --git a/tests/workloads/kernel/MI300X_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/kernel/MI300X_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..03ff10bd54
--- /dev/null
+++ b/tests/workloads/kernel/MI300X_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,60633,1,968804,968804,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716479545398906,716479545415785,0,0.0,0.0,0.0
+1,60633,1,968804,968804,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716479545437823,716479545452103,0,0.0,0.0,0.0
+2,60633,1,968804,968804,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716479545472702,716479545517861,0,0.0,0.0,0.0
diff --git a/tests/workloads/kernel/MI300X_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/kernel/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..19aa18ff6f
--- /dev/null
+++ b/tests/workloads/kernel/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,968816,968816,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716479545398906,716479545415785,0,65536.0,3682362.0,294629896.0
+1,60633,1,968816,968816,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716479545437823,716479545452103,0,65536.0,3776610.0,302065192.0
+2,60633,1,968816,968816,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716479545472702,716479545517861,0,65536.0,3647370.0,291732448.0
diff --git a/tests/workloads/kernel/MI300X_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/kernel/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..1eda5f085b
--- /dev/null
+++ b/tests/workloads/kernel/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,968828,968828,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716479545398906,716479545415785,0,32768.0,449531.0,35957712.0
+1,60633,1,968828,968828,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716479545437823,716479545452103,0,32768.0,304858.0,24386148.0
+2,60633,1,968828,968828,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716479545472702,716479545517861,0,32768.0,284139.0,22723208.0
diff --git a/tests/workloads/kernel/MI300X_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/kernel/MI300X_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..c011f2154a
--- /dev/null
+++ b/tests/workloads/kernel/MI300X_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,60633,1,968840,968840,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716479545398906,716479545415785,0,450310.0,450310.0,259873.0,1801240.0,16384.0,35956993.0,586298.0,0.0,144167720.0
+1,60633,1,968840,968840,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716479545437823,716479545452103,0,368837.0,368837.0,178159.0,1475348.0,16384.0,31550978.0,501552.0,0.0,126559376.0
+2,60633,1,968840,968840,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716479545472702,716479545517861,0,370406.0,370406.0,193342.0,1481624.0,16384.0,30225296.0,501286.0,0.0,121255136.0
diff --git a/tests/workloads/kernel/MI300X_A1/log.txt b/tests/workloads/kernel/MI300X_A1/log.txt
new file mode 100644
index 0000000000..88b9593a00
--- /dev/null
+++ b/tests/workloads/kernel/MI300X_A1/log.txt
@@ -0,0 +1,229 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/kernel/MI300X_A1
+Target: MI300X_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: ['"vecCopy(double*,', 'double*,', 'double*,', 'int,', 'int)', '[clone', '.kd]"']
+Dispatch Selection: None
+Hardware Blocks: All
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+
+[profiling] Current input file: tests/workloads/kernel/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH_LEVEL
+
+[profiling] Current input file: tests/workloads/kernel/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+
+[profiling] Current input file: tests/workloads/kernel/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+
+[profiling] Current input file: tests/workloads/kernel/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+
+[profiling] Current input file: tests/workloads/kernel/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+
+[profiling] Current input file: tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+
+[profiling] Current input file: tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS
+
+[profiling] Current input file: tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_16
+
+[profiling] Current input file: tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_HITS
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES
+
+[profiling] Current input file: tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+
+[profiling] Current input file: tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_13.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[1]
+
+[profiling] Current input file: tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_14.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[1]
+
+[profiling] Current input file: tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_15.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[1]
+
+[profiling] Current input file: tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_16.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[1]
+
+[profiling] Current input file: tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_17.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[3]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[3]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[3]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[4]
+
+[profiling] Current input file: tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F32
+
+[profiling] Current input file: tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_FLAT
+
+[profiling] Current input file: tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_UTCL1_TRANSLATION_MISS_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_UTCL1_TRANSLATION_HIT_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_UTCL1_PERMISSION_MISS_sum
+
+[profiling] Current input file: tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_SCA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_MISC
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_WR
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_RD
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_SALU
+
+[profiling] Current input file: tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_THREAD_CYCLES_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ADDR_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_UNALIGNED_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_EQ_64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_48
+
+[profiling] Current input file: tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ITEMS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_MEM_VIOLATIONS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ATOMIC_RETURN
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_IDX_ACTIVE
+
+[profiling] Current input file: tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F64
+
+[profiling] Current input file: tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_INST_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_READ_REQ
+
+[profiling] Current input file: tests/workloads/kernel/MI300X_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/kernel/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/kernel/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..7000361619
--- /dev/null
+++ b/tests/workloads/kernel/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/kernel/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..99cb19a588
--- /dev/null
+++ b/tests/workloads/kernel/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/kernel/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..567f8e862d
--- /dev/null
+++ b/tests/workloads/kernel/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/kernel/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..c1d8809b9c
--- /dev/null
+++ b/tests/workloads/kernel/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/kernel/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..5486e2758a
--- /dev/null
+++ b/tests/workloads/kernel/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_0.txt b/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..6b7ccd8e2e
--- /dev/null
+++ b/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD GRBM_COUNT GRBM_GUI_ACTIVE TCP_GATE_EN1_sum TCP_GATE_EN2_sum TCP_TD_TCP_STALL_CYCLES_sum TCP_TCR_TCP_STALL_CYCLES_sum TA_TA_BUSY_sum TA_BUFFER_WAVEFRONTS_sum TD_TD_BUSY_sum TD_TC_STALL_sum SPI_CSN_WINDOW_VALID SPI_CSN_BUSY CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE CPF_CPF_STAT_BUSY CPF_CPF_STAT_STALL TCC_CYCLE_sum TCC_BUSY_sum TCC_PROBE_sum TCC_PROBE_ALL_sum
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_1.txt b/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..13fe08c70f
--- /dev/null
+++ b/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 GRBM_SPI_BUSY TCP_READ_TAGCONFLICT_STALL_CYCLES_sum TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum TCP_TA_TCP_STATE_READ_sum TA_BUFFER_READ_WAVEFRONTS_sum TA_BUFFER_WRITE_WAVEFRONTS_sum TD_SPI_STALL_sum TD_LOAD_WAVEFRONT_sum SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE CPC_CPC_TCIU_BUSY CPC_CPC_TCIU_IDLE CPF_CPF_TCIU_BUSY CPF_CPF_TCIU_STALL TCC_NC_REQ_sum TCC_UC_REQ_sum TCC_CC_REQ_sum TCC_RW_REQ_sum
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_10.txt b/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..1af4b940e1
--- /dev/null
+++ b/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_11.txt b/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..674308c909
--- /dev/null
+++ b/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_12.txt b/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..4a914e8008
--- /dev/null
+++ b/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_13.txt b/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_13.txt
new file mode 100644
index 0000000000..7bb419d791
--- /dev/null
+++ b/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_13.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_ATOMIC[0] TCC_BUBBLE[0] TCC_CYCLE[0] TCC_EA0_ATOMIC[0] TCC_ATOMIC[1] TCC_BUBBLE[1] TCC_CYCLE[1] TCC_EA0_ATOMIC[1] TCC_ATOMIC[2] TCC_BUBBLE[2] TCC_CYCLE[2] TCC_EA0_ATOMIC[2] TCC_ATOMIC[3] TCC_BUBBLE[3] TCC_CYCLE[3] TCC_EA0_ATOMIC[3] TCC_ATOMIC[4] TCC_BUBBLE[4] TCC_CYCLE[4] TCC_EA0_ATOMIC[4] TCC_ATOMIC[5] TCC_BUBBLE[5] TCC_CYCLE[5] TCC_EA0_ATOMIC[5] TCC_ATOMIC[6] TCC_BUBBLE[6] TCC_CYCLE[6] TCC_EA0_ATOMIC[6] TCC_ATOMIC[7] TCC_BUBBLE[7] TCC_CYCLE[7] TCC_EA0_ATOMIC[7] TCC_ATOMIC[8] TCC_BUBBLE[8] TCC_CYCLE[8] TCC_EA0_ATOMIC[8] TCC_ATOMIC[9] TCC_BUBBLE[9] TCC_CYCLE[9] TCC_EA0_ATOMIC[9] TCC_ATOMIC[10] TCC_BUBBLE[10] TCC_CYCLE[10] TCC_EA0_ATOMIC[10] TCC_ATOMIC[11] TCC_BUBBLE[11] TCC_CYCLE[11] TCC_EA0_ATOMIC[11] TCC_ATOMIC[12] TCC_BUBBLE[12] TCC_CYCLE[12] TCC_EA0_ATOMIC[12] TCC_ATOMIC[13] TCC_BUBBLE[13] TCC_CYCLE[13] TCC_EA0_ATOMIC[13] TCC_ATOMIC[14] TCC_BUBBLE[14] TCC_CYCLE[14] TCC_EA0_ATOMIC[14] TCC_ATOMIC[15] TCC_BUBBLE[15] TCC_CYCLE[15] TCC_EA0_ATOMIC[15]
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_14.txt b/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_14.txt
new file mode 100644
index 0000000000..d35a9c3751
--- /dev/null
+++ b/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_14.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_ATOMIC_LEVEL[0] TCC_EA0_RDREQ[0] TCC_EA0_RDREQ_32B[0] TCC_EA0_RDREQ_LEVEL[0] TCC_EA0_ATOMIC_LEVEL[1] TCC_EA0_RDREQ[1] TCC_EA0_RDREQ_32B[1] TCC_EA0_RDREQ_LEVEL[1] TCC_EA0_ATOMIC_LEVEL[2] TCC_EA0_RDREQ[2] TCC_EA0_RDREQ_32B[2] TCC_EA0_RDREQ_LEVEL[2] TCC_EA0_ATOMIC_LEVEL[3] TCC_EA0_RDREQ[3] TCC_EA0_RDREQ_32B[3] TCC_EA0_RDREQ_LEVEL[3] TCC_EA0_ATOMIC_LEVEL[4] TCC_EA0_RDREQ[4] TCC_EA0_RDREQ_32B[4] TCC_EA0_RDREQ_LEVEL[4] TCC_EA0_ATOMIC_LEVEL[5] TCC_EA0_RDREQ[5] TCC_EA0_RDREQ_32B[5] TCC_EA0_RDREQ_LEVEL[5] TCC_EA0_ATOMIC_LEVEL[6] TCC_EA0_RDREQ[6] TCC_EA0_RDREQ_32B[6] TCC_EA0_RDREQ_LEVEL[6] TCC_EA0_ATOMIC_LEVEL[7] TCC_EA0_RDREQ[7] TCC_EA0_RDREQ_32B[7] TCC_EA0_RDREQ_LEVEL[7] TCC_EA0_ATOMIC_LEVEL[8] TCC_EA0_RDREQ[8] TCC_EA0_RDREQ_32B[8] TCC_EA0_RDREQ_LEVEL[8] TCC_EA0_ATOMIC_LEVEL[9] TCC_EA0_RDREQ[9] TCC_EA0_RDREQ_32B[9] TCC_EA0_RDREQ_LEVEL[9] TCC_EA0_ATOMIC_LEVEL[10] TCC_EA0_RDREQ[10] TCC_EA0_RDREQ_32B[10] TCC_EA0_RDREQ_LEVEL[10] TCC_EA0_ATOMIC_LEVEL[11] TCC_EA0_RDREQ[11] TCC_EA0_RDREQ_32B[11] TCC_EA0_RDREQ_LEVEL[11] TCC_EA0_ATOMIC_LEVEL[12] TCC_EA0_RDREQ[12] TCC_EA0_RDREQ_32B[12] TCC_EA0_RDREQ_LEVEL[12] TCC_EA0_ATOMIC_LEVEL[13] TCC_EA0_RDREQ[13] TCC_EA0_RDREQ_32B[13] TCC_EA0_RDREQ_LEVEL[13] TCC_EA0_ATOMIC_LEVEL[14] TCC_EA0_RDREQ[14] TCC_EA0_RDREQ_32B[14] TCC_EA0_RDREQ_LEVEL[14] TCC_EA0_ATOMIC_LEVEL[15] TCC_EA0_RDREQ[15] TCC_EA0_RDREQ_32B[15] TCC_EA0_RDREQ_LEVEL[15]
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_15.txt b/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_15.txt
new file mode 100644
index 0000000000..ea2157e89b
--- /dev/null
+++ b/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_15.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_WRREQ[0] TCC_EA0_WRREQ_64B[0] TCC_EA0_WRREQ_LEVEL[0] TCC_HIT[0] TCC_EA0_WRREQ[1] TCC_EA0_WRREQ_64B[1] TCC_EA0_WRREQ_LEVEL[1] TCC_HIT[1] TCC_EA0_WRREQ[2] TCC_EA0_WRREQ_64B[2] TCC_EA0_WRREQ_LEVEL[2] TCC_HIT[2] TCC_EA0_WRREQ[3] TCC_EA0_WRREQ_64B[3] TCC_EA0_WRREQ_LEVEL[3] TCC_HIT[3] TCC_EA0_WRREQ[4] TCC_EA0_WRREQ_64B[4] TCC_EA0_WRREQ_LEVEL[4] TCC_HIT[4] TCC_EA0_WRREQ[5] TCC_EA0_WRREQ_64B[5] TCC_EA0_WRREQ_LEVEL[5] TCC_HIT[5] TCC_EA0_WRREQ[6] TCC_EA0_WRREQ_64B[6] TCC_EA0_WRREQ_LEVEL[6] TCC_HIT[6] TCC_EA0_WRREQ[7] TCC_EA0_WRREQ_64B[7] TCC_EA0_WRREQ_LEVEL[7] TCC_HIT[7] TCC_EA0_WRREQ[8] TCC_EA0_WRREQ_64B[8] TCC_EA0_WRREQ_LEVEL[8] TCC_HIT[8] TCC_EA0_WRREQ[9] TCC_EA0_WRREQ_64B[9] TCC_EA0_WRREQ_LEVEL[9] TCC_HIT[9] TCC_EA0_WRREQ[10] TCC_EA0_WRREQ_64B[10] TCC_EA0_WRREQ_LEVEL[10] TCC_HIT[10] TCC_EA0_WRREQ[11] TCC_EA0_WRREQ_64B[11] TCC_EA0_WRREQ_LEVEL[11] TCC_HIT[11] TCC_EA0_WRREQ[12] TCC_EA0_WRREQ_64B[12] TCC_EA0_WRREQ_LEVEL[12] TCC_HIT[12] TCC_EA0_WRREQ[13] TCC_EA0_WRREQ_64B[13] TCC_EA0_WRREQ_LEVEL[13] TCC_HIT[13] TCC_EA0_WRREQ[14] TCC_EA0_WRREQ_64B[14] TCC_EA0_WRREQ_LEVEL[14] TCC_HIT[14] TCC_EA0_WRREQ[15] TCC_EA0_WRREQ_64B[15] TCC_EA0_WRREQ_LEVEL[15] TCC_HIT[15]
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_16.txt b/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_16.txt
new file mode 100644
index 0000000000..1d7df54ad8
--- /dev/null
+++ b/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_16.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_MISS[0] TCC_READ[0] TCC_REQ[0] TCC_RW_REQ[0] TCC_MISS[1] TCC_READ[1] TCC_REQ[1] TCC_RW_REQ[1] TCC_MISS[2] TCC_READ[2] TCC_REQ[2] TCC_RW_REQ[2] TCC_MISS[3] TCC_READ[3] TCC_REQ[3] TCC_RW_REQ[3] TCC_MISS[4] TCC_READ[4] TCC_REQ[4] TCC_RW_REQ[4] TCC_MISS[5] TCC_READ[5] TCC_REQ[5] TCC_RW_REQ[5] TCC_MISS[6] TCC_READ[6] TCC_REQ[6] TCC_RW_REQ[6] TCC_MISS[7] TCC_READ[7] TCC_REQ[7] TCC_RW_REQ[7] TCC_MISS[8] TCC_READ[8] TCC_REQ[8] TCC_RW_REQ[8] TCC_MISS[9] TCC_READ[9] TCC_REQ[9] TCC_RW_REQ[9] TCC_MISS[10] TCC_READ[10] TCC_REQ[10] TCC_RW_REQ[10] TCC_MISS[11] TCC_READ[11] TCC_REQ[11] TCC_RW_REQ[11] TCC_MISS[12] TCC_READ[12] TCC_REQ[12] TCC_RW_REQ[12] TCC_MISS[13] TCC_READ[13] TCC_REQ[13] TCC_RW_REQ[13] TCC_MISS[14] TCC_READ[14] TCC_REQ[14] TCC_RW_REQ[14] TCC_MISS[15] TCC_READ[15] TCC_REQ[15] TCC_RW_REQ[15]
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_17.txt b/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_17.txt
new file mode 100644
index 0000000000..771c82f7a6
--- /dev/null
+++ b/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_17.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_TAG_STALL[0] TCC_TOO_MANY_EA_WRREQS_STALL[0] TCC_WRITE[0] TCC_TAG_STALL[1] TCC_TOO_MANY_EA_WRREQS_STALL[1] TCC_WRITE[1] TCC_TAG_STALL[2] TCC_TOO_MANY_EA_WRREQS_STALL[2] TCC_WRITE[2] TCC_TAG_STALL[3] TCC_TOO_MANY_EA_WRREQS_STALL[3] TCC_WRITE[3] TCC_TAG_STALL[4] TCC_TOO_MANY_EA_WRREQS_STALL[4] TCC_WRITE[4] TCC_TAG_STALL[5] TCC_TOO_MANY_EA_WRREQS_STALL[5] TCC_WRITE[5] TCC_TAG_STALL[6] TCC_TOO_MANY_EA_WRREQS_STALL[6] TCC_WRITE[6] TCC_TAG_STALL[7] TCC_TOO_MANY_EA_WRREQS_STALL[7] TCC_WRITE[7] TCC_TAG_STALL[8] TCC_TOO_MANY_EA_WRREQS_STALL[8] TCC_WRITE[8] TCC_TAG_STALL[9] TCC_TOO_MANY_EA_WRREQS_STALL[9] TCC_WRITE[9] TCC_TAG_STALL[10] TCC_TOO_MANY_EA_WRREQS_STALL[10] TCC_WRITE[10] TCC_TAG_STALL[11] TCC_TOO_MANY_EA_WRREQS_STALL[11] TCC_WRITE[11] TCC_TAG_STALL[12] TCC_TOO_MANY_EA_WRREQS_STALL[12] TCC_WRITE[12] TCC_TAG_STALL[13] TCC_TOO_MANY_EA_WRREQS_STALL[13] TCC_WRITE[13] TCC_TAG_STALL[14] TCC_TOO_MANY_EA_WRREQS_STALL[14] TCC_WRITE[14] TCC_TAG_STALL[15] TCC_TOO_MANY_EA_WRREQS_STALL[15] TCC_WRITE[15]
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_2.txt b/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..ce68e08839
--- /dev/null
+++ b/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 TCP_VOLATILE_sum TCP_TOTAL_ACCESSES_sum TCP_TOTAL_READ_sum TCP_TOTAL_WRITE_sum TA_BUFFER_ATOMIC_WAVEFRONTS_sum TA_BUFFER_TOTAL_CYCLES_sum TD_ATOMIC_WAVEFRONT_sum TD_STORE_WAVEFRONT_sum SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION CPF_CPF_STAT_IDLE CPF_CPF_TCIU_IDLE TCC_REQ_sum TCC_STREAMING_REQ_sum TCC_HIT_sum TCC_MISS_sum
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_3.txt b/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..126e5bc987
--- /dev/null
+++ b/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS TCP_TOTAL_ATOMIC_WITH_RET_sum TCP_TOTAL_ATOMIC_WITHOUT_RET_sum TCP_TOTAL_WRITEBACK_INVALIDATES_sum TCP_TOTAL_CACHE_ACCESSES_sum TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES_sum TD_COALESCABLE_WAVEFRONT_sum SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE CPF_CMP_UTCL1_STALL_ON_TRANSLATION TCC_READ_sum TCC_WRITE_sum TCC_ATOMIC_sum TCC_WRITEBACK_sum
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_4.txt b/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..443c75b3f1
--- /dev/null
+++ b/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAIT_ANY SQ_WAIT_INST_ANY SQ_ACTIVE_INST_ANY SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU TCP_UTCL1_TRANSLATION_MISS_sum TCP_UTCL1_TRANSLATION_HIT_sum TCP_UTCL1_PERMISSION_MISS_sum TCP_UTCL1_REQUEST_sum TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_TOTAL_WAVEFRONTS_sum SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE TCC_EA0_WRREQ_sum TCC_EA0_WRREQ_64B_sum TCC_EA0_WR_UNCACHED_32B_sum TCC_EA0_WRREQ_DRAM_sum
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_5.txt b/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..8ead67c922
--- /dev/null
+++ b/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_SCA SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU TCP_TCC_READ_REQ_sum TCP_TCC_WRITE_REQ_sum TCP_TCC_ATOMIC_WITH_RET_REQ_sum TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN CPC_ME1_DC0_SPI_BUSY TCC_EA0_RDREQ_sum TCC_EA0_RDREQ_32B_sum TCC_BUBBLE_sum TCC_EA0_RD_UNCACHED_32B_sum
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_6.txt b/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..fce9a95e47
--- /dev/null
+++ b/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_THREAD_CYCLES_VALU SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 TCP_TCC_NC_READ_REQ_sum TCP_TCC_NC_WRITE_REQ_sum TCP_TCC_NC_ATOMIC_REQ_sum TCP_TCC_UC_READ_REQ_sum TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN TCC_EA0_RDREQ_DRAM_sum TCC_TAG_STALL_sum TCC_NORMAL_WRITEBACK_sum TCC_ALL_TC_OP_WB_WRITEBACK_sum
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_7.txt b/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..651d45b5d0
--- /dev/null
+++ b/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED TCP_TCC_UC_WRITE_REQ_sum TCP_TCC_UC_ATOMIC_REQ_sum TCP_TCC_CC_READ_REQ_sum TCP_TCC_CC_WRITE_REQ_sum TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR TCC_NORMAL_EVICT_sum TCC_ALL_TC_OP_INV_EVICT_sum TCC_TOO_MANY_EA_WRREQS_STALL_sum TCC_EA0_ATOMIC_sum
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_8.txt b/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..0539f399ec
--- /dev/null
+++ b/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES TCP_TCC_CC_ATOMIC_REQ_sum TCP_TCC_RW_READ_REQ_sum TCP_TCC_RW_WRITE_REQ_sum TCP_TCC_RW_ATOMIC_REQ_sum SPI_VWC_CSC_WR SPI_RA_BULKY_CU_FULL_CSN TCC_EA0_RDREQ_LEVEL_sum TCC_EA0_WRREQ_LEVEL_sum TCC_EA0_ATOMIC_LEVEL_sum TCC_EA0_WRREQ_STALL_sum
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_9.txt b/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..904365b6ef
--- /dev/null
+++ b/tests/workloads/kernel/MI300X_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ TCP_PENDING_STALL_CYCLES_sum
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300X_A1/perfmon/timestamps.txt b/tests/workloads/kernel/MI300X_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..b327c1ae1b
--- /dev/null
+++ b/tests/workloads/kernel/MI300X_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel: "vecCopy(double*,,double*,,double*,,int,,int),[clone,.kd]"
diff --git a/tests/workloads/kernel/MI300X_A1/pmc_perf.csv b/tests/workloads/kernel/MI300X_A1/pmc_perf.csv
new file mode 100644
index 0000000000..e0fa393c10
--- /dev/null
+++ b/tests/workloads/kernel/MI300X_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_1,Correlation_ID_1,XCC_Index,TCC_ATOMIC[0],TCC_BUBBLE[0],TCC_CYCLE[0],TCC_EA0_ATOMIC[0],TCC_ATOMIC[1],TCC_BUBBLE[1],TCC_CYCLE[1],TCC_EA0_ATOMIC[1],TCC_ATOMIC[2],TCC_BUBBLE[2],TCC_CYCLE[2],TCC_EA0_ATOMIC[2],TCC_ATOMIC[3],TCC_BUBBLE[3],TCC_CYCLE[3],TCC_EA0_ATOMIC[3],TCC_ATOMIC[4],TCC_BUBBLE[4],TCC_CYCLE[4],TCC_EA0_ATOMIC[4],TCC_ATOMIC[5],TCC_BUBBLE[5],TCC_CYCLE[5],TCC_EA0_ATOMIC[5],TCC_ATOMIC[6],TCC_BUBBLE[6],TCC_CYCLE[6],TCC_EA0_ATOMIC[6],TCC_ATOMIC[7],TCC_BUBBLE[7],TCC_CYCLE[7],TCC_EA0_ATOMIC[7],TCC_ATOMIC[8],TCC_BUBBLE[8],TCC_CYCLE[8],TCC_EA0_ATOMIC[8],TCC_ATOMIC[9],TCC_BUBBLE[9],TCC_CYCLE[9],TCC_EA0_ATOMIC[9],TCC_ATOMIC[10],TCC_BUBBLE[10],TCC_CYCLE[10],TCC_EA0_ATOMIC[10],TCC_ATOMIC[11],TCC_BUBBLE[11],TCC_CYCLE[11],TCC_EA0_ATOMIC[11],TCC_ATOMIC[12],TCC_BUBBLE[12],TCC_CYCLE[12],TCC_EA0_ATOMIC[12],TCC_ATOMIC[13],TCC_BUBBLE[13],TCC_CYCLE[13],TCC_EA0_ATOMIC[13],TCC_ATOMIC[14],TCC_BUBBLE[14],TCC_CYCLE[14],TCC_EA0_ATOMIC[14],TCC_ATOMIC[15],TCC_BUBBLE[15],TCC_CYCLE[15],TCC_EA0_ATOMIC[15],TCC_ATOMIC[16],TCC_BUBBLE[16],TCC_CYCLE[16],TCC_EA0_ATOMIC[16],TCC_ATOMIC[17],TCC_BUBBLE[17],TCC_CYCLE[17],TCC_EA0_ATOMIC[17],TCC_ATOMIC[18],TCC_BUBBLE[18],TCC_CYCLE[18],TCC_EA0_ATOMIC[18],TCC_ATOMIC[19],TCC_BUBBLE[19],TCC_CYCLE[19],TCC_EA0_ATOMIC[19],TCC_ATOMIC[20],TCC_BUBBLE[20],TCC_CYCLE[20],TCC_EA0_ATOMIC[20],TCC_ATOMIC[21],TCC_BUBBLE[21],TCC_CYCLE[21],TCC_EA0_ATOMIC[21],TCC_ATOMIC[22],TCC_BUBBLE[22],TCC_CYCLE[22],TCC_EA0_ATOMIC[22],TCC_ATOMIC[23],TCC_BUBBLE[23],TCC_CYCLE[23],TCC_EA0_ATOMIC[23],TCC_ATOMIC[24],TCC_BUBBLE[24],TCC_CYCLE[24],TCC_EA0_ATOMIC[24],TCC_ATOMIC[25],TCC_BUBBLE[25],TCC_CYCLE[25],TCC_EA0_ATOMIC[25],TCC_ATOMIC[26],TCC_BUBBLE[26],TCC_CYCLE[26],TCC_EA0_ATOMIC[26],TCC_ATOMIC[27],TCC_BUBBLE[27],TCC_CYCLE[27],TCC_EA0_ATOMIC[27],TCC_ATOMIC[28],TCC_BUBBLE[28],TCC_CYCLE[28],TCC_EA0_ATOMIC[28],TCC_ATOMIC[29],TCC_BUBBLE[29],TCC_CYCLE[29],TCC_EA0_ATOMIC[29],TCC_ATOMIC[30],TCC_BUBBLE[30],TCC_CYCLE[30],TCC_EA0_ATOMIC[30],TCC_ATOMIC[31],TCC_BUBBLE[31],TCC_CYCLE[31],TCC_EA0_ATOMIC[31],TCC_ATOMIC[32],TCC_BUBBLE[32],TCC_CYCLE[32],TCC_EA0_ATOMIC[32],TCC_ATOMIC[33],TCC_BUBBLE[33],TCC_CYCLE[33],TCC_EA0_ATOMIC[33],TCC_ATOMIC[34],TCC_BUBBLE[34],TCC_CYCLE[34],TCC_EA0_ATOMIC[34],TCC_ATOMIC[35],TCC_BUBBLE[35],TCC_CYCLE[35],TCC_EA0_ATOMIC[35],TCC_ATOMIC[36],TCC_BUBBLE[36],TCC_CYCLE[36],TCC_EA0_ATOMIC[36],TCC_ATOMIC[37],TCC_BUBBLE[37],TCC_CYCLE[37],TCC_EA0_ATOMIC[37],TCC_ATOMIC[38],TCC_BUBBLE[38],TCC_CYCLE[38],TCC_EA0_ATOMIC[38],TCC_ATOMIC[39],TCC_BUBBLE[39],TCC_CYCLE[39],TCC_EA0_ATOMIC[39],TCC_ATOMIC[40],TCC_BUBBLE[40],TCC_CYCLE[40],TCC_EA0_ATOMIC[40],TCC_ATOMIC[41],TCC_BUBBLE[41],TCC_CYCLE[41],TCC_EA0_ATOMIC[41],TCC_ATOMIC[42],TCC_BUBBLE[42],TCC_CYCLE[42],TCC_EA0_ATOMIC[42],TCC_ATOMIC[43],TCC_BUBBLE[43],TCC_CYCLE[43],TCC_EA0_ATOMIC[43],TCC_ATOMIC[44],TCC_BUBBLE[44],TCC_CYCLE[44],TCC_EA0_ATOMIC[44],TCC_ATOMIC[45],TCC_BUBBLE[45],TCC_CYCLE[45],TCC_EA0_ATOMIC[45],TCC_ATOMIC[46],TCC_BUBBLE[46],TCC_CYCLE[46],TCC_EA0_ATOMIC[46],TCC_ATOMIC[47],TCC_BUBBLE[47],TCC_CYCLE[47],TCC_EA0_ATOMIC[47],TCC_ATOMIC[48],TCC_BUBBLE[48],TCC_CYCLE[48],TCC_EA0_ATOMIC[48],TCC_ATOMIC[49],TCC_BUBBLE[49],TCC_CYCLE[49],TCC_EA0_ATOMIC[49],TCC_ATOMIC[50],TCC_BUBBLE[50],TCC_CYCLE[50],TCC_EA0_ATOMIC[50],TCC_ATOMIC[51],TCC_BUBBLE[51],TCC_CYCLE[51],TCC_EA0_ATOMIC[51],TCC_ATOMIC[52],TCC_BUBBLE[52],TCC_CYCLE[52],TCC_EA0_ATOMIC[52],TCC_ATOMIC[53],TCC_BUBBLE[53],TCC_CYCLE[53],TCC_EA0_ATOMIC[53],TCC_ATOMIC[54],TCC_BUBBLE[54],TCC_CYCLE[54],TCC_EA0_ATOMIC[54],TCC_ATOMIC[55],TCC_BUBBLE[55],TCC_CYCLE[55],TCC_EA0_ATOMIC[55],TCC_ATOMIC[56],TCC_BUBBLE[56],TCC_CYCLE[56],TCC_EA0_ATOMIC[56],TCC_ATOMIC[57],TCC_BUBBLE[57],TCC_CYCLE[57],TCC_EA0_ATOMIC[57],TCC_ATOMIC[58],TCC_BUBBLE[58],TCC_CYCLE[58],TCC_EA0_ATOMIC[58],TCC_ATOMIC[59],TCC_BUBBLE[59],TCC_CYCLE[59],TCC_EA0_ATOMIC[59],TCC_ATOMIC[60],TCC_BUBBLE[60],TCC_CYCLE[60],TCC_EA0_ATOMIC[60],TCC_ATOMIC[61],TCC_BUBBLE[61],TCC_CYCLE[61],TCC_EA0_ATOMIC[61],TCC_ATOMIC[62],TCC_BUBBLE[62],TCC_CYCLE[62],TCC_EA0_ATOMIC[62],TCC_ATOMIC[63],TCC_BUBBLE[63],TCC_CYCLE[63],TCC_EA0_ATOMIC[63],TCC_ATOMIC[64],TCC_BUBBLE[64],TCC_CYCLE[64],TCC_EA0_ATOMIC[64],TCC_ATOMIC[65],TCC_BUBBLE[65],TCC_CYCLE[65],TCC_EA0_ATOMIC[65],TCC_ATOMIC[66],TCC_BUBBLE[66],TCC_CYCLE[66],TCC_EA0_ATOMIC[66],TCC_ATOMIC[67],TCC_BUBBLE[67],TCC_CYCLE[67],TCC_EA0_ATOMIC[67],TCC_ATOMIC[68],TCC_BUBBLE[68],TCC_CYCLE[68],TCC_EA0_ATOMIC[68],TCC_ATOMIC[69],TCC_BUBBLE[69],TCC_CYCLE[69],TCC_EA0_ATOMIC[69],TCC_ATOMIC[70],TCC_BUBBLE[70],TCC_CYCLE[70],TCC_EA0_ATOMIC[70],TCC_ATOMIC[71],TCC_BUBBLE[71],TCC_CYCLE[71],TCC_EA0_ATOMIC[71],TCC_ATOMIC[72],TCC_BUBBLE[72],TCC_CYCLE[72],TCC_EA0_ATOMIC[72],TCC_ATOMIC[73],TCC_BUBBLE[73],TCC_CYCLE[73],TCC_EA0_ATOMIC[73],TCC_ATOMIC[74],TCC_BUBBLE[74],TCC_CYCLE[74],TCC_EA0_ATOMIC[74],TCC_ATOMIC[75],TCC_BUBBLE[75],TCC_CYCLE[75],TCC_EA0_ATOMIC[75],TCC_ATOMIC[76],TCC_BUBBLE[76],TCC_CYCLE[76],TCC_EA0_ATOMIC[76],TCC_ATOMIC[77],TCC_BUBBLE[77],TCC_CYCLE[77],TCC_EA0_ATOMIC[77],TCC_ATOMIC[78],TCC_BUBBLE[78],TCC_CYCLE[78],TCC_EA0_ATOMIC[78],TCC_ATOMIC[79],TCC_BUBBLE[79],TCC_CYCLE[79],TCC_EA0_ATOMIC[79],TCC_ATOMIC[80],TCC_BUBBLE[80],TCC_CYCLE[80],TCC_EA0_ATOMIC[80],TCC_ATOMIC[81],TCC_BUBBLE[81],TCC_CYCLE[81],TCC_EA0_ATOMIC[81],TCC_ATOMIC[82],TCC_BUBBLE[82],TCC_CYCLE[82],TCC_EA0_ATOMIC[82],TCC_ATOMIC[83],TCC_BUBBLE[83],TCC_CYCLE[83],TCC_EA0_ATOMIC[83],TCC_ATOMIC[84],TCC_BUBBLE[84],TCC_CYCLE[84],TCC_EA0_ATOMIC[84],TCC_ATOMIC[85],TCC_BUBBLE[85],TCC_CYCLE[85],TCC_EA0_ATOMIC[85],TCC_ATOMIC[86],TCC_BUBBLE[86],TCC_CYCLE[86],TCC_EA0_ATOMIC[86],TCC_ATOMIC[87],TCC_BUBBLE[87],TCC_CYCLE[87],TCC_EA0_ATOMIC[87],TCC_ATOMIC[88],TCC_BUBBLE[88],TCC_CYCLE[88],TCC_EA0_ATOMIC[88],TCC_ATOMIC[89],TCC_BUBBLE[89],TCC_CYCLE[89],TCC_EA0_ATOMIC[89],TCC_ATOMIC[90],TCC_BUBBLE[90],TCC_CYCLE[90],TCC_EA0_ATOMIC[90],TCC_ATOMIC[91],TCC_BUBBLE[91],TCC_CYCLE[91],TCC_EA0_ATOMIC[91],TCC_ATOMIC[92],TCC_BUBBLE[92],TCC_CYCLE[92],TCC_EA0_ATOMIC[92],TCC_ATOMIC[93],TCC_BUBBLE[93],TCC_CYCLE[93],TCC_EA0_ATOMIC[93],TCC_ATOMIC[94],TCC_BUBBLE[94],TCC_CYCLE[94],TCC_EA0_ATOMIC[94],TCC_ATOMIC[95],TCC_BUBBLE[95],TCC_CYCLE[95],TCC_EA0_ATOMIC[95],TCC_ATOMIC[96],TCC_BUBBLE[96],TCC_CYCLE[96],TCC_EA0_ATOMIC[96],TCC_ATOMIC[97],TCC_BUBBLE[97],TCC_CYCLE[97],TCC_EA0_ATOMIC[97],TCC_ATOMIC[98],TCC_BUBBLE[98],TCC_CYCLE[98],TCC_EA0_ATOMIC[98],TCC_ATOMIC[99],TCC_BUBBLE[99],TCC_CYCLE[99],TCC_EA0_ATOMIC[99],TCC_ATOMIC[100],TCC_BUBBLE[100],TCC_CYCLE[100],TCC_EA0_ATOMIC[100],TCC_ATOMIC[101],TCC_BUBBLE[101],TCC_CYCLE[101],TCC_EA0_ATOMIC[101],TCC_ATOMIC[102],TCC_BUBBLE[102],TCC_CYCLE[102],TCC_EA0_ATOMIC[102],TCC_ATOMIC[103],TCC_BUBBLE[103],TCC_CYCLE[103],TCC_EA0_ATOMIC[103],TCC_ATOMIC[104],TCC_BUBBLE[104],TCC_CYCLE[104],TCC_EA0_ATOMIC[104],TCC_ATOMIC[105],TCC_BUBBLE[105],TCC_CYCLE[105],TCC_EA0_ATOMIC[105],TCC_ATOMIC[106],TCC_BUBBLE[106],TCC_CYCLE[106],TCC_EA0_ATOMIC[106],TCC_ATOMIC[107],TCC_BUBBLE[107],TCC_CYCLE[107],TCC_EA0_ATOMIC[107],TCC_ATOMIC[108],TCC_BUBBLE[108],TCC_CYCLE[108],TCC_EA0_ATOMIC[108],TCC_ATOMIC[109],TCC_BUBBLE[109],TCC_CYCLE[109],TCC_EA0_ATOMIC[109],TCC_ATOMIC[110],TCC_BUBBLE[110],TCC_CYCLE[110],TCC_EA0_ATOMIC[110],TCC_ATOMIC[111],TCC_BUBBLE[111],TCC_CYCLE[111],TCC_EA0_ATOMIC[111],TCC_ATOMIC[112],TCC_BUBBLE[112],TCC_CYCLE[112],TCC_EA0_ATOMIC[112],TCC_ATOMIC[113],TCC_BUBBLE[113],TCC_CYCLE[113],TCC_EA0_ATOMIC[113],TCC_ATOMIC[114],TCC_BUBBLE[114],TCC_CYCLE[114],TCC_EA0_ATOMIC[114],TCC_ATOMIC[115],TCC_BUBBLE[115],TCC_CYCLE[115],TCC_EA0_ATOMIC[115],TCC_ATOMIC[116],TCC_BUBBLE[116],TCC_CYCLE[116],TCC_EA0_ATOMIC[116],TCC_ATOMIC[117],TCC_BUBBLE[117],TCC_CYCLE[117],TCC_EA0_ATOMIC[117],TCC_ATOMIC[118],TCC_BUBBLE[118],TCC_CYCLE[118],TCC_EA0_ATOMIC[118],TCC_ATOMIC[119],TCC_BUBBLE[119],TCC_CYCLE[119],TCC_EA0_ATOMIC[119],TCC_ATOMIC[120],TCC_BUBBLE[120],TCC_CYCLE[120],TCC_EA0_ATOMIC[120],TCC_ATOMIC[121],TCC_BUBBLE[121],TCC_CYCLE[121],TCC_EA0_ATOMIC[121],TCC_ATOMIC[122],TCC_BUBBLE[122],TCC_CYCLE[122],TCC_EA0_ATOMIC[122],TCC_ATOMIC[123],TCC_BUBBLE[123],TCC_CYCLE[123],TCC_EA0_ATOMIC[123],TCC_ATOMIC[124],TCC_BUBBLE[124],TCC_CYCLE[124],TCC_EA0_ATOMIC[124],TCC_ATOMIC[125],TCC_BUBBLE[125],TCC_CYCLE[125],TCC_EA0_ATOMIC[125],TCC_ATOMIC[126],TCC_BUBBLE[126],TCC_CYCLE[126],TCC_EA0_ATOMIC[126],TCC_ATOMIC[127],TCC_BUBBLE[127],TCC_CYCLE[127],TCC_EA0_ATOMIC[127],Wave_Size_2,Correlation_ID_2,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,TA_FLAT_ATOMIC_WAVEFRONTS_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,TCC_ALL_TC_OP_INV_EVICT_sum,TCC_EA0_ATOMIC_sum,TCC_NORMAL_EVICT_sum,TCC_TOO_MANY_EA_WRREQS_STALL_sum,TCP_TCC_CC_READ_REQ_sum,TCP_TCC_CC_WRITE_REQ_sum,TCP_TCC_UC_ATOMIC_REQ_sum,TCP_TCC_UC_WRITE_REQ_sum,Wave_Size_3,Correlation_ID_3,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,TCC_EA0_ATOMIC_LEVEL_sum,TCC_EA0_RDREQ_LEVEL_sum,TCC_EA0_WRREQ_LEVEL_sum,TCC_EA0_WRREQ_STALL_sum,TCP_TCC_CC_ATOMIC_REQ_sum,TCP_TCC_RW_ATOMIC_REQ_sum,TCP_TCC_RW_READ_REQ_sum,TCP_TCC_RW_WRITE_REQ_sum,Wave_Size_4,Correlation_ID_4,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SPI_RA_REQ_NO_ALLOC,SPI_RA_REQ_NO_ALLOC_CSN,CPC_CPC_STAT_STALL,CPC_UTCL1_STALL_ON_TRANSLATION,CPF_CPF_STAT_IDLE,CPF_CPF_TCIU_IDLE,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,TA_BUFFER_TOTAL_CYCLES_sum,TCC_HIT_sum,TCC_MISS_sum,TCC_REQ_sum,TCC_STREAMING_REQ_sum,TCP_TOTAL_ACCESSES_sum,TCP_TOTAL_READ_sum,TCP_TOTAL_WRITE_sum,TCP_VOLATILE_sum,TD_ATOMIC_WAVEFRONT_sum,TD_STORE_WAVEFRONT_sum,Wave_Size_5,Correlation_ID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SQ_INST_CYCLES_SALU,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,CPC_ME1_DC0_SPI_BUSY,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,TCC_BUBBLE_sum,TCC_EA0_RDREQ_32B_sum,TCC_EA0_RDREQ_sum,TCC_EA0_RD_UNCACHED_32B_sum,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,TCP_TCC_READ_REQ_sum,TCP_TCC_WRITE_REQ_sum,Start_Timestamp,End_Timestamp
+0,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) 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diff --git a/tests/workloads/kernel/MI300X_A1/sysinfo.csv b/tests/workloads/kernel/MI300X_A1/sysinfo.csv
new file mode 100644
index 0000000000..444ccf388c
--- /dev/null
+++ b/tests/workloads/kernel/MI300X_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+kernel,./tests/vcopy -n 1048576 -b 256 -i 3,SQ|LDS|SQC|TA|TD|TCP|TCC|SPI|CPC|CPF,Wed 29 May 2024 12:04:49 PM  (CDT),2,splinter-126-wr-c6,AMD Ryzen 9 7950X 16-Core Processor,"American Megatrends International, LLC.VS2683299N.FD",Ubuntu 22.04.4 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,114656528,,6.2.0-13611,113-MI3SRIOV-001,SPX,NPS1,MI300X_A1,gfx942,32,4096,304,4,32,64,1024,32,2100,1300,2100,1300,128,32,160,4,5324.8,8
diff --git a/tests/workloads/kernel/MI300X_A1/timestamps.csv b/tests/workloads/kernel/MI300X_A1/timestamps.csv
new file mode 100644
index 0000000000..432075f102
--- /dev/null
+++ b/tests/workloads/kernel/MI300X_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,60633,1,969070,969070,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716479545398906,716479545415785,0
+2,60633,1,969070,969070,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716479545437823,716479545452103,0
+3,60633,1,969070,969070,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716479545472702,716479545517861,0
diff --git a/tests/workloads/kernel_inv_int/MI300A_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/kernel_inv_int/MI300A_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..98c643796c
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300A_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,11995,1,144300,144300,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73483614724763,73483614733497,0,210039.0,210039.0,16384.0,65536.0,30471.0,2421556.0
+1,11995,1,144300,144300,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73483614749922,73483614756171,0,186775.0,186775.0,16384.0,65536.0,12992.0,1048632.0
+2,11995,1,144300,144300,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73483614771234,73483614777484,0,172140.0,172140.0,16384.0,65536.0,13129.0,1048664.0
diff --git a/tests/workloads/kernel_inv_int/MI300A_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/kernel_inv_int/MI300A_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..da639f22a6
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300A_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,11995,1,144312,144312,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73483614724763,73483614733497,0,0.0,0.0,0.0
+1,11995,1,144312,144312,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73483614749922,73483614756171,0,0.0,0.0,0.0
+2,11995,1,144312,144312,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73483614771234,73483614777484,0,0.0,0.0,0.0
diff --git a/tests/workloads/kernel_inv_int/MI300A_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/kernel_inv_int/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..5d7702d299
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,144324,144324,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73483614724763,73483614733497,0,65536.0,342734.0,27430512.0
+1,11995,1,144324,144324,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73483614749922,73483614756171,0,65536.0,205930.0,16453328.0
+2,11995,1,144324,144324,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73483614771234,73483614777484,0,65536.0,185998.0,14878440.0
diff --git a/tests/workloads/kernel_inv_int/MI300A_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/kernel_inv_int/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..68a932b85d
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,144336,144336,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73483614724763,73483614733497,0,32768.0,524082.0,41922800.0
+1,11995,1,144336,144336,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73483614749922,73483614756171,0,32768.0,425442.0,34023372.0
+2,11995,1,144336,144336,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73483614771234,73483614777484,0,32768.0,422301.0,33786748.0
diff --git a/tests/workloads/kernel_inv_int/MI300A_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/kernel_inv_int/MI300A_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..dffaa32b31
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300A_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,11995,1,144349,144349,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73483614724763,73483614733497,0,210955.0,210955.0,116830.0,843820.0,16384.0,14124161.0,263903.0,0.0,56932880.0
+1,11995,1,144349,144349,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73483614749922,73483614756171,0,192470.0,192470.0,107296.0,769880.0,16384.0,10612359.0,199323.0,0.0,42875280.0
+2,11995,1,144349,144349,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73483614771234,73483614777484,0,175143.0,175143.0,94691.0,700572.0,16384.0,10152988.0,192824.0,0.0,41040344.0
diff --git a/tests/workloads/kernel_inv_int/MI300A_A1/log.txt b/tests/workloads/kernel_inv_int/MI300A_A1/log.txt
new file mode 100644
index 0000000000..255f4f468d
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300A_A1/log.txt
@@ -0,0 +1,281 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/kernel_inv_int/MI300A_A1
+Target: MI300A_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: ['42']
+Dispatch Selection: None
+Hardware Blocks: All
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH_LEVEL
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LEVEL_WAVES
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F16
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_SPI_BUSY
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_READ_TAGCONFLICT_STALL_CYCLES_sum
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_HITS
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_MISSES
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_MISSES_DUPLICATE
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying the output vector from the GPU to the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Releasing GPU memory
+   |-> [/opt/rocm/bin/rocprofv2] Releasing CPU memory
+   |-> [/opt/rocm/bin/rocprofv2] Results File: "tests/workloads/kernel_inv_int/MI300A_A1/out/pmc_1/results_pmc_perf_10.csv"
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_HITS
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES_DUPLICATE
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_1
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_13.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[1]
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_14.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[1]
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_15.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[3]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[3]
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_16.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[1]
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_17.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[3]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[3]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[3]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[4]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[4]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[4]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[5]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[5]
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F64
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT64
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_VALU
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_SCA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_MISC
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_WR
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_RD
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_SMEM
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_THREAD_CYCLES_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ADDR_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_UNALIGNED_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_EQ_64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_48
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ITEMS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_MEM_VIOLATIONS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ATOMIC_RETURN
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_IDX_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_RESTORED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_SAVED
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_VALU_MFMA_BUSY_CYCLES
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_INST_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_READ_REQ
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300A_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..a55111636d
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..77c4c17fdb
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..75cf851833
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..6aec712f85
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..c22a1b77ca
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_0.txt b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..3a066d4531
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD GRBM_COUNT GRBM_GUI_ACTIVE TCP_GATE_EN1_sum TCP_GATE_EN2_sum TCP_TD_TCP_STALL_CYCLES_sum TCP_TCR_TCP_STALL_CYCLES_sum TA_TA_BUSY_sum TA_BUFFER_WAVEFRONTS_sum TD_TD_BUSY_sum TD_TC_STALL_sum SPI_CSN_WINDOW_VALID SPI_CSN_BUSY CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE CPF_CPF_STAT_BUSY CPF_CPF_STAT_STALL TCC_CYCLE_sum TCC_BUSY_sum TCC_PROBE_sum TCC_PROBE_ALL_sum
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_1.txt b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..ec308842bd
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 GRBM_SPI_BUSY TCP_READ_TAGCONFLICT_STALL_CYCLES_sum TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum TCP_TA_TCP_STATE_READ_sum TA_BUFFER_READ_WAVEFRONTS_sum TA_BUFFER_WRITE_WAVEFRONTS_sum TD_SPI_STALL_sum TD_LOAD_WAVEFRONT_sum SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE CPC_CPC_TCIU_BUSY CPC_CPC_TCIU_IDLE CPF_CPF_TCIU_BUSY CPF_CPF_TCIU_STALL TCC_NC_REQ_sum TCC_UC_REQ_sum TCC_CC_REQ_sum TCC_RW_REQ_sum
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_10.txt b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..e3ae65b984
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_11.txt b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..249afa3c57
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_12.txt b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..e6dd3b8ec6
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_13.txt b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_13.txt
new file mode 100644
index 0000000000..70bd45bab0
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_13.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_ATOMIC[0] TCC_BUBBLE[0] TCC_CYCLE[0] TCC_EA0_ATOMIC[0] TCC_ATOMIC[1] TCC_BUBBLE[1] TCC_CYCLE[1] TCC_EA0_ATOMIC[1] TCC_ATOMIC[2] TCC_BUBBLE[2] TCC_CYCLE[2] TCC_EA0_ATOMIC[2] TCC_ATOMIC[3] TCC_BUBBLE[3] TCC_CYCLE[3] TCC_EA0_ATOMIC[3] TCC_ATOMIC[4] TCC_BUBBLE[4] TCC_CYCLE[4] TCC_EA0_ATOMIC[4] TCC_ATOMIC[5] TCC_BUBBLE[5] TCC_CYCLE[5] TCC_EA0_ATOMIC[5] TCC_ATOMIC[6] TCC_BUBBLE[6] TCC_CYCLE[6] TCC_EA0_ATOMIC[6] TCC_ATOMIC[7] TCC_BUBBLE[7] TCC_CYCLE[7] TCC_EA0_ATOMIC[7] TCC_ATOMIC[8] TCC_BUBBLE[8] TCC_CYCLE[8] TCC_EA0_ATOMIC[8] TCC_ATOMIC[9] TCC_BUBBLE[9] TCC_CYCLE[9] TCC_EA0_ATOMIC[9] TCC_ATOMIC[10] TCC_BUBBLE[10] TCC_CYCLE[10] TCC_EA0_ATOMIC[10] TCC_ATOMIC[11] TCC_BUBBLE[11] TCC_CYCLE[11] TCC_EA0_ATOMIC[11] TCC_ATOMIC[12] TCC_BUBBLE[12] TCC_CYCLE[12] TCC_EA0_ATOMIC[12] TCC_ATOMIC[13] TCC_BUBBLE[13] TCC_CYCLE[13] TCC_EA0_ATOMIC[13] TCC_ATOMIC[14] TCC_BUBBLE[14] TCC_CYCLE[14] TCC_EA0_ATOMIC[14] TCC_ATOMIC[15] TCC_BUBBLE[15] TCC_CYCLE[15] TCC_EA0_ATOMIC[15]
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_14.txt b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_14.txt
new file mode 100644
index 0000000000..fc42689058
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_14.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_ATOMIC_LEVEL[0] TCC_EA0_RDREQ[0] TCC_EA0_RDREQ_32B[0] TCC_EA0_RDREQ_LEVEL[0] TCC_EA0_ATOMIC_LEVEL[1] TCC_EA0_RDREQ[1] TCC_EA0_RDREQ_32B[1] TCC_EA0_RDREQ_LEVEL[1] TCC_EA0_ATOMIC_LEVEL[2] TCC_EA0_RDREQ[2] TCC_EA0_RDREQ_32B[2] TCC_EA0_RDREQ_LEVEL[2] TCC_EA0_ATOMIC_LEVEL[3] TCC_EA0_RDREQ[3] TCC_EA0_RDREQ_32B[3] TCC_EA0_RDREQ_LEVEL[3] TCC_EA0_ATOMIC_LEVEL[4] TCC_EA0_RDREQ[4] TCC_EA0_RDREQ_32B[4] TCC_EA0_RDREQ_LEVEL[4] TCC_EA0_ATOMIC_LEVEL[5] TCC_EA0_RDREQ[5] TCC_EA0_RDREQ_32B[5] TCC_EA0_RDREQ_LEVEL[5] TCC_EA0_ATOMIC_LEVEL[6] TCC_EA0_RDREQ[6] TCC_EA0_RDREQ_32B[6] TCC_EA0_RDREQ_LEVEL[6] TCC_EA0_ATOMIC_LEVEL[7] TCC_EA0_RDREQ[7] TCC_EA0_RDREQ_32B[7] TCC_EA0_RDREQ_LEVEL[7] TCC_EA0_ATOMIC_LEVEL[8] TCC_EA0_RDREQ[8] TCC_EA0_RDREQ_32B[8] TCC_EA0_RDREQ_LEVEL[8] TCC_EA0_ATOMIC_LEVEL[9] TCC_EA0_RDREQ[9] TCC_EA0_RDREQ_32B[9] TCC_EA0_RDREQ_LEVEL[9] TCC_EA0_ATOMIC_LEVEL[10] TCC_EA0_RDREQ[10] TCC_EA0_RDREQ_32B[10] TCC_EA0_RDREQ_LEVEL[10] TCC_EA0_ATOMIC_LEVEL[11] TCC_EA0_RDREQ[11] TCC_EA0_RDREQ_32B[11] TCC_EA0_RDREQ_LEVEL[11] TCC_EA0_ATOMIC_LEVEL[12] TCC_EA0_RDREQ[12] TCC_EA0_RDREQ_32B[12] TCC_EA0_RDREQ_LEVEL[12] TCC_EA0_ATOMIC_LEVEL[13] TCC_EA0_RDREQ[13] TCC_EA0_RDREQ_32B[13] TCC_EA0_RDREQ_LEVEL[13] TCC_EA0_ATOMIC_LEVEL[14] TCC_EA0_RDREQ[14] TCC_EA0_RDREQ_32B[14] TCC_EA0_RDREQ_LEVEL[14] TCC_EA0_ATOMIC_LEVEL[15] TCC_EA0_RDREQ[15] TCC_EA0_RDREQ_32B[15] TCC_EA0_RDREQ_LEVEL[15]
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_15.txt b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_15.txt
new file mode 100644
index 0000000000..3b9f8198a3
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_15.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_WRREQ[0] TCC_EA0_WRREQ_64B[0] TCC_EA0_WRREQ_LEVEL[0] TCC_HIT[0] TCC_EA0_WRREQ[1] TCC_EA0_WRREQ_64B[1] TCC_EA0_WRREQ_LEVEL[1] TCC_HIT[1] TCC_EA0_WRREQ[2] TCC_EA0_WRREQ_64B[2] TCC_EA0_WRREQ_LEVEL[2] TCC_HIT[2] TCC_EA0_WRREQ[3] TCC_EA0_WRREQ_64B[3] TCC_EA0_WRREQ_LEVEL[3] TCC_HIT[3] TCC_EA0_WRREQ[4] TCC_EA0_WRREQ_64B[4] TCC_EA0_WRREQ_LEVEL[4] TCC_HIT[4] TCC_EA0_WRREQ[5] TCC_EA0_WRREQ_64B[5] TCC_EA0_WRREQ_LEVEL[5] TCC_HIT[5] TCC_EA0_WRREQ[6] TCC_EA0_WRREQ_64B[6] TCC_EA0_WRREQ_LEVEL[6] TCC_HIT[6] TCC_EA0_WRREQ[7] TCC_EA0_WRREQ_64B[7] TCC_EA0_WRREQ_LEVEL[7] TCC_HIT[7] TCC_EA0_WRREQ[8] TCC_EA0_WRREQ_64B[8] TCC_EA0_WRREQ_LEVEL[8] TCC_HIT[8] TCC_EA0_WRREQ[9] TCC_EA0_WRREQ_64B[9] TCC_EA0_WRREQ_LEVEL[9] TCC_HIT[9] TCC_EA0_WRREQ[10] TCC_EA0_WRREQ_64B[10] TCC_EA0_WRREQ_LEVEL[10] TCC_HIT[10] TCC_EA0_WRREQ[11] TCC_EA0_WRREQ_64B[11] TCC_EA0_WRREQ_LEVEL[11] TCC_HIT[11] TCC_EA0_WRREQ[12] TCC_EA0_WRREQ_64B[12] TCC_EA0_WRREQ_LEVEL[12] TCC_HIT[12] TCC_EA0_WRREQ[13] TCC_EA0_WRREQ_64B[13] TCC_EA0_WRREQ_LEVEL[13] TCC_HIT[13] TCC_EA0_WRREQ[14] TCC_EA0_WRREQ_64B[14] TCC_EA0_WRREQ_LEVEL[14] TCC_HIT[14] TCC_EA0_WRREQ[15] TCC_EA0_WRREQ_64B[15] TCC_EA0_WRREQ_LEVEL[15] TCC_HIT[15]
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_16.txt b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_16.txt
new file mode 100644
index 0000000000..4d508c843d
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_16.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_MISS[0] TCC_READ[0] TCC_REQ[0] TCC_RW_REQ[0] TCC_MISS[1] TCC_READ[1] TCC_REQ[1] TCC_RW_REQ[1] TCC_MISS[2] TCC_READ[2] TCC_REQ[2] TCC_RW_REQ[2] TCC_MISS[3] TCC_READ[3] TCC_REQ[3] TCC_RW_REQ[3] TCC_MISS[4] TCC_READ[4] TCC_REQ[4] TCC_RW_REQ[4] TCC_MISS[5] TCC_READ[5] TCC_REQ[5] TCC_RW_REQ[5] TCC_MISS[6] TCC_READ[6] TCC_REQ[6] TCC_RW_REQ[6] TCC_MISS[7] TCC_READ[7] TCC_REQ[7] TCC_RW_REQ[7] TCC_MISS[8] TCC_READ[8] TCC_REQ[8] TCC_RW_REQ[8] TCC_MISS[9] TCC_READ[9] TCC_REQ[9] TCC_RW_REQ[9] TCC_MISS[10] TCC_READ[10] TCC_REQ[10] TCC_RW_REQ[10] TCC_MISS[11] TCC_READ[11] TCC_REQ[11] TCC_RW_REQ[11] TCC_MISS[12] TCC_READ[12] TCC_REQ[12] TCC_RW_REQ[12] TCC_MISS[13] TCC_READ[13] TCC_REQ[13] TCC_RW_REQ[13] TCC_MISS[14] TCC_READ[14] TCC_REQ[14] TCC_RW_REQ[14] TCC_MISS[15] TCC_READ[15] TCC_REQ[15] TCC_RW_REQ[15]
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_17.txt b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_17.txt
new file mode 100644
index 0000000000..102066879b
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_17.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_TAG_STALL[0] TCC_TOO_MANY_EA_WRREQS_STALL[0] TCC_WRITE[0] TCC_TAG_STALL[1] TCC_TOO_MANY_EA_WRREQS_STALL[1] TCC_WRITE[1] TCC_TAG_STALL[2] TCC_TOO_MANY_EA_WRREQS_STALL[2] TCC_WRITE[2] TCC_TAG_STALL[3] TCC_TOO_MANY_EA_WRREQS_STALL[3] TCC_WRITE[3] TCC_TAG_STALL[4] TCC_TOO_MANY_EA_WRREQS_STALL[4] TCC_WRITE[4] TCC_TAG_STALL[5] TCC_TOO_MANY_EA_WRREQS_STALL[5] TCC_WRITE[5] TCC_TAG_STALL[6] TCC_TOO_MANY_EA_WRREQS_STALL[6] TCC_WRITE[6] TCC_TAG_STALL[7] TCC_TOO_MANY_EA_WRREQS_STALL[7] TCC_WRITE[7] TCC_TAG_STALL[8] TCC_TOO_MANY_EA_WRREQS_STALL[8] TCC_WRITE[8] TCC_TAG_STALL[9] TCC_TOO_MANY_EA_WRREQS_STALL[9] TCC_WRITE[9] TCC_TAG_STALL[10] TCC_TOO_MANY_EA_WRREQS_STALL[10] TCC_WRITE[10] TCC_TAG_STALL[11] TCC_TOO_MANY_EA_WRREQS_STALL[11] TCC_WRITE[11] TCC_TAG_STALL[12] TCC_TOO_MANY_EA_WRREQS_STALL[12] TCC_WRITE[12] TCC_TAG_STALL[13] TCC_TOO_MANY_EA_WRREQS_STALL[13] TCC_WRITE[13] TCC_TAG_STALL[14] TCC_TOO_MANY_EA_WRREQS_STALL[14] TCC_WRITE[14] TCC_TAG_STALL[15] TCC_TOO_MANY_EA_WRREQS_STALL[15] TCC_WRITE[15]
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_2.txt b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..5919f4d97c
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 TCP_VOLATILE_sum TCP_TOTAL_ACCESSES_sum TCP_TOTAL_READ_sum TCP_TOTAL_WRITE_sum TA_BUFFER_ATOMIC_WAVEFRONTS_sum TA_BUFFER_TOTAL_CYCLES_sum TD_ATOMIC_WAVEFRONT_sum TD_STORE_WAVEFRONT_sum SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION CPF_CPF_STAT_IDLE CPF_CPF_TCIU_IDLE TCC_REQ_sum TCC_STREAMING_REQ_sum TCC_HIT_sum TCC_MISS_sum
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_3.txt b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..bbb2216a0d
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS TCP_TOTAL_ATOMIC_WITH_RET_sum TCP_TOTAL_ATOMIC_WITHOUT_RET_sum TCP_TOTAL_WRITEBACK_INVALIDATES_sum TCP_TOTAL_CACHE_ACCESSES_sum TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES_sum TD_COALESCABLE_WAVEFRONT_sum SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE CPF_CMP_UTCL1_STALL_ON_TRANSLATION TCC_READ_sum TCC_WRITE_sum TCC_ATOMIC_sum TCC_WRITEBACK_sum
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_4.txt b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..dd57020fbf
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAIT_ANY SQ_WAIT_INST_ANY SQ_ACTIVE_INST_ANY SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU TCP_UTCL1_TRANSLATION_MISS_sum TCP_UTCL1_TRANSLATION_HIT_sum TCP_UTCL1_PERMISSION_MISS_sum TCP_UTCL1_REQUEST_sum TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_TOTAL_WAVEFRONTS_sum SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE TCC_EA0_WRREQ_sum TCC_EA0_WRREQ_64B_sum TCC_EA0_WR_UNCACHED_32B_sum TCC_EA0_WRREQ_DRAM_sum
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_5.txt b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..0740e92282
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_SCA SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU TCP_TCC_READ_REQ_sum TCP_TCC_WRITE_REQ_sum TCP_TCC_ATOMIC_WITH_RET_REQ_sum TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN CPC_ME1_DC0_SPI_BUSY TCC_EA0_RDREQ_sum TCC_EA0_RDREQ_32B_sum TCC_BUBBLE_sum TCC_EA0_RD_UNCACHED_32B_sum
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_6.txt b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..0b3aef5b1d
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_THREAD_CYCLES_VALU SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 TCP_TCC_NC_READ_REQ_sum TCP_TCC_NC_WRITE_REQ_sum TCP_TCC_NC_ATOMIC_REQ_sum TCP_TCC_UC_READ_REQ_sum TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN TCC_EA0_RDREQ_DRAM_sum TCC_TAG_STALL_sum TCC_NORMAL_WRITEBACK_sum TCC_ALL_TC_OP_WB_WRITEBACK_sum
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_7.txt b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..7d4bb45735
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED TCP_TCC_UC_WRITE_REQ_sum TCP_TCC_UC_ATOMIC_REQ_sum TCP_TCC_CC_READ_REQ_sum TCP_TCC_CC_WRITE_REQ_sum TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR TCC_NORMAL_EVICT_sum TCC_ALL_TC_OP_INV_EVICT_sum TCC_TOO_MANY_EA_WRREQS_STALL_sum TCC_EA0_ATOMIC_sum
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_8.txt b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..643dc038ce
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES TCP_TCC_CC_ATOMIC_REQ_sum TCP_TCC_RW_READ_REQ_sum TCP_TCC_RW_WRITE_REQ_sum TCP_TCC_RW_ATOMIC_REQ_sum SPI_VWC_CSC_WR SPI_RA_BULKY_CU_FULL_CSN TCC_EA0_RDREQ_LEVEL_sum TCC_EA0_WRREQ_LEVEL_sum TCC_EA0_ATOMIC_LEVEL_sum TCC_EA0_WRREQ_STALL_sum
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_9.txt b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..792e960de1
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ TCP_PENDING_STALL_CYCLES_sum
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/timestamps.txt b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..54a64b6ee1
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300A_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300A_A1/pmc_perf.csv b/tests/workloads/kernel_inv_int/MI300A_A1/pmc_perf.csv
new file mode 100644
index 0000000000..8e24914f7a
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300A_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
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CED_WRITE_CYCLES_sum,TCC_ATOMIC_sum,TCC_READ_sum,TCC_WRITEBACK_sum,TCC_WRITE_sum,TCP_TOTAL_ATOMIC_WITHOUT_RET_sum,TCP_TOTAL_ATOMIC_WITH_RET_sum,TCP_TOTAL_CACHE_ACCESSES_sum,TCP_TOTAL_WRITEBACK_INVALIDATES_sum,TD_COALESCABLE_WAVEFRONT_sum,Wave_Size_5,Correlation_ID_5,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,TA_FLAT_ATOMIC_WAVEFRONTS_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,TCC_ALL_TC_OP_INV_EVICT_sum,TCC_EA0_ATOMIC_sum,TCC_NORMAL_EVICT_sum,TCC_TOO_MANY_EA_WRREQS_STALL_sum,TCP_TCC_CC_READ_REQ_sum,TCP_TCC_CC_WRITE_REQ_sum,TCP_TCC_UC_ATOMIC_REQ_sum,TCP_TCC_UC_WRITE_REQ_sum,Wave_Size_6,Correlation_ID_6,XCC_Index_6,TCC_MISS[0],TCC_READ[0],TCC_REQ[0],TCC_RW_REQ[0],TCC_MISS[1],TCC_READ[1],TCC_REQ[1],TCC_RW_REQ[1],TCC_MISS[2],TCC_READ[2],TCC_REQ[2],TCC_RW_REQ[2],TCC_MISS[3],TCC_READ[3],TCC_REQ[3],TCC_RW_REQ[3],TCC_MISS[4],TCC_READ[4],TCC_REQ[4],TCC_RW_REQ[4],TCC_MISS[5],TCC_READ[5],TCC_REQ[5],TCC_RW_REQ[5],TCC_MISS[6],TCC_READ[6],TCC_REQ[6],TCC_RW_REQ[6],TCC_MISS[7],TCC_READ[7],TCC_REQ[7],TCC_RW_REQ[7],TCC_MISS[8],TCC_READ[8],TCC_REQ[8],TCC_RW_REQ[8],TCC_MISS[9],TCC_READ[9],TCC_REQ[9],TCC_RW_REQ[9],TCC_MISS[10],TCC_READ[10],TCC_REQ[10],TCC_RW_REQ[10],TCC_MISS[11],TCC_READ[11],TCC_REQ[11],TCC_RW_REQ[11],TCC_MISS[12],TCC_READ[12],TCC_REQ[12],TCC_RW_REQ[12],TCC_MISS[13],TCC_READ[13],TCC_REQ[13],TCC_RW_REQ[13],TCC_MISS[14],TCC_READ[14],TCC_REQ[14],TCC_RW_REQ[14],TCC_MISS[15],TCC_READ[15],TCC_REQ[15],TCC_RW_REQ[15],TCC_MISS[16],TCC_READ[16],TCC_REQ[16],TCC_RW_REQ[16],TCC_MISS[17],TCC_READ[17],TCC_REQ[17],TCC_RW_REQ[17],TCC_MISS[18],TCC_READ[18],TCC_REQ[18],TCC_RW_REQ[18],TCC_MISS[19],TCC_READ[19],TCC_REQ[19],TCC_RW_REQ[19],TCC_MISS[20],TCC_READ[20],TCC_REQ[20],TCC_RW_REQ[20],TCC_MISS[21],TCC_READ[21],TCC_REQ[21],TCC_RW_REQ[21],TCC_MISS[22],TCC_READ[22],TCC_REQ[22],TCC_RW_REQ[22],TCC_MISS[23],TCC_READ[23],TCC_REQ[23],TCC_RW_REQ[23],TCC_MISS[24],TCC_READ[24],TCC_REQ[24],TCC_RW_REQ[24],TCC_MISS[25],TCC_READ[25],TCC_REQ[25],TCC_RW_REQ[25],TCC_MISS[26],TCC_READ[26],TCC_REQ[26],TCC_RW_REQ[26],TCC_MISS[27],TCC_READ[27],TCC_REQ[27],TCC_RW_REQ[27],TCC_MISS[28],TCC_READ[28],TCC_REQ[28],TCC_RW_REQ[28],TCC_MISS[29],TCC_READ[29],TCC_REQ[29],TCC_RW_REQ[29],TCC_MISS[30],TCC_READ[30],TCC_REQ[30],TCC_RW_REQ[30],TCC_MISS[31],TCC_READ[31],TCC_REQ[31],TCC_RW_REQ[31],TCC_MISS[32],TCC_READ[32],TCC_REQ[32],TCC_RW_REQ[32],TCC_MISS[33],TCC_READ[33],TCC_REQ[33],TCC_RW_REQ[33],TCC_MISS[34],TCC_READ[34],TCC_REQ[34],TCC_RW_REQ[34],TCC_MISS[35],TCC_READ[35],TCC_REQ[35],TCC_RW_REQ[35],TCC_MISS[36],TCC_READ[36],TCC_REQ[36],TCC_RW_REQ[36],TCC_MISS[37],TCC_READ[37],TCC_REQ[37],TCC_RW_REQ[37],TCC_MISS[38],TCC_READ[38],TCC_REQ[38],TCC_RW_REQ[38],TCC_MISS[39],TCC_READ[39],TCC_REQ[39],TCC_RW_REQ[39],TCC_MISS[40],TCC_READ[40],TCC_REQ[40],TCC_RW_REQ[40],TCC_MISS[41],TCC_READ[41],TCC_REQ[41],TCC_RW_REQ[41],TCC_MISS[42],TCC_READ[42],TCC_REQ[42],TCC_RW_REQ[42],TCC_MISS[43],TCC_READ[43],TCC_REQ[43],TCC_RW_REQ[43],TCC_MISS[44],TCC_READ[44],TCC_REQ[44],TCC_RW_REQ[44],TCC_MISS[45],TCC_READ[45],TCC_REQ[45],TCC_RW_REQ[45],TCC_MISS[46],TCC_READ[46],TCC_REQ[46],TCC_RW_REQ[46],TCC_MISS[47],TCC_READ[47],TCC_REQ[47],TCC_RW_REQ[47],TCC_MISS[48],TCC_READ[48],TCC_REQ[48],TCC_RW_REQ[48],TCC_MISS[49],TCC_READ[49],TCC_REQ[49],TCC_RW_REQ[49],TCC_MISS[50],TCC_READ[50],TCC_REQ[50],TCC_RW_REQ[50],TCC_MISS[51],TCC_READ[51],TCC_REQ[51],TCC_RW_REQ[51],TCC_MISS[52],TCC_READ[52],TCC_REQ[52],TCC_RW_REQ[52],TCC_MISS[53],TCC_READ[53],TCC_REQ[53],TCC_RW_REQ[53],TCC_MISS[54],TCC_READ[54],TCC_REQ[54],TCC_RW_REQ[54],TCC_MISS[55],TCC_READ[55],TCC_REQ[55],TCC_RW_REQ[55],TCC_MISS[56],TCC_READ[56],TCC_REQ[56],TCC_RW_REQ[56],TCC_MISS[57],TCC_READ[57],TCC_REQ[57],TCC_RW_REQ[57],TCC_MISS[58],TCC_READ[58],TCC_REQ[58],TCC_RW_REQ[58],TCC_MISS[59],TCC_READ[59],TCC_REQ[59],TCC_RW_REQ[59],TCC_MISS[60],TCC_READ[60],TCC_REQ[60],TCC_RW_REQ[60],TCC_MISS[61],TCC_READ[61],TCC_REQ[61],TCC_RW_REQ[61],TCC_MISS[62],TCC_READ[62],TCC_REQ[62],TCC_RW_REQ[62],TCC_MISS[63],TCC_READ[63],TCC_REQ[63],TCC_RW_REQ[63],TCC_MISS[64],TCC_READ[64],TCC_REQ[64],TCC_RW_REQ[64],TCC_MISS[65],TCC_READ[65],TCC_REQ[65],TCC_RW_REQ[65],TCC_MISS[66],TCC_READ[66],TCC_REQ[66],TCC_RW_REQ[66],TCC_MISS[67],TCC_READ[67],TCC_REQ[67],TCC_RW_REQ[67],TCC_MISS[68],TCC_READ[68],TCC_REQ[68],TCC_RW_REQ[68],TCC_MISS[69],TCC_READ[69],TCC_REQ[69],TCC_RW_REQ[69],TCC_MISS[70],TCC_READ[70],TCC_REQ[70],TCC_RW_REQ[70],TCC_MISS[71],TCC_READ[71],TCC_REQ[71],TCC_RW_REQ[71],TCC_MISS[72],TCC_READ[72],TCC_REQ[72],TCC_RW_REQ[72],TCC_MISS[73],TCC_READ[73],TCC_REQ[73],TCC_RW_REQ[73],TCC_MISS[74],TCC_READ[74],TCC_REQ[74],TCC_RW_REQ[74],TCC_MISS[75],TCC_READ[75],TCC_REQ[75],TCC_RW_REQ[75],TCC_MISS[76],TCC_READ[76],TCC_REQ[76],TCC_RW_REQ[76],TCC_MISS[77],TCC_READ[77],TCC_REQ[77],TCC_RW_REQ[77],TCC_MISS[78],TCC_READ[78],TCC_REQ[78],TCC_RW_REQ[78],TCC_MISS[79],TCC_READ[79],TCC_REQ[79],TCC_RW_REQ[79],TCC_MISS[80],TCC_READ[80],TCC_REQ[80],TCC_RW_REQ[80],TCC_MISS[81],TCC_READ[81],TCC_REQ[81],TCC_RW_REQ[81],TCC_MISS[82],TCC_READ[82],TCC_REQ[82],TCC_RW_REQ[82],TCC_MISS[83],TCC_READ[83],TCC_REQ[83],TCC_RW_REQ[83],TCC_MISS[84],TCC_READ[84],TCC_REQ[84],TCC_RW_REQ[84],TCC_MISS[85],TCC_READ[85],TCC_REQ[85],TCC_RW_REQ[85],TCC_MISS[86],TCC_READ[86],TCC_REQ[86],TCC_RW_REQ[86],TCC_MISS[87],TCC_READ[87],TCC_REQ[87],TCC_RW_REQ[87],TCC_MISS[88],TCC_READ[88],TCC_REQ[88],TCC_RW_REQ[88],TCC_MISS[89],TCC_READ[89],TCC_REQ[89],TCC_RW_REQ[89],TCC_MISS[90],TCC_READ[90],TCC_REQ[90],TCC_RW_REQ[90],TCC_MISS[91],TCC_READ[91],TCC_REQ[91],TCC_RW_REQ[91],TCC_MISS[92],TCC_READ[92],TCC_REQ[92],TCC_RW_REQ[92],TCC_MISS[93],TCC_READ[93],TCC_REQ[93],TCC_RW_REQ[93],TCC_MISS[94],TCC_READ[94],TCC_REQ[94],TCC_RW_REQ[94],TCC_MISS[95],TCC_READ[95],TCC_REQ[95],TCC_RW_REQ[95],Wave_Size_7,Correlation_ID_7,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SPI_RA_REQ_NO_ALLOC,SPI_RA_REQ_NO_ALLOC_CSN,CPC_CPC_STAT_STALL,CPC_UTCL1_STALL_ON_TRANSLATION,CPF_CPF_STAT_IDLE,CPF_CPF_TCIU_IDLE,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,TA_BUFFER_TOTAL_CYCLES_sum,TCC_HIT_sum,TCC_MISS_sum,TCC_REQ_sum,TCC_STREAMING_REQ_sum,TCP_TOTAL_ACCESSES_sum,TCP_TOTAL_READ_sum,TCP_TOTAL_WRITE_sum,TCP_VOLATILE_sum,TD_ATOMIC_WAVEFRONT_sum,TD_STORE_WAVEFRONT_sum,Wave_Size_8,Correlation_ID_8,XCC_Index_8,TCC_ATOMIC[0],TCC_BUBBLE[0],TCC_CYCLE[0],TCC_EA0_ATOMIC[0],TCC_ATOMIC[1],TCC_BUBBLE[1],TCC_CYCLE[1],TCC_EA0_ATOMIC[1],TCC_ATOMIC[2],TCC_BUBBLE[2],TCC_CYCLE[2],TCC_EA0_ATOMIC[2],TCC_ATOMIC[3],TCC_BUBBLE[3],TCC_CYCLE[3],TCC_EA0_ATOMIC[3],TCC_ATOMIC[4],TCC_BUBBLE[4],TCC_CYCLE[4],TCC_EA0_ATOMIC[4],TCC_ATOMIC[5],TCC_BUBBLE[5],TCC_CYCLE[5],TCC_EA0_ATOMIC[5],TCC_ATOMIC[6],TCC_BUBBLE[6],TCC_CYCLE[6],TCC_EA0_ATOMIC[6],TCC_ATOMIC[7],TCC_BUBBLE[7],TCC_CYCLE[7],TCC_EA0_ATOMIC[7],TCC_ATOMIC[8],TCC_BUBBLE[8],TCC_CYCLE[8],TCC_EA0_ATOMIC[8],TCC_ATOMIC[9],TCC_BUBBLE[9],TCC_CYCLE[9],TCC_EA0_ATOMIC[9],TCC_ATOMIC[10],TCC_BUBBLE[10],TCC_CYCLE[10],TCC_EA0_ATOMIC[10],TCC_ATOMIC[11],TCC_BUBBLE[11],TCC_CYCLE[11],TCC_EA0_ATOMIC[11],TCC_ATOMIC[12],TCC_BUBBLE[12],TCC_CYCLE[12],TCC_EA0_ATOMIC[12],TCC_ATOMIC[13],TCC_BUBBLE[13],TCC_CYCLE[13],TCC_EA0_ATOMIC[13],TCC_ATOMIC[14],TCC_BUBBLE[14],TCC_CYCLE[14],TCC_EA0_ATOMIC[14],TCC_ATOMIC[15],TCC_BUBBLE[15],TCC_CYCLE[15],TCC_EA0_ATOMIC[15],TCC_ATOMIC[16],TCC_BUBBLE[16],TCC_CYCLE[16],TCC_EA0_ATOMIC[16],TCC_ATOMIC[17],TCC_BUBBLE[17],TCC_CYCLE[17],TCC_EA0_ATOMIC[17],TCC_ATOMIC[18],TCC_BUBBLE[18],TCC_CYCLE[18],TCC_EA0_ATOMIC[18],TCC_ATOMIC[19],TCC_BUBBLE[19],TCC_CYCLE[19],TCC_EA0_ATOMIC[19],TCC_ATOMIC[20],TCC_BUBBLE[20],TCC_CYCLE[20],TCC_EA0_ATOMIC[20],TCC_ATOMIC[21],TCC_BUBBLE[21],TCC_CYCLE[21],TCC_EA0_ATOMIC[21],TCC_ATOMIC[22],TCC_BUBBLE[22],TCC_CYCLE[22],TCC_EA0_ATOMIC[22],TCC_ATOMIC[23],TCC_BUBBLE[23],TCC_CYCLE[23],TCC_EA0_ATOMIC[23],TCC_ATOMIC[24],TCC_BUBBLE[24],TCC_CYCLE[24],TCC_EA0_ATOMIC[24],TCC_ATOMIC[25],TCC_BUBBLE[25],TCC_CYCLE[25],TCC_EA0_ATOMIC[25],TCC_ATOMIC[26],TCC_BUBBLE[26],TCC_CYCLE[26],TCC_EA0_ATOMIC[26],TCC_ATOMIC[27],TCC_BUBBLE[27],TCC_CYCLE[27],TCC_EA0_ATOMIC[27],TCC_ATOMIC[28],TCC_BUBBLE[28],TCC_CYCLE[28],TCC_EA0_ATOMIC[28],TCC_ATOMIC[29],TCC_BUBBLE[29],TCC_CYCLE[29],TCC_EA0_ATOMIC[29],TCC_ATOMIC[30],TCC_BUBBLE[30],TCC_CYCLE[30],TCC_EA0_ATOMIC[30],TCC_ATOMIC[31],TCC_BUBBLE[31],TCC_CYCLE[31],TCC_EA0_ATOMIC[31],TCC_ATOMIC[32],TCC_BUBBLE[32],TCC_CYCLE[32],TCC_EA0_ATOMIC[32],TCC_ATOMIC[33],TCC_BUBBLE[33],TCC_CYCLE[33],TCC_EA0_ATOMIC[33],TCC_ATOMIC[34],TCC_BUBBLE[34],TCC_CYCLE[34],TCC_EA0_ATOMIC[34],TCC_ATOMIC[35],TCC_BUBBLE[35],TCC_CYCLE[35],TCC_EA0_ATOMIC[35],TCC_ATOMIC[36],TCC_BUBBLE[36],TCC_CYCLE[36],TCC_EA0_ATOMIC[36],TCC_ATOMIC[37],TCC_BUBBLE[37],TCC_CYCLE[37],TCC_EA0_ATOMIC[37],TCC_ATOMIC[38],TCC_BUBBLE[38],TCC_CYCLE[38],TCC_EA0_ATOMIC[38],TCC_ATOMIC[39],TCC_BUBBLE[39],TCC_CYCLE[39],TCC_EA0_ATOMIC[39],TCC_ATOMIC[40],TCC_BUBBLE[40],TCC_CYCLE[40],TCC_EA0_ATOMIC[40],TCC_ATOMIC[41],TCC_BUBBLE[41],TCC_CYCLE[41],TCC_EA0_ATOMIC[41],TCC_ATOMIC[42],TCC_BUBBLE[42],TCC_CYCLE[42],TCC_EA0_ATOMIC[42],TCC_ATOMIC[43],TCC_BUBBLE[43],TCC_CYCLE[43],TCC_EA0_ATOMIC[43],TCC_ATOMIC[44],TCC_BUBBLE[44],TCC_CYCLE[44],TCC_EA0_ATOMIC[44],TCC_ATOMIC[45],TCC_BUBBLE[45],TCC_CYCLE[45],TCC_EA0_ATOMIC[45],TCC_ATOMIC[46],TCC_BUBBLE[46],TCC_CYCLE[46],TCC_EA0_ATOMIC[46],TCC_ATOMIC[47],TCC_BUBBLE[47],TCC_CYCLE[47],TCC_EA0_ATOMIC[47],TCC_ATOMIC[48],TCC_BUBBLE[48],TCC_CYCLE[48],TCC_EA0_ATOMIC[48],TCC_ATOMIC[49],TCC_BUBBLE[49],TCC_CYCLE[49],TCC_EA0_ATOMIC[49],TCC_ATOMIC[50],TCC_BUBBLE[50],TCC_CYCLE[50],TCC_EA0_ATOMIC[50],TCC_ATOMIC[51],TCC_BUBBLE[51],TCC_CYCLE[51],TCC_EA0_ATOMIC[51],TCC_ATOMIC[52],TCC_BUBBLE[52],TCC_CYCLE[52],TCC_EA0_ATOMIC[52],TCC_ATOMIC[53],TCC_BUBBLE[53],TCC_CYCLE[53],TCC_EA0_ATOMIC[53],TCC_ATOMIC[54],TCC_BUBBLE[54],TCC_CYCLE[54],TCC_EA0_ATOMIC[54],TCC_ATOMIC[55],TCC_BUBBLE[55],TCC_CYCLE[55],TCC_EA0_ATOMIC[55],TCC_ATOMIC[56],TCC_BUBBLE[56],TCC_CYCLE[56],TCC_EA0_ATOMIC[56],TCC_ATOMIC[57],TCC_BUBBLE[57],TCC_CYCLE[57],TCC_EA0_ATOMIC[57],TCC_ATOMIC[58],TCC_BUBBLE[58],TCC_CYCLE[58],TCC_EA0_ATOMIC[58],TCC_ATOMIC[59],TCC_BUBBLE[59],TCC_CYCLE[59],TCC_EA0_ATOMIC[59],TCC_ATOMIC[60],TCC_BUBBLE[60],TCC_CYCLE[60],TCC_EA0_ATOMIC[60],TCC_ATOMIC[61],TCC_BUBBLE[61],TCC_CYCLE[61],TCC_EA0_ATOMIC[61],TCC_ATOMIC[62],TCC_BUBBLE[62],TCC_CYCLE[62],TCC_EA0_ATOMIC[62],TCC_ATOMIC[63],TCC_BUBBLE[63],TCC_CYCLE[63],TCC_EA0_ATOMIC[63],TCC_ATOMIC[64],TCC_BUBBLE[64],TCC_CYCLE[64],TCC_EA0_ATOMIC[64],TCC_ATOMIC[65],TCC_BUBBLE[65],TCC_CYCLE[65],TCC_EA0_ATOMIC[65],TCC_ATOMIC[66],TCC_BUBBLE[66],TCC_CYCLE[66],TCC_EA0_ATOMIC[66],TCC_ATOMIC[67],TCC_BUBBLE[67],TCC_CYCLE[67],TCC_EA0_ATOMIC[67],TCC_ATOMIC[68],TCC_BUBBLE[68],TCC_CYCLE[68],TCC_EA0_ATOMIC[68],TCC_ATOMIC[69],TCC_BUBBLE[69],TCC_CYCLE[69],TCC_EA0_ATOMIC[69],TCC_ATOMIC[70],TCC_BUBBLE[70],TCC_CYCLE[70],TCC_EA0_ATOMIC[70],TCC_ATOMIC[71],TCC_BUBBLE[71],TCC_CYCLE[71],TCC_EA0_ATOMIC[71],TCC_ATOMIC[72],TCC_BUBBLE[72],TCC_CYCLE[72],TCC_EA0_ATOMIC[72],TCC_ATOMIC[73],TCC_BUBBLE[73],TCC_CYCLE[73],TCC_EA0_ATOMIC[73],TCC_ATOMIC[74],TCC_BUBBLE[74],TCC_CYCLE[74],TCC_EA0_ATOMIC[74],TCC_ATOMIC[75],TCC_BUBBLE[75],TCC_CYCLE[75],TCC_EA0_ATOMIC[75],TCC_ATOMIC[76],TCC_BUBBLE[76],TCC_CYCLE[76],TCC_EA0_ATOMIC[76],TCC_ATOMIC[77],TCC_BUBBLE[77],TCC_CYCLE[77],TCC_EA0_ATOMIC[77],TCC_ATOMIC[78],TCC_BUBBLE[78],TCC_CYCLE[78],TCC_EA0_ATOMIC[78],TCC_ATOMIC[79],TCC_BUBBLE[79],TCC_CYCLE[79],TCC_EA0_ATOMIC[79],TCC_ATOMIC[80],TCC_BUBBLE[80],TCC_CYCLE[80],TCC_EA0_ATOMIC[80],TCC_ATOMIC[81],TCC_BUBBLE[81],TCC_CYCLE[81],TCC_EA0_ATOMIC[81],TCC_ATOMIC[82],TCC_BUBBLE[82],TCC_CYCLE[82],TCC_EA0_ATOMIC[82],TCC_ATOMIC[83],TCC_BUBBLE[83],TCC_CYCLE[83],TCC_EA0_ATOMIC[83],TCC_ATOMIC[84],TCC_BUBBLE[84],TCC_CYCLE[84],TCC_EA0_ATOMIC[84],TCC_ATOMIC[85],TCC_BUBBLE[85],TCC_CYCLE[85],TCC_EA0_ATOMIC[85],TCC_ATOMIC[86],TCC_BUBBLE[86],TCC_CYCLE[86],TCC_EA0_ATOMIC[86],TCC_ATOMIC[87],TCC_BUBBLE[87],TCC_CYCLE[87],TCC_EA0_ATOMIC[87],TCC_ATOMIC[88],TCC_BUBBLE[88],TCC_CYCLE[88],TCC_EA0_ATOMIC[88],TCC_ATOMIC[89],TCC_BUBBLE[89],TCC_CYCLE[89],TCC_EA0_ATOMIC[89],TCC_ATOMIC[90],TCC_BUBBLE[90],TCC_CYCLE[90],TCC_EA0_ATOMIC[90],TCC_ATOMIC[91],TCC_BUBBLE[91],TCC_CYCLE[91],TCC_EA0_ATOMIC[91],TCC_ATOMIC[92],TCC_BUBBLE[92],TCC_CYCLE[92],TCC_EA0_ATOMIC[92],TCC_ATOMIC[93],TCC_BUBBLE[93],TCC_CYCLE[93],TCC_EA0_ATOMIC[93],TCC_ATOMIC[94],TCC_BUBBLE[94],TCC_CYCLE[94],TCC_EA0_ATOMIC[94],TCC_ATOMIC[95],TCC_BUBBLE[95],TCC_CYCLE[95],TCC_EA0_ATOMIC[95],Wave_Size_9,Correlation_ID_9,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_10,Correlation_ID_10,SQC_TC_DATA_ATOMIC_REQ,SQC_TC_STALL,SQC_TC_REQ,SQC_DCACHE_REQ_READ_16,SQC_ICACHE_REQ,SQC_ICACHE_HITS,SQC_ICACHE_MISSES,SQC_ICACHE_MISSES_DUPLICATE,Wave_Size_11,Correlation_ID_11,SQ_INSTS_VALU_MFMA_MOPS_I8,SQ_INSTS_VALU_MFMA_MOPS_F16,SQ_INSTS_VALU_MFMA_MOPS_BF16,SQ_INSTS_VALU_MFMA_MOPS_F32,SQ_INSTS_VALU_MFMA_MOPS_F64,SQC_TC_INST_REQ,SQC_TC_DATA_READ_REQ,SQC_TC_DATA_WRITE_REQ,TCP_PENDING_STALL_CYCLES_sum,Wave_Size_12,Correlation_ID_12,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,TCC_EA0_ATOMIC_LEVEL_sum,TCC_EA0_RDREQ_LEVEL_sum,TCC_EA0_WRREQ_LEVEL_sum,TCC_EA0_WRREQ_STALL_sum,TCP_TCC_CC_ATOMIC_REQ_sum,TCP_TCC_RW_ATOMIC_REQ_sum,TCP_TCC_RW_READ_REQ_sum,TCP_TCC_RW_WRITE_REQ_sum,Wave_Size_13,Correlation_ID_13,SQC_DCACHE_REQ_READ_2,SQC_DCACHE_REQ_READ_4,Wave_Size_14,Correlation_ID_14,SQ_ACTIVE_INST_SCA,SQ_ACTIVE_INST_EXP_GDS,SQ_ACTIVE_INST_MISC,SQ_ACTIVE_INST_FLAT,SQ_INST_CYCLES_VMEM_WR,SQ_INST_CYCLES_VMEM_RD,SQ_INST_CYCLES_SMEM,SQ_INST_CYCLES_SALU,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,CPC_ME1_DC0_SPI_BUSY,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,TCC_BUBBLE_sum,TCC_EA0_RDREQ_32B_sum,TCC_EA0_RDREQ_sum,TCC_EA0_RD_UNCACHED_32B_sum,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,TCP_TCC_READ_REQ_sum,TCP_TCC_WRITE_REQ_sum,Wave_Size_15,Correlation_ID_15,XCC_Index_15,TCC_EA0_ATOMIC_LEVEL[0],TCC_EA0_RDREQ[0],TCC_EA0_RDREQ_32B[0],TCC_EA0_RDREQ_LEVEL[0],TCC_EA0_ATOMIC_LEVEL[1],TCC_EA0_RDREQ[1],TCC_EA0_RDREQ_32B[1],TCC_EA0_RDREQ_LEVEL[1],TCC_EA0_ATOMIC_LEVEL[2],TCC_EA0_RDREQ[2],TCC_EA0_RDREQ_32B[2],TCC_EA0_RDREQ_LEVEL[2],TCC_EA0_ATOMIC_LEVEL[3],TCC_EA0_RDREQ[3],TCC_EA0_RDREQ_32B[3],TCC_EA0_RDREQ_LEVEL[3],TCC_EA0_ATOMIC_LEVEL[4],TCC_EA0_RDREQ[4],TCC_EA0_RDREQ_32B[4],TCC_EA0_RDREQ_LEVEL[4],TCC_EA0_ATOMIC_LEVEL[5],TCC_EA0_RDREQ[5],TCC_EA0_RDREQ_32B[5],TCC_EA0_RDREQ_LEVEL[5],TCC_EA0_ATOMIC_LEVEL[6],TCC_EA0_RDREQ[6],TCC_EA0_RDREQ_32B[6],TCC_EA0_RDREQ_LEVEL[6],TCC_EA0_ATOMIC_LEVEL[7],TCC_EA0_RDREQ[7],TCC_EA0_RDREQ_32B[7],TCC_EA0_RDREQ_LEVEL[7],TCC_EA0_ATOMIC_LEVEL[8],TCC_EA0_RDREQ[8],TCC_EA0_RDREQ_32B[8],TCC_EA0_RDREQ_LEVEL[8],TCC_EA0_ATOMIC_LEVEL[9],TCC_EA0_RDREQ[9],TCC_EA0_RDREQ_32B[9],TCC_EA0_RDREQ_LEVEL[9],TCC_EA0_ATOMIC_LEVEL[10],TCC_EA0_RDREQ[10],TCC_EA0_RDREQ_32B[10],TCC_EA0_RDREQ_LEVEL[10],TCC_EA0_ATOMIC_LEVEL[11],TCC_EA0_RDREQ[11],TCC_EA0_RDREQ_32B[11],TCC_EA0_RDREQ_LEVEL[11],TCC_EA0_ATOMIC_LEVEL[12],TCC_EA0_RDREQ[12],TCC_EA0_RDREQ_32B[12],TCC_EA0_RDREQ_LEVEL[12],TCC_EA0_ATOMIC_LEVEL[13],TCC_EA0_RDREQ[13],TCC_EA0_RDREQ_32B[13],TCC_EA0_RDREQ_LEVEL[13],TCC_EA0_ATOMIC_LEVEL[14],TCC_EA0_RDREQ[14],TCC_EA0_RDREQ_32B[14],TCC_EA0_RDREQ_LEVEL[14],TCC_EA0_ATOMIC_LEVEL[15],TCC_EA0_RDREQ[15],TCC_EA0_RDREQ_32B[15],TCC_EA0_RDREQ_LEVEL[15],TCC_EA0_ATOMIC_LEVEL[16],TCC_EA0_RDREQ[16],TCC_EA0_RDREQ_32B[16],TCC_EA0_RDREQ_LEVEL[16],TCC_EA0_ATOMIC_LEVEL[17],TCC_EA0_RDREQ[17],TCC_EA0_RDREQ_32B[17],TCC_EA0_RDREQ_LEVEL[17],TCC_EA0_ATOMIC_LEVEL[18],TCC_EA0_RDREQ[18],TCC_EA0_RDREQ_32B[18],TCC_EA0_RDREQ_LEVEL[18],TCC_EA0_ATOMIC_LEVEL[19],TCC_EA0_RDREQ[19],TCC_EA0_RDREQ_32B[19],TCC_EA0_RDREQ_LEVEL[19],TCC_EA0_ATOMIC_LEVEL[20],TCC_EA0_RDREQ[20],TCC_EA0_RDREQ_32B[20],TCC_EA0_RDREQ_LEVEL[20],TCC_EA0_ATOMIC_LEVEL[21],TCC_EA0_RDREQ[21],TCC_EA0_RDREQ_32B[21],TCC_EA0_RDREQ_LEVEL[21],TCC_EA0_ATOMIC_LEVEL[22],TCC_EA0_RDREQ[22],TCC_EA0_RDREQ_32B[22],TCC_EA0_RDREQ_LEVEL[22],TCC_EA0_ATOMIC_LEVEL[23],TCC_EA0_RDREQ[23],TCC_EA0_RDREQ_32B[23],TCC_EA0_RDREQ_LEVEL[23],TCC_EA0_ATOMIC_LEVEL[24],TCC_EA0_RDREQ[24],TCC_EA0_RDREQ_32B[24],TCC_EA0_RDREQ_LEVEL[24],TCC_EA0_ATOMIC_LEVEL[25],TCC_EA0_RDREQ[25],TCC_EA0_RDREQ_32B[25],TCC_EA0_RDREQ_LEVEL[25],TCC_EA0_ATOMIC_LEVEL[26],TCC_EA0_RDREQ[26],TCC_EA0_RDREQ_32B[26],TCC_EA0_RDREQ_LEVEL[26],TCC_EA0_ATOMIC_LEVEL[27],TCC_EA0_RDREQ[27],TCC_EA0_RDREQ_32B[27],TCC_EA0_RDREQ_LEVEL[27],TCC_EA0_ATOMIC_LEVEL[28],TCC_EA0_RDREQ[28],TCC_EA0_RDREQ_32B[28],TCC_EA0_RDREQ_LEVEL[28],TCC_EA0_ATOMIC_LEVEL[29],TCC_EA0_RDREQ[29],TCC_EA0_RDREQ_32B[29],TCC_EA0_RDREQ_LEVEL[29],TCC_EA0_ATOMIC_LEVEL[30],TCC_EA0_RDREQ[30],TCC_EA0_RDREQ_32B[30],TCC_EA0_RDREQ_LEVEL[30],TCC_EA0_ATOMIC_LEVEL[31],TCC_EA0_RDREQ[31],TCC_EA0_RDREQ_32B[31],TCC_EA0_RDREQ_LEVEL[31],TCC_EA0_ATOMIC_LEVEL[32],TCC_EA0_RDREQ[32],TCC_EA0_RDREQ_32B[32],TCC_EA0_RDREQ_LEVEL[32],TCC_EA0_ATOMIC_LEVEL[33],TCC_EA0_RDREQ[33],TCC_EA0_RDREQ_32B[33],TCC_EA0_RDREQ_LEVEL[33],TCC_EA0_ATOMIC_LEVEL[34],TCC_EA0_RDREQ[34],TCC_EA0_RDREQ_32B[34],TCC_EA0_RDREQ_LEVEL[34],TCC_EA0_ATOMIC_LEVEL[35],TCC_EA0_RDREQ[35],TCC_EA0_RDREQ_32B[35],TCC_EA0_RDREQ_LEVEL[35],TCC_EA0_ATOMIC_LEVEL[36],TCC_EA0_RDREQ[36],TCC_EA0_RDREQ_32B[36],TCC_EA0_RDREQ_LEVEL[36],TCC_EA0_ATOMIC_LEVEL[37],TCC_EA0_RDREQ[37],TCC_EA0_RDREQ_32B[37],TCC_EA0_RDREQ_LEVEL[37],TCC_EA0_ATOMIC_LEVEL[38],TCC_EA0_RDREQ[38],TCC_EA0_RDREQ_32B[38],TCC_EA0_RDREQ_LEVEL[38],TCC_EA0_ATOMIC_LEVEL[39],TCC_EA0_RDREQ[39],TCC_EA0_RDREQ_32B[39],TCC_EA0_RDREQ_LEVEL[39],TCC_EA0_ATOMIC_LEVEL[40],TCC_EA0_RDREQ[40],TCC_EA0_RDREQ_32B[40],TCC_EA0_RDREQ_LEVEL[40],TCC_EA0_ATOMIC_LEVEL[41],TCC_EA0_RDREQ[41],TCC_EA0_RDREQ_32B[41],TCC_EA0_RDREQ_LEVEL[41],TCC_EA0_ATOMIC_LEVEL[42],TCC_EA0_RDREQ[42],TCC_EA0_RDREQ_32B[42],TCC_EA0_RDREQ_LEVEL[42],TCC_EA0_ATOMIC_LEVEL[43],TCC_EA0_RDREQ[43],TCC_EA0_RDREQ_32B[43],TCC_EA0_RDREQ_LEVEL[43],TCC_EA0_ATOMIC_LEVEL[44],TCC_EA0_RDREQ[44],TCC_EA0_RDREQ_32B[44],TCC_EA0_RDREQ_LEVEL[44],TCC_EA0_ATOMIC_LEVEL[45],TCC_EA0_RDREQ[45],TCC_EA0_RDREQ_32B[45],TCC_EA0_RDREQ_LEVEL[45],TCC_EA0_ATOMIC_LEVEL[46],TCC_EA0_RDREQ[46],TCC_EA0_RDREQ_32B[46],TCC_EA0_RDREQ_LEVEL[46],TCC_EA0_ATOMIC_LEVEL[47],TCC_EA0_RDREQ[47],TCC_EA0_RDREQ_32B[47],TCC_EA0_RDREQ_LEVEL[47],TCC_EA0_ATOMIC_LEVEL[48],TCC_EA0_RDREQ[48],TCC_EA0_RDREQ_32B[48],TCC_EA0_RDREQ_LEVEL[48],TCC_EA0_ATOMIC_LEVEL[49],TCC_EA0_RDREQ[49],TCC_EA0_RDREQ_32B[49],TCC_EA0_RDREQ_LEVEL[49],TCC_EA0_ATOMIC_LEVEL[50],TCC_EA0_RDREQ[50],TCC_EA0_RDREQ_32B[50],TCC_EA0_RDREQ_LEVEL[50],TCC_EA0_ATOMIC_LEVEL[51],TCC_EA0_RDREQ[51],TCC_EA0_RDREQ_32B[51],TCC_EA0_RDREQ_LEVEL[51],TCC_EA0_ATOMIC_LEVEL[52],TCC_EA0_RDREQ[52],TCC_EA0_RDREQ_32B[52],TCC_EA0_RDREQ_LEVEL[52],TCC_EA0_ATOMIC_LEVEL[53],TCC_EA0_RDREQ[53],TCC_EA0_RDREQ_32B[53],TCC_EA0_RDREQ_LEVEL[53],TCC_EA0_ATOMIC_LEVEL[54],TCC_EA0_RDREQ[54],TCC_EA0_RDREQ_32B[54],TCC_EA0_RDREQ_LEVEL[54],TCC_EA0_ATOMIC_LEVEL[55],TCC_EA0_RDREQ[55],TCC_EA0_RDREQ_32B[55],TCC_EA0_RDREQ_LEVEL[55],TCC_EA0_ATOMIC_LEVEL[56],TCC_EA0_RDREQ[56],TCC_EA0_RDREQ_32B[56],TCC_EA0_RDREQ_LEVEL[56],TCC_EA0_ATOMIC_LEVEL[57],TCC_EA0_RDREQ[57],TCC_EA0_RDREQ_32B[57],TCC_EA0_RDREQ_LEVEL[57],TCC_EA0_ATOMIC_LEVEL[58],TCC_EA0_RDREQ[58],TCC_EA0_RDREQ_32B[58],TCC_EA0_RDREQ_LEVEL[58],TCC_EA0_ATOMIC_LEVEL[59],TCC_EA0_RDREQ[59],TCC_EA0_RDREQ_32B[59],TCC_EA0_RDREQ_LEVEL[59],TCC_EA0_ATOMIC_LEVEL[60],TCC_EA0_RDREQ[60],TCC_EA0_RDREQ_32B[60],TCC_EA0_RDREQ_LEVEL[60],TCC_EA0_ATOMIC_LEVEL[61],TCC_EA0_RDREQ[61],TCC_EA0_RDREQ_32B[61],TCC_EA0_RDREQ_LEVEL[61],TCC_EA0_ATOMIC_LEVEL[62],TCC_EA0_RDREQ[62],TCC_EA0_RDREQ_32B[62],TCC_EA0_RDREQ_LEVEL[62],TCC_EA0_ATOMIC_LEVEL[63],TCC_EA0_RDREQ[63],TCC_EA0_RDREQ_32B[63],TCC_EA0_RDREQ_LEVEL[63],TCC_EA0_ATOMIC_LEVEL[64],TCC_EA0_RDREQ[64],TCC_EA0_RDREQ_32B[64],TCC_EA0_RDREQ_LEVEL[64],TCC_EA0_ATOMIC_LEVEL[65],TCC_EA0_RDREQ[65],TCC_EA0_RDREQ_32B[65],TCC_EA0_RDREQ_LEVEL[65],TCC_EA0_ATOMIC_LEVEL[66],TCC_EA0_RDREQ[66],TCC_EA0_RDREQ_32B[66],TCC_EA0_RDREQ_LEVEL[66],TCC_EA0_ATOMIC_LEVEL[67],TCC_EA0_RDREQ[67],TCC_EA0_RDREQ_32B[67],TCC_EA0_RDREQ_LEVEL[67],TCC_EA0_ATOMIC_LEVEL[68],TCC_EA0_RDREQ[68],TCC_EA0_RDREQ_32B[68],TCC_EA0_RDREQ_LEVEL[68],TCC_EA0_ATOMIC_LEVEL[69],TCC_EA0_RDREQ[69],TCC_EA0_RDREQ_32B[69],TCC_EA0_RDREQ_LEVEL[69],TCC_EA0_ATOMIC_LEVEL[70],TCC_EA0_RDREQ[70],TCC_EA0_RDREQ_32B[70],TCC_EA0_RDREQ_LEVEL[70],TCC_EA0_ATOMIC_LEVEL[71],TCC_EA0_RDREQ[71],TCC_EA0_RDREQ_32B[71],TCC_EA0_RDREQ_LEVEL[71],TCC_EA0_ATOMIC_LEVEL[72],TCC_EA0_RDREQ[72],TCC_EA0_RDREQ_32B[72],TCC_EA0_RDREQ_LEVEL[72],TCC_EA0_ATOMIC_LEVEL[73],TCC_EA0_RDREQ[73],TCC_EA0_RDREQ_32B[73],TCC_EA0_RDREQ_LEVEL[73],TCC_EA0_ATOMIC_LEVEL[74],TCC_EA0_RDREQ[74],TCC_EA0_RDREQ_32B[74],TCC_EA0_RDREQ_LEVEL[74],TCC_EA0_ATOMIC_LEVEL[75],TCC_EA0_RDREQ[75],TCC_EA0_RDREQ_32B[75],TCC_EA0_RDREQ_LEVEL[75],TCC_EA0_ATOMIC_LEVEL[76],TCC_EA0_RDREQ[76],TCC_EA0_RDREQ_32B[76],TCC_EA0_RDREQ_LEVEL[76],TCC_EA0_ATOMIC_LEVEL[77],TCC_EA0_RDREQ[77],TCC_EA0_RDREQ_32B[77],TCC_EA0_RDREQ_LEVEL[77],TCC_EA0_ATOMIC_LEVEL[78],TCC_EA0_RDREQ[78],TCC_EA0_RDREQ_32B[78],TCC_EA0_RDREQ_LEVEL[78],TCC_EA0_ATOMIC_LEVEL[79],TCC_EA0_RDREQ[79],TCC_EA0_RDREQ_32B[79],TCC_EA0_RDREQ_LEVEL[79],TCC_EA0_ATOMIC_LEVEL[80],TCC_EA0_RDREQ[80],TCC_EA0_RDREQ_32B[80],TCC_EA0_RDREQ_LEVEL[80],TCC_EA0_ATOMIC_LEVEL[81],TCC_EA0_RDREQ[81],TCC_EA0_RDREQ_32B[81],TCC_EA0_RDREQ_LEVEL[81],TCC_EA0_ATOMIC_LEVEL[82],TCC_EA0_RDREQ[82],TCC_EA0_RDREQ_32B[82],TCC_EA0_RDREQ_LEVEL[82],TCC_EA0_ATOMIC_LEVEL[83],TCC_EA0_RDREQ[83],TCC_EA0_RDREQ_32B[83],TCC_EA0_RDREQ_LEVEL[83],TCC_EA0_ATOMIC_LEVEL[84],TCC_EA0_RDREQ[84],TCC_EA0_RDREQ_32B[84],TCC_EA0_RDREQ_LEVEL[84],TCC_EA0_ATOMIC_LEVEL[85],TCC_EA0_RDREQ[85],TCC_EA0_RDREQ_32B[85],TCC_EA0_RDREQ_LEVEL[85],TCC_EA0_ATOMIC_LEVEL[86],TCC_EA0_RDREQ[86],TCC_EA0_RDREQ_32B[86],TCC_EA0_RDREQ_LEVEL[86],TCC_EA0_ATOMIC_LEVEL[87],TCC_EA0_RDREQ[87],TCC_EA0_RDREQ_32B[87],TCC_EA0_RDREQ_LEVEL[87],TCC_EA0_ATOMIC_LEVEL[88],TCC_EA0_RDREQ[88],TCC_EA0_RDREQ_32B[88],TCC_EA0_RDREQ_LEVEL[88],TCC_EA0_ATOMIC_LEVEL[89],TCC_EA0_RDREQ[89],TCC_EA0_RDREQ_32B[89],TCC_EA0_RDREQ_LEVEL[89],TCC_EA0_ATOMIC_LEVEL[90],TCC_EA0_RDREQ[90],TCC_EA0_RDREQ_32B[90],TCC_EA0_RDREQ_LEVEL[90],TCC_EA0_ATOMIC_LEVEL[91],TCC_EA0_RDREQ[91],TCC_EA0_RDREQ_32B[91],TCC_EA0_RDREQ_LEVEL[91],TCC_EA0_ATOMIC_LEVEL[92],TCC_EA0_RDREQ[92],TCC_EA0_RDREQ_32B[92],TCC_EA0_RDREQ_LEVEL[92],TCC_EA0_ATOMIC_LEVEL[93],TCC_EA0_RDREQ[93],TCC_EA0_RDREQ_32B[93],TCC_EA0_RDREQ_LEVEL[93],TCC_EA0_ATOMIC_LEVEL[94],TCC_EA0_RDREQ[94],TCC_EA0_RDREQ_32B[94],TCC_EA0_RDREQ_LEVEL[94],TCC_EA0_ATOMIC_LEVEL[95],TCC_EA0_RDREQ[95],TCC_EA0_RDREQ_32B[95],TCC_EA0_RDREQ_LEVEL[95],Wave_Size_16,Correlation_ID_16,SQ_INSTS_VMEM,SQ_INSTS_SALU,SQ_INSTS_VSKIPPED,SQ_INSTS,SQ_INSTS_VALU,SQ_INSTS_VALU_ADD_F16,SQ_INSTS_VALU_MUL_F16,SQ_INSTS_VALU_FMA_F16,GRBM_SPI_BUSY,SPI_CSN_NUM_THREADGROUPS,SPI_CSN_WAVE,CPC_CPC_TCIU_BUSY,CPC_CPC_TCIU_IDLE,CPF_CPF_TCIU_BUSY,CPF_CPF_TCIU_STALL,TA_BUFFER_READ_WAVEFRONTS_sum,TA_BUFFER_WRITE_WAVEFRONTS_sum,TCC_CC_REQ_sum,TCC_NC_REQ_sum,TCC_RW_REQ_sum,TCC_UC_REQ_sum,TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum,TCP_READ_TAGCONFLICT_STALL_CYCLES_sum,TCP_TA_TCP_STATE_READ_sum,TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum,TD_LOAD_WAVEFRONT_sum,TD_SPI_STALL_sum,Wave_Size_17,Correlation_ID_17,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_BUSY_CU_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_INSTS_VALU_CVT,SQ_INSTS_VMEM_WR,SQ_INSTS_VMEM_RD,GRBM_COUNT,GRBM_GUI_ACTIVE,SPI_CSN_WINDOW_VALID,SPI_CSN_BUSY,CPC_CPC_STAT_BUSY,CPC_CPC_STAT_IDLE,CPF_CPF_STAT_BUSY,CPF_CPF_STAT_STALL,TA_BUFFER_WAVEFRONTS_sum,TA_TA_BUSY_sum,TCC_BUSY_sum,TCC_CYCLE_sum,TCC_PROBE_ALL_sum,TCC_PROBE_sum,TCP_GATE_EN1_sum,TCP_GATE_EN2_sum,TCP_TCR_TCP_STALL_CYCLES_sum,TCP_TD_TCP_STALL_CYCLES_sum,TD_TC_STALL_sum,TD_TD_BUSY_sum,Start_Timestamp,End_Timestamp
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diff --git a/tests/workloads/kernel_inv_int/MI300A_A1/sysinfo.csv b/tests/workloads/kernel_inv_int/MI300A_A1/sysinfo.csv
new file mode 100644
index 0000000000..57fc3fc879
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300A_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+kernel_inv_int,./tests/vcopy -n 1048576 -b 256 -i 3,SQ|LDS|SQC|TA|TD|TCP|TCC|SPI|CPC|CPF,Wed 29 May 2024 01:33:25 PM  (CDT),2,sh5-1w300-rg3-3,AMD Instinct MI300A Accelerator,"American Megatrends International, LLC.RMO1002DS",Ubuntu 22.04.2 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,131174852,,6.1.2-110,N/A,SPX,NPS1,MI300A_A1,gfx942,32,24576,228,4,24,64,1024,32,2100,1300,2100,1300,96,32,120,4,5324.8,6
diff --git a/tests/workloads/kernel_inv_int/MI300A_A1/timestamps.csv b/tests/workloads/kernel_inv_int/MI300A_A1/timestamps.csv
new file mode 100644
index 0000000000..b03e0edd77
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300A_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,11995,1,144579,144579,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73483614724763,73483614733497,0
+2,11995,1,144579,144579,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73483614749922,73483614756171,0
+3,11995,1,144579,144579,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73483614771234,73483614777484,0
diff --git a/tests/workloads/kernel_inv_int/MI300X_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/kernel_inv_int/MI300X_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..aa252556d9
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300X_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,60633,1,962543,962543,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716142593831486,716142593848766,0,411890.0,411890.0,16384.0,65536.0,33383.0,2665904.0
+1,60633,1,962543,962543,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716142593870524,716142593884324,0,365913.0,365913.0,16384.0,65536.0,13076.0,1048576.0
+2,60633,1,962543,962543,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716142593904763,716142593919163,0,338280.0,338280.0,16384.0,65536.0,13211.0,1048576.0
diff --git a/tests/workloads/kernel_inv_int/MI300X_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/kernel_inv_int/MI300X_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..74e17c2fa1
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300X_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,60633,1,962555,962555,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716142593831486,716142593848766,0,0.0,0.0,0.0
+1,60633,1,962555,962555,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716142593870524,716142593884324,0,0.0,0.0,0.0
+2,60633,1,962555,962555,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716142593904763,716142593919163,0,0.0,0.0,0.0
diff --git a/tests/workloads/kernel_inv_int/MI300X_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/kernel_inv_int/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..94c4abbe3e
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,962567,962567,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716142593831486,716142593848766,0,65536.0,4179092.0,334323232.0
+1,60633,1,962567,962567,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716142593870524,716142593884324,0,65536.0,4016616.0,321288320.0
+2,60633,1,962567,962567,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716142593904763,716142593919163,0,65536.0,3494150.0,279505584.0
diff --git a/tests/workloads/kernel_inv_int/MI300X_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/kernel_inv_int/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..52946826cc
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,962579,962579,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716142593831486,716142593848766,0,32768.0,481859.0,38534576.0
+1,60633,1,962579,962579,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716142593870524,716142593884324,0,32768.0,359659.0,28767052.0
+2,60633,1,962579,962579,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716142593904763,716142593919163,0,32768.0,418053.0,33436208.0
diff --git a/tests/workloads/kernel_inv_int/MI300X_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/kernel_inv_int/MI300X_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..e9d65150f1
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300X_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,60633,1,962606,962606,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716142593831486,716142593848766,0,482850.0,482850.0,287699.0,1931400.0,16384.0,37572025.0,613233.0,0.0,150629676.0
+1,60633,1,962606,962606,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716142593870524,716142593884324,0,464802.0,464802.0,285819.0,1859208.0,16384.0,31294497.0,516367.0,0.0,125539296.0
+2,60633,1,962606,962606,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716142593904763,716142593919163,0,422179.0,422179.0,247903.0,1688716.0,16384.0,30348343.0,500413.0,0.0,121754216.0
diff --git a/tests/workloads/kernel_inv_int/MI300X_A1/log.txt b/tests/workloads/kernel_inv_int/MI300X_A1/log.txt
new file mode 100644
index 0000000000..fcbbe2973b
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300X_A1/log.txt
@@ -0,0 +1,205 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/kernel_inv_int/MI300X_A1
+Target: MI300X_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: ['42']
+Dispatch Selection: None
+Hardware Blocks: All
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH_LEVEL
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_16
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_HITS
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_13.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[3]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[3]
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_14.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[1]
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_15.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[0]
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_16.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[1]
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_17.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[1]
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F32
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_INST_ANY
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_SCA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_THREAD_CYCLES_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ADDR_CONFLICT
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ITEMS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_MEM_VIOLATIONS
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F16
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F64
+
+[profiling] Current input file: tests/workloads/kernel_inv_int/MI300X_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..a55111636d
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..77c4c17fdb
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..75cf851833
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..6aec712f85
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..c22a1b77ca
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_0.txt b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..3a066d4531
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD GRBM_COUNT GRBM_GUI_ACTIVE TCP_GATE_EN1_sum TCP_GATE_EN2_sum TCP_TD_TCP_STALL_CYCLES_sum TCP_TCR_TCP_STALL_CYCLES_sum TA_TA_BUSY_sum TA_BUFFER_WAVEFRONTS_sum TD_TD_BUSY_sum TD_TC_STALL_sum SPI_CSN_WINDOW_VALID SPI_CSN_BUSY CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE CPF_CPF_STAT_BUSY CPF_CPF_STAT_STALL TCC_CYCLE_sum TCC_BUSY_sum TCC_PROBE_sum TCC_PROBE_ALL_sum
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_1.txt b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..ec308842bd
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 GRBM_SPI_BUSY TCP_READ_TAGCONFLICT_STALL_CYCLES_sum TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum TCP_TA_TCP_STATE_READ_sum TA_BUFFER_READ_WAVEFRONTS_sum TA_BUFFER_WRITE_WAVEFRONTS_sum TD_SPI_STALL_sum TD_LOAD_WAVEFRONT_sum SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE CPC_CPC_TCIU_BUSY CPC_CPC_TCIU_IDLE CPF_CPF_TCIU_BUSY CPF_CPF_TCIU_STALL TCC_NC_REQ_sum TCC_UC_REQ_sum TCC_CC_REQ_sum TCC_RW_REQ_sum
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_10.txt b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..e3ae65b984
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_11.txt b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..249afa3c57
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_12.txt b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..e6dd3b8ec6
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_13.txt b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_13.txt
new file mode 100644
index 0000000000..70bd45bab0
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_13.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_ATOMIC[0] TCC_BUBBLE[0] TCC_CYCLE[0] TCC_EA0_ATOMIC[0] TCC_ATOMIC[1] TCC_BUBBLE[1] TCC_CYCLE[1] TCC_EA0_ATOMIC[1] TCC_ATOMIC[2] TCC_BUBBLE[2] TCC_CYCLE[2] TCC_EA0_ATOMIC[2] TCC_ATOMIC[3] TCC_BUBBLE[3] TCC_CYCLE[3] TCC_EA0_ATOMIC[3] TCC_ATOMIC[4] TCC_BUBBLE[4] TCC_CYCLE[4] TCC_EA0_ATOMIC[4] TCC_ATOMIC[5] TCC_BUBBLE[5] TCC_CYCLE[5] TCC_EA0_ATOMIC[5] TCC_ATOMIC[6] TCC_BUBBLE[6] TCC_CYCLE[6] TCC_EA0_ATOMIC[6] TCC_ATOMIC[7] TCC_BUBBLE[7] TCC_CYCLE[7] TCC_EA0_ATOMIC[7] TCC_ATOMIC[8] TCC_BUBBLE[8] TCC_CYCLE[8] TCC_EA0_ATOMIC[8] TCC_ATOMIC[9] TCC_BUBBLE[9] TCC_CYCLE[9] TCC_EA0_ATOMIC[9] TCC_ATOMIC[10] TCC_BUBBLE[10] TCC_CYCLE[10] TCC_EA0_ATOMIC[10] TCC_ATOMIC[11] TCC_BUBBLE[11] TCC_CYCLE[11] TCC_EA0_ATOMIC[11] TCC_ATOMIC[12] TCC_BUBBLE[12] TCC_CYCLE[12] TCC_EA0_ATOMIC[12] TCC_ATOMIC[13] TCC_BUBBLE[13] TCC_CYCLE[13] TCC_EA0_ATOMIC[13] TCC_ATOMIC[14] TCC_BUBBLE[14] TCC_CYCLE[14] TCC_EA0_ATOMIC[14] TCC_ATOMIC[15] TCC_BUBBLE[15] TCC_CYCLE[15] TCC_EA0_ATOMIC[15]
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_14.txt b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_14.txt
new file mode 100644
index 0000000000..fc42689058
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_14.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_ATOMIC_LEVEL[0] TCC_EA0_RDREQ[0] TCC_EA0_RDREQ_32B[0] TCC_EA0_RDREQ_LEVEL[0] TCC_EA0_ATOMIC_LEVEL[1] TCC_EA0_RDREQ[1] TCC_EA0_RDREQ_32B[1] TCC_EA0_RDREQ_LEVEL[1] TCC_EA0_ATOMIC_LEVEL[2] TCC_EA0_RDREQ[2] TCC_EA0_RDREQ_32B[2] TCC_EA0_RDREQ_LEVEL[2] TCC_EA0_ATOMIC_LEVEL[3] TCC_EA0_RDREQ[3] TCC_EA0_RDREQ_32B[3] TCC_EA0_RDREQ_LEVEL[3] TCC_EA0_ATOMIC_LEVEL[4] TCC_EA0_RDREQ[4] TCC_EA0_RDREQ_32B[4] TCC_EA0_RDREQ_LEVEL[4] TCC_EA0_ATOMIC_LEVEL[5] TCC_EA0_RDREQ[5] TCC_EA0_RDREQ_32B[5] TCC_EA0_RDREQ_LEVEL[5] TCC_EA0_ATOMIC_LEVEL[6] TCC_EA0_RDREQ[6] TCC_EA0_RDREQ_32B[6] TCC_EA0_RDREQ_LEVEL[6] TCC_EA0_ATOMIC_LEVEL[7] TCC_EA0_RDREQ[7] TCC_EA0_RDREQ_32B[7] TCC_EA0_RDREQ_LEVEL[7] TCC_EA0_ATOMIC_LEVEL[8] TCC_EA0_RDREQ[8] TCC_EA0_RDREQ_32B[8] TCC_EA0_RDREQ_LEVEL[8] TCC_EA0_ATOMIC_LEVEL[9] TCC_EA0_RDREQ[9] TCC_EA0_RDREQ_32B[9] TCC_EA0_RDREQ_LEVEL[9] TCC_EA0_ATOMIC_LEVEL[10] TCC_EA0_RDREQ[10] TCC_EA0_RDREQ_32B[10] TCC_EA0_RDREQ_LEVEL[10] TCC_EA0_ATOMIC_LEVEL[11] TCC_EA0_RDREQ[11] TCC_EA0_RDREQ_32B[11] TCC_EA0_RDREQ_LEVEL[11] TCC_EA0_ATOMIC_LEVEL[12] TCC_EA0_RDREQ[12] TCC_EA0_RDREQ_32B[12] TCC_EA0_RDREQ_LEVEL[12] TCC_EA0_ATOMIC_LEVEL[13] TCC_EA0_RDREQ[13] TCC_EA0_RDREQ_32B[13] TCC_EA0_RDREQ_LEVEL[13] TCC_EA0_ATOMIC_LEVEL[14] TCC_EA0_RDREQ[14] TCC_EA0_RDREQ_32B[14] TCC_EA0_RDREQ_LEVEL[14] TCC_EA0_ATOMIC_LEVEL[15] TCC_EA0_RDREQ[15] TCC_EA0_RDREQ_32B[15] TCC_EA0_RDREQ_LEVEL[15]
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_15.txt b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_15.txt
new file mode 100644
index 0000000000..3b9f8198a3
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_15.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_WRREQ[0] TCC_EA0_WRREQ_64B[0] TCC_EA0_WRREQ_LEVEL[0] TCC_HIT[0] TCC_EA0_WRREQ[1] TCC_EA0_WRREQ_64B[1] TCC_EA0_WRREQ_LEVEL[1] TCC_HIT[1] TCC_EA0_WRREQ[2] TCC_EA0_WRREQ_64B[2] TCC_EA0_WRREQ_LEVEL[2] TCC_HIT[2] TCC_EA0_WRREQ[3] TCC_EA0_WRREQ_64B[3] TCC_EA0_WRREQ_LEVEL[3] TCC_HIT[3] TCC_EA0_WRREQ[4] TCC_EA0_WRREQ_64B[4] TCC_EA0_WRREQ_LEVEL[4] TCC_HIT[4] TCC_EA0_WRREQ[5] TCC_EA0_WRREQ_64B[5] TCC_EA0_WRREQ_LEVEL[5] TCC_HIT[5] TCC_EA0_WRREQ[6] TCC_EA0_WRREQ_64B[6] TCC_EA0_WRREQ_LEVEL[6] TCC_HIT[6] TCC_EA0_WRREQ[7] TCC_EA0_WRREQ_64B[7] TCC_EA0_WRREQ_LEVEL[7] TCC_HIT[7] TCC_EA0_WRREQ[8] TCC_EA0_WRREQ_64B[8] TCC_EA0_WRREQ_LEVEL[8] TCC_HIT[8] TCC_EA0_WRREQ[9] TCC_EA0_WRREQ_64B[9] TCC_EA0_WRREQ_LEVEL[9] TCC_HIT[9] TCC_EA0_WRREQ[10] TCC_EA0_WRREQ_64B[10] TCC_EA0_WRREQ_LEVEL[10] TCC_HIT[10] TCC_EA0_WRREQ[11] TCC_EA0_WRREQ_64B[11] TCC_EA0_WRREQ_LEVEL[11] TCC_HIT[11] TCC_EA0_WRREQ[12] TCC_EA0_WRREQ_64B[12] TCC_EA0_WRREQ_LEVEL[12] TCC_HIT[12] TCC_EA0_WRREQ[13] TCC_EA0_WRREQ_64B[13] TCC_EA0_WRREQ_LEVEL[13] TCC_HIT[13] TCC_EA0_WRREQ[14] TCC_EA0_WRREQ_64B[14] TCC_EA0_WRREQ_LEVEL[14] TCC_HIT[14] TCC_EA0_WRREQ[15] TCC_EA0_WRREQ_64B[15] TCC_EA0_WRREQ_LEVEL[15] TCC_HIT[15]
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_16.txt b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_16.txt
new file mode 100644
index 0000000000..4d508c843d
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_16.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_MISS[0] TCC_READ[0] TCC_REQ[0] TCC_RW_REQ[0] TCC_MISS[1] TCC_READ[1] TCC_REQ[1] TCC_RW_REQ[1] TCC_MISS[2] TCC_READ[2] TCC_REQ[2] TCC_RW_REQ[2] TCC_MISS[3] TCC_READ[3] TCC_REQ[3] TCC_RW_REQ[3] TCC_MISS[4] TCC_READ[4] TCC_REQ[4] TCC_RW_REQ[4] TCC_MISS[5] TCC_READ[5] TCC_REQ[5] TCC_RW_REQ[5] TCC_MISS[6] TCC_READ[6] TCC_REQ[6] TCC_RW_REQ[6] TCC_MISS[7] TCC_READ[7] TCC_REQ[7] TCC_RW_REQ[7] TCC_MISS[8] TCC_READ[8] TCC_REQ[8] TCC_RW_REQ[8] TCC_MISS[9] TCC_READ[9] TCC_REQ[9] TCC_RW_REQ[9] TCC_MISS[10] TCC_READ[10] TCC_REQ[10] TCC_RW_REQ[10] TCC_MISS[11] TCC_READ[11] TCC_REQ[11] TCC_RW_REQ[11] TCC_MISS[12] TCC_READ[12] TCC_REQ[12] TCC_RW_REQ[12] TCC_MISS[13] TCC_READ[13] TCC_REQ[13] TCC_RW_REQ[13] TCC_MISS[14] TCC_READ[14] TCC_REQ[14] TCC_RW_REQ[14] TCC_MISS[15] TCC_READ[15] TCC_REQ[15] TCC_RW_REQ[15]
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_17.txt b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_17.txt
new file mode 100644
index 0000000000..102066879b
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_17.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_TAG_STALL[0] TCC_TOO_MANY_EA_WRREQS_STALL[0] TCC_WRITE[0] TCC_TAG_STALL[1] TCC_TOO_MANY_EA_WRREQS_STALL[1] TCC_WRITE[1] TCC_TAG_STALL[2] TCC_TOO_MANY_EA_WRREQS_STALL[2] TCC_WRITE[2] TCC_TAG_STALL[3] TCC_TOO_MANY_EA_WRREQS_STALL[3] TCC_WRITE[3] TCC_TAG_STALL[4] TCC_TOO_MANY_EA_WRREQS_STALL[4] TCC_WRITE[4] TCC_TAG_STALL[5] TCC_TOO_MANY_EA_WRREQS_STALL[5] TCC_WRITE[5] TCC_TAG_STALL[6] TCC_TOO_MANY_EA_WRREQS_STALL[6] TCC_WRITE[6] TCC_TAG_STALL[7] TCC_TOO_MANY_EA_WRREQS_STALL[7] TCC_WRITE[7] TCC_TAG_STALL[8] TCC_TOO_MANY_EA_WRREQS_STALL[8] TCC_WRITE[8] TCC_TAG_STALL[9] TCC_TOO_MANY_EA_WRREQS_STALL[9] TCC_WRITE[9] TCC_TAG_STALL[10] TCC_TOO_MANY_EA_WRREQS_STALL[10] TCC_WRITE[10] TCC_TAG_STALL[11] TCC_TOO_MANY_EA_WRREQS_STALL[11] TCC_WRITE[11] TCC_TAG_STALL[12] TCC_TOO_MANY_EA_WRREQS_STALL[12] TCC_WRITE[12] TCC_TAG_STALL[13] TCC_TOO_MANY_EA_WRREQS_STALL[13] TCC_WRITE[13] TCC_TAG_STALL[14] TCC_TOO_MANY_EA_WRREQS_STALL[14] TCC_WRITE[14] TCC_TAG_STALL[15] TCC_TOO_MANY_EA_WRREQS_STALL[15] TCC_WRITE[15]
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_2.txt b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..5919f4d97c
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 TCP_VOLATILE_sum TCP_TOTAL_ACCESSES_sum TCP_TOTAL_READ_sum TCP_TOTAL_WRITE_sum TA_BUFFER_ATOMIC_WAVEFRONTS_sum TA_BUFFER_TOTAL_CYCLES_sum TD_ATOMIC_WAVEFRONT_sum TD_STORE_WAVEFRONT_sum SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION CPF_CPF_STAT_IDLE CPF_CPF_TCIU_IDLE TCC_REQ_sum TCC_STREAMING_REQ_sum TCC_HIT_sum TCC_MISS_sum
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_3.txt b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..bbb2216a0d
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS TCP_TOTAL_ATOMIC_WITH_RET_sum TCP_TOTAL_ATOMIC_WITHOUT_RET_sum TCP_TOTAL_WRITEBACK_INVALIDATES_sum TCP_TOTAL_CACHE_ACCESSES_sum TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES_sum TD_COALESCABLE_WAVEFRONT_sum SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE CPF_CMP_UTCL1_STALL_ON_TRANSLATION TCC_READ_sum TCC_WRITE_sum TCC_ATOMIC_sum TCC_WRITEBACK_sum
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_4.txt b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..dd57020fbf
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAIT_ANY SQ_WAIT_INST_ANY SQ_ACTIVE_INST_ANY SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU TCP_UTCL1_TRANSLATION_MISS_sum TCP_UTCL1_TRANSLATION_HIT_sum TCP_UTCL1_PERMISSION_MISS_sum TCP_UTCL1_REQUEST_sum TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_TOTAL_WAVEFRONTS_sum SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE TCC_EA0_WRREQ_sum TCC_EA0_WRREQ_64B_sum TCC_EA0_WR_UNCACHED_32B_sum TCC_EA0_WRREQ_DRAM_sum
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_5.txt b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..0740e92282
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_SCA SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU TCP_TCC_READ_REQ_sum TCP_TCC_WRITE_REQ_sum TCP_TCC_ATOMIC_WITH_RET_REQ_sum TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN CPC_ME1_DC0_SPI_BUSY TCC_EA0_RDREQ_sum TCC_EA0_RDREQ_32B_sum TCC_BUBBLE_sum TCC_EA0_RD_UNCACHED_32B_sum
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_6.txt b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..0b3aef5b1d
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_THREAD_CYCLES_VALU SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 TCP_TCC_NC_READ_REQ_sum TCP_TCC_NC_WRITE_REQ_sum TCP_TCC_NC_ATOMIC_REQ_sum TCP_TCC_UC_READ_REQ_sum TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN TCC_EA0_RDREQ_DRAM_sum TCC_TAG_STALL_sum TCC_NORMAL_WRITEBACK_sum TCC_ALL_TC_OP_WB_WRITEBACK_sum
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_7.txt b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..7d4bb45735
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED TCP_TCC_UC_WRITE_REQ_sum TCP_TCC_UC_ATOMIC_REQ_sum TCP_TCC_CC_READ_REQ_sum TCP_TCC_CC_WRITE_REQ_sum TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR TCC_NORMAL_EVICT_sum TCC_ALL_TC_OP_INV_EVICT_sum TCC_TOO_MANY_EA_WRREQS_STALL_sum TCC_EA0_ATOMIC_sum
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_8.txt b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..643dc038ce
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES TCP_TCC_CC_ATOMIC_REQ_sum TCP_TCC_RW_READ_REQ_sum TCP_TCC_RW_WRITE_REQ_sum TCP_TCC_RW_ATOMIC_REQ_sum SPI_VWC_CSC_WR SPI_RA_BULKY_CU_FULL_CSN TCC_EA0_RDREQ_LEVEL_sum TCC_EA0_WRREQ_LEVEL_sum TCC_EA0_ATOMIC_LEVEL_sum TCC_EA0_WRREQ_STALL_sum
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_9.txt b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..792e960de1
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ TCP_PENDING_STALL_CYCLES_sum
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/timestamps.txt b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..54a64b6ee1
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300X_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel: 42
diff --git a/tests/workloads/kernel_inv_int/MI300X_A1/pmc_perf.csv b/tests/workloads/kernel_inv_int/MI300X_A1/pmc_perf.csv
new file mode 100644
index 0000000000..0fed420cc6
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300X_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_1,Correlation_ID_1,XCC_Index,TCC_ATOMIC[0],TCC_BUBBLE[0],TCC_CYCLE[0],TCC_EA0_ATOMIC[0],TCC_ATOMIC[1],TCC_BUBBLE[1],TCC_CYCLE[1],TCC_EA0_ATOMIC[1],TCC_ATOMIC[2],TCC_BUBBLE[2],TCC_CYCLE[2],TCC_EA0_ATOMIC[2],TCC_ATOMIC[3],TCC_BUBBLE[3],TCC_CYCLE[3],TCC_EA0_ATOMIC[3],TCC_ATOMIC[4],TCC_BUBBLE[4],TCC_CYCLE[4],TCC_EA0_ATOMIC[4],TCC_ATOMIC[5],TCC_BUBBLE[5],TCC_CYCLE[5],TCC_EA0_ATOMIC[5],TCC_ATOMIC[6],TCC_BUBBLE[6],TCC_CYCLE[6],TCC_EA0_ATOMIC[6],TCC_ATOMIC[7],TCC_BUBBLE[7],TCC_CYCLE[7],TCC_EA0_ATOMIC[7],TCC_ATOMIC[8],TCC_BUBBLE[8],TCC_CYCLE[8],TCC_EA0_ATOMIC[8],TCC_ATOMIC[9],TCC_BUBBLE[9],TCC_CYCLE[9],TCC_EA0_ATOMIC[9],TCC_ATOMIC[10],TCC_BUBBLE[10],TCC_CYCLE[10],TCC_EA0_ATOMIC[10],TCC_ATOMIC[11],TCC_BUBBLE[11],TCC_CYCLE[11],TCC_EA0_ATOMIC[11],TCC_ATOMIC[12],TCC_BUBBLE[12],TCC_CYCLE[12],TCC_EA0_ATOMIC[12],TCC_ATOMIC[13],TCC_BUBBLE[13],TCC_CYCLE[13],TCC_EA0_ATOMIC[13],TCC_ATOMIC[14],TCC_BUBBLE[14],TCC_CYCLE[14],TCC_EA0_ATOMIC[14],TCC_ATOMIC[15],TCC_BUBBLE[15],TCC_CYCLE[15],TCC_EA0_ATOMIC[15],TCC_ATOMIC[16],TCC_BUBBLE[16],TCC_CYCLE[16],TCC_EA0_ATOMIC[16],TCC_ATOMIC[17],TCC_BUBBLE[17],TCC_CYCLE[17],TCC_EA0_ATOMIC[17],TCC_ATOMIC[18],TCC_BUBBLE[18],TCC_CYCLE[18],TCC_EA0_ATOMIC[18],TCC_ATOMIC[19],TCC_BUBBLE[19],TCC_CYCLE[19],TCC_EA0_ATOMIC[19],TCC_ATOMIC[20],TCC_BUBBLE[20],TCC_CYCLE[20],TCC_EA0_ATOMIC[20],TCC_ATOMIC[21],TCC_BUBBLE[21],TCC_CYCLE[21],TCC_EA0_ATOMIC[21],TCC_ATOMIC[22],TCC_BUBBLE[22],TCC_CYCLE[22],TCC_EA0_ATOMIC[22],TCC_ATOMIC[23],TCC_BUBBLE[23],TCC_CYCLE[23],TCC_EA0_ATOMIC[23],TCC_ATOMIC[24],TCC_BUBBLE[24],TCC_CYCLE[24],TCC_EA0_ATOMIC[24],TCC_ATOMIC[25],TCC_BUBBLE[25],TCC_CYCLE[25],TCC_EA0_ATOMIC[25],TCC_ATOMIC[26],TCC_BUBBLE[26],TCC_CYCLE[26],TCC_EA0_ATOMIC[26],TCC_ATOMIC[27],TCC_BUBBLE[27],TCC_CYCLE[27],TCC_EA0_ATOMIC[27],TCC_ATOMIC[28],TCC_BUBBLE[28],TCC_CYCLE[28],TCC_EA0_ATOMIC[28],TCC_ATOMIC[29],TCC_BUBBLE[29],TCC_CYCLE[29],TCC_EA0_ATOMIC[29],TCC_ATOMIC[30],TCC_BUBBLE[30],TCC_CYCLE[30],TCC_EA0_ATOMIC[30],TCC_ATOMIC[31],TCC_BUBBLE[31],TCC_CYCLE[31],TCC_EA0_ATOMIC[31],TCC_ATOMIC[32],TCC_BUBBLE[32],TCC_CYCLE[32],TCC_EA0_ATOMIC[32],TCC_ATOMIC[33],TCC_BUBBLE[33],TCC_CYCLE[33],TCC_EA0_ATOMIC[33],TCC_ATOMIC[34],TCC_BUBBLE[34],TCC_CYCLE[34],TCC_EA0_ATOMIC[34],TCC_ATOMIC[35],TCC_BUBBLE[35],TCC_CYCLE[35],TCC_EA0_ATOMIC[35],TCC_ATOMIC[36],TCC_BUBBLE[36],TCC_CYCLE[36],TCC_EA0_ATOMIC[36],TCC_ATOMIC[37],TCC_BUBBLE[37],TCC_CYCLE[37],TCC_EA0_ATOMIC[37],TCC_ATOMIC[38],TCC_BUBBLE[38],TCC_CYCLE[38],TCC_EA0_ATOMIC[38],TCC_ATOMIC[39],TCC_BUBBLE[39],TCC_CYCLE[39],TCC_EA0_ATOMIC[39],TCC_ATOMIC[40],TCC_BUBBLE[40],TCC_CYCLE[40],TCC_EA0_ATOMIC[40],TCC_ATOMIC[41],TCC_BUBBLE[41],TCC_CYCLE[41],TCC_EA0_ATOMIC[41],TCC_ATOMIC[42],TCC_BUBBLE[42],TCC_CYCLE[42],TCC_EA0_ATOMIC[42],TCC_ATOMIC[43],TCC_BUBBLE[43],TCC_CYCLE[43],TCC_EA0_ATOMIC[43],TCC_ATOMIC[44],TCC_BUBBLE[44],TCC_CYCLE[44],TCC_EA0_ATOMIC[44],TCC_ATOMIC[45],TCC_BUBBLE[45],TCC_CYCLE[45],TCC_EA0_ATOMIC[45],TCC_ATOMIC[46],TCC_BUBBLE[46],TCC_CYCLE[46],TCC_EA0_ATOMIC[46],TCC_ATOMIC[47],TCC_BUBBLE[47],TCC_CYCLE[47],TCC_EA0_ATOMIC[47],TCC_ATOMIC[48],TCC_BUBBLE[48],TCC_CYCLE[48],TCC_EA0_ATOMIC[48],TCC_ATOMIC[49],TCC_BUBBLE[49],TCC_CYCLE[49],TCC_EA0_ATOMIC[49],TCC_ATOMIC[50],TCC_BUBBLE[50],TCC_CYCLE[50],TCC_EA0_ATOMIC[50],TCC_ATOMIC[51],TCC_BUBBLE[51],TCC_CYCLE[51],TCC_EA0_ATOMIC[51],TCC_ATOMIC[52],TCC_BUBBLE[52],TCC_CYCLE[52],TCC_EA0_ATOMIC[52],TCC_ATOMIC[53],TCC_BUBBLE[53],TCC_CYCLE[53],TCC_EA0_ATOMIC[53],TCC_ATOMIC[54],TCC_BUBBLE[54],TCC_CYCLE[54],TCC_EA0_ATOMIC[54],TCC_ATOMIC[55],TCC_BUBBLE[55],TCC_CYCLE[55],TCC_EA0_ATOMIC[55],TCC_ATOMIC[56],TCC_BUBBLE[56],TCC_CYCLE[56],TCC_EA0_ATOMIC[56],TCC_ATOMIC[57],TCC_BUBBLE[57],TCC_CYCLE[57],TCC_EA0_ATOMIC[57],TCC_ATOMIC[58],TCC_BUBBLE[58],TCC_CYCLE[58],TCC_EA0_ATOMIC[58],TCC_ATOMIC[59],TCC_BUBBLE[59],TCC_CYCLE[59],TCC_EA0_ATOMIC[59],TCC_ATOMIC[60],TCC_BUBBLE[60],TCC_CYCLE[60],TCC_EA0_ATOMIC[60],TCC_ATOMIC[61],TCC_BUBBLE[61],TCC_CYCLE[61],TCC_EA0_ATOMIC[61],TCC_ATOMIC[62],TCC_BUBBLE[62],TCC_CYCLE[62],TCC_EA0_ATOMIC[62],TCC_ATOMIC[63],TCC_BUBBLE[63],TCC_CYCLE[63],TCC_EA0_ATOMIC[63],TCC_ATOMIC[64],TCC_BUBBLE[64],TCC_CYCLE[64],TCC_EA0_ATOMIC[64],TCC_ATOMIC[65],TCC_BUBBLE[65],TCC_CYCLE[65],TCC_EA0_ATOMIC[65],TCC_ATOMIC[66],TCC_BUBBLE[66],TCC_CYCLE[66],TCC_EA0_ATOMIC[66],TCC_ATOMIC[67],TCC_BUBBLE[67],TCC_CYCLE[67],TCC_EA0_ATOMIC[67],TCC_ATOMIC[68],TCC_BUBBLE[68],TCC_CYCLE[68],TCC_EA0_ATOMIC[68],TCC_ATOMIC[69],TCC_BUBBLE[69],TCC_CYCLE[69],TCC_EA0_ATOMIC[69],TCC_ATOMIC[70],TCC_BUBBLE[70],TCC_CYCLE[70],TCC_EA0_ATOMIC[70],TCC_ATOMIC[71],TCC_BUBBLE[71],TCC_CYCLE[71],TCC_EA0_ATOMIC[71],TCC_ATOMIC[72],TCC_BUBBLE[72],TCC_CYCLE[72],TCC_EA0_ATOMIC[72],TCC_ATOMIC[73],TCC_BUBBLE[73],TCC_CYCLE[73],TCC_EA0_ATOMIC[73],TCC_ATOMIC[74],TCC_BUBBLE[74],TCC_CYCLE[74],TCC_EA0_ATOMIC[74],TCC_ATOMIC[75],TCC_BUBBLE[75],TCC_CYCLE[75],TCC_EA0_ATOMIC[75],TCC_ATOMIC[76],TCC_BUBBLE[76],TCC_CYCLE[76],TCC_EA0_ATOMIC[76],TCC_ATOMIC[77],TCC_BUBBLE[77],TCC_CYCLE[77],TCC_EA0_ATOMIC[77],TCC_ATOMIC[78],TCC_BUBBLE[78],TCC_CYCLE[78],TCC_EA0_ATOMIC[78],TCC_ATOMIC[79],TCC_BUBBLE[79],TCC_CYCLE[79],TCC_EA0_ATOMIC[79],TCC_ATOMIC[80],TCC_BUBBLE[80],TCC_CYCLE[80],TCC_EA0_ATOMIC[80],TCC_ATOMIC[81],TCC_BUBBLE[81],TCC_CYCLE[81],TCC_EA0_ATOMIC[81],TCC_ATOMIC[82],TCC_BUBBLE[82],TCC_CYCLE[82],TCC_EA0_ATOMIC[82],TCC_ATOMIC[83],TCC_BUBBLE[83],TCC_CYCLE[83],TCC_EA0_ATOMIC[83],TCC_ATOMIC[84],TCC_BUBBLE[84],TCC_CYCLE[84],TCC_EA0_ATOMIC[84],TCC_ATOMIC[85],TCC_BUBBLE[85],TCC_CYCLE[85],TCC_EA0_ATOMIC[85],TCC_ATOMIC[86],TCC_BUBBLE[86],TCC_CYCLE[86],TCC_EA0_ATOMIC[86],TCC_ATOMIC[87],TCC_BUBBLE[87],TCC_CYCLE[87],TCC_EA0_ATOMIC[87],TCC_ATOMIC[88],TCC_BUBBLE[88],TCC_CYCLE[88],TCC_EA0_ATOMIC[88],TCC_ATOMIC[89],TCC_BUBBLE[89],TCC_CYCLE[89],TCC_EA0_ATOMIC[89],TCC_ATOMIC[90],TCC_BUBBLE[90],TCC_CYCLE[90],TCC_EA0_ATOMIC[90],TCC_ATOMIC[91],TCC_BUBBLE[91],TCC_CYCLE[91],TCC_EA0_ATOMIC[91],TCC_ATOMIC[92],TCC_BUBBLE[92],TCC_CYCLE[92],TCC_EA0_ATOMIC[92],TCC_ATOMIC[93],TCC_BUBBLE[93],TCC_CYCLE[93],TCC_EA0_ATOMIC[93],TCC_ATOMIC[94],TCC_BUBBLE[94],TCC_CYCLE[94],TCC_EA0_ATOMIC[94],TCC_ATOMIC[95],TCC_BUBBLE[95],TCC_CYCLE[95],TCC_EA0_ATOMIC[95],TCC_ATOMIC[96],TCC_BUBBLE[96],TCC_CYCLE[96],TCC_EA0_ATOMIC[96],TCC_ATOMIC[97],TCC_BUBBLE[97],TCC_CYCLE[97],TCC_EA0_ATOMIC[97],TCC_ATOMIC[98],TCC_BUBBLE[98],TCC_CYCLE[98],TCC_EA0_ATOMIC[98],TCC_ATOMIC[99],TCC_BUBBLE[99],TCC_CYCLE[99],TCC_EA0_ATOMIC[99],TCC_ATOMIC[100],TCC_BUBBLE[100],TCC_CYCLE[100],TCC_EA0_ATOMIC[100],TCC_ATOMIC[101],TCC_BUBBLE[101],TCC_CYCLE[101],TCC_EA0_ATOMIC[101],TCC_ATOMIC[102],TCC_BUBBLE[102],TCC_CYCLE[102],TCC_EA0_ATOMIC[102],TCC_ATOMIC[103],TCC_BUBBLE[103],TCC_CYCLE[103],TCC_EA0_ATOMIC[103],TCC_ATOMIC[104],TCC_BUBBLE[104],TCC_CYCLE[104],TCC_EA0_ATOMIC[104],TCC_ATOMIC[105],TCC_BUBBLE[105],TCC_CYCLE[105],TCC_EA0_ATOMIC[105],TCC_ATOMIC[106],TCC_BUBBLE[106],TCC_CYCLE[106],TCC_EA0_ATOMIC[106],TCC_ATOMIC[107],TCC_BUBBLE[107],TCC_CYCLE[107],TCC_EA0_ATOMIC[107],TCC_ATOMIC[108],TCC_BUBBLE[108],TCC_CYCLE[108],TCC_EA0_ATOMIC[108],TCC_ATOMIC[109],TCC_BUBBLE[109],TCC_CYCLE[109],TCC_EA0_ATOMIC[109],TCC_ATOMIC[110],TCC_BUBBLE[110],TCC_CYCLE[110],TCC_EA0_ATOMIC[110],TCC_ATOMIC[111],TCC_BUBBLE[111],TCC_CYCLE[111],TCC_EA0_ATOMIC[111],TCC_ATOMIC[112],TCC_BUBBLE[112],TCC_CYCLE[112],TCC_EA0_ATOMIC[112],TCC_ATOMIC[113],TCC_BUBBLE[113],TCC_CYCLE[113],TCC_EA0_ATOMIC[113],TCC_ATOMIC[114],TCC_BUBBLE[114],TCC_CYCLE[114],TCC_EA0_ATOMIC[114],TCC_ATOMIC[115],TCC_BUBBLE[115],TCC_CYCLE[115],TCC_EA0_ATOMIC[115],TCC_ATOMIC[116],TCC_BUBBLE[116],TCC_CYCLE[116],TCC_EA0_ATOMIC[116],TCC_ATOMIC[117],TCC_BUBBLE[117],TCC_CYCLE[117],TCC_EA0_ATOMIC[117],TCC_ATOMIC[118],TCC_BUBBLE[118],TCC_CYCLE[118],TCC_EA0_ATOMIC[118],TCC_ATOMIC[119],TCC_BUBBLE[119],TCC_CYCLE[119],TCC_EA0_ATOMIC[119],TCC_ATOMIC[120],TCC_BUBBLE[120],TCC_CYCLE[120],TCC_EA0_ATOMIC[120],TCC_ATOMIC[121],TCC_BUBBLE[121],TCC_CYCLE[121],TCC_EA0_ATOMIC[121],TCC_ATOMIC[122],TCC_BUBBLE[122],TCC_CYCLE[122],TCC_EA0_ATOMIC[122],TCC_ATOMIC[123],TCC_BUBBLE[123],TCC_CYCLE[123],TCC_EA0_ATOMIC[123],TCC_ATOMIC[124],TCC_BUBBLE[124],TCC_CYCLE[124],TCC_EA0_ATOMIC[124],TCC_ATOMIC[125],TCC_BUBBLE[125],TCC_CYCLE[125],TCC_EA0_ATOMIC[125],TCC_ATOMIC[126],TCC_BUBBLE[126],TCC_CYCLE[126],TCC_EA0_ATOMIC[126],TCC_ATOMIC[127],TCC_BUBBLE[127],TCC_CYCLE[127],TCC_EA0_ATOMIC[127],Wave_Size_2,Correlation_ID_2,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,TA_FLAT_ATOMIC_WAVEFRONTS_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,TCC_ALL_TC_OP_INV_EVICT_sum,TCC_EA0_ATOMIC_sum,TCC_NORMAL_EVICT_sum,TCC_TOO_MANY_EA_WRREQS_STALL_sum,TCP_TCC_CC_READ_REQ_sum,TCP_TCC_CC_WRITE_REQ_sum,TCP_TCC_UC_ATOMIC_REQ_sum,TCP_TCC_UC_WRITE_REQ_sum,Wave_Size_3,Correlation_ID_3,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,TCC_EA0_ATOMIC_LEVEL_sum,TCC_EA0_RDREQ_LEVEL_sum,TCC_EA0_WRREQ_LEVEL_sum,TCC_EA0_WRREQ_STALL_sum,TCP_TCC_CC_ATOMIC_REQ_sum,TCP_TCC_RW_ATOMIC_REQ_sum,TCP_TCC_RW_READ_REQ_sum,TCP_TCC_RW_WRITE_REQ_sum,Wave_Size_4,Correlation_ID_4,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SPI_RA_REQ_NO_ALLOC,SPI_RA_REQ_NO_ALLOC_CSN,CPC_CPC_STAT_STALL,CPC_UTCL1_STALL_ON_TRANSLATION,CPF_CPF_STAT_IDLE,CPF_CPF_TCIU_IDLE,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,TA_BUFFER_TOTAL_CYCLES_sum,TCC_HIT_sum,TCC_MISS_sum,TCC_REQ_sum,TCC_STREAMING_REQ_sum,TCP_TOTAL_ACCESSES_sum,TCP_TOTAL_READ_sum,TCP_TOTAL_WRITE_sum,TCP_VOLATILE_sum,TD_ATOMIC_WAVEFRONT_sum,TD_STORE_WAVEFRONT_sum,Wave_Size_5,Correlation_ID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SQ_INST_CYCLES_SALU,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,CPC_ME1_DC0_SPI_BUSY,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,TCC_BUBBLE_sum,TCC_EA0_RDREQ_32B_sum,TCC_EA0_RDREQ_sum,TCC_EA0_RD_UNCACHED_32B_sum,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,TCP_TCC_READ_REQ_sum,TCP_TCC_WRITE_REQ_sum,Start_Timestamp,End_Timestamp
+0,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) 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diff --git a/tests/workloads/kernel_inv_int/MI300X_A1/sysinfo.csv b/tests/workloads/kernel_inv_int/MI300X_A1/sysinfo.csv
new file mode 100644
index 0000000000..b550e8c0f1
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300X_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+kernel_inv_int,./tests/vcopy -n 1048576 -b 256 -i 3,SQ|LDS|SQC|TA|TD|TCP|TCC|SPI|CPC|CPF,Wed 29 May 2024 11:59:12 AM  (CDT),2,splinter-126-wr-c6,AMD Ryzen 9 7950X 16-Core Processor,"American Megatrends International, LLC.VS2683299N.FD",Ubuntu 22.04.4 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,114656528,,6.2.0-13611,113-MI3SRIOV-001,SPX,NPS1,MI300X_A1,gfx942,32,4096,304,4,32,64,1024,32,2100,1300,2100,1300,128,32,160,4,5324.8,8
diff --git a/tests/workloads/kernel_inv_int/MI300X_A1/timestamps.csv b/tests/workloads/kernel_inv_int/MI300X_A1/timestamps.csv
new file mode 100644
index 0000000000..eab3d2f363
--- /dev/null
+++ b/tests/workloads/kernel_inv_int/MI300X_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,60633,1,962851,962851,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716142593831486,716142593848766,0
+2,60633,1,962851,962851,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716142593870524,716142593884324,0
+3,60633,1,962851,962851,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716142593904763,716142593919163,0
diff --git a/tests/workloads/kernel_inv_str/MI300A_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/kernel_inv_str/MI300A_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..c8c7775359
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300A_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,11995,1,147972,147972,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73809670135724,73809670143657,0,198348.0,198348.0,16384.0,65536.0,28870.0,2310924.0
+1,11995,1,147972,147972,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73809670180713,73809670186922,0,185070.0,185070.0,16384.0,65536.0,12943.0,1048796.0
+2,11995,1,147972,147972,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73809670159641,73809670165810,0,166268.0,166268.0,16384.0,65536.0,13166.0,1049368.0
diff --git a/tests/workloads/kernel_inv_str/MI300A_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/kernel_inv_str/MI300A_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..1d6dfcba09
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300A_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,11995,1,147984,147984,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73809670135724,73809670143657,0,0.0,0.0,0.0
+1,11995,1,147984,147984,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73809670180713,73809670186922,0,0.0,0.0,0.0
+2,11995,1,147984,147984,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73809670159641,73809670165810,0,0.0,0.0,0.0
diff --git a/tests/workloads/kernel_inv_str/MI300A_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/kernel_inv_str/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..522c17cfea
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,147996,147996,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73809670135724,73809670143657,0,65536.0,357090.0,28579904.0
+1,11995,1,147996,147996,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73809670180713,73809670186922,0,65536.0,314034.0,25089984.0
+2,11995,1,147996,147996,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73809670159641,73809670165810,0,65536.0,205892.0,16476328.0
diff --git a/tests/workloads/kernel_inv_str/MI300A_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/kernel_inv_str/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..1f80a67782
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,148008,148008,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73809670135724,73809670143657,0,32768.0,525010.0,41991880.0
+1,11995,1,148008,148008,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73809670180713,73809670186922,0,32768.0,403559.0,32287832.0
+2,11995,1,148008,148008,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73809670159641,73809670165810,0,32768.0,376847.0,30136020.0
diff --git a/tests/workloads/kernel_inv_str/MI300A_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/kernel_inv_str/MI300A_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..42487e07a5
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300A_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,11995,1,148020,148020,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73809670135724,73809670143657,0,207523.0,207523.0,115072.0,830092.0,16384.0,13049551.0,243933.0,0.0,52618988.0
+1,11995,1,148020,148020,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73809670180713,73809670186922,0,192388.0,192388.0,109376.0,769552.0,16384.0,10627000.0,199599.0,0.0,42932820.0
+2,11995,1,148020,148020,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73809670159641,73809670165810,0,172154.0,172154.0,93048.0,688616.0,16384.0,9401759.0,181950.0,0.0,38026276.0
diff --git a/tests/workloads/kernel_inv_str/MI300A_A1/log.txt b/tests/workloads/kernel_inv_str/MI300A_A1/log.txt
new file mode 100644
index 0000000000..fcf609d143
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300A_A1/log.txt
@@ -0,0 +1,244 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/kernel_inv_str/MI300A_A1
+Target: MI300A_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: ['vecPaste']
+Dispatch Selection: None
+Hardware Blocks: All
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_CVT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_WR
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F16
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_HITS
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_MISSES
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_MISSES_DUPLICATE
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_HITS
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES_DUPLICATE
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_13.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[0]
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_14.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[1]
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_15.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[3]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[3]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[3]
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_16.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[0]
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_17.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[2]
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F64
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_EXP_GDS
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_VALU
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_SCA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_MISC
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_WR
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_RD
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_SALU
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_THREAD_CYCLES_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ADDR_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_UNALIGNED_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_EQ_64
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ITEMS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_MEM_VIOLATIONS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ATOMIC_RETURN
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_IDX_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_RESTORED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_SAVED
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_VALU_MFMA_BUSY_CYCLES
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_INST_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_READ_REQ
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300A_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..81471d9699
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..62d58aac7b
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..e94af03dba
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..cebcd0ec74
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..69a540e9e1
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_0.txt b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..c866372df3
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD GRBM_COUNT GRBM_GUI_ACTIVE TCP_GATE_EN1_sum TCP_GATE_EN2_sum TCP_TD_TCP_STALL_CYCLES_sum TCP_TCR_TCP_STALL_CYCLES_sum TA_TA_BUSY_sum TA_BUFFER_WAVEFRONTS_sum TD_TD_BUSY_sum TD_TC_STALL_sum SPI_CSN_WINDOW_VALID SPI_CSN_BUSY CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE CPF_CPF_STAT_BUSY CPF_CPF_STAT_STALL TCC_CYCLE_sum TCC_BUSY_sum TCC_PROBE_sum TCC_PROBE_ALL_sum
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_1.txt b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..d05b8686c0
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 GRBM_SPI_BUSY TCP_READ_TAGCONFLICT_STALL_CYCLES_sum TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum TCP_TA_TCP_STATE_READ_sum TA_BUFFER_READ_WAVEFRONTS_sum TA_BUFFER_WRITE_WAVEFRONTS_sum TD_SPI_STALL_sum TD_LOAD_WAVEFRONT_sum SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE CPC_CPC_TCIU_BUSY CPC_CPC_TCIU_IDLE CPF_CPF_TCIU_BUSY CPF_CPF_TCIU_STALL TCC_NC_REQ_sum TCC_UC_REQ_sum TCC_CC_REQ_sum TCC_RW_REQ_sum
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_10.txt b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..2071a07ff8
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_11.txt b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..84998060dd
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_12.txt b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..374213dd45
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_13.txt b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_13.txt
new file mode 100644
index 0000000000..76fd7d2d39
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_13.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_ATOMIC[0] TCC_BUBBLE[0] TCC_CYCLE[0] TCC_EA0_ATOMIC[0] TCC_ATOMIC[1] TCC_BUBBLE[1] TCC_CYCLE[1] TCC_EA0_ATOMIC[1] TCC_ATOMIC[2] TCC_BUBBLE[2] TCC_CYCLE[2] TCC_EA0_ATOMIC[2] TCC_ATOMIC[3] TCC_BUBBLE[3] TCC_CYCLE[3] TCC_EA0_ATOMIC[3] TCC_ATOMIC[4] TCC_BUBBLE[4] TCC_CYCLE[4] TCC_EA0_ATOMIC[4] TCC_ATOMIC[5] TCC_BUBBLE[5] TCC_CYCLE[5] TCC_EA0_ATOMIC[5] TCC_ATOMIC[6] TCC_BUBBLE[6] TCC_CYCLE[6] TCC_EA0_ATOMIC[6] TCC_ATOMIC[7] TCC_BUBBLE[7] TCC_CYCLE[7] TCC_EA0_ATOMIC[7] TCC_ATOMIC[8] TCC_BUBBLE[8] TCC_CYCLE[8] TCC_EA0_ATOMIC[8] TCC_ATOMIC[9] TCC_BUBBLE[9] TCC_CYCLE[9] TCC_EA0_ATOMIC[9] TCC_ATOMIC[10] TCC_BUBBLE[10] TCC_CYCLE[10] TCC_EA0_ATOMIC[10] TCC_ATOMIC[11] TCC_BUBBLE[11] TCC_CYCLE[11] TCC_EA0_ATOMIC[11] TCC_ATOMIC[12] TCC_BUBBLE[12] TCC_CYCLE[12] TCC_EA0_ATOMIC[12] TCC_ATOMIC[13] TCC_BUBBLE[13] TCC_CYCLE[13] TCC_EA0_ATOMIC[13] TCC_ATOMIC[14] TCC_BUBBLE[14] TCC_CYCLE[14] TCC_EA0_ATOMIC[14] TCC_ATOMIC[15] TCC_BUBBLE[15] TCC_CYCLE[15] TCC_EA0_ATOMIC[15]
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_14.txt b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_14.txt
new file mode 100644
index 0000000000..cedbe9acc9
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_14.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_ATOMIC_LEVEL[0] TCC_EA0_RDREQ[0] TCC_EA0_RDREQ_32B[0] TCC_EA0_RDREQ_LEVEL[0] TCC_EA0_ATOMIC_LEVEL[1] TCC_EA0_RDREQ[1] TCC_EA0_RDREQ_32B[1] TCC_EA0_RDREQ_LEVEL[1] TCC_EA0_ATOMIC_LEVEL[2] TCC_EA0_RDREQ[2] TCC_EA0_RDREQ_32B[2] TCC_EA0_RDREQ_LEVEL[2] TCC_EA0_ATOMIC_LEVEL[3] TCC_EA0_RDREQ[3] TCC_EA0_RDREQ_32B[3] TCC_EA0_RDREQ_LEVEL[3] TCC_EA0_ATOMIC_LEVEL[4] TCC_EA0_RDREQ[4] TCC_EA0_RDREQ_32B[4] TCC_EA0_RDREQ_LEVEL[4] TCC_EA0_ATOMIC_LEVEL[5] TCC_EA0_RDREQ[5] TCC_EA0_RDREQ_32B[5] TCC_EA0_RDREQ_LEVEL[5] TCC_EA0_ATOMIC_LEVEL[6] TCC_EA0_RDREQ[6] TCC_EA0_RDREQ_32B[6] TCC_EA0_RDREQ_LEVEL[6] TCC_EA0_ATOMIC_LEVEL[7] TCC_EA0_RDREQ[7] TCC_EA0_RDREQ_32B[7] TCC_EA0_RDREQ_LEVEL[7] TCC_EA0_ATOMIC_LEVEL[8] TCC_EA0_RDREQ[8] TCC_EA0_RDREQ_32B[8] TCC_EA0_RDREQ_LEVEL[8] TCC_EA0_ATOMIC_LEVEL[9] TCC_EA0_RDREQ[9] TCC_EA0_RDREQ_32B[9] TCC_EA0_RDREQ_LEVEL[9] TCC_EA0_ATOMIC_LEVEL[10] TCC_EA0_RDREQ[10] TCC_EA0_RDREQ_32B[10] TCC_EA0_RDREQ_LEVEL[10] TCC_EA0_ATOMIC_LEVEL[11] TCC_EA0_RDREQ[11] TCC_EA0_RDREQ_32B[11] TCC_EA0_RDREQ_LEVEL[11] TCC_EA0_ATOMIC_LEVEL[12] TCC_EA0_RDREQ[12] TCC_EA0_RDREQ_32B[12] TCC_EA0_RDREQ_LEVEL[12] TCC_EA0_ATOMIC_LEVEL[13] TCC_EA0_RDREQ[13] TCC_EA0_RDREQ_32B[13] TCC_EA0_RDREQ_LEVEL[13] TCC_EA0_ATOMIC_LEVEL[14] TCC_EA0_RDREQ[14] TCC_EA0_RDREQ_32B[14] TCC_EA0_RDREQ_LEVEL[14] TCC_EA0_ATOMIC_LEVEL[15] TCC_EA0_RDREQ[15] TCC_EA0_RDREQ_32B[15] TCC_EA0_RDREQ_LEVEL[15]
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_15.txt b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_15.txt
new file mode 100644
index 0000000000..bf0cf998b4
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_15.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_WRREQ[0] TCC_EA0_WRREQ_64B[0] TCC_EA0_WRREQ_LEVEL[0] TCC_HIT[0] TCC_EA0_WRREQ[1] TCC_EA0_WRREQ_64B[1] TCC_EA0_WRREQ_LEVEL[1] TCC_HIT[1] TCC_EA0_WRREQ[2] TCC_EA0_WRREQ_64B[2] TCC_EA0_WRREQ_LEVEL[2] TCC_HIT[2] TCC_EA0_WRREQ[3] TCC_EA0_WRREQ_64B[3] TCC_EA0_WRREQ_LEVEL[3] TCC_HIT[3] TCC_EA0_WRREQ[4] TCC_EA0_WRREQ_64B[4] TCC_EA0_WRREQ_LEVEL[4] TCC_HIT[4] TCC_EA0_WRREQ[5] TCC_EA0_WRREQ_64B[5] TCC_EA0_WRREQ_LEVEL[5] TCC_HIT[5] TCC_EA0_WRREQ[6] TCC_EA0_WRREQ_64B[6] TCC_EA0_WRREQ_LEVEL[6] TCC_HIT[6] TCC_EA0_WRREQ[7] TCC_EA0_WRREQ_64B[7] TCC_EA0_WRREQ_LEVEL[7] TCC_HIT[7] TCC_EA0_WRREQ[8] TCC_EA0_WRREQ_64B[8] TCC_EA0_WRREQ_LEVEL[8] TCC_HIT[8] TCC_EA0_WRREQ[9] TCC_EA0_WRREQ_64B[9] TCC_EA0_WRREQ_LEVEL[9] TCC_HIT[9] TCC_EA0_WRREQ[10] TCC_EA0_WRREQ_64B[10] TCC_EA0_WRREQ_LEVEL[10] TCC_HIT[10] TCC_EA0_WRREQ[11] TCC_EA0_WRREQ_64B[11] TCC_EA0_WRREQ_LEVEL[11] TCC_HIT[11] TCC_EA0_WRREQ[12] TCC_EA0_WRREQ_64B[12] TCC_EA0_WRREQ_LEVEL[12] TCC_HIT[12] TCC_EA0_WRREQ[13] TCC_EA0_WRREQ_64B[13] TCC_EA0_WRREQ_LEVEL[13] TCC_HIT[13] TCC_EA0_WRREQ[14] TCC_EA0_WRREQ_64B[14] TCC_EA0_WRREQ_LEVEL[14] TCC_HIT[14] TCC_EA0_WRREQ[15] TCC_EA0_WRREQ_64B[15] TCC_EA0_WRREQ_LEVEL[15] TCC_HIT[15]
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_16.txt b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_16.txt
new file mode 100644
index 0000000000..201b1eae2f
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_16.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_MISS[0] TCC_READ[0] TCC_REQ[0] TCC_RW_REQ[0] TCC_MISS[1] TCC_READ[1] TCC_REQ[1] TCC_RW_REQ[1] TCC_MISS[2] TCC_READ[2] TCC_REQ[2] TCC_RW_REQ[2] TCC_MISS[3] TCC_READ[3] TCC_REQ[3] TCC_RW_REQ[3] TCC_MISS[4] TCC_READ[4] TCC_REQ[4] TCC_RW_REQ[4] TCC_MISS[5] TCC_READ[5] TCC_REQ[5] TCC_RW_REQ[5] TCC_MISS[6] TCC_READ[6] TCC_REQ[6] TCC_RW_REQ[6] TCC_MISS[7] TCC_READ[7] TCC_REQ[7] TCC_RW_REQ[7] TCC_MISS[8] TCC_READ[8] TCC_REQ[8] TCC_RW_REQ[8] TCC_MISS[9] TCC_READ[9] TCC_REQ[9] TCC_RW_REQ[9] TCC_MISS[10] TCC_READ[10] TCC_REQ[10] TCC_RW_REQ[10] TCC_MISS[11] TCC_READ[11] TCC_REQ[11] TCC_RW_REQ[11] TCC_MISS[12] TCC_READ[12] TCC_REQ[12] TCC_RW_REQ[12] TCC_MISS[13] TCC_READ[13] TCC_REQ[13] TCC_RW_REQ[13] TCC_MISS[14] TCC_READ[14] TCC_REQ[14] TCC_RW_REQ[14] TCC_MISS[15] TCC_READ[15] TCC_REQ[15] TCC_RW_REQ[15]
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_17.txt b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_17.txt
new file mode 100644
index 0000000000..7426c204e7
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_17.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_TAG_STALL[0] TCC_TOO_MANY_EA_WRREQS_STALL[0] TCC_WRITE[0] TCC_TAG_STALL[1] TCC_TOO_MANY_EA_WRREQS_STALL[1] TCC_WRITE[1] TCC_TAG_STALL[2] TCC_TOO_MANY_EA_WRREQS_STALL[2] TCC_WRITE[2] TCC_TAG_STALL[3] TCC_TOO_MANY_EA_WRREQS_STALL[3] TCC_WRITE[3] TCC_TAG_STALL[4] TCC_TOO_MANY_EA_WRREQS_STALL[4] TCC_WRITE[4] TCC_TAG_STALL[5] TCC_TOO_MANY_EA_WRREQS_STALL[5] TCC_WRITE[5] TCC_TAG_STALL[6] TCC_TOO_MANY_EA_WRREQS_STALL[6] TCC_WRITE[6] TCC_TAG_STALL[7] TCC_TOO_MANY_EA_WRREQS_STALL[7] TCC_WRITE[7] TCC_TAG_STALL[8] TCC_TOO_MANY_EA_WRREQS_STALL[8] TCC_WRITE[8] TCC_TAG_STALL[9] TCC_TOO_MANY_EA_WRREQS_STALL[9] TCC_WRITE[9] TCC_TAG_STALL[10] TCC_TOO_MANY_EA_WRREQS_STALL[10] TCC_WRITE[10] TCC_TAG_STALL[11] TCC_TOO_MANY_EA_WRREQS_STALL[11] TCC_WRITE[11] TCC_TAG_STALL[12] TCC_TOO_MANY_EA_WRREQS_STALL[12] TCC_WRITE[12] TCC_TAG_STALL[13] TCC_TOO_MANY_EA_WRREQS_STALL[13] TCC_WRITE[13] TCC_TAG_STALL[14] TCC_TOO_MANY_EA_WRREQS_STALL[14] TCC_WRITE[14] TCC_TAG_STALL[15] TCC_TOO_MANY_EA_WRREQS_STALL[15] TCC_WRITE[15]
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_2.txt b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..c28677a105
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 TCP_VOLATILE_sum TCP_TOTAL_ACCESSES_sum TCP_TOTAL_READ_sum TCP_TOTAL_WRITE_sum TA_BUFFER_ATOMIC_WAVEFRONTS_sum TA_BUFFER_TOTAL_CYCLES_sum TD_ATOMIC_WAVEFRONT_sum TD_STORE_WAVEFRONT_sum SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION CPF_CPF_STAT_IDLE CPF_CPF_TCIU_IDLE TCC_REQ_sum TCC_STREAMING_REQ_sum TCC_HIT_sum TCC_MISS_sum
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_3.txt b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..e584b4dc96
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS TCP_TOTAL_ATOMIC_WITH_RET_sum TCP_TOTAL_ATOMIC_WITHOUT_RET_sum TCP_TOTAL_WRITEBACK_INVALIDATES_sum TCP_TOTAL_CACHE_ACCESSES_sum TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES_sum TD_COALESCABLE_WAVEFRONT_sum SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE CPF_CMP_UTCL1_STALL_ON_TRANSLATION TCC_READ_sum TCC_WRITE_sum TCC_ATOMIC_sum TCC_WRITEBACK_sum
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_4.txt b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..b1fe929ae6
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAIT_ANY SQ_WAIT_INST_ANY SQ_ACTIVE_INST_ANY SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU TCP_UTCL1_TRANSLATION_MISS_sum TCP_UTCL1_TRANSLATION_HIT_sum TCP_UTCL1_PERMISSION_MISS_sum TCP_UTCL1_REQUEST_sum TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_TOTAL_WAVEFRONTS_sum SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE TCC_EA0_WRREQ_sum TCC_EA0_WRREQ_64B_sum TCC_EA0_WR_UNCACHED_32B_sum TCC_EA0_WRREQ_DRAM_sum
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_5.txt b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..bbeac5e72c
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_SCA SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU TCP_TCC_READ_REQ_sum TCP_TCC_WRITE_REQ_sum TCP_TCC_ATOMIC_WITH_RET_REQ_sum TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN CPC_ME1_DC0_SPI_BUSY TCC_EA0_RDREQ_sum TCC_EA0_RDREQ_32B_sum TCC_BUBBLE_sum TCC_EA0_RD_UNCACHED_32B_sum
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_6.txt b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..a129ce3ac3
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_THREAD_CYCLES_VALU SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 TCP_TCC_NC_READ_REQ_sum TCP_TCC_NC_WRITE_REQ_sum TCP_TCC_NC_ATOMIC_REQ_sum TCP_TCC_UC_READ_REQ_sum TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN TCC_EA0_RDREQ_DRAM_sum TCC_TAG_STALL_sum TCC_NORMAL_WRITEBACK_sum TCC_ALL_TC_OP_WB_WRITEBACK_sum
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_7.txt b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..047e9b4b3c
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED TCP_TCC_UC_WRITE_REQ_sum TCP_TCC_UC_ATOMIC_REQ_sum TCP_TCC_CC_READ_REQ_sum TCP_TCC_CC_WRITE_REQ_sum TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR TCC_NORMAL_EVICT_sum TCC_ALL_TC_OP_INV_EVICT_sum TCC_TOO_MANY_EA_WRREQS_STALL_sum TCC_EA0_ATOMIC_sum
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_8.txt b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..391978f6eb
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES TCP_TCC_CC_ATOMIC_REQ_sum TCP_TCC_RW_READ_REQ_sum TCP_TCC_RW_WRITE_REQ_sum TCP_TCC_RW_ATOMIC_REQ_sum SPI_VWC_CSC_WR SPI_RA_BULKY_CU_FULL_CSN TCC_EA0_RDREQ_LEVEL_sum TCC_EA0_WRREQ_LEVEL_sum TCC_EA0_ATOMIC_LEVEL_sum TCC_EA0_WRREQ_STALL_sum
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_9.txt b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..4f516b1c2e
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ TCP_PENDING_STALL_CYCLES_sum
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/timestamps.txt b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..be80a68d72
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300A_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300A_A1/pmc_perf.csv b/tests/workloads/kernel_inv_str/MI300A_A1/pmc_perf.csv
new file mode 100644
index 0000000000..c6a4f3c54e
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300A_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SQ_INSTS_BRANCH,SQ_INSTS_SENDMSG,SQ_WAIT_ANY,SQ_WAIT_INST_ANY,SQ_ACTIVE_INST_ANY,SQ_ACTIVE_INST_VMEM,SQ_ACTIVE_INST_LDS,SQ_ACTIVE_INST_VALU,SPI_RA_WAVE_SIMD_FULL_CSN,SPI_RA_VGPR_SIMD_FULL_CSN,CPC_CPC_UTCL2IU_STALL,CPC_ME1_BUSY_FOR_PACKET_DECODE,TA_ADDR_STALLED_BY_TC_CYCLES_sum,TA_TOTAL_WAVEFRONTS_sum,TCC_EA0_WRREQ_64B_sum,TCC_EA0_WRREQ_DRAM_sum,TCC_EA0_WRREQ_sum,TCC_EA0_WR_UNCACHED_32B_sum,TCP_UTCL1_PERMISSION_MISS_sum,TCP_UTCL1_REQUEST_sum,TCP_UTCL1_TRANSLATION_HIT_sum,TCP_UTCL1_TRANSLATION_MISS_sum,Wave_Size_1,Correlation_ID_1,XCC_Index,TCC_EA0_WRREQ[0],TCC_EA0_WRREQ_64B[0],TCC_EA0_WRREQ_LEVEL[0],TCC_HIT[0],TCC_EA0_WRREQ[1],TCC_EA0_WRREQ_64B[1],TCC_EA0_WRREQ_LEVEL[1],TCC_HIT[1],TCC_EA0_WRREQ[2],TCC_EA0_WRREQ_64B[2],TCC_EA0_WRREQ_LEVEL[2],TCC_HIT[2],TCC_EA0_WRREQ[3],TCC_EA0_WRREQ_64B[3],TCC_EA0_WRREQ_LEVEL[3],TCC_HIT[3],TCC_EA0_WRREQ[4],TCC_EA0_WRREQ_64B[4],TCC_EA0_WRREQ_LEVEL[4],TCC_HIT[4],TCC_EA0_WRREQ[5],TCC_EA0_WRREQ_64B[5],TCC_EA0_WRREQ_LEVEL[5],TCC_HIT[5],TCC_EA0_WRREQ[6],TCC_EA0_WRREQ_64B[6],TCC_EA0_WRREQ_LEVEL[6],TCC_HIT[6],TCC_EA0_WRREQ[7],TCC_EA0_WRREQ_64B[7],TCC_EA0_WRREQ_LEVEL[7],TCC_HIT[7],TCC_EA0_WRREQ[8],TCC_EA0_WRREQ_64B[8],TCC_EA0_WRREQ_LEVEL[8],TCC_HIT[8],TCC_EA0_WRREQ[9],TCC_EA0_WRREQ_64B[9],TCC_EA0_WRREQ_LEVEL[9],TCC_HIT[9],TCC_EA0_WRREQ[10],TCC_EA0_WRREQ_64B[10],TCC_EA0_WRREQ_LEVEL[10],TCC_HIT[10],TCC_EA0_WRREQ[11],TCC_EA0_WRREQ_64B[11],TCC_EA0_WRREQ_LEVEL[11],TCC_HIT[11],TCC_EA0_WRREQ[12],TCC_EA0_WRREQ_64B[12],TCC_EA0_WRREQ_LEVEL[12],TCC_HIT[12],TCC_EA0_WRREQ[13],TCC_EA0_WRREQ_64B[13],TCC_EA0_WRREQ_LEVEL[13],TCC_HIT[13],TCC_EA0_WRREQ[14],TCC_EA0_WRREQ_64B[14],TCC_EA0_WRREQ_LEVEL[14],TCC_HIT[14],TCC_EA0_WRREQ[15],TCC_EA0_WRREQ_64B[15],TCC_EA0_WRREQ_LEVEL[15],TCC_HIT[15],TCC_EA0_WRREQ[16],TCC_EA0_WRREQ_64B[16],TCC_EA0_WRREQ_LEVEL[16],TCC_HIT[16],TCC_EA0_WRREQ[17],TCC_EA0_WRREQ_64B[17],TCC_EA0_WRREQ_LEVEL[17],TCC_HIT[17],TCC_EA0_WRREQ[18],TCC_EA0_WRREQ_64B[18],TCC_EA0_WRREQ_LEVEL[18],TCC_HIT[18],TCC_EA0_WRREQ[19],TCC_EA0_WRREQ_64B[19],TCC_EA0_WRREQ_LEVEL[19],TCC_HIT[19],TCC_EA0_WRREQ[20],TCC_EA0_WRREQ_64B[20],TCC_EA0_WRREQ_LEVEL[20],TCC_HIT[20],TCC_EA0_WRREQ[21],TCC_EA0_WRREQ_64B[21],TCC_EA0_WRREQ_LEVEL[21],TCC_HIT[21],TCC_EA0_WRREQ[22],TCC_EA0_WRREQ_64B[22],TCC_EA0_WRREQ_LEVEL[22],TCC_HIT[22],TCC_EA0_WRREQ[23],TCC_EA0_WRREQ_64B[23],TCC_EA0_WRREQ_LEVEL[23],TCC_HIT[23],TCC_EA0_WRREQ[24],TCC_EA0_WRREQ_64B[24],TCC_EA0_WRREQ_LEVEL[24],TCC_HIT[24],TCC_EA0_WRREQ[25],TCC_EA0_WRREQ_64B[25],TCC_EA0_WRREQ_LEVEL[25],TCC_HIT[25],TCC_EA0_WRREQ[26],TCC_EA0_WRREQ_64B[26],TCC_EA0_WRREQ_LEVEL[26],TCC_HIT[26],TCC_EA0_WRREQ[27],TCC_EA0_WRREQ_64B[27],TCC_EA0_WRREQ_LEVEL[27],TCC_HIT[27],TCC_EA0_WRREQ[28],TCC_EA0_WRREQ_64B[28],TCC_EA0_WRREQ_LEVEL[28],TCC_HIT[28],TCC_EA0_WRREQ[29],TCC_EA0_WRREQ_64B[29],TCC_EA0_WRREQ_LEVEL[29],TCC_HIT[29],TCC_EA0_WRREQ[30],TCC_EA0_WRREQ_64B[30],TCC_EA0_WRREQ_LEVEL[30],TCC_HIT[30],TCC_EA0_WRREQ[31],TCC_EA0_WRREQ_64B[31],TCC_EA0_WRREQ_LEVEL[31],TCC_HIT[31],TCC_EA0_WRREQ[32],TCC_EA0_WRREQ_64B[32],TCC_EA0_WRREQ_LEVEL[32],TCC_HIT[32],TCC_EA0_WRREQ[33],TCC_EA0_WRREQ_64B[33],TCC_EA0_WRREQ_LEVEL[33],TCC_HIT[33],TCC_EA0_WRREQ[34],TCC_EA0_WRREQ_64B[34],TCC_EA0_WRREQ_LEVEL[34],TCC_HIT[34],TCC_EA0_WRREQ[35],TCC_EA0_WRREQ_64B[35],TCC_EA0_WRREQ_LEVEL[35],TCC_HIT[35],TCC_EA0_WRREQ[36],TCC_EA0_WRREQ_64B[36],TCC_EA0_WRREQ_LEVEL[36],TCC_HIT[36],TCC_EA0_WRREQ[37],TCC_EA0_WRREQ_64B[37],TCC_EA0_WRREQ_LEVEL[37],TCC_HIT[37],TCC_EA0_WRREQ[38],TCC_EA0_WRREQ_64B[38],TCC_EA0_WRREQ_LEVEL[38],TCC_HIT[38],TCC_EA0_WRREQ[39],TCC_EA0_WRREQ_64B[39],TCC_EA0_WRREQ_LEVEL[39],TCC_HIT[39],TCC_EA0_WRREQ[40],TCC_EA0_WRREQ_64B[40],TCC_EA0_WRREQ_LEVEL[40],TCC_HIT[40],TCC_EA0_WRREQ[41],TCC_EA0_WRREQ_64B[41],TCC_EA0_WRREQ_LEVEL[41],TCC_HIT[41],TCC_EA0_WRREQ[42],TCC_EA0_WRREQ_64B[42],TCC_EA0_WRREQ_LEVEL[42],TCC_HIT[42],TCC_EA0_WRREQ[43],TCC_EA0_WRREQ_64B[43],TCC_EA0_WRREQ_LEVEL[43],TCC_HIT[43],TCC_EA0_WRREQ[44],TCC_EA0_WRREQ_64B[44],TCC_EA0_WRREQ_LEVEL[44],TCC_HIT[44],TCC_EA0_WRREQ[45],TCC_EA0_WRREQ_64B[45],TCC_EA0_WRREQ_LEVEL[45],TCC_HIT[45],TCC_EA0_WRREQ[46],TCC_EA0_WRREQ_64B[46],TCC_EA0_WRREQ_LEVEL[46],TCC_HIT[46],TCC_EA0_WRREQ[47],TCC_EA0_WRREQ_64B[47],TCC_EA0_WRREQ_LEVEL[47],TCC_HIT[47],TCC_EA0_WRREQ[48],TCC_EA0_WRREQ_64B[48],TCC_EA0_WRREQ_LEVEL[48],TCC_HIT[48],TCC_EA0_WRREQ[49],TCC_EA0_WRREQ_64B[49],TCC_EA0_WRREQ_LEVEL[49],TCC_HIT[49],TCC_EA0_WRREQ[50],TCC_EA0_WRREQ_64B[50],TCC_EA0_WRREQ_LEVEL[50],TCC_HIT[50],TCC_EA0_WRREQ[51],TCC_EA0_WRREQ_64B[51],TCC_EA0_WRREQ_LEVEL[51],TCC_HIT[51],TCC_EA0_WRREQ[52],TCC_EA0_WRREQ_64B[52],TCC_EA0_WRREQ_LEVEL[52],TCC_HIT[52],TCC_EA0_WRREQ[53],TCC_EA0_WRREQ_64B[53],TCC_EA0_WRREQ_LEVEL[53],TCC_HIT[53],TCC_EA0_WRREQ[54],TCC_EA0_WRREQ_64B[54],TCC_EA0_WRREQ_LEVEL[54],TCC_HIT[54],TCC_EA0_WRREQ[55],TCC_EA0_WRREQ_64B[55],TCC_EA0_WRREQ_LEVEL[55],TCC_HIT[55],TCC_EA0_WRREQ[56],TCC_EA0_WRREQ_64B[56],TCC_EA0_WRREQ_LEVEL[56],TCC_HIT[56],TCC_EA0_WRREQ[57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CED_WRITE_CYCLES_sum,TCC_ATOMIC_sum,TCC_READ_sum,TCC_WRITEBACK_sum,TCC_WRITE_sum,TCP_TOTAL_ATOMIC_WITHOUT_RET_sum,TCP_TOTAL_ATOMIC_WITH_RET_sum,TCP_TOTAL_CACHE_ACCESSES_sum,TCP_TOTAL_WRITEBACK_INVALIDATES_sum,TD_COALESCABLE_WAVEFRONT_sum,Wave_Size_5,Correlation_ID_5,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,TA_FLAT_ATOMIC_WAVEFRONTS_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,TCC_ALL_TC_OP_INV_EVICT_sum,TCC_EA0_ATOMIC_sum,TCC_NORMAL_EVICT_sum,TCC_TOO_MANY_EA_WRREQS_STALL_sum,TCP_TCC_CC_READ_REQ_sum,TCP_TCC_CC_WRITE_REQ_sum,TCP_TCC_UC_ATOMIC_REQ_sum,TCP_TCC_UC_WRITE_REQ_sum,Wave_Size_6,Correlation_ID_6,XCC_Index_6,TCC_MISS[0],TCC_READ[0],TCC_REQ[0],TCC_RW_REQ[0],TCC_MISS[1],TCC_READ[1],TCC_REQ[1],TCC_RW_REQ[1],TCC_MISS[2],TCC_READ[2],TCC_REQ[2],TCC_RW_REQ[2],TCC_MISS[3],TCC_READ[3],TCC_REQ[3],TCC_RW_REQ[3],TCC_MISS[4],TCC_READ[4],TCC_REQ[4],TCC_RW_REQ[4],TCC_MISS[5],TCC_READ[5],TCC_REQ[5],TCC_RW_REQ[5],TCC_MISS[6],TCC_READ[6],TCC_REQ[6],TCC_RW_REQ[6],TCC_MISS[7],TCC_READ[7],TCC_REQ[7],TCC_RW_REQ[7],TCC_MISS[8],TCC_READ[8],TCC_REQ[8],TCC_RW_REQ[8],TCC_MISS[9],TCC_READ[9],TCC_REQ[9],TCC_RW_REQ[9],TCC_MISS[10],TCC_READ[10],TCC_REQ[10],TCC_RW_REQ[10],TCC_MISS[11],TCC_READ[11],TCC_REQ[11],TCC_RW_REQ[11],TCC_MISS[12],TCC_READ[12],TCC_REQ[12],TCC_RW_REQ[12],TCC_MISS[13],TCC_READ[13],TCC_REQ[13],TCC_RW_REQ[13],TCC_MISS[14],TCC_READ[14],TCC_REQ[14],TCC_RW_REQ[14],TCC_MISS[15],TCC_READ[15],TCC_REQ[15],TCC_RW_REQ[15],TCC_MISS[16],TCC_READ[16],TCC_REQ[16],TCC_RW_REQ[16],TCC_MISS[17],TCC_READ[17],TCC_REQ[17],TCC_RW_REQ[17],TCC_MISS[18],TCC_READ[18],TCC_REQ[18],TCC_RW_REQ[18],TCC_MISS[19],TCC_READ[19],TCC_REQ[19],TCC_RW_REQ[19],TCC_MISS[20],TCC_READ[20],TCC_REQ[20],TCC_RW_REQ[20],TCC_MISS[21],TCC_READ[21],TCC_REQ[21],TCC_RW_REQ[21],TCC_MISS[22],TCC_READ[22],TCC_REQ[22],TCC_RW_REQ[22],TCC_MISS[23],TCC_READ[23],TCC_REQ[23],TCC_RW_REQ[23],TCC_MISS[24],TCC_READ[24],TCC_REQ[24],TCC_RW_REQ[24],TCC_MISS[25],TCC_READ[25],TCC_REQ[25],TCC_RW_REQ[25],TCC_MISS[26],TCC_READ[26],TCC_REQ[26],TCC_RW_REQ[26],TCC_MISS[27],TCC_READ[27],TCC_REQ[27],TCC_RW_REQ[27],TCC_MISS[28],TCC_READ[28],TCC_REQ[28],TCC_RW_REQ[28],TCC_MISS[29],TCC_READ[29],TCC_REQ[29],TCC_RW_REQ[29],TCC_MISS[30],TCC_READ[30],TCC_REQ[30],TCC_RW_REQ[30],TCC_MISS[31],TCC_READ[31],TCC_REQ[31],TCC_RW_REQ[31],TCC_MISS[32],TCC_READ[32],TCC_REQ[32],TCC_RW_REQ[32],TCC_MISS[33],TCC_READ[33],TCC_REQ[33],TCC_RW_REQ[33],TCC_MISS[34],TCC_READ[34],TCC_REQ[34],TCC_RW_REQ[34],TCC_MISS[35],TCC_READ[35],TCC_REQ[35],TCC_RW_REQ[35],TCC_MISS[36],TCC_READ[36],TCC_REQ[36],TCC_RW_REQ[36],TCC_MISS[37],TCC_READ[37],TCC_REQ[37],TCC_RW_REQ[37],TCC_MISS[38],TCC_READ[38],TCC_REQ[38],TCC_RW_REQ[38],TCC_MISS[39],TCC_READ[39],TCC_REQ[39],TCC_RW_REQ[39],TCC_MISS[40],TCC_READ[40],TCC_REQ[40],TCC_RW_REQ[40],TCC_MISS[41],TCC_READ[41],TCC_REQ[41],TCC_RW_REQ[41],TCC_MISS[42],TCC_READ[42],TCC_REQ[42],TCC_RW_REQ[42],TCC_MISS[43],TCC_READ[43],TCC_REQ[43],TCC_RW_REQ[43],TCC_MISS[44],TCC_READ[44],TCC_REQ[44],TCC_RW_REQ[44],TCC_MISS[45],TCC_READ[45],TCC_REQ[45],TCC_RW_REQ[45],TCC_MISS[46],TCC_READ[46],TCC_REQ[46],TCC_RW_REQ[46],TCC_MISS[47],TCC_READ[47],TCC_REQ[47],TCC_RW_REQ[47],TCC_MISS[48],TCC_READ[48],TCC_REQ[48],TCC_RW_REQ[48],TCC_MISS[49],TCC_READ[49],TCC_REQ[49],TCC_RW_REQ[49],TCC_MISS[50],TCC_READ[50],TCC_REQ[50],TCC_RW_REQ[50],TCC_MISS[51],TCC_READ[51],TCC_REQ[51],TCC_RW_REQ[51],TCC_MISS[52],TCC_READ[52],TCC_REQ[52],TCC_RW_REQ[52],TCC_MISS[53],TCC_READ[53],TCC_REQ[53],TCC_RW_REQ[53],TCC_MISS[54],TCC_READ[54],TCC_REQ[54],TCC_RW_REQ[54],TCC_MISS[55],TCC_READ[55],TCC_REQ[55],TCC_RW_REQ[55],TCC_MISS[56],TCC_READ[56],TCC_REQ[56],TCC_RW_REQ[56],TCC_MISS[57],TCC_READ[57],TCC_REQ[57],TCC_RW_REQ[57],TCC_MISS[58],TCC_READ[58],TCC_REQ[58],TCC_RW_REQ[58],TCC_MISS[59],TCC_READ[59],TCC_REQ[59],TCC_RW_REQ[59],TCC_MISS[60],TCC_READ[60],TCC_REQ[60],TCC_RW_REQ[60],TCC_MISS[61],TCC_READ[61],TCC_REQ[61],TCC_RW_REQ[61],TCC_MISS[62],TCC_READ[62],TCC_REQ[62],TCC_RW_REQ[62],TCC_MISS[63],TCC_READ[63],TCC_REQ[63],TCC_RW_REQ[63],TCC_MISS[64],TCC_READ[64],TCC_REQ[64],TCC_RW_REQ[64],TCC_MISS[65],TCC_READ[65],TCC_REQ[65],TCC_RW_REQ[65],TCC_MISS[66],TCC_READ[66],TCC_REQ[66],TCC_RW_REQ[66],TCC_MISS[67],TCC_READ[67],TCC_REQ[67],TCC_RW_REQ[67],TCC_MISS[68],TCC_READ[68],TCC_REQ[68],TCC_RW_REQ[68],TCC_MISS[69],TCC_READ[69],TCC_REQ[69],TCC_RW_REQ[69],TCC_MISS[70],TCC_READ[70],TCC_REQ[70],TCC_RW_REQ[70],TCC_MISS[71],TCC_READ[71],TCC_REQ[71],TCC_RW_REQ[71],TCC_MISS[72],TCC_READ[72],TCC_REQ[72],TCC_RW_REQ[72],TCC_MISS[73],TCC_READ[73],TCC_REQ[73],TCC_RW_REQ[73],TCC_MISS[74],TCC_READ[74],TCC_REQ[74],TCC_RW_REQ[74],TCC_MISS[75],TCC_READ[75],TCC_REQ[75],TCC_RW_REQ[75],TCC_MISS[76],TCC_READ[76],TCC_REQ[76],TCC_RW_REQ[76],TCC_MISS[77],TCC_READ[77],TCC_REQ[77],TCC_RW_REQ[77],TCC_MISS[78],TCC_READ[78],TCC_REQ[78],TCC_RW_REQ[78],TCC_MISS[79],TCC_READ[79],TCC_REQ[79],TCC_RW_REQ[79],TCC_MISS[80],TCC_READ[80],TCC_REQ[80],TCC_RW_REQ[80],TCC_MISS[81],TCC_READ[81],TCC_REQ[81],TCC_RW_REQ[81],TCC_MISS[82],TCC_READ[82],TCC_REQ[82],TCC_RW_REQ[82],TCC_MISS[83],TCC_READ[83],TCC_REQ[83],TCC_RW_REQ[83],TCC_MISS[84],TCC_READ[84],TCC_REQ[84],TCC_RW_REQ[84],TCC_MISS[85],TCC_READ[85],TCC_REQ[85],TCC_RW_REQ[85],TCC_MISS[86],TCC_READ[86],TCC_REQ[86],TCC_RW_REQ[86],TCC_MISS[87],TCC_READ[87],TCC_REQ[87],TCC_RW_REQ[87],TCC_MISS[88],TCC_READ[88],TCC_REQ[88],TCC_RW_REQ[88],TCC_MISS[89],TCC_READ[89],TCC_REQ[89],TCC_RW_REQ[89],TCC_MISS[90],TCC_READ[90],TCC_REQ[90],TCC_RW_REQ[90],TCC_MISS[91],TCC_READ[91],TCC_REQ[91],TCC_RW_REQ[91],TCC_MISS[92],TCC_READ[92],TCC_REQ[92],TCC_RW_REQ[92],TCC_MISS[93],TCC_READ[93],TCC_REQ[93],TCC_RW_REQ[93],TCC_MISS[94],TCC_READ[94],TCC_REQ[94],TCC_RW_REQ[94],TCC_MISS[95],TCC_READ[95],TCC_REQ[95],TCC_RW_REQ[95],Wave_Size_7,Correlation_ID_7,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SPI_RA_REQ_NO_ALLOC,SPI_RA_REQ_NO_ALLOC_CSN,CPC_CPC_STAT_STALL,CPC_UTCL1_STALL_ON_TRANSLATION,CPF_CPF_STAT_IDLE,CPF_CPF_TCIU_IDLE,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,TA_BUFFER_TOTAL_CYCLES_sum,TCC_HIT_sum,TCC_MISS_sum,TCC_REQ_sum,TCC_STREAMING_REQ_sum,TCP_TOTAL_ACCESSES_sum,TCP_TOTAL_READ_sum,TCP_TOTAL_WRITE_sum,TCP_VOLATILE_sum,TD_ATOMIC_WAVEFRONT_sum,TD_STORE_WAVEFRONT_sum,Wave_Size_8,Correlation_ID_8,XCC_Index_8,TCC_ATOMIC[0],TCC_BUBBLE[0],TCC_CYCLE[0],TCC_EA0_ATOMIC[0],TCC_ATOMIC[1],TCC_BUBBLE[1],TCC_CYCLE[1],TCC_EA0_ATOMIC[1],TCC_ATOMIC[2],TCC_BUBBLE[2],TCC_CYCLE[2],TCC_EA0_ATOMIC[2],TCC_ATOMIC[3],TCC_BUBBLE[3],TCC_CYCLE[3],TCC_EA0_ATOMIC[3],TCC_ATOMIC[4],TCC_BUBBLE[4],TCC_CYCLE[4],TCC_EA0_ATOMIC[4],TCC_ATOMIC[5],TCC_BUBBLE[5],TCC_CYCLE[5],TCC_EA0_ATOMIC[5],TCC_ATOMIC[6],TCC_BUBBLE[6],TCC_CYCLE[6],TCC_EA0_ATOMIC[6],TCC_ATOMIC[7],TCC_BUBBLE[7],TCC_CYCLE[7],TCC_EA0_ATOMIC[7],TCC_ATOMIC[8],TCC_BUBBLE[8],TCC_CYCLE[8],TCC_EA0_ATOMIC[8],TCC_ATOMIC[9],TCC_BUBBLE[9],TCC_CYCLE[9],TCC_EA0_ATOMIC[9],TCC_ATOMIC[10],TCC_BUBBLE[10],TCC_CYCLE[10],TCC_EA0_ATOMIC[10],TCC_ATOMIC[11],TCC_BUBBLE[11],TCC_CYCLE[11],TCC_EA0_ATOMIC[11],TCC_ATOMIC[12],TCC_BUBBLE[12],TCC_CYCLE[12],TCC_EA0_ATOMIC[12],TCC_ATOMIC[13],TCC_BUBBLE[13],TCC_CYCLE[13],TCC_EA0_ATOMIC[13],TCC_ATOMIC[14],TCC_BUBBLE[14],TCC_CYCLE[14],TCC_EA0_ATOMIC[14],TCC_ATOMIC[15],TCC_BUBBLE[15],TCC_CYCLE[15],TCC_EA0_ATOMIC[15],TCC_ATOMIC[16],TCC_BUBBLE[16],TCC_CYCLE[16],TCC_EA0_ATOMIC[16],TCC_ATOMIC[17],TCC_BUBBLE[17],TCC_CYCLE[17],TCC_EA0_ATOMIC[17],TCC_ATOMIC[18],TCC_BUBBLE[18],TCC_CYCLE[18],TCC_EA0_ATOMIC[18],TCC_ATOMIC[19],TCC_BUBBLE[19],TCC_CYCLE[19],TCC_EA0_ATOMIC[19],TCC_ATOMIC[20],TCC_BUBBLE[20],TCC_CYCLE[20],TCC_EA0_ATOMIC[20],TCC_ATOMIC[21],TCC_BUBBLE[21],TCC_CYCLE[21],TCC_EA0_ATOMIC[21],TCC_ATOMIC[22],TCC_BUBBLE[22],TCC_CYCLE[22],TCC_EA0_ATOMIC[22],TCC_ATOMIC[23],TCC_BUBBLE[23],TCC_CYCLE[23],TCC_EA0_ATOMIC[23],TCC_ATOMIC[24],TCC_BUBBLE[24],TCC_CYCLE[24],TCC_EA0_ATOMIC[24],TCC_ATOMIC[25],TCC_BUBBLE[25],TCC_CYCLE[25],TCC_EA0_ATOMIC[25],TCC_ATOMIC[26],TCC_BUBBLE[26],TCC_CYCLE[26],TCC_EA0_ATOMIC[26],TCC_ATOMIC[27],TCC_BUBBLE[27],TCC_CYCLE[27],TCC_EA0_ATOMIC[27],TCC_ATOMIC[28],TCC_BUBBLE[28],TCC_CYCLE[28],TCC_EA0_ATOMIC[28],TCC_ATOMIC[29],TCC_BUBBLE[29],TCC_CYCLE[29],TCC_EA0_ATOMIC[29],TCC_ATOMIC[30],TCC_BUBBLE[30],TCC_CYCLE[30],TCC_EA0_ATOMIC[30],TCC_ATOMIC[31],TCC_BUBBLE[31],TCC_CYCLE[31],TCC_EA0_ATOMIC[31],TCC_ATOMIC[32],TCC_BUBBLE[32],TCC_CYCLE[32],TCC_EA0_ATOMIC[32],TCC_ATOMIC[33],TCC_BUBBLE[33],TCC_CYCLE[33],TCC_EA0_ATOMIC[33],TCC_ATOMIC[34],TCC_BUBBLE[34],TCC_CYCLE[34],TCC_EA0_ATOMIC[34],TCC_ATOMIC[35],TCC_BUBBLE[35],TCC_CYCLE[35],TCC_EA0_ATOMIC[35],TCC_ATOMIC[36],TCC_BUBBLE[36],TCC_CYCLE[36],TCC_EA0_ATOMIC[36],TCC_ATOMIC[37],TCC_BUBBLE[37],TCC_CYCLE[37],TCC_EA0_ATOMIC[37],TCC_ATOMIC[38],TCC_BUBBLE[38],TCC_CYCLE[38],TCC_EA0_ATOMIC[38],TCC_ATOMIC[39],TCC_BUBBLE[39],TCC_CYCLE[39],TCC_EA0_ATOMIC[39],TCC_ATOMIC[40],TCC_BUBBLE[40],TCC_CYCLE[40],TCC_EA0_ATOMIC[40],TCC_ATOMIC[41],TCC_BUBBLE[41],TCC_CYCLE[41],TCC_EA0_ATOMIC[41],TCC_ATOMIC[42],TCC_BUBBLE[42],TCC_CYCLE[42],TCC_EA0_ATOMIC[42],TCC_ATOMIC[43],TCC_BUBBLE[43],TCC_CYCLE[43],TCC_EA0_ATOMIC[43],TCC_ATOMIC[44],TCC_BUBBLE[44],TCC_CYCLE[44],TCC_EA0_ATOMIC[44],TCC_ATOMIC[45],TCC_BUBBLE[45],TCC_CYCLE[45],TCC_EA0_ATOMIC[45],TCC_ATOMIC[46],TCC_BUBBLE[46],TCC_CYCLE[46],TCC_EA0_ATOMIC[46],TCC_ATOMIC[47],TCC_BUBBLE[47],TCC_CYCLE[47],TCC_EA0_ATOMIC[47],TCC_ATOMIC[48],TCC_BUBBLE[48],TCC_CYCLE[48],TCC_EA0_ATOMIC[48],TCC_ATOMIC[49],TCC_BUBBLE[49],TCC_CYCLE[49],TCC_EA0_ATOMIC[49],TCC_ATOMIC[50],TCC_BUBBLE[50],TCC_CYCLE[50],TCC_EA0_ATOMIC[50],TCC_ATOMIC[51],TCC_BUBBLE[51],TCC_CYCLE[51],TCC_EA0_ATOMIC[51],TCC_ATOMIC[52],TCC_BUBBLE[52],TCC_CYCLE[52],TCC_EA0_ATOMIC[52],TCC_ATOMIC[53],TCC_BUBBLE[53],TCC_CYCLE[53],TCC_EA0_ATOMIC[53],TCC_ATOMIC[54],TCC_BUBBLE[54],TCC_CYCLE[54],TCC_EA0_ATOMIC[54],TCC_ATOMIC[55],TCC_BUBBLE[55],TCC_CYCLE[55],TCC_EA0_ATOMIC[55],TCC_ATOMIC[56],TCC_BUBBLE[56],TCC_CYCLE[56],TCC_EA0_ATOMIC[56],TCC_ATOMIC[57],TCC_BUBBLE[57],TCC_CYCLE[57],TCC_EA0_ATOMIC[57],TCC_ATOMIC[58],TCC_BUBBLE[58],TCC_CYCLE[58],TCC_EA0_ATOMIC[58],TCC_ATOMIC[59],TCC_BUBBLE[59],TCC_CYCLE[59],TCC_EA0_ATOMIC[59],TCC_ATOMIC[60],TCC_BUBBLE[60],TCC_CYCLE[60],TCC_EA0_ATOMIC[60],TCC_ATOMIC[61],TCC_BUBBLE[61],TCC_CYCLE[61],TCC_EA0_ATOMIC[61],TCC_ATOMIC[62],TCC_BUBBLE[62],TCC_CYCLE[62],TCC_EA0_ATOMIC[62],TCC_ATOMIC[63],TCC_BUBBLE[63],TCC_CYCLE[63],TCC_EA0_ATOMIC[63],TCC_ATOMIC[64],TCC_BUBBLE[64],TCC_CYCLE[64],TCC_EA0_ATOMIC[64],TCC_ATOMIC[65],TCC_BUBBLE[65],TCC_CYCLE[65],TCC_EA0_ATOMIC[65],TCC_ATOMIC[66],TCC_BUBBLE[66],TCC_CYCLE[66],TCC_EA0_ATOMIC[66],TCC_ATOMIC[67],TCC_BUBBLE[67],TCC_CYCLE[67],TCC_EA0_ATOMIC[67],TCC_ATOMIC[68],TCC_BUBBLE[68],TCC_CYCLE[68],TCC_EA0_ATOMIC[68],TCC_ATOMIC[69],TCC_BUBBLE[69],TCC_CYCLE[69],TCC_EA0_ATOMIC[69],TCC_ATOMIC[70],TCC_BUBBLE[70],TCC_CYCLE[70],TCC_EA0_ATOMIC[70],TCC_ATOMIC[71],TCC_BUBBLE[71],TCC_CYCLE[71],TCC_EA0_ATOMIC[71],TCC_ATOMIC[72],TCC_BUBBLE[72],TCC_CYCLE[72],TCC_EA0_ATOMIC[72],TCC_ATOMIC[73],TCC_BUBBLE[73],TCC_CYCLE[73],TCC_EA0_ATOMIC[73],TCC_ATOMIC[74],TCC_BUBBLE[74],TCC_CYCLE[74],TCC_EA0_ATOMIC[74],TCC_ATOMIC[75],TCC_BUBBLE[75],TCC_CYCLE[75],TCC_EA0_ATOMIC[75],TCC_ATOMIC[76],TCC_BUBBLE[76],TCC_CYCLE[76],TCC_EA0_ATOMIC[76],TCC_ATOMIC[77],TCC_BUBBLE[77],TCC_CYCLE[77],TCC_EA0_ATOMIC[77],TCC_ATOMIC[78],TCC_BUBBLE[78],TCC_CYCLE[78],TCC_EA0_ATOMIC[78],TCC_ATOMIC[79],TCC_BUBBLE[79],TCC_CYCLE[79],TCC_EA0_ATOMIC[79],TCC_ATOMIC[80],TCC_BUBBLE[80],TCC_CYCLE[80],TCC_EA0_ATOMIC[80],TCC_ATOMIC[81],TCC_BUBBLE[81],TCC_CYCLE[81],TCC_EA0_ATOMIC[81],TCC_ATOMIC[82],TCC_BUBBLE[82],TCC_CYCLE[82],TCC_EA0_ATOMIC[82],TCC_ATOMIC[83],TCC_BUBBLE[83],TCC_CYCLE[83],TCC_EA0_ATOMIC[83],TCC_ATOMIC[84],TCC_BUBBLE[84],TCC_CYCLE[84],TCC_EA0_ATOMIC[84],TCC_ATOMIC[85],TCC_BUBBLE[85],TCC_CYCLE[85],TCC_EA0_ATOMIC[85],TCC_ATOMIC[86],TCC_BUBBLE[86],TCC_CYCLE[86],TCC_EA0_ATOMIC[86],TCC_ATOMIC[87],TCC_BUBBLE[87],TCC_CYCLE[87],TCC_EA0_ATOMIC[87],TCC_ATOMIC[88],TCC_BUBBLE[88],TCC_CYCLE[88],TCC_EA0_ATOMIC[88],TCC_ATOMIC[89],TCC_BUBBLE[89],TCC_CYCLE[89],TCC_EA0_ATOMIC[89],TCC_ATOMIC[90],TCC_BUBBLE[90],TCC_CYCLE[90],TCC_EA0_ATOMIC[90],TCC_ATOMIC[91],TCC_BUBBLE[91],TCC_CYCLE[91],TCC_EA0_ATOMIC[91],TCC_ATOMIC[92],TCC_BUBBLE[92],TCC_CYCLE[92],TCC_EA0_ATOMIC[92],TCC_ATOMIC[93],TCC_BUBBLE[93],TCC_CYCLE[93],TCC_EA0_ATOMIC[93],TCC_ATOMIC[94],TCC_BUBBLE[94],TCC_CYCLE[94],TCC_EA0_ATOMIC[94],TCC_ATOMIC[95],TCC_BUBBLE[95],TCC_CYCLE[95],TCC_EA0_ATOMIC[95],Wave_Size_9,Correlation_ID_9,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_10,Correlation_ID_10,SQC_TC_DATA_ATOMIC_REQ,SQC_TC_STALL,SQC_TC_REQ,SQC_DCACHE_REQ_READ_16,SQC_ICACHE_REQ,SQC_ICACHE_HITS,SQC_ICACHE_MISSES,SQC_ICACHE_MISSES_DUPLICATE,Wave_Size_11,Correlation_ID_11,SQ_INSTS_VALU_MFMA_MOPS_I8,SQ_INSTS_VALU_MFMA_MOPS_F16,SQ_INSTS_VALU_MFMA_MOPS_BF16,SQ_INSTS_VALU_MFMA_MOPS_F32,SQ_INSTS_VALU_MFMA_MOPS_F64,SQC_TC_INST_REQ,SQC_TC_DATA_READ_REQ,SQC_TC_DATA_WRITE_REQ,TCP_PENDING_STALL_CYCLES_sum,Wave_Size_12,Correlation_ID_12,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,TCC_EA0_ATOMIC_LEVEL_sum,TCC_EA0_RDREQ_LEVEL_sum,TCC_EA0_WRREQ_LEVEL_sum,TCC_EA0_WRREQ_STALL_sum,TCP_TCC_CC_ATOMIC_REQ_sum,TCP_TCC_RW_ATOMIC_REQ_sum,TCP_TCC_RW_READ_REQ_sum,TCP_TCC_RW_WRITE_REQ_sum,Wave_Size_13,Correlation_ID_13,SQC_DCACHE_REQ_READ_2,SQC_DCACHE_REQ_READ_4,Wave_Size_14,Correlation_ID_14,SQ_ACTIVE_INST_SCA,SQ_ACTIVE_INST_EXP_GDS,SQ_ACTIVE_INST_MISC,SQ_ACTIVE_INST_FLAT,SQ_INST_CYCLES_VMEM_WR,SQ_INST_CYCLES_VMEM_RD,SQ_INST_CYCLES_SMEM,SQ_INST_CYCLES_SALU,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,CPC_ME1_DC0_SPI_BUSY,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,TCC_BUBBLE_sum,TCC_EA0_RDREQ_32B_sum,TCC_EA0_RDREQ_sum,TCC_EA0_RD_UNCACHED_32B_sum,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,TCP_TCC_READ_REQ_sum,TCP_TCC_WRITE_REQ_sum,Wave_Size_15,Correlation_ID_15,XCC_Index_15,TCC_EA0_ATOMIC_LEVEL[0],TCC_EA0_RDREQ[0],TCC_EA0_RDREQ_32B[0],TCC_EA0_RDREQ_LEVEL[0],TCC_EA0_ATOMIC_LEVEL[1],TCC_EA0_RDREQ[1],TCC_EA0_RDREQ_32B[1],TCC_EA0_RDREQ_LEVEL[1],TCC_EA0_ATOMIC_LEVEL[2],TCC_EA0_RDREQ[2],TCC_EA0_RDREQ_32B[2],TCC_EA0_RDREQ_LEVEL[2],TCC_EA0_ATOMIC_LEVEL[3],TCC_EA0_RDREQ[3],TCC_EA0_RDREQ_32B[3],TCC_EA0_RDREQ_LEVEL[3],TCC_EA0_ATOMIC_LEVEL[4],TCC_EA0_RDREQ[4],TCC_EA0_RDREQ_32B[4],TCC_EA0_RDREQ_LEVEL[4],TCC_EA0_ATOMIC_LEVEL[5],TCC_EA0_RDREQ[5],TCC_EA0_RDREQ_32B[5],TCC_EA0_RDREQ_LEVEL[5],TCC_EA0_ATOMIC_LEVEL[6],TCC_EA0_RDREQ[6],TCC_EA0_RDREQ_32B[6],TCC_EA0_RDREQ_LEVEL[6],TCC_EA0_ATOMIC_LEVEL[7],TCC_EA0_RDREQ[7],TCC_EA0_RDREQ_32B[7],TCC_EA0_RDREQ_LEVEL[7],TCC_EA0_ATOMIC_LEVEL[8],TCC_EA0_RDREQ[8],TCC_EA0_RDREQ_32B[8],TCC_EA0_RDREQ_LEVEL[8],TCC_EA0_ATOMIC_LEVEL[9],TCC_EA0_RDREQ[9],TCC_EA0_RDREQ_32B[9],TCC_EA0_RDREQ_LEVEL[9],TCC_EA0_ATOMIC_LEVEL[10],TCC_EA0_RDREQ[10],TCC_EA0_RDREQ_32B[10],TCC_EA0_RDREQ_LEVEL[10],TCC_EA0_ATOMIC_LEVEL[11],TCC_EA0_RDREQ[11],TCC_EA0_RDREQ_32B[11],TCC_EA0_RDREQ_LEVEL[11],TCC_EA0_ATOMIC_LEVEL[12],TCC_EA0_RDREQ[12],TCC_EA0_RDREQ_32B[12],TCC_EA0_RDREQ_LEVEL[12],TCC_EA0_ATOMIC_LEVEL[13],TCC_EA0_RDREQ[13],TCC_EA0_RDREQ_32B[13],TCC_EA0_RDREQ_LEVEL[13],TCC_EA0_ATOMIC_LEVEL[14],TCC_EA0_RDREQ[14],TCC_EA0_RDREQ_32B[14],TCC_EA0_RDREQ_LEVEL[14],TCC_EA0_ATOMIC_LEVEL[15],TCC_EA0_RDREQ[15],TCC_EA0_RDREQ_32B[15],TCC_EA0_RDREQ_LEVEL[15],TCC_EA0_ATOMIC_LEVEL[16],TCC_EA0_RDREQ[16],TCC_EA0_RDREQ_32B[16],TCC_EA0_RDREQ_LEVEL[16],TCC_EA0_ATOMIC_LEVEL[17],TCC_EA0_RDREQ[17],TCC_EA0_RDREQ_32B[17],TCC_EA0_RDREQ_LEVEL[17],TCC_EA0_ATOMIC_LEVEL[18],TCC_EA0_RDREQ[18],TCC_EA0_RDREQ_32B[18],TCC_EA0_RDREQ_LEVEL[18],TCC_EA0_ATOMIC_LEVEL[19],TCC_EA0_RDREQ[19],TCC_EA0_RDREQ_32B[19],TCC_EA0_RDREQ_LEVEL[19],TCC_EA0_ATOMIC_LEVEL[20],TCC_EA0_RDREQ[20],TCC_EA0_RDREQ_32B[20],TCC_EA0_RDREQ_LEVEL[20],TCC_EA0_ATOMIC_LEVEL[21],TCC_EA0_RDREQ[21],TCC_EA0_RDREQ_32B[21],TCC_EA0_RDREQ_LEVEL[21],TCC_EA0_ATOMIC_LEVEL[22],TCC_EA0_RDREQ[22],TCC_EA0_RDREQ_32B[22],TCC_EA0_RDREQ_LEVEL[22],TCC_EA0_ATOMIC_LEVEL[23],TCC_EA0_RDREQ[23],TCC_EA0_RDREQ_32B[23],TCC_EA0_RDREQ_LEVEL[23],TCC_EA0_ATOMIC_LEVEL[24],TCC_EA0_RDREQ[24],TCC_EA0_RDREQ_32B[24],TCC_EA0_RDREQ_LEVEL[24],TCC_EA0_ATOMIC_LEVEL[25],TCC_EA0_RDREQ[25],TCC_EA0_RDREQ_32B[25],TCC_EA0_RDREQ_LEVEL[25],TCC_EA0_ATOMIC_LEVEL[26],TCC_EA0_RDREQ[26],TCC_EA0_RDREQ_32B[26],TCC_EA0_RDREQ_LEVEL[26],TCC_EA0_ATOMIC_LEVEL[27],TCC_EA0_RDREQ[27],TCC_EA0_RDREQ_32B[27],TCC_EA0_RDREQ_LEVEL[27],TCC_EA0_ATOMIC_LEVEL[28],TCC_EA0_RDREQ[28],TCC_EA0_RDREQ_32B[28],TCC_EA0_RDREQ_LEVEL[28],TCC_EA0_ATOMIC_LEVEL[29],TCC_EA0_RDREQ[29],TCC_EA0_RDREQ_32B[29],TCC_EA0_RDREQ_LEVEL[29],TCC_EA0_ATOMIC_LEVEL[30],TCC_EA0_RDREQ[30],TCC_EA0_RDREQ_32B[30],TCC_EA0_RDREQ_LEVEL[30],TCC_EA0_ATOMIC_LEVEL[31],TCC_EA0_RDREQ[31],TCC_EA0_RDREQ_32B[31],TCC_EA0_RDREQ_LEVEL[31],TCC_EA0_ATOMIC_LEVEL[32],TCC_EA0_RDREQ[32],TCC_EA0_RDREQ_32B[32],TCC_EA0_RDREQ_LEVEL[32],TCC_EA0_ATOMIC_LEVEL[33],TCC_EA0_RDREQ[33],TCC_EA0_RDREQ_32B[33],TCC_EA0_RDREQ_LEVEL[33],TCC_EA0_ATOMIC_LEVEL[34],TCC_EA0_RDREQ[34],TCC_EA0_RDREQ_32B[34],TCC_EA0_RDREQ_LEVEL[34],TCC_EA0_ATOMIC_LEVEL[35],TCC_EA0_RDREQ[35],TCC_EA0_RDREQ_32B[35],TCC_EA0_RDREQ_LEVEL[35],TCC_EA0_ATOMIC_LEVEL[36],TCC_EA0_RDREQ[36],TCC_EA0_RDREQ_32B[36],TCC_EA0_RDREQ_LEVEL[36],TCC_EA0_ATOMIC_LEVEL[37],TCC_EA0_RDREQ[37],TCC_EA0_RDREQ_32B[37],TCC_EA0_RDREQ_LEVEL[37],TCC_EA0_ATOMIC_LEVEL[38],TCC_EA0_RDREQ[38],TCC_EA0_RDREQ_32B[38],TCC_EA0_RDREQ_LEVEL[38],TCC_EA0_ATOMIC_LEVEL[39],TCC_EA0_RDREQ[39],TCC_EA0_RDREQ_32B[39],TCC_EA0_RDREQ_LEVEL[39],TCC_EA0_ATOMIC_LEVEL[40],TCC_EA0_RDREQ[40],TCC_EA0_RDREQ_32B[40],TCC_EA0_RDREQ_LEVEL[40],TCC_EA0_ATOMIC_LEVEL[41],TCC_EA0_RDREQ[41],TCC_EA0_RDREQ_32B[41],TCC_EA0_RDREQ_LEVEL[41],TCC_EA0_ATOMIC_LEVEL[42],TCC_EA0_RDREQ[42],TCC_EA0_RDREQ_32B[42],TCC_EA0_RDREQ_LEVEL[42],TCC_EA0_ATOMIC_LEVEL[43],TCC_EA0_RDREQ[43],TCC_EA0_RDREQ_32B[43],TCC_EA0_RDREQ_LEVEL[43],TCC_EA0_ATOMIC_LEVEL[44],TCC_EA0_RDREQ[44],TCC_EA0_RDREQ_32B[44],TCC_EA0_RDREQ_LEVEL[44],TCC_EA0_ATOMIC_LEVEL[45],TCC_EA0_RDREQ[45],TCC_EA0_RDREQ_32B[45],TCC_EA0_RDREQ_LEVEL[45],TCC_EA0_ATOMIC_LEVEL[46],TCC_EA0_RDREQ[46],TCC_EA0_RDREQ_32B[46],TCC_EA0_RDREQ_LEVEL[46],TCC_EA0_ATOMIC_LEVEL[47],TCC_EA0_RDREQ[47],TCC_EA0_RDREQ_32B[47],TCC_EA0_RDREQ_LEVEL[47],TCC_EA0_ATOMIC_LEVEL[48],TCC_EA0_RDREQ[48],TCC_EA0_RDREQ_32B[48],TCC_EA0_RDREQ_LEVEL[48],TCC_EA0_ATOMIC_LEVEL[49],TCC_EA0_RDREQ[49],TCC_EA0_RDREQ_32B[49],TCC_EA0_RDREQ_LEVEL[49],TCC_EA0_ATOMIC_LEVEL[50],TCC_EA0_RDREQ[50],TCC_EA0_RDREQ_32B[50],TCC_EA0_RDREQ_LEVEL[50],TCC_EA0_ATOMIC_LEVEL[51],TCC_EA0_RDREQ[51],TCC_EA0_RDREQ_32B[51],TCC_EA0_RDREQ_LEVEL[51],TCC_EA0_ATOMIC_LEVEL[52],TCC_EA0_RDREQ[52],TCC_EA0_RDREQ_32B[52],TCC_EA0_RDREQ_LEVEL[52],TCC_EA0_ATOMIC_LEVEL[53],TCC_EA0_RDREQ[53],TCC_EA0_RDREQ_32B[53],TCC_EA0_RDREQ_LEVEL[53],TCC_EA0_ATOMIC_LEVEL[54],TCC_EA0_RDREQ[54],TCC_EA0_RDREQ_32B[54],TCC_EA0_RDREQ_LEVEL[54],TCC_EA0_ATOMIC_LEVEL[55],TCC_EA0_RDREQ[55],TCC_EA0_RDREQ_32B[55],TCC_EA0_RDREQ_LEVEL[55],TCC_EA0_ATOMIC_LEVEL[56],TCC_EA0_RDREQ[56],TCC_EA0_RDREQ_32B[56],TCC_EA0_RDREQ_LEVEL[56],TCC_EA0_ATOMIC_LEVEL[57],TCC_EA0_RDREQ[57],TCC_EA0_RDREQ_32B[57],TCC_EA0_RDREQ_LEVEL[57],TCC_EA0_ATOMIC_LEVEL[58],TCC_EA0_RDREQ[58],TCC_EA0_RDREQ_32B[58],TCC_EA0_RDREQ_LEVEL[58],TCC_EA0_ATOMIC_LEVEL[59],TCC_EA0_RDREQ[59],TCC_EA0_RDREQ_32B[59],TCC_EA0_RDREQ_LEVEL[59],TCC_EA0_ATOMIC_LEVEL[60],TCC_EA0_RDREQ[60],TCC_EA0_RDREQ_32B[60],TCC_EA0_RDREQ_LEVEL[60],TCC_EA0_ATOMIC_LEVEL[61],TCC_EA0_RDREQ[61],TCC_EA0_RDREQ_32B[61],TCC_EA0_RDREQ_LEVEL[61],TCC_EA0_ATOMIC_LEVEL[62],TCC_EA0_RDREQ[62],TCC_EA0_RDREQ_32B[62],TCC_EA0_RDREQ_LEVEL[62],TCC_EA0_ATOMIC_LEVEL[63],TCC_EA0_RDREQ[63],TCC_EA0_RDREQ_32B[63],TCC_EA0_RDREQ_LEVEL[63],TCC_EA0_ATOMIC_LEVEL[64],TCC_EA0_RDREQ[64],TCC_EA0_RDREQ_32B[64],TCC_EA0_RDREQ_LEVEL[64],TCC_EA0_ATOMIC_LEVEL[65],TCC_EA0_RDREQ[65],TCC_EA0_RDREQ_32B[65],TCC_EA0_RDREQ_LEVEL[65],TCC_EA0_ATOMIC_LEVEL[66],TCC_EA0_RDREQ[66],TCC_EA0_RDREQ_32B[66],TCC_EA0_RDREQ_LEVEL[66],TCC_EA0_ATOMIC_LEVEL[67],TCC_EA0_RDREQ[67],TCC_EA0_RDREQ_32B[67],TCC_EA0_RDREQ_LEVEL[67],TCC_EA0_ATOMIC_LEVEL[68],TCC_EA0_RDREQ[68],TCC_EA0_RDREQ_32B[68],TCC_EA0_RDREQ_LEVEL[68],TCC_EA0_ATOMIC_LEVEL[69],TCC_EA0_RDREQ[69],TCC_EA0_RDREQ_32B[69],TCC_EA0_RDREQ_LEVEL[69],TCC_EA0_ATOMIC_LEVEL[70],TCC_EA0_RDREQ[70],TCC_EA0_RDREQ_32B[70],TCC_EA0_RDREQ_LEVEL[70],TCC_EA0_ATOMIC_LEVEL[71],TCC_EA0_RDREQ[71],TCC_EA0_RDREQ_32B[71],TCC_EA0_RDREQ_LEVEL[71],TCC_EA0_ATOMIC_LEVEL[72],TCC_EA0_RDREQ[72],TCC_EA0_RDREQ_32B[72],TCC_EA0_RDREQ_LEVEL[72],TCC_EA0_ATOMIC_LEVEL[73],TCC_EA0_RDREQ[73],TCC_EA0_RDREQ_32B[73],TCC_EA0_RDREQ_LEVEL[73],TCC_EA0_ATOMIC_LEVEL[74],TCC_EA0_RDREQ[74],TCC_EA0_RDREQ_32B[74],TCC_EA0_RDREQ_LEVEL[74],TCC_EA0_ATOMIC_LEVEL[75],TCC_EA0_RDREQ[75],TCC_EA0_RDREQ_32B[75],TCC_EA0_RDREQ_LEVEL[75],TCC_EA0_ATOMIC_LEVEL[76],TCC_EA0_RDREQ[76],TCC_EA0_RDREQ_32B[76],TCC_EA0_RDREQ_LEVEL[76],TCC_EA0_ATOMIC_LEVEL[77],TCC_EA0_RDREQ[77],TCC_EA0_RDREQ_32B[77],TCC_EA0_RDREQ_LEVEL[77],TCC_EA0_ATOMIC_LEVEL[78],TCC_EA0_RDREQ[78],TCC_EA0_RDREQ_32B[78],TCC_EA0_RDREQ_LEVEL[78],TCC_EA0_ATOMIC_LEVEL[79],TCC_EA0_RDREQ[79],TCC_EA0_RDREQ_32B[79],TCC_EA0_RDREQ_LEVEL[79],TCC_EA0_ATOMIC_LEVEL[80],TCC_EA0_RDREQ[80],TCC_EA0_RDREQ_32B[80],TCC_EA0_RDREQ_LEVEL[80],TCC_EA0_ATOMIC_LEVEL[81],TCC_EA0_RDREQ[81],TCC_EA0_RDREQ_32B[81],TCC_EA0_RDREQ_LEVEL[81],TCC_EA0_ATOMIC_LEVEL[82],TCC_EA0_RDREQ[82],TCC_EA0_RDREQ_32B[82],TCC_EA0_RDREQ_LEVEL[82],TCC_EA0_ATOMIC_LEVEL[83],TCC_EA0_RDREQ[83],TCC_EA0_RDREQ_32B[83],TCC_EA0_RDREQ_LEVEL[83],TCC_EA0_ATOMIC_LEVEL[84],TCC_EA0_RDREQ[84],TCC_EA0_RDREQ_32B[84],TCC_EA0_RDREQ_LEVEL[84],TCC_EA0_ATOMIC_LEVEL[85],TCC_EA0_RDREQ[85],TCC_EA0_RDREQ_32B[85],TCC_EA0_RDREQ_LEVEL[85],TCC_EA0_ATOMIC_LEVEL[86],TCC_EA0_RDREQ[86],TCC_EA0_RDREQ_32B[86],TCC_EA0_RDREQ_LEVEL[86],TCC_EA0_ATOMIC_LEVEL[87],TCC_EA0_RDREQ[87],TCC_EA0_RDREQ_32B[87],TCC_EA0_RDREQ_LEVEL[87],TCC_EA0_ATOMIC_LEVEL[88],TCC_EA0_RDREQ[88],TCC_EA0_RDREQ_32B[88],TCC_EA0_RDREQ_LEVEL[88],TCC_EA0_ATOMIC_LEVEL[89],TCC_EA0_RDREQ[89],TCC_EA0_RDREQ_32B[89],TCC_EA0_RDREQ_LEVEL[89],TCC_EA0_ATOMIC_LEVEL[90],TCC_EA0_RDREQ[90],TCC_EA0_RDREQ_32B[90],TCC_EA0_RDREQ_LEVEL[90],TCC_EA0_ATOMIC_LEVEL[91],TCC_EA0_RDREQ[91],TCC_EA0_RDREQ_32B[91],TCC_EA0_RDREQ_LEVEL[91],TCC_EA0_ATOMIC_LEVEL[92],TCC_EA0_RDREQ[92],TCC_EA0_RDREQ_32B[92],TCC_EA0_RDREQ_LEVEL[92],TCC_EA0_ATOMIC_LEVEL[93],TCC_EA0_RDREQ[93],TCC_EA0_RDREQ_32B[93],TCC_EA0_RDREQ_LEVEL[93],TCC_EA0_ATOMIC_LEVEL[94],TCC_EA0_RDREQ[94],TCC_EA0_RDREQ_32B[94],TCC_EA0_RDREQ_LEVEL[94],TCC_EA0_ATOMIC_LEVEL[95],TCC_EA0_RDREQ[95],TCC_EA0_RDREQ_32B[95],TCC_EA0_RDREQ_LEVEL[95],Wave_Size_16,Correlation_ID_16,SQ_INSTS_VMEM,SQ_INSTS_SALU,SQ_INSTS_VSKIPPED,SQ_INSTS,SQ_INSTS_VALU,SQ_INSTS_VALU_ADD_F16,SQ_INSTS_VALU_MUL_F16,SQ_INSTS_VALU_FMA_F16,GRBM_SPI_BUSY,SPI_CSN_NUM_THREADGROUPS,SPI_CSN_WAVE,CPC_CPC_TCIU_BUSY,CPC_CPC_TCIU_IDLE,CPF_CPF_TCIU_BUSY,CPF_CPF_TCIU_STALL,TA_BUFFER_READ_WAVEFRONTS_sum,TA_BUFFER_WRITE_WAVEFRONTS_sum,TCC_CC_REQ_sum,TCC_NC_REQ_sum,TCC_RW_REQ_sum,TCC_UC_REQ_sum,TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum,TCP_READ_TAGCONFLICT_STALL_CYCLES_sum,TCP_TA_TCP_STATE_READ_sum,TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum,TD_LOAD_WAVEFRONT_sum,TD_SPI_STALL_sum,Wave_Size_17,Correlation_ID_17,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_BUSY_CU_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_INSTS_VALU_CVT,SQ_INSTS_VMEM_WR,SQ_INSTS_VMEM_RD,GRBM_COUNT,GRBM_GUI_ACTIVE,SPI_CSN_WINDOW_VALID,SPI_CSN_BUSY,CPC_CPC_STAT_BUSY,CPC_CPC_STAT_IDLE,CPF_CPF_STAT_BUSY,CPF_CPF_STAT_STALL,TA_BUFFER_WAVEFRONTS_sum,TA_TA_BUSY_sum,TCC_BUSY_sum,TCC_CYCLE_sum,TCC_PROBE_ALL_sum,TCC_PROBE_sum,TCP_GATE_EN1_sum,TCP_GATE_EN2_sum,TCP_TCR_TCP_STALL_CYCLES_sum,TCP_TD_TCP_STALL_CYCLES_sum,TD_TC_STALL_sum,TD_TD_BUSY_sum,Start_Timestamp,End_Timestamp
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diff --git a/tests/workloads/kernel_inv_str/MI300A_A1/sysinfo.csv b/tests/workloads/kernel_inv_str/MI300A_A1/sysinfo.csv
new file mode 100644
index 0000000000..f2a815bfd8
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300A_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+kernel_inv_str,./tests/vcopy -n 1048576 -b 256 -i 3,SQ|LDS|SQC|TA|TD|TCP|TCC|SPI|CPC|CPF,Wed 29 May 2024 01:38:51 PM  (CDT),2,sh5-1w300-rg3-3,AMD Instinct MI300A Accelerator,"American Megatrends International, LLC.RMO1002DS",Ubuntu 22.04.2 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,131174852,,6.1.2-110,N/A,SPX,NPS1,MI300A_A1,gfx942,32,24576,228,4,24,64,1024,32,2100,1300,2100,1300,96,32,120,4,5324.8,6
diff --git a/tests/workloads/kernel_inv_str/MI300A_A1/timestamps.csv b/tests/workloads/kernel_inv_str/MI300A_A1/timestamps.csv
new file mode 100644
index 0000000000..5d2775d82d
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300A_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,11995,1,148250,148250,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73809670135724,73809670143657,0
+3,11995,1,148250,148250,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73809670180713,73809670186922,0
+2,11995,1,148250,148250,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73809670159641,73809670165810,0
diff --git a/tests/workloads/kernel_inv_str/MI300X_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/kernel_inv_str/MI300X_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..1ae9757dde
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300X_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,60633,1,966465,966465,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716358149942842,716358149965481,0,460575.0,460575.0,16384.0,65536.0,37042.0,2974392.0
+1,60633,1,966465,966465,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716358149986201,716358149999519,0,382044.0,382044.0,16384.0,65536.0,13133.0,1048588.0
+2,60633,1,966465,966465,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716358150019039,716358150032398,0,354318.0,354318.0,16384.0,65536.0,13063.0,1048588.0
diff --git a/tests/workloads/kernel_inv_str/MI300X_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/kernel_inv_str/MI300X_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..4ec232d890
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300X_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,60633,1,966477,966477,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716358149942842,716358149965481,0,0.0,0.0,0.0
+1,60633,1,966477,966477,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716358149986201,716358149999519,0,0.0,0.0,0.0
+2,60633,1,966477,966477,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716358150019039,716358150032398,0,0.0,0.0,0.0
diff --git a/tests/workloads/kernel_inv_str/MI300X_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/kernel_inv_str/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..cb0ff96335
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,966489,966489,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716358149942842,716358149965481,0,65536.0,3974556.0,318000664.0
+1,60633,1,966489,966489,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716358149986201,716358149999519,0,65536.0,3908894.0,312668272.0
+2,60633,1,966489,966489,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716358150019039,716358150032398,0,65536.0,4002404.0,320185976.0
diff --git a/tests/workloads/kernel_inv_str/MI300X_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/kernel_inv_str/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..514ca86ede
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,966501,966501,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716358149942842,716358149965481,0,32768.0,510619.0,40839884.0
+1,60633,1,966501,966501,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716358149986201,716358149999519,0,32768.0,344221.0,27533380.0
+2,60633,1,966501,966501,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716358150019039,716358150032398,0,32768.0,357969.0,28627492.0
diff --git a/tests/workloads/kernel_inv_str/MI300X_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/kernel_inv_str/MI300X_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..7aaa3b4038
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300X_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,60633,1,966513,966513,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716358149942842,716358149965481,0,437486.0,437486.0,251929.0,1749944.0,16384.0,34244951.0,557859.0,0.0,137322740.0
+1,60633,1,966513,966513,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716358149986201,716358149999519,0,426205.0,426205.0,248848.0,1704820.0,16384.0,31414146.0,503347.0,0.0,126011616.0
+2,60633,1,966513,966513,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716358150019039,716358150032398,0,407155.0,407155.0,236728.0,1628620.0,16384.0,29131959.0,490935.0,0.0,116880064.0
diff --git a/tests/workloads/kernel_inv_str/MI300X_A1/log.txt b/tests/workloads/kernel_inv_str/MI300X_A1/log.txt
new file mode 100644
index 0000000000..7df6212b23
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300X_A1/log.txt
@@ -0,0 +1,210 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/kernel_inv_str/MI300X_A1
+Target: MI300X_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: ['vecPaste']
+Dispatch Selection: None
+Hardware Blocks: All
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH_LEVEL
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_REQ
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_13.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[1]
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_14.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[1]
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_15.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[3]
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_16.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[3]
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_17.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[1]
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F32
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_ANY
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_SCA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_MISC
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_WR
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_RD
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_THREAD_CYCLES_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ADDR_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_UNALIGNED_STALL
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ITEMS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_MEM_VIOLATIONS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ATOMIC_RETURN
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F32
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_BF16
+
+[profiling] Current input file: tests/workloads/kernel_inv_str/MI300X_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..81471d9699
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..62d58aac7b
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..e94af03dba
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..cebcd0ec74
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..69a540e9e1
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_0.txt b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..c866372df3
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD GRBM_COUNT GRBM_GUI_ACTIVE TCP_GATE_EN1_sum TCP_GATE_EN2_sum TCP_TD_TCP_STALL_CYCLES_sum TCP_TCR_TCP_STALL_CYCLES_sum TA_TA_BUSY_sum TA_BUFFER_WAVEFRONTS_sum TD_TD_BUSY_sum TD_TC_STALL_sum SPI_CSN_WINDOW_VALID SPI_CSN_BUSY CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE CPF_CPF_STAT_BUSY CPF_CPF_STAT_STALL TCC_CYCLE_sum TCC_BUSY_sum TCC_PROBE_sum TCC_PROBE_ALL_sum
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_1.txt b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..d05b8686c0
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 GRBM_SPI_BUSY TCP_READ_TAGCONFLICT_STALL_CYCLES_sum TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum TCP_TA_TCP_STATE_READ_sum TA_BUFFER_READ_WAVEFRONTS_sum TA_BUFFER_WRITE_WAVEFRONTS_sum TD_SPI_STALL_sum TD_LOAD_WAVEFRONT_sum SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE CPC_CPC_TCIU_BUSY CPC_CPC_TCIU_IDLE CPF_CPF_TCIU_BUSY CPF_CPF_TCIU_STALL TCC_NC_REQ_sum TCC_UC_REQ_sum TCC_CC_REQ_sum TCC_RW_REQ_sum
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_10.txt b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..2071a07ff8
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_11.txt b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..84998060dd
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_12.txt b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..374213dd45
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_13.txt b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_13.txt
new file mode 100644
index 0000000000..76fd7d2d39
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_13.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_ATOMIC[0] TCC_BUBBLE[0] TCC_CYCLE[0] TCC_EA0_ATOMIC[0] TCC_ATOMIC[1] TCC_BUBBLE[1] TCC_CYCLE[1] TCC_EA0_ATOMIC[1] TCC_ATOMIC[2] TCC_BUBBLE[2] TCC_CYCLE[2] TCC_EA0_ATOMIC[2] TCC_ATOMIC[3] TCC_BUBBLE[3] TCC_CYCLE[3] TCC_EA0_ATOMIC[3] TCC_ATOMIC[4] TCC_BUBBLE[4] TCC_CYCLE[4] TCC_EA0_ATOMIC[4] TCC_ATOMIC[5] TCC_BUBBLE[5] TCC_CYCLE[5] TCC_EA0_ATOMIC[5] TCC_ATOMIC[6] TCC_BUBBLE[6] TCC_CYCLE[6] TCC_EA0_ATOMIC[6] TCC_ATOMIC[7] TCC_BUBBLE[7] TCC_CYCLE[7] TCC_EA0_ATOMIC[7] TCC_ATOMIC[8] TCC_BUBBLE[8] TCC_CYCLE[8] TCC_EA0_ATOMIC[8] TCC_ATOMIC[9] TCC_BUBBLE[9] TCC_CYCLE[9] TCC_EA0_ATOMIC[9] TCC_ATOMIC[10] TCC_BUBBLE[10] TCC_CYCLE[10] TCC_EA0_ATOMIC[10] TCC_ATOMIC[11] TCC_BUBBLE[11] TCC_CYCLE[11] TCC_EA0_ATOMIC[11] TCC_ATOMIC[12] TCC_BUBBLE[12] TCC_CYCLE[12] TCC_EA0_ATOMIC[12] TCC_ATOMIC[13] TCC_BUBBLE[13] TCC_CYCLE[13] TCC_EA0_ATOMIC[13] TCC_ATOMIC[14] TCC_BUBBLE[14] TCC_CYCLE[14] TCC_EA0_ATOMIC[14] TCC_ATOMIC[15] TCC_BUBBLE[15] TCC_CYCLE[15] TCC_EA0_ATOMIC[15]
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_14.txt b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_14.txt
new file mode 100644
index 0000000000..cedbe9acc9
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_14.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_ATOMIC_LEVEL[0] TCC_EA0_RDREQ[0] TCC_EA0_RDREQ_32B[0] TCC_EA0_RDREQ_LEVEL[0] TCC_EA0_ATOMIC_LEVEL[1] TCC_EA0_RDREQ[1] TCC_EA0_RDREQ_32B[1] TCC_EA0_RDREQ_LEVEL[1] TCC_EA0_ATOMIC_LEVEL[2] TCC_EA0_RDREQ[2] TCC_EA0_RDREQ_32B[2] TCC_EA0_RDREQ_LEVEL[2] TCC_EA0_ATOMIC_LEVEL[3] TCC_EA0_RDREQ[3] TCC_EA0_RDREQ_32B[3] TCC_EA0_RDREQ_LEVEL[3] TCC_EA0_ATOMIC_LEVEL[4] TCC_EA0_RDREQ[4] TCC_EA0_RDREQ_32B[4] TCC_EA0_RDREQ_LEVEL[4] TCC_EA0_ATOMIC_LEVEL[5] TCC_EA0_RDREQ[5] TCC_EA0_RDREQ_32B[5] TCC_EA0_RDREQ_LEVEL[5] TCC_EA0_ATOMIC_LEVEL[6] TCC_EA0_RDREQ[6] TCC_EA0_RDREQ_32B[6] TCC_EA0_RDREQ_LEVEL[6] TCC_EA0_ATOMIC_LEVEL[7] TCC_EA0_RDREQ[7] TCC_EA0_RDREQ_32B[7] TCC_EA0_RDREQ_LEVEL[7] TCC_EA0_ATOMIC_LEVEL[8] TCC_EA0_RDREQ[8] TCC_EA0_RDREQ_32B[8] TCC_EA0_RDREQ_LEVEL[8] TCC_EA0_ATOMIC_LEVEL[9] TCC_EA0_RDREQ[9] TCC_EA0_RDREQ_32B[9] TCC_EA0_RDREQ_LEVEL[9] TCC_EA0_ATOMIC_LEVEL[10] TCC_EA0_RDREQ[10] TCC_EA0_RDREQ_32B[10] TCC_EA0_RDREQ_LEVEL[10] TCC_EA0_ATOMIC_LEVEL[11] TCC_EA0_RDREQ[11] TCC_EA0_RDREQ_32B[11] TCC_EA0_RDREQ_LEVEL[11] TCC_EA0_ATOMIC_LEVEL[12] TCC_EA0_RDREQ[12] TCC_EA0_RDREQ_32B[12] TCC_EA0_RDREQ_LEVEL[12] TCC_EA0_ATOMIC_LEVEL[13] TCC_EA0_RDREQ[13] TCC_EA0_RDREQ_32B[13] TCC_EA0_RDREQ_LEVEL[13] TCC_EA0_ATOMIC_LEVEL[14] TCC_EA0_RDREQ[14] TCC_EA0_RDREQ_32B[14] TCC_EA0_RDREQ_LEVEL[14] TCC_EA0_ATOMIC_LEVEL[15] TCC_EA0_RDREQ[15] TCC_EA0_RDREQ_32B[15] TCC_EA0_RDREQ_LEVEL[15]
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_15.txt b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_15.txt
new file mode 100644
index 0000000000..bf0cf998b4
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_15.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_WRREQ[0] TCC_EA0_WRREQ_64B[0] TCC_EA0_WRREQ_LEVEL[0] TCC_HIT[0] TCC_EA0_WRREQ[1] TCC_EA0_WRREQ_64B[1] TCC_EA0_WRREQ_LEVEL[1] TCC_HIT[1] TCC_EA0_WRREQ[2] TCC_EA0_WRREQ_64B[2] TCC_EA0_WRREQ_LEVEL[2] TCC_HIT[2] TCC_EA0_WRREQ[3] TCC_EA0_WRREQ_64B[3] TCC_EA0_WRREQ_LEVEL[3] TCC_HIT[3] TCC_EA0_WRREQ[4] TCC_EA0_WRREQ_64B[4] TCC_EA0_WRREQ_LEVEL[4] TCC_HIT[4] TCC_EA0_WRREQ[5] TCC_EA0_WRREQ_64B[5] TCC_EA0_WRREQ_LEVEL[5] TCC_HIT[5] TCC_EA0_WRREQ[6] TCC_EA0_WRREQ_64B[6] TCC_EA0_WRREQ_LEVEL[6] TCC_HIT[6] TCC_EA0_WRREQ[7] TCC_EA0_WRREQ_64B[7] TCC_EA0_WRREQ_LEVEL[7] TCC_HIT[7] TCC_EA0_WRREQ[8] TCC_EA0_WRREQ_64B[8] TCC_EA0_WRREQ_LEVEL[8] TCC_HIT[8] TCC_EA0_WRREQ[9] TCC_EA0_WRREQ_64B[9] TCC_EA0_WRREQ_LEVEL[9] TCC_HIT[9] TCC_EA0_WRREQ[10] TCC_EA0_WRREQ_64B[10] TCC_EA0_WRREQ_LEVEL[10] TCC_HIT[10] TCC_EA0_WRREQ[11] TCC_EA0_WRREQ_64B[11] TCC_EA0_WRREQ_LEVEL[11] TCC_HIT[11] TCC_EA0_WRREQ[12] TCC_EA0_WRREQ_64B[12] TCC_EA0_WRREQ_LEVEL[12] TCC_HIT[12] TCC_EA0_WRREQ[13] TCC_EA0_WRREQ_64B[13] TCC_EA0_WRREQ_LEVEL[13] TCC_HIT[13] TCC_EA0_WRREQ[14] TCC_EA0_WRREQ_64B[14] TCC_EA0_WRREQ_LEVEL[14] TCC_HIT[14] TCC_EA0_WRREQ[15] TCC_EA0_WRREQ_64B[15] TCC_EA0_WRREQ_LEVEL[15] TCC_HIT[15]
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_16.txt b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_16.txt
new file mode 100644
index 0000000000..201b1eae2f
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_16.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_MISS[0] TCC_READ[0] TCC_REQ[0] TCC_RW_REQ[0] TCC_MISS[1] TCC_READ[1] TCC_REQ[1] TCC_RW_REQ[1] TCC_MISS[2] TCC_READ[2] TCC_REQ[2] TCC_RW_REQ[2] TCC_MISS[3] TCC_READ[3] TCC_REQ[3] TCC_RW_REQ[3] TCC_MISS[4] TCC_READ[4] TCC_REQ[4] TCC_RW_REQ[4] TCC_MISS[5] TCC_READ[5] TCC_REQ[5] TCC_RW_REQ[5] TCC_MISS[6] TCC_READ[6] TCC_REQ[6] TCC_RW_REQ[6] TCC_MISS[7] TCC_READ[7] TCC_REQ[7] TCC_RW_REQ[7] TCC_MISS[8] TCC_READ[8] TCC_REQ[8] TCC_RW_REQ[8] TCC_MISS[9] TCC_READ[9] TCC_REQ[9] TCC_RW_REQ[9] TCC_MISS[10] TCC_READ[10] TCC_REQ[10] TCC_RW_REQ[10] TCC_MISS[11] TCC_READ[11] TCC_REQ[11] TCC_RW_REQ[11] TCC_MISS[12] TCC_READ[12] TCC_REQ[12] TCC_RW_REQ[12] TCC_MISS[13] TCC_READ[13] TCC_REQ[13] TCC_RW_REQ[13] TCC_MISS[14] TCC_READ[14] TCC_REQ[14] TCC_RW_REQ[14] TCC_MISS[15] TCC_READ[15] TCC_REQ[15] TCC_RW_REQ[15]
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_17.txt b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_17.txt
new file mode 100644
index 0000000000..7426c204e7
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_17.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_TAG_STALL[0] TCC_TOO_MANY_EA_WRREQS_STALL[0] TCC_WRITE[0] TCC_TAG_STALL[1] TCC_TOO_MANY_EA_WRREQS_STALL[1] TCC_WRITE[1] TCC_TAG_STALL[2] TCC_TOO_MANY_EA_WRREQS_STALL[2] TCC_WRITE[2] TCC_TAG_STALL[3] TCC_TOO_MANY_EA_WRREQS_STALL[3] TCC_WRITE[3] TCC_TAG_STALL[4] TCC_TOO_MANY_EA_WRREQS_STALL[4] TCC_WRITE[4] TCC_TAG_STALL[5] TCC_TOO_MANY_EA_WRREQS_STALL[5] TCC_WRITE[5] TCC_TAG_STALL[6] TCC_TOO_MANY_EA_WRREQS_STALL[6] TCC_WRITE[6] TCC_TAG_STALL[7] TCC_TOO_MANY_EA_WRREQS_STALL[7] TCC_WRITE[7] TCC_TAG_STALL[8] TCC_TOO_MANY_EA_WRREQS_STALL[8] TCC_WRITE[8] TCC_TAG_STALL[9] TCC_TOO_MANY_EA_WRREQS_STALL[9] TCC_WRITE[9] TCC_TAG_STALL[10] TCC_TOO_MANY_EA_WRREQS_STALL[10] TCC_WRITE[10] TCC_TAG_STALL[11] TCC_TOO_MANY_EA_WRREQS_STALL[11] TCC_WRITE[11] TCC_TAG_STALL[12] TCC_TOO_MANY_EA_WRREQS_STALL[12] TCC_WRITE[12] TCC_TAG_STALL[13] TCC_TOO_MANY_EA_WRREQS_STALL[13] TCC_WRITE[13] TCC_TAG_STALL[14] TCC_TOO_MANY_EA_WRREQS_STALL[14] TCC_WRITE[14] TCC_TAG_STALL[15] TCC_TOO_MANY_EA_WRREQS_STALL[15] TCC_WRITE[15]
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_2.txt b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..c28677a105
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 TCP_VOLATILE_sum TCP_TOTAL_ACCESSES_sum TCP_TOTAL_READ_sum TCP_TOTAL_WRITE_sum TA_BUFFER_ATOMIC_WAVEFRONTS_sum TA_BUFFER_TOTAL_CYCLES_sum TD_ATOMIC_WAVEFRONT_sum TD_STORE_WAVEFRONT_sum SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION CPF_CPF_STAT_IDLE CPF_CPF_TCIU_IDLE TCC_REQ_sum TCC_STREAMING_REQ_sum TCC_HIT_sum TCC_MISS_sum
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_3.txt b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..e584b4dc96
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS TCP_TOTAL_ATOMIC_WITH_RET_sum TCP_TOTAL_ATOMIC_WITHOUT_RET_sum TCP_TOTAL_WRITEBACK_INVALIDATES_sum TCP_TOTAL_CACHE_ACCESSES_sum TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES_sum TD_COALESCABLE_WAVEFRONT_sum SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE CPF_CMP_UTCL1_STALL_ON_TRANSLATION TCC_READ_sum TCC_WRITE_sum TCC_ATOMIC_sum TCC_WRITEBACK_sum
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_4.txt b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..b1fe929ae6
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAIT_ANY SQ_WAIT_INST_ANY SQ_ACTIVE_INST_ANY SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU TCP_UTCL1_TRANSLATION_MISS_sum TCP_UTCL1_TRANSLATION_HIT_sum TCP_UTCL1_PERMISSION_MISS_sum TCP_UTCL1_REQUEST_sum TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_TOTAL_WAVEFRONTS_sum SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE TCC_EA0_WRREQ_sum TCC_EA0_WRREQ_64B_sum TCC_EA0_WR_UNCACHED_32B_sum TCC_EA0_WRREQ_DRAM_sum
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_5.txt b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..bbeac5e72c
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_SCA SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU TCP_TCC_READ_REQ_sum TCP_TCC_WRITE_REQ_sum TCP_TCC_ATOMIC_WITH_RET_REQ_sum TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN CPC_ME1_DC0_SPI_BUSY TCC_EA0_RDREQ_sum TCC_EA0_RDREQ_32B_sum TCC_BUBBLE_sum TCC_EA0_RD_UNCACHED_32B_sum
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_6.txt b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..a129ce3ac3
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_THREAD_CYCLES_VALU SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 TCP_TCC_NC_READ_REQ_sum TCP_TCC_NC_WRITE_REQ_sum TCP_TCC_NC_ATOMIC_REQ_sum TCP_TCC_UC_READ_REQ_sum TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN TCC_EA0_RDREQ_DRAM_sum TCC_TAG_STALL_sum TCC_NORMAL_WRITEBACK_sum TCC_ALL_TC_OP_WB_WRITEBACK_sum
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_7.txt b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..047e9b4b3c
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED TCP_TCC_UC_WRITE_REQ_sum TCP_TCC_UC_ATOMIC_REQ_sum TCP_TCC_CC_READ_REQ_sum TCP_TCC_CC_WRITE_REQ_sum TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR TCC_NORMAL_EVICT_sum TCC_ALL_TC_OP_INV_EVICT_sum TCC_TOO_MANY_EA_WRREQS_STALL_sum TCC_EA0_ATOMIC_sum
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_8.txt b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..391978f6eb
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES TCP_TCC_CC_ATOMIC_REQ_sum TCP_TCC_RW_READ_REQ_sum TCP_TCC_RW_WRITE_REQ_sum TCP_TCC_RW_ATOMIC_REQ_sum SPI_VWC_CSC_WR SPI_RA_BULKY_CU_FULL_CSN TCC_EA0_RDREQ_LEVEL_sum TCC_EA0_WRREQ_LEVEL_sum TCC_EA0_ATOMIC_LEVEL_sum TCC_EA0_WRREQ_STALL_sum
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_9.txt b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..4f516b1c2e
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ TCP_PENDING_STALL_CYCLES_sum
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/timestamps.txt b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..be80a68d72
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300X_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel: vecPaste
diff --git a/tests/workloads/kernel_inv_str/MI300X_A1/pmc_perf.csv b/tests/workloads/kernel_inv_str/MI300X_A1/pmc_perf.csv
new file mode 100644
index 0000000000..b778595d4f
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300X_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_1,Correlation_ID_1,XCC_Index,TCC_ATOMIC[0],TCC_BUBBLE[0],TCC_CYCLE[0],TCC_EA0_ATOMIC[0],TCC_ATOMIC[1],TCC_BUBBLE[1],TCC_CYCLE[1],TCC_EA0_ATOMIC[1],TCC_ATOMIC[2],TCC_BUBBLE[2],TCC_CYCLE[2],TCC_EA0_ATOMIC[2],TCC_ATOMIC[3],TCC_BUBBLE[3],TCC_CYCLE[3],TCC_EA0_ATOMIC[3],TCC_ATOMIC[4],TCC_BUBBLE[4],TCC_CYCLE[4],TCC_EA0_ATOMIC[4],TCC_ATOMIC[5],TCC_BUBBLE[5],TCC_CYCLE[5],TCC_EA0_ATOMIC[5],TCC_ATOMIC[6],TCC_BUBBLE[6],TCC_CYCLE[6],TCC_EA0_ATOMIC[6],TCC_ATOMIC[7],TCC_BUBBLE[7],TCC_CYCLE[7],TCC_EA0_ATOMIC[7],TCC_ATOMIC[8],TCC_BUBBLE[8],TCC_CYCLE[8],TCC_EA0_ATOMIC[8],TCC_ATOMIC[9],TCC_BUBBLE[9],TCC_CYCLE[9],TCC_EA0_ATOMIC[9],TCC_ATOMIC[10],TCC_BUBBLE[10],TCC_CYCLE[10],TCC_EA0_ATOMIC[10],TCC_ATOMIC[11],TCC_BUBBLE[11],TCC_CYCLE[11],TCC_EA0_ATOMIC[11],TCC_ATOMIC[12],TCC_BUBBLE[12],TCC_CYCLE[12],TCC_EA0_ATOMIC[12],TCC_ATOMIC[13],TCC_BUBBLE[13],TCC_CYCLE[13],TCC_EA0_ATOMIC[13],TCC_ATOMIC[14],TCC_BUBBLE[14],TCC_CYCLE[14],TCC_EA0_ATOMIC[14],TCC_ATOMIC[15],TCC_BUBBLE[15],TCC_CYCLE[15],TCC_EA0_ATOMIC[15],TCC_ATOMIC[16],TCC_BUBBLE[16],TCC_CYCLE[16],TCC_EA0_ATOMIC[16],TCC_ATOMIC[17],TCC_BUBBLE[17],TCC_CYCLE[17],TCC_EA0_ATOMIC[17],TCC_ATOMIC[18],TCC_BUBBLE[18],TCC_CYCLE[18],TCC_EA0_ATOMIC[18],TCC_ATOMIC[19],TCC_BUBBLE[19],TCC_CYCLE[19],TCC_EA0_ATOMIC[19],TCC_ATOMIC[20],TCC_BUBBLE[20],TCC_CYCLE[20],TCC_EA0_ATOMIC[20],TCC_ATOMIC[21],TCC_BUBBLE[21],TCC_CYCLE[21],TCC_EA0_ATOMIC[21],TCC_ATOMIC[22],TCC_BUBBLE[22],TCC_CYCLE[22],TCC_EA0_ATOMIC[22],TCC_ATOMIC[23],TCC_BUBBLE[23],TCC_CYCLE[23],TCC_EA0_ATOMIC[23],TCC_ATOMIC[24],TCC_BUBBLE[24],TCC_CYCLE[24],TCC_EA0_ATOMIC[24],TCC_ATOMIC[25],TCC_BUBBLE[25],TCC_CYCLE[25],TCC_EA0_ATOMIC[25],TCC_ATOMIC[26],TCC_BUBBLE[26],TCC_CYCLE[26],TCC_EA0_ATOMIC[26],TCC_ATOMIC[27],TCC_BUBBLE[27],TCC_CYCLE[27],TCC_EA0_ATOMIC[27],TCC_ATOMIC[28],TCC_BUBBLE[28],TCC_CYCLE[28],TCC_EA0_ATOMIC[28],TCC_ATOMIC[29],TCC_BUBBLE[29],TCC_CYCLE[29],TCC_EA0_ATOMIC[29],TCC_ATOMIC[30],TCC_BUBBLE[30],TCC_CYCLE[30],TCC_EA0_ATOMIC[30],TCC_ATOMIC[31],TCC_BUBBLE[31],TCC_CYCLE[31],TCC_EA0_ATOMIC[31],TCC_ATOMIC[32],TCC_BUBBLE[32],TCC_CYCLE[32],TCC_EA0_ATOMIC[32],TCC_ATOMIC[33],TCC_BUBBLE[33],TCC_CYCLE[33],TCC_EA0_ATOMIC[33],TCC_ATOMIC[34],TCC_BUBBLE[34],TCC_CYCLE[34],TCC_EA0_ATOMIC[34],TCC_ATOMIC[35],TCC_BUBBLE[35],TCC_CYCLE[35],TCC_EA0_ATOMIC[35],TCC_ATOMIC[36],TCC_BUBBLE[36],TCC_CYCLE[36],TCC_EA0_ATOMIC[36],TCC_ATOMIC[37],TCC_BUBBLE[37],TCC_CYCLE[37],TCC_EA0_ATOMIC[37],TCC_ATOMIC[38],TCC_BUBBLE[38],TCC_CYCLE[38],TCC_EA0_ATOMIC[38],TCC_ATOMIC[39],TCC_BUBBLE[39],TCC_CYCLE[39],TCC_EA0_ATOMIC[39],TCC_ATOMIC[40],TCC_BUBBLE[40],TCC_CYCLE[40],TCC_EA0_ATOMIC[40],TCC_ATOMIC[41],TCC_BUBBLE[41],TCC_CYCLE[41],TCC_EA0_ATOMIC[41],TCC_ATOMIC[42],TCC_BUBBLE[42],TCC_CYCLE[42],TCC_EA0_ATOMIC[42],TCC_ATOMIC[43],TCC_BUBBLE[43],TCC_CYCLE[43],TCC_EA0_ATOMIC[43],TCC_ATOMIC[44],TCC_BUBBLE[44],TCC_CYCLE[44],TCC_EA0_ATOMIC[44],TCC_ATOMIC[45],TCC_BUBBLE[45],TCC_CYCLE[45],TCC_EA0_ATOMIC[45],TCC_ATOMIC[46],TCC_BUBBLE[46],TCC_CYCLE[46],TCC_EA0_ATOMIC[46],TCC_ATOMIC[47],TCC_BUBBLE[47],TCC_CYCLE[47],TCC_EA0_ATOMIC[47],TCC_ATOMIC[48],TCC_BUBBLE[48],TCC_CYCLE[48],TCC_EA0_ATOMIC[48],TCC_ATOMIC[49],TCC_BUBBLE[49],TCC_CYCLE[49],TCC_EA0_ATOMIC[49],TCC_ATOMIC[50],TCC_BUBBLE[50],TCC_CYCLE[50],TCC_EA0_ATOMIC[50],TCC_ATOMIC[51],TCC_BUBBLE[51],TCC_CYCLE[51],TCC_EA0_ATOMIC[51],TCC_ATOMIC[52],TCC_BUBBLE[52],TCC_CYCLE[52],TCC_EA0_ATOMIC[52],TCC_ATOMIC[53],TCC_BUBBLE[53],TCC_CYCLE[53],TCC_EA0_ATOMIC[53],TCC_ATOMIC[54],TCC_BUBBLE[54],TCC_CYCLE[54],TCC_EA0_ATOMIC[54],TCC_ATOMIC[55],TCC_BUBBLE[55],TCC_CYCLE[55],TCC_EA0_ATOMIC[55],TCC_ATOMIC[56],TCC_BUBBLE[56],TCC_CYCLE[56],TCC_EA0_ATOMIC[56],TCC_ATOMIC[57],TCC_BUBBLE[57],TCC_CYCLE[57],TCC_EA0_ATOMIC[57],TCC_ATOMIC[58],TCC_BUBBLE[58],TCC_CYCLE[58],TCC_EA0_ATOMIC[58],TCC_ATOMIC[59],TCC_BUBBLE[59],TCC_CYCLE[59],TCC_EA0_ATOMIC[59],TCC_ATOMIC[60],TCC_BUBBLE[60],TCC_CYCLE[60],TCC_EA0_ATOMIC[60],TCC_ATOMIC[61],TCC_BUBBLE[61],TCC_CYCLE[61],TCC_EA0_ATOMIC[61],TCC_ATOMIC[62],TCC_BUBBLE[62],TCC_CYCLE[62],TCC_EA0_ATOMIC[62],TCC_ATOMIC[63],TCC_BUBBLE[63],TCC_CYCLE[63],TCC_EA0_ATOMIC[63],TCC_ATOMIC[64],TCC_BUBBLE[64],TCC_CYCLE[64],TCC_EA0_ATOMIC[64],TCC_ATOMIC[65],TCC_BUBBLE[65],TCC_CYCLE[65],TCC_EA0_ATOMIC[65],TCC_ATOMIC[66],TCC_BUBBLE[66],TCC_CYCLE[66],TCC_EA0_ATOMIC[66],TCC_ATOMIC[67],TCC_BUBBLE[67],TCC_CYCLE[67],TCC_EA0_ATOMIC[67],TCC_ATOMIC[68],TCC_BUBBLE[68],TCC_CYCLE[68],TCC_EA0_ATOMIC[68],TCC_ATOMIC[69],TCC_BUBBLE[69],TCC_CYCLE[69],TCC_EA0_ATOMIC[69],TCC_ATOMIC[70],TCC_BUBBLE[70],TCC_CYCLE[70],TCC_EA0_ATOMIC[70],TCC_ATOMIC[71],TCC_BUBBLE[71],TCC_CYCLE[71],TCC_EA0_ATOMIC[71],TCC_ATOMIC[72],TCC_BUBBLE[72],TCC_CYCLE[72],TCC_EA0_ATOMIC[72],TCC_ATOMIC[73],TCC_BUBBLE[73],TCC_CYCLE[73],TCC_EA0_ATOMIC[73],TCC_ATOMIC[74],TCC_BUBBLE[74],TCC_CYCLE[74],TCC_EA0_ATOMIC[74],TCC_ATOMIC[75],TCC_BUBBLE[75],TCC_CYCLE[75],TCC_EA0_ATOMIC[75],TCC_ATOMIC[76],TCC_BUBBLE[76],TCC_CYCLE[76],TCC_EA0_ATOMIC[76],TCC_ATOMIC[77],TCC_BUBBLE[77],TCC_CYCLE[77],TCC_EA0_ATOMIC[77],TCC_ATOMIC[78],TCC_BUBBLE[78],TCC_CYCLE[78],TCC_EA0_ATOMIC[78],TCC_ATOMIC[79],TCC_BUBBLE[79],TCC_CYCLE[79],TCC_EA0_ATOMIC[79],TCC_ATOMIC[80],TCC_BUBBLE[80],TCC_CYCLE[80],TCC_EA0_ATOMIC[80],TCC_ATOMIC[81],TCC_BUBBLE[81],TCC_CYCLE[81],TCC_EA0_ATOMIC[81],TCC_ATOMIC[82],TCC_BUBBLE[82],TCC_CYCLE[82],TCC_EA0_ATOMIC[82],TCC_ATOMIC[83],TCC_BUBBLE[83],TCC_CYCLE[83],TCC_EA0_ATOMIC[83],TCC_ATOMIC[84],TCC_BUBBLE[84],TCC_CYCLE[84],TCC_EA0_ATOMIC[84],TCC_ATOMIC[85],TCC_BUBBLE[85],TCC_CYCLE[85],TCC_EA0_ATOMIC[85],TCC_ATOMIC[86],TCC_BUBBLE[86],TCC_CYCLE[86],TCC_EA0_ATOMIC[86],TCC_ATOMIC[87],TCC_BUBBLE[87],TCC_CYCLE[87],TCC_EA0_ATOMIC[87],TCC_ATOMIC[88],TCC_BUBBLE[88],TCC_CYCLE[88],TCC_EA0_ATOMIC[88],TCC_ATOMIC[89],TCC_BUBBLE[89],TCC_CYCLE[89],TCC_EA0_ATOMIC[89],TCC_ATOMIC[90],TCC_BUBBLE[90],TCC_CYCLE[90],TCC_EA0_ATOMIC[90],TCC_ATOMIC[91],TCC_BUBBLE[91],TCC_CYCLE[91],TCC_EA0_ATOMIC[91],TCC_ATOMIC[92],TCC_BUBBLE[92],TCC_CYCLE[92],TCC_EA0_ATOMIC[92],TCC_ATOMIC[93],TCC_BUBBLE[93],TCC_CYCLE[93],TCC_EA0_ATOMIC[93],TCC_ATOMIC[94],TCC_BUBBLE[94],TCC_CYCLE[94],TCC_EA0_ATOMIC[94],TCC_ATOMIC[95],TCC_BUBBLE[95],TCC_CYCLE[95],TCC_EA0_ATOMIC[95],TCC_ATOMIC[96],TCC_BUBBLE[96],TCC_CYCLE[96],TCC_EA0_ATOMIC[96],TCC_ATOMIC[97],TCC_BUBBLE[97],TCC_CYCLE[97],TCC_EA0_ATOMIC[97],TCC_ATOMIC[98],TCC_BUBBLE[98],TCC_CYCLE[98],TCC_EA0_ATOMIC[98],TCC_ATOMIC[99],TCC_BUBBLE[99],TCC_CYCLE[99],TCC_EA0_ATOMIC[99],TCC_ATOMIC[100],TCC_BUBBLE[100],TCC_CYCLE[100],TCC_EA0_ATOMIC[100],TCC_ATOMIC[101],TCC_BUBBLE[101],TCC_CYCLE[101],TCC_EA0_ATOMIC[101],TCC_ATOMIC[102],TCC_BUBBLE[102],TCC_CYCLE[102],TCC_EA0_ATOMIC[102],TCC_ATOMIC[103],TCC_BUBBLE[103],TCC_CYCLE[103],TCC_EA0_ATOMIC[103],TCC_ATOMIC[104],TCC_BUBBLE[104],TCC_CYCLE[104],TCC_EA0_ATOMIC[104],TCC_ATOMIC[105],TCC_BUBBLE[105],TCC_CYCLE[105],TCC_EA0_ATOMIC[105],TCC_ATOMIC[106],TCC_BUBBLE[106],TCC_CYCLE[106],TCC_EA0_ATOMIC[106],TCC_ATOMIC[107],TCC_BUBBLE[107],TCC_CYCLE[107],TCC_EA0_ATOMIC[107],TCC_ATOMIC[108],TCC_BUBBLE[108],TCC_CYCLE[108],TCC_EA0_ATOMIC[108],TCC_ATOMIC[109],TCC_BUBBLE[109],TCC_CYCLE[109],TCC_EA0_ATOMIC[109],TCC_ATOMIC[110],TCC_BUBBLE[110],TCC_CYCLE[110],TCC_EA0_ATOMIC[110],TCC_ATOMIC[111],TCC_BUBBLE[111],TCC_CYCLE[111],TCC_EA0_ATOMIC[111],TCC_ATOMIC[112],TCC_BUBBLE[112],TCC_CYCLE[112],TCC_EA0_ATOMIC[112],TCC_ATOMIC[113],TCC_BUBBLE[113],TCC_CYCLE[113],TCC_EA0_ATOMIC[113],TCC_ATOMIC[114],TCC_BUBBLE[114],TCC_CYCLE[114],TCC_EA0_ATOMIC[114],TCC_ATOMIC[115],TCC_BUBBLE[115],TCC_CYCLE[115],TCC_EA0_ATOMIC[115],TCC_ATOMIC[116],TCC_BUBBLE[116],TCC_CYCLE[116],TCC_EA0_ATOMIC[116],TCC_ATOMIC[117],TCC_BUBBLE[117],TCC_CYCLE[117],TCC_EA0_ATOMIC[117],TCC_ATOMIC[118],TCC_BUBBLE[118],TCC_CYCLE[118],TCC_EA0_ATOMIC[118],TCC_ATOMIC[119],TCC_BUBBLE[119],TCC_CYCLE[119],TCC_EA0_ATOMIC[119],TCC_ATOMIC[120],TCC_BUBBLE[120],TCC_CYCLE[120],TCC_EA0_ATOMIC[120],TCC_ATOMIC[121],TCC_BUBBLE[121],TCC_CYCLE[121],TCC_EA0_ATOMIC[121],TCC_ATOMIC[122],TCC_BUBBLE[122],TCC_CYCLE[122],TCC_EA0_ATOMIC[122],TCC_ATOMIC[123],TCC_BUBBLE[123],TCC_CYCLE[123],TCC_EA0_ATOMIC[123],TCC_ATOMIC[124],TCC_BUBBLE[124],TCC_CYCLE[124],TCC_EA0_ATOMIC[124],TCC_ATOMIC[125],TCC_BUBBLE[125],TCC_CYCLE[125],TCC_EA0_ATOMIC[125],TCC_ATOMIC[126],TCC_BUBBLE[126],TCC_CYCLE[126],TCC_EA0_ATOMIC[126],TCC_ATOMIC[127],TCC_BUBBLE[127],TCC_CYCLE[127],TCC_EA0_ATOMIC[127],Wave_Size_2,Correlation_ID_2,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,TA_FLAT_ATOMIC_WAVEFRONTS_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,TCC_ALL_TC_OP_INV_EVICT_sum,TCC_EA0_ATOMIC_sum,TCC_NORMAL_EVICT_sum,TCC_TOO_MANY_EA_WRREQS_STALL_sum,TCP_TCC_CC_READ_REQ_sum,TCP_TCC_CC_WRITE_REQ_sum,TCP_TCC_UC_ATOMIC_REQ_sum,TCP_TCC_UC_WRITE_REQ_sum,Wave_Size_3,Correlation_ID_3,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,TCC_EA0_ATOMIC_LEVEL_sum,TCC_EA0_RDREQ_LEVEL_sum,TCC_EA0_WRREQ_LEVEL_sum,TCC_EA0_WRREQ_STALL_sum,TCP_TCC_CC_ATOMIC_REQ_sum,TCP_TCC_RW_ATOMIC_REQ_sum,TCP_TCC_RW_READ_REQ_sum,TCP_TCC_RW_WRITE_REQ_sum,Wave_Size_4,Correlation_ID_4,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SPI_RA_REQ_NO_ALLOC,SPI_RA_REQ_NO_ALLOC_CSN,CPC_CPC_STAT_STALL,CPC_UTCL1_STALL_ON_TRANSLATION,CPF_CPF_STAT_IDLE,CPF_CPF_TCIU_IDLE,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,TA_BUFFER_TOTAL_CYCLES_sum,TCC_HIT_sum,TCC_MISS_sum,TCC_REQ_sum,TCC_STREAMING_REQ_sum,TCP_TOTAL_ACCESSES_sum,TCP_TOTAL_READ_sum,TCP_TOTAL_WRITE_sum,TCP_VOLATILE_sum,TD_ATOMIC_WAVEFRONT_sum,TD_STORE_WAVEFRONT_sum,Wave_Size_5,Correlation_ID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SQ_INST_CYCLES_SALU,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,CPC_ME1_DC0_SPI_BUSY,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,TCC_BUBBLE_sum,TCC_EA0_RDREQ_32B_sum,TCC_EA0_RDREQ_sum,TCC_EA0_RD_UNCACHED_32B_sum,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,TCP_TCC_READ_REQ_sum,TCP_TCC_WRITE_REQ_sum,Start_Timestamp,End_Timestamp
+0,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) 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diff --git a/tests/workloads/kernel_inv_str/MI300X_A1/sysinfo.csv b/tests/workloads/kernel_inv_str/MI300X_A1/sysinfo.csv
new file mode 100644
index 0000000000..5a67519e08
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300X_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+kernel_inv_str,./tests/vcopy -n 1048576 -b 256 -i 3,SQ|LDS|SQC|TA|TD|TCP|TCC|SPI|CPC|CPF,Wed 29 May 2024 12:02:47 PM  (CDT),2,splinter-126-wr-c6,AMD Ryzen 9 7950X 16-Core Processor,"American Megatrends International, LLC.VS2683299N.FD",Ubuntu 22.04.4 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,114656528,,6.2.0-13611,113-MI3SRIOV-001,SPX,NPS1,MI300X_A1,gfx942,32,4096,304,4,32,64,1024,32,2100,1300,2100,1300,128,32,160,4,5324.8,8
diff --git a/tests/workloads/kernel_inv_str/MI300X_A1/timestamps.csv b/tests/workloads/kernel_inv_str/MI300X_A1/timestamps.csv
new file mode 100644
index 0000000000..db0bab0bad
--- /dev/null
+++ b/tests/workloads/kernel_inv_str/MI300X_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,60633,1,966758,966758,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716358149942842,716358149965481,0
+2,60633,1,966758,966758,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716358149986201,716358149999519,0
+3,60633,1,966758,966758,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716358150019039,716358150032398,0
diff --git a/tests/workloads/kernel_substr/MI300A_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/kernel_substr/MI300A_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..7eb389c934
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300A_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,11995,1,145295,145295,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73578152516542,73578152524434,0,206478.0,206478.0,16384.0,65536.0,27426.0,2197528.0
+1,11995,1,145295,145295,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73578152563173,73578152568942,0,189728.0,189728.0,16384.0,65536.0,13109.0,1048768.0
+2,11995,1,145295,145295,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73578152541099,73578152547068,0,166335.0,166335.0,16384.0,65536.0,13122.0,1049488.0
diff --git a/tests/workloads/kernel_substr/MI300A_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/kernel_substr/MI300A_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..6e1b8ad369
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300A_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,11995,1,145307,145307,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73578152516542,73578152524434,0,0.0,0.0,0.0
+1,11995,1,145307,145307,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73578152563173,73578152568942,0,0.0,0.0,0.0
+2,11995,1,145307,145307,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73578152541099,73578152547068,0,0.0,0.0,0.0
diff --git a/tests/workloads/kernel_substr/MI300A_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/kernel_substr/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..312372367c
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,145319,145319,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73578152516542,73578152524434,0,65536.0,286850.0,23022216.0
+1,11995,1,145319,145319,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73578152563173,73578152568942,0,65536.0,284112.0,22724824.0
+2,11995,1,145319,145319,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73578152541099,73578152547068,0,65536.0,193332.0,15480240.0
diff --git a/tests/workloads/kernel_substr/MI300A_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/kernel_substr/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..4d9734b663
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,145331,145331,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73578152516542,73578152524434,0,32768.0,521655.0,41735128.0
+1,11995,1,145331,145331,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73578152563173,73578152568942,0,32768.0,411382.0,32908148.0
+2,11995,1,145331,145331,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73578152541099,73578152547068,0,32768.0,407969.0,32636212.0
diff --git a/tests/workloads/kernel_substr/MI300A_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/kernel_substr/MI300A_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..c50c475037
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300A_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,11995,1,145343,145343,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73578152516542,73578152524434,0,216770.0,216770.0,124638.0,867080.0,16384.0,13528873.0,247296.0,0.0,54536480.0
+1,11995,1,145343,145343,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73578152563173,73578152568942,0,192345.0,192345.0,108619.0,769380.0,16384.0,10930963.0,202980.0,0.0,44128348.0
+2,11995,1,145343,145343,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73578152541099,73578152547068,0,176247.0,176247.0,95064.0,704988.0,16384.0,10384019.0,198974.0,0.0,41996144.0
diff --git a/tests/workloads/kernel_substr/MI300A_A1/log.txt b/tests/workloads/kernel_substr/MI300A_A1/log.txt
new file mode 100644
index 0000000000..c66336f537
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300A_A1/log.txt
@@ -0,0 +1,329 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/kernel_substr/MI300A_A1
+Target: MI300A_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: ['vecCopy']
+Dispatch Selection: None
+Hardware Blocks: All
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH_LEVEL
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying the output vector from the GPU to the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Releasing GPU memory
+   |-> [/opt/rocm/bin/rocprofv2] Releasing CPU memory
+   |-> [/opt/rocm/bin/rocprofv2] Results File: "tests/workloads/kernel_substr/MI300A_A1/out/pmc_1/results_SQ_INST_LEVEL_VMEM.csv"
+   |-> [/opt/rocm/bin/rocprofv2] 
+   |-> [/opt/rocm/bin/rocprofv2] The output path for the following counters: tests/workloads/kernel_substr/MI300A_A1/out/pmc_1
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_CVT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_WR
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F16
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_13.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[1]
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_14.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[3]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[3]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[3]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[3]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[4]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[4]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[4]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[4]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[5]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[5]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[5]
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_15.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[1]
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_16.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[3]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[3]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[3]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[3]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[4]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[4]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[4]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[4]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[5]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[5]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[5]
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_17.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[0]
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F64
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_VOLATILE_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TOTAL_ACCESSES_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TOTAL_READ_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TOTAL_WRITE_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TA_BUFFER_ATOMIC_WAVEFRONTS_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TA_BUFFER_TOTAL_CYCLES_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TD_ATOMIC_WAVEFRONT_sum
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TOTAL_ATOMIC_WITH_RET_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TOTAL_ATOMIC_WITHOUT_RET_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TOTAL_WRITEBACK_INVALIDATES_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TOTAL_CACHE_ACCESSES_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TA_BUFFER_COALESCED_READ_CYCLES_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TA_BUFFER_COALESCED_WRITE_CYCLES_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TD_COALESCABLE_WAVEFRONT_sum
+   |-> [/opt/rocm/bin/rocprofv2] - SPI_RA_RES_STALL_CSN
+   |-> [/opt/rocm/bin/rocprofv2] - SPI_RA_TMP_STALL_CSN
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_VALU
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_SCA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_MISC
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_WR
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_RD
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_SALU
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_THREAD_CYCLES_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ITEMS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_MEM_VIOLATIONS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ATOMIC_RETURN
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_IDX_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_RESTORED
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_VALU_MFMA_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TCC_CC_ATOMIC_REQ_sum
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_INST_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_READ_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_WRITE_REQ
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300A_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/kernel_substr/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/kernel_substr/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..3b68e4a38c
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/kernel_substr/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..f0b07be064
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/kernel_substr/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..b65eec769f
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/kernel_substr/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..3fa3c03388
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/kernel_substr/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..8661e665cb
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_0.txt b/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..d26868e13a
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD GRBM_COUNT GRBM_GUI_ACTIVE TCP_GATE_EN1_sum TCP_GATE_EN2_sum TCP_TD_TCP_STALL_CYCLES_sum TCP_TCR_TCP_STALL_CYCLES_sum TA_TA_BUSY_sum TA_BUFFER_WAVEFRONTS_sum TD_TD_BUSY_sum TD_TC_STALL_sum SPI_CSN_WINDOW_VALID SPI_CSN_BUSY CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE CPF_CPF_STAT_BUSY CPF_CPF_STAT_STALL TCC_CYCLE_sum TCC_BUSY_sum TCC_PROBE_sum TCC_PROBE_ALL_sum
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_1.txt b/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..acf3b560ea
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 GRBM_SPI_BUSY TCP_READ_TAGCONFLICT_STALL_CYCLES_sum TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum TCP_TA_TCP_STATE_READ_sum TA_BUFFER_READ_WAVEFRONTS_sum TA_BUFFER_WRITE_WAVEFRONTS_sum TD_SPI_STALL_sum TD_LOAD_WAVEFRONT_sum SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE CPC_CPC_TCIU_BUSY CPC_CPC_TCIU_IDLE CPF_CPF_TCIU_BUSY CPF_CPF_TCIU_STALL TCC_NC_REQ_sum TCC_UC_REQ_sum TCC_CC_REQ_sum TCC_RW_REQ_sum
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_10.txt b/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..5b95031732
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_11.txt b/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..376546ea88
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_12.txt b/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..ce6d2660bb
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_13.txt b/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_13.txt
new file mode 100644
index 0000000000..74cfddb056
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_13.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_ATOMIC[0] TCC_BUBBLE[0] TCC_CYCLE[0] TCC_EA0_ATOMIC[0] TCC_ATOMIC[1] TCC_BUBBLE[1] TCC_CYCLE[1] TCC_EA0_ATOMIC[1] TCC_ATOMIC[2] TCC_BUBBLE[2] TCC_CYCLE[2] TCC_EA0_ATOMIC[2] TCC_ATOMIC[3] TCC_BUBBLE[3] TCC_CYCLE[3] TCC_EA0_ATOMIC[3] TCC_ATOMIC[4] TCC_BUBBLE[4] TCC_CYCLE[4] TCC_EA0_ATOMIC[4] TCC_ATOMIC[5] TCC_BUBBLE[5] TCC_CYCLE[5] TCC_EA0_ATOMIC[5] TCC_ATOMIC[6] TCC_BUBBLE[6] TCC_CYCLE[6] TCC_EA0_ATOMIC[6] TCC_ATOMIC[7] TCC_BUBBLE[7] TCC_CYCLE[7] TCC_EA0_ATOMIC[7] TCC_ATOMIC[8] TCC_BUBBLE[8] TCC_CYCLE[8] TCC_EA0_ATOMIC[8] TCC_ATOMIC[9] TCC_BUBBLE[9] TCC_CYCLE[9] TCC_EA0_ATOMIC[9] TCC_ATOMIC[10] TCC_BUBBLE[10] TCC_CYCLE[10] TCC_EA0_ATOMIC[10] TCC_ATOMIC[11] TCC_BUBBLE[11] TCC_CYCLE[11] TCC_EA0_ATOMIC[11] TCC_ATOMIC[12] TCC_BUBBLE[12] TCC_CYCLE[12] TCC_EA0_ATOMIC[12] TCC_ATOMIC[13] TCC_BUBBLE[13] TCC_CYCLE[13] TCC_EA0_ATOMIC[13] TCC_ATOMIC[14] TCC_BUBBLE[14] TCC_CYCLE[14] TCC_EA0_ATOMIC[14] TCC_ATOMIC[15] TCC_BUBBLE[15] TCC_CYCLE[15] TCC_EA0_ATOMIC[15]
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_14.txt b/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_14.txt
new file mode 100644
index 0000000000..eea63525c5
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_14.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_ATOMIC_LEVEL[0] TCC_EA0_RDREQ[0] TCC_EA0_RDREQ_32B[0] TCC_EA0_RDREQ_LEVEL[0] TCC_EA0_ATOMIC_LEVEL[1] TCC_EA0_RDREQ[1] TCC_EA0_RDREQ_32B[1] TCC_EA0_RDREQ_LEVEL[1] TCC_EA0_ATOMIC_LEVEL[2] TCC_EA0_RDREQ[2] TCC_EA0_RDREQ_32B[2] TCC_EA0_RDREQ_LEVEL[2] TCC_EA0_ATOMIC_LEVEL[3] TCC_EA0_RDREQ[3] TCC_EA0_RDREQ_32B[3] TCC_EA0_RDREQ_LEVEL[3] TCC_EA0_ATOMIC_LEVEL[4] TCC_EA0_RDREQ[4] TCC_EA0_RDREQ_32B[4] TCC_EA0_RDREQ_LEVEL[4] TCC_EA0_ATOMIC_LEVEL[5] TCC_EA0_RDREQ[5] TCC_EA0_RDREQ_32B[5] TCC_EA0_RDREQ_LEVEL[5] TCC_EA0_ATOMIC_LEVEL[6] TCC_EA0_RDREQ[6] TCC_EA0_RDREQ_32B[6] TCC_EA0_RDREQ_LEVEL[6] TCC_EA0_ATOMIC_LEVEL[7] TCC_EA0_RDREQ[7] TCC_EA0_RDREQ_32B[7] TCC_EA0_RDREQ_LEVEL[7] TCC_EA0_ATOMIC_LEVEL[8] TCC_EA0_RDREQ[8] TCC_EA0_RDREQ_32B[8] TCC_EA0_RDREQ_LEVEL[8] TCC_EA0_ATOMIC_LEVEL[9] TCC_EA0_RDREQ[9] TCC_EA0_RDREQ_32B[9] TCC_EA0_RDREQ_LEVEL[9] TCC_EA0_ATOMIC_LEVEL[10] TCC_EA0_RDREQ[10] TCC_EA0_RDREQ_32B[10] TCC_EA0_RDREQ_LEVEL[10] TCC_EA0_ATOMIC_LEVEL[11] TCC_EA0_RDREQ[11] TCC_EA0_RDREQ_32B[11] TCC_EA0_RDREQ_LEVEL[11] TCC_EA0_ATOMIC_LEVEL[12] TCC_EA0_RDREQ[12] TCC_EA0_RDREQ_32B[12] TCC_EA0_RDREQ_LEVEL[12] TCC_EA0_ATOMIC_LEVEL[13] TCC_EA0_RDREQ[13] TCC_EA0_RDREQ_32B[13] TCC_EA0_RDREQ_LEVEL[13] TCC_EA0_ATOMIC_LEVEL[14] TCC_EA0_RDREQ[14] TCC_EA0_RDREQ_32B[14] TCC_EA0_RDREQ_LEVEL[14] TCC_EA0_ATOMIC_LEVEL[15] TCC_EA0_RDREQ[15] TCC_EA0_RDREQ_32B[15] TCC_EA0_RDREQ_LEVEL[15]
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_15.txt b/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_15.txt
new file mode 100644
index 0000000000..18c7172136
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_15.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_WRREQ[0] TCC_EA0_WRREQ_64B[0] TCC_EA0_WRREQ_LEVEL[0] TCC_HIT[0] TCC_EA0_WRREQ[1] TCC_EA0_WRREQ_64B[1] TCC_EA0_WRREQ_LEVEL[1] TCC_HIT[1] TCC_EA0_WRREQ[2] TCC_EA0_WRREQ_64B[2] TCC_EA0_WRREQ_LEVEL[2] TCC_HIT[2] TCC_EA0_WRREQ[3] TCC_EA0_WRREQ_64B[3] TCC_EA0_WRREQ_LEVEL[3] TCC_HIT[3] TCC_EA0_WRREQ[4] TCC_EA0_WRREQ_64B[4] TCC_EA0_WRREQ_LEVEL[4] TCC_HIT[4] TCC_EA0_WRREQ[5] TCC_EA0_WRREQ_64B[5] TCC_EA0_WRREQ_LEVEL[5] TCC_HIT[5] TCC_EA0_WRREQ[6] TCC_EA0_WRREQ_64B[6] TCC_EA0_WRREQ_LEVEL[6] TCC_HIT[6] TCC_EA0_WRREQ[7] TCC_EA0_WRREQ_64B[7] TCC_EA0_WRREQ_LEVEL[7] TCC_HIT[7] TCC_EA0_WRREQ[8] TCC_EA0_WRREQ_64B[8] TCC_EA0_WRREQ_LEVEL[8] TCC_HIT[8] TCC_EA0_WRREQ[9] TCC_EA0_WRREQ_64B[9] TCC_EA0_WRREQ_LEVEL[9] TCC_HIT[9] TCC_EA0_WRREQ[10] TCC_EA0_WRREQ_64B[10] TCC_EA0_WRREQ_LEVEL[10] TCC_HIT[10] TCC_EA0_WRREQ[11] TCC_EA0_WRREQ_64B[11] TCC_EA0_WRREQ_LEVEL[11] TCC_HIT[11] TCC_EA0_WRREQ[12] TCC_EA0_WRREQ_64B[12] TCC_EA0_WRREQ_LEVEL[12] TCC_HIT[12] TCC_EA0_WRREQ[13] TCC_EA0_WRREQ_64B[13] TCC_EA0_WRREQ_LEVEL[13] TCC_HIT[13] TCC_EA0_WRREQ[14] TCC_EA0_WRREQ_64B[14] TCC_EA0_WRREQ_LEVEL[14] TCC_HIT[14] TCC_EA0_WRREQ[15] TCC_EA0_WRREQ_64B[15] TCC_EA0_WRREQ_LEVEL[15] TCC_HIT[15]
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_16.txt b/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_16.txt
new file mode 100644
index 0000000000..fb70f1d1b6
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_16.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_MISS[0] TCC_READ[0] TCC_REQ[0] TCC_RW_REQ[0] TCC_MISS[1] TCC_READ[1] TCC_REQ[1] TCC_RW_REQ[1] TCC_MISS[2] TCC_READ[2] TCC_REQ[2] TCC_RW_REQ[2] TCC_MISS[3] TCC_READ[3] TCC_REQ[3] TCC_RW_REQ[3] TCC_MISS[4] TCC_READ[4] TCC_REQ[4] TCC_RW_REQ[4] TCC_MISS[5] TCC_READ[5] TCC_REQ[5] TCC_RW_REQ[5] TCC_MISS[6] TCC_READ[6] TCC_REQ[6] TCC_RW_REQ[6] TCC_MISS[7] TCC_READ[7] TCC_REQ[7] TCC_RW_REQ[7] TCC_MISS[8] TCC_READ[8] TCC_REQ[8] TCC_RW_REQ[8] TCC_MISS[9] TCC_READ[9] TCC_REQ[9] TCC_RW_REQ[9] TCC_MISS[10] TCC_READ[10] TCC_REQ[10] TCC_RW_REQ[10] TCC_MISS[11] TCC_READ[11] TCC_REQ[11] TCC_RW_REQ[11] TCC_MISS[12] TCC_READ[12] TCC_REQ[12] TCC_RW_REQ[12] TCC_MISS[13] TCC_READ[13] TCC_REQ[13] TCC_RW_REQ[13] TCC_MISS[14] TCC_READ[14] TCC_REQ[14] TCC_RW_REQ[14] TCC_MISS[15] TCC_READ[15] TCC_REQ[15] TCC_RW_REQ[15]
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_17.txt b/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_17.txt
new file mode 100644
index 0000000000..bc456a6496
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_17.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_TAG_STALL[0] TCC_TOO_MANY_EA_WRREQS_STALL[0] TCC_WRITE[0] TCC_TAG_STALL[1] TCC_TOO_MANY_EA_WRREQS_STALL[1] TCC_WRITE[1] TCC_TAG_STALL[2] TCC_TOO_MANY_EA_WRREQS_STALL[2] TCC_WRITE[2] TCC_TAG_STALL[3] TCC_TOO_MANY_EA_WRREQS_STALL[3] TCC_WRITE[3] TCC_TAG_STALL[4] TCC_TOO_MANY_EA_WRREQS_STALL[4] TCC_WRITE[4] TCC_TAG_STALL[5] TCC_TOO_MANY_EA_WRREQS_STALL[5] TCC_WRITE[5] TCC_TAG_STALL[6] TCC_TOO_MANY_EA_WRREQS_STALL[6] TCC_WRITE[6] TCC_TAG_STALL[7] TCC_TOO_MANY_EA_WRREQS_STALL[7] TCC_WRITE[7] TCC_TAG_STALL[8] TCC_TOO_MANY_EA_WRREQS_STALL[8] TCC_WRITE[8] TCC_TAG_STALL[9] TCC_TOO_MANY_EA_WRREQS_STALL[9] TCC_WRITE[9] TCC_TAG_STALL[10] TCC_TOO_MANY_EA_WRREQS_STALL[10] TCC_WRITE[10] TCC_TAG_STALL[11] TCC_TOO_MANY_EA_WRREQS_STALL[11] TCC_WRITE[11] TCC_TAG_STALL[12] TCC_TOO_MANY_EA_WRREQS_STALL[12] TCC_WRITE[12] TCC_TAG_STALL[13] TCC_TOO_MANY_EA_WRREQS_STALL[13] TCC_WRITE[13] TCC_TAG_STALL[14] TCC_TOO_MANY_EA_WRREQS_STALL[14] TCC_WRITE[14] TCC_TAG_STALL[15] TCC_TOO_MANY_EA_WRREQS_STALL[15] TCC_WRITE[15]
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_2.txt b/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..cc3b592b06
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 TCP_VOLATILE_sum TCP_TOTAL_ACCESSES_sum TCP_TOTAL_READ_sum TCP_TOTAL_WRITE_sum TA_BUFFER_ATOMIC_WAVEFRONTS_sum TA_BUFFER_TOTAL_CYCLES_sum TD_ATOMIC_WAVEFRONT_sum TD_STORE_WAVEFRONT_sum SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION CPF_CPF_STAT_IDLE CPF_CPF_TCIU_IDLE TCC_REQ_sum TCC_STREAMING_REQ_sum TCC_HIT_sum TCC_MISS_sum
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_3.txt b/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..d5ba30d7f9
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS TCP_TOTAL_ATOMIC_WITH_RET_sum TCP_TOTAL_ATOMIC_WITHOUT_RET_sum TCP_TOTAL_WRITEBACK_INVALIDATES_sum TCP_TOTAL_CACHE_ACCESSES_sum TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES_sum TD_COALESCABLE_WAVEFRONT_sum SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE CPF_CMP_UTCL1_STALL_ON_TRANSLATION TCC_READ_sum TCC_WRITE_sum TCC_ATOMIC_sum TCC_WRITEBACK_sum
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_4.txt b/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..8c9fd3eb59
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAIT_ANY SQ_WAIT_INST_ANY SQ_ACTIVE_INST_ANY SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU TCP_UTCL1_TRANSLATION_MISS_sum TCP_UTCL1_TRANSLATION_HIT_sum TCP_UTCL1_PERMISSION_MISS_sum TCP_UTCL1_REQUEST_sum TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_TOTAL_WAVEFRONTS_sum SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE TCC_EA0_WRREQ_sum TCC_EA0_WRREQ_64B_sum TCC_EA0_WR_UNCACHED_32B_sum TCC_EA0_WRREQ_DRAM_sum
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_5.txt b/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..9e5c371b8f
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_SCA SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU TCP_TCC_READ_REQ_sum TCP_TCC_WRITE_REQ_sum TCP_TCC_ATOMIC_WITH_RET_REQ_sum TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN CPC_ME1_DC0_SPI_BUSY TCC_EA0_RDREQ_sum TCC_EA0_RDREQ_32B_sum TCC_BUBBLE_sum TCC_EA0_RD_UNCACHED_32B_sum
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_6.txt b/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..cb0cdfc532
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_THREAD_CYCLES_VALU SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 TCP_TCC_NC_READ_REQ_sum TCP_TCC_NC_WRITE_REQ_sum TCP_TCC_NC_ATOMIC_REQ_sum TCP_TCC_UC_READ_REQ_sum TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN TCC_EA0_RDREQ_DRAM_sum TCC_TAG_STALL_sum TCC_NORMAL_WRITEBACK_sum TCC_ALL_TC_OP_WB_WRITEBACK_sum
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_7.txt b/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..b8b1ed2da2
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED TCP_TCC_UC_WRITE_REQ_sum TCP_TCC_UC_ATOMIC_REQ_sum TCP_TCC_CC_READ_REQ_sum TCP_TCC_CC_WRITE_REQ_sum TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR TCC_NORMAL_EVICT_sum TCC_ALL_TC_OP_INV_EVICT_sum TCC_TOO_MANY_EA_WRREQS_STALL_sum TCC_EA0_ATOMIC_sum
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_8.txt b/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..f9c42e5b39
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES TCP_TCC_CC_ATOMIC_REQ_sum TCP_TCC_RW_READ_REQ_sum TCP_TCC_RW_WRITE_REQ_sum TCP_TCC_RW_ATOMIC_REQ_sum SPI_VWC_CSC_WR SPI_RA_BULKY_CU_FULL_CSN TCC_EA0_RDREQ_LEVEL_sum TCC_EA0_WRREQ_LEVEL_sum TCC_EA0_ATOMIC_LEVEL_sum TCC_EA0_WRREQ_STALL_sum
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_9.txt b/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..a838f65389
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300A_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ TCP_PENDING_STALL_CYCLES_sum
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300A_A1/perfmon/timestamps.txt b/tests/workloads/kernel_substr/MI300A_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..2970e26c4e
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300A_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300A_A1/pmc_perf.csv b/tests/workloads/kernel_substr/MI300A_A1/pmc_perf.csv
new file mode 100644
index 0000000000..5b1dc7b429
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300A_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
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CED_WRITE_CYCLES_sum,TCC_ATOMIC_sum,TCC_READ_sum,TCC_WRITEBACK_sum,TCC_WRITE_sum,TCP_TOTAL_ATOMIC_WITHOUT_RET_sum,TCP_TOTAL_ATOMIC_WITH_RET_sum,TCP_TOTAL_CACHE_ACCESSES_sum,TCP_TOTAL_WRITEBACK_INVALIDATES_sum,TD_COALESCABLE_WAVEFRONT_sum,Wave_Size_5,Correlation_ID_5,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,TA_FLAT_ATOMIC_WAVEFRONTS_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,TCC_ALL_TC_OP_INV_EVICT_sum,TCC_EA0_ATOMIC_sum,TCC_NORMAL_EVICT_sum,TCC_TOO_MANY_EA_WRREQS_STALL_sum,TCP_TCC_CC_READ_REQ_sum,TCP_TCC_CC_WRITE_REQ_sum,TCP_TCC_UC_ATOMIC_REQ_sum,TCP_TCC_UC_WRITE_REQ_sum,Wave_Size_6,Correlation_ID_6,XCC_Index_6,TCC_MISS[0],TCC_READ[0],TCC_REQ[0],TCC_RW_REQ[0],TCC_MISS[1],TCC_READ[1],TCC_REQ[1],TCC_RW_REQ[1],TCC_MISS[2],TCC_READ[2],TCC_REQ[2],TCC_RW_REQ[2],TCC_MISS[3],TCC_READ[3],TCC_REQ[3],TCC_RW_REQ[3],TCC_MISS[4],TCC_READ[4],TCC_REQ[4],TCC_RW_REQ[4],TCC_MISS[5],TCC_READ[5],TCC_REQ[5],TCC_RW_REQ[5],TCC_MISS[6],TCC_READ[6],TCC_REQ[6],TCC_RW_REQ[6],TCC_MISS[7],TCC_READ[7],TCC_REQ[7],TCC_RW_REQ[7],TCC_MISS[8],TCC_READ[8],TCC_REQ[8],TCC_RW_REQ[8],TCC_MISS[9],TCC_READ[9],TCC_REQ[9],TCC_RW_REQ[9],TCC_MISS[10],TCC_READ[10],TCC_REQ[10],TCC_RW_REQ[10],TCC_MISS[11],TCC_READ[11],TCC_REQ[11],TCC_RW_REQ[11],TCC_MISS[12],TCC_READ[12],TCC_REQ[12],TCC_RW_REQ[12],TCC_MISS[13],TCC_READ[13],TCC_REQ[13],TCC_RW_REQ[13],TCC_MISS[14],TCC_READ[14],TCC_REQ[14],TCC_RW_REQ[14],TCC_MISS[15],TCC_READ[15],TCC_REQ[15],TCC_RW_REQ[15],TCC_MISS[16],TCC_READ[16],TCC_REQ[16],TCC_RW_REQ[16],TCC_MISS[17],TCC_READ[17],TCC_REQ[17],TCC_RW_REQ[17],TCC_MISS[18],TCC_READ[18],TCC_REQ[18],TCC_RW_REQ[18],TCC_MISS[19],TCC_READ[19],TCC_REQ[19],TCC_RW_REQ[19],TCC_MISS[20],TCC_READ[20],TCC_REQ[20],TCC_RW_REQ[20],TCC_MISS[21],TCC_READ[21],TCC_REQ[21],TCC_RW_REQ[21],TCC_MISS[22],TCC_READ[22],TCC_REQ[22],TCC_RW_REQ[22],TCC_MISS[23],TCC_READ[23],TCC_REQ[23],TCC_RW_REQ[23],TCC_MISS[24],TCC_READ[24],TCC_REQ[24],TCC_RW_REQ[24],TCC_MISS[25],TCC_READ[25],TCC_REQ[25],TCC_RW_REQ[25],TCC_MISS[26],TCC_READ[26],TCC_REQ[26],TCC_RW_REQ[26],TCC_MISS[27],TCC_READ[27],TCC_REQ[27],TCC_RW_REQ[27],TCC_MISS[28],TCC_READ[28],TCC_REQ[28],TCC_RW_REQ[28],TCC_MISS[29],TCC_READ[29],TCC_REQ[29],TCC_RW_REQ[29],TCC_MISS[30],TCC_READ[30],TCC_REQ[30],TCC_RW_REQ[30],TCC_MISS[31],TCC_READ[31],TCC_REQ[31],TCC_RW_REQ[31],TCC_MISS[32],TCC_READ[32],TCC_REQ[32],TCC_RW_REQ[32],TCC_MISS[33],TCC_READ[33],TCC_REQ[33],TCC_RW_REQ[33],TCC_MISS[34],TCC_READ[34],TCC_REQ[34],TCC_RW_REQ[34],TCC_MISS[35],TCC_READ[35],TCC_REQ[35],TCC_RW_REQ[35],TCC_MISS[36],TCC_READ[36],TCC_REQ[36],TCC_RW_REQ[36],TCC_MISS[37],TCC_READ[37],TCC_REQ[37],TCC_RW_REQ[37],TCC_MISS[38],TCC_READ[38],TCC_REQ[38],TCC_RW_REQ[38],TCC_MISS[39],TCC_READ[39],TCC_REQ[39],TCC_RW_REQ[39],TCC_MISS[40],TCC_READ[40],TCC_REQ[40],TCC_RW_REQ[40],TCC_MISS[41],TCC_READ[41],TCC_REQ[41],TCC_RW_REQ[41],TCC_MISS[42],TCC_READ[42],TCC_REQ[42],TCC_RW_REQ[42],TCC_MISS[43],TCC_READ[43],TCC_REQ[43],TCC_RW_REQ[43],TCC_MISS[44],TCC_READ[44],TCC_REQ[44],TCC_RW_REQ[44],TCC_MISS[45],TCC_READ[45],TCC_REQ[45],TCC_RW_REQ[45],TCC_MISS[46],TCC_READ[46],TCC_REQ[46],TCC_RW_REQ[46],TCC_MISS[47],TCC_READ[47],TCC_REQ[47],TCC_RW_REQ[47],TCC_MISS[48],TCC_READ[48],TCC_REQ[48],TCC_RW_REQ[48],TCC_MISS[49],TCC_READ[49],TCC_REQ[49],TCC_RW_REQ[49],TCC_MISS[50],TCC_READ[50],TCC_REQ[50],TCC_RW_REQ[50],TCC_MISS[51],TCC_READ[51],TCC_REQ[51],TCC_RW_REQ[51],TCC_MISS[52],TCC_READ[52],TCC_REQ[52],TCC_RW_REQ[52],TCC_MISS[53],TCC_READ[53],TCC_REQ[53],TCC_RW_REQ[53],TCC_MISS[54],TCC_READ[54],TCC_REQ[54],TCC_RW_REQ[54],TCC_MISS[55],TCC_READ[55],TCC_REQ[55],TCC_RW_REQ[55],TCC_MISS[56],TCC_READ[56],TCC_REQ[56],TCC_RW_REQ[56],TCC_MISS[57],TCC_READ[57],TCC_REQ[57],TCC_RW_REQ[57],TCC_MISS[58],TCC_READ[58],TCC_REQ[58],TCC_RW_REQ[58],TCC_MISS[59],TCC_READ[59],TCC_REQ[59],TCC_RW_REQ[59],TCC_MISS[60],TCC_READ[60],TCC_REQ[60],TCC_RW_REQ[60],TCC_MISS[61],TCC_READ[61],TCC_REQ[61],TCC_RW_REQ[61],TCC_MISS[62],TCC_READ[62],TCC_REQ[62],TCC_RW_REQ[62],TCC_MISS[63],TCC_READ[63],TCC_REQ[63],TCC_RW_REQ[63],TCC_MISS[64],TCC_READ[64],TCC_REQ[64],TCC_RW_REQ[64],TCC_MISS[65],TCC_READ[65],TCC_REQ[65],TCC_RW_REQ[65],TCC_MISS[66],TCC_READ[66],TCC_REQ[66],TCC_RW_REQ[66],TCC_MISS[67],TCC_READ[67],TCC_REQ[67],TCC_RW_REQ[67],TCC_MISS[68],TCC_READ[68],TCC_REQ[68],TCC_RW_REQ[68],TCC_MISS[69],TCC_READ[69],TCC_REQ[69],TCC_RW_REQ[69],TCC_MISS[70],TCC_READ[70],TCC_REQ[70],TCC_RW_REQ[70],TCC_MISS[71],TCC_READ[71],TCC_REQ[71],TCC_RW_REQ[71],TCC_MISS[72],TCC_READ[72],TCC_REQ[72],TCC_RW_REQ[72],TCC_MISS[73],TCC_READ[73],TCC_REQ[73],TCC_RW_REQ[73],TCC_MISS[74],TCC_READ[74],TCC_REQ[74],TCC_RW_REQ[74],TCC_MISS[75],TCC_READ[75],TCC_REQ[75],TCC_RW_REQ[75],TCC_MISS[76],TCC_READ[76],TCC_REQ[76],TCC_RW_REQ[76],TCC_MISS[77],TCC_READ[77],TCC_REQ[77],TCC_RW_REQ[77],TCC_MISS[78],TCC_READ[78],TCC_REQ[78],TCC_RW_REQ[78],TCC_MISS[79],TCC_READ[79],TCC_REQ[79],TCC_RW_REQ[79],TCC_MISS[80],TCC_READ[80],TCC_REQ[80],TCC_RW_REQ[80],TCC_MISS[81],TCC_READ[81],TCC_REQ[81],TCC_RW_REQ[81],TCC_MISS[82],TCC_READ[82],TCC_REQ[82],TCC_RW_REQ[82],TCC_MISS[83],TCC_READ[83],TCC_REQ[83],TCC_RW_REQ[83],TCC_MISS[84],TCC_READ[84],TCC_REQ[84],TCC_RW_REQ[84],TCC_MISS[85],TCC_READ[85],TCC_REQ[85],TCC_RW_REQ[85],TCC_MISS[86],TCC_READ[86],TCC_REQ[86],TCC_RW_REQ[86],TCC_MISS[87],TCC_READ[87],TCC_REQ[87],TCC_RW_REQ[87],TCC_MISS[88],TCC_READ[88],TCC_REQ[88],TCC_RW_REQ[88],TCC_MISS[89],TCC_READ[89],TCC_REQ[89],TCC_RW_REQ[89],TCC_MISS[90],TCC_READ[90],TCC_REQ[90],TCC_RW_REQ[90],TCC_MISS[91],TCC_READ[91],TCC_REQ[91],TCC_RW_REQ[91],TCC_MISS[92],TCC_READ[92],TCC_REQ[92],TCC_RW_REQ[92],TCC_MISS[93],TCC_READ[93],TCC_REQ[93],TCC_RW_REQ[93],TCC_MISS[94],TCC_READ[94],TCC_REQ[94],TCC_RW_REQ[94],TCC_MISS[95],TCC_READ[95],TCC_REQ[95],TCC_RW_REQ[95],Wave_Size_7,Correlation_ID_7,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SPI_RA_REQ_NO_ALLOC,SPI_RA_REQ_NO_ALLOC_CSN,CPC_CPC_STAT_STALL,CPC_UTCL1_STALL_ON_TRANSLATION,CPF_CPF_STAT_IDLE,CPF_CPF_TCIU_IDLE,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,TA_BUFFER_TOTAL_CYCLES_sum,TCC_HIT_sum,TCC_MISS_sum,TCC_REQ_sum,TCC_STREAMING_REQ_sum,TCP_TOTAL_ACCESSES_sum,TCP_TOTAL_READ_sum,TCP_TOTAL_WRITE_sum,TCP_VOLATILE_sum,TD_ATOMIC_WAVEFRONT_sum,TD_STORE_WAVEFRONT_sum,Wave_Size_8,Correlation_ID_8,XCC_Index_8,TCC_ATOMIC[0],TCC_BUBBLE[0],TCC_CYCLE[0],TCC_EA0_ATOMIC[0],TCC_ATOMIC[1],TCC_BUBBLE[1],TCC_CYCLE[1],TCC_EA0_ATOMIC[1],TCC_ATOMIC[2],TCC_BUBBLE[2],TCC_CYCLE[2],TCC_EA0_ATOMIC[2],TCC_ATOMIC[3],TCC_BUBBLE[3],TCC_CYCLE[3],TCC_EA0_ATOMIC[3],TCC_ATOMIC[4],TCC_BUBBLE[4],TCC_CYCLE[4],TCC_EA0_ATOMIC[4],TCC_ATOMIC[5],TCC_BUBBLE[5],TCC_CYCLE[5],TCC_EA0_ATOMIC[5],TCC_ATOMIC[6],TCC_BUBBLE[6],TCC_CYCLE[6],TCC_EA0_ATOMIC[6],TCC_ATOMIC[7],TCC_BUBBLE[7],TCC_CYCLE[7],TCC_EA0_ATOMIC[7],TCC_ATOMIC[8],TCC_BUBBLE[8],TCC_CYCLE[8],TCC_EA0_ATOMIC[8],TCC_ATOMIC[9],TCC_BUBBLE[9],TCC_CYCLE[9],TCC_EA0_ATOMIC[9],TCC_ATOMIC[10],TCC_BUBBLE[10],TCC_CYCLE[10],TCC_EA0_ATOMIC[10],TCC_ATOMIC[11],TCC_BUBBLE[11],TCC_CYCLE[11],TCC_EA0_ATOMIC[11],TCC_ATOMIC[12],TCC_BUBBLE[12],TCC_CYCLE[12],TCC_EA0_ATOMIC[12],TCC_ATOMIC[13],TCC_BUBBLE[13],TCC_CYCLE[13],TCC_EA0_ATOMIC[13],TCC_ATOMIC[14],TCC_BUBBLE[14],TCC_CYCLE[14],TCC_EA0_ATOMIC[14],TCC_ATOMIC[15],TCC_BUBBLE[15],TCC_CYCLE[15],TCC_EA0_ATOMIC[15],TCC_ATOMIC[16],TCC_BUBBLE[16],TCC_CYCLE[16],TCC_EA0_ATOMIC[16],TCC_ATOMIC[17],TCC_BUBBLE[17],TCC_CYCLE[17],TCC_EA0_ATOMIC[17],TCC_ATOMIC[18],TCC_BUBBLE[18],TCC_CYCLE[18],TCC_EA0_ATOMIC[18],TCC_ATOMIC[19],TCC_BUBBLE[19],TCC_CYCLE[19],TCC_EA0_ATOMIC[19],TCC_ATOMIC[20],TCC_BUBBLE[20],TCC_CYCLE[20],TCC_EA0_ATOMIC[20],TCC_ATOMIC[21],TCC_BUBBLE[21],TCC_CYCLE[21],TCC_EA0_ATOMIC[21],TCC_ATOMIC[22],TCC_BUBBLE[22],TCC_CYCLE[22],TCC_EA0_ATOMIC[22],TCC_ATOMIC[23],TCC_BUBBLE[23],TCC_CYCLE[23],TCC_EA0_ATOMIC[23],TCC_ATOMIC[24],TCC_BUBBLE[24],TCC_CYCLE[24],TCC_EA0_ATOMIC[24],TCC_ATOMIC[25],TCC_BUBBLE[25],TCC_CYCLE[25],TCC_EA0_ATOMIC[25],TCC_ATOMIC[26],TCC_BUBBLE[26],TCC_CYCLE[26],TCC_EA0_ATOMIC[26],TCC_ATOMIC[27],TCC_BUBBLE[27],TCC_CYCLE[27],TCC_EA0_ATOMIC[27],TCC_ATOMIC[28],TCC_BUBBLE[28],TCC_CYCLE[28],TCC_EA0_ATOMIC[28],TCC_ATOMIC[29],TCC_BUBBLE[29],TCC_CYCLE[29],TCC_EA0_ATOMIC[29],TCC_ATOMIC[30],TCC_BUBBLE[30],TCC_CYCLE[30],TCC_EA0_ATOMIC[30],TCC_ATOMIC[31],TCC_BUBBLE[31],TCC_CYCLE[31],TCC_EA0_ATOMIC[31],TCC_ATOMIC[32],TCC_BUBBLE[32],TCC_CYCLE[32],TCC_EA0_ATOMIC[32],TCC_ATOMIC[33],TCC_BUBBLE[33],TCC_CYCLE[33],TCC_EA0_ATOMIC[33],TCC_ATOMIC[34],TCC_BUBBLE[34],TCC_CYCLE[34],TCC_EA0_ATOMIC[34],TCC_ATOMIC[35],TCC_BUBBLE[35],TCC_CYCLE[35],TCC_EA0_ATOMIC[35],TCC_ATOMIC[36],TCC_BUBBLE[36],TCC_CYCLE[36],TCC_EA0_ATOMIC[36],TCC_ATOMIC[37],TCC_BUBBLE[37],TCC_CYCLE[37],TCC_EA0_ATOMIC[37],TCC_ATOMIC[38],TCC_BUBBLE[38],TCC_CYCLE[38],TCC_EA0_ATOMIC[38],TCC_ATOMIC[39],TCC_BUBBLE[39],TCC_CYCLE[39],TCC_EA0_ATOMIC[39],TCC_ATOMIC[40],TCC_BUBBLE[40],TCC_CYCLE[40],TCC_EA0_ATOMIC[40],TCC_ATOMIC[41],TCC_BUBBLE[41],TCC_CYCLE[41],TCC_EA0_ATOMIC[41],TCC_ATOMIC[42],TCC_BUBBLE[42],TCC_CYCLE[42],TCC_EA0_ATOMIC[42],TCC_ATOMIC[43],TCC_BUBBLE[43],TCC_CYCLE[43],TCC_EA0_ATOMIC[43],TCC_ATOMIC[44],TCC_BUBBLE[44],TCC_CYCLE[44],TCC_EA0_ATOMIC[44],TCC_ATOMIC[45],TCC_BUBBLE[45],TCC_CYCLE[45],TCC_EA0_ATOMIC[45],TCC_ATOMIC[46],TCC_BUBBLE[46],TCC_CYCLE[46],TCC_EA0_ATOMIC[46],TCC_ATOMIC[47],TCC_BUBBLE[47],TCC_CYCLE[47],TCC_EA0_ATOMIC[47],TCC_ATOMIC[48],TCC_BUBBLE[48],TCC_CYCLE[48],TCC_EA0_ATOMIC[48],TCC_ATOMIC[49],TCC_BUBBLE[49],TCC_CYCLE[49],TCC_EA0_ATOMIC[49],TCC_ATOMIC[50],TCC_BUBBLE[50],TCC_CYCLE[50],TCC_EA0_ATOMIC[50],TCC_ATOMIC[51],TCC_BUBBLE[51],TCC_CYCLE[51],TCC_EA0_ATOMIC[51],TCC_ATOMIC[52],TCC_BUBBLE[52],TCC_CYCLE[52],TCC_EA0_ATOMIC[52],TCC_ATOMIC[53],TCC_BUBBLE[53],TCC_CYCLE[53],TCC_EA0_ATOMIC[53],TCC_ATOMIC[54],TCC_BUBBLE[54],TCC_CYCLE[54],TCC_EA0_ATOMIC[54],TCC_ATOMIC[55],TCC_BUBBLE[55],TCC_CYCLE[55],TCC_EA0_ATOMIC[55],TCC_ATOMIC[56],TCC_BUBBLE[56],TCC_CYCLE[56],TCC_EA0_ATOMIC[56],TCC_ATOMIC[57],TCC_BUBBLE[57],TCC_CYCLE[57],TCC_EA0_ATOMIC[57],TCC_ATOMIC[58],TCC_BUBBLE[58],TCC_CYCLE[58],TCC_EA0_ATOMIC[58],TCC_ATOMIC[59],TCC_BUBBLE[59],TCC_CYCLE[59],TCC_EA0_ATOMIC[59],TCC_ATOMIC[60],TCC_BUBBLE[60],TCC_CYCLE[60],TCC_EA0_ATOMIC[60],TCC_ATOMIC[61],TCC_BUBBLE[61],TCC_CYCLE[61],TCC_EA0_ATOMIC[61],TCC_ATOMIC[62],TCC_BUBBLE[62],TCC_CYCLE[62],TCC_EA0_ATOMIC[62],TCC_ATOMIC[63],TCC_BUBBLE[63],TCC_CYCLE[63],TCC_EA0_ATOMIC[63],TCC_ATOMIC[64],TCC_BUBBLE[64],TCC_CYCLE[64],TCC_EA0_ATOMIC[64],TCC_ATOMIC[65],TCC_BUBBLE[65],TCC_CYCLE[65],TCC_EA0_ATOMIC[65],TCC_ATOMIC[66],TCC_BUBBLE[66],TCC_CYCLE[66],TCC_EA0_ATOMIC[66],TCC_ATOMIC[67],TCC_BUBBLE[67],TCC_CYCLE[67],TCC_EA0_ATOMIC[67],TCC_ATOMIC[68],TCC_BUBBLE[68],TCC_CYCLE[68],TCC_EA0_ATOMIC[68],TCC_ATOMIC[69],TCC_BUBBLE[69],TCC_CYCLE[69],TCC_EA0_ATOMIC[69],TCC_ATOMIC[70],TCC_BUBBLE[70],TCC_CYCLE[70],TCC_EA0_ATOMIC[70],TCC_ATOMIC[71],TCC_BUBBLE[71],TCC_CYCLE[71],TCC_EA0_ATOMIC[71],TCC_ATOMIC[72],TCC_BUBBLE[72],TCC_CYCLE[72],TCC_EA0_ATOMIC[72],TCC_ATOMIC[73],TCC_BUBBLE[73],TCC_CYCLE[73],TCC_EA0_ATOMIC[73],TCC_ATOMIC[74],TCC_BUBBLE[74],TCC_CYCLE[74],TCC_EA0_ATOMIC[74],TCC_ATOMIC[75],TCC_BUBBLE[75],TCC_CYCLE[75],TCC_EA0_ATOMIC[75],TCC_ATOMIC[76],TCC_BUBBLE[76],TCC_CYCLE[76],TCC_EA0_ATOMIC[76],TCC_ATOMIC[77],TCC_BUBBLE[77],TCC_CYCLE[77],TCC_EA0_ATOMIC[77],TCC_ATOMIC[78],TCC_BUBBLE[78],TCC_CYCLE[78],TCC_EA0_ATOMIC[78],TCC_ATOMIC[79],TCC_BUBBLE[79],TCC_CYCLE[79],TCC_EA0_ATOMIC[79],TCC_ATOMIC[80],TCC_BUBBLE[80],TCC_CYCLE[80],TCC_EA0_ATOMIC[80],TCC_ATOMIC[81],TCC_BUBBLE[81],TCC_CYCLE[81],TCC_EA0_ATOMIC[81],TCC_ATOMIC[82],TCC_BUBBLE[82],TCC_CYCLE[82],TCC_EA0_ATOMIC[82],TCC_ATOMIC[83],TCC_BUBBLE[83],TCC_CYCLE[83],TCC_EA0_ATOMIC[83],TCC_ATOMIC[84],TCC_BUBBLE[84],TCC_CYCLE[84],TCC_EA0_ATOMIC[84],TCC_ATOMIC[85],TCC_BUBBLE[85],TCC_CYCLE[85],TCC_EA0_ATOMIC[85],TCC_ATOMIC[86],TCC_BUBBLE[86],TCC_CYCLE[86],TCC_EA0_ATOMIC[86],TCC_ATOMIC[87],TCC_BUBBLE[87],TCC_CYCLE[87],TCC_EA0_ATOMIC[87],TCC_ATOMIC[88],TCC_BUBBLE[88],TCC_CYCLE[88],TCC_EA0_ATOMIC[88],TCC_ATOMIC[89],TCC_BUBBLE[89],TCC_CYCLE[89],TCC_EA0_ATOMIC[89],TCC_ATOMIC[90],TCC_BUBBLE[90],TCC_CYCLE[90],TCC_EA0_ATOMIC[90],TCC_ATOMIC[91],TCC_BUBBLE[91],TCC_CYCLE[91],TCC_EA0_ATOMIC[91],TCC_ATOMIC[92],TCC_BUBBLE[92],TCC_CYCLE[92],TCC_EA0_ATOMIC[92],TCC_ATOMIC[93],TCC_BUBBLE[93],TCC_CYCLE[93],TCC_EA0_ATOMIC[93],TCC_ATOMIC[94],TCC_BUBBLE[94],TCC_CYCLE[94],TCC_EA0_ATOMIC[94],TCC_ATOMIC[95],TCC_BUBBLE[95],TCC_CYCLE[95],TCC_EA0_ATOMIC[95],Wave_Size_9,Correlation_ID_9,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_10,Correlation_ID_10,SQC_TC_DATA_ATOMIC_REQ,SQC_TC_STALL,SQC_TC_REQ,SQC_DCACHE_REQ_READ_16,SQC_ICACHE_REQ,SQC_ICACHE_HITS,SQC_ICACHE_MISSES,SQC_ICACHE_MISSES_DUPLICATE,Wave_Size_11,Correlation_ID_11,SQ_INSTS_VALU_MFMA_MOPS_I8,SQ_INSTS_VALU_MFMA_MOPS_F16,SQ_INSTS_VALU_MFMA_MOPS_BF16,SQ_INSTS_VALU_MFMA_MOPS_F32,SQ_INSTS_VALU_MFMA_MOPS_F64,SQC_TC_INST_REQ,SQC_TC_DATA_READ_REQ,SQC_TC_DATA_WRITE_REQ,TCP_PENDING_STALL_CYCLES_sum,Wave_Size_12,Correlation_ID_12,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,TCC_EA0_ATOMIC_LEVEL_sum,TCC_EA0_RDREQ_LEVEL_sum,TCC_EA0_WRREQ_LEVEL_sum,TCC_EA0_WRREQ_STALL_sum,TCP_TCC_CC_ATOMIC_REQ_sum,TCP_TCC_RW_ATOMIC_REQ_sum,TCP_TCC_RW_READ_REQ_sum,TCP_TCC_RW_WRITE_REQ_sum,Wave_Size_13,Correlation_ID_13,SQC_DCACHE_REQ_READ_2,SQC_DCACHE_REQ_READ_4,Wave_Size_14,Correlation_ID_14,SQ_ACTIVE_INST_SCA,SQ_ACTIVE_INST_EXP_GDS,SQ_ACTIVE_INST_MISC,SQ_ACTIVE_INST_FLAT,SQ_INST_CYCLES_VMEM_WR,SQ_INST_CYCLES_VMEM_RD,SQ_INST_CYCLES_SMEM,SQ_INST_CYCLES_SALU,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,CPC_ME1_DC0_SPI_BUSY,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,TCC_BUBBLE_sum,TCC_EA0_RDREQ_32B_sum,TCC_EA0_RDREQ_sum,TCC_EA0_RD_UNCACHED_32B_sum,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,TCP_TCC_READ_REQ_sum,TCP_TCC_WRITE_REQ_sum,Wave_Size_15,Correlation_ID_15,XCC_Index_15,TCC_EA0_ATOMIC_LEVEL[0],TCC_EA0_RDREQ[0],TCC_EA0_RDREQ_32B[0],TCC_EA0_RDREQ_LEVEL[0],TCC_EA0_ATOMIC_LEVEL[1],TCC_EA0_RDREQ[1],TCC_EA0_RDREQ_32B[1],TCC_EA0_RDREQ_LEVEL[1],TCC_EA0_ATOMIC_LEVEL[2],TCC_EA0_RDREQ[2],TCC_EA0_RDREQ_32B[2],TCC_EA0_RDREQ_LEVEL[2],TCC_EA0_ATOMIC_LEVEL[3],TCC_EA0_RDREQ[3],TCC_EA0_RDREQ_32B[3],TCC_EA0_RDREQ_LEVEL[3],TCC_EA0_ATOMIC_LEVEL[4],TCC_EA0_RDREQ[4],TCC_EA0_RDREQ_32B[4],TCC_EA0_RDREQ_LEVEL[4],TCC_EA0_ATOMIC_LEVEL[5],TCC_EA0_RDREQ[5],TCC_EA0_RDREQ_32B[5],TCC_EA0_RDREQ_LEVEL[5],TCC_EA0_ATOMIC_LEVEL[6],TCC_EA0_RDREQ[6],TCC_EA0_RDREQ_32B[6],TCC_EA0_RDREQ_LEVEL[6],TCC_EA0_ATOMIC_LEVEL[7],TCC_EA0_RDREQ[7],TCC_EA0_RDREQ_32B[7],TCC_EA0_RDREQ_LEVEL[7],TCC_EA0_ATOMIC_LEVEL[8],TCC_EA0_RDREQ[8],TCC_EA0_RDREQ_32B[8],TCC_EA0_RDREQ_LEVEL[8],TCC_EA0_ATOMIC_LEVEL[9],TCC_EA0_RDREQ[9],TCC_EA0_RDREQ_32B[9],TCC_EA0_RDREQ_LEVEL[9],TCC_EA0_ATOMIC_LEVEL[10],TCC_EA0_RDREQ[10],TCC_EA0_RDREQ_32B[10],TCC_EA0_RDREQ_LEVEL[10],TCC_EA0_ATOMIC_LEVEL[11],TCC_EA0_RDREQ[11],TCC_EA0_RDREQ_32B[11],TCC_EA0_RDREQ_LEVEL[11],TCC_EA0_ATOMIC_LEVEL[12],TCC_EA0_RDREQ[12],TCC_EA0_RDREQ_32B[12],TCC_EA0_RDREQ_LEVEL[12],TCC_EA0_ATOMIC_LEVEL[13],TCC_EA0_RDREQ[13],TCC_EA0_RDREQ_32B[13],TCC_EA0_RDREQ_LEVEL[13],TCC_EA0_ATOMIC_LEVEL[14],TCC_EA0_RDREQ[14],TCC_EA0_RDREQ_32B[14],TCC_EA0_RDREQ_LEVEL[14],TCC_EA0_ATOMIC_LEVEL[15],TCC_EA0_RDREQ[15],TCC_EA0_RDREQ_32B[15],TCC_EA0_RDREQ_LEVEL[15],TCC_EA0_ATOMIC_LEVEL[16],TCC_EA0_RDREQ[16],TCC_EA0_RDREQ_32B[16],TCC_EA0_RDREQ_LEVEL[16],TCC_EA0_ATOMIC_LEVEL[17],TCC_EA0_RDREQ[17],TCC_EA0_RDREQ_32B[17],TCC_EA0_RDREQ_LEVEL[17],TCC_EA0_ATOMIC_LEVEL[18],TCC_EA0_RDREQ[18],TCC_EA0_RDREQ_32B[18],TCC_EA0_RDREQ_LEVEL[18],TCC_EA0_ATOMIC_LEVEL[19],TCC_EA0_RDREQ[19],TCC_EA0_RDREQ_32B[19],TCC_EA0_RDREQ_LEVEL[19],TCC_EA0_ATOMIC_LEVEL[20],TCC_EA0_RDREQ[20],TCC_EA0_RDREQ_32B[20],TCC_EA0_RDREQ_LEVEL[20],TCC_EA0_ATOMIC_LEVEL[21],TCC_EA0_RDREQ[21],TCC_EA0_RDREQ_32B[21],TCC_EA0_RDREQ_LEVEL[21],TCC_EA0_ATOMIC_LEVEL[22],TCC_EA0_RDREQ[22],TCC_EA0_RDREQ_32B[22],TCC_EA0_RDREQ_LEVEL[22],TCC_EA0_ATOMIC_LEVEL[23],TCC_EA0_RDREQ[23],TCC_EA0_RDREQ_32B[23],TCC_EA0_RDREQ_LEVEL[23],TCC_EA0_ATOMIC_LEVEL[24],TCC_EA0_RDREQ[24],TCC_EA0_RDREQ_32B[24],TCC_EA0_RDREQ_LEVEL[24],TCC_EA0_ATOMIC_LEVEL[25],TCC_EA0_RDREQ[25],TCC_EA0_RDREQ_32B[25],TCC_EA0_RDREQ_LEVEL[25],TCC_EA0_ATOMIC_LEVEL[26],TCC_EA0_RDREQ[26],TCC_EA0_RDREQ_32B[26],TCC_EA0_RDREQ_LEVEL[26],TCC_EA0_ATOMIC_LEVEL[27],TCC_EA0_RDREQ[27],TCC_EA0_RDREQ_32B[27],TCC_EA0_RDREQ_LEVEL[27],TCC_EA0_ATOMIC_LEVEL[28],TCC_EA0_RDREQ[28],TCC_EA0_RDREQ_32B[28],TCC_EA0_RDREQ_LEVEL[28],TCC_EA0_ATOMIC_LEVEL[29],TCC_EA0_RDREQ[29],TCC_EA0_RDREQ_32B[29],TCC_EA0_RDREQ_LEVEL[29],TCC_EA0_ATOMIC_LEVEL[30],TCC_EA0_RDREQ[30],TCC_EA0_RDREQ_32B[30],TCC_EA0_RDREQ_LEVEL[30],TCC_EA0_ATOMIC_LEVEL[31],TCC_EA0_RDREQ[31],TCC_EA0_RDREQ_32B[31],TCC_EA0_RDREQ_LEVEL[31],TCC_EA0_ATOMIC_LEVEL[32],TCC_EA0_RDREQ[32],TCC_EA0_RDREQ_32B[32],TCC_EA0_RDREQ_LEVEL[32],TCC_EA0_ATOMIC_LEVEL[33],TCC_EA0_RDREQ[33],TCC_EA0_RDREQ_32B[33],TCC_EA0_RDREQ_LEVEL[33],TCC_EA0_ATOMIC_LEVEL[34],TCC_EA0_RDREQ[34],TCC_EA0_RDREQ_32B[34],TCC_EA0_RDREQ_LEVEL[34],TCC_EA0_ATOMIC_LEVEL[35],TCC_EA0_RDREQ[35],TCC_EA0_RDREQ_32B[35],TCC_EA0_RDREQ_LEVEL[35],TCC_EA0_ATOMIC_LEVEL[36],TCC_EA0_RDREQ[36],TCC_EA0_RDREQ_32B[36],TCC_EA0_RDREQ_LEVEL[36],TCC_EA0_ATOMIC_LEVEL[37],TCC_EA0_RDREQ[37],TCC_EA0_RDREQ_32B[37],TCC_EA0_RDREQ_LEVEL[37],TCC_EA0_ATOMIC_LEVEL[38],TCC_EA0_RDREQ[38],TCC_EA0_RDREQ_32B[38],TCC_EA0_RDREQ_LEVEL[38],TCC_EA0_ATOMIC_LEVEL[39],TCC_EA0_RDREQ[39],TCC_EA0_RDREQ_32B[39],TCC_EA0_RDREQ_LEVEL[39],TCC_EA0_ATOMIC_LEVEL[40],TCC_EA0_RDREQ[40],TCC_EA0_RDREQ_32B[40],TCC_EA0_RDREQ_LEVEL[40],TCC_EA0_ATOMIC_LEVEL[41],TCC_EA0_RDREQ[41],TCC_EA0_RDREQ_32B[41],TCC_EA0_RDREQ_LEVEL[41],TCC_EA0_ATOMIC_LEVEL[42],TCC_EA0_RDREQ[42],TCC_EA0_RDREQ_32B[42],TCC_EA0_RDREQ_LEVEL[42],TCC_EA0_ATOMIC_LEVEL[43],TCC_EA0_RDREQ[43],TCC_EA0_RDREQ_32B[43],TCC_EA0_RDREQ_LEVEL[43],TCC_EA0_ATOMIC_LEVEL[44],TCC_EA0_RDREQ[44],TCC_EA0_RDREQ_32B[44],TCC_EA0_RDREQ_LEVEL[44],TCC_EA0_ATOMIC_LEVEL[45],TCC_EA0_RDREQ[45],TCC_EA0_RDREQ_32B[45],TCC_EA0_RDREQ_LEVEL[45],TCC_EA0_ATOMIC_LEVEL[46],TCC_EA0_RDREQ[46],TCC_EA0_RDREQ_32B[46],TCC_EA0_RDREQ_LEVEL[46],TCC_EA0_ATOMIC_LEVEL[47],TCC_EA0_RDREQ[47],TCC_EA0_RDREQ_32B[47],TCC_EA0_RDREQ_LEVEL[47],TCC_EA0_ATOMIC_LEVEL[48],TCC_EA0_RDREQ[48],TCC_EA0_RDREQ_32B[48],TCC_EA0_RDREQ_LEVEL[48],TCC_EA0_ATOMIC_LEVEL[49],TCC_EA0_RDREQ[49],TCC_EA0_RDREQ_32B[49],TCC_EA0_RDREQ_LEVEL[49],TCC_EA0_ATOMIC_LEVEL[50],TCC_EA0_RDREQ[50],TCC_EA0_RDREQ_32B[50],TCC_EA0_RDREQ_LEVEL[50],TCC_EA0_ATOMIC_LEVEL[51],TCC_EA0_RDREQ[51],TCC_EA0_RDREQ_32B[51],TCC_EA0_RDREQ_LEVEL[51],TCC_EA0_ATOMIC_LEVEL[52],TCC_EA0_RDREQ[52],TCC_EA0_RDREQ_32B[52],TCC_EA0_RDREQ_LEVEL[52],TCC_EA0_ATOMIC_LEVEL[53],TCC_EA0_RDREQ[53],TCC_EA0_RDREQ_32B[53],TCC_EA0_RDREQ_LEVEL[53],TCC_EA0_ATOMIC_LEVEL[54],TCC_EA0_RDREQ[54],TCC_EA0_RDREQ_32B[54],TCC_EA0_RDREQ_LEVEL[54],TCC_EA0_ATOMIC_LEVEL[55],TCC_EA0_RDREQ[55],TCC_EA0_RDREQ_32B[55],TCC_EA0_RDREQ_LEVEL[55],TCC_EA0_ATOMIC_LEVEL[56],TCC_EA0_RDREQ[56],TCC_EA0_RDREQ_32B[56],TCC_EA0_RDREQ_LEVEL[56],TCC_EA0_ATOMIC_LEVEL[57],TCC_EA0_RDREQ[57],TCC_EA0_RDREQ_32B[57],TCC_EA0_RDREQ_LEVEL[57],TCC_EA0_ATOMIC_LEVEL[58],TCC_EA0_RDREQ[58],TCC_EA0_RDREQ_32B[58],TCC_EA0_RDREQ_LEVEL[58],TCC_EA0_ATOMIC_LEVEL[59],TCC_EA0_RDREQ[59],TCC_EA0_RDREQ_32B[59],TCC_EA0_RDREQ_LEVEL[59],TCC_EA0_ATOMIC_LEVEL[60],TCC_EA0_RDREQ[60],TCC_EA0_RDREQ_32B[60],TCC_EA0_RDREQ_LEVEL[60],TCC_EA0_ATOMIC_LEVEL[61],TCC_EA0_RDREQ[61],TCC_EA0_RDREQ_32B[61],TCC_EA0_RDREQ_LEVEL[61],TCC_EA0_ATOMIC_LEVEL[62],TCC_EA0_RDREQ[62],TCC_EA0_RDREQ_32B[62],TCC_EA0_RDREQ_LEVEL[62],TCC_EA0_ATOMIC_LEVEL[63],TCC_EA0_RDREQ[63],TCC_EA0_RDREQ_32B[63],TCC_EA0_RDREQ_LEVEL[63],TCC_EA0_ATOMIC_LEVEL[64],TCC_EA0_RDREQ[64],TCC_EA0_RDREQ_32B[64],TCC_EA0_RDREQ_LEVEL[64],TCC_EA0_ATOMIC_LEVEL[65],TCC_EA0_RDREQ[65],TCC_EA0_RDREQ_32B[65],TCC_EA0_RDREQ_LEVEL[65],TCC_EA0_ATOMIC_LEVEL[66],TCC_EA0_RDREQ[66],TCC_EA0_RDREQ_32B[66],TCC_EA0_RDREQ_LEVEL[66],TCC_EA0_ATOMIC_LEVEL[67],TCC_EA0_RDREQ[67],TCC_EA0_RDREQ_32B[67],TCC_EA0_RDREQ_LEVEL[67],TCC_EA0_ATOMIC_LEVEL[68],TCC_EA0_RDREQ[68],TCC_EA0_RDREQ_32B[68],TCC_EA0_RDREQ_LEVEL[68],TCC_EA0_ATOMIC_LEVEL[69],TCC_EA0_RDREQ[69],TCC_EA0_RDREQ_32B[69],TCC_EA0_RDREQ_LEVEL[69],TCC_EA0_ATOMIC_LEVEL[70],TCC_EA0_RDREQ[70],TCC_EA0_RDREQ_32B[70],TCC_EA0_RDREQ_LEVEL[70],TCC_EA0_ATOMIC_LEVEL[71],TCC_EA0_RDREQ[71],TCC_EA0_RDREQ_32B[71],TCC_EA0_RDREQ_LEVEL[71],TCC_EA0_ATOMIC_LEVEL[72],TCC_EA0_RDREQ[72],TCC_EA0_RDREQ_32B[72],TCC_EA0_RDREQ_LEVEL[72],TCC_EA0_ATOMIC_LEVEL[73],TCC_EA0_RDREQ[73],TCC_EA0_RDREQ_32B[73],TCC_EA0_RDREQ_LEVEL[73],TCC_EA0_ATOMIC_LEVEL[74],TCC_EA0_RDREQ[74],TCC_EA0_RDREQ_32B[74],TCC_EA0_RDREQ_LEVEL[74],TCC_EA0_ATOMIC_LEVEL[75],TCC_EA0_RDREQ[75],TCC_EA0_RDREQ_32B[75],TCC_EA0_RDREQ_LEVEL[75],TCC_EA0_ATOMIC_LEVEL[76],TCC_EA0_RDREQ[76],TCC_EA0_RDREQ_32B[76],TCC_EA0_RDREQ_LEVEL[76],TCC_EA0_ATOMIC_LEVEL[77],TCC_EA0_RDREQ[77],TCC_EA0_RDREQ_32B[77],TCC_EA0_RDREQ_LEVEL[77],TCC_EA0_ATOMIC_LEVEL[78],TCC_EA0_RDREQ[78],TCC_EA0_RDREQ_32B[78],TCC_EA0_RDREQ_LEVEL[78],TCC_EA0_ATOMIC_LEVEL[79],TCC_EA0_RDREQ[79],TCC_EA0_RDREQ_32B[79],TCC_EA0_RDREQ_LEVEL[79],TCC_EA0_ATOMIC_LEVEL[80],TCC_EA0_RDREQ[80],TCC_EA0_RDREQ_32B[80],TCC_EA0_RDREQ_LEVEL[80],TCC_EA0_ATOMIC_LEVEL[81],TCC_EA0_RDREQ[81],TCC_EA0_RDREQ_32B[81],TCC_EA0_RDREQ_LEVEL[81],TCC_EA0_ATOMIC_LEVEL[82],TCC_EA0_RDREQ[82],TCC_EA0_RDREQ_32B[82],TCC_EA0_RDREQ_LEVEL[82],TCC_EA0_ATOMIC_LEVEL[83],TCC_EA0_RDREQ[83],TCC_EA0_RDREQ_32B[83],TCC_EA0_RDREQ_LEVEL[83],TCC_EA0_ATOMIC_LEVEL[84],TCC_EA0_RDREQ[84],TCC_EA0_RDREQ_32B[84],TCC_EA0_RDREQ_LEVEL[84],TCC_EA0_ATOMIC_LEVEL[85],TCC_EA0_RDREQ[85],TCC_EA0_RDREQ_32B[85],TCC_EA0_RDREQ_LEVEL[85],TCC_EA0_ATOMIC_LEVEL[86],TCC_EA0_RDREQ[86],TCC_EA0_RDREQ_32B[86],TCC_EA0_RDREQ_LEVEL[86],TCC_EA0_ATOMIC_LEVEL[87],TCC_EA0_RDREQ[87],TCC_EA0_RDREQ_32B[87],TCC_EA0_RDREQ_LEVEL[87],TCC_EA0_ATOMIC_LEVEL[88],TCC_EA0_RDREQ[88],TCC_EA0_RDREQ_32B[88],TCC_EA0_RDREQ_LEVEL[88],TCC_EA0_ATOMIC_LEVEL[89],TCC_EA0_RDREQ[89],TCC_EA0_RDREQ_32B[89],TCC_EA0_RDREQ_LEVEL[89],TCC_EA0_ATOMIC_LEVEL[90],TCC_EA0_RDREQ[90],TCC_EA0_RDREQ_32B[90],TCC_EA0_RDREQ_LEVEL[90],TCC_EA0_ATOMIC_LEVEL[91],TCC_EA0_RDREQ[91],TCC_EA0_RDREQ_32B[91],TCC_EA0_RDREQ_LEVEL[91],TCC_EA0_ATOMIC_LEVEL[92],TCC_EA0_RDREQ[92],TCC_EA0_RDREQ_32B[92],TCC_EA0_RDREQ_LEVEL[92],TCC_EA0_ATOMIC_LEVEL[93],TCC_EA0_RDREQ[93],TCC_EA0_RDREQ_32B[93],TCC_EA0_RDREQ_LEVEL[93],TCC_EA0_ATOMIC_LEVEL[94],TCC_EA0_RDREQ[94],TCC_EA0_RDREQ_32B[94],TCC_EA0_RDREQ_LEVEL[94],TCC_EA0_ATOMIC_LEVEL[95],TCC_EA0_RDREQ[95],TCC_EA0_RDREQ_32B[95],TCC_EA0_RDREQ_LEVEL[95],Wave_Size_16,Correlation_ID_16,SQ_INSTS_VMEM,SQ_INSTS_SALU,SQ_INSTS_VSKIPPED,SQ_INSTS,SQ_INSTS_VALU,SQ_INSTS_VALU_ADD_F16,SQ_INSTS_VALU_MUL_F16,SQ_INSTS_VALU_FMA_F16,GRBM_SPI_BUSY,SPI_CSN_NUM_THREADGROUPS,SPI_CSN_WAVE,CPC_CPC_TCIU_BUSY,CPC_CPC_TCIU_IDLE,CPF_CPF_TCIU_BUSY,CPF_CPF_TCIU_STALL,TA_BUFFER_READ_WAVEFRONTS_sum,TA_BUFFER_WRITE_WAVEFRONTS_sum,TCC_CC_REQ_sum,TCC_NC_REQ_sum,TCC_RW_REQ_sum,TCC_UC_REQ_sum,TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum,TCP_READ_TAGCONFLICT_STALL_CYCLES_sum,TCP_TA_TCP_STATE_READ_sum,TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum,TD_LOAD_WAVEFRONT_sum,TD_SPI_STALL_sum,Wave_Size_17,Correlation_ID_17,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_BUSY_CU_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_INSTS_VALU_CVT,SQ_INSTS_VMEM_WR,SQ_INSTS_VMEM_RD,GRBM_COUNT,GRBM_GUI_ACTIVE,SPI_CSN_WINDOW_VALID,SPI_CSN_BUSY,CPC_CPC_STAT_BUSY,CPC_CPC_STAT_IDLE,CPF_CPF_STAT_BUSY,CPF_CPF_STAT_STALL,TA_BUFFER_WAVEFRONTS_sum,TA_TA_BUSY_sum,TCC_BUSY_sum,TCC_CYCLE_sum,TCC_PROBE_ALL_sum,TCC_PROBE_sum,TCP_GATE_EN1_sum,TCP_GATE_EN2_sum,TCP_TCR_TCP_STALL_CYCLES_sum,TCP_TD_TCP_STALL_CYCLES_sum,TD_TC_STALL_sum,TD_TD_BUSY_sum,Start_Timestamp,End_Timestamp
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diff --git a/tests/workloads/kernel_substr/MI300A_A1/sysinfo.csv b/tests/workloads/kernel_substr/MI300A_A1/sysinfo.csv
new file mode 100644
index 0000000000..d5cb6e86ca
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300A_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+kernel_substr,./tests/vcopy -n 1048576 -b 256 -i 3,SQ|LDS|SQC|TA|TD|TCP|TCC|SPI|CPC|CPF,Wed 29 May 2024 01:35:00 PM  (CDT),2,sh5-1w300-rg3-3,AMD Instinct MI300A Accelerator,"American Megatrends International, LLC.RMO1002DS",Ubuntu 22.04.2 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,131174852,,6.1.2-110,N/A,SPX,NPS1,MI300A_A1,gfx942,32,24576,228,4,24,64,1024,32,2100,1300,2100,1300,96,32,120,4,5324.8,6
diff --git a/tests/workloads/kernel_substr/MI300A_A1/timestamps.csv b/tests/workloads/kernel_substr/MI300A_A1/timestamps.csv
new file mode 100644
index 0000000000..2fb4afa488
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300A_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,11995,1,145571,145571,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73578152516542,73578152524434,0
+3,11995,1,145571,145571,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73578152563173,73578152568942,0
+2,11995,1,145571,145571,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73578152541099,73578152547068,0
diff --git a/tests/workloads/kernel_substr/MI300X_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/kernel_substr/MI300X_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..b34a2d00dd
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300X_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,60633,1,963954,963954,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716205324090593,716205324106872,0,425673.0,425673.0,16384.0,65536.0,39909.0,3192668.0
+1,60633,1,963954,963954,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716205324129270,716205324143230,0,422132.0,422132.0,16384.0,65536.0,12991.0,1048584.0
+2,60633,1,963954,963954,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716205324163469,716205324176349,0,375841.0,375841.0,16384.0,65536.0,13140.0,1048584.0
diff --git a/tests/workloads/kernel_substr/MI300X_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/kernel_substr/MI300X_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..7e4d868cde
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300X_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,60633,1,963966,963966,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716205324090593,716205324106872,0,0.0,0.0,0.0
+1,60633,1,963966,963966,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716205324129270,716205324143230,0,0.0,0.0,0.0
+2,60633,1,963966,963966,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716205324163469,716205324176349,0,0.0,0.0,0.0
diff --git a/tests/workloads/kernel_substr/MI300X_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/kernel_substr/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..bd74d8a31d
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,963978,963978,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716205324090593,716205324106872,0,65536.0,3573102.0,285799176.0
+1,60633,1,963978,963978,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716205324129270,716205324143230,0,65536.0,3622516.0,289789600.0
+2,60633,1,963978,963978,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716205324163469,716205324176349,0,65536.0,3639192.0,291107976.0
diff --git a/tests/workloads/kernel_substr/MI300X_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/kernel_substr/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..ab6a294b85
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,963990,963990,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716205324090593,716205324106872,0,32768.0,455747.0,36450284.0
+1,60633,1,963990,963990,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716205324129270,716205324143230,0,32768.0,258596.0,20682628.0
+2,60633,1,963990,963990,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716205324163469,716205324176349,0,32768.0,263497.0,21064296.0
diff --git a/tests/workloads/kernel_substr/MI300X_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/kernel_substr/MI300X_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..0f0bd2a90c
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300X_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,60633,1,964002,964002,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716205324090593,716205324106872,0,473793.0,473793.0,279168.0,1895172.0,16384.0,36765735.0,592860.0,0.0,147407688.0
+1,60633,1,964002,964002,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716205324129270,716205324143230,0,457225.0,457225.0,275909.0,1828900.0,16384.0,32700393.0,515314.0,0.0,131158004.0
+2,60633,1,964002,964002,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716205324163469,716205324176349,0,391478.0,391478.0,212196.0,1565912.0,16384.0,31763583.0,508543.0,0.0,127414480.0
diff --git a/tests/workloads/kernel_substr/MI300X_A1/log.txt b/tests/workloads/kernel_substr/MI300X_A1/log.txt
new file mode 100644
index 0000000000..2eaa2141e0
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300X_A1/log.txt
@@ -0,0 +1,234 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/kernel_substr/MI300X_A1
+Target: MI300X_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: ['vecCopy']
+Dispatch Selection: None
+Hardware Blocks: All
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH_LEVEL
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_CVT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_WR
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_RD
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_GATE_EN1_sum
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_GATE_EN2_sum
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_REQ
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_13.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[1]
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_14.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[1]
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_15.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[2]
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_16.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[1]
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_17.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[0]
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F32
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_FLAT
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_VMEM
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_SCA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_MISC
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_WR
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_RD
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_THREAD_CYCLES_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ADDR_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_UNALIGNED_STALL
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ITEMS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_MEM_VIOLATIONS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ATOMIC_RETURN
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_IDX_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_RESTORED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_SAVED
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F32
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_INST_REQ
+
+[profiling] Current input file: tests/workloads/kernel_substr/MI300X_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/kernel_substr/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/kernel_substr/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..3b68e4a38c
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/kernel_substr/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..f0b07be064
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/kernel_substr/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..b65eec769f
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/kernel_substr/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..3fa3c03388
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/kernel_substr/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..8661e665cb
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_0.txt b/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..d26868e13a
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD GRBM_COUNT GRBM_GUI_ACTIVE TCP_GATE_EN1_sum TCP_GATE_EN2_sum TCP_TD_TCP_STALL_CYCLES_sum TCP_TCR_TCP_STALL_CYCLES_sum TA_TA_BUSY_sum TA_BUFFER_WAVEFRONTS_sum TD_TD_BUSY_sum TD_TC_STALL_sum SPI_CSN_WINDOW_VALID SPI_CSN_BUSY CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE CPF_CPF_STAT_BUSY CPF_CPF_STAT_STALL TCC_CYCLE_sum TCC_BUSY_sum TCC_PROBE_sum TCC_PROBE_ALL_sum
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_1.txt b/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..acf3b560ea
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 GRBM_SPI_BUSY TCP_READ_TAGCONFLICT_STALL_CYCLES_sum TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum TCP_TA_TCP_STATE_READ_sum TA_BUFFER_READ_WAVEFRONTS_sum TA_BUFFER_WRITE_WAVEFRONTS_sum TD_SPI_STALL_sum TD_LOAD_WAVEFRONT_sum SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE CPC_CPC_TCIU_BUSY CPC_CPC_TCIU_IDLE CPF_CPF_TCIU_BUSY CPF_CPF_TCIU_STALL TCC_NC_REQ_sum TCC_UC_REQ_sum TCC_CC_REQ_sum TCC_RW_REQ_sum
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_10.txt b/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..5b95031732
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_11.txt b/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..376546ea88
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_12.txt b/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..ce6d2660bb
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_13.txt b/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_13.txt
new file mode 100644
index 0000000000..74cfddb056
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_13.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_ATOMIC[0] TCC_BUBBLE[0] TCC_CYCLE[0] TCC_EA0_ATOMIC[0] TCC_ATOMIC[1] TCC_BUBBLE[1] TCC_CYCLE[1] TCC_EA0_ATOMIC[1] TCC_ATOMIC[2] TCC_BUBBLE[2] TCC_CYCLE[2] TCC_EA0_ATOMIC[2] TCC_ATOMIC[3] TCC_BUBBLE[3] TCC_CYCLE[3] TCC_EA0_ATOMIC[3] TCC_ATOMIC[4] TCC_BUBBLE[4] TCC_CYCLE[4] TCC_EA0_ATOMIC[4] TCC_ATOMIC[5] TCC_BUBBLE[5] TCC_CYCLE[5] TCC_EA0_ATOMIC[5] TCC_ATOMIC[6] TCC_BUBBLE[6] TCC_CYCLE[6] TCC_EA0_ATOMIC[6] TCC_ATOMIC[7] TCC_BUBBLE[7] TCC_CYCLE[7] TCC_EA0_ATOMIC[7] TCC_ATOMIC[8] TCC_BUBBLE[8] TCC_CYCLE[8] TCC_EA0_ATOMIC[8] TCC_ATOMIC[9] TCC_BUBBLE[9] TCC_CYCLE[9] TCC_EA0_ATOMIC[9] TCC_ATOMIC[10] TCC_BUBBLE[10] TCC_CYCLE[10] TCC_EA0_ATOMIC[10] TCC_ATOMIC[11] TCC_BUBBLE[11] TCC_CYCLE[11] TCC_EA0_ATOMIC[11] TCC_ATOMIC[12] TCC_BUBBLE[12] TCC_CYCLE[12] TCC_EA0_ATOMIC[12] TCC_ATOMIC[13] TCC_BUBBLE[13] TCC_CYCLE[13] TCC_EA0_ATOMIC[13] TCC_ATOMIC[14] TCC_BUBBLE[14] TCC_CYCLE[14] TCC_EA0_ATOMIC[14] TCC_ATOMIC[15] TCC_BUBBLE[15] TCC_CYCLE[15] TCC_EA0_ATOMIC[15]
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_14.txt b/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_14.txt
new file mode 100644
index 0000000000..eea63525c5
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_14.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_ATOMIC_LEVEL[0] TCC_EA0_RDREQ[0] TCC_EA0_RDREQ_32B[0] TCC_EA0_RDREQ_LEVEL[0] TCC_EA0_ATOMIC_LEVEL[1] TCC_EA0_RDREQ[1] TCC_EA0_RDREQ_32B[1] TCC_EA0_RDREQ_LEVEL[1] TCC_EA0_ATOMIC_LEVEL[2] TCC_EA0_RDREQ[2] TCC_EA0_RDREQ_32B[2] TCC_EA0_RDREQ_LEVEL[2] TCC_EA0_ATOMIC_LEVEL[3] TCC_EA0_RDREQ[3] TCC_EA0_RDREQ_32B[3] TCC_EA0_RDREQ_LEVEL[3] TCC_EA0_ATOMIC_LEVEL[4] TCC_EA0_RDREQ[4] TCC_EA0_RDREQ_32B[4] TCC_EA0_RDREQ_LEVEL[4] TCC_EA0_ATOMIC_LEVEL[5] TCC_EA0_RDREQ[5] TCC_EA0_RDREQ_32B[5] TCC_EA0_RDREQ_LEVEL[5] TCC_EA0_ATOMIC_LEVEL[6] TCC_EA0_RDREQ[6] TCC_EA0_RDREQ_32B[6] TCC_EA0_RDREQ_LEVEL[6] TCC_EA0_ATOMIC_LEVEL[7] TCC_EA0_RDREQ[7] TCC_EA0_RDREQ_32B[7] TCC_EA0_RDREQ_LEVEL[7] TCC_EA0_ATOMIC_LEVEL[8] TCC_EA0_RDREQ[8] TCC_EA0_RDREQ_32B[8] TCC_EA0_RDREQ_LEVEL[8] TCC_EA0_ATOMIC_LEVEL[9] TCC_EA0_RDREQ[9] TCC_EA0_RDREQ_32B[9] TCC_EA0_RDREQ_LEVEL[9] TCC_EA0_ATOMIC_LEVEL[10] TCC_EA0_RDREQ[10] TCC_EA0_RDREQ_32B[10] TCC_EA0_RDREQ_LEVEL[10] TCC_EA0_ATOMIC_LEVEL[11] TCC_EA0_RDREQ[11] TCC_EA0_RDREQ_32B[11] TCC_EA0_RDREQ_LEVEL[11] TCC_EA0_ATOMIC_LEVEL[12] TCC_EA0_RDREQ[12] TCC_EA0_RDREQ_32B[12] TCC_EA0_RDREQ_LEVEL[12] TCC_EA0_ATOMIC_LEVEL[13] TCC_EA0_RDREQ[13] TCC_EA0_RDREQ_32B[13] TCC_EA0_RDREQ_LEVEL[13] TCC_EA0_ATOMIC_LEVEL[14] TCC_EA0_RDREQ[14] TCC_EA0_RDREQ_32B[14] TCC_EA0_RDREQ_LEVEL[14] TCC_EA0_ATOMIC_LEVEL[15] TCC_EA0_RDREQ[15] TCC_EA0_RDREQ_32B[15] TCC_EA0_RDREQ_LEVEL[15]
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_15.txt b/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_15.txt
new file mode 100644
index 0000000000..18c7172136
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_15.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_WRREQ[0] TCC_EA0_WRREQ_64B[0] TCC_EA0_WRREQ_LEVEL[0] TCC_HIT[0] TCC_EA0_WRREQ[1] TCC_EA0_WRREQ_64B[1] TCC_EA0_WRREQ_LEVEL[1] TCC_HIT[1] TCC_EA0_WRREQ[2] TCC_EA0_WRREQ_64B[2] TCC_EA0_WRREQ_LEVEL[2] TCC_HIT[2] TCC_EA0_WRREQ[3] TCC_EA0_WRREQ_64B[3] TCC_EA0_WRREQ_LEVEL[3] TCC_HIT[3] TCC_EA0_WRREQ[4] TCC_EA0_WRREQ_64B[4] TCC_EA0_WRREQ_LEVEL[4] TCC_HIT[4] TCC_EA0_WRREQ[5] TCC_EA0_WRREQ_64B[5] TCC_EA0_WRREQ_LEVEL[5] TCC_HIT[5] TCC_EA0_WRREQ[6] TCC_EA0_WRREQ_64B[6] TCC_EA0_WRREQ_LEVEL[6] TCC_HIT[6] TCC_EA0_WRREQ[7] TCC_EA0_WRREQ_64B[7] TCC_EA0_WRREQ_LEVEL[7] TCC_HIT[7] TCC_EA0_WRREQ[8] TCC_EA0_WRREQ_64B[8] TCC_EA0_WRREQ_LEVEL[8] TCC_HIT[8] TCC_EA0_WRREQ[9] TCC_EA0_WRREQ_64B[9] TCC_EA0_WRREQ_LEVEL[9] TCC_HIT[9] TCC_EA0_WRREQ[10] TCC_EA0_WRREQ_64B[10] TCC_EA0_WRREQ_LEVEL[10] TCC_HIT[10] TCC_EA0_WRREQ[11] TCC_EA0_WRREQ_64B[11] TCC_EA0_WRREQ_LEVEL[11] TCC_HIT[11] TCC_EA0_WRREQ[12] TCC_EA0_WRREQ_64B[12] TCC_EA0_WRREQ_LEVEL[12] TCC_HIT[12] TCC_EA0_WRREQ[13] TCC_EA0_WRREQ_64B[13] TCC_EA0_WRREQ_LEVEL[13] TCC_HIT[13] TCC_EA0_WRREQ[14] TCC_EA0_WRREQ_64B[14] TCC_EA0_WRREQ_LEVEL[14] TCC_HIT[14] TCC_EA0_WRREQ[15] TCC_EA0_WRREQ_64B[15] TCC_EA0_WRREQ_LEVEL[15] TCC_HIT[15]
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_16.txt b/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_16.txt
new file mode 100644
index 0000000000..fb70f1d1b6
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_16.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_MISS[0] TCC_READ[0] TCC_REQ[0] TCC_RW_REQ[0] TCC_MISS[1] TCC_READ[1] TCC_REQ[1] TCC_RW_REQ[1] TCC_MISS[2] TCC_READ[2] TCC_REQ[2] TCC_RW_REQ[2] TCC_MISS[3] TCC_READ[3] TCC_REQ[3] TCC_RW_REQ[3] TCC_MISS[4] TCC_READ[4] TCC_REQ[4] TCC_RW_REQ[4] TCC_MISS[5] TCC_READ[5] TCC_REQ[5] TCC_RW_REQ[5] TCC_MISS[6] TCC_READ[6] TCC_REQ[6] TCC_RW_REQ[6] TCC_MISS[7] TCC_READ[7] TCC_REQ[7] TCC_RW_REQ[7] TCC_MISS[8] TCC_READ[8] TCC_REQ[8] TCC_RW_REQ[8] TCC_MISS[9] TCC_READ[9] TCC_REQ[9] TCC_RW_REQ[9] TCC_MISS[10] TCC_READ[10] TCC_REQ[10] TCC_RW_REQ[10] TCC_MISS[11] TCC_READ[11] TCC_REQ[11] TCC_RW_REQ[11] TCC_MISS[12] TCC_READ[12] TCC_REQ[12] TCC_RW_REQ[12] TCC_MISS[13] TCC_READ[13] TCC_REQ[13] TCC_RW_REQ[13] TCC_MISS[14] TCC_READ[14] TCC_REQ[14] TCC_RW_REQ[14] TCC_MISS[15] TCC_READ[15] TCC_REQ[15] TCC_RW_REQ[15]
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_17.txt b/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_17.txt
new file mode 100644
index 0000000000..bc456a6496
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_17.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_TAG_STALL[0] TCC_TOO_MANY_EA_WRREQS_STALL[0] TCC_WRITE[0] TCC_TAG_STALL[1] TCC_TOO_MANY_EA_WRREQS_STALL[1] TCC_WRITE[1] TCC_TAG_STALL[2] TCC_TOO_MANY_EA_WRREQS_STALL[2] TCC_WRITE[2] TCC_TAG_STALL[3] TCC_TOO_MANY_EA_WRREQS_STALL[3] TCC_WRITE[3] TCC_TAG_STALL[4] TCC_TOO_MANY_EA_WRREQS_STALL[4] TCC_WRITE[4] TCC_TAG_STALL[5] TCC_TOO_MANY_EA_WRREQS_STALL[5] TCC_WRITE[5] TCC_TAG_STALL[6] TCC_TOO_MANY_EA_WRREQS_STALL[6] TCC_WRITE[6] TCC_TAG_STALL[7] TCC_TOO_MANY_EA_WRREQS_STALL[7] TCC_WRITE[7] TCC_TAG_STALL[8] TCC_TOO_MANY_EA_WRREQS_STALL[8] TCC_WRITE[8] TCC_TAG_STALL[9] TCC_TOO_MANY_EA_WRREQS_STALL[9] TCC_WRITE[9] TCC_TAG_STALL[10] TCC_TOO_MANY_EA_WRREQS_STALL[10] TCC_WRITE[10] TCC_TAG_STALL[11] TCC_TOO_MANY_EA_WRREQS_STALL[11] TCC_WRITE[11] TCC_TAG_STALL[12] TCC_TOO_MANY_EA_WRREQS_STALL[12] TCC_WRITE[12] TCC_TAG_STALL[13] TCC_TOO_MANY_EA_WRREQS_STALL[13] TCC_WRITE[13] TCC_TAG_STALL[14] TCC_TOO_MANY_EA_WRREQS_STALL[14] TCC_WRITE[14] TCC_TAG_STALL[15] TCC_TOO_MANY_EA_WRREQS_STALL[15] TCC_WRITE[15]
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_2.txt b/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..cc3b592b06
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 TCP_VOLATILE_sum TCP_TOTAL_ACCESSES_sum TCP_TOTAL_READ_sum TCP_TOTAL_WRITE_sum TA_BUFFER_ATOMIC_WAVEFRONTS_sum TA_BUFFER_TOTAL_CYCLES_sum TD_ATOMIC_WAVEFRONT_sum TD_STORE_WAVEFRONT_sum SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION CPF_CPF_STAT_IDLE CPF_CPF_TCIU_IDLE TCC_REQ_sum TCC_STREAMING_REQ_sum TCC_HIT_sum TCC_MISS_sum
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_3.txt b/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..d5ba30d7f9
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS TCP_TOTAL_ATOMIC_WITH_RET_sum TCP_TOTAL_ATOMIC_WITHOUT_RET_sum TCP_TOTAL_WRITEBACK_INVALIDATES_sum TCP_TOTAL_CACHE_ACCESSES_sum TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES_sum TD_COALESCABLE_WAVEFRONT_sum SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE CPF_CMP_UTCL1_STALL_ON_TRANSLATION TCC_READ_sum TCC_WRITE_sum TCC_ATOMIC_sum TCC_WRITEBACK_sum
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_4.txt b/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..8c9fd3eb59
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAIT_ANY SQ_WAIT_INST_ANY SQ_ACTIVE_INST_ANY SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU TCP_UTCL1_TRANSLATION_MISS_sum TCP_UTCL1_TRANSLATION_HIT_sum TCP_UTCL1_PERMISSION_MISS_sum TCP_UTCL1_REQUEST_sum TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_TOTAL_WAVEFRONTS_sum SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE TCC_EA0_WRREQ_sum TCC_EA0_WRREQ_64B_sum TCC_EA0_WR_UNCACHED_32B_sum TCC_EA0_WRREQ_DRAM_sum
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_5.txt b/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..9e5c371b8f
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_SCA SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU TCP_TCC_READ_REQ_sum TCP_TCC_WRITE_REQ_sum TCP_TCC_ATOMIC_WITH_RET_REQ_sum TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN CPC_ME1_DC0_SPI_BUSY TCC_EA0_RDREQ_sum TCC_EA0_RDREQ_32B_sum TCC_BUBBLE_sum TCC_EA0_RD_UNCACHED_32B_sum
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_6.txt b/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..cb0cdfc532
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_THREAD_CYCLES_VALU SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 TCP_TCC_NC_READ_REQ_sum TCP_TCC_NC_WRITE_REQ_sum TCP_TCC_NC_ATOMIC_REQ_sum TCP_TCC_UC_READ_REQ_sum TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN TCC_EA0_RDREQ_DRAM_sum TCC_TAG_STALL_sum TCC_NORMAL_WRITEBACK_sum TCC_ALL_TC_OP_WB_WRITEBACK_sum
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_7.txt b/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..b8b1ed2da2
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED TCP_TCC_UC_WRITE_REQ_sum TCP_TCC_UC_ATOMIC_REQ_sum TCP_TCC_CC_READ_REQ_sum TCP_TCC_CC_WRITE_REQ_sum TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR TCC_NORMAL_EVICT_sum TCC_ALL_TC_OP_INV_EVICT_sum TCC_TOO_MANY_EA_WRREQS_STALL_sum TCC_EA0_ATOMIC_sum
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_8.txt b/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..f9c42e5b39
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES TCP_TCC_CC_ATOMIC_REQ_sum TCP_TCC_RW_READ_REQ_sum TCP_TCC_RW_WRITE_REQ_sum TCP_TCC_RW_ATOMIC_REQ_sum SPI_VWC_CSC_WR SPI_RA_BULKY_CU_FULL_CSN TCC_EA0_RDREQ_LEVEL_sum TCC_EA0_WRREQ_LEVEL_sum TCC_EA0_ATOMIC_LEVEL_sum TCC_EA0_WRREQ_STALL_sum
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_9.txt b/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..a838f65389
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300X_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ TCP_PENDING_STALL_CYCLES_sum
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300X_A1/perfmon/timestamps.txt b/tests/workloads/kernel_substr/MI300X_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..2970e26c4e
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300X_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel: vecCopy
diff --git a/tests/workloads/kernel_substr/MI300X_A1/pmc_perf.csv b/tests/workloads/kernel_substr/MI300X_A1/pmc_perf.csv
new file mode 100644
index 0000000000..2b8d32e5d8
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300X_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_1,Correlation_ID_1,XCC_Index,TCC_ATOMIC[0],TCC_BUBBLE[0],TCC_CYCLE[0],TCC_EA0_ATOMIC[0],TCC_ATOMIC[1],TCC_BUBBLE[1],TCC_CYCLE[1],TCC_EA0_ATOMIC[1],TCC_ATOMIC[2],TCC_BUBBLE[2],TCC_CYCLE[2],TCC_EA0_ATOMIC[2],TCC_ATOMIC[3],TCC_BUBBLE[3],TCC_CYCLE[3],TCC_EA0_ATOMIC[3],TCC_ATOMIC[4],TCC_BUBBLE[4],TCC_CYCLE[4],TCC_EA0_ATOMIC[4],TCC_ATOMIC[5],TCC_BUBBLE[5],TCC_CYCLE[5],TCC_EA0_ATOMIC[5],TCC_ATOMIC[6],TCC_BUBBLE[6],TCC_CYCLE[6],TCC_EA0_ATOMIC[6],TCC_ATOMIC[7],TCC_BUBBLE[7],TCC_CYCLE[7],TCC_EA0_ATOMIC[7],TCC_ATOMIC[8],TCC_BUBBLE[8],TCC_CYCLE[8],TCC_EA0_ATOMIC[8],TCC_ATOMIC[9],TCC_BUBBLE[9],TCC_CYCLE[9],TCC_EA0_ATOMIC[9],TCC_ATOMIC[10],TCC_BUBBLE[10],TCC_CYCLE[10],TCC_EA0_ATOMIC[10],TCC_ATOMIC[11],TCC_BUBBLE[11],TCC_CYCLE[11],TCC_EA0_ATOMIC[11],TCC_ATOMIC[12],TCC_BUBBLE[12],TCC_CYCLE[12],TCC_EA0_ATOMIC[12],TCC_ATOMIC[13],TCC_BUBBLE[13],TCC_CYCLE[13],TCC_EA0_ATOMIC[13],TCC_ATOMIC[14],TCC_BUBBLE[14],TCC_CYCLE[14],TCC_EA0_ATOMIC[14],TCC_ATOMIC[15],TCC_BUBBLE[15],TCC_CYCLE[15],TCC_EA0_ATOMIC[15],TCC_ATOMIC[16],TCC_BUBBLE[16],TCC_CYCLE[16],TCC_EA0_ATOMIC[16],TCC_ATOMIC[17],TCC_BUBBLE[17],TCC_CYCLE[17],TCC_EA0_ATOMIC[17],TCC_ATOMIC[18],TCC_BUBBLE[18],TCC_CYCLE[18],TCC_EA0_ATOMIC[18],TCC_ATOMIC[19],TCC_BUBBLE[19],TCC_CYCLE[19],TCC_EA0_ATOMIC[19],TCC_ATOMIC[20],TCC_BUBBLE[20],TCC_CYCLE[20],TCC_EA0_ATOMIC[20],TCC_ATOMIC[21],TCC_BUBBLE[21],TCC_CYCLE[21],TCC_EA0_ATOMIC[21],TCC_ATOMIC[22],TCC_BUBBLE[22],TCC_CYCLE[22],TCC_EA0_ATOMIC[22],TCC_ATOMIC[23],TCC_BUBBLE[23],TCC_CYCLE[23],TCC_EA0_ATOMIC[23],TCC_ATOMIC[24],TCC_BUBBLE[24],TCC_CYCLE[24],TCC_EA0_ATOMIC[24],TCC_ATOMIC[25],TCC_BUBBLE[25],TCC_CYCLE[25],TCC_EA0_ATOMIC[25],TCC_ATOMIC[26],TCC_BUBBLE[26],TCC_CYCLE[26],TCC_EA0_ATOMIC[26],TCC_ATOMIC[27],TCC_BUBBLE[27],TCC_CYCLE[27],TCC_EA0_ATOMIC[27],TCC_ATOMIC[28],TCC_BUBBLE[28],TCC_CYCLE[28],TCC_EA0_ATOMIC[28],TCC_ATOMIC[29],TCC_BUBBLE[29],TCC_CYCLE[29],TCC_EA0_ATOMIC[29],TCC_ATOMIC[30],TCC_BUBBLE[30],TCC_CYCLE[30],TCC_EA0_ATOMIC[30],TCC_ATOMIC[31],TCC_BUBBLE[31],TCC_CYCLE[31],TCC_EA0_ATOMIC[31],TCC_ATOMIC[32],TCC_BUBBLE[32],TCC_CYCLE[32],TCC_EA0_ATOMIC[32],TCC_ATOMIC[33],TCC_BUBBLE[33],TCC_CYCLE[33],TCC_EA0_ATOMIC[33],TCC_ATOMIC[34],TCC_BUBBLE[34],TCC_CYCLE[34],TCC_EA0_ATOMIC[34],TCC_ATOMIC[35],TCC_BUBBLE[35],TCC_CYCLE[35],TCC_EA0_ATOMIC[35],TCC_ATOMIC[36],TCC_BUBBLE[36],TCC_CYCLE[36],TCC_EA0_ATOMIC[36],TCC_ATOMIC[37],TCC_BUBBLE[37],TCC_CYCLE[37],TCC_EA0_ATOMIC[37],TCC_ATOMIC[38],TCC_BUBBLE[38],TCC_CYCLE[38],TCC_EA0_ATOMIC[38],TCC_ATOMIC[39],TCC_BUBBLE[39],TCC_CYCLE[39],TCC_EA0_ATOMIC[39],TCC_ATOMIC[40],TCC_BUBBLE[40],TCC_CYCLE[40],TCC_EA0_ATOMIC[40],TCC_ATOMIC[41],TCC_BUBBLE[41],TCC_CYCLE[41],TCC_EA0_ATOMIC[41],TCC_ATOMIC[42],TCC_BUBBLE[42],TCC_CYCLE[42],TCC_EA0_ATOMIC[42],TCC_ATOMIC[43],TCC_BUBBLE[43],TCC_CYCLE[43],TCC_EA0_ATOMIC[43],TCC_ATOMIC[44],TCC_BUBBLE[44],TCC_CYCLE[44],TCC_EA0_ATOMIC[44],TCC_ATOMIC[45],TCC_BUBBLE[45],TCC_CYCLE[45],TCC_EA0_ATOMIC[45],TCC_ATOMIC[46],TCC_BUBBLE[46],TCC_CYCLE[46],TCC_EA0_ATOMIC[46],TCC_ATOMIC[47],TCC_BUBBLE[47],TCC_CYCLE[47],TCC_EA0_ATOMIC[47],TCC_ATOMIC[48],TCC_BUBBLE[48],TCC_CYCLE[48],TCC_EA0_ATOMIC[48],TCC_ATOMIC[49],TCC_BUBBLE[49],TCC_CYCLE[49],TCC_EA0_ATOMIC[49],TCC_ATOMIC[50],TCC_BUBBLE[50],TCC_CYCLE[50],TCC_EA0_ATOMIC[50],TCC_ATOMIC[51],TCC_BUBBLE[51],TCC_CYCLE[51],TCC_EA0_ATOMIC[51],TCC_ATOMIC[52],TCC_BUBBLE[52],TCC_CYCLE[52],TCC_EA0_ATOMIC[52],TCC_ATOMIC[53],TCC_BUBBLE[53],TCC_CYCLE[53],TCC_EA0_ATOMIC[53],TCC_ATOMIC[54],TCC_BUBBLE[54],TCC_CYCLE[54],TCC_EA0_ATOMIC[54],TCC_ATOMIC[55],TCC_BUBBLE[55],TCC_CYCLE[55],TCC_EA0_ATOMIC[55],TCC_ATOMIC[56],TCC_BUBBLE[56],TCC_CYCLE[56],TCC_EA0_ATOMIC[56],TCC_ATOMIC[57],TCC_BUBBLE[57],TCC_CYCLE[57],TCC_EA0_ATOMIC[57],TCC_ATOMIC[58],TCC_BUBBLE[58],TCC_CYCLE[58],TCC_EA0_ATOMIC[58],TCC_ATOMIC[59],TCC_BUBBLE[59],TCC_CYCLE[59],TCC_EA0_ATOMIC[59],TCC_ATOMIC[60],TCC_BUBBLE[60],TCC_CYCLE[60],TCC_EA0_ATOMIC[60],TCC_ATOMIC[61],TCC_BUBBLE[61],TCC_CYCLE[61],TCC_EA0_ATOMIC[61],TCC_ATOMIC[62],TCC_BUBBLE[62],TCC_CYCLE[62],TCC_EA0_ATOMIC[62],TCC_ATOMIC[63],TCC_BUBBLE[63],TCC_CYCLE[63],TCC_EA0_ATOMIC[63],TCC_ATOMIC[64],TCC_BUBBLE[64],TCC_CYCLE[64],TCC_EA0_ATOMIC[64],TCC_ATOMIC[65],TCC_BUBBLE[65],TCC_CYCLE[65],TCC_EA0_ATOMIC[65],TCC_ATOMIC[66],TCC_BUBBLE[66],TCC_CYCLE[66],TCC_EA0_ATOMIC[66],TCC_ATOMIC[67],TCC_BUBBLE[67],TCC_CYCLE[67],TCC_EA0_ATOMIC[67],TCC_ATOMIC[68],TCC_BUBBLE[68],TCC_CYCLE[68],TCC_EA0_ATOMIC[68],TCC_ATOMIC[69],TCC_BUBBLE[69],TCC_CYCLE[69],TCC_EA0_ATOMIC[69],TCC_ATOMIC[70],TCC_BUBBLE[70],TCC_CYCLE[70],TCC_EA0_ATOMIC[70],TCC_ATOMIC[71],TCC_BUBBLE[71],TCC_CYCLE[71],TCC_EA0_ATOMIC[71],TCC_ATOMIC[72],TCC_BUBBLE[72],TCC_CYCLE[72],TCC_EA0_ATOMIC[72],TCC_ATOMIC[73],TCC_BUBBLE[73],TCC_CYCLE[73],TCC_EA0_ATOMIC[73],TCC_ATOMIC[74],TCC_BUBBLE[74],TCC_CYCLE[74],TCC_EA0_ATOMIC[74],TCC_ATOMIC[75],TCC_BUBBLE[75],TCC_CYCLE[75],TCC_EA0_ATOMIC[75],TCC_ATOMIC[76],TCC_BUBBLE[76],TCC_CYCLE[76],TCC_EA0_ATOMIC[76],TCC_ATOMIC[77],TCC_BUBBLE[77],TCC_CYCLE[77],TCC_EA0_ATOMIC[77],TCC_ATOMIC[78],TCC_BUBBLE[78],TCC_CYCLE[78],TCC_EA0_ATOMIC[78],TCC_ATOMIC[79],TCC_BUBBLE[79],TCC_CYCLE[79],TCC_EA0_ATOMIC[79],TCC_ATOMIC[80],TCC_BUBBLE[80],TCC_CYCLE[80],TCC_EA0_ATOMIC[80],TCC_ATOMIC[81],TCC_BUBBLE[81],TCC_CYCLE[81],TCC_EA0_ATOMIC[81],TCC_ATOMIC[82],TCC_BUBBLE[82],TCC_CYCLE[82],TCC_EA0_ATOMIC[82],TCC_ATOMIC[83],TCC_BUBBLE[83],TCC_CYCLE[83],TCC_EA0_ATOMIC[83],TCC_ATOMIC[84],TCC_BUBBLE[84],TCC_CYCLE[84],TCC_EA0_ATOMIC[84],TCC_ATOMIC[85],TCC_BUBBLE[85],TCC_CYCLE[85],TCC_EA0_ATOMIC[85],TCC_ATOMIC[86],TCC_BUBBLE[86],TCC_CYCLE[86],TCC_EA0_ATOMIC[86],TCC_ATOMIC[87],TCC_BUBBLE[87],TCC_CYCLE[87],TCC_EA0_ATOMIC[87],TCC_ATOMIC[88],TCC_BUBBLE[88],TCC_CYCLE[88],TCC_EA0_ATOMIC[88],TCC_ATOMIC[89],TCC_BUBBLE[89],TCC_CYCLE[89],TCC_EA0_ATOMIC[89],TCC_ATOMIC[90],TCC_BUBBLE[90],TCC_CYCLE[90],TCC_EA0_ATOMIC[90],TCC_ATOMIC[91],TCC_BUBBLE[91],TCC_CYCLE[91],TCC_EA0_ATOMIC[91],TCC_ATOMIC[92],TCC_BUBBLE[92],TCC_CYCLE[92],TCC_EA0_ATOMIC[92],TCC_ATOMIC[93],TCC_BUBBLE[93],TCC_CYCLE[93],TCC_EA0_ATOMIC[93],TCC_ATOMIC[94],TCC_BUBBLE[94],TCC_CYCLE[94],TCC_EA0_ATOMIC[94],TCC_ATOMIC[95],TCC_BUBBLE[95],TCC_CYCLE[95],TCC_EA0_ATOMIC[95],TCC_ATOMIC[96],TCC_BUBBLE[96],TCC_CYCLE[96],TCC_EA0_ATOMIC[96],TCC_ATOMIC[97],TCC_BUBBLE[97],TCC_CYCLE[97],TCC_EA0_ATOMIC[97],TCC_ATOMIC[98],TCC_BUBBLE[98],TCC_CYCLE[98],TCC_EA0_ATOMIC[98],TCC_ATOMIC[99],TCC_BUBBLE[99],TCC_CYCLE[99],TCC_EA0_ATOMIC[99],TCC_ATOMIC[100],TCC_BUBBLE[100],TCC_CYCLE[100],TCC_EA0_ATOMIC[100],TCC_ATOMIC[101],TCC_BUBBLE[101],TCC_CYCLE[101],TCC_EA0_ATOMIC[101],TCC_ATOMIC[102],TCC_BUBBLE[102],TCC_CYCLE[102],TCC_EA0_ATOMIC[102],TCC_ATOMIC[103],TCC_BUBBLE[103],TCC_CYCLE[103],TCC_EA0_ATOMIC[103],TCC_ATOMIC[104],TCC_BUBBLE[104],TCC_CYCLE[104],TCC_EA0_ATOMIC[104],TCC_ATOMIC[105],TCC_BUBBLE[105],TCC_CYCLE[105],TCC_EA0_ATOMIC[105],TCC_ATOMIC[106],TCC_BUBBLE[106],TCC_CYCLE[106],TCC_EA0_ATOMIC[106],TCC_ATOMIC[107],TCC_BUBBLE[107],TCC_CYCLE[107],TCC_EA0_ATOMIC[107],TCC_ATOMIC[108],TCC_BUBBLE[108],TCC_CYCLE[108],TCC_EA0_ATOMIC[108],TCC_ATOMIC[109],TCC_BUBBLE[109],TCC_CYCLE[109],TCC_EA0_ATOMIC[109],TCC_ATOMIC[110],TCC_BUBBLE[110],TCC_CYCLE[110],TCC_EA0_ATOMIC[110],TCC_ATOMIC[111],TCC_BUBBLE[111],TCC_CYCLE[111],TCC_EA0_ATOMIC[111],TCC_ATOMIC[112],TCC_BUBBLE[112],TCC_CYCLE[112],TCC_EA0_ATOMIC[112],TCC_ATOMIC[113],TCC_BUBBLE[113],TCC_CYCLE[113],TCC_EA0_ATOMIC[113],TCC_ATOMIC[114],TCC_BUBBLE[114],TCC_CYCLE[114],TCC_EA0_ATOMIC[114],TCC_ATOMIC[115],TCC_BUBBLE[115],TCC_CYCLE[115],TCC_EA0_ATOMIC[115],TCC_ATOMIC[116],TCC_BUBBLE[116],TCC_CYCLE[116],TCC_EA0_ATOMIC[116],TCC_ATOMIC[117],TCC_BUBBLE[117],TCC_CYCLE[117],TCC_EA0_ATOMIC[117],TCC_ATOMIC[118],TCC_BUBBLE[118],TCC_CYCLE[118],TCC_EA0_ATOMIC[118],TCC_ATOMIC[119],TCC_BUBBLE[119],TCC_CYCLE[119],TCC_EA0_ATOMIC[119],TCC_ATOMIC[120],TCC_BUBBLE[120],TCC_CYCLE[120],TCC_EA0_ATOMIC[120],TCC_ATOMIC[121],TCC_BUBBLE[121],TCC_CYCLE[121],TCC_EA0_ATOMIC[121],TCC_ATOMIC[122],TCC_BUBBLE[122],TCC_CYCLE[122],TCC_EA0_ATOMIC[122],TCC_ATOMIC[123],TCC_BUBBLE[123],TCC_CYCLE[123],TCC_EA0_ATOMIC[123],TCC_ATOMIC[124],TCC_BUBBLE[124],TCC_CYCLE[124],TCC_EA0_ATOMIC[124],TCC_ATOMIC[125],TCC_BUBBLE[125],TCC_CYCLE[125],TCC_EA0_ATOMIC[125],TCC_ATOMIC[126],TCC_BUBBLE[126],TCC_CYCLE[126],TCC_EA0_ATOMIC[126],TCC_ATOMIC[127],TCC_BUBBLE[127],TCC_CYCLE[127],TCC_EA0_ATOMIC[127],Wave_Size_2,Correlation_ID_2,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,TA_FLAT_ATOMIC_WAVEFRONTS_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,TCC_ALL_TC_OP_INV_EVICT_sum,TCC_EA0_ATOMIC_sum,TCC_NORMAL_EVICT_sum,TCC_TOO_MANY_EA_WRREQS_STALL_sum,TCP_TCC_CC_READ_REQ_sum,TCP_TCC_CC_WRITE_REQ_sum,TCP_TCC_UC_ATOMIC_REQ_sum,TCP_TCC_UC_WRITE_REQ_sum,Wave_Size_3,Correlation_ID_3,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,TCC_EA0_ATOMIC_LEVEL_sum,TCC_EA0_RDREQ_LEVEL_sum,TCC_EA0_WRREQ_LEVEL_sum,TCC_EA0_WRREQ_STALL_sum,TCP_TCC_CC_ATOMIC_REQ_sum,TCP_TCC_RW_ATOMIC_REQ_sum,TCP_TCC_RW_READ_REQ_sum,TCP_TCC_RW_WRITE_REQ_sum,Wave_Size_4,Correlation_ID_4,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SPI_RA_REQ_NO_ALLOC,SPI_RA_REQ_NO_ALLOC_CSN,CPC_CPC_STAT_STALL,CPC_UTCL1_STALL_ON_TRANSLATION,CPF_CPF_STAT_IDLE,CPF_CPF_TCIU_IDLE,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,TA_BUFFER_TOTAL_CYCLES_sum,TCC_HIT_sum,TCC_MISS_sum,TCC_REQ_sum,TCC_STREAMING_REQ_sum,TCP_TOTAL_ACCESSES_sum,TCP_TOTAL_READ_sum,TCP_TOTAL_WRITE_sum,TCP_VOLATILE_sum,TD_ATOMIC_WAVEFRONT_sum,TD_STORE_WAVEFRONT_sum,Wave_Size_5,Correlation_ID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SQ_INST_CYCLES_SALU,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,CPC_ME1_DC0_SPI_BUSY,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,TCC_BUBBLE_sum,TCC_EA0_RDREQ_32B_sum,TCC_EA0_RDREQ_sum,TCC_EA0_RD_UNCACHED_32B_sum,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,TCP_TCC_READ_REQ_sum,TCP_TCC_WRITE_REQ_sum,Start_Timestamp,End_Timestamp
+0,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) 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diff --git a/tests/workloads/kernel_substr/MI300X_A1/sysinfo.csv b/tests/workloads/kernel_substr/MI300X_A1/sysinfo.csv
new file mode 100644
index 0000000000..2f8050c9db
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300X_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+kernel_substr,./tests/vcopy -n 1048576 -b 256 -i 3,SQ|LDS|SQC|TA|TD|TCP|TCC|SPI|CPC|CPF,Wed 29 May 2024 12:00:15 PM  (CDT),2,splinter-126-wr-c6,AMD Ryzen 9 7950X 16-Core Processor,"American Megatrends International, LLC.VS2683299N.FD",Ubuntu 22.04.4 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,114656528,,6.2.0-13611,113-MI3SRIOV-001,SPX,NPS1,MI300X_A1,gfx942,32,4096,304,4,32,64,1024,32,2100,1300,2100,1300,128,32,160,4,5324.8,8
diff --git a/tests/workloads/kernel_substr/MI300X_A1/timestamps.csv b/tests/workloads/kernel_substr/MI300X_A1/timestamps.csv
new file mode 100644
index 0000000000..5ee7f56ce6
--- /dev/null
+++ b/tests/workloads/kernel_substr/MI300X_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,60633,1,964231,964231,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716205324090593,716205324106872,0
+2,60633,1,964231,964231,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716205324129270,716205324143230,0
+3,60633,1,964231,964231,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716205324163469,716205324176349,0
diff --git a/tests/workloads/no_roof/MI300A_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/no_roof/MI300A_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..fed43cdffe
--- /dev/null
+++ b/tests/workloads/no_roof/MI300A_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,11995,1,151267,151267,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",74045395877344,74045395886077,0,201355.0,201355.0,16384.0,65536.0,28279.0,2264768.0
+1,11995,1,151267,151267,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",74045395904986,74045395911315,0,184156.0,184156.0,16384.0,65536.0,13088.0,1048808.0
+2,11995,1,151267,151267,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",74045395928301,74045395934431,0,170228.0,170228.0,16384.0,65536.0,12872.0,1049372.0
diff --git a/tests/workloads/no_roof/MI300A_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/no_roof/MI300A_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..a7c53409a8
--- /dev/null
+++ b/tests/workloads/no_roof/MI300A_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,11995,1,151278,151278,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",74045395877344,74045395886077,0,0.0,0.0,0.0
+1,11995,1,151278,151278,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",74045395904986,74045395911315,0,0.0,0.0,0.0
+2,11995,1,151278,151278,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",74045395928301,74045395934431,0,0.0,0.0,0.0
diff --git a/tests/workloads/no_roof/MI300A_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/no_roof/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..913355831f
--- /dev/null
+++ b/tests/workloads/no_roof/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,151289,151289,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",74045395877344,74045395886077,0,65536.0,286398.0,22794112.0
+1,11995,1,151289,151289,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",74045395904986,74045395911315,0,65536.0,206544.0,16516216.0
+2,11995,1,151289,151289,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",74045395928301,74045395934431,0,65536.0,204172.0,16323120.0
diff --git a/tests/workloads/no_roof/MI300A_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/no_roof/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..0e295d28f9
--- /dev/null
+++ b/tests/workloads/no_roof/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,151300,151300,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",74045395877344,74045395886077,0,32768.0,529027.0,42317060.0
+1,11995,1,151300,151300,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",74045395904986,74045395911315,0,32768.0,420165.0,33613524.0
+2,11995,1,151300,151300,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",74045395928301,74045395934431,0,32768.0,422235.0,33771752.0
diff --git a/tests/workloads/no_roof/MI300A_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/no_roof/MI300A_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..00a049bcec
--- /dev/null
+++ b/tests/workloads/no_roof/MI300A_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,11995,1,151311,151311,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",74045395877344,74045395886077,0,206573.0,206573.0,112205.0,826292.0,16384.0,13853425.0,251506.0,0.0,55825196.0
+1,11995,1,151311,151311,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",74045395904986,74045395911315,0,179609.0,179609.0,96494.0,718436.0,16384.0,11322040.0,206003.0,0.0,45678476.0
+2,11995,1,151311,151311,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",74045395928301,74045395934431,0,174394.0,174394.0,91784.0,697576.0,16384.0,10102825.0,193586.0,0.0,40835216.0
diff --git a/tests/workloads/no_roof/MI300A_A1/log.txt b/tests/workloads/no_roof/MI300A_A1/log.txt
new file mode 100644
index 0000000000..2875d3b1c2
--- /dev/null
+++ b/tests/workloads/no_roof/MI300A_A1/log.txt
@@ -0,0 +1,227 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/no_roof/MI300A_A1
+Target: MI300A_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: None
+Hardware Blocks: All
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+[profiling] Current input file: tests/workloads/no_roof/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH_LEVEL
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+[profiling] Current input file: tests/workloads/no_roof/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+[profiling] Current input file: tests/workloads/no_roof/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+[profiling] Current input file: tests/workloads/no_roof/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+[profiling] Current input file: tests/workloads/no_roof/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+[profiling] Current input file: tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_CVT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_WR
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_RD
+[profiling] Current input file: tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
+[profiling] Current input file: tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_HITS
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_ICACHE_MISSES
+[profiling] Current input file: tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_HITS
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES_DUPLICATE
+[profiling] Current input file: tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+[profiling] Current input file: tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_13.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[1]
+[profiling] Current input file: tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_14.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[3]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[3]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[3]
+[profiling] Current input file: tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_15.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[1]
+[profiling] Current input file: tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_16.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[1]
+[profiling] Current input file: tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_17.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[2]
+[profiling] Current input file: tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F64
+[profiling] Current input file: tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_GDS
+[profiling] Current input file: tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
+[profiling] Current input file: tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_SCA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_MISC
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_WR
+[profiling] Current input file: tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_THREAD_CYCLES_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ADDR_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_UNALIGNED_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_EQ_64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_48
+[profiling] Current input file: tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ITEMS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_MEM_VIOLATIONS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ATOMIC_RETURN
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_IDX_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_RESTORED
+[profiling] Current input file: tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_VALU_MFMA_BUSY_CYCLES
+[profiling] Current input file: tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_INST_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_READ_REQ
+[profiling] Current input file: tests/workloads/no_roof/MI300A_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/no_roof/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/no_roof/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..293092f641
--- /dev/null
+++ b/tests/workloads/no_roof/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/no_roof/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..08439eedce
--- /dev/null
+++ b/tests/workloads/no_roof/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/no_roof/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..6cca322d4e
--- /dev/null
+++ b/tests/workloads/no_roof/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/no_roof/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..e527ad31ba
--- /dev/null
+++ b/tests/workloads/no_roof/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/no_roof/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..3f8e04adb3
--- /dev/null
+++ b/tests/workloads/no_roof/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_0.txt b/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..ebc550fbfe
--- /dev/null
+++ b/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD GRBM_COUNT GRBM_GUI_ACTIVE TCP_GATE_EN1_sum TCP_GATE_EN2_sum TCP_TD_TCP_STALL_CYCLES_sum TCP_TCR_TCP_STALL_CYCLES_sum TA_TA_BUSY_sum TA_BUFFER_WAVEFRONTS_sum TD_TD_BUSY_sum TD_TC_STALL_sum SPI_CSN_WINDOW_VALID SPI_CSN_BUSY CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE CPF_CPF_STAT_BUSY CPF_CPF_STAT_STALL TCC_CYCLE_sum TCC_BUSY_sum TCC_PROBE_sum TCC_PROBE_ALL_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_1.txt b/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..9ad887ddbb
--- /dev/null
+++ b/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 GRBM_SPI_BUSY TCP_READ_TAGCONFLICT_STALL_CYCLES_sum TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum TCP_TA_TCP_STATE_READ_sum TA_BUFFER_READ_WAVEFRONTS_sum TA_BUFFER_WRITE_WAVEFRONTS_sum TD_SPI_STALL_sum TD_LOAD_WAVEFRONT_sum SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE CPC_CPC_TCIU_BUSY CPC_CPC_TCIU_IDLE CPF_CPF_TCIU_BUSY CPF_CPF_TCIU_STALL TCC_NC_REQ_sum TCC_UC_REQ_sum TCC_CC_REQ_sum TCC_RW_REQ_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_10.txt b/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..21c59688f7
--- /dev/null
+++ b/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_11.txt b/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..df6d67d7b7
--- /dev/null
+++ b/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_12.txt b/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..6e5320c11c
--- /dev/null
+++ b/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_13.txt b/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_13.txt
new file mode 100644
index 0000000000..d95492c1cd
--- /dev/null
+++ b/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_13.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_ATOMIC[0] TCC_BUBBLE[0] TCC_CYCLE[0] TCC_EA0_ATOMIC[0] TCC_ATOMIC[1] TCC_BUBBLE[1] TCC_CYCLE[1] TCC_EA0_ATOMIC[1] TCC_ATOMIC[2] TCC_BUBBLE[2] TCC_CYCLE[2] TCC_EA0_ATOMIC[2] TCC_ATOMIC[3] TCC_BUBBLE[3] TCC_CYCLE[3] TCC_EA0_ATOMIC[3] TCC_ATOMIC[4] TCC_BUBBLE[4] TCC_CYCLE[4] TCC_EA0_ATOMIC[4] TCC_ATOMIC[5] TCC_BUBBLE[5] TCC_CYCLE[5] TCC_EA0_ATOMIC[5] TCC_ATOMIC[6] TCC_BUBBLE[6] TCC_CYCLE[6] TCC_EA0_ATOMIC[6] TCC_ATOMIC[7] TCC_BUBBLE[7] TCC_CYCLE[7] TCC_EA0_ATOMIC[7] TCC_ATOMIC[8] TCC_BUBBLE[8] TCC_CYCLE[8] TCC_EA0_ATOMIC[8] TCC_ATOMIC[9] TCC_BUBBLE[9] TCC_CYCLE[9] TCC_EA0_ATOMIC[9] TCC_ATOMIC[10] TCC_BUBBLE[10] TCC_CYCLE[10] TCC_EA0_ATOMIC[10] TCC_ATOMIC[11] TCC_BUBBLE[11] TCC_CYCLE[11] TCC_EA0_ATOMIC[11] TCC_ATOMIC[12] TCC_BUBBLE[12] TCC_CYCLE[12] TCC_EA0_ATOMIC[12] TCC_ATOMIC[13] TCC_BUBBLE[13] TCC_CYCLE[13] TCC_EA0_ATOMIC[13] TCC_ATOMIC[14] TCC_BUBBLE[14] TCC_CYCLE[14] TCC_EA0_ATOMIC[14] TCC_ATOMIC[15] TCC_BUBBLE[15] TCC_CYCLE[15] TCC_EA0_ATOMIC[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_14.txt b/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_14.txt
new file mode 100644
index 0000000000..28327b86d3
--- /dev/null
+++ b/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_14.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_ATOMIC_LEVEL[0] TCC_EA0_RDREQ[0] TCC_EA0_RDREQ_32B[0] TCC_EA0_RDREQ_LEVEL[0] TCC_EA0_ATOMIC_LEVEL[1] TCC_EA0_RDREQ[1] TCC_EA0_RDREQ_32B[1] TCC_EA0_RDREQ_LEVEL[1] TCC_EA0_ATOMIC_LEVEL[2] TCC_EA0_RDREQ[2] TCC_EA0_RDREQ_32B[2] TCC_EA0_RDREQ_LEVEL[2] TCC_EA0_ATOMIC_LEVEL[3] TCC_EA0_RDREQ[3] TCC_EA0_RDREQ_32B[3] TCC_EA0_RDREQ_LEVEL[3] TCC_EA0_ATOMIC_LEVEL[4] TCC_EA0_RDREQ[4] TCC_EA0_RDREQ_32B[4] TCC_EA0_RDREQ_LEVEL[4] TCC_EA0_ATOMIC_LEVEL[5] TCC_EA0_RDREQ[5] TCC_EA0_RDREQ_32B[5] TCC_EA0_RDREQ_LEVEL[5] TCC_EA0_ATOMIC_LEVEL[6] TCC_EA0_RDREQ[6] TCC_EA0_RDREQ_32B[6] TCC_EA0_RDREQ_LEVEL[6] TCC_EA0_ATOMIC_LEVEL[7] TCC_EA0_RDREQ[7] TCC_EA0_RDREQ_32B[7] TCC_EA0_RDREQ_LEVEL[7] TCC_EA0_ATOMIC_LEVEL[8] TCC_EA0_RDREQ[8] TCC_EA0_RDREQ_32B[8] TCC_EA0_RDREQ_LEVEL[8] TCC_EA0_ATOMIC_LEVEL[9] TCC_EA0_RDREQ[9] TCC_EA0_RDREQ_32B[9] TCC_EA0_RDREQ_LEVEL[9] TCC_EA0_ATOMIC_LEVEL[10] TCC_EA0_RDREQ[10] TCC_EA0_RDREQ_32B[10] TCC_EA0_RDREQ_LEVEL[10] TCC_EA0_ATOMIC_LEVEL[11] TCC_EA0_RDREQ[11] TCC_EA0_RDREQ_32B[11] TCC_EA0_RDREQ_LEVEL[11] TCC_EA0_ATOMIC_LEVEL[12] TCC_EA0_RDREQ[12] TCC_EA0_RDREQ_32B[12] TCC_EA0_RDREQ_LEVEL[12] TCC_EA0_ATOMIC_LEVEL[13] TCC_EA0_RDREQ[13] TCC_EA0_RDREQ_32B[13] TCC_EA0_RDREQ_LEVEL[13] TCC_EA0_ATOMIC_LEVEL[14] TCC_EA0_RDREQ[14] TCC_EA0_RDREQ_32B[14] TCC_EA0_RDREQ_LEVEL[14] TCC_EA0_ATOMIC_LEVEL[15] TCC_EA0_RDREQ[15] TCC_EA0_RDREQ_32B[15] TCC_EA0_RDREQ_LEVEL[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_15.txt b/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_15.txt
new file mode 100644
index 0000000000..033ae877ed
--- /dev/null
+++ b/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_15.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_WRREQ[0] TCC_EA0_WRREQ_64B[0] TCC_EA0_WRREQ_LEVEL[0] TCC_HIT[0] TCC_EA0_WRREQ[1] TCC_EA0_WRREQ_64B[1] TCC_EA0_WRREQ_LEVEL[1] TCC_HIT[1] TCC_EA0_WRREQ[2] TCC_EA0_WRREQ_64B[2] TCC_EA0_WRREQ_LEVEL[2] TCC_HIT[2] TCC_EA0_WRREQ[3] TCC_EA0_WRREQ_64B[3] TCC_EA0_WRREQ_LEVEL[3] TCC_HIT[3] TCC_EA0_WRREQ[4] TCC_EA0_WRREQ_64B[4] TCC_EA0_WRREQ_LEVEL[4] TCC_HIT[4] TCC_EA0_WRREQ[5] TCC_EA0_WRREQ_64B[5] TCC_EA0_WRREQ_LEVEL[5] TCC_HIT[5] TCC_EA0_WRREQ[6] TCC_EA0_WRREQ_64B[6] TCC_EA0_WRREQ_LEVEL[6] TCC_HIT[6] TCC_EA0_WRREQ[7] TCC_EA0_WRREQ_64B[7] TCC_EA0_WRREQ_LEVEL[7] TCC_HIT[7] TCC_EA0_WRREQ[8] TCC_EA0_WRREQ_64B[8] TCC_EA0_WRREQ_LEVEL[8] TCC_HIT[8] TCC_EA0_WRREQ[9] TCC_EA0_WRREQ_64B[9] TCC_EA0_WRREQ_LEVEL[9] TCC_HIT[9] TCC_EA0_WRREQ[10] TCC_EA0_WRREQ_64B[10] TCC_EA0_WRREQ_LEVEL[10] TCC_HIT[10] TCC_EA0_WRREQ[11] TCC_EA0_WRREQ_64B[11] TCC_EA0_WRREQ_LEVEL[11] TCC_HIT[11] TCC_EA0_WRREQ[12] TCC_EA0_WRREQ_64B[12] TCC_EA0_WRREQ_LEVEL[12] TCC_HIT[12] TCC_EA0_WRREQ[13] TCC_EA0_WRREQ_64B[13] TCC_EA0_WRREQ_LEVEL[13] TCC_HIT[13] TCC_EA0_WRREQ[14] TCC_EA0_WRREQ_64B[14] TCC_EA0_WRREQ_LEVEL[14] TCC_HIT[14] TCC_EA0_WRREQ[15] TCC_EA0_WRREQ_64B[15] TCC_EA0_WRREQ_LEVEL[15] TCC_HIT[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_16.txt b/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_16.txt
new file mode 100644
index 0000000000..123269c3f9
--- /dev/null
+++ b/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_16.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_MISS[0] TCC_READ[0] TCC_REQ[0] TCC_RW_REQ[0] TCC_MISS[1] TCC_READ[1] TCC_REQ[1] TCC_RW_REQ[1] TCC_MISS[2] TCC_READ[2] TCC_REQ[2] TCC_RW_REQ[2] TCC_MISS[3] TCC_READ[3] TCC_REQ[3] TCC_RW_REQ[3] TCC_MISS[4] TCC_READ[4] TCC_REQ[4] TCC_RW_REQ[4] TCC_MISS[5] TCC_READ[5] TCC_REQ[5] TCC_RW_REQ[5] TCC_MISS[6] TCC_READ[6] TCC_REQ[6] TCC_RW_REQ[6] TCC_MISS[7] TCC_READ[7] TCC_REQ[7] TCC_RW_REQ[7] TCC_MISS[8] TCC_READ[8] TCC_REQ[8] TCC_RW_REQ[8] TCC_MISS[9] TCC_READ[9] TCC_REQ[9] TCC_RW_REQ[9] TCC_MISS[10] TCC_READ[10] TCC_REQ[10] TCC_RW_REQ[10] TCC_MISS[11] TCC_READ[11] TCC_REQ[11] TCC_RW_REQ[11] TCC_MISS[12] TCC_READ[12] TCC_REQ[12] TCC_RW_REQ[12] TCC_MISS[13] TCC_READ[13] TCC_REQ[13] TCC_RW_REQ[13] TCC_MISS[14] TCC_READ[14] TCC_REQ[14] TCC_RW_REQ[14] TCC_MISS[15] TCC_READ[15] TCC_REQ[15] TCC_RW_REQ[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_17.txt b/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_17.txt
new file mode 100644
index 0000000000..102fb795bd
--- /dev/null
+++ b/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_17.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_TAG_STALL[0] TCC_TOO_MANY_EA_WRREQS_STALL[0] TCC_WRITE[0] TCC_TAG_STALL[1] TCC_TOO_MANY_EA_WRREQS_STALL[1] TCC_WRITE[1] TCC_TAG_STALL[2] TCC_TOO_MANY_EA_WRREQS_STALL[2] TCC_WRITE[2] TCC_TAG_STALL[3] TCC_TOO_MANY_EA_WRREQS_STALL[3] TCC_WRITE[3] TCC_TAG_STALL[4] TCC_TOO_MANY_EA_WRREQS_STALL[4] TCC_WRITE[4] TCC_TAG_STALL[5] TCC_TOO_MANY_EA_WRREQS_STALL[5] TCC_WRITE[5] TCC_TAG_STALL[6] TCC_TOO_MANY_EA_WRREQS_STALL[6] TCC_WRITE[6] TCC_TAG_STALL[7] TCC_TOO_MANY_EA_WRREQS_STALL[7] TCC_WRITE[7] TCC_TAG_STALL[8] TCC_TOO_MANY_EA_WRREQS_STALL[8] TCC_WRITE[8] TCC_TAG_STALL[9] TCC_TOO_MANY_EA_WRREQS_STALL[9] TCC_WRITE[9] TCC_TAG_STALL[10] TCC_TOO_MANY_EA_WRREQS_STALL[10] TCC_WRITE[10] TCC_TAG_STALL[11] TCC_TOO_MANY_EA_WRREQS_STALL[11] TCC_WRITE[11] TCC_TAG_STALL[12] TCC_TOO_MANY_EA_WRREQS_STALL[12] TCC_WRITE[12] TCC_TAG_STALL[13] TCC_TOO_MANY_EA_WRREQS_STALL[13] TCC_WRITE[13] TCC_TAG_STALL[14] TCC_TOO_MANY_EA_WRREQS_STALL[14] TCC_WRITE[14] TCC_TAG_STALL[15] TCC_TOO_MANY_EA_WRREQS_STALL[15] TCC_WRITE[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_2.txt b/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..8ff8201c5a
--- /dev/null
+++ b/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 TCP_VOLATILE_sum TCP_TOTAL_ACCESSES_sum TCP_TOTAL_READ_sum TCP_TOTAL_WRITE_sum TA_BUFFER_ATOMIC_WAVEFRONTS_sum TA_BUFFER_TOTAL_CYCLES_sum TD_ATOMIC_WAVEFRONT_sum TD_STORE_WAVEFRONT_sum SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION CPF_CPF_STAT_IDLE CPF_CPF_TCIU_IDLE TCC_REQ_sum TCC_STREAMING_REQ_sum TCC_HIT_sum TCC_MISS_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_3.txt b/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..cb10e4801d
--- /dev/null
+++ b/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS TCP_TOTAL_ATOMIC_WITH_RET_sum TCP_TOTAL_ATOMIC_WITHOUT_RET_sum TCP_TOTAL_WRITEBACK_INVALIDATES_sum TCP_TOTAL_CACHE_ACCESSES_sum TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES_sum TD_COALESCABLE_WAVEFRONT_sum SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE CPF_CMP_UTCL1_STALL_ON_TRANSLATION TCC_READ_sum TCC_WRITE_sum TCC_ATOMIC_sum TCC_WRITEBACK_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_4.txt b/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..e4e6069e38
--- /dev/null
+++ b/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAIT_ANY SQ_WAIT_INST_ANY SQ_ACTIVE_INST_ANY SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU TCP_UTCL1_TRANSLATION_MISS_sum TCP_UTCL1_TRANSLATION_HIT_sum TCP_UTCL1_PERMISSION_MISS_sum TCP_UTCL1_REQUEST_sum TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_TOTAL_WAVEFRONTS_sum SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE TCC_EA0_WRREQ_sum TCC_EA0_WRREQ_64B_sum TCC_EA0_WR_UNCACHED_32B_sum TCC_EA0_WRREQ_DRAM_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_5.txt b/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..77bd288232
--- /dev/null
+++ b/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_SCA SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU TCP_TCC_READ_REQ_sum TCP_TCC_WRITE_REQ_sum TCP_TCC_ATOMIC_WITH_RET_REQ_sum TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN CPC_ME1_DC0_SPI_BUSY TCC_EA0_RDREQ_sum TCC_EA0_RDREQ_32B_sum TCC_BUBBLE_sum TCC_EA0_RD_UNCACHED_32B_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_6.txt b/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..609c184df8
--- /dev/null
+++ b/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_THREAD_CYCLES_VALU SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 TCP_TCC_NC_READ_REQ_sum TCP_TCC_NC_WRITE_REQ_sum TCP_TCC_NC_ATOMIC_REQ_sum TCP_TCC_UC_READ_REQ_sum TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN TCC_EA0_RDREQ_DRAM_sum TCC_TAG_STALL_sum TCC_NORMAL_WRITEBACK_sum TCC_ALL_TC_OP_WB_WRITEBACK_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_7.txt b/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..5881e5fb8f
--- /dev/null
+++ b/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED TCP_TCC_UC_WRITE_REQ_sum TCP_TCC_UC_ATOMIC_REQ_sum TCP_TCC_CC_READ_REQ_sum TCP_TCC_CC_WRITE_REQ_sum TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR TCC_NORMAL_EVICT_sum TCC_ALL_TC_OP_INV_EVICT_sum TCC_TOO_MANY_EA_WRREQS_STALL_sum TCC_EA0_ATOMIC_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_8.txt b/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..66317384f5
--- /dev/null
+++ b/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES TCP_TCC_CC_ATOMIC_REQ_sum TCP_TCC_RW_READ_REQ_sum TCP_TCC_RW_WRITE_REQ_sum TCP_TCC_RW_ATOMIC_REQ_sum SPI_VWC_CSC_WR SPI_RA_BULKY_CU_FULL_CSN TCC_EA0_RDREQ_LEVEL_sum TCC_EA0_WRREQ_LEVEL_sum TCC_EA0_ATOMIC_LEVEL_sum TCC_EA0_WRREQ_STALL_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_9.txt b/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..60ceab315a
--- /dev/null
+++ b/tests/workloads/no_roof/MI300A_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ TCP_PENDING_STALL_CYCLES_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300A_A1/perfmon/timestamps.txt b/tests/workloads/no_roof/MI300A_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..676cca1b80
--- /dev/null
+++ b/tests/workloads/no_roof/MI300A_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300A_A1/pmc_perf.csv b/tests/workloads/no_roof/MI300A_A1/pmc_perf.csv
new file mode 100644
index 0000000000..b682a7e720
--- /dev/null
+++ b/tests/workloads/no_roof/MI300A_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SQ_INSTS_BRANCH,SQ_INSTS_SENDMSG,SQ_WAIT_ANY,SQ_WAIT_INST_ANY,SQ_ACTIVE_INST_ANY,SQ_ACTIVE_INST_VMEM,SQ_ACTIVE_INST_LDS,SQ_ACTIVE_INST_VALU,SPI_RA_WAVE_SIMD_FULL_CSN,SPI_RA_VGPR_SIMD_FULL_CSN,CPC_CPC_UTCL2IU_STALL,CPC_ME1_BUSY_FOR_PACKET_DECODE,TA_ADDR_STALLED_BY_TC_CYCLES_sum,TA_TOTAL_WAVEFRONTS_sum,TCC_EA0_WRREQ_64B_sum,TCC_EA0_WRREQ_DRAM_sum,TCC_EA0_WRREQ_sum,TCC_EA0_WR_UNCACHED_32B_sum,TCP_UTCL1_PERMISSION_MISS_sum,TCP_UTCL1_REQUEST_sum,TCP_UTCL1_TRANSLATION_HIT_sum,TCP_UTCL1_TRANSLATION_MISS_sum,Wave_Size_1,Correlation_ID_1,XCC_Index,TCC_EA0_WRREQ[0],TCC_EA0_WRREQ_64B[0],TCC_EA0_WRREQ_LEVEL[0],TCC_HIT[0],TCC_EA0_WRREQ[1],TCC_EA0_WRREQ_64B[1],TCC_EA0_WRREQ_LEVEL[1],TCC_HIT[1],TCC_EA0_WRREQ[2],TCC_EA0_WRREQ_64B[2],TCC_EA0_WRREQ_LEVEL[2],TCC_HIT[2],TCC_EA0_WRREQ[3],TCC_EA0_WRREQ_64B[3],TCC_EA0_WRREQ_LEVEL[3],TCC_HIT[3],TCC_EA0_WRREQ[4],TCC_EA0_WRREQ_64B[4],TCC_EA0_WRREQ_LEVEL[4],TCC_HIT[4],TCC_EA0_WRREQ[5],TCC_EA0_WRREQ_64B[5],TCC_EA0_WRREQ_LEVEL[5],TCC_HIT[5],TCC_EA0_WRREQ[6],TCC_EA0_WRREQ_64B[6],TCC_EA0_WRREQ_LEVEL[6],TCC_HIT[6],TCC_EA0_WRREQ[7],TCC_EA0_WRREQ_64B[7],TCC_EA0_WRREQ_LEVEL[7],TCC_HIT[7],TCC_EA0_WRREQ[8],TCC_EA0_WRREQ_64B[8],TCC_EA0_WRREQ_LEVEL[8],TCC_HIT[8],TCC_EA0_WRREQ[9],TCC_EA0_WRREQ_64B[9],TCC_EA0_WRREQ_LEVEL[9],TCC_HIT[9],TCC_EA0_WRREQ[10],TCC_EA0_WRREQ_64B[10],TCC_EA0_WRREQ_LEVEL[10],TCC_HIT[10],TCC_EA0_WRREQ[11],TCC_EA0_WRREQ_64B[11],TCC_EA0_WRREQ_LEVEL[11],TCC_HIT[11],TCC_EA0_WRREQ[12],TCC_EA0_WRREQ_64B[12],TCC_EA0_WRREQ_LEVEL[12],TCC_HIT[12],TCC_EA0_WRREQ[13],TCC_EA0_WRREQ_64B[13],TCC_EA0_WRREQ_LEVEL[13],TCC_HIT[13],TCC_EA0_WRREQ[14],TCC_EA0_WRREQ_64B[14],TCC_EA0_WRREQ_LEVEL[14],TCC_HIT[14],TCC_EA0_WRREQ[15],TCC_EA0_WRREQ_64B[15],TCC_EA0_WRREQ_LEVEL[15],TCC_HIT[15],TCC_EA0_WRREQ[16],TCC_EA0_WRREQ_64B[16],TCC_EA0_WRREQ_LEVEL[16],TCC_HIT[16],TCC_EA0_WRREQ[17],TCC_EA0_WRREQ_64B[17],TCC_EA0_WRREQ_LEVEL[17],TCC_HIT[17],TCC_EA0_WRREQ[18],TCC_EA0_WRREQ_64B[18],TCC_EA0_WRREQ_LEVEL[18],TCC_HIT[18],TCC_EA0_WRREQ[19],TCC_EA0_WRREQ_64B[19],TCC_EA0_WRREQ_LEVEL[19],TCC_HIT[19],TCC_EA0_WRREQ[20],TCC_EA0_WRREQ_64B[20],TCC_EA0_WRREQ_LEVEL[20],TCC_HIT[20],TCC_EA0_WRREQ[21],TCC_EA0_WRREQ_64B[21],TCC_EA0_WRREQ_LEVEL[21],TCC_HIT[21],TCC_EA0_WRREQ[22],TCC_EA0_WRREQ_64B[22],TCC_EA0_WRREQ_LEVEL[22],TCC_HIT[22],TCC_EA0_WRREQ[23],TCC_EA0_WRREQ_64B[23],TCC_EA0_WRREQ_LEVEL[23],TCC_HIT[23],TCC_EA0_WRREQ[24],TCC_EA0_WRREQ_64B[24],TCC_EA0_WRREQ_LEVEL[24],TCC_HIT[24],TCC_EA0_WRREQ[25],TCC_EA0_WRREQ_64B[25],TCC_EA0_WRREQ_LEVEL[25],TCC_HIT[25],TCC_EA0_WRREQ[26],TCC_EA0_WRREQ_64B[26],TCC_EA0_WRREQ_LEVEL[26],TCC_HIT[26],TCC_EA0_WRREQ[27],TCC_EA0_WRREQ_64B[27],TCC_EA0_WRREQ_LEVEL[27],TCC_HIT[27],TCC_EA0_WRREQ[28],TCC_EA0_WRREQ_64B[28],TCC_EA0_WRREQ_LEVEL[28],TCC_HIT[28],TCC_EA0_WRREQ[29],TCC_EA0_WRREQ_64B[29],TCC_EA0_WRREQ_LEVEL[29],TCC_HIT[29],TCC_EA0_WRREQ[30],TCC_EA0_WRREQ_64B[30],TCC_EA0_WRREQ_LEVEL[30],TCC_HIT[30],TCC_EA0_WRREQ[31],TCC_EA0_WRREQ_64B[31],TCC_EA0_WRREQ_LEVEL[31],TCC_HIT[31],TCC_EA0_WRREQ[32],TCC_EA0_WRREQ_64B[32],TCC_EA0_WRREQ_LEVEL[32],TCC_HIT[32],TCC_EA0_WRREQ[33],TCC_EA0_WRREQ_64B[33],TCC_EA0_WRREQ_LEVEL[33],TCC_HIT[33],TCC_EA0_WRREQ[34],TCC_EA0_WRREQ_64B[34],TCC_EA0_WRREQ_LEVEL[34],TCC_HIT[34],TCC_EA0_WRREQ[35],TCC_EA0_WRREQ_64B[35],TCC_EA0_WRREQ_LEVEL[35],TCC_HIT[35],TCC_EA0_WRREQ[36],TCC_EA0_WRREQ_64B[36],TCC_EA0_WRREQ_LEVEL[36],TCC_HIT[36],TCC_EA0_WRREQ[37],TCC_EA0_WRREQ_64B[37],TCC_EA0_WRREQ_LEVEL[37],TCC_HIT[37],TCC_EA0_WRREQ[38],TCC_EA0_WRREQ_64B[38],TCC_EA0_WRREQ_LEVEL[38],TCC_HIT[38],TCC_EA0_WRREQ[39],TCC_EA0_WRREQ_64B[39],TCC_EA0_WRREQ_LEVEL[39],TCC_HIT[39],TCC_EA0_WRREQ[40],TCC_EA0_WRREQ_64B[40],TCC_EA0_WRREQ_LEVEL[40],TCC_HIT[40],TCC_EA0_WRREQ[41],TCC_EA0_WRREQ_64B[41],TCC_EA0_WRREQ_LEVEL[41],TCC_HIT[41],TCC_EA0_WRREQ[42],TCC_EA0_WRREQ_64B[42],TCC_EA0_WRREQ_LEVEL[42],TCC_HIT[42],TCC_EA0_WRREQ[43],TCC_EA0_WRREQ_64B[43],TCC_EA0_WRREQ_LEVEL[43],TCC_HIT[43],TCC_EA0_WRREQ[44],TCC_EA0_WRREQ_64B[44],TCC_EA0_WRREQ_LEVEL[44],TCC_HIT[44],TCC_EA0_WRREQ[45],TCC_EA0_WRREQ_64B[45],TCC_EA0_WRREQ_LEVEL[45],TCC_HIT[45],TCC_EA0_WRREQ[46],TCC_EA0_WRREQ_64B[46],TCC_EA0_WRREQ_LEVEL[46],TCC_HIT[46],TCC_EA0_WRREQ[47],TCC_EA0_WRREQ_64B[47],TCC_EA0_WRREQ_LEVEL[47],TCC_HIT[47],TCC_EA0_WRREQ[48],TCC_EA0_WRREQ_64B[48],TCC_EA0_WRREQ_LEVEL[48],TCC_HIT[48],TCC_EA0_WRREQ[49],TCC_EA0_WRREQ_64B[49],TCC_EA0_WRREQ_LEVEL[49],TCC_HIT[49],TCC_EA0_WRREQ[50],TCC_EA0_WRREQ_64B[50],TCC_EA0_WRREQ_LEVEL[50],TCC_HIT[50],TCC_EA0_WRREQ[51],TCC_EA0_WRREQ_64B[51],TCC_EA0_WRREQ_LEVEL[51],TCC_HIT[51],TCC_EA0_WRREQ[52],TCC_EA0_WRREQ_64B[52],TCC_EA0_WRREQ_LEVEL[52],TCC_HIT[52],TCC_EA0_WRREQ[53],TCC_EA0_WRREQ_64B[53],TCC_EA0_WRREQ_LEVEL[53],TCC_HIT[53],TCC_EA0_WRREQ[54],TCC_EA0_WRREQ_64B[54],TCC_EA0_WRREQ_LEVEL[54],TCC_HIT[54],TCC_EA0_WRREQ[55],TCC_EA0_WRREQ_64B[55],TCC_EA0_WRREQ_LEVEL[55],TCC_HIT[55],TCC_EA0_WRREQ[56],TCC_EA0_WRREQ_64B[56],TCC_EA0_WRREQ_LEVEL[56],TCC_HIT[56],TCC_EA0_WRREQ[57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CED_WRITE_CYCLES_sum,TCC_ATOMIC_sum,TCC_READ_sum,TCC_WRITEBACK_sum,TCC_WRITE_sum,TCP_TOTAL_ATOMIC_WITHOUT_RET_sum,TCP_TOTAL_ATOMIC_WITH_RET_sum,TCP_TOTAL_CACHE_ACCESSES_sum,TCP_TOTAL_WRITEBACK_INVALIDATES_sum,TD_COALESCABLE_WAVEFRONT_sum,Wave_Size_5,Correlation_ID_5,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,TA_FLAT_ATOMIC_WAVEFRONTS_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,TCC_ALL_TC_OP_INV_EVICT_sum,TCC_EA0_ATOMIC_sum,TCC_NORMAL_EVICT_sum,TCC_TOO_MANY_EA_WRREQS_STALL_sum,TCP_TCC_CC_READ_REQ_sum,TCP_TCC_CC_WRITE_REQ_sum,TCP_TCC_UC_ATOMIC_REQ_sum,TCP_TCC_UC_WRITE_REQ_sum,Wave_Size_6,Correlation_ID_6,XCC_Index_6,TCC_MISS[0],TCC_READ[0],TCC_REQ[0],TCC_RW_REQ[0],TCC_MISS[1],TCC_READ[1],TCC_REQ[1],TCC_RW_REQ[1],TCC_MISS[2],TCC_READ[2],TCC_REQ[2],TCC_RW_REQ[2],TCC_MISS[3],TCC_READ[3],TCC_REQ[3],TCC_RW_REQ[3],TCC_MISS[4],TCC_READ[4],TCC_REQ[4],TCC_RW_REQ[4],TCC_MISS[5],TCC_READ[5],TCC_REQ[5],TCC_RW_REQ[5],TCC_MISS[6],TCC_READ[6],TCC_REQ[6],TCC_RW_REQ[6],TCC_MISS[7],TCC_READ[7],TCC_REQ[7],TCC_RW_REQ[7],TCC_MISS[8],TCC_READ[8],TCC_REQ[8],TCC_RW_REQ[8],TCC_MISS[9],TCC_READ[9],TCC_REQ[9],TCC_RW_REQ[9],TCC_MISS[10],TCC_READ[10],TCC_REQ[10],TCC_RW_REQ[10],TCC_MISS[11],TCC_READ[11],TCC_REQ[11],TCC_RW_REQ[11],TCC_MISS[12],TCC_READ[12],TCC_REQ[12],TCC_RW_REQ[12],TCC_MISS[13],TCC_READ[13],TCC_REQ[13],TCC_RW_REQ[13],TCC_MISS[14],TCC_READ[14],TCC_REQ[14],TCC_RW_REQ[14],TCC_MISS[15],TCC_READ[15],TCC_REQ[15],TCC_RW_REQ[15],TCC_MISS[16],TCC_READ[16],TCC_REQ[16],TCC_RW_REQ[16],TCC_MISS[17],TCC_READ[17],TCC_REQ[17],TCC_RW_REQ[17],TCC_MISS[18],TCC_READ[18],TCC_REQ[18],TCC_RW_REQ[18],TCC_MISS[19],TCC_READ[19],TCC_REQ[19],TCC_RW_REQ[19],TCC_MISS[20],TCC_READ[20],TCC_REQ[20],TCC_RW_REQ[20],TCC_MISS[21],TCC_READ[21],TCC_REQ[21],TCC_RW_REQ[21],TCC_MISS[22],TCC_READ[22],TCC_REQ[22],TCC_RW_REQ[22],TCC_MISS[23],TCC_READ[23],TCC_REQ[23],TCC_RW_REQ[23],TCC_MISS[24],TCC_READ[24],TCC_REQ[24],TCC_RW_REQ[24],TCC_MISS[25],TCC_READ[25],TCC_REQ[25],TCC_RW_REQ[25],TCC_MISS[26],TCC_READ[26],TCC_REQ[26],TCC_RW_REQ[26],TCC_MISS[27],TCC_READ[27],TCC_REQ[27],TCC_RW_REQ[27],TCC_MISS[28],TCC_READ[28],TCC_REQ[28],TCC_RW_REQ[28],TCC_MISS[29],TCC_READ[29],TCC_REQ[29],TCC_RW_REQ[29],TCC_MISS[30],TCC_READ[30],TCC_REQ[30],TCC_RW_REQ[30],TCC_MISS[31],TCC_READ[31],TCC_REQ[31],TCC_RW_REQ[31],TCC_MISS[32],TCC_READ[32],TCC_REQ[32],TCC_RW_REQ[32],TCC_MISS[33],TCC_READ[33],TCC_REQ[33],TCC_RW_REQ[33],TCC_MISS[34],TCC_READ[34],TCC_REQ[34],TCC_RW_REQ[34],TCC_MISS[35],TCC_READ[35],TCC_REQ[35],TCC_RW_REQ[35],TCC_MISS[36],TCC_READ[36],TCC_REQ[36],TCC_RW_REQ[36],TCC_MISS[37],TCC_READ[37],TCC_REQ[37],TCC_RW_REQ[37],TCC_MISS[38],TCC_READ[38],TCC_REQ[38],TCC_RW_REQ[38],TCC_MISS[39],TCC_READ[39],TCC_REQ[39],TCC_RW_REQ[39],TCC_MISS[40],TCC_READ[40],TCC_REQ[40],TCC_RW_REQ[40],TCC_MISS[41],TCC_READ[41],TCC_REQ[41],TCC_RW_REQ[41],TCC_MISS[42],TCC_READ[42],TCC_REQ[42],TCC_RW_REQ[42],TCC_MISS[43],TCC_READ[43],TCC_REQ[43],TCC_RW_REQ[43],TCC_MISS[44],TCC_READ[44],TCC_REQ[44],TCC_RW_REQ[44],TCC_MISS[45],TCC_READ[45],TCC_REQ[45],TCC_RW_REQ[45],TCC_MISS[46],TCC_READ[46],TCC_REQ[46],TCC_RW_REQ[46],TCC_MISS[47],TCC_READ[47],TCC_REQ[47],TCC_RW_REQ[47],TCC_MISS[48],TCC_READ[48],TCC_REQ[48],TCC_RW_REQ[48],TCC_MISS[49],TCC_READ[49],TCC_REQ[49],TCC_RW_REQ[49],TCC_MISS[50],TCC_READ[50],TCC_REQ[50],TCC_RW_REQ[50],TCC_MISS[51],TCC_READ[51],TCC_REQ[51],TCC_RW_REQ[51],TCC_MISS[52],TCC_READ[52],TCC_REQ[52],TCC_RW_REQ[52],TCC_MISS[53],TCC_READ[53],TCC_REQ[53],TCC_RW_REQ[53],TCC_MISS[54],TCC_READ[54],TCC_REQ[54],TCC_RW_REQ[54],TCC_MISS[55],TCC_READ[55],TCC_REQ[55],TCC_RW_REQ[55],TCC_MISS[56],TCC_READ[56],TCC_REQ[56],TCC_RW_REQ[56],TCC_MISS[57],TCC_READ[57],TCC_REQ[57],TCC_RW_REQ[57],TCC_MISS[58],TCC_READ[58],TCC_REQ[58],TCC_RW_REQ[58],TCC_MISS[59],TCC_READ[59],TCC_REQ[59],TCC_RW_REQ[59],TCC_MISS[60],TCC_READ[60],TCC_REQ[60],TCC_RW_REQ[60],TCC_MISS[61],TCC_READ[61],TCC_REQ[61],TCC_RW_REQ[61],TCC_MISS[62],TCC_READ[62],TCC_REQ[62],TCC_RW_REQ[62],TCC_MISS[63],TCC_READ[63],TCC_REQ[63],TCC_RW_REQ[63],TCC_MISS[64],TCC_READ[64],TCC_REQ[64],TCC_RW_REQ[64],TCC_MISS[65],TCC_READ[65],TCC_REQ[65],TCC_RW_REQ[65],TCC_MISS[66],TCC_READ[66],TCC_REQ[66],TCC_RW_REQ[66],TCC_MISS[67],TCC_READ[67],TCC_REQ[67],TCC_RW_REQ[67],TCC_MISS[68],TCC_READ[68],TCC_REQ[68],TCC_RW_REQ[68],TCC_MISS[69],TCC_READ[69],TCC_REQ[69],TCC_RW_REQ[69],TCC_MISS[70],TCC_READ[70],TCC_REQ[70],TCC_RW_REQ[70],TCC_MISS[71],TCC_READ[71],TCC_REQ[71],TCC_RW_REQ[71],TCC_MISS[72],TCC_READ[72],TCC_REQ[72],TCC_RW_REQ[72],TCC_MISS[73],TCC_READ[73],TCC_REQ[73],TCC_RW_REQ[73],TCC_MISS[74],TCC_READ[74],TCC_REQ[74],TCC_RW_REQ[74],TCC_MISS[75],TCC_READ[75],TCC_REQ[75],TCC_RW_REQ[75],TCC_MISS[76],TCC_READ[76],TCC_REQ[76],TCC_RW_REQ[76],TCC_MISS[77],TCC_READ[77],TCC_REQ[77],TCC_RW_REQ[77],TCC_MISS[78],TCC_READ[78],TCC_REQ[78],TCC_RW_REQ[78],TCC_MISS[79],TCC_READ[79],TCC_REQ[79],TCC_RW_REQ[79],TCC_MISS[80],TCC_READ[80],TCC_REQ[80],TCC_RW_REQ[80],TCC_MISS[81],TCC_READ[81],TCC_REQ[81],TCC_RW_REQ[81],TCC_MISS[82],TCC_READ[82],TCC_REQ[82],TCC_RW_REQ[82],TCC_MISS[83],TCC_READ[83],TCC_REQ[83],TCC_RW_REQ[83],TCC_MISS[84],TCC_READ[84],TCC_REQ[84],TCC_RW_REQ[84],TCC_MISS[85],TCC_READ[85],TCC_REQ[85],TCC_RW_REQ[85],TCC_MISS[86],TCC_READ[86],TCC_REQ[86],TCC_RW_REQ[86],TCC_MISS[87],TCC_READ[87],TCC_REQ[87],TCC_RW_REQ[87],TCC_MISS[88],TCC_READ[88],TCC_REQ[88],TCC_RW_REQ[88],TCC_MISS[89],TCC_READ[89],TCC_REQ[89],TCC_RW_REQ[89],TCC_MISS[90],TCC_READ[90],TCC_REQ[90],TCC_RW_REQ[90],TCC_MISS[91],TCC_READ[91],TCC_REQ[91],TCC_RW_REQ[91],TCC_MISS[92],TCC_READ[92],TCC_REQ[92],TCC_RW_REQ[92],TCC_MISS[93],TCC_READ[93],TCC_REQ[93],TCC_RW_REQ[93],TCC_MISS[94],TCC_READ[94],TCC_REQ[94],TCC_RW_REQ[94],TCC_MISS[95],TCC_READ[95],TCC_REQ[95],TCC_RW_REQ[95],Wave_Size_7,Correlation_ID_7,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SPI_RA_REQ_NO_ALLOC,SPI_RA_REQ_NO_ALLOC_CSN,CPC_CPC_STAT_STALL,CPC_UTCL1_STALL_ON_TRANSLATION,CPF_CPF_STAT_IDLE,CPF_CPF_TCIU_IDLE,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,TA_BUFFER_TOTAL_CYCLES_sum,TCC_HIT_sum,TCC_MISS_sum,TCC_REQ_sum,TCC_STREAMING_REQ_sum,TCP_TOTAL_ACCESSES_sum,TCP_TOTAL_READ_sum,TCP_TOTAL_WRITE_sum,TCP_VOLATILE_sum,TD_ATOMIC_WAVEFRONT_sum,TD_STORE_WAVEFRONT_sum,Wave_Size_8,Correlation_ID_8,XCC_Index_8,TCC_ATOMIC[0],TCC_BUBBLE[0],TCC_CYCLE[0],TCC_EA0_ATOMIC[0],TCC_ATOMIC[1],TCC_BUBBLE[1],TCC_CYCLE[1],TCC_EA0_ATOMIC[1],TCC_ATOMIC[2],TCC_BUBBLE[2],TCC_CYCLE[2],TCC_EA0_ATOMIC[2],TCC_ATOMIC[3],TCC_BUBBLE[3],TCC_CYCLE[3],TCC_EA0_ATOMIC[3],TCC_ATOMIC[4],TCC_BUBBLE[4],TCC_CYCLE[4],TCC_EA0_ATOMIC[4],TCC_ATOMIC[5],TCC_BUBBLE[5],TCC_CYCLE[5],TCC_EA0_ATOMIC[5],TCC_ATOMIC[6],TCC_BUBBLE[6],TCC_CYCLE[6],TCC_EA0_ATOMIC[6],TCC_ATOMIC[7],TCC_BUBBLE[7],TCC_CYCLE[7],TCC_EA0_ATOMIC[7],TCC_ATOMIC[8],TCC_BUBBLE[8],TCC_CYCLE[8],TCC_EA0_ATOMIC[8],TCC_ATOMIC[9],TCC_BUBBLE[9],TCC_CYCLE[9],TCC_EA0_ATOMIC[9],TCC_ATOMIC[10],TCC_BUBBLE[10],TCC_CYCLE[10],TCC_EA0_ATOMIC[10],TCC_ATOMIC[11],TCC_BUBBLE[11],TCC_CYCLE[11],TCC_EA0_ATOMIC[11],TCC_ATOMIC[12],TCC_BUBBLE[12],TCC_CYCLE[12],TCC_EA0_ATOMIC[12],TCC_ATOMIC[13],TCC_BUBBLE[13],TCC_CYCLE[13],TCC_EA0_ATOMIC[13],TCC_ATOMIC[14],TCC_BUBBLE[14],TCC_CYCLE[14],TCC_EA0_ATOMIC[14],TCC_ATOMIC[15],TCC_BUBBLE[15],TCC_CYCLE[15],TCC_EA0_ATOMIC[15],TCC_ATOMIC[16],TCC_BUBBLE[16],TCC_CYCLE[16],TCC_EA0_ATOMIC[16],TCC_ATOMIC[17],TCC_BUBBLE[17],TCC_CYCLE[17],TCC_EA0_ATOMIC[17],TCC_ATOMIC[18],TCC_BUBBLE[18],TCC_CYCLE[18],TCC_EA0_ATOMIC[18],TCC_ATOMIC[19],TCC_BUBBLE[19],TCC_CYCLE[19],TCC_EA0_ATOMIC[19],TCC_ATOMIC[20],TCC_BUBBLE[20],TCC_CYCLE[20],TCC_EA0_ATOMIC[20],TCC_ATOMIC[21],TCC_BUBBLE[21],TCC_CYCLE[21],TCC_EA0_ATOMIC[21],TCC_ATOMIC[22],TCC_BUBBLE[22],TCC_CYCLE[22],TCC_EA0_ATOMIC[22],TCC_ATOMIC[23],TCC_BUBBLE[23],TCC_CYCLE[23],TCC_EA0_ATOMIC[23],TCC_ATOMIC[24],TCC_BUBBLE[24],TCC_CYCLE[24],TCC_EA0_ATOMIC[24],TCC_ATOMIC[25],TCC_BUBBLE[25],TCC_CYCLE[25],TCC_EA0_ATOMIC[25],TCC_ATOMIC[26],TCC_BUBBLE[26],TCC_CYCLE[26],TCC_EA0_ATOMIC[26],TCC_ATOMIC[27],TCC_BUBBLE[27],TCC_CYCLE[27],TCC_EA0_ATOMIC[27],TCC_ATOMIC[28],TCC_BUBBLE[28],TCC_CYCLE[28],TCC_EA0_ATOMIC[28],TCC_ATOMIC[29],TCC_BUBBLE[29],TCC_CYCLE[29],TCC_EA0_ATOMIC[29],TCC_ATOMIC[30],TCC_BUBBLE[30],TCC_CYCLE[30],TCC_EA0_ATOMIC[30],TCC_ATOMIC[31],TCC_BUBBLE[31],TCC_CYCLE[31],TCC_EA0_ATOMIC[31],TCC_ATOMIC[32],TCC_BUBBLE[32],TCC_CYCLE[32],TCC_EA0_ATOMIC[32],TCC_ATOMIC[33],TCC_BUBBLE[33],TCC_CYCLE[33],TCC_EA0_ATOMIC[33],TCC_ATOMIC[34],TCC_BUBBLE[34],TCC_CYCLE[34],TCC_EA0_ATOMIC[34],TCC_ATOMIC[35],TCC_BUBBLE[35],TCC_CYCLE[35],TCC_EA0_ATOMIC[35],TCC_ATOMIC[36],TCC_BUBBLE[36],TCC_CYCLE[36],TCC_EA0_ATOMIC[36],TCC_ATOMIC[37],TCC_BUBBLE[37],TCC_CYCLE[37],TCC_EA0_ATOMIC[37],TCC_ATOMIC[38],TCC_BUBBLE[38],TCC_CYCLE[38],TCC_EA0_ATOMIC[38],TCC_ATOMIC[39],TCC_BUBBLE[39],TCC_CYCLE[39],TCC_EA0_ATOMIC[39],TCC_ATOMIC[40],TCC_BUBBLE[40],TCC_CYCLE[40],TCC_EA0_ATOMIC[40],TCC_ATOMIC[41],TCC_BUBBLE[41],TCC_CYCLE[41],TCC_EA0_ATOMIC[41],TCC_ATOMIC[42],TCC_BUBBLE[42],TCC_CYCLE[42],TCC_EA0_ATOMIC[42],TCC_ATOMIC[43],TCC_BUBBLE[43],TCC_CYCLE[43],TCC_EA0_ATOMIC[43],TCC_ATOMIC[44],TCC_BUBBLE[44],TCC_CYCLE[44],TCC_EA0_ATOMIC[44],TCC_ATOMIC[45],TCC_BUBBLE[45],TCC_CYCLE[45],TCC_EA0_ATOMIC[45],TCC_ATOMIC[46],TCC_BUBBLE[46],TCC_CYCLE[46],TCC_EA0_ATOMIC[46],TCC_ATOMIC[47],TCC_BUBBLE[47],TCC_CYCLE[47],TCC_EA0_ATOMIC[47],TCC_ATOMIC[48],TCC_BUBBLE[48],TCC_CYCLE[48],TCC_EA0_ATOMIC[48],TCC_ATOMIC[49],TCC_BUBBLE[49],TCC_CYCLE[49],TCC_EA0_ATOMIC[49],TCC_ATOMIC[50],TCC_BUBBLE[50],TCC_CYCLE[50],TCC_EA0_ATOMIC[50],TCC_ATOMIC[51],TCC_BUBBLE[51],TCC_CYCLE[51],TCC_EA0_ATOMIC[51],TCC_ATOMIC[52],TCC_BUBBLE[52],TCC_CYCLE[52],TCC_EA0_ATOMIC[52],TCC_ATOMIC[53],TCC_BUBBLE[53],TCC_CYCLE[53],TCC_EA0_ATOMIC[53],TCC_ATOMIC[54],TCC_BUBBLE[54],TCC_CYCLE[54],TCC_EA0_ATOMIC[54],TCC_ATOMIC[55],TCC_BUBBLE[55],TCC_CYCLE[55],TCC_EA0_ATOMIC[55],TCC_ATOMIC[56],TCC_BUBBLE[56],TCC_CYCLE[56],TCC_EA0_ATOMIC[56],TCC_ATOMIC[57],TCC_BUBBLE[57],TCC_CYCLE[57],TCC_EA0_ATOMIC[57],TCC_ATOMIC[58],TCC_BUBBLE[58],TCC_CYCLE[58],TCC_EA0_ATOMIC[58],TCC_ATOMIC[59],TCC_BUBBLE[59],TCC_CYCLE[59],TCC_EA0_ATOMIC[59],TCC_ATOMIC[60],TCC_BUBBLE[60],TCC_CYCLE[60],TCC_EA0_ATOMIC[60],TCC_ATOMIC[61],TCC_BUBBLE[61],TCC_CYCLE[61],TCC_EA0_ATOMIC[61],TCC_ATOMIC[62],TCC_BUBBLE[62],TCC_CYCLE[62],TCC_EA0_ATOMIC[62],TCC_ATOMIC[63],TCC_BUBBLE[63],TCC_CYCLE[63],TCC_EA0_ATOMIC[63],TCC_ATOMIC[64],TCC_BUBBLE[64],TCC_CYCLE[64],TCC_EA0_ATOMIC[64],TCC_ATOMIC[65],TCC_BUBBLE[65],TCC_CYCLE[65],TCC_EA0_ATOMIC[65],TCC_ATOMIC[66],TCC_BUBBLE[66],TCC_CYCLE[66],TCC_EA0_ATOMIC[66],TCC_ATOMIC[67],TCC_BUBBLE[67],TCC_CYCLE[67],TCC_EA0_ATOMIC[67],TCC_ATOMIC[68],TCC_BUBBLE[68],TCC_CYCLE[68],TCC_EA0_ATOMIC[68],TCC_ATOMIC[69],TCC_BUBBLE[69],TCC_CYCLE[69],TCC_EA0_ATOMIC[69],TCC_ATOMIC[70],TCC_BUBBLE[70],TCC_CYCLE[70],TCC_EA0_ATOMIC[70],TCC_ATOMIC[71],TCC_BUBBLE[71],TCC_CYCLE[71],TCC_EA0_ATOMIC[71],TCC_ATOMIC[72],TCC_BUBBLE[72],TCC_CYCLE[72],TCC_EA0_ATOMIC[72],TCC_ATOMIC[73],TCC_BUBBLE[73],TCC_CYCLE[73],TCC_EA0_ATOMIC[73],TCC_ATOMIC[74],TCC_BUBBLE[74],TCC_CYCLE[74],TCC_EA0_ATOMIC[74],TCC_ATOMIC[75],TCC_BUBBLE[75],TCC_CYCLE[75],TCC_EA0_ATOMIC[75],TCC_ATOMIC[76],TCC_BUBBLE[76],TCC_CYCLE[76],TCC_EA0_ATOMIC[76],TCC_ATOMIC[77],TCC_BUBBLE[77],TCC_CYCLE[77],TCC_EA0_ATOMIC[77],TCC_ATOMIC[78],TCC_BUBBLE[78],TCC_CYCLE[78],TCC_EA0_ATOMIC[78],TCC_ATOMIC[79],TCC_BUBBLE[79],TCC_CYCLE[79],TCC_EA0_ATOMIC[79],TCC_ATOMIC[80],TCC_BUBBLE[80],TCC_CYCLE[80],TCC_EA0_ATOMIC[80],TCC_ATOMIC[81],TCC_BUBBLE[81],TCC_CYCLE[81],TCC_EA0_ATOMIC[81],TCC_ATOMIC[82],TCC_BUBBLE[82],TCC_CYCLE[82],TCC_EA0_ATOMIC[82],TCC_ATOMIC[83],TCC_BUBBLE[83],TCC_CYCLE[83],TCC_EA0_ATOMIC[83],TCC_ATOMIC[84],TCC_BUBBLE[84],TCC_CYCLE[84],TCC_EA0_ATOMIC[84],TCC_ATOMIC[85],TCC_BUBBLE[85],TCC_CYCLE[85],TCC_EA0_ATOMIC[85],TCC_ATOMIC[86],TCC_BUBBLE[86],TCC_CYCLE[86],TCC_EA0_ATOMIC[86],TCC_ATOMIC[87],TCC_BUBBLE[87],TCC_CYCLE[87],TCC_EA0_ATOMIC[87],TCC_ATOMIC[88],TCC_BUBBLE[88],TCC_CYCLE[88],TCC_EA0_ATOMIC[88],TCC_ATOMIC[89],TCC_BUBBLE[89],TCC_CYCLE[89],TCC_EA0_ATOMIC[89],TCC_ATOMIC[90],TCC_BUBBLE[90],TCC_CYCLE[90],TCC_EA0_ATOMIC[90],TCC_ATOMIC[91],TCC_BUBBLE[91],TCC_CYCLE[91],TCC_EA0_ATOMIC[91],TCC_ATOMIC[92],TCC_BUBBLE[92],TCC_CYCLE[92],TCC_EA0_ATOMIC[92],TCC_ATOMIC[93],TCC_BUBBLE[93],TCC_CYCLE[93],TCC_EA0_ATOMIC[93],TCC_ATOMIC[94],TCC_BUBBLE[94],TCC_CYCLE[94],TCC_EA0_ATOMIC[94],TCC_ATOMIC[95],TCC_BUBBLE[95],TCC_CYCLE[95],TCC_EA0_ATOMIC[95],Wave_Size_9,Correlation_ID_9,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_10,Correlation_ID_10,SQC_TC_DATA_ATOMIC_REQ,SQC_TC_STALL,SQC_TC_REQ,SQC_DCACHE_REQ_READ_16,SQC_ICACHE_REQ,SQC_ICACHE_HITS,SQC_ICACHE_MISSES,SQC_ICACHE_MISSES_DUPLICATE,Wave_Size_11,Correlation_ID_11,SQ_INSTS_VALU_MFMA_MOPS_I8,SQ_INSTS_VALU_MFMA_MOPS_F16,SQ_INSTS_VALU_MFMA_MOPS_BF16,SQ_INSTS_VALU_MFMA_MOPS_F32,SQ_INSTS_VALU_MFMA_MOPS_F64,SQC_TC_INST_REQ,SQC_TC_DATA_READ_REQ,SQC_TC_DATA_WRITE_REQ,TCP_PENDING_STALL_CYCLES_sum,Wave_Size_12,Correlation_ID_12,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,TCC_EA0_ATOMIC_LEVEL_sum,TCC_EA0_RDREQ_LEVEL_sum,TCC_EA0_WRREQ_LEVEL_sum,TCC_EA0_WRREQ_STALL_sum,TCP_TCC_CC_ATOMIC_REQ_sum,TCP_TCC_RW_ATOMIC_REQ_sum,TCP_TCC_RW_READ_REQ_sum,TCP_TCC_RW_WRITE_REQ_sum,Wave_Size_13,Correlation_ID_13,SQC_DCACHE_REQ_READ_2,SQC_DCACHE_REQ_READ_4,Wave_Size_14,Correlation_ID_14,SQ_ACTIVE_INST_SCA,SQ_ACTIVE_INST_EXP_GDS,SQ_ACTIVE_INST_MISC,SQ_ACTIVE_INST_FLAT,SQ_INST_CYCLES_VMEM_WR,SQ_INST_CYCLES_VMEM_RD,SQ_INST_CYCLES_SMEM,SQ_INST_CYCLES_SALU,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,CPC_ME1_DC0_SPI_BUSY,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,TCC_BUBBLE_sum,TCC_EA0_RDREQ_32B_sum,TCC_EA0_RDREQ_sum,TCC_EA0_RD_UNCACHED_32B_sum,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,TCP_TCC_READ_REQ_sum,TCP_TCC_WRITE_REQ_sum,Wave_Size_15,Correlation_ID_15,XCC_Index_15,TCC_EA0_ATOMIC_LEVEL[0],TCC_EA0_RDREQ[0],TCC_EA0_RDREQ_32B[0],TCC_EA0_RDREQ_LEVEL[0],TCC_EA0_ATOMIC_LEVEL[1],TCC_EA0_RDREQ[1],TCC_EA0_RDREQ_32B[1],TCC_EA0_RDREQ_LEVEL[1],TCC_EA0_ATOMIC_LEVEL[2],TCC_EA0_RDREQ[2],TCC_EA0_RDREQ_32B[2],TCC_EA0_RDREQ_LEVEL[2],TCC_EA0_ATOMIC_LEVEL[3],TCC_EA0_RDREQ[3],TCC_EA0_RDREQ_32B[3],TCC_EA0_RDREQ_LEVEL[3],TCC_EA0_ATOMIC_LEVEL[4],TCC_EA0_RDREQ[4],TCC_EA0_RDREQ_32B[4],TCC_EA0_RDREQ_LEVEL[4],TCC_EA0_ATOMIC_LEVEL[5],TCC_EA0_RDREQ[5],TCC_EA0_RDREQ_32B[5],TCC_EA0_RDREQ_LEVEL[5],TCC_EA0_ATOMIC_LEVEL[6],TCC_EA0_RDREQ[6],TCC_EA0_RDREQ_32B[6],TCC_EA0_RDREQ_LEVEL[6],TCC_EA0_ATOMIC_LEVEL[7],TCC_EA0_RDREQ[7],TCC_EA0_RDREQ_32B[7],TCC_EA0_RDREQ_LEVEL[7],TCC_EA0_ATOMIC_LEVEL[8],TCC_EA0_RDREQ[8],TCC_EA0_RDREQ_32B[8],TCC_EA0_RDREQ_LEVEL[8],TCC_EA0_ATOMIC_LEVEL[9],TCC_EA0_RDREQ[9],TCC_EA0_RDREQ_32B[9],TCC_EA0_RDREQ_LEVEL[9],TCC_EA0_ATOMIC_LEVEL[10],TCC_EA0_RDREQ[10],TCC_EA0_RDREQ_32B[10],TCC_EA0_RDREQ_LEVEL[10],TCC_EA0_ATOMIC_LEVEL[11],TCC_EA0_RDREQ[11],TCC_EA0_RDREQ_32B[11],TCC_EA0_RDREQ_LEVEL[11],TCC_EA0_ATOMIC_LEVEL[12],TCC_EA0_RDREQ[12],TCC_EA0_RDREQ_32B[12],TCC_EA0_RDREQ_LEVEL[12],TCC_EA0_ATOMIC_LEVEL[13],TCC_EA0_RDREQ[13],TCC_EA0_RDREQ_32B[13],TCC_EA0_RDREQ_LEVEL[13],TCC_EA0_ATOMIC_LEVEL[14],TCC_EA0_RDREQ[14],TCC_EA0_RDREQ_32B[14],TCC_EA0_RDREQ_LEVEL[14],TCC_EA0_ATOMIC_LEVEL[15],TCC_EA0_RDREQ[15],TCC_EA0_RDREQ_32B[15],TCC_EA0_RDREQ_LEVEL[15],TCC_EA0_ATOMIC_LEVEL[16],TCC_EA0_RDREQ[16],TCC_EA0_RDREQ_32B[16],TCC_EA0_RDREQ_LEVEL[16],TCC_EA0_ATOMIC_LEVEL[17],TCC_EA0_RDREQ[17],TCC_EA0_RDREQ_32B[17],TCC_EA0_RDREQ_LEVEL[17],TCC_EA0_ATOMIC_LEVEL[18],TCC_EA0_RDREQ[18],TCC_EA0_RDREQ_32B[18],TCC_EA0_RDREQ_LEVEL[18],TCC_EA0_ATOMIC_LEVEL[19],TCC_EA0_RDREQ[19],TCC_EA0_RDREQ_32B[19],TCC_EA0_RDREQ_LEVEL[19],TCC_EA0_ATOMIC_LEVEL[20],TCC_EA0_RDREQ[20],TCC_EA0_RDREQ_32B[20],TCC_EA0_RDREQ_LEVEL[20],TCC_EA0_ATOMIC_LEVEL[21],TCC_EA0_RDREQ[21],TCC_EA0_RDREQ_32B[21],TCC_EA0_RDREQ_LEVEL[21],TCC_EA0_ATOMIC_LEVEL[22],TCC_EA0_RDREQ[22],TCC_EA0_RDREQ_32B[22],TCC_EA0_RDREQ_LEVEL[22],TCC_EA0_ATOMIC_LEVEL[23],TCC_EA0_RDREQ[23],TCC_EA0_RDREQ_32B[23],TCC_EA0_RDREQ_LEVEL[23],TCC_EA0_ATOMIC_LEVEL[24],TCC_EA0_RDREQ[24],TCC_EA0_RDREQ_32B[24],TCC_EA0_RDREQ_LEVEL[24],TCC_EA0_ATOMIC_LEVEL[25],TCC_EA0_RDREQ[25],TCC_EA0_RDREQ_32B[25],TCC_EA0_RDREQ_LEVEL[25],TCC_EA0_ATOMIC_LEVEL[26],TCC_EA0_RDREQ[26],TCC_EA0_RDREQ_32B[26],TCC_EA0_RDREQ_LEVEL[26],TCC_EA0_ATOMIC_LEVEL[27],TCC_EA0_RDREQ[27],TCC_EA0_RDREQ_32B[27],TCC_EA0_RDREQ_LEVEL[27],TCC_EA0_ATOMIC_LEVEL[28],TCC_EA0_RDREQ[28],TCC_EA0_RDREQ_32B[28],TCC_EA0_RDREQ_LEVEL[28],TCC_EA0_ATOMIC_LEVEL[29],TCC_EA0_RDREQ[29],TCC_EA0_RDREQ_32B[29],TCC_EA0_RDREQ_LEVEL[29],TCC_EA0_ATOMIC_LEVEL[30],TCC_EA0_RDREQ[30],TCC_EA0_RDREQ_32B[30],TCC_EA0_RDREQ_LEVEL[30],TCC_EA0_ATOMIC_LEVEL[31],TCC_EA0_RDREQ[31],TCC_EA0_RDREQ_32B[31],TCC_EA0_RDREQ_LEVEL[31],TCC_EA0_ATOMIC_LEVEL[32],TCC_EA0_RDREQ[32],TCC_EA0_RDREQ_32B[32],TCC_EA0_RDREQ_LEVEL[32],TCC_EA0_ATOMIC_LEVEL[33],TCC_EA0_RDREQ[33],TCC_EA0_RDREQ_32B[33],TCC_EA0_RDREQ_LEVEL[33],TCC_EA0_ATOMIC_LEVEL[34],TCC_EA0_RDREQ[34],TCC_EA0_RDREQ_32B[34],TCC_EA0_RDREQ_LEVEL[34],TCC_EA0_ATOMIC_LEVEL[35],TCC_EA0_RDREQ[35],TCC_EA0_RDREQ_32B[35],TCC_EA0_RDREQ_LEVEL[35],TCC_EA0_ATOMIC_LEVEL[36],TCC_EA0_RDREQ[36],TCC_EA0_RDREQ_32B[36],TCC_EA0_RDREQ_LEVEL[36],TCC_EA0_ATOMIC_LEVEL[37],TCC_EA0_RDREQ[37],TCC_EA0_RDREQ_32B[37],TCC_EA0_RDREQ_LEVEL[37],TCC_EA0_ATOMIC_LEVEL[38],TCC_EA0_RDREQ[38],TCC_EA0_RDREQ_32B[38],TCC_EA0_RDREQ_LEVEL[38],TCC_EA0_ATOMIC_LEVEL[39],TCC_EA0_RDREQ[39],TCC_EA0_RDREQ_32B[39],TCC_EA0_RDREQ_LEVEL[39],TCC_EA0_ATOMIC_LEVEL[40],TCC_EA0_RDREQ[40],TCC_EA0_RDREQ_32B[40],TCC_EA0_RDREQ_LEVEL[40],TCC_EA0_ATOMIC_LEVEL[41],TCC_EA0_RDREQ[41],TCC_EA0_RDREQ_32B[41],TCC_EA0_RDREQ_LEVEL[41],TCC_EA0_ATOMIC_LEVEL[42],TCC_EA0_RDREQ[42],TCC_EA0_RDREQ_32B[42],TCC_EA0_RDREQ_LEVEL[42],TCC_EA0_ATOMIC_LEVEL[43],TCC_EA0_RDREQ[43],TCC_EA0_RDREQ_32B[43],TCC_EA0_RDREQ_LEVEL[43],TCC_EA0_ATOMIC_LEVEL[44],TCC_EA0_RDREQ[44],TCC_EA0_RDREQ_32B[44],TCC_EA0_RDREQ_LEVEL[44],TCC_EA0_ATOMIC_LEVEL[45],TCC_EA0_RDREQ[45],TCC_EA0_RDREQ_32B[45],TCC_EA0_RDREQ_LEVEL[45],TCC_EA0_ATOMIC_LEVEL[46],TCC_EA0_RDREQ[46],TCC_EA0_RDREQ_32B[46],TCC_EA0_RDREQ_LEVEL[46],TCC_EA0_ATOMIC_LEVEL[47],TCC_EA0_RDREQ[47],TCC_EA0_RDREQ_32B[47],TCC_EA0_RDREQ_LEVEL[47],TCC_EA0_ATOMIC_LEVEL[48],TCC_EA0_RDREQ[48],TCC_EA0_RDREQ_32B[48],TCC_EA0_RDREQ_LEVEL[48],TCC_EA0_ATOMIC_LEVEL[49],TCC_EA0_RDREQ[49],TCC_EA0_RDREQ_32B[49],TCC_EA0_RDREQ_LEVEL[49],TCC_EA0_ATOMIC_LEVEL[50],TCC_EA0_RDREQ[50],TCC_EA0_RDREQ_32B[50],TCC_EA0_RDREQ_LEVEL[50],TCC_EA0_ATOMIC_LEVEL[51],TCC_EA0_RDREQ[51],TCC_EA0_RDREQ_32B[51],TCC_EA0_RDREQ_LEVEL[51],TCC_EA0_ATOMIC_LEVEL[52],TCC_EA0_RDREQ[52],TCC_EA0_RDREQ_32B[52],TCC_EA0_RDREQ_LEVEL[52],TCC_EA0_ATOMIC_LEVEL[53],TCC_EA0_RDREQ[53],TCC_EA0_RDREQ_32B[53],TCC_EA0_RDREQ_LEVEL[53],TCC_EA0_ATOMIC_LEVEL[54],TCC_EA0_RDREQ[54],TCC_EA0_RDREQ_32B[54],TCC_EA0_RDREQ_LEVEL[54],TCC_EA0_ATOMIC_LEVEL[55],TCC_EA0_RDREQ[55],TCC_EA0_RDREQ_32B[55],TCC_EA0_RDREQ_LEVEL[55],TCC_EA0_ATOMIC_LEVEL[56],TCC_EA0_RDREQ[56],TCC_EA0_RDREQ_32B[56],TCC_EA0_RDREQ_LEVEL[56],TCC_EA0_ATOMIC_LEVEL[57],TCC_EA0_RDREQ[57],TCC_EA0_RDREQ_32B[57],TCC_EA0_RDREQ_LEVEL[57],TCC_EA0_ATOMIC_LEVEL[58],TCC_EA0_RDREQ[58],TCC_EA0_RDREQ_32B[58],TCC_EA0_RDREQ_LEVEL[58],TCC_EA0_ATOMIC_LEVEL[59],TCC_EA0_RDREQ[59],TCC_EA0_RDREQ_32B[59],TCC_EA0_RDREQ_LEVEL[59],TCC_EA0_ATOMIC_LEVEL[60],TCC_EA0_RDREQ[60],TCC_EA0_RDREQ_32B[60],TCC_EA0_RDREQ_LEVEL[60],TCC_EA0_ATOMIC_LEVEL[61],TCC_EA0_RDREQ[61],TCC_EA0_RDREQ_32B[61],TCC_EA0_RDREQ_LEVEL[61],TCC_EA0_ATOMIC_LEVEL[62],TCC_EA0_RDREQ[62],TCC_EA0_RDREQ_32B[62],TCC_EA0_RDREQ_LEVEL[62],TCC_EA0_ATOMIC_LEVEL[63],TCC_EA0_RDREQ[63],TCC_EA0_RDREQ_32B[63],TCC_EA0_RDREQ_LEVEL[63],TCC_EA0_ATOMIC_LEVEL[64],TCC_EA0_RDREQ[64],TCC_EA0_RDREQ_32B[64],TCC_EA0_RDREQ_LEVEL[64],TCC_EA0_ATOMIC_LEVEL[65],TCC_EA0_RDREQ[65],TCC_EA0_RDREQ_32B[65],TCC_EA0_RDREQ_LEVEL[65],TCC_EA0_ATOMIC_LEVEL[66],TCC_EA0_RDREQ[66],TCC_EA0_RDREQ_32B[66],TCC_EA0_RDREQ_LEVEL[66],TCC_EA0_ATOMIC_LEVEL[67],TCC_EA0_RDREQ[67],TCC_EA0_RDREQ_32B[67],TCC_EA0_RDREQ_LEVEL[67],TCC_EA0_ATOMIC_LEVEL[68],TCC_EA0_RDREQ[68],TCC_EA0_RDREQ_32B[68],TCC_EA0_RDREQ_LEVEL[68],TCC_EA0_ATOMIC_LEVEL[69],TCC_EA0_RDREQ[69],TCC_EA0_RDREQ_32B[69],TCC_EA0_RDREQ_LEVEL[69],TCC_EA0_ATOMIC_LEVEL[70],TCC_EA0_RDREQ[70],TCC_EA0_RDREQ_32B[70],TCC_EA0_RDREQ_LEVEL[70],TCC_EA0_ATOMIC_LEVEL[71],TCC_EA0_RDREQ[71],TCC_EA0_RDREQ_32B[71],TCC_EA0_RDREQ_LEVEL[71],TCC_EA0_ATOMIC_LEVEL[72],TCC_EA0_RDREQ[72],TCC_EA0_RDREQ_32B[72],TCC_EA0_RDREQ_LEVEL[72],TCC_EA0_ATOMIC_LEVEL[73],TCC_EA0_RDREQ[73],TCC_EA0_RDREQ_32B[73],TCC_EA0_RDREQ_LEVEL[73],TCC_EA0_ATOMIC_LEVEL[74],TCC_EA0_RDREQ[74],TCC_EA0_RDREQ_32B[74],TCC_EA0_RDREQ_LEVEL[74],TCC_EA0_ATOMIC_LEVEL[75],TCC_EA0_RDREQ[75],TCC_EA0_RDREQ_32B[75],TCC_EA0_RDREQ_LEVEL[75],TCC_EA0_ATOMIC_LEVEL[76],TCC_EA0_RDREQ[76],TCC_EA0_RDREQ_32B[76],TCC_EA0_RDREQ_LEVEL[76],TCC_EA0_ATOMIC_LEVEL[77],TCC_EA0_RDREQ[77],TCC_EA0_RDREQ_32B[77],TCC_EA0_RDREQ_LEVEL[77],TCC_EA0_ATOMIC_LEVEL[78],TCC_EA0_RDREQ[78],TCC_EA0_RDREQ_32B[78],TCC_EA0_RDREQ_LEVEL[78],TCC_EA0_ATOMIC_LEVEL[79],TCC_EA0_RDREQ[79],TCC_EA0_RDREQ_32B[79],TCC_EA0_RDREQ_LEVEL[79],TCC_EA0_ATOMIC_LEVEL[80],TCC_EA0_RDREQ[80],TCC_EA0_RDREQ_32B[80],TCC_EA0_RDREQ_LEVEL[80],TCC_EA0_ATOMIC_LEVEL[81],TCC_EA0_RDREQ[81],TCC_EA0_RDREQ_32B[81],TCC_EA0_RDREQ_LEVEL[81],TCC_EA0_ATOMIC_LEVEL[82],TCC_EA0_RDREQ[82],TCC_EA0_RDREQ_32B[82],TCC_EA0_RDREQ_LEVEL[82],TCC_EA0_ATOMIC_LEVEL[83],TCC_EA0_RDREQ[83],TCC_EA0_RDREQ_32B[83],TCC_EA0_RDREQ_LEVEL[83],TCC_EA0_ATOMIC_LEVEL[84],TCC_EA0_RDREQ[84],TCC_EA0_RDREQ_32B[84],TCC_EA0_RDREQ_LEVEL[84],TCC_EA0_ATOMIC_LEVEL[85],TCC_EA0_RDREQ[85],TCC_EA0_RDREQ_32B[85],TCC_EA0_RDREQ_LEVEL[85],TCC_EA0_ATOMIC_LEVEL[86],TCC_EA0_RDREQ[86],TCC_EA0_RDREQ_32B[86],TCC_EA0_RDREQ_LEVEL[86],TCC_EA0_ATOMIC_LEVEL[87],TCC_EA0_RDREQ[87],TCC_EA0_RDREQ_32B[87],TCC_EA0_RDREQ_LEVEL[87],TCC_EA0_ATOMIC_LEVEL[88],TCC_EA0_RDREQ[88],TCC_EA0_RDREQ_32B[88],TCC_EA0_RDREQ_LEVEL[88],TCC_EA0_ATOMIC_LEVEL[89],TCC_EA0_RDREQ[89],TCC_EA0_RDREQ_32B[89],TCC_EA0_RDREQ_LEVEL[89],TCC_EA0_ATOMIC_LEVEL[90],TCC_EA0_RDREQ[90],TCC_EA0_RDREQ_32B[90],TCC_EA0_RDREQ_LEVEL[90],TCC_EA0_ATOMIC_LEVEL[91],TCC_EA0_RDREQ[91],TCC_EA0_RDREQ_32B[91],TCC_EA0_RDREQ_LEVEL[91],TCC_EA0_ATOMIC_LEVEL[92],TCC_EA0_RDREQ[92],TCC_EA0_RDREQ_32B[92],TCC_EA0_RDREQ_LEVEL[92],TCC_EA0_ATOMIC_LEVEL[93],TCC_EA0_RDREQ[93],TCC_EA0_RDREQ_32B[93],TCC_EA0_RDREQ_LEVEL[93],TCC_EA0_ATOMIC_LEVEL[94],TCC_EA0_RDREQ[94],TCC_EA0_RDREQ_32B[94],TCC_EA0_RDREQ_LEVEL[94],TCC_EA0_ATOMIC_LEVEL[95],TCC_EA0_RDREQ[95],TCC_EA0_RDREQ_32B[95],TCC_EA0_RDREQ_LEVEL[95],Wave_Size_16,Correlation_ID_16,SQ_INSTS_VMEM,SQ_INSTS_SALU,SQ_INSTS_VSKIPPED,SQ_INSTS,SQ_INSTS_VALU,SQ_INSTS_VALU_ADD_F16,SQ_INSTS_VALU_MUL_F16,SQ_INSTS_VALU_FMA_F16,GRBM_SPI_BUSY,SPI_CSN_NUM_THREADGROUPS,SPI_CSN_WAVE,CPC_CPC_TCIU_BUSY,CPC_CPC_TCIU_IDLE,CPF_CPF_TCIU_BUSY,CPF_CPF_TCIU_STALL,TA_BUFFER_READ_WAVEFRONTS_sum,TA_BUFFER_WRITE_WAVEFRONTS_sum,TCC_CC_REQ_sum,TCC_NC_REQ_sum,TCC_RW_REQ_sum,TCC_UC_REQ_sum,TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum,TCP_READ_TAGCONFLICT_STALL_CYCLES_sum,TCP_TA_TCP_STATE_READ_sum,TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum,TD_LOAD_WAVEFRONT_sum,TD_SPI_STALL_sum,Wave_Size_17,Correlation_ID_17,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_BUSY_CU_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_INSTS_VALU_CVT,SQ_INSTS_VMEM_WR,SQ_INSTS_VMEM_RD,GRBM_COUNT,GRBM_GUI_ACTIVE,SPI_CSN_WINDOW_VALID,SPI_CSN_BUSY,CPC_CPC_STAT_BUSY,CPC_CPC_STAT_IDLE,CPF_CPF_STAT_BUSY,CPF_CPF_STAT_STALL,TA_BUFFER_WAVEFRONTS_sum,TA_TA_BUSY_sum,TCC_BUSY_sum,TCC_CYCLE_sum,TCC_PROBE_ALL_sum,TCC_PROBE_sum,TCP_GATE_EN1_sum,TCP_GATE_EN2_sum,TCP_TCR_TCP_STALL_CYCLES_sum,TCP_TD_TCP_STALL_CYCLES_sum,TD_TC_STALL_sum,TD_TD_BUSY_sum,Start_Timestamp,End_Timestamp
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diff --git a/tests/workloads/no_roof/MI300A_A1/sysinfo.csv b/tests/workloads/no_roof/MI300A_A1/sysinfo.csv
new file mode 100644
index 0000000000..acc13ccce0
--- /dev/null
+++ b/tests/workloads/no_roof/MI300A_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+no_roof,./tests/vcopy -n 1048576 -b 256 -i 3,SQ|LDS|SQC|TA|TD|TCP|TCC|SPI|CPC|CPF,Wed 29 May 2024 01:42:47 PM  (CDT),2,sh5-1w300-rg3-3,AMD Instinct MI300A Accelerator,"American Megatrends International, LLC.RMO1002DS",Ubuntu 22.04.2 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,131174852,,6.1.2-110,N/A,SPX,NPS1,MI300A_A1,gfx942,32,24576,228,4,24,64,1024,32,2100,1300,2100,1300,96,32,120,4,5324.8,6
diff --git a/tests/workloads/no_roof/MI300A_A1/timestamps.csv b/tests/workloads/no_roof/MI300A_A1/timestamps.csv
new file mode 100644
index 0000000000..b53a67201c
--- /dev/null
+++ b/tests/workloads/no_roof/MI300A_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,11995,1,151520,151520,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",74045395877344,74045395886077,0
+2,11995,1,151520,151520,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",74045395904986,74045395911315,0
+3,11995,1,151520,151520,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",74045395928301,74045395934431,0
diff --git a/tests/workloads/no_roof/MI300X_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/no_roof/MI300X_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..1d7149caba
--- /dev/null
+++ b/tests/workloads/no_roof/MI300X_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,60633,1,969754,969754,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716535240679793,716535240694833,0,433309.0,433309.0,16384.0,65536.0,41757.0,3334464.0
+1,60633,1,969754,969754,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716535240718711,716535240735511,0,432547.0,432547.0,16384.0,65536.0,13177.0,1048580.0
+2,60633,1,969754,969754,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716535240755950,716535240769950,0,372341.0,372341.0,16384.0,65536.0,13027.0,1048580.0
diff --git a/tests/workloads/no_roof/MI300X_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/no_roof/MI300X_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..e6078476cf
--- /dev/null
+++ b/tests/workloads/no_roof/MI300X_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,60633,1,969765,969765,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716535240679793,716535240694833,0,0.0,0.0,0.0
+1,60633,1,969765,969765,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716535240718711,716535240735511,0,0.0,0.0,0.0
+2,60633,1,969765,969765,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716535240755950,716535240769950,0,0.0,0.0,0.0
diff --git a/tests/workloads/no_roof/MI300X_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/no_roof/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..0fbffeea8b
--- /dev/null
+++ b/tests/workloads/no_roof/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,969777,969777,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716535240679793,716535240694833,0,65536.0,3947526.0,315805464.0
+1,60633,1,969777,969777,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716535240718711,716535240735511,0,65536.0,3900342.0,311942632.0
+2,60633,1,969777,969777,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716535240755950,716535240769950,0,65536.0,3873654.0,309917632.0
diff --git a/tests/workloads/no_roof/MI300X_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/no_roof/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..176c7c6fb1
--- /dev/null
+++ b/tests/workloads/no_roof/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,969788,969788,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716535240679793,716535240694833,0,32768.0,491758.0,39331376.0
+1,60633,1,969788,969788,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716535240718711,716535240735511,0,32768.0,334195.0,26734396.0
+2,60633,1,969788,969788,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716535240755950,716535240769950,0,32768.0,321889.0,25749512.0
diff --git a/tests/workloads/no_roof/MI300X_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/no_roof/MI300X_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..7276956eb2
--- /dev/null
+++ b/tests/workloads/no_roof/MI300X_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,60633,1,969799,969799,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716535240679793,716535240694833,0,454139.0,454139.0,258567.0,1816556.0,16384.0,37184565.0,619129.0,0.0,149078556.0
+1,60633,1,969799,969799,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716535240718711,716535240735511,0,357348.0,357348.0,178613.0,1429392.0,16384.0,31305704.0,518072.0,0.0,125576736.0
+2,60633,1,969799,969799,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716535240755950,716535240769950,0,355639.0,355639.0,183147.0,1422556.0,16384.0,30162612.0,503201.0,0.0,121001632.0
diff --git a/tests/workloads/no_roof/MI300X_A1/log.txt b/tests/workloads/no_roof/MI300X_A1/log.txt
new file mode 100644
index 0000000000..69f2ffdc7b
--- /dev/null
+++ b/tests/workloads/no_roof/MI300X_A1/log.txt
@@ -0,0 +1,177 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/no_roof/MI300X_A1
+Target: MI300X_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: None
+Hardware Blocks: All
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+[profiling] Current input file: tests/workloads/no_roof/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH_LEVEL
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+[profiling] Current input file: tests/workloads/no_roof/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+[profiling] Current input file: tests/workloads/no_roof/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/no_roof/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+[profiling] Current input file: tests/workloads/no_roof/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+[profiling] Current input file: tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+[profiling] Current input file: tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU
+[profiling] Current input file: tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+[profiling] Current input file: tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_HITS
+[profiling] Current input file: tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+[profiling] Current input file: tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_13.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[1]
+[profiling] Current input file: tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_14.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[1]
+[profiling] Current input file: tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_15.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[0]
+[profiling] Current input file: tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_16.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[1]
+[profiling] Current input file: tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_17.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[1]
+[profiling] Current input file: tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F32
+[profiling] Current input file: tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+[profiling] Current input file: tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_INST_ANY
+[profiling] Current input file: tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_SCA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_MISC
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_WR
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_RD
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_SMEM
+[profiling] Current input file: tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_THREAD_CYCLES_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ADDR_CONFLICT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_UNALIGNED_STALL
+[profiling] Current input file: tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ITEMS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_MEM_VIOLATIONS
+[profiling] Current input file: tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_F16
+[profiling] Current input file: tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_INST_REQ
+[profiling] Current input file: tests/workloads/no_roof/MI300X_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/no_roof/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/no_roof/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..293092f641
--- /dev/null
+++ b/tests/workloads/no_roof/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/no_roof/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..08439eedce
--- /dev/null
+++ b/tests/workloads/no_roof/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/no_roof/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..6cca322d4e
--- /dev/null
+++ b/tests/workloads/no_roof/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/no_roof/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..e527ad31ba
--- /dev/null
+++ b/tests/workloads/no_roof/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/no_roof/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..3f8e04adb3
--- /dev/null
+++ b/tests/workloads/no_roof/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_0.txt b/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..ebc550fbfe
--- /dev/null
+++ b/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD GRBM_COUNT GRBM_GUI_ACTIVE TCP_GATE_EN1_sum TCP_GATE_EN2_sum TCP_TD_TCP_STALL_CYCLES_sum TCP_TCR_TCP_STALL_CYCLES_sum TA_TA_BUSY_sum TA_BUFFER_WAVEFRONTS_sum TD_TD_BUSY_sum TD_TC_STALL_sum SPI_CSN_WINDOW_VALID SPI_CSN_BUSY CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE CPF_CPF_STAT_BUSY CPF_CPF_STAT_STALL TCC_CYCLE_sum TCC_BUSY_sum TCC_PROBE_sum TCC_PROBE_ALL_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_1.txt b/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..9ad887ddbb
--- /dev/null
+++ b/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 GRBM_SPI_BUSY TCP_READ_TAGCONFLICT_STALL_CYCLES_sum TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum TCP_TA_TCP_STATE_READ_sum TA_BUFFER_READ_WAVEFRONTS_sum TA_BUFFER_WRITE_WAVEFRONTS_sum TD_SPI_STALL_sum TD_LOAD_WAVEFRONT_sum SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE CPC_CPC_TCIU_BUSY CPC_CPC_TCIU_IDLE CPF_CPF_TCIU_BUSY CPF_CPF_TCIU_STALL TCC_NC_REQ_sum TCC_UC_REQ_sum TCC_CC_REQ_sum TCC_RW_REQ_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_10.txt b/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..21c59688f7
--- /dev/null
+++ b/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_11.txt b/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..df6d67d7b7
--- /dev/null
+++ b/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_12.txt b/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..6e5320c11c
--- /dev/null
+++ b/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_13.txt b/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_13.txt
new file mode 100644
index 0000000000..d95492c1cd
--- /dev/null
+++ b/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_13.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_ATOMIC[0] TCC_BUBBLE[0] TCC_CYCLE[0] TCC_EA0_ATOMIC[0] TCC_ATOMIC[1] TCC_BUBBLE[1] TCC_CYCLE[1] TCC_EA0_ATOMIC[1] TCC_ATOMIC[2] TCC_BUBBLE[2] TCC_CYCLE[2] TCC_EA0_ATOMIC[2] TCC_ATOMIC[3] TCC_BUBBLE[3] TCC_CYCLE[3] TCC_EA0_ATOMIC[3] TCC_ATOMIC[4] TCC_BUBBLE[4] TCC_CYCLE[4] TCC_EA0_ATOMIC[4] TCC_ATOMIC[5] TCC_BUBBLE[5] TCC_CYCLE[5] TCC_EA0_ATOMIC[5] TCC_ATOMIC[6] TCC_BUBBLE[6] TCC_CYCLE[6] TCC_EA0_ATOMIC[6] TCC_ATOMIC[7] TCC_BUBBLE[7] TCC_CYCLE[7] TCC_EA0_ATOMIC[7] TCC_ATOMIC[8] TCC_BUBBLE[8] TCC_CYCLE[8] TCC_EA0_ATOMIC[8] TCC_ATOMIC[9] TCC_BUBBLE[9] TCC_CYCLE[9] TCC_EA0_ATOMIC[9] TCC_ATOMIC[10] TCC_BUBBLE[10] TCC_CYCLE[10] TCC_EA0_ATOMIC[10] TCC_ATOMIC[11] TCC_BUBBLE[11] TCC_CYCLE[11] TCC_EA0_ATOMIC[11] TCC_ATOMIC[12] TCC_BUBBLE[12] TCC_CYCLE[12] TCC_EA0_ATOMIC[12] TCC_ATOMIC[13] TCC_BUBBLE[13] TCC_CYCLE[13] TCC_EA0_ATOMIC[13] TCC_ATOMIC[14] TCC_BUBBLE[14] TCC_CYCLE[14] TCC_EA0_ATOMIC[14] TCC_ATOMIC[15] TCC_BUBBLE[15] TCC_CYCLE[15] TCC_EA0_ATOMIC[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_14.txt b/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_14.txt
new file mode 100644
index 0000000000..28327b86d3
--- /dev/null
+++ b/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_14.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_ATOMIC_LEVEL[0] TCC_EA0_RDREQ[0] TCC_EA0_RDREQ_32B[0] TCC_EA0_RDREQ_LEVEL[0] TCC_EA0_ATOMIC_LEVEL[1] TCC_EA0_RDREQ[1] TCC_EA0_RDREQ_32B[1] TCC_EA0_RDREQ_LEVEL[1] TCC_EA0_ATOMIC_LEVEL[2] TCC_EA0_RDREQ[2] TCC_EA0_RDREQ_32B[2] TCC_EA0_RDREQ_LEVEL[2] TCC_EA0_ATOMIC_LEVEL[3] TCC_EA0_RDREQ[3] TCC_EA0_RDREQ_32B[3] TCC_EA0_RDREQ_LEVEL[3] TCC_EA0_ATOMIC_LEVEL[4] TCC_EA0_RDREQ[4] TCC_EA0_RDREQ_32B[4] TCC_EA0_RDREQ_LEVEL[4] TCC_EA0_ATOMIC_LEVEL[5] TCC_EA0_RDREQ[5] TCC_EA0_RDREQ_32B[5] TCC_EA0_RDREQ_LEVEL[5] TCC_EA0_ATOMIC_LEVEL[6] TCC_EA0_RDREQ[6] TCC_EA0_RDREQ_32B[6] TCC_EA0_RDREQ_LEVEL[6] TCC_EA0_ATOMIC_LEVEL[7] TCC_EA0_RDREQ[7] TCC_EA0_RDREQ_32B[7] TCC_EA0_RDREQ_LEVEL[7] TCC_EA0_ATOMIC_LEVEL[8] TCC_EA0_RDREQ[8] TCC_EA0_RDREQ_32B[8] TCC_EA0_RDREQ_LEVEL[8] TCC_EA0_ATOMIC_LEVEL[9] TCC_EA0_RDREQ[9] TCC_EA0_RDREQ_32B[9] TCC_EA0_RDREQ_LEVEL[9] TCC_EA0_ATOMIC_LEVEL[10] TCC_EA0_RDREQ[10] TCC_EA0_RDREQ_32B[10] TCC_EA0_RDREQ_LEVEL[10] TCC_EA0_ATOMIC_LEVEL[11] TCC_EA0_RDREQ[11] TCC_EA0_RDREQ_32B[11] TCC_EA0_RDREQ_LEVEL[11] TCC_EA0_ATOMIC_LEVEL[12] TCC_EA0_RDREQ[12] TCC_EA0_RDREQ_32B[12] TCC_EA0_RDREQ_LEVEL[12] TCC_EA0_ATOMIC_LEVEL[13] TCC_EA0_RDREQ[13] TCC_EA0_RDREQ_32B[13] TCC_EA0_RDREQ_LEVEL[13] TCC_EA0_ATOMIC_LEVEL[14] TCC_EA0_RDREQ[14] TCC_EA0_RDREQ_32B[14] TCC_EA0_RDREQ_LEVEL[14] TCC_EA0_ATOMIC_LEVEL[15] TCC_EA0_RDREQ[15] TCC_EA0_RDREQ_32B[15] TCC_EA0_RDREQ_LEVEL[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_15.txt b/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_15.txt
new file mode 100644
index 0000000000..033ae877ed
--- /dev/null
+++ b/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_15.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_WRREQ[0] TCC_EA0_WRREQ_64B[0] TCC_EA0_WRREQ_LEVEL[0] TCC_HIT[0] TCC_EA0_WRREQ[1] TCC_EA0_WRREQ_64B[1] TCC_EA0_WRREQ_LEVEL[1] TCC_HIT[1] TCC_EA0_WRREQ[2] TCC_EA0_WRREQ_64B[2] TCC_EA0_WRREQ_LEVEL[2] TCC_HIT[2] TCC_EA0_WRREQ[3] TCC_EA0_WRREQ_64B[3] TCC_EA0_WRREQ_LEVEL[3] TCC_HIT[3] TCC_EA0_WRREQ[4] TCC_EA0_WRREQ_64B[4] TCC_EA0_WRREQ_LEVEL[4] TCC_HIT[4] TCC_EA0_WRREQ[5] TCC_EA0_WRREQ_64B[5] TCC_EA0_WRREQ_LEVEL[5] TCC_HIT[5] TCC_EA0_WRREQ[6] TCC_EA0_WRREQ_64B[6] TCC_EA0_WRREQ_LEVEL[6] TCC_HIT[6] TCC_EA0_WRREQ[7] TCC_EA0_WRREQ_64B[7] TCC_EA0_WRREQ_LEVEL[7] TCC_HIT[7] TCC_EA0_WRREQ[8] TCC_EA0_WRREQ_64B[8] TCC_EA0_WRREQ_LEVEL[8] TCC_HIT[8] TCC_EA0_WRREQ[9] TCC_EA0_WRREQ_64B[9] TCC_EA0_WRREQ_LEVEL[9] TCC_HIT[9] TCC_EA0_WRREQ[10] TCC_EA0_WRREQ_64B[10] TCC_EA0_WRREQ_LEVEL[10] TCC_HIT[10] TCC_EA0_WRREQ[11] TCC_EA0_WRREQ_64B[11] TCC_EA0_WRREQ_LEVEL[11] TCC_HIT[11] TCC_EA0_WRREQ[12] TCC_EA0_WRREQ_64B[12] TCC_EA0_WRREQ_LEVEL[12] TCC_HIT[12] TCC_EA0_WRREQ[13] TCC_EA0_WRREQ_64B[13] TCC_EA0_WRREQ_LEVEL[13] TCC_HIT[13] TCC_EA0_WRREQ[14] TCC_EA0_WRREQ_64B[14] TCC_EA0_WRREQ_LEVEL[14] TCC_HIT[14] TCC_EA0_WRREQ[15] TCC_EA0_WRREQ_64B[15] TCC_EA0_WRREQ_LEVEL[15] TCC_HIT[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_16.txt b/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_16.txt
new file mode 100644
index 0000000000..123269c3f9
--- /dev/null
+++ b/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_16.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_MISS[0] TCC_READ[0] TCC_REQ[0] TCC_RW_REQ[0] TCC_MISS[1] TCC_READ[1] TCC_REQ[1] TCC_RW_REQ[1] TCC_MISS[2] TCC_READ[2] TCC_REQ[2] TCC_RW_REQ[2] TCC_MISS[3] TCC_READ[3] TCC_REQ[3] TCC_RW_REQ[3] TCC_MISS[4] TCC_READ[4] TCC_REQ[4] TCC_RW_REQ[4] TCC_MISS[5] TCC_READ[5] TCC_REQ[5] TCC_RW_REQ[5] TCC_MISS[6] TCC_READ[6] TCC_REQ[6] TCC_RW_REQ[6] TCC_MISS[7] TCC_READ[7] TCC_REQ[7] TCC_RW_REQ[7] TCC_MISS[8] TCC_READ[8] TCC_REQ[8] TCC_RW_REQ[8] TCC_MISS[9] TCC_READ[9] TCC_REQ[9] TCC_RW_REQ[9] TCC_MISS[10] TCC_READ[10] TCC_REQ[10] TCC_RW_REQ[10] TCC_MISS[11] TCC_READ[11] TCC_REQ[11] TCC_RW_REQ[11] TCC_MISS[12] TCC_READ[12] TCC_REQ[12] TCC_RW_REQ[12] TCC_MISS[13] TCC_READ[13] TCC_REQ[13] TCC_RW_REQ[13] TCC_MISS[14] TCC_READ[14] TCC_REQ[14] TCC_RW_REQ[14] TCC_MISS[15] TCC_READ[15] TCC_REQ[15] TCC_RW_REQ[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_17.txt b/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_17.txt
new file mode 100644
index 0000000000..102fb795bd
--- /dev/null
+++ b/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_17.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_TAG_STALL[0] TCC_TOO_MANY_EA_WRREQS_STALL[0] TCC_WRITE[0] TCC_TAG_STALL[1] TCC_TOO_MANY_EA_WRREQS_STALL[1] TCC_WRITE[1] TCC_TAG_STALL[2] TCC_TOO_MANY_EA_WRREQS_STALL[2] TCC_WRITE[2] TCC_TAG_STALL[3] TCC_TOO_MANY_EA_WRREQS_STALL[3] TCC_WRITE[3] TCC_TAG_STALL[4] TCC_TOO_MANY_EA_WRREQS_STALL[4] TCC_WRITE[4] TCC_TAG_STALL[5] TCC_TOO_MANY_EA_WRREQS_STALL[5] TCC_WRITE[5] TCC_TAG_STALL[6] TCC_TOO_MANY_EA_WRREQS_STALL[6] TCC_WRITE[6] TCC_TAG_STALL[7] TCC_TOO_MANY_EA_WRREQS_STALL[7] TCC_WRITE[7] TCC_TAG_STALL[8] TCC_TOO_MANY_EA_WRREQS_STALL[8] TCC_WRITE[8] TCC_TAG_STALL[9] TCC_TOO_MANY_EA_WRREQS_STALL[9] TCC_WRITE[9] TCC_TAG_STALL[10] TCC_TOO_MANY_EA_WRREQS_STALL[10] TCC_WRITE[10] TCC_TAG_STALL[11] TCC_TOO_MANY_EA_WRREQS_STALL[11] TCC_WRITE[11] TCC_TAG_STALL[12] TCC_TOO_MANY_EA_WRREQS_STALL[12] TCC_WRITE[12] TCC_TAG_STALL[13] TCC_TOO_MANY_EA_WRREQS_STALL[13] TCC_WRITE[13] TCC_TAG_STALL[14] TCC_TOO_MANY_EA_WRREQS_STALL[14] TCC_WRITE[14] TCC_TAG_STALL[15] TCC_TOO_MANY_EA_WRREQS_STALL[15] TCC_WRITE[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_2.txt b/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..8ff8201c5a
--- /dev/null
+++ b/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 TCP_VOLATILE_sum TCP_TOTAL_ACCESSES_sum TCP_TOTAL_READ_sum TCP_TOTAL_WRITE_sum TA_BUFFER_ATOMIC_WAVEFRONTS_sum TA_BUFFER_TOTAL_CYCLES_sum TD_ATOMIC_WAVEFRONT_sum TD_STORE_WAVEFRONT_sum SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION CPF_CPF_STAT_IDLE CPF_CPF_TCIU_IDLE TCC_REQ_sum TCC_STREAMING_REQ_sum TCC_HIT_sum TCC_MISS_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_3.txt b/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..cb10e4801d
--- /dev/null
+++ b/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS TCP_TOTAL_ATOMIC_WITH_RET_sum TCP_TOTAL_ATOMIC_WITHOUT_RET_sum TCP_TOTAL_WRITEBACK_INVALIDATES_sum TCP_TOTAL_CACHE_ACCESSES_sum TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES_sum TD_COALESCABLE_WAVEFRONT_sum SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE CPF_CMP_UTCL1_STALL_ON_TRANSLATION TCC_READ_sum TCC_WRITE_sum TCC_ATOMIC_sum TCC_WRITEBACK_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_4.txt b/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..e4e6069e38
--- /dev/null
+++ b/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAIT_ANY SQ_WAIT_INST_ANY SQ_ACTIVE_INST_ANY SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU TCP_UTCL1_TRANSLATION_MISS_sum TCP_UTCL1_TRANSLATION_HIT_sum TCP_UTCL1_PERMISSION_MISS_sum TCP_UTCL1_REQUEST_sum TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_TOTAL_WAVEFRONTS_sum SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE TCC_EA0_WRREQ_sum TCC_EA0_WRREQ_64B_sum TCC_EA0_WR_UNCACHED_32B_sum TCC_EA0_WRREQ_DRAM_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_5.txt b/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..77bd288232
--- /dev/null
+++ b/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_SCA SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU TCP_TCC_READ_REQ_sum TCP_TCC_WRITE_REQ_sum TCP_TCC_ATOMIC_WITH_RET_REQ_sum TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN CPC_ME1_DC0_SPI_BUSY TCC_EA0_RDREQ_sum TCC_EA0_RDREQ_32B_sum TCC_BUBBLE_sum TCC_EA0_RD_UNCACHED_32B_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_6.txt b/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..609c184df8
--- /dev/null
+++ b/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_THREAD_CYCLES_VALU SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 TCP_TCC_NC_READ_REQ_sum TCP_TCC_NC_WRITE_REQ_sum TCP_TCC_NC_ATOMIC_REQ_sum TCP_TCC_UC_READ_REQ_sum TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN TCC_EA0_RDREQ_DRAM_sum TCC_TAG_STALL_sum TCC_NORMAL_WRITEBACK_sum TCC_ALL_TC_OP_WB_WRITEBACK_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_7.txt b/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..5881e5fb8f
--- /dev/null
+++ b/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED TCP_TCC_UC_WRITE_REQ_sum TCP_TCC_UC_ATOMIC_REQ_sum TCP_TCC_CC_READ_REQ_sum TCP_TCC_CC_WRITE_REQ_sum TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR TCC_NORMAL_EVICT_sum TCC_ALL_TC_OP_INV_EVICT_sum TCC_TOO_MANY_EA_WRREQS_STALL_sum TCC_EA0_ATOMIC_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_8.txt b/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..66317384f5
--- /dev/null
+++ b/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES TCP_TCC_CC_ATOMIC_REQ_sum TCP_TCC_RW_READ_REQ_sum TCP_TCC_RW_WRITE_REQ_sum TCP_TCC_RW_ATOMIC_REQ_sum SPI_VWC_CSC_WR SPI_RA_BULKY_CU_FULL_CSN TCC_EA0_RDREQ_LEVEL_sum TCC_EA0_WRREQ_LEVEL_sum TCC_EA0_ATOMIC_LEVEL_sum TCC_EA0_WRREQ_STALL_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_9.txt b/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..60ceab315a
--- /dev/null
+++ b/tests/workloads/no_roof/MI300X_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ TCP_PENDING_STALL_CYCLES_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300X_A1/perfmon/timestamps.txt b/tests/workloads/no_roof/MI300X_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..676cca1b80
--- /dev/null
+++ b/tests/workloads/no_roof/MI300X_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/no_roof/MI300X_A1/pmc_perf.csv b/tests/workloads/no_roof/MI300X_A1/pmc_perf.csv
new file mode 100644
index 0000000000..0f31c83d0b
--- /dev/null
+++ b/tests/workloads/no_roof/MI300X_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_1,Correlation_ID_1,XCC_Index,TCC_ATOMIC[0],TCC_BUBBLE[0],TCC_CYCLE[0],TCC_EA0_ATOMIC[0],TCC_ATOMIC[1],TCC_BUBBLE[1],TCC_CYCLE[1],TCC_EA0_ATOMIC[1],TCC_ATOMIC[2],TCC_BUBBLE[2],TCC_CYCLE[2],TCC_EA0_ATOMIC[2],TCC_ATOMIC[3],TCC_BUBBLE[3],TCC_CYCLE[3],TCC_EA0_ATOMIC[3],TCC_ATOMIC[4],TCC_BUBBLE[4],TCC_CYCLE[4],TCC_EA0_ATOMIC[4],TCC_ATOMIC[5],TCC_BUBBLE[5],TCC_CYCLE[5],TCC_EA0_ATOMIC[5],TCC_ATOMIC[6],TCC_BUBBLE[6],TCC_CYCLE[6],TCC_EA0_ATOMIC[6],TCC_ATOMIC[7],TCC_BUBBLE[7],TCC_CYCLE[7],TCC_EA0_ATOMIC[7],TCC_ATOMIC[8],TCC_BUBBLE[8],TCC_CYCLE[8],TCC_EA0_ATOMIC[8],TCC_ATOMIC[9],TCC_BUBBLE[9],TCC_CYCLE[9],TCC_EA0_ATOMIC[9],TCC_ATOMIC[10],TCC_BUBBLE[10],TCC_CYCLE[10],TCC_EA0_ATOMIC[10],TCC_ATOMIC[11],TCC_BUBBLE[11],TCC_CYCLE[11],TCC_EA0_ATOMIC[11],TCC_ATOMIC[12],TCC_BUBBLE[12],TCC_CYCLE[12],TCC_EA0_ATOMIC[12],TCC_ATOMIC[13],TCC_BUBBLE[13],TCC_CYCLE[13],TCC_EA0_ATOMIC[13],TCC_ATOMIC[14],TCC_BUBBLE[14],TCC_CYCLE[14],TCC_EA0_ATOMIC[14],TCC_ATOMIC[15],TCC_BUBBLE[15],TCC_CYCLE[15],TCC_EA0_ATOMIC[15],TCC_ATOMIC[16],TCC_BUBBLE[16],TCC_CYCLE[16],TCC_EA0_ATOMIC[16],TCC_ATOMIC[17],TCC_BUBBLE[17],TCC_CYCLE[17],TCC_EA0_ATOMIC[17],TCC_ATOMIC[18],TCC_BUBBLE[18],TCC_CYCLE[18],TCC_EA0_ATOMIC[18],TCC_ATOMIC[19],TCC_BUBBLE[19],TCC_CYCLE[19],TCC_EA0_ATOMIC[19],TCC_ATOMIC[20],TCC_BUBBLE[20],TCC_CYCLE[20],TCC_EA0_ATOMIC[20],TCC_ATOMIC[21],TCC_BUBBLE[21],TCC_CYCLE[21],TCC_EA0_ATOMIC[21],TCC_ATOMIC[22],TCC_BUBBLE[22],TCC_CYCLE[22],TCC_EA0_ATOMIC[22],TCC_ATOMIC[23],TCC_BUBBLE[23],TCC_CYCLE[23],TCC_EA0_ATOMIC[23],TCC_ATOMIC[24],TCC_BUBBLE[24],TCC_CYCLE[24],TCC_EA0_ATOMIC[24],TCC_ATOMIC[25],TCC_BUBBLE[25],TCC_CYCLE[25],TCC_EA0_ATOMIC[25],TCC_ATOMIC[26],TCC_BUBBLE[26],TCC_CYCLE[26],TCC_EA0_ATOMIC[26],TCC_ATOMIC[27],TCC_BUBBLE[27],TCC_CYCLE[27],TCC_EA0_ATOMIC[27],TCC_ATOMIC[28],TCC_BUBBLE[28],TCC_CYCLE[28],TCC_EA0_ATOMIC[28],TCC_ATOMIC[29],TCC_BUBBLE[29],TCC_CYCLE[29],TCC_EA0_ATOMIC[29],TCC_ATOMIC[30],TCC_BUBBLE[30],TCC_CYCLE[30],TCC_EA0_ATOMIC[30],TCC_ATOMIC[31],TCC_BUBBLE[31],TCC_CYCLE[31],TCC_EA0_ATOMIC[31],TCC_ATOMIC[32],TCC_BUBBLE[32],TCC_CYCLE[32],TCC_EA0_ATOMIC[32],TCC_ATOMIC[33],TCC_BUBBLE[33],TCC_CYCLE[33],TCC_EA0_ATOMIC[33],TCC_ATOMIC[34],TCC_BUBBLE[34],TCC_CYCLE[34],TCC_EA0_ATOMIC[34],TCC_ATOMIC[35],TCC_BUBBLE[35],TCC_CYCLE[35],TCC_EA0_ATOMIC[35],TCC_ATOMIC[36],TCC_BUBBLE[36],TCC_CYCLE[36],TCC_EA0_ATOMIC[36],TCC_ATOMIC[37],TCC_BUBBLE[37],TCC_CYCLE[37],TCC_EA0_ATOMIC[37],TCC_ATOMIC[38],TCC_BUBBLE[38],TCC_CYCLE[38],TCC_EA0_ATOMIC[38],TCC_ATOMIC[39],TCC_BUBBLE[39],TCC_CYCLE[39],TCC_EA0_ATOMIC[39],TCC_ATOMIC[40],TCC_BUBBLE[40],TCC_CYCLE[40],TCC_EA0_ATOMIC[40],TCC_ATOMIC[41],TCC_BUBBLE[41],TCC_CYCLE[41],TCC_EA0_ATOMIC[41],TCC_ATOMIC[42],TCC_BUBBLE[42],TCC_CYCLE[42],TCC_EA0_ATOMIC[42],TCC_ATOMIC[43],TCC_BUBBLE[43],TCC_CYCLE[43],TCC_EA0_ATOMIC[43],TCC_ATOMIC[44],TCC_BUBBLE[44],TCC_CYCLE[44],TCC_EA0_ATOMIC[44],TCC_ATOMIC[45],TCC_BUBBLE[45],TCC_CYCLE[45],TCC_EA0_ATOMIC[45],TCC_ATOMIC[46],TCC_BUBBLE[46],TCC_CYCLE[46],TCC_EA0_ATOMIC[46],TCC_ATOMIC[47],TCC_BUBBLE[47],TCC_CYCLE[47],TCC_EA0_ATOMIC[47],TCC_ATOMIC[48],TCC_BUBBLE[48],TCC_CYCLE[48],TCC_EA0_ATOMIC[48],TCC_ATOMIC[49],TCC_BUBBLE[49],TCC_CYCLE[49],TCC_EA0_ATOMIC[49],TCC_ATOMIC[50],TCC_BUBBLE[50],TCC_CYCLE[50],TCC_EA0_ATOMIC[50],TCC_ATOMIC[51],TCC_BUBBLE[51],TCC_CYCLE[51],TCC_EA0_ATOMIC[51],TCC_ATOMIC[52],TCC_BUBBLE[52],TCC_CYCLE[52],TCC_EA0_ATOMIC[52],TCC_ATOMIC[53],TCC_BUBBLE[53],TCC_CYCLE[53],TCC_EA0_ATOMIC[53],TCC_ATOMIC[54],TCC_BUBBLE[54],TCC_CYCLE[54],TCC_EA0_ATOMIC[54],TCC_ATOMIC[55],TCC_BUBBLE[55],TCC_CYCLE[55],TCC_EA0_ATOMIC[55],TCC_ATOMIC[56],TCC_BUBBLE[56],TCC_CYCLE[56],TCC_EA0_ATOMIC[56],TCC_ATOMIC[57],TCC_BUBBLE[57],TCC_CYCLE[57],TCC_EA0_ATOMIC[57],TCC_ATOMIC[58],TCC_BUBBLE[58],TCC_CYCLE[58],TCC_EA0_ATOMIC[58],TCC_ATOMIC[59],TCC_BUBBLE[59],TCC_CYCLE[59],TCC_EA0_ATOMIC[59],TCC_ATOMIC[60],TCC_BUBBLE[60],TCC_CYCLE[60],TCC_EA0_ATOMIC[60],TCC_ATOMIC[61],TCC_BUBBLE[61],TCC_CYCLE[61],TCC_EA0_ATOMIC[61],TCC_ATOMIC[62],TCC_BUBBLE[62],TCC_CYCLE[62],TCC_EA0_ATOMIC[62],TCC_ATOMIC[63],TCC_BUBBLE[63],TCC_CYCLE[63],TCC_EA0_ATOMIC[63],TCC_ATOMIC[64],TCC_BUBBLE[64],TCC_CYCLE[64],TCC_EA0_ATOMIC[64],TCC_ATOMIC[65],TCC_BUBBLE[65],TCC_CYCLE[65],TCC_EA0_ATOMIC[65],TCC_ATOMIC[66],TCC_BUBBLE[66],TCC_CYCLE[66],TCC_EA0_ATOMIC[66],TCC_ATOMIC[67],TCC_BUBBLE[67],TCC_CYCLE[67],TCC_EA0_ATOMIC[67],TCC_ATOMIC[68],TCC_BUBBLE[68],TCC_CYCLE[68],TCC_EA0_ATOMIC[68],TCC_ATOMIC[69],TCC_BUBBLE[69],TCC_CYCLE[69],TCC_EA0_ATOMIC[69],TCC_ATOMIC[70],TCC_BUBBLE[70],TCC_CYCLE[70],TCC_EA0_ATOMIC[70],TCC_ATOMIC[71],TCC_BUBBLE[71],TCC_CYCLE[71],TCC_EA0_ATOMIC[71],TCC_ATOMIC[72],TCC_BUBBLE[72],TCC_CYCLE[72],TCC_EA0_ATOMIC[72],TCC_ATOMIC[73],TCC_BUBBLE[73],TCC_CYCLE[73],TCC_EA0_ATOMIC[73],TCC_ATOMIC[74],TCC_BUBBLE[74],TCC_CYCLE[74],TCC_EA0_ATOMIC[74],TCC_ATOMIC[75],TCC_BUBBLE[75],TCC_CYCLE[75],TCC_EA0_ATOMIC[75],TCC_ATOMIC[76],TCC_BUBBLE[76],TCC_CYCLE[76],TCC_EA0_ATOMIC[76],TCC_ATOMIC[77],TCC_BUBBLE[77],TCC_CYCLE[77],TCC_EA0_ATOMIC[77],TCC_ATOMIC[78],TCC_BUBBLE[78],TCC_CYCLE[78],TCC_EA0_ATOMIC[78],TCC_ATOMIC[79],TCC_BUBBLE[79],TCC_CYCLE[79],TCC_EA0_ATOMIC[79],TCC_ATOMIC[80],TCC_BUBBLE[80],TCC_CYCLE[80],TCC_EA0_ATOMIC[80],TCC_ATOMIC[81],TCC_BUBBLE[81],TCC_CYCLE[81],TCC_EA0_ATOMIC[81],TCC_ATOMIC[82],TCC_BUBBLE[82],TCC_CYCLE[82],TCC_EA0_ATOMIC[82],TCC_ATOMIC[83],TCC_BUBBLE[83],TCC_CYCLE[83],TCC_EA0_ATOMIC[83],TCC_ATOMIC[84],TCC_BUBBLE[84],TCC_CYCLE[84],TCC_EA0_ATOMIC[84],TCC_ATOMIC[85],TCC_BUBBLE[85],TCC_CYCLE[85],TCC_EA0_ATOMIC[85],TCC_ATOMIC[86],TCC_BUBBLE[86],TCC_CYCLE[86],TCC_EA0_ATOMIC[86],TCC_ATOMIC[87],TCC_BUBBLE[87],TCC_CYCLE[87],TCC_EA0_ATOMIC[87],TCC_ATOMIC[88],TCC_BUBBLE[88],TCC_CYCLE[88],TCC_EA0_ATOMIC[88],TCC_ATOMIC[89],TCC_BUBBLE[89],TCC_CYCLE[89],TCC_EA0_ATOMIC[89],TCC_ATOMIC[90],TCC_BUBBLE[90],TCC_CYCLE[90],TCC_EA0_ATOMIC[90],TCC_ATOMIC[91],TCC_BUBBLE[91],TCC_CYCLE[91],TCC_EA0_ATOMIC[91],TCC_ATOMIC[92],TCC_BUBBLE[92],TCC_CYCLE[92],TCC_EA0_ATOMIC[92],TCC_ATOMIC[93],TCC_BUBBLE[93],TCC_CYCLE[93],TCC_EA0_ATOMIC[93],TCC_ATOMIC[94],TCC_BUBBLE[94],TCC_CYCLE[94],TCC_EA0_ATOMIC[94],TCC_ATOMIC[95],TCC_BUBBLE[95],TCC_CYCLE[95],TCC_EA0_ATOMIC[95],TCC_ATOMIC[96],TCC_BUBBLE[96],TCC_CYCLE[96],TCC_EA0_ATOMIC[96],TCC_ATOMIC[97],TCC_BUBBLE[97],TCC_CYCLE[97],TCC_EA0_ATOMIC[97],TCC_ATOMIC[98],TCC_BUBBLE[98],TCC_CYCLE[98],TCC_EA0_ATOMIC[98],TCC_ATOMIC[99],TCC_BUBBLE[99],TCC_CYCLE[99],TCC_EA0_ATOMIC[99],TCC_ATOMIC[100],TCC_BUBBLE[100],TCC_CYCLE[100],TCC_EA0_ATOMIC[100],TCC_ATOMIC[101],TCC_BUBBLE[101],TCC_CYCLE[101],TCC_EA0_ATOMIC[101],TCC_ATOMIC[102],TCC_BUBBLE[102],TCC_CYCLE[102],TCC_EA0_ATOMIC[102],TCC_ATOMIC[103],TCC_BUBBLE[103],TCC_CYCLE[103],TCC_EA0_ATOMIC[103],TCC_ATOMIC[104],TCC_BUBBLE[104],TCC_CYCLE[104],TCC_EA0_ATOMIC[104],TCC_ATOMIC[105],TCC_BUBBLE[105],TCC_CYCLE[105],TCC_EA0_ATOMIC[105],TCC_ATOMIC[106],TCC_BUBBLE[106],TCC_CYCLE[106],TCC_EA0_ATOMIC[106],TCC_ATOMIC[107],TCC_BUBBLE[107],TCC_CYCLE[107],TCC_EA0_ATOMIC[107],TCC_ATOMIC[108],TCC_BUBBLE[108],TCC_CYCLE[108],TCC_EA0_ATOMIC[108],TCC_ATOMIC[109],TCC_BUBBLE[109],TCC_CYCLE[109],TCC_EA0_ATOMIC[109],TCC_ATOMIC[110],TCC_BUBBLE[110],TCC_CYCLE[110],TCC_EA0_ATOMIC[110],TCC_ATOMIC[111],TCC_BUBBLE[111],TCC_CYCLE[111],TCC_EA0_ATOMIC[111],TCC_ATOMIC[112],TCC_BUBBLE[112],TCC_CYCLE[112],TCC_EA0_ATOMIC[112],TCC_ATOMIC[113],TCC_BUBBLE[113],TCC_CYCLE[113],TCC_EA0_ATOMIC[113],TCC_ATOMIC[114],TCC_BUBBLE[114],TCC_CYCLE[114],TCC_EA0_ATOMIC[114],TCC_ATOMIC[115],TCC_BUBBLE[115],TCC_CYCLE[115],TCC_EA0_ATOMIC[115],TCC_ATOMIC[116],TCC_BUBBLE[116],TCC_CYCLE[116],TCC_EA0_ATOMIC[116],TCC_ATOMIC[117],TCC_BUBBLE[117],TCC_CYCLE[117],TCC_EA0_ATOMIC[117],TCC_ATOMIC[118],TCC_BUBBLE[118],TCC_CYCLE[118],TCC_EA0_ATOMIC[118],TCC_ATOMIC[119],TCC_BUBBLE[119],TCC_CYCLE[119],TCC_EA0_ATOMIC[119],TCC_ATOMIC[120],TCC_BUBBLE[120],TCC_CYCLE[120],TCC_EA0_ATOMIC[120],TCC_ATOMIC[121],TCC_BUBBLE[121],TCC_CYCLE[121],TCC_EA0_ATOMIC[121],TCC_ATOMIC[122],TCC_BUBBLE[122],TCC_CYCLE[122],TCC_EA0_ATOMIC[122],TCC_ATOMIC[123],TCC_BUBBLE[123],TCC_CYCLE[123],TCC_EA0_ATOMIC[123],TCC_ATOMIC[124],TCC_BUBBLE[124],TCC_CYCLE[124],TCC_EA0_ATOMIC[124],TCC_ATOMIC[125],TCC_BUBBLE[125],TCC_CYCLE[125],TCC_EA0_ATOMIC[125],TCC_ATOMIC[126],TCC_BUBBLE[126],TCC_CYCLE[126],TCC_EA0_ATOMIC[126],TCC_ATOMIC[127],TCC_BUBBLE[127],TCC_CYCLE[127],TCC_EA0_ATOMIC[127],Wave_Size_2,Correlation_ID_2,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,TA_FLAT_ATOMIC_WAVEFRONTS_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,TCC_ALL_TC_OP_INV_EVICT_sum,TCC_EA0_ATOMIC_sum,TCC_NORMAL_EVICT_sum,TCC_TOO_MANY_EA_WRREQS_STALL_sum,TCP_TCC_CC_READ_REQ_sum,TCP_TCC_CC_WRITE_REQ_sum,TCP_TCC_UC_ATOMIC_REQ_sum,TCP_TCC_UC_WRITE_REQ_sum,Wave_Size_3,Correlation_ID_3,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,TCC_EA0_ATOMIC_LEVEL_sum,TCC_EA0_RDREQ_LEVEL_sum,TCC_EA0_WRREQ_LEVEL_sum,TCC_EA0_WRREQ_STALL_sum,TCP_TCC_CC_ATOMIC_REQ_sum,TCP_TCC_RW_ATOMIC_REQ_sum,TCP_TCC_RW_READ_REQ_sum,TCP_TCC_RW_WRITE_REQ_sum,Wave_Size_4,Correlation_ID_4,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SPI_RA_REQ_NO_ALLOC,SPI_RA_REQ_NO_ALLOC_CSN,CPC_CPC_STAT_STALL,CPC_UTCL1_STALL_ON_TRANSLATION,CPF_CPF_STAT_IDLE,CPF_CPF_TCIU_IDLE,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,TA_BUFFER_TOTAL_CYCLES_sum,TCC_HIT_sum,TCC_MISS_sum,TCC_REQ_sum,TCC_STREAMING_REQ_sum,TCP_TOTAL_ACCESSES_sum,TCP_TOTAL_READ_sum,TCP_TOTAL_WRITE_sum,TCP_VOLATILE_sum,TD_ATOMIC_WAVEFRONT_sum,TD_STORE_WAVEFRONT_sum,Wave_Size_5,Correlation_ID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SQ_INST_CYCLES_SALU,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,CPC_ME1_DC0_SPI_BUSY,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,TCC_BUBBLE_sum,TCC_EA0_RDREQ_32B_sum,TCC_EA0_RDREQ_sum,TCC_EA0_RD_UNCACHED_32B_sum,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,TCP_TCC_READ_REQ_sum,TCP_TCC_WRITE_REQ_sum,Start_Timestamp,End_Timestamp
+0,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) 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diff --git a/tests/workloads/no_roof/MI300X_A1/sysinfo.csv b/tests/workloads/no_roof/MI300X_A1/sysinfo.csv
new file mode 100644
index 0000000000..e6f960db2b
--- /dev/null
+++ b/tests/workloads/no_roof/MI300X_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+no_roof,./tests/vcopy -n 1048576 -b 256 -i 3,SQ|LDS|SQC|TA|TD|TCP|TCC|SPI|CPC|CPF,Wed 29 May 2024 12:05:44 PM  (CDT),2,splinter-126-wr-c6,AMD Ryzen 9 7950X 16-Core Processor,"American Megatrends International, LLC.VS2683299N.FD",Ubuntu 22.04.4 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,114656528,,6.2.0-13611,113-MI3SRIOV-001,SPX,NPS1,MI300X_A1,gfx942,32,4096,304,4,32,64,1024,32,2100,1300,2100,1300,128,32,160,4,5324.8,8
diff --git a/tests/workloads/no_roof/MI300X_A1/timestamps.csv b/tests/workloads/no_roof/MI300X_A1/timestamps.csv
new file mode 100644
index 0000000000..b599438b06
--- /dev/null
+++ b/tests/workloads/no_roof/MI300X_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,60633,1,970009,970009,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716535240679793,716535240694833,0
+2,60633,1,970009,970009,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716535240718711,716535240735511,0
+3,60633,1,970009,970009,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716535240755950,716535240769950,0
diff --git a/tests/workloads/path/MI300A_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/path/MI300A_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..b12b3694b5
--- /dev/null
+++ b/tests/workloads/path/MI300A_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,11995,1,144666,144666,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73517673339483,73517673347095,0,205430.0,205430.0,16384.0,65536.0,26688.0,2149344.0
+1,11995,1,144666,144666,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73517673385473,73517673391482,0,178672.0,178672.0,16384.0,65536.0,13299.0,1048656.0
+2,11995,1,144666,144666,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73517673363600,73517673369970,0,165003.0,165003.0,16384.0,65536.0,13060.0,1049392.0
diff --git a/tests/workloads/path/MI300A_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/path/MI300A_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..66198e7eef
--- /dev/null
+++ b/tests/workloads/path/MI300A_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,11995,1,144677,144677,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73517673339483,73517673347095,0,0.0,0.0,0.0
+1,11995,1,144677,144677,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73517673385473,73517673391482,0,0.0,0.0,0.0
+2,11995,1,144677,144677,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73517673363600,73517673369970,0,0.0,0.0,0.0
diff --git a/tests/workloads/path/MI300A_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/path/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..63f079f628
--- /dev/null
+++ b/tests/workloads/path/MI300A_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,144688,144688,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73517673339483,73517673347095,0,65536.0,340786.0,27207344.0
+1,11995,1,144688,144688,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73517673385473,73517673391482,0,65536.0,277970.0,22234008.0
+2,11995,1,144688,144688,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73517673363600,73517673369970,0,65536.0,215822.0,17342904.0
diff --git a/tests/workloads/path/MI300A_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/path/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..5913913b88
--- /dev/null
+++ b/tests/workloads/path/MI300A_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,11995,1,144699,144699,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73517673339483,73517673347095,0,32768.0,534566.0,42752356.0
+1,11995,1,144699,144699,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73517673385473,73517673391482,0,32768.0,415032.0,33195988.0
+2,11995,1,144699,144699,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73517673363600,73517673369970,0,32768.0,408920.0,32710300.0
diff --git a/tests/workloads/path/MI300A_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/path/MI300A_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..005cd7fa63
--- /dev/null
+++ b/tests/workloads/path/MI300A_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,11995,1,144710,144710,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73517673339483,73517673347095,0,203242.0,203242.0,108439.0,812968.0,16384.0,13784518.0,249142.0,0.0,55564396.0
+1,11995,1,144710,144710,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73517673385473,73517673391482,0,169171.0,169171.0,90620.0,676684.0,16384.0,10365368.0,191706.0,0.0,41854316.0
+2,11995,1,144710,144710,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73517673363600,73517673369970,0,171791.0,171791.0,90307.0,687164.0,16384.0,10363168.0,193033.0,0.0,41847616.0
diff --git a/tests/workloads/path/MI300A_A1/log.txt b/tests/workloads/path/MI300A_A1/log.txt
new file mode 100644
index 0000000000..6f76ce7ca0
--- /dev/null
+++ b/tests/workloads/path/MI300A_A1/log.txt
@@ -0,0 +1,229 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/path/MI300A_A1
+Target: MI300A_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: None
+Hardware Blocks: All
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+[profiling] Current input file: tests/workloads/path/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+[profiling] Current input file: tests/workloads/path/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+[profiling] Current input file: tests/workloads/path/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+[profiling] Current input file: tests/workloads/path/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+[profiling] Current input file: tests/workloads/path/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LEVEL_WAVES
+[profiling] Current input file: tests/workloads/path/MI300A_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_CVT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_WR
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_RD
+[profiling] Current input file: tests/workloads/path/MI300A_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F16
+[profiling] Current input file: tests/workloads/path/MI300A_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_REQ
+[profiling] Current input file: tests/workloads/path/MI300A_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_HITS
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_MISSES_DUPLICATE
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_1
+[profiling] Current input file: tests/workloads/path/MI300A_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/path/MI300A_A1/perfmon/pmc_perf_13.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[1]
+[profiling] Current input file: tests/workloads/path/MI300A_A1/perfmon/pmc_perf_14.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[3]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[3]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[3]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[3]
+[profiling] Current input file: tests/workloads/path/MI300A_A1/perfmon/pmc_perf_15.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[0]
+[profiling] Current input file: tests/workloads/path/MI300A_A1/perfmon/pmc_perf_16.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[2]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_RW_REQ[2]
+[profiling] Current input file: tests/workloads/path/MI300A_A1/perfmon/pmc_perf_17.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[1]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[2]
+[profiling] Current input file: tests/workloads/path/MI300A_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_ADD_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MUL_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_FMA_F64
+[profiling] Current input file: tests/workloads/path/MI300A_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_EXP_GDS
+[profiling] Current input file: tests/workloads/path/MI300A_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_ANY
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_LDS
+[profiling] Current input file: tests/workloads/path/MI300A_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_SCA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_MISC
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_WR
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_VMEM_RD
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_CYCLES_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - TCP_TCC_READ_REQ_sum
+[profiling] Current input file: tests/workloads/path/MI300A_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_THREAD_CYCLES_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_BANK_CONFLICT
+[profiling] Current input file: tests/workloads/path/MI300A_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ITEMS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_MEM_VIOLATIONS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ATOMIC_RETURN
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_IDX_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_RESTORED
+[profiling] Current input file: tests/workloads/path/MI300A_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+[profiling] Current input file: tests/workloads/path/MI300A_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_BF16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_INST_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_READ_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_WRITE_REQ
+[profiling] Current input file: tests/workloads/path/MI300A_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished copying vectors to the GPU
+   |-> [/opt/rocm/bin/rocprofv2] sw thinks it moved 1.000000 KB per wave
+   |-> [/opt/rocm/bin/rocprofv2] Total threads: 1048576, Grid Size: 4096 block Size:256, Wavefronts:16384:
+   |-> [/opt/rocm/bin/rocprofv2] Launching the  kernel on the GPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished executing kernel
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/path/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/path/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..293092f641
--- /dev/null
+++ b/tests/workloads/path/MI300A_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/path/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..08439eedce
--- /dev/null
+++ b/tests/workloads/path/MI300A_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/path/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..6cca322d4e
--- /dev/null
+++ b/tests/workloads/path/MI300A_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/path/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..e527ad31ba
--- /dev/null
+++ b/tests/workloads/path/MI300A_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/path/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..3f8e04adb3
--- /dev/null
+++ b/tests/workloads/path/MI300A_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_0.txt b/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..ebc550fbfe
--- /dev/null
+++ b/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD GRBM_COUNT GRBM_GUI_ACTIVE TCP_GATE_EN1_sum TCP_GATE_EN2_sum TCP_TD_TCP_STALL_CYCLES_sum TCP_TCR_TCP_STALL_CYCLES_sum TA_TA_BUSY_sum TA_BUFFER_WAVEFRONTS_sum TD_TD_BUSY_sum TD_TC_STALL_sum SPI_CSN_WINDOW_VALID SPI_CSN_BUSY CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE CPF_CPF_STAT_BUSY CPF_CPF_STAT_STALL TCC_CYCLE_sum TCC_BUSY_sum TCC_PROBE_sum TCC_PROBE_ALL_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_1.txt b/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..9ad887ddbb
--- /dev/null
+++ b/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 GRBM_SPI_BUSY TCP_READ_TAGCONFLICT_STALL_CYCLES_sum TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum TCP_TA_TCP_STATE_READ_sum TA_BUFFER_READ_WAVEFRONTS_sum TA_BUFFER_WRITE_WAVEFRONTS_sum TD_SPI_STALL_sum TD_LOAD_WAVEFRONT_sum SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE CPC_CPC_TCIU_BUSY CPC_CPC_TCIU_IDLE CPF_CPF_TCIU_BUSY CPF_CPF_TCIU_STALL TCC_NC_REQ_sum TCC_UC_REQ_sum TCC_CC_REQ_sum TCC_RW_REQ_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_10.txt b/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..21c59688f7
--- /dev/null
+++ b/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_11.txt b/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..df6d67d7b7
--- /dev/null
+++ b/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_12.txt b/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..6e5320c11c
--- /dev/null
+++ b/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_13.txt b/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_13.txt
new file mode 100644
index 0000000000..d95492c1cd
--- /dev/null
+++ b/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_13.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_ATOMIC[0] TCC_BUBBLE[0] TCC_CYCLE[0] TCC_EA0_ATOMIC[0] TCC_ATOMIC[1] TCC_BUBBLE[1] TCC_CYCLE[1] TCC_EA0_ATOMIC[1] TCC_ATOMIC[2] TCC_BUBBLE[2] TCC_CYCLE[2] TCC_EA0_ATOMIC[2] TCC_ATOMIC[3] TCC_BUBBLE[3] TCC_CYCLE[3] TCC_EA0_ATOMIC[3] TCC_ATOMIC[4] TCC_BUBBLE[4] TCC_CYCLE[4] TCC_EA0_ATOMIC[4] TCC_ATOMIC[5] TCC_BUBBLE[5] TCC_CYCLE[5] TCC_EA0_ATOMIC[5] TCC_ATOMIC[6] TCC_BUBBLE[6] TCC_CYCLE[6] TCC_EA0_ATOMIC[6] TCC_ATOMIC[7] TCC_BUBBLE[7] TCC_CYCLE[7] TCC_EA0_ATOMIC[7] TCC_ATOMIC[8] TCC_BUBBLE[8] TCC_CYCLE[8] TCC_EA0_ATOMIC[8] TCC_ATOMIC[9] TCC_BUBBLE[9] TCC_CYCLE[9] TCC_EA0_ATOMIC[9] TCC_ATOMIC[10] TCC_BUBBLE[10] TCC_CYCLE[10] TCC_EA0_ATOMIC[10] TCC_ATOMIC[11] TCC_BUBBLE[11] TCC_CYCLE[11] TCC_EA0_ATOMIC[11] TCC_ATOMIC[12] TCC_BUBBLE[12] TCC_CYCLE[12] TCC_EA0_ATOMIC[12] TCC_ATOMIC[13] TCC_BUBBLE[13] TCC_CYCLE[13] TCC_EA0_ATOMIC[13] TCC_ATOMIC[14] TCC_BUBBLE[14] TCC_CYCLE[14] TCC_EA0_ATOMIC[14] TCC_ATOMIC[15] TCC_BUBBLE[15] TCC_CYCLE[15] TCC_EA0_ATOMIC[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_14.txt b/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_14.txt
new file mode 100644
index 0000000000..28327b86d3
--- /dev/null
+++ b/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_14.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_ATOMIC_LEVEL[0] TCC_EA0_RDREQ[0] TCC_EA0_RDREQ_32B[0] TCC_EA0_RDREQ_LEVEL[0] TCC_EA0_ATOMIC_LEVEL[1] TCC_EA0_RDREQ[1] TCC_EA0_RDREQ_32B[1] TCC_EA0_RDREQ_LEVEL[1] TCC_EA0_ATOMIC_LEVEL[2] TCC_EA0_RDREQ[2] TCC_EA0_RDREQ_32B[2] TCC_EA0_RDREQ_LEVEL[2] TCC_EA0_ATOMIC_LEVEL[3] TCC_EA0_RDREQ[3] TCC_EA0_RDREQ_32B[3] TCC_EA0_RDREQ_LEVEL[3] TCC_EA0_ATOMIC_LEVEL[4] TCC_EA0_RDREQ[4] TCC_EA0_RDREQ_32B[4] TCC_EA0_RDREQ_LEVEL[4] TCC_EA0_ATOMIC_LEVEL[5] TCC_EA0_RDREQ[5] TCC_EA0_RDREQ_32B[5] TCC_EA0_RDREQ_LEVEL[5] TCC_EA0_ATOMIC_LEVEL[6] TCC_EA0_RDREQ[6] TCC_EA0_RDREQ_32B[6] TCC_EA0_RDREQ_LEVEL[6] TCC_EA0_ATOMIC_LEVEL[7] TCC_EA0_RDREQ[7] TCC_EA0_RDREQ_32B[7] TCC_EA0_RDREQ_LEVEL[7] TCC_EA0_ATOMIC_LEVEL[8] TCC_EA0_RDREQ[8] TCC_EA0_RDREQ_32B[8] TCC_EA0_RDREQ_LEVEL[8] TCC_EA0_ATOMIC_LEVEL[9] TCC_EA0_RDREQ[9] TCC_EA0_RDREQ_32B[9] TCC_EA0_RDREQ_LEVEL[9] TCC_EA0_ATOMIC_LEVEL[10] TCC_EA0_RDREQ[10] TCC_EA0_RDREQ_32B[10] TCC_EA0_RDREQ_LEVEL[10] TCC_EA0_ATOMIC_LEVEL[11] TCC_EA0_RDREQ[11] TCC_EA0_RDREQ_32B[11] TCC_EA0_RDREQ_LEVEL[11] TCC_EA0_ATOMIC_LEVEL[12] TCC_EA0_RDREQ[12] TCC_EA0_RDREQ_32B[12] TCC_EA0_RDREQ_LEVEL[12] TCC_EA0_ATOMIC_LEVEL[13] TCC_EA0_RDREQ[13] TCC_EA0_RDREQ_32B[13] TCC_EA0_RDREQ_LEVEL[13] TCC_EA0_ATOMIC_LEVEL[14] TCC_EA0_RDREQ[14] TCC_EA0_RDREQ_32B[14] TCC_EA0_RDREQ_LEVEL[14] TCC_EA0_ATOMIC_LEVEL[15] TCC_EA0_RDREQ[15] TCC_EA0_RDREQ_32B[15] TCC_EA0_RDREQ_LEVEL[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_15.txt b/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_15.txt
new file mode 100644
index 0000000000..033ae877ed
--- /dev/null
+++ b/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_15.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_WRREQ[0] TCC_EA0_WRREQ_64B[0] TCC_EA0_WRREQ_LEVEL[0] TCC_HIT[0] TCC_EA0_WRREQ[1] TCC_EA0_WRREQ_64B[1] TCC_EA0_WRREQ_LEVEL[1] TCC_HIT[1] TCC_EA0_WRREQ[2] TCC_EA0_WRREQ_64B[2] TCC_EA0_WRREQ_LEVEL[2] TCC_HIT[2] TCC_EA0_WRREQ[3] TCC_EA0_WRREQ_64B[3] TCC_EA0_WRREQ_LEVEL[3] TCC_HIT[3] TCC_EA0_WRREQ[4] TCC_EA0_WRREQ_64B[4] TCC_EA0_WRREQ_LEVEL[4] TCC_HIT[4] TCC_EA0_WRREQ[5] TCC_EA0_WRREQ_64B[5] TCC_EA0_WRREQ_LEVEL[5] TCC_HIT[5] TCC_EA0_WRREQ[6] TCC_EA0_WRREQ_64B[6] TCC_EA0_WRREQ_LEVEL[6] TCC_HIT[6] TCC_EA0_WRREQ[7] TCC_EA0_WRREQ_64B[7] TCC_EA0_WRREQ_LEVEL[7] TCC_HIT[7] TCC_EA0_WRREQ[8] TCC_EA0_WRREQ_64B[8] TCC_EA0_WRREQ_LEVEL[8] TCC_HIT[8] TCC_EA0_WRREQ[9] TCC_EA0_WRREQ_64B[9] TCC_EA0_WRREQ_LEVEL[9] TCC_HIT[9] TCC_EA0_WRREQ[10] TCC_EA0_WRREQ_64B[10] TCC_EA0_WRREQ_LEVEL[10] TCC_HIT[10] TCC_EA0_WRREQ[11] TCC_EA0_WRREQ_64B[11] TCC_EA0_WRREQ_LEVEL[11] TCC_HIT[11] TCC_EA0_WRREQ[12] TCC_EA0_WRREQ_64B[12] TCC_EA0_WRREQ_LEVEL[12] TCC_HIT[12] TCC_EA0_WRREQ[13] TCC_EA0_WRREQ_64B[13] TCC_EA0_WRREQ_LEVEL[13] TCC_HIT[13] TCC_EA0_WRREQ[14] TCC_EA0_WRREQ_64B[14] TCC_EA0_WRREQ_LEVEL[14] TCC_HIT[14] TCC_EA0_WRREQ[15] TCC_EA0_WRREQ_64B[15] TCC_EA0_WRREQ_LEVEL[15] TCC_HIT[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_16.txt b/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_16.txt
new file mode 100644
index 0000000000..123269c3f9
--- /dev/null
+++ b/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_16.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_MISS[0] TCC_READ[0] TCC_REQ[0] TCC_RW_REQ[0] TCC_MISS[1] TCC_READ[1] TCC_REQ[1] TCC_RW_REQ[1] TCC_MISS[2] TCC_READ[2] TCC_REQ[2] TCC_RW_REQ[2] TCC_MISS[3] TCC_READ[3] TCC_REQ[3] TCC_RW_REQ[3] TCC_MISS[4] TCC_READ[4] TCC_REQ[4] TCC_RW_REQ[4] TCC_MISS[5] TCC_READ[5] TCC_REQ[5] TCC_RW_REQ[5] TCC_MISS[6] TCC_READ[6] TCC_REQ[6] TCC_RW_REQ[6] TCC_MISS[7] TCC_READ[7] TCC_REQ[7] TCC_RW_REQ[7] TCC_MISS[8] TCC_READ[8] TCC_REQ[8] TCC_RW_REQ[8] TCC_MISS[9] TCC_READ[9] TCC_REQ[9] TCC_RW_REQ[9] TCC_MISS[10] TCC_READ[10] TCC_REQ[10] TCC_RW_REQ[10] TCC_MISS[11] TCC_READ[11] TCC_REQ[11] TCC_RW_REQ[11] TCC_MISS[12] TCC_READ[12] TCC_REQ[12] TCC_RW_REQ[12] TCC_MISS[13] TCC_READ[13] TCC_REQ[13] TCC_RW_REQ[13] TCC_MISS[14] TCC_READ[14] TCC_REQ[14] TCC_RW_REQ[14] TCC_MISS[15] TCC_READ[15] TCC_REQ[15] TCC_RW_REQ[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_17.txt b/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_17.txt
new file mode 100644
index 0000000000..102fb795bd
--- /dev/null
+++ b/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_17.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_TAG_STALL[0] TCC_TOO_MANY_EA_WRREQS_STALL[0] TCC_WRITE[0] TCC_TAG_STALL[1] TCC_TOO_MANY_EA_WRREQS_STALL[1] TCC_WRITE[1] TCC_TAG_STALL[2] TCC_TOO_MANY_EA_WRREQS_STALL[2] TCC_WRITE[2] TCC_TAG_STALL[3] TCC_TOO_MANY_EA_WRREQS_STALL[3] TCC_WRITE[3] TCC_TAG_STALL[4] TCC_TOO_MANY_EA_WRREQS_STALL[4] TCC_WRITE[4] TCC_TAG_STALL[5] TCC_TOO_MANY_EA_WRREQS_STALL[5] TCC_WRITE[5] TCC_TAG_STALL[6] TCC_TOO_MANY_EA_WRREQS_STALL[6] TCC_WRITE[6] TCC_TAG_STALL[7] TCC_TOO_MANY_EA_WRREQS_STALL[7] TCC_WRITE[7] TCC_TAG_STALL[8] TCC_TOO_MANY_EA_WRREQS_STALL[8] TCC_WRITE[8] TCC_TAG_STALL[9] TCC_TOO_MANY_EA_WRREQS_STALL[9] TCC_WRITE[9] TCC_TAG_STALL[10] TCC_TOO_MANY_EA_WRREQS_STALL[10] TCC_WRITE[10] TCC_TAG_STALL[11] TCC_TOO_MANY_EA_WRREQS_STALL[11] TCC_WRITE[11] TCC_TAG_STALL[12] TCC_TOO_MANY_EA_WRREQS_STALL[12] TCC_WRITE[12] TCC_TAG_STALL[13] TCC_TOO_MANY_EA_WRREQS_STALL[13] TCC_WRITE[13] TCC_TAG_STALL[14] TCC_TOO_MANY_EA_WRREQS_STALL[14] TCC_WRITE[14] TCC_TAG_STALL[15] TCC_TOO_MANY_EA_WRREQS_STALL[15] TCC_WRITE[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_2.txt b/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..8ff8201c5a
--- /dev/null
+++ b/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 TCP_VOLATILE_sum TCP_TOTAL_ACCESSES_sum TCP_TOTAL_READ_sum TCP_TOTAL_WRITE_sum TA_BUFFER_ATOMIC_WAVEFRONTS_sum TA_BUFFER_TOTAL_CYCLES_sum TD_ATOMIC_WAVEFRONT_sum TD_STORE_WAVEFRONT_sum SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION CPF_CPF_STAT_IDLE CPF_CPF_TCIU_IDLE TCC_REQ_sum TCC_STREAMING_REQ_sum TCC_HIT_sum TCC_MISS_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_3.txt b/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..cb10e4801d
--- /dev/null
+++ b/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS TCP_TOTAL_ATOMIC_WITH_RET_sum TCP_TOTAL_ATOMIC_WITHOUT_RET_sum TCP_TOTAL_WRITEBACK_INVALIDATES_sum TCP_TOTAL_CACHE_ACCESSES_sum TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES_sum TD_COALESCABLE_WAVEFRONT_sum SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE CPF_CMP_UTCL1_STALL_ON_TRANSLATION TCC_READ_sum TCC_WRITE_sum TCC_ATOMIC_sum TCC_WRITEBACK_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_4.txt b/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..e4e6069e38
--- /dev/null
+++ b/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAIT_ANY SQ_WAIT_INST_ANY SQ_ACTIVE_INST_ANY SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU TCP_UTCL1_TRANSLATION_MISS_sum TCP_UTCL1_TRANSLATION_HIT_sum TCP_UTCL1_PERMISSION_MISS_sum TCP_UTCL1_REQUEST_sum TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_TOTAL_WAVEFRONTS_sum SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE TCC_EA0_WRREQ_sum TCC_EA0_WRREQ_64B_sum TCC_EA0_WR_UNCACHED_32B_sum TCC_EA0_WRREQ_DRAM_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_5.txt b/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..77bd288232
--- /dev/null
+++ b/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_SCA SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU TCP_TCC_READ_REQ_sum TCP_TCC_WRITE_REQ_sum TCP_TCC_ATOMIC_WITH_RET_REQ_sum TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN CPC_ME1_DC0_SPI_BUSY TCC_EA0_RDREQ_sum TCC_EA0_RDREQ_32B_sum TCC_BUBBLE_sum TCC_EA0_RD_UNCACHED_32B_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_6.txt b/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..609c184df8
--- /dev/null
+++ b/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_THREAD_CYCLES_VALU SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 TCP_TCC_NC_READ_REQ_sum TCP_TCC_NC_WRITE_REQ_sum TCP_TCC_NC_ATOMIC_REQ_sum TCP_TCC_UC_READ_REQ_sum TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN TCC_EA0_RDREQ_DRAM_sum TCC_TAG_STALL_sum TCC_NORMAL_WRITEBACK_sum TCC_ALL_TC_OP_WB_WRITEBACK_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_7.txt b/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..5881e5fb8f
--- /dev/null
+++ b/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED TCP_TCC_UC_WRITE_REQ_sum TCP_TCC_UC_ATOMIC_REQ_sum TCP_TCC_CC_READ_REQ_sum TCP_TCC_CC_WRITE_REQ_sum TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR TCC_NORMAL_EVICT_sum TCC_ALL_TC_OP_INV_EVICT_sum TCC_TOO_MANY_EA_WRREQS_STALL_sum TCC_EA0_ATOMIC_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_8.txt b/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..66317384f5
--- /dev/null
+++ b/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES TCP_TCC_CC_ATOMIC_REQ_sum TCP_TCC_RW_READ_REQ_sum TCP_TCC_RW_WRITE_REQ_sum TCP_TCC_RW_ATOMIC_REQ_sum SPI_VWC_CSC_WR SPI_RA_BULKY_CU_FULL_CSN TCC_EA0_RDREQ_LEVEL_sum TCC_EA0_WRREQ_LEVEL_sum TCC_EA0_ATOMIC_LEVEL_sum TCC_EA0_WRREQ_STALL_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_9.txt b/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..60ceab315a
--- /dev/null
+++ b/tests/workloads/path/MI300A_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ TCP_PENDING_STALL_CYCLES_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300A_A1/perfmon/timestamps.txt b/tests/workloads/path/MI300A_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..676cca1b80
--- /dev/null
+++ b/tests/workloads/path/MI300A_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300A_A1/pmc_perf.csv b/tests/workloads/path/MI300A_A1/pmc_perf.csv
new file mode 100644
index 0000000000..5b84a0abe6
--- /dev/null
+++ b/tests/workloads/path/MI300A_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Correlation_ID,SQ_INSTS_BRANCH,SQ_INSTS_SENDMSG,SQ_WAIT_ANY,SQ_WAIT_INST_ANY,SQ_ACTIVE_INST_ANY,SQ_ACTIVE_INST_VMEM,SQ_ACTIVE_INST_LDS,SQ_ACTIVE_INST_VALU,SPI_RA_WAVE_SIMD_FULL_CSN,SPI_RA_VGPR_SIMD_FULL_CSN,CPC_CPC_UTCL2IU_STALL,CPC_ME1_BUSY_FOR_PACKET_DECODE,TA_ADDR_STALLED_BY_TC_CYCLES_sum,TA_TOTAL_WAVEFRONTS_sum,TCC_EA0_WRREQ_64B_sum,TCC_EA0_WRREQ_DRAM_sum,TCC_EA0_WRREQ_sum,TCC_EA0_WR_UNCACHED_32B_sum,TCP_UTCL1_PERMISSION_MISS_sum,TCP_UTCL1_REQUEST_sum,TCP_UTCL1_TRANSLATION_HIT_sum,TCP_UTCL1_TRANSLATION_MISS_sum,Wave_Size_1,Correlation_ID_1,XCC_Index,TCC_EA0_WRREQ[0],TCC_EA0_WRREQ_64B[0],TCC_EA0_WRREQ_LEVEL[0],TCC_HIT[0],TCC_EA0_WRREQ[1],TCC_EA0_WRREQ_64B[1],TCC_EA0_WRREQ_LEVEL[1],TCC_HIT[1],TCC_EA0_WRREQ[2],TCC_EA0_WRREQ_64B[2],TCC_EA0_WRREQ_LEVEL[2],TCC_HIT[2],TCC_EA0_WRREQ[3],TCC_EA0_WRREQ_64B[3],TCC_EA0_WRREQ_LEVEL[3],TCC_HIT[3],TCC_EA0_WRREQ[4],TCC_EA0_WRREQ_64B[4],TCC_EA0_WRREQ_LEVEL[4],TCC_HIT[4],TCC_EA0_WRREQ[5],TCC_EA0_WRREQ_64B[5],TCC_EA0_WRREQ_LEVEL[5],TCC_HIT[5],TCC_EA0_WRREQ[6],TCC_EA0_WRREQ_64B[6],TCC_EA0_WRREQ_LEVEL[6],TCC_HIT[6],TCC_EA0_WRREQ[7],TCC_EA0_WRREQ_64B[7],TCC_EA0_WRREQ_LEVEL[7],TCC_HIT[7],TCC_EA0_WRREQ[8],TCC_EA0_WRREQ_64B[8],TCC_EA0_WRREQ_LEVEL[8],TCC_HIT[8],TCC_EA0_WRREQ[9],TCC_EA0_WRREQ_64B[9],TCC_EA0_WRREQ_LEVEL[9],TCC_HIT[9],TCC_EA0_WRREQ[10],TCC_EA0_WRREQ_64B[10],TCC_EA0_WRREQ_LEVEL[10],TCC_HIT[10],TCC_EA0_WRREQ[11],TCC_EA0_WRREQ_64B[11],TCC_EA0_WRREQ_LEVEL[11],TCC_HIT[11],TCC_EA0_WRREQ[12],TCC_EA0_WRREQ_64B[12],TCC_EA0_WRREQ_LEVEL[12],TCC_HIT[12],TCC_EA0_WRREQ[13],TCC_EA0_WRREQ_64B[13],TCC_EA0_WRREQ_LEVEL[13],TCC_HIT[13],TCC_EA0_WRREQ[14],TCC_EA0_WRREQ_64B[14],TCC_EA0_WRREQ_LEVEL[14],TCC_HIT[14],TCC_EA0_WRREQ[15],TCC_EA0_WRREQ_64B[15],TCC_EA0_WRREQ_LEVEL[15],TCC_HIT[15],TCC_EA0_WRREQ[16],TCC_EA0_WRREQ_64B[16],TCC_EA0_WRREQ_LEVEL[16],TCC_HIT[16],TCC_EA0_WRREQ[17],TCC_EA0_WRREQ_64B[17],TCC_EA0_WRREQ_LEVEL[17],TCC_HIT[17],TCC_EA0_WRREQ[18],TCC_EA0_WRREQ_64B[18],TCC_EA0_WRREQ_LEVEL[18],TCC_HIT[18],TCC_EA0_WRREQ[19],TCC_EA0_WRREQ_64B[19],TCC_EA0_WRREQ_LEVEL[19],TCC_HIT[19],TCC_EA0_WRREQ[20],TCC_EA0_WRREQ_64B[20],TCC_EA0_WRREQ_LEVEL[20],TCC_HIT[20],TCC_EA0_WRREQ[21],TCC_EA0_WRREQ_64B[21],TCC_EA0_WRREQ_LEVEL[21],TCC_HIT[21],TCC_EA0_WRREQ[22],TCC_EA0_WRREQ_64B[22],TCC_EA0_WRREQ_LEVEL[22],TCC_HIT[22],TCC_EA0_WRREQ[23],TCC_EA0_WRREQ_64B[23],TCC_EA0_WRREQ_LEVEL[23],TCC_HIT[23],TCC_EA0_WRREQ[24],TCC_EA0_WRREQ_64B[24],TCC_EA0_WRREQ_LEVEL[24],TCC_HIT[24],TCC_EA0_WRREQ[25],TCC_EA0_WRREQ_64B[25],TCC_EA0_WRREQ_LEVEL[25],TCC_HIT[25],TCC_EA0_WRREQ[26],TCC_EA0_WRREQ_64B[26],TCC_EA0_WRREQ_LEVEL[26],TCC_HIT[26],TCC_EA0_WRREQ[27],TCC_EA0_WRREQ_64B[27],TCC_EA0_WRREQ_LEVEL[27],TCC_HIT[27],TCC_EA0_WRREQ[28],TCC_EA0_WRREQ_64B[28],TCC_EA0_WRREQ_LEVEL[28],TCC_HIT[28],TCC_EA0_WRREQ[29],TCC_EA0_WRREQ_64B[29],TCC_EA0_WRREQ_LEVEL[29],TCC_HIT[29],TCC_EA0_WRREQ[30],TCC_EA0_WRREQ_64B[30],TCC_EA0_WRREQ_LEVEL[30],TCC_HIT[30],TCC_EA0_WRREQ[31],TCC_EA0_WRREQ_64B[31],TCC_EA0_WRREQ_LEVEL[31],TCC_HIT[31],TCC_EA0_WRREQ[32],TCC_EA0_WRREQ_64B[32],TCC_EA0_WRREQ_LEVEL[32],TCC_HIT[32],TCC_EA0_WRREQ[33],TCC_EA0_WRREQ_64B[33],TCC_EA0_WRREQ_LEVEL[33],TCC_HIT[33],TCC_EA0_WRREQ[34],TCC_EA0_WRREQ_64B[34],TCC_EA0_WRREQ_LEVEL[34],TCC_HIT[34],TCC_EA0_WRREQ[35],TCC_EA0_WRREQ_64B[35],TCC_EA0_WRREQ_LEVEL[35],TCC_HIT[35],TCC_EA0_WRREQ[36],TCC_EA0_WRREQ_64B[36],TCC_EA0_WRREQ_LEVEL[36],TCC_HIT[36],TCC_EA0_WRREQ[37],TCC_EA0_WRREQ_64B[37],TCC_EA0_WRREQ_LEVEL[37],TCC_HIT[37],TCC_EA0_WRREQ[38],TCC_EA0_WRREQ_64B[38],TCC_EA0_WRREQ_LEVEL[38],TCC_HIT[38],TCC_EA0_WRREQ[39],TCC_EA0_WRREQ_64B[39],TCC_EA0_WRREQ_LEVEL[39],TCC_HIT[39],TCC_EA0_WRREQ[40],TCC_EA0_WRREQ_64B[40],TCC_EA0_WRREQ_LEVEL[40],TCC_HIT[40],TCC_EA0_WRREQ[41],TCC_EA0_WRREQ_64B[41],TCC_EA0_WRREQ_LEVEL[41],TCC_HIT[41],TCC_EA0_WRREQ[42],TCC_EA0_WRREQ_64B[42],TCC_EA0_WRREQ_LEVEL[42],TCC_HIT[42],TCC_EA0_WRREQ[43],TCC_EA0_WRREQ_64B[43],TCC_EA0_WRREQ_LEVEL[43],TCC_HIT[43],TCC_EA0_WRREQ[44],TCC_EA0_WRREQ_64B[44],TCC_EA0_WRREQ_LEVEL[44],TCC_HIT[44],TCC_EA0_WRREQ[45],TCC_EA0_WRREQ_64B[45],TCC_EA0_WRREQ_LEVEL[45],TCC_HIT[45],TCC_EA0_WRREQ[46],TCC_EA0_WRREQ_64B[46],TCC_EA0_WRREQ_LEVEL[46],TCC_HIT[46],TCC_EA0_WRREQ[47],TCC_EA0_WRREQ_64B[47],TCC_EA0_WRREQ_LEVEL[47],TCC_HIT[47],TCC_EA0_WRREQ[48],TCC_EA0_WRREQ_64B[48],TCC_EA0_WRREQ_LEVEL[48],TCC_HIT[48],TCC_EA0_WRREQ[49],TCC_EA0_WRREQ_64B[49],TCC_EA0_WRREQ_LEVEL[49],TCC_HIT[49],TCC_EA0_WRREQ[50],TCC_EA0_WRREQ_64B[50],TCC_EA0_WRREQ_LEVEL[50],TCC_HIT[50],TCC_EA0_WRREQ[51],TCC_EA0_WRREQ_64B[51],TCC_EA0_WRREQ_LEVEL[51],TCC_HIT[51],TCC_EA0_WRREQ[52],TCC_EA0_WRREQ_64B[52],TCC_EA0_WRREQ_LEVEL[52],TCC_HIT[52],TCC_EA0_WRREQ[53],TCC_EA0_WRREQ_64B[53],TCC_EA0_WRREQ_LEVEL[53],TCC_HIT[53],TCC_EA0_WRREQ[54],TCC_EA0_WRREQ_64B[54],TCC_EA0_WRREQ_LEVEL[54],TCC_HIT[54],TCC_EA0_WRREQ[55],TCC_EA0_WRREQ_64B[55],TCC_EA0_WRREQ_LEVEL[55],TCC_HIT[55],TCC_EA0_WRREQ[56],TCC_EA0_WRREQ_64B[56],TCC_EA0_WRREQ_LEVEL[56],TCC_HIT[56],TCC_EA0_WRREQ[57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CED_WRITE_CYCLES_sum,TCC_ATOMIC_sum,TCC_READ_sum,TCC_WRITEBACK_sum,TCC_WRITE_sum,TCP_TOTAL_ATOMIC_WITHOUT_RET_sum,TCP_TOTAL_ATOMIC_WITH_RET_sum,TCP_TOTAL_CACHE_ACCESSES_sum,TCP_TOTAL_WRITEBACK_INVALIDATES_sum,TD_COALESCABLE_WAVEFRONT_sum,Wave_Size_5,Correlation_ID_5,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,TA_FLAT_ATOMIC_WAVEFRONTS_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,TCC_ALL_TC_OP_INV_EVICT_sum,TCC_EA0_ATOMIC_sum,TCC_NORMAL_EVICT_sum,TCC_TOO_MANY_EA_WRREQS_STALL_sum,TCP_TCC_CC_READ_REQ_sum,TCP_TCC_CC_WRITE_REQ_sum,TCP_TCC_UC_ATOMIC_REQ_sum,TCP_TCC_UC_WRITE_REQ_sum,Wave_Size_6,Correlation_ID_6,XCC_Index_6,TCC_MISS[0],TCC_READ[0],TCC_REQ[0],TCC_RW_REQ[0],TCC_MISS[1],TCC_READ[1],TCC_REQ[1],TCC_RW_REQ[1],TCC_MISS[2],TCC_READ[2],TCC_REQ[2],TCC_RW_REQ[2],TCC_MISS[3],TCC_READ[3],TCC_REQ[3],TCC_RW_REQ[3],TCC_MISS[4],TCC_READ[4],TCC_REQ[4],TCC_RW_REQ[4],TCC_MISS[5],TCC_READ[5],TCC_REQ[5],TCC_RW_REQ[5],TCC_MISS[6],TCC_READ[6],TCC_REQ[6],TCC_RW_REQ[6],TCC_MISS[7],TCC_READ[7],TCC_REQ[7],TCC_RW_REQ[7],TCC_MISS[8],TCC_READ[8],TCC_REQ[8],TCC_RW_REQ[8],TCC_MISS[9],TCC_READ[9],TCC_REQ[9],TCC_RW_REQ[9],TCC_MISS[10],TCC_READ[10],TCC_REQ[10],TCC_RW_REQ[10],TCC_MISS[11],TCC_READ[11],TCC_REQ[11],TCC_RW_REQ[11],TCC_MISS[12],TCC_READ[12],TCC_REQ[12],TCC_RW_REQ[12],TCC_MISS[13],TCC_READ[13],TCC_REQ[13],TCC_RW_REQ[13],TCC_MISS[14],TCC_READ[14],TCC_REQ[14],TCC_RW_REQ[14],TCC_MISS[15],TCC_READ[15],TCC_REQ[15],TCC_RW_REQ[15],TCC_MISS[16],TCC_READ[16],TCC_REQ[16],TCC_RW_REQ[16],TCC_MISS[17],TCC_READ[17],TCC_REQ[17],TCC_RW_REQ[17],TCC_MISS[18],TCC_READ[18],TCC_REQ[18],TCC_RW_REQ[18],TCC_MISS[19],TCC_READ[19],TCC_REQ[19],TCC_RW_REQ[19],TCC_MISS[20],TCC_READ[20],TCC_REQ[20],TCC_RW_REQ[20],TCC_MISS[21],TCC_READ[21],TCC_REQ[21],TCC_RW_REQ[21],TCC_MISS[22],TCC_READ[22],TCC_REQ[22],TCC_RW_REQ[22],TCC_MISS[23],TCC_READ[23],TCC_REQ[23],TCC_RW_REQ[23],TCC_MISS[24],TCC_READ[24],TCC_REQ[24],TCC_RW_REQ[24],TCC_MISS[25],TCC_READ[25],TCC_REQ[25],TCC_RW_REQ[25],TCC_MISS[26],TCC_READ[26],TCC_REQ[26],TCC_RW_REQ[26],TCC_MISS[27],TCC_READ[27],TCC_REQ[27],TCC_RW_REQ[27],TCC_MISS[28],TCC_READ[28],TCC_REQ[28],TCC_RW_REQ[28],TCC_MISS[29],TCC_READ[29],TCC_REQ[29],TCC_RW_REQ[29],TCC_MISS[30],TCC_READ[30],TCC_REQ[30],TCC_RW_REQ[30],TCC_MISS[31],TCC_READ[31],TCC_REQ[31],TCC_RW_REQ[31],TCC_MISS[32],TCC_READ[32],TCC_REQ[32],TCC_RW_REQ[32],TCC_MISS[33],TCC_READ[33],TCC_REQ[33],TCC_RW_REQ[33],TCC_MISS[34],TCC_READ[34],TCC_REQ[34],TCC_RW_REQ[34],TCC_MISS[35],TCC_READ[35],TCC_REQ[35],TCC_RW_REQ[35],TCC_MISS[36],TCC_READ[36],TCC_REQ[36],TCC_RW_REQ[36],TCC_MISS[37],TCC_READ[37],TCC_REQ[37],TCC_RW_REQ[37],TCC_MISS[38],TCC_READ[38],TCC_REQ[38],TCC_RW_REQ[38],TCC_MISS[39],TCC_READ[39],TCC_REQ[39],TCC_RW_REQ[39],TCC_MISS[40],TCC_READ[40],TCC_REQ[40],TCC_RW_REQ[40],TCC_MISS[41],TCC_READ[41],TCC_REQ[41],TCC_RW_REQ[41],TCC_MISS[42],TCC_READ[42],TCC_REQ[42],TCC_RW_REQ[42],TCC_MISS[43],TCC_READ[43],TCC_REQ[43],TCC_RW_REQ[43],TCC_MISS[44],TCC_READ[44],TCC_REQ[44],TCC_RW_REQ[44],TCC_MISS[45],TCC_READ[45],TCC_REQ[45],TCC_RW_REQ[45],TCC_MISS[46],TCC_READ[46],TCC_REQ[46],TCC_RW_REQ[46],TCC_MISS[47],TCC_READ[47],TCC_REQ[47],TCC_RW_REQ[47],TCC_MISS[48],TCC_READ[48],TCC_REQ[48],TCC_RW_REQ[48],TCC_MISS[49],TCC_READ[49],TCC_REQ[49],TCC_RW_REQ[49],TCC_MISS[50],TCC_READ[50],TCC_REQ[50],TCC_RW_REQ[50],TCC_MISS[51],TCC_READ[51],TCC_REQ[51],TCC_RW_REQ[51],TCC_MISS[52],TCC_READ[52],TCC_REQ[52],TCC_RW_REQ[52],TCC_MISS[53],TCC_READ[53],TCC_REQ[53],TCC_RW_REQ[53],TCC_MISS[54],TCC_READ[54],TCC_REQ[54],TCC_RW_REQ[54],TCC_MISS[55],TCC_READ[55],TCC_REQ[55],TCC_RW_REQ[55],TCC_MISS[56],TCC_READ[56],TCC_REQ[56],TCC_RW_REQ[56],TCC_MISS[57],TCC_READ[57],TCC_REQ[57],TCC_RW_REQ[57],TCC_MISS[58],TCC_READ[58],TCC_REQ[58],TCC_RW_REQ[58],TCC_MISS[59],TCC_READ[59],TCC_REQ[59],TCC_RW_REQ[59],TCC_MISS[60],TCC_READ[60],TCC_REQ[60],TCC_RW_REQ[60],TCC_MISS[61],TCC_READ[61],TCC_REQ[61],TCC_RW_REQ[61],TCC_MISS[62],TCC_READ[62],TCC_REQ[62],TCC_RW_REQ[62],TCC_MISS[63],TCC_READ[63],TCC_REQ[63],TCC_RW_REQ[63],TCC_MISS[64],TCC_READ[64],TCC_REQ[64],TCC_RW_REQ[64],TCC_MISS[65],TCC_READ[65],TCC_REQ[65],TCC_RW_REQ[65],TCC_MISS[66],TCC_READ[66],TCC_REQ[66],TCC_RW_REQ[66],TCC_MISS[67],TCC_READ[67],TCC_REQ[67],TCC_RW_REQ[67],TCC_MISS[68],TCC_READ[68],TCC_REQ[68],TCC_RW_REQ[68],TCC_MISS[69],TCC_READ[69],TCC_REQ[69],TCC_RW_REQ[69],TCC_MISS[70],TCC_READ[70],TCC_REQ[70],TCC_RW_REQ[70],TCC_MISS[71],TCC_READ[71],TCC_REQ[71],TCC_RW_REQ[71],TCC_MISS[72],TCC_READ[72],TCC_REQ[72],TCC_RW_REQ[72],TCC_MISS[73],TCC_READ[73],TCC_REQ[73],TCC_RW_REQ[73],TCC_MISS[74],TCC_READ[74],TCC_REQ[74],TCC_RW_REQ[74],TCC_MISS[75],TCC_READ[75],TCC_REQ[75],TCC_RW_REQ[75],TCC_MISS[76],TCC_READ[76],TCC_REQ[76],TCC_RW_REQ[76],TCC_MISS[77],TCC_READ[77],TCC_REQ[77],TCC_RW_REQ[77],TCC_MISS[78],TCC_READ[78],TCC_REQ[78],TCC_RW_REQ[78],TCC_MISS[79],TCC_READ[79],TCC_REQ[79],TCC_RW_REQ[79],TCC_MISS[80],TCC_READ[80],TCC_REQ[80],TCC_RW_REQ[80],TCC_MISS[81],TCC_READ[81],TCC_REQ[81],TCC_RW_REQ[81],TCC_MISS[82],TCC_READ[82],TCC_REQ[82],TCC_RW_REQ[82],TCC_MISS[83],TCC_READ[83],TCC_REQ[83],TCC_RW_REQ[83],TCC_MISS[84],TCC_READ[84],TCC_REQ[84],TCC_RW_REQ[84],TCC_MISS[85],TCC_READ[85],TCC_REQ[85],TCC_RW_REQ[85],TCC_MISS[86],TCC_READ[86],TCC_REQ[86],TCC_RW_REQ[86],TCC_MISS[87],TCC_READ[87],TCC_REQ[87],TCC_RW_REQ[87],TCC_MISS[88],TCC_READ[88],TCC_REQ[88],TCC_RW_REQ[88],TCC_MISS[89],TCC_READ[89],TCC_REQ[89],TCC_RW_REQ[89],TCC_MISS[90],TCC_READ[90],TCC_REQ[90],TCC_RW_REQ[90],TCC_MISS[91],TCC_READ[91],TCC_REQ[91],TCC_RW_REQ[91],TCC_MISS[92],TCC_READ[92],TCC_REQ[92],TCC_RW_REQ[92],TCC_MISS[93],TCC_READ[93],TCC_REQ[93],TCC_RW_REQ[93],TCC_MISS[94],TCC_READ[94],TCC_REQ[94],TCC_RW_REQ[94],TCC_MISS[95],TCC_READ[95],TCC_REQ[95],TCC_RW_REQ[95],Wave_Size_7,Correlation_ID_7,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SPI_RA_REQ_NO_ALLOC,SPI_RA_REQ_NO_ALLOC_CSN,CPC_CPC_STAT_STALL,CPC_UTCL1_STALL_ON_TRANSLATION,CPF_CPF_STAT_IDLE,CPF_CPF_TCIU_IDLE,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,TA_BUFFER_TOTAL_CYCLES_sum,TCC_HIT_sum,TCC_MISS_sum,TCC_REQ_sum,TCC_STREAMING_REQ_sum,TCP_TOTAL_ACCESSES_sum,TCP_TOTAL_READ_sum,TCP_TOTAL_WRITE_sum,TCP_VOLATILE_sum,TD_ATOMIC_WAVEFRONT_sum,TD_STORE_WAVEFRONT_sum,Wave_Size_8,Correlation_ID_8,XCC_Index_8,TCC_ATOMIC[0],TCC_BUBBLE[0],TCC_CYCLE[0],TCC_EA0_ATOMIC[0],TCC_ATOMIC[1],TCC_BUBBLE[1],TCC_CYCLE[1],TCC_EA0_ATOMIC[1],TCC_ATOMIC[2],TCC_BUBBLE[2],TCC_CYCLE[2],TCC_EA0_ATOMIC[2],TCC_ATOMIC[3],TCC_BUBBLE[3],TCC_CYCLE[3],TCC_EA0_ATOMIC[3],TCC_ATOMIC[4],TCC_BUBBLE[4],TCC_CYCLE[4],TCC_EA0_ATOMIC[4],TCC_ATOMIC[5],TCC_BUBBLE[5],TCC_CYCLE[5],TCC_EA0_ATOMIC[5],TCC_ATOMIC[6],TCC_BUBBLE[6],TCC_CYCLE[6],TCC_EA0_ATOMIC[6],TCC_ATOMIC[7],TCC_BUBBLE[7],TCC_CYCLE[7],TCC_EA0_ATOMIC[7],TCC_ATOMIC[8],TCC_BUBBLE[8],TCC_CYCLE[8],TCC_EA0_ATOMIC[8],TCC_ATOMIC[9],TCC_BUBBLE[9],TCC_CYCLE[9],TCC_EA0_ATOMIC[9],TCC_ATOMIC[10],TCC_BUBBLE[10],TCC_CYCLE[10],TCC_EA0_ATOMIC[10],TCC_ATOMIC[11],TCC_BUBBLE[11],TCC_CYCLE[11],TCC_EA0_ATOMIC[11],TCC_ATOMIC[12],TCC_BUBBLE[12],TCC_CYCLE[12],TCC_EA0_ATOMIC[12],TCC_ATOMIC[13],TCC_BUBBLE[13],TCC_CYCLE[13],TCC_EA0_ATOMIC[13],TCC_ATOMIC[14],TCC_BUBBLE[14],TCC_CYCLE[14],TCC_EA0_ATOMIC[14],TCC_ATOMIC[15],TCC_BUBBLE[15],TCC_CYCLE[15],TCC_EA0_ATOMIC[15],TCC_ATOMIC[16],TCC_BUBBLE[16],TCC_CYCLE[16],TCC_EA0_ATOMIC[16],TCC_ATOMIC[17],TCC_BUBBLE[17],TCC_CYCLE[17],TCC_EA0_ATOMIC[17],TCC_ATOMIC[18],TCC_BUBBLE[18],TCC_CYCLE[18],TCC_EA0_ATOMIC[18],TCC_ATOMIC[19],TCC_BUBBLE[19],TCC_CYCLE[19],TCC_EA0_ATOMIC[19],TCC_ATOMIC[20],TCC_BUBBLE[20],TCC_CYCLE[20],TCC_EA0_ATOMIC[20],TCC_ATOMIC[21],TCC_BUBBLE[21],TCC_CYCLE[21],TCC_EA0_ATOMIC[21],TCC_ATOMIC[22],TCC_BUBBLE[22],TCC_CYCLE[22],TCC_EA0_ATOMIC[22],TCC_ATOMIC[23],TCC_BUBBLE[23],TCC_CYCLE[23],TCC_EA0_ATOMIC[23],TCC_ATOMIC[24],TCC_BUBBLE[24],TCC_CYCLE[24],TCC_EA0_ATOMIC[24],TCC_ATOMIC[25],TCC_BUBBLE[25],TCC_CYCLE[25],TCC_EA0_ATOMIC[25],TCC_ATOMIC[26],TCC_BUBBLE[26],TCC_CYCLE[26],TCC_EA0_ATOMIC[26],TCC_ATOMIC[27],TCC_BUBBLE[27],TCC_CYCLE[27],TCC_EA0_ATOMIC[27],TCC_ATOMIC[28],TCC_BUBBLE[28],TCC_CYCLE[28],TCC_EA0_ATOMIC[28],TCC_ATOMIC[29],TCC_BUBBLE[29],TCC_CYCLE[29],TCC_EA0_ATOMIC[29],TCC_ATOMIC[30],TCC_BUBBLE[30],TCC_CYCLE[30],TCC_EA0_ATOMIC[30],TCC_ATOMIC[31],TCC_BUBBLE[31],TCC_CYCLE[31],TCC_EA0_ATOMIC[31],TCC_ATOMIC[32],TCC_BUBBLE[32],TCC_CYCLE[32],TCC_EA0_ATOMIC[32],TCC_ATOMIC[33],TCC_BUBBLE[33],TCC_CYCLE[33],TCC_EA0_ATOMIC[33],TCC_ATOMIC[34],TCC_BUBBLE[34],TCC_CYCLE[34],TCC_EA0_ATOMIC[34],TCC_ATOMIC[35],TCC_BUBBLE[35],TCC_CYCLE[35],TCC_EA0_ATOMIC[35],TCC_ATOMIC[36],TCC_BUBBLE[36],TCC_CYCLE[36],TCC_EA0_ATOMIC[36],TCC_ATOMIC[37],TCC_BUBBLE[37],TCC_CYCLE[37],TCC_EA0_ATOMIC[37],TCC_ATOMIC[38],TCC_BUBBLE[38],TCC_CYCLE[38],TCC_EA0_ATOMIC[38],TCC_ATOMIC[39],TCC_BUBBLE[39],TCC_CYCLE[39],TCC_EA0_ATOMIC[39],TCC_ATOMIC[40],TCC_BUBBLE[40],TCC_CYCLE[40],TCC_EA0_ATOMIC[40],TCC_ATOMIC[41],TCC_BUBBLE[41],TCC_CYCLE[41],TCC_EA0_ATOMIC[41],TCC_ATOMIC[42],TCC_BUBBLE[42],TCC_CYCLE[42],TCC_EA0_ATOMIC[42],TCC_ATOMIC[43],TCC_BUBBLE[43],TCC_CYCLE[43],TCC_EA0_ATOMIC[43],TCC_ATOMIC[44],TCC_BUBBLE[44],TCC_CYCLE[44],TCC_EA0_ATOMIC[44],TCC_ATOMIC[45],TCC_BUBBLE[45],TCC_CYCLE[45],TCC_EA0_ATOMIC[45],TCC_ATOMIC[46],TCC_BUBBLE[46],TCC_CYCLE[46],TCC_EA0_ATOMIC[46],TCC_ATOMIC[47],TCC_BUBBLE[47],TCC_CYCLE[47],TCC_EA0_ATOMIC[47],TCC_ATOMIC[48],TCC_BUBBLE[48],TCC_CYCLE[48],TCC_EA0_ATOMIC[48],TCC_ATOMIC[49],TCC_BUBBLE[49],TCC_CYCLE[49],TCC_EA0_ATOMIC[49],TCC_ATOMIC[50],TCC_BUBBLE[50],TCC_CYCLE[50],TCC_EA0_ATOMIC[50],TCC_ATOMIC[51],TCC_BUBBLE[51],TCC_CYCLE[51],TCC_EA0_ATOMIC[51],TCC_ATOMIC[52],TCC_BUBBLE[52],TCC_CYCLE[52],TCC_EA0_ATOMIC[52],TCC_ATOMIC[53],TCC_BUBBLE[53],TCC_CYCLE[53],TCC_EA0_ATOMIC[53],TCC_ATOMIC[54],TCC_BUBBLE[54],TCC_CYCLE[54],TCC_EA0_ATOMIC[54],TCC_ATOMIC[55],TCC_BUBBLE[55],TCC_CYCLE[55],TCC_EA0_ATOMIC[55],TCC_ATOMIC[56],TCC_BUBBLE[56],TCC_CYCLE[56],TCC_EA0_ATOMIC[56],TCC_ATOMIC[57],TCC_BUBBLE[57],TCC_CYCLE[57],TCC_EA0_ATOMIC[57],TCC_ATOMIC[58],TCC_BUBBLE[58],TCC_CYCLE[58],TCC_EA0_ATOMIC[58],TCC_ATOMIC[59],TCC_BUBBLE[59],TCC_CYCLE[59],TCC_EA0_ATOMIC[59],TCC_ATOMIC[60],TCC_BUBBLE[60],TCC_CYCLE[60],TCC_EA0_ATOMIC[60],TCC_ATOMIC[61],TCC_BUBBLE[61],TCC_CYCLE[61],TCC_EA0_ATOMIC[61],TCC_ATOMIC[62],TCC_BUBBLE[62],TCC_CYCLE[62],TCC_EA0_ATOMIC[62],TCC_ATOMIC[63],TCC_BUBBLE[63],TCC_CYCLE[63],TCC_EA0_ATOMIC[63],TCC_ATOMIC[64],TCC_BUBBLE[64],TCC_CYCLE[64],TCC_EA0_ATOMIC[64],TCC_ATOMIC[65],TCC_BUBBLE[65],TCC_CYCLE[65],TCC_EA0_ATOMIC[65],TCC_ATOMIC[66],TCC_BUBBLE[66],TCC_CYCLE[66],TCC_EA0_ATOMIC[66],TCC_ATOMIC[67],TCC_BUBBLE[67],TCC_CYCLE[67],TCC_EA0_ATOMIC[67],TCC_ATOMIC[68],TCC_BUBBLE[68],TCC_CYCLE[68],TCC_EA0_ATOMIC[68],TCC_ATOMIC[69],TCC_BUBBLE[69],TCC_CYCLE[69],TCC_EA0_ATOMIC[69],TCC_ATOMIC[70],TCC_BUBBLE[70],TCC_CYCLE[70],TCC_EA0_ATOMIC[70],TCC_ATOMIC[71],TCC_BUBBLE[71],TCC_CYCLE[71],TCC_EA0_ATOMIC[71],TCC_ATOMIC[72],TCC_BUBBLE[72],TCC_CYCLE[72],TCC_EA0_ATOMIC[72],TCC_ATOMIC[73],TCC_BUBBLE[73],TCC_CYCLE[73],TCC_EA0_ATOMIC[73],TCC_ATOMIC[74],TCC_BUBBLE[74],TCC_CYCLE[74],TCC_EA0_ATOMIC[74],TCC_ATOMIC[75],TCC_BUBBLE[75],TCC_CYCLE[75],TCC_EA0_ATOMIC[75],TCC_ATOMIC[76],TCC_BUBBLE[76],TCC_CYCLE[76],TCC_EA0_ATOMIC[76],TCC_ATOMIC[77],TCC_BUBBLE[77],TCC_CYCLE[77],TCC_EA0_ATOMIC[77],TCC_ATOMIC[78],TCC_BUBBLE[78],TCC_CYCLE[78],TCC_EA0_ATOMIC[78],TCC_ATOMIC[79],TCC_BUBBLE[79],TCC_CYCLE[79],TCC_EA0_ATOMIC[79],TCC_ATOMIC[80],TCC_BUBBLE[80],TCC_CYCLE[80],TCC_EA0_ATOMIC[80],TCC_ATOMIC[81],TCC_BUBBLE[81],TCC_CYCLE[81],TCC_EA0_ATOMIC[81],TCC_ATOMIC[82],TCC_BUBBLE[82],TCC_CYCLE[82],TCC_EA0_ATOMIC[82],TCC_ATOMIC[83],TCC_BUBBLE[83],TCC_CYCLE[83],TCC_EA0_ATOMIC[83],TCC_ATOMIC[84],TCC_BUBBLE[84],TCC_CYCLE[84],TCC_EA0_ATOMIC[84],TCC_ATOMIC[85],TCC_BUBBLE[85],TCC_CYCLE[85],TCC_EA0_ATOMIC[85],TCC_ATOMIC[86],TCC_BUBBLE[86],TCC_CYCLE[86],TCC_EA0_ATOMIC[86],TCC_ATOMIC[87],TCC_BUBBLE[87],TCC_CYCLE[87],TCC_EA0_ATOMIC[87],TCC_ATOMIC[88],TCC_BUBBLE[88],TCC_CYCLE[88],TCC_EA0_ATOMIC[88],TCC_ATOMIC[89],TCC_BUBBLE[89],TCC_CYCLE[89],TCC_EA0_ATOMIC[89],TCC_ATOMIC[90],TCC_BUBBLE[90],TCC_CYCLE[90],TCC_EA0_ATOMIC[90],TCC_ATOMIC[91],TCC_BUBBLE[91],TCC_CYCLE[91],TCC_EA0_ATOMIC[91],TCC_ATOMIC[92],TCC_BUBBLE[92],TCC_CYCLE[92],TCC_EA0_ATOMIC[92],TCC_ATOMIC[93],TCC_BUBBLE[93],TCC_CYCLE[93],TCC_EA0_ATOMIC[93],TCC_ATOMIC[94],TCC_BUBBLE[94],TCC_CYCLE[94],TCC_EA0_ATOMIC[94],TCC_ATOMIC[95],TCC_BUBBLE[95],TCC_CYCLE[95],TCC_EA0_ATOMIC[95],Wave_Size_9,Correlation_ID_9,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,Wave_Size_10,Correlation_ID_10,SQC_TC_DATA_ATOMIC_REQ,SQC_TC_STALL,SQC_TC_REQ,SQC_DCACHE_REQ_READ_16,SQC_ICACHE_REQ,SQC_ICACHE_HITS,SQC_ICACHE_MISSES,SQC_ICACHE_MISSES_DUPLICATE,Wave_Size_11,Correlation_ID_11,SQ_INSTS_VALU_MFMA_MOPS_I8,SQ_INSTS_VALU_MFMA_MOPS_F16,SQ_INSTS_VALU_MFMA_MOPS_BF16,SQ_INSTS_VALU_MFMA_MOPS_F32,SQ_INSTS_VALU_MFMA_MOPS_F64,SQC_TC_INST_REQ,SQC_TC_DATA_READ_REQ,SQC_TC_DATA_WRITE_REQ,TCP_PENDING_STALL_CYCLES_sum,Wave_Size_12,Correlation_ID_12,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,TCC_EA0_ATOMIC_LEVEL_sum,TCC_EA0_RDREQ_LEVEL_sum,TCC_EA0_WRREQ_LEVEL_sum,TCC_EA0_WRREQ_STALL_sum,TCP_TCC_CC_ATOMIC_REQ_sum,TCP_TCC_RW_ATOMIC_REQ_sum,TCP_TCC_RW_READ_REQ_sum,TCP_TCC_RW_WRITE_REQ_sum,Wave_Size_13,Correlation_ID_13,SQC_DCACHE_REQ_READ_2,SQC_DCACHE_REQ_READ_4,Wave_Size_14,Correlation_ID_14,SQ_ACTIVE_INST_SCA,SQ_ACTIVE_INST_EXP_GDS,SQ_ACTIVE_INST_MISC,SQ_ACTIVE_INST_FLAT,SQ_INST_CYCLES_VMEM_WR,SQ_INST_CYCLES_VMEM_RD,SQ_INST_CYCLES_SMEM,SQ_INST_CYCLES_SALU,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,CPC_ME1_DC0_SPI_BUSY,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,TCC_BUBBLE_sum,TCC_EA0_RDREQ_32B_sum,TCC_EA0_RDREQ_sum,TCC_EA0_RD_UNCACHED_32B_sum,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,TCP_TCC_READ_REQ_sum,TCP_TCC_WRITE_REQ_sum,Wave_Size_15,Correlation_ID_15,XCC_Index_15,TCC_EA0_ATOMIC_LEVEL[0],TCC_EA0_RDREQ[0],TCC_EA0_RDREQ_32B[0],TCC_EA0_RDREQ_LEVEL[0],TCC_EA0_ATOMIC_LEVEL[1],TCC_EA0_RDREQ[1],TCC_EA0_RDREQ_32B[1],TCC_EA0_RDREQ_LEVEL[1],TCC_EA0_ATOMIC_LEVEL[2],TCC_EA0_RDREQ[2],TCC_EA0_RDREQ_32B[2],TCC_EA0_RDREQ_LEVEL[2],TCC_EA0_ATOMIC_LEVEL[3],TCC_EA0_RDREQ[3],TCC_EA0_RDREQ_32B[3],TCC_EA0_RDREQ_LEVEL[3],TCC_EA0_ATOMIC_LEVEL[4],TCC_EA0_RDREQ[4],TCC_EA0_RDREQ_32B[4],TCC_EA0_RDREQ_LEVEL[4],TCC_EA0_ATOMIC_LEVEL[5],TCC_EA0_RDREQ[5],TCC_EA0_RDREQ_32B[5],TCC_EA0_RDREQ_LEVEL[5],TCC_EA0_ATOMIC_LEVEL[6],TCC_EA0_RDREQ[6],TCC_EA0_RDREQ_32B[6],TCC_EA0_RDREQ_LEVEL[6],TCC_EA0_ATOMIC_LEVEL[7],TCC_EA0_RDREQ[7],TCC_EA0_RDREQ_32B[7],TCC_EA0_RDREQ_LEVEL[7],TCC_EA0_ATOMIC_LEVEL[8],TCC_EA0_RDREQ[8],TCC_EA0_RDREQ_32B[8],TCC_EA0_RDREQ_LEVEL[8],TCC_EA0_ATOMIC_LEVEL[9],TCC_EA0_RDREQ[9],TCC_EA0_RDREQ_32B[9],TCC_EA0_RDREQ_LEVEL[9],TCC_EA0_ATOMIC_LEVEL[10],TCC_EA0_RDREQ[10],TCC_EA0_RDREQ_32B[10],TCC_EA0_RDREQ_LEVEL[10],TCC_EA0_ATOMIC_LEVEL[11],TCC_EA0_RDREQ[11],TCC_EA0_RDREQ_32B[11],TCC_EA0_RDREQ_LEVEL[11],TCC_EA0_ATOMIC_LEVEL[12],TCC_EA0_RDREQ[12],TCC_EA0_RDREQ_32B[12],TCC_EA0_RDREQ_LEVEL[12],TCC_EA0_ATOMIC_LEVEL[13],TCC_EA0_RDREQ[13],TCC_EA0_RDREQ_32B[13],TCC_EA0_RDREQ_LEVEL[13],TCC_EA0_ATOMIC_LEVEL[14],TCC_EA0_RDREQ[14],TCC_EA0_RDREQ_32B[14],TCC_EA0_RDREQ_LEVEL[14],TCC_EA0_ATOMIC_LEVEL[15],TCC_EA0_RDREQ[15],TCC_EA0_RDREQ_32B[15],TCC_EA0_RDREQ_LEVEL[15],TCC_EA0_ATOMIC_LEVEL[16],TCC_EA0_RDREQ[16],TCC_EA0_RDREQ_32B[16],TCC_EA0_RDREQ_LEVEL[16],TCC_EA0_ATOMIC_LEVEL[17],TCC_EA0_RDREQ[17],TCC_EA0_RDREQ_32B[17],TCC_EA0_RDREQ_LEVEL[17],TCC_EA0_ATOMIC_LEVEL[18],TCC_EA0_RDREQ[18],TCC_EA0_RDREQ_32B[18],TCC_EA0_RDREQ_LEVEL[18],TCC_EA0_ATOMIC_LEVEL[19],TCC_EA0_RDREQ[19],TCC_EA0_RDREQ_32B[19],TCC_EA0_RDREQ_LEVEL[19],TCC_EA0_ATOMIC_LEVEL[20],TCC_EA0_RDREQ[20],TCC_EA0_RDREQ_32B[20],TCC_EA0_RDREQ_LEVEL[20],TCC_EA0_ATOMIC_LEVEL[21],TCC_EA0_RDREQ[21],TCC_EA0_RDREQ_32B[21],TCC_EA0_RDREQ_LEVEL[21],TCC_EA0_ATOMIC_LEVEL[22],TCC_EA0_RDREQ[22],TCC_EA0_RDREQ_32B[22],TCC_EA0_RDREQ_LEVEL[22],TCC_EA0_ATOMIC_LEVEL[23],TCC_EA0_RDREQ[23],TCC_EA0_RDREQ_32B[23],TCC_EA0_RDREQ_LEVEL[23],TCC_EA0_ATOMIC_LEVEL[24],TCC_EA0_RDREQ[24],TCC_EA0_RDREQ_32B[24],TCC_EA0_RDREQ_LEVEL[24],TCC_EA0_ATOMIC_LEVEL[25],TCC_EA0_RDREQ[25],TCC_EA0_RDREQ_32B[25],TCC_EA0_RDREQ_LEVEL[25],TCC_EA0_ATOMIC_LEVEL[26],TCC_EA0_RDREQ[26],TCC_EA0_RDREQ_32B[26],TCC_EA0_RDREQ_LEVEL[26],TCC_EA0_ATOMIC_LEVEL[27],TCC_EA0_RDREQ[27],TCC_EA0_RDREQ_32B[27],TCC_EA0_RDREQ_LEVEL[27],TCC_EA0_ATOMIC_LEVEL[28],TCC_EA0_RDREQ[28],TCC_EA0_RDREQ_32B[28],TCC_EA0_RDREQ_LEVEL[28],TCC_EA0_ATOMIC_LEVEL[29],TCC_EA0_RDREQ[29],TCC_EA0_RDREQ_32B[29],TCC_EA0_RDREQ_LEVEL[29],TCC_EA0_ATOMIC_LEVEL[30],TCC_EA0_RDREQ[30],TCC_EA0_RDREQ_32B[30],TCC_EA0_RDREQ_LEVEL[30],TCC_EA0_ATOMIC_LEVEL[31],TCC_EA0_RDREQ[31],TCC_EA0_RDREQ_32B[31],TCC_EA0_RDREQ_LEVEL[31],TCC_EA0_ATOMIC_LEVEL[32],TCC_EA0_RDREQ[32],TCC_EA0_RDREQ_32B[32],TCC_EA0_RDREQ_LEVEL[32],TCC_EA0_ATOMIC_LEVEL[33],TCC_EA0_RDREQ[33],TCC_EA0_RDREQ_32B[33],TCC_EA0_RDREQ_LEVEL[33],TCC_EA0_ATOMIC_LEVEL[34],TCC_EA0_RDREQ[34],TCC_EA0_RDREQ_32B[34],TCC_EA0_RDREQ_LEVEL[34],TCC_EA0_ATOMIC_LEVEL[35],TCC_EA0_RDREQ[35],TCC_EA0_RDREQ_32B[35],TCC_EA0_RDREQ_LEVEL[35],TCC_EA0_ATOMIC_LEVEL[36],TCC_EA0_RDREQ[36],TCC_EA0_RDREQ_32B[36],TCC_EA0_RDREQ_LEVEL[36],TCC_EA0_ATOMIC_LEVEL[37],TCC_EA0_RDREQ[37],TCC_EA0_RDREQ_32B[37],TCC_EA0_RDREQ_LEVEL[37],TCC_EA0_ATOMIC_LEVEL[38],TCC_EA0_RDREQ[38],TCC_EA0_RDREQ_32B[38],TCC_EA0_RDREQ_LEVEL[38],TCC_EA0_ATOMIC_LEVEL[39],TCC_EA0_RDREQ[39],TCC_EA0_RDREQ_32B[39],TCC_EA0_RDREQ_LEVEL[39],TCC_EA0_ATOMIC_LEVEL[40],TCC_EA0_RDREQ[40],TCC_EA0_RDREQ_32B[40],TCC_EA0_RDREQ_LEVEL[40],TCC_EA0_ATOMIC_LEVEL[41],TCC_EA0_RDREQ[41],TCC_EA0_RDREQ_32B[41],TCC_EA0_RDREQ_LEVEL[41],TCC_EA0_ATOMIC_LEVEL[42],TCC_EA0_RDREQ[42],TCC_EA0_RDREQ_32B[42],TCC_EA0_RDREQ_LEVEL[42],TCC_EA0_ATOMIC_LEVEL[43],TCC_EA0_RDREQ[43],TCC_EA0_RDREQ_32B[43],TCC_EA0_RDREQ_LEVEL[43],TCC_EA0_ATOMIC_LEVEL[44],TCC_EA0_RDREQ[44],TCC_EA0_RDREQ_32B[44],TCC_EA0_RDREQ_LEVEL[44],TCC_EA0_ATOMIC_LEVEL[45],TCC_EA0_RDREQ[45],TCC_EA0_RDREQ_32B[45],TCC_EA0_RDREQ_LEVEL[45],TCC_EA0_ATOMIC_LEVEL[46],TCC_EA0_RDREQ[46],TCC_EA0_RDREQ_32B[46],TCC_EA0_RDREQ_LEVEL[46],TCC_EA0_ATOMIC_LEVEL[47],TCC_EA0_RDREQ[47],TCC_EA0_RDREQ_32B[47],TCC_EA0_RDREQ_LEVEL[47],TCC_EA0_ATOMIC_LEVEL[48],TCC_EA0_RDREQ[48],TCC_EA0_RDREQ_32B[48],TCC_EA0_RDREQ_LEVEL[48],TCC_EA0_ATOMIC_LEVEL[49],TCC_EA0_RDREQ[49],TCC_EA0_RDREQ_32B[49],TCC_EA0_RDREQ_LEVEL[49],TCC_EA0_ATOMIC_LEVEL[50],TCC_EA0_RDREQ[50],TCC_EA0_RDREQ_32B[50],TCC_EA0_RDREQ_LEVEL[50],TCC_EA0_ATOMIC_LEVEL[51],TCC_EA0_RDREQ[51],TCC_EA0_RDREQ_32B[51],TCC_EA0_RDREQ_LEVEL[51],TCC_EA0_ATOMIC_LEVEL[52],TCC_EA0_RDREQ[52],TCC_EA0_RDREQ_32B[52],TCC_EA0_RDREQ_LEVEL[52],TCC_EA0_ATOMIC_LEVEL[53],TCC_EA0_RDREQ[53],TCC_EA0_RDREQ_32B[53],TCC_EA0_RDREQ_LEVEL[53],TCC_EA0_ATOMIC_LEVEL[54],TCC_EA0_RDREQ[54],TCC_EA0_RDREQ_32B[54],TCC_EA0_RDREQ_LEVEL[54],TCC_EA0_ATOMIC_LEVEL[55],TCC_EA0_RDREQ[55],TCC_EA0_RDREQ_32B[55],TCC_EA0_RDREQ_LEVEL[55],TCC_EA0_ATOMIC_LEVEL[56],TCC_EA0_RDREQ[56],TCC_EA0_RDREQ_32B[56],TCC_EA0_RDREQ_LEVEL[56],TCC_EA0_ATOMIC_LEVEL[57],TCC_EA0_RDREQ[57],TCC_EA0_RDREQ_32B[57],TCC_EA0_RDREQ_LEVEL[57],TCC_EA0_ATOMIC_LEVEL[58],TCC_EA0_RDREQ[58],TCC_EA0_RDREQ_32B[58],TCC_EA0_RDREQ_LEVEL[58],TCC_EA0_ATOMIC_LEVEL[59],TCC_EA0_RDREQ[59],TCC_EA0_RDREQ_32B[59],TCC_EA0_RDREQ_LEVEL[59],TCC_EA0_ATOMIC_LEVEL[60],TCC_EA0_RDREQ[60],TCC_EA0_RDREQ_32B[60],TCC_EA0_RDREQ_LEVEL[60],TCC_EA0_ATOMIC_LEVEL[61],TCC_EA0_RDREQ[61],TCC_EA0_RDREQ_32B[61],TCC_EA0_RDREQ_LEVEL[61],TCC_EA0_ATOMIC_LEVEL[62],TCC_EA0_RDREQ[62],TCC_EA0_RDREQ_32B[62],TCC_EA0_RDREQ_LEVEL[62],TCC_EA0_ATOMIC_LEVEL[63],TCC_EA0_RDREQ[63],TCC_EA0_RDREQ_32B[63],TCC_EA0_RDREQ_LEVEL[63],TCC_EA0_ATOMIC_LEVEL[64],TCC_EA0_RDREQ[64],TCC_EA0_RDREQ_32B[64],TCC_EA0_RDREQ_LEVEL[64],TCC_EA0_ATOMIC_LEVEL[65],TCC_EA0_RDREQ[65],TCC_EA0_RDREQ_32B[65],TCC_EA0_RDREQ_LEVEL[65],TCC_EA0_ATOMIC_LEVEL[66],TCC_EA0_RDREQ[66],TCC_EA0_RDREQ_32B[66],TCC_EA0_RDREQ_LEVEL[66],TCC_EA0_ATOMIC_LEVEL[67],TCC_EA0_RDREQ[67],TCC_EA0_RDREQ_32B[67],TCC_EA0_RDREQ_LEVEL[67],TCC_EA0_ATOMIC_LEVEL[68],TCC_EA0_RDREQ[68],TCC_EA0_RDREQ_32B[68],TCC_EA0_RDREQ_LEVEL[68],TCC_EA0_ATOMIC_LEVEL[69],TCC_EA0_RDREQ[69],TCC_EA0_RDREQ_32B[69],TCC_EA0_RDREQ_LEVEL[69],TCC_EA0_ATOMIC_LEVEL[70],TCC_EA0_RDREQ[70],TCC_EA0_RDREQ_32B[70],TCC_EA0_RDREQ_LEVEL[70],TCC_EA0_ATOMIC_LEVEL[71],TCC_EA0_RDREQ[71],TCC_EA0_RDREQ_32B[71],TCC_EA0_RDREQ_LEVEL[71],TCC_EA0_ATOMIC_LEVEL[72],TCC_EA0_RDREQ[72],TCC_EA0_RDREQ_32B[72],TCC_EA0_RDREQ_LEVEL[72],TCC_EA0_ATOMIC_LEVEL[73],TCC_EA0_RDREQ[73],TCC_EA0_RDREQ_32B[73],TCC_EA0_RDREQ_LEVEL[73],TCC_EA0_ATOMIC_LEVEL[74],TCC_EA0_RDREQ[74],TCC_EA0_RDREQ_32B[74],TCC_EA0_RDREQ_LEVEL[74],TCC_EA0_ATOMIC_LEVEL[75],TCC_EA0_RDREQ[75],TCC_EA0_RDREQ_32B[75],TCC_EA0_RDREQ_LEVEL[75],TCC_EA0_ATOMIC_LEVEL[76],TCC_EA0_RDREQ[76],TCC_EA0_RDREQ_32B[76],TCC_EA0_RDREQ_LEVEL[76],TCC_EA0_ATOMIC_LEVEL[77],TCC_EA0_RDREQ[77],TCC_EA0_RDREQ_32B[77],TCC_EA0_RDREQ_LEVEL[77],TCC_EA0_ATOMIC_LEVEL[78],TCC_EA0_RDREQ[78],TCC_EA0_RDREQ_32B[78],TCC_EA0_RDREQ_LEVEL[78],TCC_EA0_ATOMIC_LEVEL[79],TCC_EA0_RDREQ[79],TCC_EA0_RDREQ_32B[79],TCC_EA0_RDREQ_LEVEL[79],TCC_EA0_ATOMIC_LEVEL[80],TCC_EA0_RDREQ[80],TCC_EA0_RDREQ_32B[80],TCC_EA0_RDREQ_LEVEL[80],TCC_EA0_ATOMIC_LEVEL[81],TCC_EA0_RDREQ[81],TCC_EA0_RDREQ_32B[81],TCC_EA0_RDREQ_LEVEL[81],TCC_EA0_ATOMIC_LEVEL[82],TCC_EA0_RDREQ[82],TCC_EA0_RDREQ_32B[82],TCC_EA0_RDREQ_LEVEL[82],TCC_EA0_ATOMIC_LEVEL[83],TCC_EA0_RDREQ[83],TCC_EA0_RDREQ_32B[83],TCC_EA0_RDREQ_LEVEL[83],TCC_EA0_ATOMIC_LEVEL[84],TCC_EA0_RDREQ[84],TCC_EA0_RDREQ_32B[84],TCC_EA0_RDREQ_LEVEL[84],TCC_EA0_ATOMIC_LEVEL[85],TCC_EA0_RDREQ[85],TCC_EA0_RDREQ_32B[85],TCC_EA0_RDREQ_LEVEL[85],TCC_EA0_ATOMIC_LEVEL[86],TCC_EA0_RDREQ[86],TCC_EA0_RDREQ_32B[86],TCC_EA0_RDREQ_LEVEL[86],TCC_EA0_ATOMIC_LEVEL[87],TCC_EA0_RDREQ[87],TCC_EA0_RDREQ_32B[87],TCC_EA0_RDREQ_LEVEL[87],TCC_EA0_ATOMIC_LEVEL[88],TCC_EA0_RDREQ[88],TCC_EA0_RDREQ_32B[88],TCC_EA0_RDREQ_LEVEL[88],TCC_EA0_ATOMIC_LEVEL[89],TCC_EA0_RDREQ[89],TCC_EA0_RDREQ_32B[89],TCC_EA0_RDREQ_LEVEL[89],TCC_EA0_ATOMIC_LEVEL[90],TCC_EA0_RDREQ[90],TCC_EA0_RDREQ_32B[90],TCC_EA0_RDREQ_LEVEL[90],TCC_EA0_ATOMIC_LEVEL[91],TCC_EA0_RDREQ[91],TCC_EA0_RDREQ_32B[91],TCC_EA0_RDREQ_LEVEL[91],TCC_EA0_ATOMIC_LEVEL[92],TCC_EA0_RDREQ[92],TCC_EA0_RDREQ_32B[92],TCC_EA0_RDREQ_LEVEL[92],TCC_EA0_ATOMIC_LEVEL[93],TCC_EA0_RDREQ[93],TCC_EA0_RDREQ_32B[93],TCC_EA0_RDREQ_LEVEL[93],TCC_EA0_ATOMIC_LEVEL[94],TCC_EA0_RDREQ[94],TCC_EA0_RDREQ_32B[94],TCC_EA0_RDREQ_LEVEL[94],TCC_EA0_ATOMIC_LEVEL[95],TCC_EA0_RDREQ[95],TCC_EA0_RDREQ_32B[95],TCC_EA0_RDREQ_LEVEL[95],Wave_Size_16,Correlation_ID_16,SQ_INSTS_VMEM,SQ_INSTS_SALU,SQ_INSTS_VSKIPPED,SQ_INSTS,SQ_INSTS_VALU,SQ_INSTS_VALU_ADD_F16,SQ_INSTS_VALU_MUL_F16,SQ_INSTS_VALU_FMA_F16,GRBM_SPI_BUSY,SPI_CSN_NUM_THREADGROUPS,SPI_CSN_WAVE,CPC_CPC_TCIU_BUSY,CPC_CPC_TCIU_IDLE,CPF_CPF_TCIU_BUSY,CPF_CPF_TCIU_STALL,TA_BUFFER_READ_WAVEFRONTS_sum,TA_BUFFER_WRITE_WAVEFRONTS_sum,TCC_CC_REQ_sum,TCC_NC_REQ_sum,TCC_RW_REQ_sum,TCC_UC_REQ_sum,TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum,TCP_READ_TAGCONFLICT_STALL_CYCLES_sum,TCP_TA_TCP_STATE_READ_sum,TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum,TD_LOAD_WAVEFRONT_sum,TD_SPI_STALL_sum,Wave_Size_17,Correlation_ID_17,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_BUSY_CU_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_INSTS_VALU_CVT,SQ_INSTS_VMEM_WR,SQ_INSTS_VMEM_RD,GRBM_COUNT,GRBM_GUI_ACTIVE,SPI_CSN_WINDOW_VALID,SPI_CSN_BUSY,CPC_CPC_STAT_BUSY,CPC_CPC_STAT_IDLE,CPF_CPF_STAT_BUSY,CPF_CPF_STAT_STALL,TA_BUFFER_WAVEFRONTS_sum,TA_TA_BUSY_sum,TCC_BUSY_sum,TCC_CYCLE_sum,TCC_PROBE_ALL_sum,TCC_PROBE_sum,TCP_GATE_EN1_sum,TCP_GATE_EN2_sum,TCP_TCR_TCP_STALL_CYCLES_sum,TCP_TD_TCP_STALL_CYCLES_sum,TD_TC_STALL_sum,TD_TD_BUSY_sum,Start_Timestamp,End_Timestamp
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diff --git a/tests/workloads/path/MI300A_A1/sysinfo.csv b/tests/workloads/path/MI300A_A1/sysinfo.csv
new file mode 100644
index 0000000000..92c9adfe9f
--- /dev/null
+++ b/tests/workloads/path/MI300A_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+path,./tests/vcopy -n 1048576 -b 256 -i 3,SQ|LDS|SQC|TA|TD|TCP|TCC|SPI|CPC|CPF,Wed 29 May 2024 01:33:59 PM  (CDT),2,sh5-1w300-rg3-3,AMD Instinct MI300A Accelerator,"American Megatrends International, LLC.RMO1002DS",Ubuntu 22.04.2 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,131174852,,6.1.2-110,N/A,SPX,NPS1,MI300A_A1,gfx942,32,24576,228,4,24,64,1024,32,2100,1300,2100,1300,96,32,120,4,5324.8,6
diff --git a/tests/workloads/path/MI300A_A1/timestamps.csv b/tests/workloads/path/MI300A_A1/timestamps.csv
new file mode 100644
index 0000000000..e7b26752ca
--- /dev/null
+++ b/tests/workloads/path/MI300A_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,11995,1,144921,144921,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73517673339483,73517673347095,0
+3,11995,1,144921,144921,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73517673385473,73517673391482,0
+2,11995,1,144921,144921,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",73517673363600,73517673369970,0
diff --git a/tests/workloads/path/MI300X_A1/SQ_IFETCH_LEVEL.csv b/tests/workloads/path/MI300X_A1/SQ_IFETCH_LEVEL.csv
new file mode 100644
index 0000000000..3d1eca913c
--- /dev/null
+++ b/tests/workloads/path/MI300X_A1/SQ_IFETCH_LEVEL.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,SQ_WAVES,SQ_IFETCH,SQ_IFETCH_LEVEL,SQ_ACCUM_PREV_HIRES
+0,60633,1,962922,962922,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716165268071613,716165268087773,0,435104.0,435104.0,16384.0,65536.0,35112.0,2815648.0
+1,60633,1,962922,962922,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716165268110013,716165268124653,0,442929.0,442929.0,16384.0,65536.0,13009.0,1048576.0
+2,60633,1,962922,962922,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716165268144733,716165268158533,0,359921.0,359921.0,16384.0,65536.0,13296.0,1048592.0
diff --git a/tests/workloads/path/MI300X_A1/SQ_INST_LEVEL_LDS.csv b/tests/workloads/path/MI300X_A1/SQ_INST_LEVEL_LDS.csv
new file mode 100644
index 0000000000..082c45a9d8
--- /dev/null
+++ b/tests/workloads/path/MI300X_A1/SQ_INST_LEVEL_LDS.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_LDS,SQ_INST_LEVEL_LDS,SQ_ACCUM_PREV_HIRES
+0,60633,1,962933,962933,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716165268071613,716165268087773,0,0.0,0.0,0.0
+1,60633,1,962933,962933,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716165268110013,716165268124653,0,0.0,0.0,0.0
+2,60633,1,962933,962933,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716165268144733,716165268158533,0,0.0,0.0,0.0
diff --git a/tests/workloads/path/MI300X_A1/SQ_INST_LEVEL_SMEM.csv b/tests/workloads/path/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
new file mode 100644
index 0000000000..8f18ba354d
--- /dev/null
+++ b/tests/workloads/path/MI300X_A1/SQ_INST_LEVEL_SMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_SMEM,SQ_INST_LEVEL_SMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,962944,962944,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716165268071613,716165268087773,0,65536.0,3398670.0,271803456.0
+1,60633,1,962944,962944,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716165268110013,716165268124653,0,65536.0,3594916.0,287618528.0
+2,60633,1,962944,962944,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716165268144733,716165268158533,0,65536.0,3509382.0,280756880.0
diff --git a/tests/workloads/path/MI300X_A1/SQ_INST_LEVEL_VMEM.csv b/tests/workloads/path/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
new file mode 100644
index 0000000000..6c9b403b9a
--- /dev/null
+++ b/tests/workloads/path/MI300X_A1/SQ_INST_LEVEL_VMEM.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,SQ_INSTS_VMEM,SQ_INST_LEVEL_VMEM,SQ_ACCUM_PREV_HIRES
+0,60633,1,962955,962955,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716165268071613,716165268087773,0,32768.0,437332.0,34974484.0
+1,60633,1,962955,962955,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716165268110013,716165268124653,0,32768.0,278708.0,22287984.0
+2,60633,1,962955,962955,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716165268144733,716165268158533,0,32768.0,272752.0,21819956.0
diff --git a/tests/workloads/path/MI300X_A1/SQ_LEVEL_WAVES.csv b/tests/workloads/path/MI300X_A1/SQ_LEVEL_WAVES.csv
new file mode 100644
index 0000000000..3fad1454b9
--- /dev/null
+++ b/tests/workloads/path/MI300X_A1/SQ_LEVEL_WAVES.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID,GRBM_COUNT,GRBM_GUI_ACTIVE,CPC_ME1_BUSY_FOR_PACKET_DECODE,SQ_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQ_BUSY_CYCLES,SQ_LEVEL_WAVES,SQ_ACCUM_PREV_HIRES
+0,60633,1,962966,962966,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716165268071613,716165268087773,0,461523.0,461523.0,272360.0,1846092.0,16384.0,35221159.0,571274.0,0.0,141225272.0
+1,60633,1,962966,962966,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716165268110013,716165268124653,0,405351.0,405351.0,224988.0,1621404.0,16384.0,31015819.0,522599.0,0.0,124419904.0
+2,60633,1,962966,962966,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716165268144733,716165268158533,0,414642.0,414642.0,238604.0,1658568.0,16384.0,30314115.0,516384.0,0.0,121612444.0
diff --git a/tests/workloads/path/MI300X_A1/log.txt b/tests/workloads/path/MI300X_A1/log.txt
new file mode 100644
index 0000000000..83419a2761
--- /dev/null
+++ b/tests/workloads/path/MI300X_A1/log.txt
@@ -0,0 +1,149 @@
+Omniperf version: 2.0.0
+Profiler choice: rocprofv2
+Path: /home/colramos/omniperf/tests/workloads/path/MI300X_A1
+Target: MI300X_A1
+Command: ./tests/vcopy -n 1048576 -b 256 -i 3
+Kernel Selection: None
+Dispatch Selection: None
+Hardware Blocks: All
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Collecting Performance Counters
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+[profiling] Current input file: tests/workloads/path/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+[profiling] Current input file: tests/workloads/path/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_LDS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/path/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/path/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INST_LEVEL_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACCUM_PREV_HIRES
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/path/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_COUNT
+   |-> [/opt/rocm/bin/rocprofv2] - GRBM_GUI_ACTIVE
+   |-> [/opt/rocm/bin/rocprofv2] - CPC_ME1_BUSY_FOR_PACKET_DECODE
+[profiling] Current input file: tests/workloads/path/MI300X_A1/perfmon/pmc_perf_0.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_BUSY_CU_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVE_CYCLES
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_CVT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM_WR
+[profiling] Current input file: tests/workloads/path/MI300X_A1/perfmon/pmc_perf_1.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VSKIPPED
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU
+[profiling] Current input file: tests/workloads/path/MI300X_A1/perfmon/pmc_perf_10.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_DATA_ATOMIC_REQ
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_TC_STALL
+[profiling] Current input file: tests/workloads/path/MI300X_A1/perfmon/pmc_perf_11.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_INPUT_VALID_READYB
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_ATOMIC
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_8
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ
+[profiling] Current input file: tests/workloads/path/MI300X_A1/perfmon/pmc_perf_12.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_2
+   |-> [/opt/rocm/bin/rocprofv2] - SQC_DCACHE_REQ_READ_4
+   |-> [/opt/rocm/bin/rocprofv2] Enabling Counter Collection
+[profiling] Current input file: tests/workloads/path/MI300X_A1/perfmon/pmc_perf_13.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_ATOMIC[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_BUBBLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_CYCLE[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC[0]
+[profiling] Current input file: tests/workloads/path/MI300X_A1/perfmon/pmc_perf_14.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_32B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_RDREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_ATOMIC_LEVEL[1]
+[profiling] Current input file: tests/workloads/path/MI300X_A1/perfmon/pmc_perf_15.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_64B[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ_LEVEL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_HIT[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_EA0_WRREQ[1]
+[profiling] Current input file: tests/workloads/path/MI300X_A1/perfmon/pmc_perf_16.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_MISS[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_READ[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_REQ[0]
+[profiling] Current input file: tests/workloads/path/MI300X_A1/perfmon/pmc_perf_17.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TAG_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_TOO_MANY_EA_WRREQS_STALL[0]
+   |-> [/opt/rocm/bin/rocprofv2] - TCC_WRITE[0]
+[profiling] Current input file: tests/workloads/path/MI300X_A1/perfmon/pmc_perf_2.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F16
+[profiling] Current input file: tests/workloads/path/MI300X_A1/perfmon/pmc_perf_3.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_TRANS_F64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_INT64
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_FLAT
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_LDS
+[profiling] Current input file: tests/workloads/path/MI300X_A1/perfmon/pmc_perf_4.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_BRANCH
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SENDMSG
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAIT_ANY
+[profiling] Current input file: tests/workloads/path/MI300X_A1/perfmon/pmc_perf_5.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_SCA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ACTIVE_INST_EXP_GDS
+[profiling] Current input file: tests/workloads/path/MI300X_A1/perfmon/pmc_perf_6.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_THREAD_CYCLES_VALU
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_IFETCH
+[profiling] Current input file: tests/workloads/path/MI300X_A1/perfmon/pmc_perf_7.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_32
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_WAVES_LT_16
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_ITEMS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_MEM_VIOLATIONS
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_ATOMIC_RETURN
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_LDS_IDX_ACTIVE
+[profiling] Current input file: tests/workloads/path/MI300X_A1/perfmon/pmc_perf_8.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_SMEM_NORM
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_MFMA
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_I8
+[profiling] Current input file: tests/workloads/path/MI300X_A1/perfmon/pmc_perf_9.txt
+   |-> [/opt/rocm/bin/rocprofv2] ROCProfilerV2: Collecting the following counters:
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_I8
+   |-> [/opt/rocm/bin/rocprofv2] - SQ_INSTS_VALU_MFMA_MOPS_F16
+[profiling] Current input file: tests/workloads/path/MI300X_A1/perfmon/timestamps.txt
+   |-> [/opt/rocm/bin/rocprofv2] vcopy testing on GCD 0
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the CPU
+   |-> [/opt/rocm/bin/rocprofv2] Finished allocating vectors on the GPU
+[roofline] Roofline temporarily disabled in MI300
diff --git a/tests/workloads/path/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt b/tests/workloads/path/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
new file mode 100644
index 0000000000..293092f641
--- /dev/null
+++ b/tests/workloads/path/MI300X_A1/perfmon/SQ_IFETCH_LEVEL.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt b/tests/workloads/path/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
new file mode 100644
index 0000000000..08439eedce
--- /dev/null
+++ b/tests/workloads/path/MI300X_A1/perfmon/SQ_INST_LEVEL_LDS.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt b/tests/workloads/path/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
new file mode 100644
index 0000000000..6cca322d4e
--- /dev/null
+++ b/tests/workloads/path/MI300X_A1/perfmon/SQ_INST_LEVEL_SMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt b/tests/workloads/path/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
new file mode 100644
index 0000000000..e527ad31ba
--- /dev/null
+++ b/tests/workloads/path/MI300X_A1/perfmon/SQ_INST_LEVEL_VMEM.txt
@@ -0,0 +1,5 @@
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt b/tests/workloads/path/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
new file mode 100644
index 0000000000..3f8e04adb3
--- /dev/null
+++ b/tests/workloads/path/MI300X_A1/perfmon/SQ_LEVEL_WAVES.txt
@@ -0,0 +1,5 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_0.txt b/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_0.txt
new file mode 100644
index 0000000000..ebc550fbfe
--- /dev/null
+++ b/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_0.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_INSTS_VALU_CVT SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD GRBM_COUNT GRBM_GUI_ACTIVE TCP_GATE_EN1_sum TCP_GATE_EN2_sum TCP_TD_TCP_STALL_CYCLES_sum TCP_TCR_TCP_STALL_CYCLES_sum TA_TA_BUSY_sum TA_BUFFER_WAVEFRONTS_sum TD_TD_BUSY_sum TD_TC_STALL_sum SPI_CSN_WINDOW_VALID SPI_CSN_BUSY CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE CPF_CPF_STAT_BUSY CPF_CPF_STAT_STALL TCC_CYCLE_sum TCC_BUSY_sum TCC_PROBE_sum TCC_PROBE_ALL_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_1.txt b/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_1.txt
new file mode 100644
index 0000000000..9ad887ddbb
--- /dev/null
+++ b/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_1.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED SQ_INSTS SQ_INSTS_VALU SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_FMA_F16 GRBM_SPI_BUSY TCP_READ_TAGCONFLICT_STALL_CYCLES_sum TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum TCP_TA_TCP_STATE_READ_sum TA_BUFFER_READ_WAVEFRONTS_sum TA_BUFFER_WRITE_WAVEFRONTS_sum TD_SPI_STALL_sum TD_LOAD_WAVEFRONT_sum SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE CPC_CPC_TCIU_BUSY CPC_CPC_TCIU_IDLE CPF_CPF_TCIU_BUSY CPF_CPF_TCIU_STALL TCC_NC_REQ_sum TCC_UC_REQ_sum TCC_CC_REQ_sum TCC_RW_REQ_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_10.txt b/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_10.txt
new file mode 100644
index 0000000000..21c59688f7
--- /dev/null
+++ b/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_10.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16 SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_11.txt b/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_11.txt
new file mode 100644
index 0000000000..df6d67d7b7
--- /dev/null
+++ b/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_11.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8 SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_12.txt b/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_12.txt
new file mode 100644
index 0000000000..6e5320c11c
--- /dev/null
+++ b/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_12.txt
@@ -0,0 +1,5 @@
+pmc:  SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_13.txt b/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_13.txt
new file mode 100644
index 0000000000..d95492c1cd
--- /dev/null
+++ b/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_13.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_ATOMIC[0] TCC_BUBBLE[0] TCC_CYCLE[0] TCC_EA0_ATOMIC[0] TCC_ATOMIC[1] TCC_BUBBLE[1] TCC_CYCLE[1] TCC_EA0_ATOMIC[1] TCC_ATOMIC[2] TCC_BUBBLE[2] TCC_CYCLE[2] TCC_EA0_ATOMIC[2] TCC_ATOMIC[3] TCC_BUBBLE[3] TCC_CYCLE[3] TCC_EA0_ATOMIC[3] TCC_ATOMIC[4] TCC_BUBBLE[4] TCC_CYCLE[4] TCC_EA0_ATOMIC[4] TCC_ATOMIC[5] TCC_BUBBLE[5] TCC_CYCLE[5] TCC_EA0_ATOMIC[5] TCC_ATOMIC[6] TCC_BUBBLE[6] TCC_CYCLE[6] TCC_EA0_ATOMIC[6] TCC_ATOMIC[7] TCC_BUBBLE[7] TCC_CYCLE[7] TCC_EA0_ATOMIC[7] TCC_ATOMIC[8] TCC_BUBBLE[8] TCC_CYCLE[8] TCC_EA0_ATOMIC[8] TCC_ATOMIC[9] TCC_BUBBLE[9] TCC_CYCLE[9] TCC_EA0_ATOMIC[9] TCC_ATOMIC[10] TCC_BUBBLE[10] TCC_CYCLE[10] TCC_EA0_ATOMIC[10] TCC_ATOMIC[11] TCC_BUBBLE[11] TCC_CYCLE[11] TCC_EA0_ATOMIC[11] TCC_ATOMIC[12] TCC_BUBBLE[12] TCC_CYCLE[12] TCC_EA0_ATOMIC[12] TCC_ATOMIC[13] TCC_BUBBLE[13] TCC_CYCLE[13] TCC_EA0_ATOMIC[13] TCC_ATOMIC[14] TCC_BUBBLE[14] TCC_CYCLE[14] TCC_EA0_ATOMIC[14] TCC_ATOMIC[15] TCC_BUBBLE[15] TCC_CYCLE[15] TCC_EA0_ATOMIC[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_14.txt b/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_14.txt
new file mode 100644
index 0000000000..28327b86d3
--- /dev/null
+++ b/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_14.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_ATOMIC_LEVEL[0] TCC_EA0_RDREQ[0] TCC_EA0_RDREQ_32B[0] TCC_EA0_RDREQ_LEVEL[0] TCC_EA0_ATOMIC_LEVEL[1] TCC_EA0_RDREQ[1] TCC_EA0_RDREQ_32B[1] TCC_EA0_RDREQ_LEVEL[1] TCC_EA0_ATOMIC_LEVEL[2] TCC_EA0_RDREQ[2] TCC_EA0_RDREQ_32B[2] TCC_EA0_RDREQ_LEVEL[2] TCC_EA0_ATOMIC_LEVEL[3] TCC_EA0_RDREQ[3] TCC_EA0_RDREQ_32B[3] TCC_EA0_RDREQ_LEVEL[3] TCC_EA0_ATOMIC_LEVEL[4] TCC_EA0_RDREQ[4] TCC_EA0_RDREQ_32B[4] TCC_EA0_RDREQ_LEVEL[4] TCC_EA0_ATOMIC_LEVEL[5] TCC_EA0_RDREQ[5] TCC_EA0_RDREQ_32B[5] TCC_EA0_RDREQ_LEVEL[5] TCC_EA0_ATOMIC_LEVEL[6] TCC_EA0_RDREQ[6] TCC_EA0_RDREQ_32B[6] TCC_EA0_RDREQ_LEVEL[6] TCC_EA0_ATOMIC_LEVEL[7] TCC_EA0_RDREQ[7] TCC_EA0_RDREQ_32B[7] TCC_EA0_RDREQ_LEVEL[7] TCC_EA0_ATOMIC_LEVEL[8] TCC_EA0_RDREQ[8] TCC_EA0_RDREQ_32B[8] TCC_EA0_RDREQ_LEVEL[8] TCC_EA0_ATOMIC_LEVEL[9] TCC_EA0_RDREQ[9] TCC_EA0_RDREQ_32B[9] TCC_EA0_RDREQ_LEVEL[9] TCC_EA0_ATOMIC_LEVEL[10] TCC_EA0_RDREQ[10] TCC_EA0_RDREQ_32B[10] TCC_EA0_RDREQ_LEVEL[10] TCC_EA0_ATOMIC_LEVEL[11] TCC_EA0_RDREQ[11] TCC_EA0_RDREQ_32B[11] TCC_EA0_RDREQ_LEVEL[11] TCC_EA0_ATOMIC_LEVEL[12] TCC_EA0_RDREQ[12] TCC_EA0_RDREQ_32B[12] TCC_EA0_RDREQ_LEVEL[12] TCC_EA0_ATOMIC_LEVEL[13] TCC_EA0_RDREQ[13] TCC_EA0_RDREQ_32B[13] TCC_EA0_RDREQ_LEVEL[13] TCC_EA0_ATOMIC_LEVEL[14] TCC_EA0_RDREQ[14] TCC_EA0_RDREQ_32B[14] TCC_EA0_RDREQ_LEVEL[14] TCC_EA0_ATOMIC_LEVEL[15] TCC_EA0_RDREQ[15] TCC_EA0_RDREQ_32B[15] TCC_EA0_RDREQ_LEVEL[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_15.txt b/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_15.txt
new file mode 100644
index 0000000000..033ae877ed
--- /dev/null
+++ b/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_15.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_EA0_WRREQ[0] TCC_EA0_WRREQ_64B[0] TCC_EA0_WRREQ_LEVEL[0] TCC_HIT[0] TCC_EA0_WRREQ[1] TCC_EA0_WRREQ_64B[1] TCC_EA0_WRREQ_LEVEL[1] TCC_HIT[1] TCC_EA0_WRREQ[2] TCC_EA0_WRREQ_64B[2] TCC_EA0_WRREQ_LEVEL[2] TCC_HIT[2] TCC_EA0_WRREQ[3] TCC_EA0_WRREQ_64B[3] TCC_EA0_WRREQ_LEVEL[3] TCC_HIT[3] TCC_EA0_WRREQ[4] TCC_EA0_WRREQ_64B[4] TCC_EA0_WRREQ_LEVEL[4] TCC_HIT[4] TCC_EA0_WRREQ[5] TCC_EA0_WRREQ_64B[5] TCC_EA0_WRREQ_LEVEL[5] TCC_HIT[5] TCC_EA0_WRREQ[6] TCC_EA0_WRREQ_64B[6] TCC_EA0_WRREQ_LEVEL[6] TCC_HIT[6] TCC_EA0_WRREQ[7] TCC_EA0_WRREQ_64B[7] TCC_EA0_WRREQ_LEVEL[7] TCC_HIT[7] TCC_EA0_WRREQ[8] TCC_EA0_WRREQ_64B[8] TCC_EA0_WRREQ_LEVEL[8] TCC_HIT[8] TCC_EA0_WRREQ[9] TCC_EA0_WRREQ_64B[9] TCC_EA0_WRREQ_LEVEL[9] TCC_HIT[9] TCC_EA0_WRREQ[10] TCC_EA0_WRREQ_64B[10] TCC_EA0_WRREQ_LEVEL[10] TCC_HIT[10] TCC_EA0_WRREQ[11] TCC_EA0_WRREQ_64B[11] TCC_EA0_WRREQ_LEVEL[11] TCC_HIT[11] TCC_EA0_WRREQ[12] TCC_EA0_WRREQ_64B[12] TCC_EA0_WRREQ_LEVEL[12] TCC_HIT[12] TCC_EA0_WRREQ[13] TCC_EA0_WRREQ_64B[13] TCC_EA0_WRREQ_LEVEL[13] TCC_HIT[13] TCC_EA0_WRREQ[14] TCC_EA0_WRREQ_64B[14] TCC_EA0_WRREQ_LEVEL[14] TCC_HIT[14] TCC_EA0_WRREQ[15] TCC_EA0_WRREQ_64B[15] TCC_EA0_WRREQ_LEVEL[15] TCC_HIT[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_16.txt b/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_16.txt
new file mode 100644
index 0000000000..123269c3f9
--- /dev/null
+++ b/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_16.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_MISS[0] TCC_READ[0] TCC_REQ[0] TCC_RW_REQ[0] TCC_MISS[1] TCC_READ[1] TCC_REQ[1] TCC_RW_REQ[1] TCC_MISS[2] TCC_READ[2] TCC_REQ[2] TCC_RW_REQ[2] TCC_MISS[3] TCC_READ[3] TCC_REQ[3] TCC_RW_REQ[3] TCC_MISS[4] TCC_READ[4] TCC_REQ[4] TCC_RW_REQ[4] TCC_MISS[5] TCC_READ[5] TCC_REQ[5] TCC_RW_REQ[5] TCC_MISS[6] TCC_READ[6] TCC_REQ[6] TCC_RW_REQ[6] TCC_MISS[7] TCC_READ[7] TCC_REQ[7] TCC_RW_REQ[7] TCC_MISS[8] TCC_READ[8] TCC_REQ[8] TCC_RW_REQ[8] TCC_MISS[9] TCC_READ[9] TCC_REQ[9] TCC_RW_REQ[9] TCC_MISS[10] TCC_READ[10] TCC_REQ[10] TCC_RW_REQ[10] TCC_MISS[11] TCC_READ[11] TCC_REQ[11] TCC_RW_REQ[11] TCC_MISS[12] TCC_READ[12] TCC_REQ[12] TCC_RW_REQ[12] TCC_MISS[13] TCC_READ[13] TCC_REQ[13] TCC_RW_REQ[13] TCC_MISS[14] TCC_READ[14] TCC_REQ[14] TCC_RW_REQ[14] TCC_MISS[15] TCC_READ[15] TCC_REQ[15] TCC_RW_REQ[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_17.txt b/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_17.txt
new file mode 100644
index 0000000000..102fb795bd
--- /dev/null
+++ b/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_17.txt
@@ -0,0 +1,5 @@
+pmc:  TCC_TAG_STALL[0] TCC_TOO_MANY_EA_WRREQS_STALL[0] TCC_WRITE[0] TCC_TAG_STALL[1] TCC_TOO_MANY_EA_WRREQS_STALL[1] TCC_WRITE[1] TCC_TAG_STALL[2] TCC_TOO_MANY_EA_WRREQS_STALL[2] TCC_WRITE[2] TCC_TAG_STALL[3] TCC_TOO_MANY_EA_WRREQS_STALL[3] TCC_WRITE[3] TCC_TAG_STALL[4] TCC_TOO_MANY_EA_WRREQS_STALL[4] TCC_WRITE[4] TCC_TAG_STALL[5] TCC_TOO_MANY_EA_WRREQS_STALL[5] TCC_WRITE[5] TCC_TAG_STALL[6] TCC_TOO_MANY_EA_WRREQS_STALL[6] TCC_WRITE[6] TCC_TAG_STALL[7] TCC_TOO_MANY_EA_WRREQS_STALL[7] TCC_WRITE[7] TCC_TAG_STALL[8] TCC_TOO_MANY_EA_WRREQS_STALL[8] TCC_WRITE[8] TCC_TAG_STALL[9] TCC_TOO_MANY_EA_WRREQS_STALL[9] TCC_WRITE[9] TCC_TAG_STALL[10] TCC_TOO_MANY_EA_WRREQS_STALL[10] TCC_WRITE[10] TCC_TAG_STALL[11] TCC_TOO_MANY_EA_WRREQS_STALL[11] TCC_WRITE[11] TCC_TAG_STALL[12] TCC_TOO_MANY_EA_WRREQS_STALL[12] TCC_WRITE[12] TCC_TAG_STALL[13] TCC_TOO_MANY_EA_WRREQS_STALL[13] TCC_WRITE[13] TCC_TAG_STALL[14] TCC_TOO_MANY_EA_WRREQS_STALL[14] TCC_WRITE[14] TCC_TAG_STALL[15] TCC_TOO_MANY_EA_WRREQS_STALL[15] TCC_WRITE[15]
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_2.txt b/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_2.txt
new file mode 100644
index 0000000000..8ff8201c5a
--- /dev/null
+++ b/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_2.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_TRANS_F32 SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_FMA_F64 TCP_VOLATILE_sum TCP_TOTAL_ACCESSES_sum TCP_TOTAL_READ_sum TCP_TOTAL_WRITE_sum TA_BUFFER_ATOMIC_WAVEFRONTS_sum TA_BUFFER_TOTAL_CYCLES_sum TD_ATOMIC_WAVEFRONT_sum TD_STORE_WAVEFRONT_sum SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION CPF_CPF_STAT_IDLE CPF_CPF_TCIU_IDLE TCC_REQ_sum TCC_STREAMING_REQ_sum TCC_HIT_sum TCC_MISS_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_3.txt b/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_3.txt
new file mode 100644
index 0000000000..cb10e4801d
--- /dev/null
+++ b/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_3.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_TRANS_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS TCP_TOTAL_ATOMIC_WITH_RET_sum TCP_TOTAL_ATOMIC_WITHOUT_RET_sum TCP_TOTAL_WRITEBACK_INVALIDATES_sum TCP_TOTAL_CACHE_ACCESSES_sum TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES_sum TD_COALESCABLE_WAVEFRONT_sum SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE CPF_CMP_UTCL1_STALL_ON_TRANSLATION TCC_READ_sum TCC_WRITE_sum TCC_ATOMIC_sum TCC_WRITEBACK_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_4.txt b/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_4.txt
new file mode 100644
index 0000000000..e4e6069e38
--- /dev/null
+++ b/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_4.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_WAIT_ANY SQ_WAIT_INST_ANY SQ_ACTIVE_INST_ANY SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU TCP_UTCL1_TRANSLATION_MISS_sum TCP_UTCL1_TRANSLATION_HIT_sum TCP_UTCL1_PERMISSION_MISS_sum TCP_UTCL1_REQUEST_sum TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_TOTAL_WAVEFRONTS_sum SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE TCC_EA0_WRREQ_sum TCC_EA0_WRREQ_64B_sum TCC_EA0_WR_UNCACHED_32B_sum TCC_EA0_WRREQ_DRAM_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_5.txt b/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_5.txt
new file mode 100644
index 0000000000..77bd288232
--- /dev/null
+++ b/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_5.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_ACTIVE_INST_SCA SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU TCP_TCC_READ_REQ_sum TCP_TCC_WRITE_REQ_sum TCP_TCC_ATOMIC_WITH_RET_REQ_sum TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN CPC_ME1_DC0_SPI_BUSY TCC_EA0_RDREQ_sum TCC_EA0_RDREQ_32B_sum TCC_BUBBLE_sum TCC_EA0_RD_UNCACHED_32B_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_6.txt b/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_6.txt
new file mode 100644
index 0000000000..609c184df8
--- /dev/null
+++ b/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_6.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_THREAD_CYCLES_VALU SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 TCP_TCC_NC_READ_REQ_sum TCP_TCC_NC_WRITE_REQ_sum TCP_TCC_NC_ATOMIC_REQ_sum TCP_TCC_UC_READ_REQ_sum TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN TCC_EA0_RDREQ_DRAM_sum TCC_TAG_STALL_sum TCC_NORMAL_WRITEBACK_sum TCC_ALL_TC_OP_WB_WRITEBACK_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_7.txt b/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_7.txt
new file mode 100644
index 0000000000..5881e5fb8f
--- /dev/null
+++ b/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_7.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED TCP_TCC_UC_WRITE_REQ_sum TCP_TCC_UC_ATOMIC_REQ_sum TCP_TCC_CC_READ_REQ_sum TCP_TCC_CC_WRITE_REQ_sum TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR TCC_NORMAL_EVICT_sum TCC_ALL_TC_OP_INV_EVICT_sum TCC_TOO_MANY_EA_WRREQS_STALL_sum TCC_EA0_ATOMIC_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_8.txt b/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_8.txt
new file mode 100644
index 0000000000..66317384f5
--- /dev/null
+++ b/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_8.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_SMEM_NORM SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES TCP_TCC_CC_ATOMIC_REQ_sum TCP_TCC_RW_READ_REQ_sum TCP_TCC_RW_WRITE_REQ_sum TCP_TCC_RW_ATOMIC_REQ_sum SPI_VWC_CSC_WR SPI_RA_BULKY_CU_FULL_CSN TCC_EA0_RDREQ_LEVEL_sum TCC_EA0_WRREQ_LEVEL_sum TCC_EA0_ATOMIC_LEVEL_sum TCC_EA0_WRREQ_STALL_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_9.txt b/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_9.txt
new file mode 100644
index 0000000000..60ceab315a
--- /dev/null
+++ b/tests/workloads/path/MI300X_A1/perfmon/pmc_perf_9.txt
@@ -0,0 +1,5 @@
+pmc:  SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ TCP_PENDING_STALL_CYCLES_sum
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300X_A1/perfmon/timestamps.txt b/tests/workloads/path/MI300X_A1/perfmon/timestamps.txt
new file mode 100644
index 0000000000..676cca1b80
--- /dev/null
+++ b/tests/workloads/path/MI300X_A1/perfmon/timestamps.txt
@@ -0,0 +1,5 @@
+pmc:
+
+gpu:
+range:
+kernel:
diff --git a/tests/workloads/path/MI300X_A1/pmc_perf.csv b/tests/workloads/path/MI300X_A1/pmc_perf.csv
new file mode 100644
index 0000000000..46b2807da2
--- /dev/null
+++ b/tests/workloads/path/MI300X_A1/pmc_perf.csv
@@ -0,0 +1,4 @@
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LE[74],TCC_CYCLE[74],TCC_EA0_ATOMIC[74],TCC_ATOMIC[75],TCC_BUBBLE[75],TCC_CYCLE[75],TCC_EA0_ATOMIC[75],TCC_ATOMIC[76],TCC_BUBBLE[76],TCC_CYCLE[76],TCC_EA0_ATOMIC[76],TCC_ATOMIC[77],TCC_BUBBLE[77],TCC_CYCLE[77],TCC_EA0_ATOMIC[77],TCC_ATOMIC[78],TCC_BUBBLE[78],TCC_CYCLE[78],TCC_EA0_ATOMIC[78],TCC_ATOMIC[79],TCC_BUBBLE[79],TCC_CYCLE[79],TCC_EA0_ATOMIC[79],TCC_ATOMIC[80],TCC_BUBBLE[80],TCC_CYCLE[80],TCC_EA0_ATOMIC[80],TCC_ATOMIC[81],TCC_BUBBLE[81],TCC_CYCLE[81],TCC_EA0_ATOMIC[81],TCC_ATOMIC[82],TCC_BUBBLE[82],TCC_CYCLE[82],TCC_EA0_ATOMIC[82],TCC_ATOMIC[83],TCC_BUBBLE[83],TCC_CYCLE[83],TCC_EA0_ATOMIC[83],TCC_ATOMIC[84],TCC_BUBBLE[84],TCC_CYCLE[84],TCC_EA0_ATOMIC[84],TCC_ATOMIC[85],TCC_BUBBLE[85],TCC_CYCLE[85],TCC_EA0_ATOMIC[85],TCC_ATOMIC[86],TCC_BUBBLE[86],TCC_CYCLE[86],TCC_EA0_ATOMIC[86],TCC_ATOMIC[87],TCC_BUBBLE[87],TCC_CYCLE[87],TCC_EA0_ATOMIC[87],TCC_ATOMIC[88],TCC_BUBBLE[88],TCC_CYCLE[88],TCC_EA0_ATOMIC[88],TCC_ATOMIC[89],TCC_BUBBLE[89],TCC_CYCLE[89],TCC_EA0_ATOMIC[89],TCC_ATOMIC[90],TCC_BUBBLE[90],TCC_CYCLE[90],TCC_EA0_ATOMIC[90],TCC_ATOMIC[91],TCC_BUBBLE[91],TCC_CYCLE[91],TCC_EA0_ATOMIC[91],TCC_ATOMIC[92],TCC_BUBBLE[92],TCC_CYCLE[92],TCC_EA0_ATOMIC[92],TCC_ATOMIC[93],TCC_BUBBLE[93],TCC_CYCLE[93],TCC_EA0_ATOMIC[93],TCC_ATOMIC[94],TCC_BUBBLE[94],TCC_CYCLE[94],TCC_EA0_ATOMIC[94],TCC_ATOMIC[95],TCC_BUBBLE[95],TCC_CYCLE[95],TCC_EA0_ATOMIC[95],TCC_ATOMIC[96],TCC_BUBBLE[96],TCC_CYCLE[96],TCC_EA0_ATOMIC[96],TCC_ATOMIC[97],TCC_BUBBLE[97],TCC_CYCLE[97],TCC_EA0_ATOMIC[97],TCC_ATOMIC[98],TCC_BUBBLE[98],TCC_CYCLE[98],TCC_EA0_ATOMIC[98],TCC_ATOMIC[99],TCC_BUBBLE[99],TCC_CYCLE[99],TCC_EA0_ATOMIC[99],TCC_ATOMIC[100],TCC_BUBBLE[100],TCC_CYCLE[100],TCC_EA0_ATOMIC[100],TCC_ATOMIC[101],TCC_BUBBLE[101],TCC_CYCLE[101],TCC_EA0_ATOMIC[101],TCC_ATOMIC[102],TCC_BUBBLE[102],TCC_CYCLE[102],TCC_EA0_ATOMIC[102],TCC_ATOMIC[103],TCC_BUBBLE[103],TCC_CYCLE[103],TCC_EA0_ATOMIC[103],TCC_ATOMIC[104],TCC_BUBBLE[104],TCC_CYCLE[104],TCC_EA0_ATOMIC[104],TCC_ATOMIC[105],TCC_BUBBLE[105],TCC_CYCLE[105],TCC_EA0_ATOMIC[105],TCC_ATOMIC[106],TCC_BUBBLE[106],TCC_CYCLE[106],TCC_EA0_ATOMIC[106],TCC_ATOMIC[107],TCC_BUBBLE[107],TCC_CYCLE[107],TCC_EA0_ATOMIC[107],TCC_ATOMIC[108],TCC_BUBBLE[108],TCC_CYCLE[108],TCC_EA0_ATOMIC[108],TCC_ATOMIC[109],TCC_BUBBLE[109],TCC_CYCLE[109],TCC_EA0_ATOMIC[109],TCC_ATOMIC[110],TCC_BUBBLE[110],TCC_CYCLE[110],TCC_EA0_ATOMIC[110],TCC_ATOMIC[111],TCC_BUBBLE[111],TCC_CYCLE[111],TCC_EA0_ATOMIC[111],TCC_ATOMIC[112],TCC_BUBBLE[112],TCC_CYCLE[112],TCC_EA0_ATOMIC[112],TCC_ATOMIC[113],TCC_BUBBLE[113],TCC_CYCLE[113],TCC_EA0_ATOMIC[113],TCC_ATOMIC[114],TCC_BUBBLE[114],TCC_CYCLE[114],TCC_EA0_ATOMIC[114],TCC_ATOMIC[115],TCC_BUBBLE[115],TCC_CYCLE[115],TCC_EA0_ATOMIC[115],TCC_ATOMIC[116],TCC_BUBBLE[116],TCC_CYCLE[116],TCC_EA0_ATOMIC[116],TCC_ATOMIC[117],TCC_BUBBLE[117],TCC_CYCLE[117],TCC_EA0_ATOMIC[117],TCC_ATOMIC[118],TCC_BUBBLE[118],TCC_CYCLE[118],TCC_EA0_ATOMIC[118],TCC_ATOMIC[119],TCC_BUBBLE[119],TCC_CYCLE[119],TCC_EA0_ATOMIC[119],TCC_ATOMIC[120],TCC_BUBBLE[120],TCC_CYCLE[120],TCC_EA0_ATOMIC[120],TCC_ATOMIC[121],TCC_BUBBLE[121],TCC_CYCLE[121],TCC_EA0_ATOMIC[121],TCC_ATOMIC[122],TCC_BUBBLE[122],TCC_CYCLE[122],TCC_EA0_ATOMIC[122],TCC_ATOMIC[123],TCC_BUBBLE[123],TCC_CYCLE[123],TCC_EA0_ATOMIC[123],TCC_ATOMIC[124],TCC_BUBBLE[124],TCC_CYCLE[124],TCC_EA0_ATOMIC[124],TCC_ATOMIC[125],TCC_BUBBLE[125],TCC_CYCLE[125],TCC_EA0_ATOMIC[125],TCC_ATOMIC[126],TCC_BUBBLE[126],TCC_CYCLE[126],TCC_EA0_ATOMIC[126],TCC_ATOMIC[127],TCC_BUBBLE[127],TCC_CYCLE[127],TCC_EA0_ATOMIC[127],Wave_Size_2,Correlation_ID_2,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,TA_FLAT_ATOMIC_WAVEFRONTS_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,TCC_ALL_TC_OP_INV_EVICT_sum,TCC_EA0_ATOMIC_sum,TCC_NORMAL_EVICT_sum,TCC_TOO_MANY_EA_WRREQS_STALL_sum,TCP_TCC_CC_READ_REQ_sum,TCP_TCC_CC_WRITE_REQ_sum,TCP_TCC_UC_ATOMIC_REQ_sum,TCP_TCC_UC_WRITE_REQ_sum,Wave_Size_3,Correlation_ID_3,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,TCC_EA0_ATOMIC_LEVEL_sum,TCC_EA0_RDREQ_LEVEL_sum,TCC_EA0_WRREQ_LEVEL_sum,TCC_EA0_WRREQ_STALL_sum,TCP_TCC_CC_ATOMIC_REQ_sum,TCP_TCC_RW_ATOMIC_REQ_sum,TCP_TCC_RW_READ_REQ_sum,TCP_TCC_RW_WRITE_REQ_sum,Wave_Size_4,Correlation_ID_4,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SPI_RA_REQ_NO_ALLOC,SPI_RA_REQ_NO_ALLOC_CSN,CPC_CPC_STAT_STALL,CPC_UTCL1_STALL_ON_TRANSLATION,CPF_CPF_STAT_IDLE,CPF_CPF_TCIU_IDLE,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,TA_BUFFER_TOTAL_CYCLES_sum,TCC_HIT_sum,TCC_MISS_sum,TCC_REQ_sum,TCC_STREAMING_REQ_sum,TCP_TOTAL_ACCESSES_sum,TCP_TOTAL_READ_sum,TCP_TOTAL_WRITE_sum,TCP_VOLATILE_sum,TD_ATOMIC_WAVEFRONT_sum,TD_STORE_WAVEFRONT_sum,Wave_Size_5,Correlation_ID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SQ_INST_CYCLES_SALU,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,CPC_ME1_DC0_SPI_BUSY,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,TCC_BUBBLE_sum,TCC_EA0_RDREQ_32B_sum,TCC_EA0_RDREQ_sum,TCC_EA0_RD_UNCACHED_32B_sum,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,TCP_TCC_READ_REQ_sum,TCP_TCC_WRITE_REQ_sum,Start_Timestamp,End_Timestamp
+0,60633,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) 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diff --git a/tests/workloads/path/MI300X_A1/sysinfo.csv b/tests/workloads/path/MI300X_A1/sysinfo.csv
new file mode 100644
index 0000000000..2830231d3c
--- /dev/null
+++ b/tests/workloads/path/MI300X_A1/sysinfo.csv
@@ -0,0 +1,2 @@
+workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_model,gpu_arch,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,hbm_bw,num_xcd
+path,./tests/vcopy -n 1048576 -b 256 -i 3,SQ|LDS|SQC|TA|TD|TCP|TCC|SPI|CPC|CPF,Wed 29 May 2024 11:59:34 AM  (CDT),2,splinter-126-wr-c6,AMD Ryzen 9 7950X 16-Core Processor,"American Megatrends International, LLC.VS2683299N.FD",Ubuntu 22.04.4 LTS,5.18.2-mi300-build-140423-ubuntu-22.04+,,114656528,,6.2.0-13611,113-MI3SRIOV-001,SPX,NPS1,MI300X_A1,gfx942,32,4096,304,4,32,64,1024,32,2100,1300,2100,1300,128,32,160,4,5324.8,8
diff --git a/tests/workloads/path/MI300X_A1/timestamps.csv b/tests/workloads/path/MI300X_A1/timestamps.csv
new file mode 100644
index 0000000000..c205ef412d
--- /dev/null
+++ b/tests/workloads/path/MI300X_A1/timestamps.csv
@@ -0,0 +1,4 @@
+Dispatch_ID,GPU_ID,Queue_ID,PID,TID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Wave_Size,Kernel_Name,Start_Timestamp,End_Timestamp,Correlation_ID
+1,60633,1,963595,963595,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716165268071613,716165268087773,0
+2,60633,1,963595,963595,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716165268110013,716165268124653,0
+3,60633,1,963595,963595,1048576,256,0,0,4,4,16,64,"vecCopy(double*, double*, double*, int, int) (.kd)",716165268144733,716165268158533,0