From b96feac3b6e3e8f08aa6da00ed16ccc7405ad5a4 Mon Sep 17 00:00:00 2001
From: foreman <dl.constructicon@amd.com>
Date: Mon, 27 Jul 2015 10:49:26 -0400
Subject: [PATCH] P4 to Git Change 1174182 by jatang@jatang-opencl-hsa-stg1 on
 2015/07/27 10:26:56

	ECR #333753 - denorms-are-zero runtime change.

Affected files ...

... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gpudevice.cpp#514 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gpuprogram.cpp#196 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gpusettings.cpp#315 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gpusettings.hpp#92 edit
... //depot/stg/opencl/drivers/opencl/runtime/utils/flags.hpp#236 edit
---
 rocclr/runtime/device/gpu/gpudevice.cpp   |  2 +-
 rocclr/runtime/device/gpu/gpuprogram.cpp  |  3 +++
 rocclr/runtime/device/gpu/gpusettings.cpp | 17 +++++++++++++++++
 rocclr/runtime/device/gpu/gpusettings.hpp |  1 +
 rocclr/runtime/utils/flags.hpp            |  4 ++--
 5 files changed, 24 insertions(+), 3 deletions(-)

diff --git a/rocclr/runtime/device/gpu/gpudevice.cpp b/rocclr/runtime/device/gpu/gpudevice.cpp
index 25d76b6209..1309a11476 100644
--- a/rocclr/runtime/device/gpu/gpudevice.cpp
+++ b/rocclr/runtime/device/gpu/gpudevice.cpp
@@ -267,7 +267,7 @@ void NullDevice::fillDeviceInfo(
     info_.singleFPConfig_       = CL_FP_ROUND_TO_NEAREST | CL_FP_ROUND_TO_ZERO
         | CL_FP_ROUND_TO_INF | CL_FP_INF_NAN | CL_FP_FMA;
 
-    if (GPU_FORCE_SINGLE_FP_DENORM) {
+    if (settings().singleFpDenorm_) {
         info_.singleFPConfig_ |= CL_FP_DENORM;
     }
 
diff --git a/rocclr/runtime/device/gpu/gpuprogram.cpp b/rocclr/runtime/device/gpu/gpuprogram.cpp
index 2ab01aea93..494132e1f2 100644
--- a/rocclr/runtime/device/gpu/gpuprogram.cpp
+++ b/rocclr/runtime/device/gpu/gpuprogram.cpp
@@ -2172,6 +2172,9 @@ HSAILProgram::hsailOptions()
     if (dev().settings().reportFMA_) {
         hsailOptions.append(" -DFP_FAST_FMA=1");
     }
+    if (!dev().settings().singleFpDenorm_) {
+        hsailOptions.append(" -cl-denorms-are-zero");
+    }
 
     // Check if the host is 64 bit or 32 bit
     LP64_ONLY(hsailOptions.append(" -m64"));
diff --git a/rocclr/runtime/device/gpu/gpusettings.cpp b/rocclr/runtime/device/gpu/gpusettings.cpp
index 23fcff59dc..33eae48c99 100644
--- a/rocclr/runtime/device/gpu/gpusettings.cpp
+++ b/rocclr/runtime/device/gpu/gpusettings.cpp
@@ -146,6 +146,9 @@ Settings::Settings()
 
     // Use host queue for device enqueuing by default
     useDeviceQueue_ = GPU_USE_DEVICE_QUEUE;
+
+    // Don't support Denormals for single precision by default
+    singleFpDenorm_ = false;
 }
 
 bool
@@ -251,6 +254,7 @@ Settings::create(
     case CAL_TARGET_BAFFIN:
         // Disable tiling aperture on VI+
         linearPersistentImage_ = true;
+        singleFpDenorm_ = true;
         viPlus_ = true;
         // Fall through to CI ...
     case CAL_TARGET_KALINDI:
@@ -547,6 +551,19 @@ Settings::override()
     if (!flagIsDefault(GPU_RESOURCE_CACHE_SIZE)) {
         resourceCacheSize_ = GPU_RESOURCE_CACHE_SIZE * Mi;
     }
+
+    if (!flagIsDefault(AMD_GPU_FORCE_SINGLE_FP_DENORM)) {
+        switch (AMD_GPU_FORCE_SINGLE_FP_DENORM) {
+        case 0:
+            singleFpDenorm_ = false;
+            break;
+        case 1:
+            singleFpDenorm_ = true;
+            break;
+        default:
+            break;
+        }
+    }
 }
 
 } // namespace gpu
diff --git a/rocclr/runtime/device/gpu/gpusettings.hpp b/rocclr/runtime/device/gpu/gpusettings.hpp
index 5799bfd83e..fef5a60117 100644
--- a/rocclr/runtime/device/gpu/gpusettings.hpp
+++ b/rocclr/runtime/device/gpu/gpusettings.hpp
@@ -74,6 +74,7 @@ public:
             uint    asyncMemCopy_: 1;   //!< Use async memory transfers
             uint    hsailDirectSRD_: 1; //!< Controls direct SRD for HSAIL
             uint    useDeviceQueue_: 1; //!< Submit to separate device queue
+            uint    singleFpDenorm_: 1; //!< Support Single FP Denorm
         };
         uint    value_;
     };
diff --git a/rocclr/runtime/utils/flags.hpp b/rocclr/runtime/utils/flags.hpp
index a8c53544b5..1155295cae 100644
--- a/rocclr/runtime/utils/flags.hpp
+++ b/rocclr/runtime/utils/flags.hpp
@@ -170,8 +170,8 @@ release(bool, GPU_IFH_MODE, false,                                            \
         "1 = Enable GPU IFH (infinitely fast hardware) mode. Any other value keeps setting disabled.") \
 release(bool, GPU_MIPMAP, !IS_MAINLINE,                                       \
         "Enables GPU mipmap extension")                                       \
-debug(bool, GPU_FORCE_SINGLE_FP_DENORM, false,                                \
-        "Forces reporting CL_FP_DENORM bit for single precision")             \
+release(int, AMD_GPU_FORCE_SINGLE_FP_DENORM, -1,                              \
+        "Force denorm for single precision: -1 - don't force, 0 - disable, 1 - enable")                \
 debug(bool, OCL_FORCE_CPU_SVM, false,                                         \
         "force svm support for CPU")                                          \
 debug(bool, GPU_ENABLE_HW_DEBUG, false,                                       \