From b9cead955fdfca93aa6f30e18399775424b35a87 Mon Sep 17 00:00:00 2001 From: Lancelot SIX Date: Wed, 22 May 2024 14:53:09 +0100 Subject: [PATCH] trap_handler_gfx12: fix-math-excp-size The current trap handler defined: .set SQ_WAVE_EXCP_FLAG_USER_MATH_EXCP_SHIFT , 0 .set SQ_WAVE_EXCP_FLAG_USER_MATH_EXCP_SIZE , 6 .set SQ_WAVE_TRAP_CTRL_MATH_EXCP_SHIFT , 0 .set SQ_WAVE_TRAP_CTRL_MATH_EXCP_SIZE , 6 However, the ALU exception in EXCP_FLAG_USER go from bit 0 (alu_invalid) to bit 6 (alu_int_div0), making it a total of 7 bits, not 6. Similarly, the corresponding bits in TRAP_CTRL go from bit 0 to 6 as well. Fix the incorrect size to be sure to properly detect the int_div0 exception. Change-Id: I60c2d94a447b71ca0ce26a87b7f55b055b9aef8e Signed-off-by: Chris Freehill [ROCm/ROCR-Runtime commit: cb8705627fb5e4a46432e3051f844810e019a1ff] --- .../core/runtime/trap_handler/trap_handler_gfx12.s | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/trap_handler/trap_handler_gfx12.s b/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/trap_handler/trap_handler_gfx12.s index 2289c57d7d..370cd2af28 100644 --- a/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/trap_handler/trap_handler_gfx12.s +++ b/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/trap_handler/trap_handler_gfx12.s @@ -54,9 +54,9 @@ .set SQ_WAVE_EXCP_FLAG_PRIV_ILLEGAL_INST_SHIFT , 6 .set SQ_WAVE_EXCP_FLAG_PRIV_XNACK_ERROR_SHIFT , 8 .set SQ_WAVE_EXCP_FLAG_USER_MATH_EXCP_SHIFT , 0 -.set SQ_WAVE_EXCP_FLAG_USER_MATH_EXCP_SIZE , 6 +.set SQ_WAVE_EXCP_FLAG_USER_MATH_EXCP_SIZE , 7 .set SQ_WAVE_TRAP_CTRL_MATH_EXCP_SHIFT , 0 -.set SQ_WAVE_TRAP_CTRL_MATH_EXCP_SIZE , 6 +.set SQ_WAVE_TRAP_CTRL_MATH_EXCP_SIZE , 7 .set SQ_WAVE_PC_HI_ADDRESS_MASK , 0xFFFF .set SQ_WAVE_PC_HI_TRAP_ID_BFE , (SQ_WAVE_PC_HI_TRAP_ID_SHIFT | (SQ_WAVE_PC_HI_TRAP_ID_SIZE << 16)) .set SQ_WAVE_PC_HI_TRAP_ID_SHIFT , 28