Put cached perfetto traces as default one (#2138)

* Put cached perfetto traces as default one

* Improve cached data and perfetto traces in order to be more aligned with E2E tests

* Addressing PR comments and findings

* Force early instrumentation bundle instantiation

* Sync-up insturumented containers with thread growth data

* Revert ompvv number of host threads to default 8

* Fixed counter track namings for amd-smi

* AIPROFSYST-34 [rocprof-sys] Update documentation describing newly introduced changes to default tracing mechanism
This commit is contained in:
marantic-amd authored and GitHub committed 2025-12-22 12:47:35 +01:00
1 bovenliggende 7da3275b42
commit ba1380a75d
36 files changed
+557 -183

No files matched your search

@@ -243,6 +243,7 @@ post_process(tim::manager* _timemory_manager, bool& _perfetto_output_error)
#endif
auto _filename = config::get_perfetto_output_filename();
if(!trace_data.empty())
{
operation::file_output_message<tim::project::rocprofsys> _fom{};