From ba4a3cd9f4daa79935f0aa0bdf1bbc393d09d277 Mon Sep 17 00:00:00 2001 From: German Date: Mon, 8 Jan 2024 13:25:50 -0500 Subject: [PATCH] SWDEV-439241 - Keep direct map for MGPU Single OCL context with multiple devices should use direct map even with persistent memory, because cache coherency layer. Change-Id: I02a48830440203a1dea176acd4dff4452b70f133 [ROCm/clr commit: 49037b976298a4238fe31bd178483ffc09010319] --- projects/clr/rocclr/device/pal/palmemory.hpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/projects/clr/rocclr/device/pal/palmemory.hpp b/projects/clr/rocclr/device/pal/palmemory.hpp index 3824769a5d..4b5fea0852 100644 --- a/projects/clr/rocclr/device/pal/palmemory.hpp +++ b/projects/clr/rocclr/device/pal/palmemory.hpp @@ -158,7 +158,8 @@ class Memory : public device::Memory, public Resource { //! forced USWC memory on APU and will cause a switch to //! indirect map for allocations with a possibility of host read bool isDirectMap() { - return (isCacheable() || (!isHostMemDirectAccess() && !IsPersistent()) || + return (isCacheable() || (!isHostMemDirectAccess() && + (!IsPersistent() || (owner()->getContext().devices().size() > 1))) || (owner()->getMemFlags() & (CL_MEM_ALLOC_HOST_PTR | CL_MEM_HOST_WRITE_ONLY | CL_MEM_READ_ONLY))); }