Update documentation (#53)
- updated info about OMNITRACE_USE_MPI - removed wiki links - info about metadata.json - update HW counters and fix typos - fix update-docs.sh
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Jonathan R. Madsen
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@@ -227,120 +227,401 @@ $ omnitrace-avail -C -bd
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```console
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$ omnitrace-avail -H -bd
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|---------------------|-------------------------------------------------|
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| HARDWARE COUNTER | DESCRIPTION |
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|---------------------|-------------------------------------------------|
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| CPU | |
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|---------------------|-------------------------------------------------|
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| PAPI_L1_DCM | Level 1 data cache misses |
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| PAPI_L1_ICM | Level 1 instruction cache misses |
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| PAPI_L2_DCM | Level 2 data cache misses |
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| PAPI_L2_ICM | Level 2 instruction cache misses |
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| PAPI_L3_DCM | Level 3 data cache misses |
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| PAPI_L3_ICM | Level 3 instruction cache misses |
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| PAPI_L1_TCM | Level 1 cache misses |
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| PAPI_L2_TCM | Level 2 cache misses |
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| PAPI_L3_TCM | Level 3 cache misses |
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| PAPI_CA_SNP | Requests for a snoop |
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| PAPI_CA_SHR | Requests for exclusive access to shared cach... |
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| PAPI_CA_CLN | Requests for exclusive access to clean cache... |
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| PAPI_CA_INV | Requests for cache line invalidation |
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| PAPI_CA_ITV | Requests for cache line intervention |
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| PAPI_L3_LDM | Level 3 load misses |
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| PAPI_L3_STM | Level 3 store misses |
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| PAPI_BRU_IDL | Cycles branch units are idle |
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| PAPI_FXU_IDL | Cycles integer units are idle |
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| PAPI_FPU_IDL | Cycles floating point units are idle |
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| PAPI_LSU_IDL | Cycles load/store units are idle |
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| PAPI_TLB_DM | Data translation lookaside buffer misses |
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| PAPI_TLB_IM | Instruction translation lookaside buffer misses |
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| PAPI_TLB_TL | Total translation lookaside buffer misses |
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| PAPI_L1_LDM | Level 1 load misses |
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| PAPI_L1_STM | Level 1 store misses |
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| PAPI_L2_LDM | Level 2 load misses |
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| PAPI_L2_STM | Level 2 store misses |
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| PAPI_BTAC_M | Branch target address cache misses |
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| PAPI_PRF_DM | Data prefetch cache misses |
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| PAPI_L3_DCH | Level 3 data cache hits |
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| PAPI_TLB_SD | Translation lookaside buffer shootdowns |
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| PAPI_CSR_FAL | Failed store conditional instructions |
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| PAPI_CSR_SUC | Successful store conditional instructions |
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| PAPI_CSR_TOT | Total store conditional instructions |
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| PAPI_MEM_SCY | Cycles Stalled Waiting for memory accesses |
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| PAPI_MEM_RCY | Cycles Stalled Waiting for memory reads |
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| PAPI_MEM_WCY | Cycles Stalled Waiting for memory writes |
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| PAPI_STL_ICY | Cycles with no instruction issue |
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| PAPI_FUL_ICY | Cycles with maximum instruction issue |
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| PAPI_STL_CCY | Cycles with no instructions completed |
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| PAPI_FUL_CCY | Cycles with maximum instructions completed |
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| PAPI_HW_INT | Hardware interrupts |
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| PAPI_BR_UCN | Unconditional branch instructions |
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| PAPI_BR_CN | Conditional branch instructions |
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| PAPI_BR_TKN | Conditional branch instructions taken |
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| PAPI_BR_NTK | Conditional branch instructions not taken |
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| PAPI_BR_MSP | Conditional branch instructions mispredicted |
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| PAPI_BR_PRC | Conditional branch instructions correctly pr... |
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| PAPI_FMA_INS | FMA instructions completed |
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| PAPI_TOT_IIS | Instructions issued |
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| PAPI_TOT_INS | Instructions completed |
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| PAPI_INT_INS | Integer instructions |
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| PAPI_FP_INS | Floating point instructions |
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| PAPI_LD_INS | Load instructions |
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| PAPI_SR_INS | Store instructions |
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| PAPI_BR_INS | Branch instructions |
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| PAPI_VEC_INS | Vector/SIMD instructions (could include inte... |
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| PAPI_RES_STL | Cycles stalled on any resource |
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| PAPI_FP_STAL | Cycles the FP unit(s) are stalled |
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| PAPI_TOT_CYC | Total cycles |
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| PAPI_LST_INS | Load/store instructions completed |
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| PAPI_SYC_INS | Synchronization instructions completed |
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| PAPI_L1_DCH | Level 1 data cache hits |
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| PAPI_L2_DCH | Level 2 data cache hits |
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| PAPI_L1_DCA | Level 1 data cache accesses |
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| PAPI_L2_DCA | Level 2 data cache accesses |
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| PAPI_L3_DCA | Level 3 data cache accesses |
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| PAPI_L1_DCR | Level 1 data cache reads |
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| PAPI_L2_DCR | Level 2 data cache reads |
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| PAPI_L3_DCR | Level 3 data cache reads |
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| PAPI_L1_DCW | Level 1 data cache writes |
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| PAPI_L2_DCW | Level 2 data cache writes |
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| PAPI_L3_DCW | Level 3 data cache writes |
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| PAPI_L1_ICH | Level 1 instruction cache hits |
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| PAPI_L2_ICH | Level 2 instruction cache hits |
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| PAPI_L3_ICH | Level 3 instruction cache hits |
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| PAPI_L1_ICA | Level 1 instruction cache accesses |
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| PAPI_L2_ICA | Level 2 instruction cache accesses |
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| PAPI_L3_ICA | Level 3 instruction cache accesses |
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| PAPI_L1_ICR | Level 1 instruction cache reads |
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| PAPI_L2_ICR | Level 2 instruction cache reads |
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| PAPI_L3_ICR | Level 3 instruction cache reads |
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| PAPI_L1_ICW | Level 1 instruction cache writes |
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| PAPI_L2_ICW | Level 2 instruction cache writes |
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| PAPI_L3_ICW | Level 3 instruction cache writes |
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| PAPI_L1_TCH | Level 1 total cache hits |
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| PAPI_L2_TCH | Level 2 total cache hits |
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| PAPI_L3_TCH | Level 3 total cache hits |
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| PAPI_L1_TCA | Level 1 total cache accesses |
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| PAPI_L2_TCA | Level 2 total cache accesses |
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| PAPI_L3_TCA | Level 3 total cache accesses |
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| PAPI_L1_TCR | Level 1 total cache reads |
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| PAPI_L2_TCR | Level 2 total cache reads |
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| PAPI_L3_TCR | Level 3 total cache reads |
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| PAPI_L1_TCW | Level 1 total cache writes |
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| PAPI_L2_TCW | Level 2 total cache writes |
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| PAPI_L3_TCW | Level 3 total cache writes |
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| PAPI_FML_INS | Floating point multiply instructions |
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| PAPI_FAD_INS | Floating point add instructions |
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| PAPI_FDV_INS | Floating point divide instructions |
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| PAPI_FSQ_INS | Floating point square root instructions |
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| PAPI_FNV_INS | Floating point inverse instructions |
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| PAPI_FP_OPS | Floating point operations |
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| PAPI_SP_OPS | Floating point operations; optimized to coun... |
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| PAPI_DP_OPS | Floating point operations; optimized to coun... |
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| PAPI_VEC_SP | Single precision vector/SIMD instructions |
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| PAPI_VEC_DP | Double precision vector/SIMD instructions |
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| PAPI_REF_CYC | Reference clock cycles |
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|---------------------|-------------------------------------------------|
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|---------------------------------------|---------------------------------------|
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| HARDWARE COUNTER | DESCRIPTION |
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|---------------------------------------|---------------------------------------|
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| CPU | |
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|---------------------------------------|---------------------------------------|
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| PAPI_L1_DCM | Level 1 data cache misses |
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| PAPI_L1_ICM | Level 1 instruction cache misses |
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| PAPI_L2_DCM | Level 2 data cache misses |
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| PAPI_L2_ICM | Level 2 instruction cache misses |
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| PAPI_L3_DCM | Level 3 data cache misses |
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| PAPI_L3_ICM | Level 3 instruction cache misses |
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| PAPI_L1_TCM | Level 1 cache misses |
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| PAPI_L2_TCM | Level 2 cache misses |
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| PAPI_L3_TCM | Level 3 cache misses |
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| PAPI_CA_SNP | Requests for a snoop |
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| PAPI_CA_SHR | Requests for exclusive access to s... |
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| PAPI_CA_CLN | Requests for exclusive access to c... |
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| PAPI_CA_INV | Requests for cache line invalidation |
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| PAPI_CA_ITV | Requests for cache line intervention |
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| PAPI_L3_LDM | Level 3 load misses |
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| PAPI_L3_STM | Level 3 store misses |
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| PAPI_BRU_IDL | Cycles branch units are idle |
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| PAPI_FXU_IDL | Cycles integer units are idle |
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| PAPI_FPU_IDL | Cycles floating point units are idle |
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| PAPI_LSU_IDL | Cycles load/store units are idle |
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| PAPI_TLB_DM | Data translation lookaside buffer ... |
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| PAPI_TLB_IM | Instruction translation lookaside ... |
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| PAPI_TLB_TL | Total translation lookaside buffer... |
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| PAPI_L1_LDM | Level 1 load misses |
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| PAPI_L1_STM | Level 1 store misses |
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| PAPI_L2_LDM | Level 2 load misses |
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| PAPI_L2_STM | Level 2 store misses |
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| PAPI_BTAC_M | Branch target address cache misses |
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| PAPI_PRF_DM | Data prefetch cache misses |
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| PAPI_L3_DCH | Level 3 data cache hits |
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| PAPI_TLB_SD | Translation lookaside buffer shoot... |
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| PAPI_CSR_FAL | Failed store conditional instructions |
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| PAPI_CSR_SUC | Successful store conditional instr... |
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| PAPI_CSR_TOT | Total store conditional instructions |
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| PAPI_MEM_SCY | Cycles Stalled Waiting for memory ... |
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| PAPI_MEM_RCY | Cycles Stalled Waiting for memory ... |
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| PAPI_MEM_WCY | Cycles Stalled Waiting for memory ... |
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| PAPI_STL_ICY | Cycles with no instruction issue |
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| PAPI_FUL_ICY | Cycles with maximum instruction issue |
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| PAPI_STL_CCY | Cycles with no instructions completed |
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| PAPI_FUL_CCY | Cycles with maximum instructions c... |
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| PAPI_HW_INT | Hardware interrupts |
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| PAPI_BR_UCN | Unconditional branch instructions |
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| PAPI_BR_CN | Conditional branch instructions |
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| PAPI_BR_TKN | Conditional branch instructions taken |
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| PAPI_BR_NTK | Conditional branch instructions no... |
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| PAPI_BR_MSP | Conditional branch instructions mi... |
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| PAPI_BR_PRC | Conditional branch instructions co... |
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| PAPI_FMA_INS | FMA instructions completed |
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| PAPI_TOT_IIS | Instructions issued |
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| PAPI_TOT_INS | Instructions completed |
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| PAPI_INT_INS | Integer instructions |
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| PAPI_FP_INS | Floating point instructions |
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| PAPI_LD_INS | Load instructions |
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| PAPI_SR_INS | Store instructions |
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| PAPI_BR_INS | Branch instructions |
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| PAPI_VEC_INS | Vector/SIMD instructions (could in... |
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| PAPI_RES_STL | Cycles stalled on any resource |
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| PAPI_FP_STAL | Cycles the FP unit(s) are stalled |
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| PAPI_TOT_CYC | Total cycles |
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| PAPI_LST_INS | Load/store instructions completed |
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| PAPI_SYC_INS | Synchronization instructions compl... |
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| PAPI_L1_DCH | Level 1 data cache hits |
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| PAPI_L2_DCH | Level 2 data cache hits |
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| PAPI_L1_DCA | Level 1 data cache accesses |
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| PAPI_L2_DCA | Level 2 data cache accesses |
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| PAPI_L3_DCA | Level 3 data cache accesses |
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| PAPI_L1_DCR | Level 1 data cache reads |
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| PAPI_L2_DCR | Level 2 data cache reads |
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| PAPI_L3_DCR | Level 3 data cache reads |
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| PAPI_L1_DCW | Level 1 data cache writes |
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| PAPI_L2_DCW | Level 2 data cache writes |
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| PAPI_L3_DCW | Level 3 data cache writes |
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| PAPI_L1_ICH | Level 1 instruction cache hits |
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| PAPI_L2_ICH | Level 2 instruction cache hits |
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| PAPI_L3_ICH | Level 3 instruction cache hits |
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| PAPI_L1_ICA | Level 1 instruction cache accesses |
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| PAPI_L2_ICA | Level 2 instruction cache accesses |
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| PAPI_L3_ICA | Level 3 instruction cache accesses |
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| PAPI_L1_ICR | Level 1 instruction cache reads |
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| PAPI_L2_ICR | Level 2 instruction cache reads |
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| PAPI_L3_ICR | Level 3 instruction cache reads |
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| PAPI_L1_ICW | Level 1 instruction cache writes |
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| PAPI_L2_ICW | Level 2 instruction cache writes |
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| PAPI_L3_ICW | Level 3 instruction cache writes |
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| PAPI_L1_TCH | Level 1 total cache hits |
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| PAPI_L2_TCH | Level 2 total cache hits |
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| PAPI_L3_TCH | Level 3 total cache hits |
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| PAPI_L1_TCA | Level 1 total cache accesses |
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| PAPI_L2_TCA | Level 2 total cache accesses |
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| PAPI_L3_TCA | Level 3 total cache accesses |
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| PAPI_L1_TCR | Level 1 total cache reads |
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| PAPI_L2_TCR | Level 2 total cache reads |
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| PAPI_L3_TCR | Level 3 total cache reads |
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| PAPI_L1_TCW | Level 1 total cache writes |
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| PAPI_L2_TCW | Level 2 total cache writes |
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| PAPI_L3_TCW | Level 3 total cache writes |
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| PAPI_FML_INS | Floating point multiply instructions |
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| PAPI_FAD_INS | Floating point add instructions |
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| PAPI_FDV_INS | Floating point divide instructions |
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| PAPI_FSQ_INS | Floating point square root instruc... |
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| PAPI_FNV_INS | Floating point inverse instructions |
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| PAPI_FP_OPS | Floating point operations |
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| PAPI_SP_OPS | Floating point operations; optimiz... |
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| PAPI_DP_OPS | Floating point operations; optimiz... |
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| PAPI_VEC_SP | Single precision vector/SIMD instr... |
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| PAPI_VEC_DP | Double precision vector/SIMD instr... |
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| PAPI_REF_CYC | Reference clock cycles |
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| perf::PERF_COUNT_HW_CPU_CYCLES | PERF_COUNT_HW_CPU_CYCLES |
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| perf::PERF_COUNT_HW_CPU_CYCLES:u=0 | perf::PERF_COUNT_HW_CPU_CYCLES + m... |
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| perf::PERF_COUNT_HW_CPU_CYCLES:k=0 | perf::PERF_COUNT_HW_CPU_CYCLES + m... |
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| perf::PERF_COUNT_HW_CPU_CYCLES:h=0 | perf::PERF_COUNT_HW_CPU_CYCLES + m... |
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| perf::PERF_COUNT_HW_CPU_CYCLES:per... | perf::PERF_COUNT_HW_CPU_CYCLES + s... |
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| perf::PERF_COUNT_HW_CPU_CYCLES:freq=0 | perf::PERF_COUNT_HW_CPU_CYCLES + s... |
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| perf::PERF_COUNT_HW_CPU_CYCLES:pre... | perf::PERF_COUNT_HW_CPU_CYCLES + p... |
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| perf::PERF_COUNT_HW_CPU_CYCLES:excl=0 | perf::PERF_COUNT_HW_CPU_CYCLES + e... |
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| perf::PERF_COUNT_HW_CPU_CYCLES:mg=0 | perf::PERF_COUNT_HW_CPU_CYCLES + m... |
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| perf::PERF_COUNT_HW_CPU_CYCLES:mh=0 | perf::PERF_COUNT_HW_CPU_CYCLES + m... |
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| perf::PERF_COUNT_HW_CPU_CYCLES:cpu=0 | perf::PERF_COUNT_HW_CPU_CYCLES + C... |
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| perf::PERF_COUNT_HW_CPU_CYCLES:pin... | perf::PERF_COUNT_HW_CPU_CYCLES + p... |
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| perf::CYCLES | PERF_COUNT_HW_CPU_CYCLES |
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| perf::CYCLES:u=0 | perf::CYCLES + monitor at user level |
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| perf::CYCLES:k=0 | perf::CYCLES + monitor at kernel l... |
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| perf::CYCLES:h=0 | perf::CYCLES + monitor at hypervis... |
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| perf::CYCLES:period=0 | perf::CYCLES + sampling period |
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| perf::CYCLES:freq=0 | perf::CYCLES + sampling frequency ... |
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| perf::CYCLES:precise=0 | perf::CYCLES + precise event sampling |
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| perf::CYCLES:excl=0 | perf::CYCLES + exclusive access |
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| perf::CYCLES:mg=0 | perf::CYCLES + monitor guest execu... |
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| perf::CYCLES:mh=0 | perf::CYCLES + monitor host execution |
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| perf::CYCLES:cpu=0 | perf::CYCLES + CPU to program |
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| perf::CYCLES:pinned=0 | perf::CYCLES + pin event to counters |
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| perf::CPU-CYCLES | PERF_COUNT_HW_CPU_CYCLES |
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| perf::CPU-CYCLES:u=0 | perf::CPU-CYCLES + monitor at user... |
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| perf::CPU-CYCLES:k=0 | perf::CPU-CYCLES + monitor at kern... |
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| perf::CPU-CYCLES:h=0 | perf::CPU-CYCLES + monitor at hype... |
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| perf::CPU-CYCLES:period=0 | perf::CPU-CYCLES + sampling period |
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| perf::CPU-CYCLES:freq=0 | perf::CPU-CYCLES + sampling freque... |
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| perf::CPU-CYCLES:precise=0 | perf::CPU-CYCLES + precise event s... |
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| perf::CPU-CYCLES:excl=0 | perf::CPU-CYCLES + exclusive access |
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| perf::CPU-CYCLES:mg=0 | perf::CPU-CYCLES + monitor guest e... |
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| perf::CPU-CYCLES:mh=0 | perf::CPU-CYCLES + monitor host ex... |
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| perf::CPU-CYCLES:cpu=0 | perf::CPU-CYCLES + CPU to program |
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| perf::CPU-CYCLES:pinned=0 | perf::CPU-CYCLES + pin event to co... |
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| perf::PERF_COUNT_HW_INSTRUCTIONS | PERF_COUNT_HW_INSTRUCTIONS |
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| perf::PERF_COUNT_HW_INSTRUCTIONS:u=0 | perf::PERF_COUNT_HW_INSTRUCTIONS +... |
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| perf::PERF_COUNT_HW_INSTRUCTIONS:k=0 | perf::PERF_COUNT_HW_INSTRUCTIONS +... |
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| perf::PERF_COUNT_HW_INSTRUCTIONS:h=0 | perf::PERF_COUNT_HW_INSTRUCTIONS +... |
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| perf::PERF_COUNT_HW_INSTRUCTIONS:p... | perf::PERF_COUNT_HW_INSTRUCTIONS +... |
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| perf::PERF_COUNT_HW_INSTRUCTIONS:f... | perf::PERF_COUNT_HW_INSTRUCTIONS +... |
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| perf::PERF_COUNT_HW_INSTRUCTIONS:p... | perf::PERF_COUNT_HW_INSTRUCTIONS +... |
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| perf::PERF_COUNT_HW_INSTRUCTIONS:e... | perf::PERF_COUNT_HW_INSTRUCTIONS +... |
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| perf::PERF_COUNT_HW_INSTRUCTIONS:mg=0 | perf::PERF_COUNT_HW_INSTRUCTIONS +... |
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| perf::PERF_COUNT_HW_INSTRUCTIONS:mh=0 | perf::PERF_COUNT_HW_INSTRUCTIONS +... |
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| perf::PERF_COUNT_HW_INSTRUCTIONS:c... | perf::PERF_COUNT_HW_INSTRUCTIONS +... |
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| perf::PERF_COUNT_HW_INSTRUCTIONS:p... | perf::PERF_COUNT_HW_INSTRUCTIONS +... |
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| ... etc. ... | |
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| perf_raw::r0000 | perf_events raw event syntax: r[0-... |
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| perf_raw::r0000:u=0 | perf_raw::r0000 + monitor at user ... |
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| perf_raw::r0000:k=0 | perf_raw::r0000 + monitor at kerne... |
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| perf_raw::r0000:h=0 | perf_raw::r0000 + monitor at hyper... |
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| perf_raw::r0000:period=0 | perf_raw::r0000 + sampling period |
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| perf_raw::r0000:freq=0 | perf_raw::r0000 + sampling frequen... |
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| perf_raw::r0000:precise=0 | perf_raw::r0000 + precise event sa... |
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| perf_raw::r0000:excl=0 | perf_raw::r0000 + exclusive access |
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| perf_raw::r0000:mg=0 | perf_raw::r0000 + monitor guest ex... |
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| perf_raw::r0000:mh=0 | perf_raw::r0000 + monitor host exe... |
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| perf_raw::r0000:cpu=0 | perf_raw::r0000 + CPU to program |
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| perf_raw::r0000:pinned=0 | perf_raw::r0000 + pin event to cou... |
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| perf_raw::r0000:hw_smpl=0 | perf_raw::r0000 + enable hardware ... |
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| L1_ITLB_MISS_L2_ITLB_HIT | Number of instruction fetches that... |
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| L1_ITLB_MISS_L2_ITLB_HIT:e=0 | L1_ITLB_MISS_L2_ITLB_HIT + edge level |
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| L1_ITLB_MISS_L2_ITLB_HIT:i=0 | L1_ITLB_MISS_L2_ITLB_HIT + invert |
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| L1_ITLB_MISS_L2_ITLB_HIT:c=0 | L1_ITLB_MISS_L2_ITLB_HIT + counter... |
|
||||
| L1_ITLB_MISS_L2_ITLB_HIT:g=0 | L1_ITLB_MISS_L2_ITLB_HIT + measure... |
|
||||
| L1_ITLB_MISS_L2_ITLB_HIT:u=0 | L1_ITLB_MISS_L2_ITLB_HIT + monitor... |
|
||||
| L1_ITLB_MISS_L2_ITLB_HIT:k=0 | L1_ITLB_MISS_L2_ITLB_HIT + monitor... |
|
||||
| L1_ITLB_MISS_L2_ITLB_HIT:period=0 | L1_ITLB_MISS_L2_ITLB_HIT + samplin... |
|
||||
| L1_ITLB_MISS_L2_ITLB_HIT:freq=0 | L1_ITLB_MISS_L2_ITLB_HIT + samplin... |
|
||||
| L1_ITLB_MISS_L2_ITLB_HIT:excl=0 | L1_ITLB_MISS_L2_ITLB_HIT + exclusi... |
|
||||
| L1_ITLB_MISS_L2_ITLB_HIT:mg=0 | L1_ITLB_MISS_L2_ITLB_HIT + monitor... |
|
||||
| L1_ITLB_MISS_L2_ITLB_HIT:mh=0 | L1_ITLB_MISS_L2_ITLB_HIT + monitor... |
|
||||
| L1_ITLB_MISS_L2_ITLB_HIT:cpu=0 | L1_ITLB_MISS_L2_ITLB_HIT + CPU to ... |
|
||||
| L1_ITLB_MISS_L2_ITLB_HIT:pinned=0 | L1_ITLB_MISS_L2_ITLB_HIT + pin eve... |
|
||||
| L1_ITLB_MISS_L2_ITLB_MISS | Number of instruction fetches that... |
|
||||
| L1_ITLB_MISS_L2_ITLB_MISS:IF1G | L1_ITLB_MISS_L2_ITLB_MISS + Number... |
|
||||
| L1_ITLB_MISS_L2_ITLB_MISS:IF2M | L1_ITLB_MISS_L2_ITLB_MISS + Number... |
|
||||
| L1_ITLB_MISS_L2_ITLB_MISS:IF4K | L1_ITLB_MISS_L2_ITLB_MISS + Number... |
|
||||
| L1_ITLB_MISS_L2_ITLB_MISS:e=0 | L1_ITLB_MISS_L2_ITLB_MISS + edge l... |
|
||||
| L1_ITLB_MISS_L2_ITLB_MISS:i=0 | L1_ITLB_MISS_L2_ITLB_MISS + invert |
|
||||
| L1_ITLB_MISS_L2_ITLB_MISS:c=0 | L1_ITLB_MISS_L2_ITLB_MISS + counte... |
|
||||
| L1_ITLB_MISS_L2_ITLB_MISS:g=0 | L1_ITLB_MISS_L2_ITLB_MISS + measur... |
|
||||
| L1_ITLB_MISS_L2_ITLB_MISS:u=0 | L1_ITLB_MISS_L2_ITLB_MISS + monito... |
|
||||
| L1_ITLB_MISS_L2_ITLB_MISS:k=0 | L1_ITLB_MISS_L2_ITLB_MISS + monito... |
|
||||
| L1_ITLB_MISS_L2_ITLB_MISS:period=0 | L1_ITLB_MISS_L2_ITLB_MISS + sampli... |
|
||||
| L1_ITLB_MISS_L2_ITLB_MISS:freq=0 | L1_ITLB_MISS_L2_ITLB_MISS + sampli... |
|
||||
| L1_ITLB_MISS_L2_ITLB_MISS:excl=0 | L1_ITLB_MISS_L2_ITLB_MISS + exclus... |
|
||||
| L1_ITLB_MISS_L2_ITLB_MISS:mg=0 | L1_ITLB_MISS_L2_ITLB_MISS + monito... |
|
||||
| L1_ITLB_MISS_L2_ITLB_MISS:mh=0 | L1_ITLB_MISS_L2_ITLB_MISS + monito... |
|
||||
| L1_ITLB_MISS_L2_ITLB_MISS:cpu=0 | L1_ITLB_MISS_L2_ITLB_MISS + CPU to... |
|
||||
| L1_ITLB_MISS_L2_ITLB_MISS:pinned=0 | L1_ITLB_MISS_L2_ITLB_MISS + pin ev... |
|
||||
| RETIRED_SSE_AVX_FLOPS | This is a retire-based event. The ... |
|
||||
| RETIRED_SSE_AVX_FLOPS:ADD_SUB_FLOPS | RETIRED_SSE_AVX_FLOPS + Addition/s... |
|
||||
| RETIRED_SSE_AVX_FLOPS:MULT_FLOPS | RETIRED_SSE_AVX_FLOPS + Multiplica... |
|
||||
| RETIRED_SSE_AVX_FLOPS:DIV_FLOPS | RETIRED_SSE_AVX_FLOPS + Division F... |
|
||||
| RETIRED_SSE_AVX_FLOPS:MAC_FLOPS | RETIRED_SSE_AVX_FLOPS + Double pre... |
|
||||
| RETIRED_SSE_AVX_FLOPS:ANY | RETIRED_SSE_AVX_FLOPS + Double pre... |
|
||||
| RETIRED_SSE_AVX_FLOPS:e=0 | RETIRED_SSE_AVX_FLOPS + edge level |
|
||||
| RETIRED_SSE_AVX_FLOPS:i=0 | RETIRED_SSE_AVX_FLOPS + invert |
|
||||
| RETIRED_SSE_AVX_FLOPS:c=0 | RETIRED_SSE_AVX_FLOPS + counter-ma... |
|
||||
| RETIRED_SSE_AVX_FLOPS:g=0 | RETIRED_SSE_AVX_FLOPS + measure in... |
|
||||
| RETIRED_SSE_AVX_FLOPS:u=0 | RETIRED_SSE_AVX_FLOPS + monitor at... |
|
||||
| RETIRED_SSE_AVX_FLOPS:k=0 | RETIRED_SSE_AVX_FLOPS + monitor at... |
|
||||
| RETIRED_SSE_AVX_FLOPS:period=0 | RETIRED_SSE_AVX_FLOPS + sampling p... |
|
||||
| RETIRED_SSE_AVX_FLOPS:freq=0 | RETIRED_SSE_AVX_FLOPS + sampling f... |
|
||||
| RETIRED_SSE_AVX_FLOPS:excl=0 | RETIRED_SSE_AVX_FLOPS + exclusive ... |
|
||||
| RETIRED_SSE_AVX_FLOPS:mg=0 | RETIRED_SSE_AVX_FLOPS + monitor gu... |
|
||||
| RETIRED_SSE_AVX_FLOPS:mh=0 | RETIRED_SSE_AVX_FLOPS + monitor ho... |
|
||||
| RETIRED_SSE_AVX_FLOPS:cpu=0 | RETIRED_SSE_AVX_FLOPS + CPU to pro... |
|
||||
| RETIRED_SSE_AVX_FLOPS:pinned=0 | RETIRED_SSE_AVX_FLOPS + pin event ... |
|
||||
| DIV_CYCLES_BUSY_COUNT | Number of cycles when the divider ... |
|
||||
| DIV_CYCLES_BUSY_COUNT:e=0 | DIV_CYCLES_BUSY_COUNT + edge level |
|
||||
| DIV_CYCLES_BUSY_COUNT:i=0 | DIV_CYCLES_BUSY_COUNT + invert |
|
||||
| DIV_CYCLES_BUSY_COUNT:c=0 | DIV_CYCLES_BUSY_COUNT + counter-ma... |
|
||||
| DIV_CYCLES_BUSY_COUNT:g=0 | DIV_CYCLES_BUSY_COUNT + measure in... |
|
||||
| DIV_CYCLES_BUSY_COUNT:u=0 | DIV_CYCLES_BUSY_COUNT + monitor at... |
|
||||
| DIV_CYCLES_BUSY_COUNT:k=0 | DIV_CYCLES_BUSY_COUNT + monitor at... |
|
||||
| DIV_CYCLES_BUSY_COUNT:period=0 | DIV_CYCLES_BUSY_COUNT + sampling p... |
|
||||
| DIV_CYCLES_BUSY_COUNT:freq=0 | DIV_CYCLES_BUSY_COUNT + sampling f... |
|
||||
| DIV_CYCLES_BUSY_COUNT:excl=0 | DIV_CYCLES_BUSY_COUNT + exclusive ... |
|
||||
| DIV_CYCLES_BUSY_COUNT:mg=0 | DIV_CYCLES_BUSY_COUNT + monitor gu... |
|
||||
| DIV_CYCLES_BUSY_COUNT:mh=0 | DIV_CYCLES_BUSY_COUNT + monitor ho... |
|
||||
| DIV_CYCLES_BUSY_COUNT:cpu=0 | DIV_CYCLES_BUSY_COUNT + CPU to pro... |
|
||||
| DIV_CYCLES_BUSY_COUNT:pinned=0 | DIV_CYCLES_BUSY_COUNT + pin event ... |
|
||||
| DIV_OP_COUNT | Number of divide uops. |
|
||||
| DIV_OP_COUNT:e=0 | DIV_OP_COUNT + edge level |
|
||||
| DIV_OP_COUNT:i=0 | DIV_OP_COUNT + invert |
|
||||
| DIV_OP_COUNT:c=0 | DIV_OP_COUNT + counter-mask in ran... |
|
||||
| DIV_OP_COUNT:g=0 | DIV_OP_COUNT + measure in guest |
|
||||
| DIV_OP_COUNT:u=0 | DIV_OP_COUNT + monitor at user level |
|
||||
| DIV_OP_COUNT:k=0 | DIV_OP_COUNT + monitor at kernel l... |
|
||||
| DIV_OP_COUNT:period=0 | DIV_OP_COUNT + sampling period |
|
||||
| DIV_OP_COUNT:freq=0 | DIV_OP_COUNT + sampling frequency ... |
|
||||
| DIV_OP_COUNT:excl=0 | DIV_OP_COUNT + exclusive access |
|
||||
| DIV_OP_COUNT:mg=0 | DIV_OP_COUNT + monitor guest execu... |
|
||||
| DIV_OP_COUNT:mh=0 | DIV_OP_COUNT + monitor host execution |
|
||||
| DIV_OP_COUNT:cpu=0 | DIV_OP_COUNT + CPU to program |
|
||||
| DIV_OP_COUNT:pinned=0 | DIV_OP_COUNT + pin event to counters |
|
||||
| ... etc. ... | |
|
||||
| amd64_rapl::RAPL_ENERGY_PKG | Number of Joules consumed by all c... |
|
||||
| amd64_rapl::RAPL_ENERGY_PKG:u=0 | amd64_rapl::RAPL_ENERGY_PKG + moni... |
|
||||
| amd64_rapl::RAPL_ENERGY_PKG:k=0 | amd64_rapl::RAPL_ENERGY_PKG + moni... |
|
||||
| amd64_rapl::RAPL_ENERGY_PKG:period=0 | amd64_rapl::RAPL_ENERGY_PKG + samp... |
|
||||
| amd64_rapl::RAPL_ENERGY_PKG:freq=0 | amd64_rapl::RAPL_ENERGY_PKG + samp... |
|
||||
| amd64_rapl::RAPL_ENERGY_PKG:excl=0 | amd64_rapl::RAPL_ENERGY_PKG + excl... |
|
||||
| amd64_rapl::RAPL_ENERGY_PKG:mg=0 | amd64_rapl::RAPL_ENERGY_PKG + moni... |
|
||||
| amd64_rapl::RAPL_ENERGY_PKG:mh=0 | amd64_rapl::RAPL_ENERGY_PKG + moni... |
|
||||
| amd64_rapl::RAPL_ENERGY_PKG:cpu=0 | amd64_rapl::RAPL_ENERGY_PKG + CPU ... |
|
||||
| amd64_rapl::RAPL_ENERGY_PKG:pinned=0 | amd64_rapl::RAPL_ENERGY_PKG + pin ... |
|
||||
| appio:::READ_BYTES | Bytes read |
|
||||
| appio:::READ_CALLS | Number of read calls |
|
||||
| appio:::READ_ERR | Number of read calls that resulted... |
|
||||
| appio:::READ_INTERRUPTED | Number of read calls that timed ou... |
|
||||
| appio:::READ_WOULD_BLOCK | Number of read calls that would ha... |
|
||||
| appio:::READ_SHORT | Number of read calls that returned... |
|
||||
| appio:::READ_EOF | Number of read calls that returned... |
|
||||
| appio:::READ_BLOCK_SIZE | Average block size of reads |
|
||||
| appio:::READ_USEC | Real microseconds spent in reads |
|
||||
| appio:::WRITE_BYTES | Bytes written |
|
||||
| appio:::WRITE_CALLS | Number of write calls |
|
||||
| appio:::WRITE_ERR | Number of write calls that resulte... |
|
||||
| appio:::WRITE_SHORT | Number of write calls that wrote l... |
|
||||
| appio:::WRITE_INTERRUPTED | Number of write calls that timed o... |
|
||||
| appio:::WRITE_WOULD_BLOCK | Number of write calls that would h... |
|
||||
| appio:::WRITE_BLOCK_SIZE | Mean block size of writes |
|
||||
| appio:::WRITE_USEC | Real microseconds spent in writes |
|
||||
| appio:::OPEN_CALLS | Number of open calls |
|
||||
| appio:::OPEN_ERR | Number of open calls that resulted... |
|
||||
| appio:::OPEN_FDS | Number of currently open descriptors |
|
||||
| appio:::SELECT_USEC | Real microseconds spent in select ... |
|
||||
| appio:::RECV_BYTES | Bytes read in recv/recvmsg/recvfrom |
|
||||
| appio:::RECV_CALLS | Number of recv/recvmsg/recvfrom calls |
|
||||
| appio:::RECV_ERR | Number of recv/recvmsg/recvfrom ca... |
|
||||
| appio:::RECV_INTERRUPTED | Number of recv/recvmsg/recvfrom ca... |
|
||||
| appio:::RECV_WOULD_BLOCK | Number of recv/recvmsg/recvfrom ca... |
|
||||
| appio:::RECV_SHORT | Number of recv/recvmsg/recvfrom ca... |
|
||||
| appio:::RECV_EOF | Number of recv/recvmsg/recvfrom ca... |
|
||||
| appio:::RECV_BLOCK_SIZE | Average block size of recv/recvmsg... |
|
||||
| appio:::RECV_USEC | Real microseconds spent in recv/re... |
|
||||
| appio:::SOCK_READ_BYTES | Bytes read from socket |
|
||||
| appio:::SOCK_READ_CALLS | Number of read calls on socket |
|
||||
| appio:::SOCK_READ_ERR | Number of read calls on socket tha... |
|
||||
| appio:::SOCK_READ_SHORT | Number of read calls on socket tha... |
|
||||
| appio:::SOCK_READ_WOULD_BLOCK | Number of read calls on socket tha... |
|
||||
| appio:::SOCK_READ_USEC | Real microseconds spent in read(s)... |
|
||||
| appio:::SOCK_WRITE_BYTES | Bytes written to socket |
|
||||
| appio:::SOCK_WRITE_CALLS | Number of write calls to socket |
|
||||
| appio:::SOCK_WRITE_ERR | Number of write calls to socket th... |
|
||||
| appio:::SOCK_WRITE_SHORT | Number of write calls to socket th... |
|
||||
| appio:::SOCK_WRITE_WOULD_BLOCK | Number of write calls to socket th... |
|
||||
| appio:::SOCK_WRITE_USEC | Real microseconds spent in write(s... |
|
||||
| appio:::SEEK_CALLS | Number of seek calls |
|
||||
| appio:::SEEK_ABS_STRIDE_SIZE | Average absolute stride size of seeks |
|
||||
| appio:::SEEK_USEC | Real microseconds spent in seek calls |
|
||||
| coretemp:::hwmon2:in0_input | V, amdgpu module, label vddgfx |
|
||||
| coretemp:::hwmon2:temp1_input | degrees C, amdgpu module, label edge |
|
||||
| coretemp:::hwmon2:temp2_input | degrees C, amdgpu module, label ju... |
|
||||
| coretemp:::hwmon2:temp3_input | degrees C, amdgpu module, label mem |
|
||||
| coretemp:::hwmon2:fan1_input | RPM, amdgpu module, label ? |
|
||||
| coretemp:::hwmon0:temp1_input | degrees C, nvme module, label Comp... |
|
||||
| coretemp:::hwmon0:temp2_input | degrees C, nvme module, label Sens... |
|
||||
| coretemp:::hwmon0:temp3_input | degrees C, nvme module, label Sens... |
|
||||
| coretemp:::hwmon3:temp1_input | degrees C, k10temp module, label Tctl |
|
||||
| coretemp:::hwmon3:temp2_input | degrees C, k10temp module, label Tdie |
|
||||
| coretemp:::hwmon3:temp5_input | degrees C, k10temp module, label T... |
|
||||
| coretemp:::hwmon3:temp7_input | degrees C, k10temp module, label T... |
|
||||
| coretemp:::hwmon1:temp1_input | degrees C, enp1s0 module, label PH... |
|
||||
| coretemp:::hwmon1:temp2_input | degrees C, enp1s0 module, label MA... |
|
||||
| io:::rchar | Characters read. |
|
||||
| io:::wchar | Characters written. |
|
||||
| io:::syscr | Characters read by system calls. |
|
||||
| io:::syscw | Characters written by system calls. |
|
||||
| io:::read_bytes | Binary bytes read. |
|
||||
| io:::write_bytes | Binary bytes written. |
|
||||
| io:::cancelled_write_bytes | Binary write bytes cancelled. |
|
||||
| net:::lo:rx:bytes | lo receive bytes |
|
||||
| net:::lo:rx:packets | lo receive packets |
|
||||
| net:::lo:rx:errors | lo receive errors |
|
||||
| net:::lo:rx:dropped | lo receive dropped |
|
||||
| net:::lo:rx:fifo | lo receive fifo |
|
||||
| net:::lo:rx:frame | lo receive frame |
|
||||
| net:::lo:rx:compressed | lo receive compressed |
|
||||
| net:::lo:rx:multicast | lo receive multicast |
|
||||
| net:::lo:tx:bytes | lo transmit bytes |
|
||||
| net:::lo:tx:packets | lo transmit packets |
|
||||
| net:::lo:tx:errors | lo transmit errors |
|
||||
| net:::lo:tx:dropped | lo transmit dropped |
|
||||
| net:::lo:tx:fifo | lo transmit fifo |
|
||||
| net:::lo:tx:colls | lo transmit colls |
|
||||
| net:::lo:tx:carrier | lo transmit carrier |
|
||||
| net:::lo:tx:compressed | lo transmit compressed |
|
||||
| net:::enp1s0:rx:bytes | enp1s0 receive bytes |
|
||||
| net:::enp1s0:rx:packets | enp1s0 receive packets |
|
||||
| net:::enp1s0:rx:errors | enp1s0 receive errors |
|
||||
| net:::enp1s0:rx:dropped | enp1s0 receive dropped |
|
||||
| net:::enp1s0:rx:fifo | enp1s0 receive fifo |
|
||||
| net:::enp1s0:rx:frame | enp1s0 receive frame |
|
||||
| net:::enp1s0:rx:compressed | enp1s0 receive compressed |
|
||||
| net:::enp1s0:rx:multicast | enp1s0 receive multicast |
|
||||
| net:::enp1s0:tx:bytes | enp1s0 transmit bytes |
|
||||
| net:::enp1s0:tx:packets | enp1s0 transmit packets |
|
||||
| net:::enp1s0:tx:errors | enp1s0 transmit errors |
|
||||
| net:::enp1s0:tx:dropped | enp1s0 transmit dropped |
|
||||
| net:::enp1s0:tx:fifo | enp1s0 transmit fifo |
|
||||
| net:::enp1s0:tx:colls | enp1s0 transmit colls |
|
||||
| net:::enp1s0:tx:carrier | enp1s0 transmit carrier |
|
||||
| net:::enp1s0:tx:compressed | enp1s0 transmit compressed |
|
||||
| net:::vxlan.calico:rx:bytes | vxlan.calico receive bytes |
|
||||
| net:::vxlan.calico:rx:packets | vxlan.calico receive packets |
|
||||
| net:::vxlan.calico:rx:errors | vxlan.calico receive errors |
|
||||
| net:::vxlan.calico:rx:dropped | vxlan.calico receive dropped |
|
||||
| net:::vxlan.calico:rx:fifo | vxlan.calico receive fifo |
|
||||
| net:::vxlan.calico:rx:frame | vxlan.calico receive frame |
|
||||
| net:::vxlan.calico:rx:compressed | vxlan.calico receive compressed |
|
||||
| net:::vxlan.calico:rx:multicast | vxlan.calico receive multicast |
|
||||
| net:::vxlan.calico:tx:bytes | vxlan.calico transmit bytes |
|
||||
| net:::vxlan.calico:tx:packets | vxlan.calico transmit packets |
|
||||
| net:::vxlan.calico:tx:errors | vxlan.calico transmit errors |
|
||||
| net:::vxlan.calico:tx:dropped | vxlan.calico transmit dropped |
|
||||
| net:::vxlan.calico:tx:fifo | vxlan.calico transmit fifo |
|
||||
| net:::vxlan.calico:tx:colls | vxlan.calico transmit colls |
|
||||
| net:::vxlan.calico:tx:carrier | vxlan.calico transmit carrier |
|
||||
| net:::vxlan.calico:tx:compressed | vxlan.calico transmit compressed |
|
||||
| net:::cali59d6fabc2aa:rx:bytes | cali59d6fabc2aa receive bytes |
|
||||
| net:::cali59d6fabc2aa:rx:packets | cali59d6fabc2aa receive packets |
|
||||
| net:::cali59d6fabc2aa:rx:errors | cali59d6fabc2aa receive errors |
|
||||
| net:::cali59d6fabc2aa:rx:dropped | cali59d6fabc2aa receive dropped |
|
||||
| net:::cali59d6fabc2aa:rx:fifo | cali59d6fabc2aa receive fifo |
|
||||
| net:::cali59d6fabc2aa:rx:frame | cali59d6fabc2aa receive frame |
|
||||
| net:::cali59d6fabc2aa:rx:compressed | cali59d6fabc2aa receive compressed |
|
||||
| net:::cali59d6fabc2aa:rx:multicast | cali59d6fabc2aa receive multicast |
|
||||
| net:::cali59d6fabc2aa:tx:bytes | cali59d6fabc2aa transmit bytes |
|
||||
| net:::cali59d6fabc2aa:tx:packets | cali59d6fabc2aa transmit packets |
|
||||
| net:::cali59d6fabc2aa:tx:errors | cali59d6fabc2aa transmit errors |
|
||||
| net:::cali59d6fabc2aa:tx:dropped | cali59d6fabc2aa transmit dropped |
|
||||
| net:::cali59d6fabc2aa:tx:fifo | cali59d6fabc2aa transmit fifo |
|
||||
| net:::cali59d6fabc2aa:tx:colls | cali59d6fabc2aa transmit colls |
|
||||
| net:::cali59d6fabc2aa:tx:carrier | cali59d6fabc2aa transmit carrier |
|
||||
| net:::cali59d6fabc2aa:tx:compressed | cali59d6fabc2aa transmit compressed |
|
||||
|---------------------------------------|---------------------------------------|
|
||||
```
|
||||
|
||||
## Creating a Configuration File
|
||||
@@ -370,44 +651,92 @@ but do not override an existing value for the environment variable.
|
||||
|
||||
```shell
|
||||
# lvals starting with $ are variables
|
||||
$USE = ON
|
||||
$ENABLE = ON
|
||||
$SAMPLE = OFF
|
||||
|
||||
# use fields
|
||||
OMNITRACE_USE_PERFETTO = $USE
|
||||
OMNITRACE_USE_TIMEMORY = $USE
|
||||
OMNITRACE_USE_SAMPLING = $USE
|
||||
OMNITRACE_USE_PID = OFF
|
||||
OMNITRACE_USE_PERFETTO = $ENABLE
|
||||
OMNITRACE_USE_TIMEMORY = $ENABLE
|
||||
OMNITRACE_USE_SAMPLING = $SAMPLE
|
||||
OMNITRACE_USE_THREAD_SAMPLING = $SAMPLE
|
||||
OMNITRACE_CRITICAL_TRACE = OFF
|
||||
|
||||
# debug
|
||||
OMNITRACE_DEBUG = OFF
|
||||
OMNITRACE_VERBOSE = 1
|
||||
OMNITRACE_DL_VERBOSE = 1
|
||||
|
||||
# output fields
|
||||
OMNITRACE_OUTPUT_PREFIX = %tag%-
|
||||
OMNITRACE_OUTPUT_PATH = omnitrace-example-output
|
||||
OMNITRACE_OUTPUT_PREFIX = %tag%/
|
||||
OMNITRACE_TIME_OUTPUT = OFF
|
||||
OMNITRACE_USE_PID = OFF
|
||||
|
||||
# timemory fields
|
||||
OMNITRACE_PAPI_EVENTS = PAPI_TOT_INS PAPI_FP_INS
|
||||
OMNITRACE_TIMEMORY_COMPONENTS = wall_clock trip_count
|
||||
OMNITRACE_MEMORY_UNITS = MB
|
||||
OMNITRACE_TIMING_UNITS = sec
|
||||
|
||||
# sampling fields
|
||||
OMNITRACE_SAMPLING_FREQ = 10
|
||||
|
||||
# rocm-smi fields
|
||||
OMNITRACE_ROCM_SMI_DEVICES = 1
|
||||
OMNITRACE_ROCM_SMI_DEVICES = 0
|
||||
|
||||
# misc env variables
|
||||
OMNITRACE_SAMPLING_KEEP_DYNINST_SUFFIX = OFF
|
||||
OMNITRACE_SAMPLING_KEEP_INTERNAL = OFF
|
||||
```
|
||||
|
||||
### Sample JSON Configuration File
|
||||
|
||||
The full JSON specification for a configuration value contains a lot of information:
|
||||
|
||||
```json
|
||||
{
|
||||
"omnitrace": {
|
||||
"settings": {
|
||||
"OMNITRACE_ADD_SECONDARY": {
|
||||
"count": -1,
|
||||
"name": "add_secondary",
|
||||
"data_type": "bool",
|
||||
"initial": true,
|
||||
"value": true,
|
||||
"max_count": 1,
|
||||
"cmdline": [
|
||||
"--omnitrace-add-secondary"
|
||||
],
|
||||
"environ": "OMNITRACE_ADD_SECONDARY",
|
||||
"cereal_class_version": 1,
|
||||
"categories": [
|
||||
"component",
|
||||
"data",
|
||||
"native"
|
||||
],
|
||||
"description": "Enable/disable components adding secondary (child) entries when available. E.g. suppress individual CUDA kernels, etc. when using Cupti components"
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
```
|
||||
|
||||
However when writing an JSON configuration file, the following is minimally acceptable to set `OMNITRACE_ADD_SECONDARY=false`:
|
||||
|
||||
```json
|
||||
{
|
||||
"omnitrace": {
|
||||
"settings": {
|
||||
"OMNITRACE_ADD_SECONDARY": {
|
||||
"value": true
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
```
|
||||
|
||||
### Sample XML Configuration File
|
||||
|
||||
The full XML specification for a configuration value contains
|
||||
a lot of information:
|
||||
The full XML specification for a configuration value contains the same information as the JSON specification:
|
||||
|
||||
```xml
|
||||
<?xml version="1.0" encoding="utf-8"?>
|
||||
@@ -424,7 +753,7 @@ a lot of information:
|
||||
<count>-1</count>
|
||||
<max_count>1</max_count>
|
||||
<cmdline>
|
||||
<value0>--timemory-add-secondary</value0>
|
||||
<value0>--omnitrace-add-secondary</value0>
|
||||
</cmdline>
|
||||
<categories>
|
||||
<value0>component</value0>
|
||||
@@ -441,8 +770,7 @@ a lot of information:
|
||||
</timemory_xml>
|
||||
```
|
||||
|
||||
Howver when writing an XML configuration file, the following is perfectly acceptable
|
||||
to set `OMNITRACE_ADD_SECONDARY=false`:
|
||||
However, when writing an XML configuration file, the following is minimally acceptable to set `OMNITRACE_ADD_SECONDARY=false`:
|
||||
|
||||
```xml
|
||||
<?xml version="1.0" encoding="utf-8"?>
|
||||
@@ -456,51 +784,3 @@ to set `OMNITRACE_ADD_SECONDARY=false`:
|
||||
</omnitrace>
|
||||
</timemory_xml>
|
||||
```
|
||||
|
||||
### Sample JSON Configuration File
|
||||
|
||||
The full JSON specification for a configuration value contains the same information as the XML:
|
||||
|
||||
```json
|
||||
{
|
||||
"omnitrace": {
|
||||
"settings": {
|
||||
"OMNITRACE_ADD_SECONDARY": {
|
||||
"count": -1,
|
||||
"name": "add_secondary",
|
||||
"data_type": "bool",
|
||||
"initial": true,
|
||||
"value": true,
|
||||
"max_count": 1,
|
||||
"cmdline": [
|
||||
"--timemory-add-secondary"
|
||||
],
|
||||
"environ": "OMNITRACE_ADD_SECONDARY",
|
||||
"cereal_class_version": 1,
|
||||
"categories": [
|
||||
"component",
|
||||
"data",
|
||||
"native"
|
||||
],
|
||||
"description": "Enable/disable components adding secondary (child) entries when available. E.g. suppress individual CUDA kernels, etc. when using Cupti components"
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
```
|
||||
|
||||
Similarly, the
|
||||
Howver when writing an XML configuration file, the following is perfectly acceptable
|
||||
to set `OMNITRACE_ADD_SECONDARY=false`:
|
||||
|
||||
```json
|
||||
{
|
||||
"omnitrace": {
|
||||
"settings": {
|
||||
"OMNITRACE_ADD_SECONDARY": {
|
||||
"value": true
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
```
|
||||
|
||||
Reference in New Issue
Block a user