AI/rocm-systems
2
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

P4 to Git Change 1603595 by gandryey@gera-ocl-lc on 2018/09/10 11:45:44

Browse Source 
SWDEV-79445 - OCL generic changes and code clean-up
	- Make a fallback to system memory without device access if USWC allocation failed
	- Destroy the backing store after the load of all kernels

Affected files ...

... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palkernel.cpp#65 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palkernel.hpp#24 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palprogram.cpp#69 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palprogram.hpp#24 edit


[ROCm/clr commit: 8e02d82368]
This commit is contained in:
foreman
2018-09-10 11:57:07 -04:00
parent c28557fff4
commit bae6f34b08
4 changed files with 75 additions and 37 deletions
Download Patch File Download Diff File Expand all files Collapse all files
projects/clr/rocclr/runtime/device/pal/palkernel.cpp
+9 -6
View File
@@ -29,13 +29,15 @@ bool HSAILKernel::aqlCreateHWInfo(amd::hsa::loader::Symbol* sym) {
return false;
}
amd_kernel_code_t* akc =
reinterpret_cast<amd_kernel_code_t*>(prog().findHostKernelAddress(code_));
cpuAqlCode_ = akc;
if (!sym->GetInfo(HSA_EXT_EXECUTABLE_SYMBOL_INFO_KERNEL_OBJECT_SIZE,
reinterpret_cast<void*>(&codeSize_))) {
reinterpret_cast<void*>(&codeSize_))) {
return false;
}
amd_kernel_code_t* akc = &akc_;
// Copy codeobject of this kernel from the program CPU segment
memcpy(akc, reinterpret_cast<void*>(prog().findHostKernelAddress(code_)), sizeof(amd_kernel_code_t));
size_t akc_align = 0;
if (!sym->GetInfo(HSA_EXT_EXECUTABLE_SYMBOL_INFO_KERNEL_OBJECT_ALIGN,
reinterpret_cast<void*>(&akc_align))) {
@@ -74,7 +76,8 @@ HSAILKernel::HSAILKernel(std::string name, HSAILProgram* prog, std::string compi
prog_(*prog),
index_(0),
code_(0),
codeSize_(0) {
codeSize_(0)
{
flags_.hsa_ = true;
}
@@ -359,7 +362,7 @@ hsa_kernel_dispatch_packet_t* HSAILKernel::loadArguments(
hsaDisp->completion_signal.handle = 0;
memcpy(aqlArgBuf + argsBufferSize(), hsaDisp, sizeof(hsa_kernel_dispatch_packet_t));
if (AMD_HSA_BITS_GET(cpuAqlCode_->kernel_code_properties,
if (AMD_HSA_BITS_GET(akc_.kernel_code_properties,
AMD_KERNEL_CODE_PROPERTIES_ENABLE_SGPR_QUEUE_PTR)) {
gpu.addVmMemory(gpu.hsaQueueMem());
}