GFX12: Update addrlib
Updated address lib to mesa amd-temp-gfx12 branch.
Commit: 6e5244bd3184f0720197270a10e031b5ecd5fe75
Signed-off-by: David Belanger <david.belanger@amd.com>
Change-Id: Icaead4f38c5f3019c375116070b1f97a927f09b0
Signed-off-by: Chris Freehill <cfreehil@amd.com>
[ROCm/ROCR-Runtime commit: bb02f4e9a7]
This commit is contained in:
committed by
Chris Freehill
parent
1b5596a7f2
commit
bb0a28b8c5
+1
-18
@@ -2,24 +2,7 @@
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************************************************************************************************************************
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*
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* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE
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* SPDX-License-Identifier: MIT
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*
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***********************************************************************************************************************/
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+2
-18
@@ -2,24 +2,7 @@
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************************************************************************************************************************
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*
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* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE
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* SPDX-License-Identifier: MIT
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*
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***********************************************************************************************************************/
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@@ -74,3 +57,4 @@ union GB_ADDR_CONFIG_GFX11
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};
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#endif
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@@ -0,0 +1,57 @@
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/*
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************************************************************************************************************************
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*
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* Copyright (C) 2007-2023 Advanced Micro Devices, Inc. All rights reserved.
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* SPDX-License-Identifier: MIT
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*
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***********************************************************************************************************************/
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#if !defined (__GFX12_GB_REG_H__)
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#define __GFX12_GB_REG_H__
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/*
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* gfx12_gb_reg.h
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*
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* Register Spec Release: 1.0
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*
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*/
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//
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// Make sure the necessary endian defines are there.
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//
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#if defined(LITTLEENDIAN_CPU)
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#elif defined(BIGENDIAN_CPU)
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#else
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#error "BIGENDIAN_CPU or LITTLEENDIAN_CPU must be defined"
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#endif
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union GB_ADDR_CONFIG_GFX12 {
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struct {
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#if defined(LITTLEENDIAN_CPU)
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unsigned int NUM_PIPES : 3;
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unsigned int PIPE_INTERLEAVE_SIZE : 3;
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unsigned int MAX_COMPRESSED_FRAGS : 2;
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unsigned int NUM_PKRS : 3;
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unsigned int : 8;
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unsigned int NUM_SHADER_ENGINES : 4;
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unsigned int : 3;
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unsigned int NUM_RB_PER_SE : 2;
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unsigned int : 4;
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#elif defined(BIGENDIAN_CPU)
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unsigned int : 4;
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unsigned int NUM_RB_PER_SE : 2;
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unsigned int : 3;
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unsigned int NUM_SHADER_ENGINES : 4;
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unsigned int : 8;
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unsigned int NUM_PKRS : 3;
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unsigned int MAX_COMPRESSED_FRAGS : 2;
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unsigned int PIPE_INTERLEAVE_SIZE : 3;
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unsigned int NUM_PIPES : 3;
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#endif
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} bitfields, bits;
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unsigned int u32All;
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int i32All;
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float f32All;
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};
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#endif
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+1
-18
@@ -2,24 +2,7 @@
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************************************************************************************************************************
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*
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* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE
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* SPDX-License-Identifier: MIT
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*
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***********************************************************************************************************************/
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@@ -2,24 +2,7 @@
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************************************************************************************************************************
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*
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* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
|
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE
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* SPDX-License-Identifier: MIT
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*
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***********************************************************************************************************************/
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@@ -93,9 +76,52 @@
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#endif
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#if defined(LITTLEENDIAN_CPU)
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typedef struct _GB_ADDR_CONFIG_N {
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unsigned int num_pipes : 3;
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unsigned int pipe_interleave_size : 3;
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unsigned int max_compressed_frags : 2;
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unsigned int bank_interleave_size : 3;
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unsigned int : 1;
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unsigned int num_banks : 3;
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unsigned int : 1;
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unsigned int shader_engine_tile_size : 3;
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unsigned int num_shader_engines : 2;
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unsigned int num_gpus : 3;
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unsigned int multi_gpu_tile_size : 2;
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unsigned int num_rb_per_se : 2;
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unsigned int row_size : 2;
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unsigned int num_lower_pipes : 1;
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unsigned int se_enable : 1;
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} GB_ADDR_CONFIG_N;
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#elif defined(BIGENDIAN_CPU)
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typedef struct _GB_ADDR_CONFIG_N {
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unsigned int se_enable : 1;
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unsigned int num_lower_pipes : 1;
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unsigned int row_size : 2;
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unsigned int num_rb_per_se : 2;
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unsigned int multi_gpu_tile_size : 2;
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unsigned int num_gpus : 3;
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unsigned int num_shader_engines : 2;
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unsigned int shader_engine_tile_size : 3;
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unsigned int : 1;
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unsigned int num_banks : 3;
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unsigned int : 1;
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unsigned int bank_interleave_size : 3;
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unsigned int max_compressed_frags : 2;
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unsigned int pipe_interleave_size : 3;
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unsigned int num_pipes : 3;
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} GB_ADDR_CONFIG_N;
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#endif
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typedef union {
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unsigned int val : 32;
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GB_ADDR_CONFIG_T f;
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GB_ADDR_CONFIG_N n;
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} GB_ADDR_CONFIG;
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#if defined(LITTLEENDIAN_CPU)
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