From bc565f6c69f88efe25f7b35d98c87f9f1cd8a6af Mon Sep 17 00:00:00 2001 From: Tony Date: Sat, 5 Dec 2020 17:11:01 +0000 Subject: [PATCH] Correct code object V2 support - Remove gfx800, gfx804 and gfx901 as they do not exist. - Map the V2 note record of "AMD:AMDGPU:8:0:0" to gfx802 as they are the same target just connected to a differnt motherboard. - Correct typo for supporting gfx902:xnack+. - Support agent names with a minor or stepping version greater than 9. Change-Id: Ife933449f60ab4687e2aaab9baf4c9fc5b86339d [ROCm/ROCR-Runtime commit: 12eb2764cde7fb59e9a290ff8eee9cf64e0add78] --- .../core/runtime/amd_gpu_agent.cpp | 3 +- .../runtime/hsa-runtime/core/runtime/hsa.cpp | 32 ++----- .../runtime/hsa-runtime/core/runtime/isa.cpp | 24 ++--- .../libamdhsacode/amd_hsa_code.cpp | 88 ++++++++++--------- .../runtime/hsa-runtime/loader/loaders.cpp | 24 ++--- .../runtime/hsa-runtime/loader/loaders.hpp | 6 +- 6 files changed, 75 insertions(+), 102 deletions(-) diff --git a/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/amd_gpu_agent.cpp b/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/amd_gpu_agent.cpp index 49f44e59b6..c54107f946 100644 --- a/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/amd_gpu_agent.cpp +++ b/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/amd_gpu_agent.cpp @@ -734,7 +734,8 @@ hsa_status_t GpuAgent::GetInfo(hsa_agent_info_t attribute, void* value) const { std::stringstream name; std::memset(value, 0, HSA_PUBLIC_NAME_SIZE); char* temp = reinterpret_cast(value); - name << "gfx" << isa_->GetMajorVersion() << isa_->GetMinorVersion() << isa_->GetStepping(); + name << "gfx" << isa_->GetMajorVersion() << std::hex << isa_->GetMinorVersion() + << isa_->GetStepping(); std::strcpy(temp, name.str().c_str()); break; } diff --git a/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/hsa.cpp b/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/hsa.cpp index bb1bcc1d2d..a3515ea8e6 100644 --- a/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/hsa.cpp +++ b/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/hsa.cpp @@ -1865,53 +1865,33 @@ static std::string ConvertOldTargetNameToNew( NewName = "amdgcn-amd-amdhsa--gfx704"; else if (OldName == "AMD:AMDGPU:7:0:5") NewName = "amdgcn-amd-amdhsa--gfx705"; - else if (OldName == "AMD:AMDGPU:8:0:0") - NewName = "amdgcn-amd-amdhsa--gfx800"; else if (OldName == "AMD:AMDGPU:8:0:1") { NewName = "amdgcn-amd-amdhsa--gfx801"; xnack_supported = true; } - else if (OldName == "AMD:AMDGPU:8:0:2") + else if (OldName == "AMD:AMDGPU:8:0:0" || OldName == "AMD:AMDGPU:8:0:2") NewName = "amdgcn-amd-amdhsa--gfx802"; - else if (OldName == "AMD:AMDGPU:8:0:3") + else if (OldName == "AMD:AMDGPU:8:0:3" || OldName == "AMD:AMDGPU:8:0:4") NewName = "amdgcn-amd-amdhsa--gfx803"; - else if (OldName == "AMD:AMDGPU:8:0:4") - NewName = "amdgcn-amd-amdhsa--gfx804"; else if (OldName == "AMD:AMDGPU:8:0:5") NewName = "amdgcn-amd-amdhsa--gfx805"; else if (OldName == "AMD:AMDGPU:8:1:0") { NewName = "amdgcn-amd-amdhsa--gfx810"; xnack_supported = true; } - else if (OldName == "AMD:AMDGPU:9:0:0") { + else if (OldName == "AMD:AMDGPU:9:0:0" || OldName == "AMD:AMDGPU:9:0:1") { NewName = "amdgcn-amd-amdhsa--gfx900"; xnack_supported = true; } - else if (OldName == "AMD:AMDGPU:9:0:1") { - NewName = "amdgcn-amd-amdhsa--gfx900"; - xnack_supported = true; - } - else if (OldName == "AMD:AMDGPU:9:0:2") { + else if (OldName == "AMD:AMDGPU:9:0:2" || OldName == "AMD:AMDGPU:9:0:3") { NewName = "amdgcn-amd-amdhsa--gfx902"; xnack_supported = true; } - else if (OldName == "AMD:AMDGPU:9:0:3") { - NewName = "amdgcn-amd-amdhsa--gfx902"; - xnack_supported = true; - } - else if (OldName == "AMD:AMDGPU:9:0:4") { + else if (OldName == "AMD:AMDGPU:9:0:4" || OldName == "AMD:AMDGPU:9:0:5") { NewName = "amdgcn-amd-amdhsa--gfx904"; xnack_supported = true; } - else if (OldName == "AMD:AMDGPU:9:0:5") { - NewName = "amdgcn-amd-amdhsa--gfx904"; - xnack_supported = true; - } - else if (OldName == "AMD:AMDGPU:9:0:6") { - NewName = "amdgcn-amd-amdhsa--gfx906"; - xnack_supported = true; - } - else if (OldName == "AMD:AMDGPU:9:0:7") { + else if (OldName == "AMD:AMDGPU:9:0:6" || OldName == "AMD:AMDGPU:9:0:7") { NewName = "amdgcn-amd-amdhsa--gfx906"; xnack_supported = true; } diff --git a/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/isa.cpp b/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/isa.cpp index 6e3cfb046d..8f863c81dc 100755 --- a/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/isa.cpp +++ b/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/isa.cpp @@ -2,24 +2,24 @@ // // The University of Illinois/NCSA // Open Source License (NCSA) -// +// // Copyright (c) 2014-2020, Advanced Micro Devices, Inc. All rights reserved. -// +// // Developed by: -// +// // AMD Research and AMD HSA Software Development -// +// // Advanced Micro Devices, Inc. -// +// // www.amd.com -// +// // Permission is hereby granted, free of charge, to any person obtaining a copy // of this software and associated documentation files (the "Software"), to // deal with the Software without restriction, including without limitation // the rights to use, copy, modify, merge, publish, distribute, sublicense, // and/or sell copies of the Software, and to permit persons to whom the // Software is furnished to do so, subject to the following conditions: -// +// // - Redistributions of source code must retain the above copyright notice, // this list of conditions and the following disclaimers. // - Redistributions in binary form must reproduce the above copyright @@ -29,7 +29,7 @@ // nor the names of its contributors may be used to endorse or promote // products derived from this Software without specific prior written // permission. -// +// // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL @@ -90,9 +90,11 @@ bool Isa::IsCompatible(const Isa &code_object_isa, std::string Isa::GetFullName() const { std::stringstream full_name; + auto fmt = full_name.flags(); full_name << GetArchitecture() << "-" << GetVendor() << "-" << GetOS() << "-" << GetEnvironment() << "-gfx" << GetMajorVersion() - << GetMinorVersion() << GetStepping(); + << std::hex << GetMinorVersion() << GetStepping(); + full_name.flags(fmt); switch (sramecc_) { case IsaFeature::Disabled: @@ -231,7 +233,7 @@ const IsaRegistry::IsaMap IsaRegistry::supported_isas_ = IsaRegistry::GetSupportedIsas(); const IsaRegistry::IsaMap IsaRegistry::GetSupportedIsas() { -#define ISAREG_ENTRY_GEN(name, maj, min, stp, sramecc, xnack) \ +#define ISAREG_ENTRY_GEN(name, maj, min, stp, sramecc, xnack) \ Isa amd_amdgpu_##maj##min##stp##_SRAMECC_##sramecc##_XNACK_##xnack; \ amd_amdgpu_##maj##min##stp##_SRAMECC_##sramecc##_XNACK_##xnack.version_ = Isa::Version(maj, min, stp); \ amd_amdgpu_##maj##min##stp##_SRAMECC_##sramecc##_XNACK_##xnack.sramecc_ = sramecc; \ @@ -264,7 +266,7 @@ const IsaRegistry::IsaMap IsaRegistry::GetSupportedIsas() { ISAREG_ENTRY_GEN("gfx900:xnack+", 9, 0, 0, unsupported, enabled) ISAREG_ENTRY_GEN("gfx902", 9, 0, 2, unsupported, any) ISAREG_ENTRY_GEN("gfx902:xnack-", 9, 0, 2, unsupported, disabled) - ISAREG_ENTRY_GEN("gfx900:xnack+", 9, 0, 2, unsupported, enabled) + ISAREG_ENTRY_GEN("gfx902:xnack+", 9, 0, 2, unsupported, enabled) ISAREG_ENTRY_GEN("gfx904", 9, 0, 4, unsupported, any) ISAREG_ENTRY_GEN("gfx904:xnack-", 9, 0, 4, unsupported, disabled) ISAREG_ENTRY_GEN("gfx904:xnack+", 9, 0, 4, unsupported, enabled) diff --git a/projects/rocr-runtime/runtime/hsa-runtime/libamdhsacode/amd_hsa_code.cpp b/projects/rocr-runtime/runtime/hsa-runtime/libamdhsacode/amd_hsa_code.cpp index a2f66ca3f5..cb7964422e 100644 --- a/projects/rocr-runtime/runtime/hsa-runtime/libamdhsacode/amd_hsa_code.cpp +++ b/projects/rocr-runtime/runtime/hsa-runtime/libamdhsacode/amd_hsa_code.cpp @@ -606,9 +606,9 @@ namespace code { mach = ELF::EF_AMDGPU_MACH_AMDGCN_GFX705; else if (old_name == "AMD:AMDGPU:8:0:1") mach = ELF::EF_AMDGPU_MACH_AMDGCN_GFX801; - else if (old_name == "AMD:AMDGPU:8:0:2") + else if (old_name == "AMD:AMDGPU:8:0:0" || old_name == "AMD:AMDGPU:8:0:2") mach = ELF::EF_AMDGPU_MACH_AMDGCN_GFX802; - else if (old_name == "AMD:AMDGPU:8:0:3") + else if (old_name == "AMD:AMDGPU:8:0:3" || old_name == "AMD:AMDGPU:8:0:4") mach = ELF::EF_AMDGPU_MACH_AMDGCN_GFX803; else if (old_name == "AMD:AMDGPU:8:0:5") mach = ELF::EF_AMDGPU_MACH_AMDGCN_GFX805; @@ -670,26 +670,25 @@ namespace code { uint32_t code_object_major_version = 0; uint32_t code_object_minor_version = 0; + switch (img->EClass()) { + case ELFCLASS64: + // There is no e_machine and/or OS ABI for R600 so rely on checking + // the ELFCLASS to determine if AMDGCN versus R600. AMDHSA always uses + // ELFCLASS64 and R600 always uses ELFCLASS32. + isa_name += "amdgcn"; + break; + default: + return false; + } + if (img->Machine() != ELF::EM_AMDGPU) + return false; + isa_name += "-amd-"; + if (!GetCodeObjectVersion(&code_object_major_version, &code_object_minor_version)) { return false; } if (code_object_major_version >= 3) { - switch (img->EClass()) { - case ELFCLASS64: - // There is no e_machine and/or OS ABI for R600 so rely on checking - // the ELFCLASS to determin if AMDGCN verses R600. AMDHSA always uses - // ELFCLASS64 and R600 always uses ELFCLASS32. - isa_name += "amdgcn"; - break; - default: - return false; - } - - if (img->Machine() != ELF::EM_AMDGPU) - return false; - isa_name += "-amd-"; - switch (img->OsAbi()) { case ELF::ELFOSABI_AMDGPU_HSA: isa_name += "amdhsa"; @@ -702,66 +701,69 @@ namespace code { isa_name += "--"; unsigned mach = img->EFlags() & ELF::EF_AMDGPU_MACH; - std::string name = ""; + std::string target_name; bool xnack_supported = false; bool sramecc_supported = false; - if (!GetMachInfo(mach, name, sramecc_supported, xnack_supported)) + if (!GetMachInfo(mach, target_name, sramecc_supported, xnack_supported)) return false; - isa_name += name; - if (code_object_major_version == 3) { if (img->EFlags() & ELF::EF_AMDGPU_FEATURE_SRAMECC_V3) - isa_name += ":sramecc+"; + target_name += ":sramecc+"; else if (sramecc_supported) - isa_name += ":sramecc-"; + target_name += ":sramecc-"; if (img->EFlags() & ELF::EF_AMDGPU_FEATURE_XNACK_V3) - isa_name += ":xnack+"; + target_name += ":xnack+"; else if (xnack_supported) - isa_name += ":xnack-"; + target_name += ":xnack-"; } else if (code_object_major_version == 4) { switch (img->EFlags() & ELF::EF_AMDGPU_FEATURE_SRAMECC_V4) { case ELF::EF_AMDGPU_FEATURE_SRAMECC_OFF_V4: - isa_name += ":sramecc-"; + target_name += ":sramecc-"; break; case ELF::EF_AMDGPU_FEATURE_SRAMECC_ON_V4: - isa_name += ":sramecc+"; + target_name += ":sramecc+"; break; } switch (img->EFlags() & ELF::EF_AMDGPU_FEATURE_XNACK_V4) { case ELF::EF_AMDGPU_FEATURE_XNACK_OFF_V4: - isa_name += ":xnack-"; + target_name += ":xnack-"; break; case ELF::EF_AMDGPU_FEATURE_XNACK_ON_V4: - isa_name += ":xnack+"; + target_name += ":xnack+"; break; } } else { return false; } + isa_name += target_name; + return true; } else { + std::string vendor_name, architecture_name; uint32_t major_version, minor_version, stepping; - if (!GetNoteIsa(vendor_name, architecture_name, &major_version, &minor_version, &stepping)) { return false; } - isa_name += vendor_name; - isa_name += ":"; - isa_name += architecture_name; - isa_name += ":"; - isa_name += std::to_string(major_version); - isa_name += ":"; - isa_name += std::to_string(minor_version); - isa_name += ":"; - isa_name += std::to_string(stepping); + if (!GetNoteIsa(vendor_name, architecture_name, &major_version, &minor_version, &stepping)) + return false; - amdgpu_hsa_note_hsail_t *hsailNote; - bool IsFinalizer = GetAmdNote(NT_AMD_HSA_HSAIL, &hsailNote); - isa_name = ConvertOldTargetNameToNew(isa_name, IsFinalizer, img->EFlags()); - return !isa_name.empty(); + isa_name += "amdhsa--"; + + std::string target_name = vendor_name + ':' + architecture_name + ':' + + std::to_string(major_version) + ':' + std::to_string(minor_version) + ':' + + std::to_string(stepping); + + amdgpu_hsa_note_hsail_t *hsail_note; + bool is_finalizer = GetAmdNote(NT_AMD_HSA_HSAIL, &hsail_note); + target_name = ConvertOldTargetNameToNew(target_name, is_finalizer, img->EFlags()); + if (target_name.empty()) return false; + + isa_name += target_name; + + return true; } } diff --git a/projects/rocr-runtime/runtime/hsa-runtime/loader/loaders.cpp b/projects/rocr-runtime/runtime/hsa-runtime/loader/loaders.cpp index 25433cc97a..a369896fa5 100644 --- a/projects/rocr-runtime/runtime/hsa-runtime/loader/loaders.cpp +++ b/projects/rocr-runtime/runtime/hsa-runtime/loader/loaders.cpp @@ -116,35 +116,23 @@ namespace loader { return gfx704; } else if (sname == "AMD:AMDGPU:7:0:5") { return gfx705; - } else if (sname == "AMD:AMDGPU:8:0:0") { - return gfx800; } else if (sname == "AMD:AMDGPU:8:0:1") { return gfx801; - } else if (sname == "AMD:AMDGPU:8:0:2") { + } else if (sname == "AMD:AMDGPU:8:0:0" || sname == "AMD:AMDGPU:8:0:2") { return gfx802; - } else if (sname == "AMD:AMDGPU:8:0:3") { + } else if (sname == "AMD:AMDGPU:8:0:3" || sname == "AMD:AMDGPU:8:0:4") { return gfx803; - } else if (sname == "AMD:AMDGPU:8:0:4") { - return gfx804; } else if (sname == "AMD:AMDGPU:8:0:5") { return gfx805; } else if (sname == "AMD:AMDGPU:8:1:0") { return gfx810; - } else if (sname == "AMD:AMDGPU:9:0:0") { + } else if (sname == "AMD:AMDGPU:9:0:0" || sname == "AMD:AMDGPU:9:0:1") { return gfx900; - } else if (sname == "AMD:AMDGPU:9:0:1") { - return gfx901; - } else if (sname == "AMD:AMDGPU:9:0:2") { + } else if (sname == "AMD:AMDGPU:9:0:2" || sname == "AMD:AMDGPU:9:0:3") { return gfx902; - } else if (sname == "AMD:AMDGPU:9:0:3") { - return gfx902; - } else if (sname == "AMD:AMDGPU:9:0:4") { + } else if (sname == "AMD:AMDGPU:9:0:4" || sname == "AMD:AMDGPU:9:0:5") { return gfx904; - } else if (sname == "AMD:AMDGPU:9:0:5") { - return gfx904; - } else if (sname == "AMD:AMDGPU:9:0:6") { - return gfx906; - } else if (sname == "AMD:AMDGPU:9:0:7") { + } else if (sname == "AMD:AMDGPU:9:0:6" || sname == "AMD:AMDGPU:9:0:7") { return gfx906; } else if (sname == "AMD:AMDGPU:9:0:8") { return gfx908; diff --git a/projects/rocr-runtime/runtime/hsa-runtime/loader/loaders.hpp b/projects/rocr-runtime/runtime/hsa-runtime/loader/loaders.hpp index 4c08332554..e98c7463a0 100644 --- a/projects/rocr-runtime/runtime/hsa-runtime/loader/loaders.hpp +++ b/projects/rocr-runtime/runtime/hsa-runtime/loader/loaders.hpp @@ -56,8 +56,8 @@ namespace loader { private: hsa_isa_t invalid; hsa_isa_t gfx700, gfx701, gfx702, gfx703, gfx704, gfx705; - hsa_isa_t gfx800, gfx801, gfx802, gfx803, gfx804, gfx805, gfx810; - hsa_isa_t gfx900, gfx901, gfx902, gfx904, gfx906, gfx908; + hsa_isa_t gfx801, gfx802, gfx803, gfx805, gfx810; + hsa_isa_t gfx900, gfx902, gfx904, gfx906, gfx908; hsa_isa_t gfx1010, gfx1011, gfx1012, gfx1030, gfx1031, gfx1032; std::ostream& out; typedef std::set PointerSet; @@ -73,7 +73,7 @@ namespace loader { void* SegmentAlloc(amdgpu_hsa_elf_segment_t segment, hsa_agent_t agent, size_t size, size_t align, bool zero) override; bool SegmentCopy(amdgpu_hsa_elf_segment_t segment, hsa_agent_t agent, void* dst, size_t offset, const void* src, size_t size) override; - + void SegmentFree(amdgpu_hsa_elf_segment_t segment, hsa_agent_t agent, void* seg, size_t size = 0) override; void* SegmentAddress(amdgpu_hsa_elf_segment_t segment, hsa_agent_t agent, void* seg, size_t offset) override;