rocr: Add support for Mipmapped Array (#1847)
SWDEV-539526 - Add support for Mipmapped Array in Rocr Add support for Mipmapped Array functionality in Rocr Runtimeenabling GPU applications to work with multi-level texture mipmaps. The implementation introduces new public APIs for creating, querying, and managing mipmapped arrays across different GPU architectures. Signed-off-by: Apurv Mishra <Apurv.Mishra@amd.com> Co-authored-by: Shweta Khatri <shweta.khatri@amd.com> Co-authored-by: taosang2 <tao.sang@amd.com>
This commit is contained in:
@@ -44,11 +44,15 @@
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#include <assert.h>
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#include <climits>
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#include <cstring>
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#include <vector>
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#include <mutex>
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#include <algorithm>
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#include "core/inc/runtime.h"
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#include "core/inc/hsa_internal.h"
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#include "core/inc/hsa_ext_amd_impl.h"
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#include "core/inc/exceptions.h"
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#include "resource.h"
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#include "image_manager_kv.h"
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#include "image_manager_ai.h"
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@@ -57,9 +61,96 @@
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#include "image_manager_gfx12.h"
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#include "device_info.h"
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#define SINGLE_MIP_LEVEL 1
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namespace rocr {
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namespace image {
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static inline uint32_t ComputeMaxMipLevels(const hsa_ext_image_descriptor_t& d) {
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uint32_t w = d.width ? d.width : 1;
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uint32_t h = d.height ? d.height : 1;
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uint32_t depth = d.depth ? d.depth : 1;
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uint32_t dim_max = w;
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switch (d.geometry) {
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case HSA_EXT_IMAGE_GEOMETRY_1D:
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case HSA_EXT_IMAGE_GEOMETRY_1DA:
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case HSA_EXT_IMAGE_GEOMETRY_1DB:
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dim_max = w; break;
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case HSA_EXT_IMAGE_GEOMETRY_2D:
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case HSA_EXT_IMAGE_GEOMETRY_2DA:
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case HSA_EXT_IMAGE_GEOMETRY_2DDEPTH:
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case HSA_EXT_IMAGE_GEOMETRY_2DADEPTH:
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dim_max = std::max(w, h); break;
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case HSA_EXT_IMAGE_GEOMETRY_3D:
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dim_max = std::max(std::max(w, h), depth); break;
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default:
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break;
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}
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uint32_t levels = 0;
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while (dim_max > 0) { ++levels; dim_max >>= 1; }
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return (levels == 0) ? 1 : levels;
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}
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hsa_status_t ImageRuntime::GetMipmapArraySizeAndAlignment(
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hsa_agent_t component,
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const hsa_ext_image_descriptor_t& desc,
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uint32_t num_mipmap_levels,
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hsa_ext_image_data_layout_t layout,
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size_t row_pitch,
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size_t slice_pitch,
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size_t& size_out,
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size_t& alignment_out) {
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size_out = 0;
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alignment_out = 0;
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if (num_mipmap_levels == 0 || num_mipmap_levels > ComputeMaxMipLevels(desc))
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return HSA_STATUS_ERROR_INVALID_ARGUMENT;
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// Validate the image format and geometry.
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uint32_t capability = 0;
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hsa_status_t status =
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GetImageCapability(component, desc.format, desc.geometry, capability);
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if (status != HSA_STATUS_SUCCESS) {
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return status;
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}
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if (capability == 0) {
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return static_cast<hsa_status_t>(
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HSA_EXT_STATUS_ERROR_IMAGE_FORMAT_UNSUPPORTED);
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}
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const hsa_ext_image_geometry_t geometry = desc.geometry;
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uint32_t max_width = 0;
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uint32_t max_height = 0;
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uint32_t max_depth = 0;
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uint32_t max_array_size = 0;
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ImageManager* manager = image_manager(component);
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// Validate the image dimension.
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manager->GetImageInfoMaxDimension(component, geometry, max_width, max_height,
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max_depth, max_array_size);
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if (desc.width > max_width || desc.height > max_height ||
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desc.depth > max_depth || desc.array_size > max_array_size) {
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return static_cast<hsa_status_t>(
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HSA_EXT_STATUS_ERROR_IMAGE_SIZE_UNSUPPORTED);
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}
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hsa_ext_image_data_info_t mipmap_info = {0};
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status = manager->CalculateImageSizeAndAlignment(component, desc, layout,
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num_mipmap_levels, row_pitch, slice_pitch, mipmap_info);
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if (HSA_STATUS_SUCCESS != status) {
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return status;
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}
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alignment_out = mipmap_info.alignment;
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size_out = mipmap_info.size;
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return HSA_STATUS_SUCCESS;
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}
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hsa_status_t FindKernelArgPool(hsa_amd_memory_pool_t pool, void* data) {
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assert(data != nullptr);
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@@ -162,9 +253,6 @@ ImageRuntime* ImageRuntime::instance() {
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}
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instance = CreateSingleton();
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if (instance == NULL) {
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return NULL;
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}
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// UnloadCallback = &ext_image::ImageRuntime::DestroySingleton;
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}
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@@ -178,13 +266,15 @@ ImageRuntime* ImageRuntime::CreateSingleton() {
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if (HSA_STATUS_SUCCESS != instance->blit_kernel_.Initialize()) {
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instance->Cleanup();
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delete instance;
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return NULL;
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throw AMD::hsa_exception(HSA_STATUS_ERROR_OUT_OF_RESOURCES,
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"ImageRuntime: Failed to initialize blit kernel");
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}
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if (HSA_STATUS_SUCCESS != HSA::hsa_iterate_agents(CreateImageManager, instance)) {
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instance->Cleanup();
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delete instance;
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return NULL;
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throw AMD::hsa_exception(HSA_STATUS_ERROR_OUT_OF_RESOURCES,
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"ImageRuntime: Failed to create image managers");
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}
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assert(instance->kernarg_pool_.handle != 0);
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@@ -350,8 +440,9 @@ hsa_status_t ImageRuntime::GetImageSizeAndAlignment(
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HSA_EXT_STATUS_ERROR_IMAGE_SIZE_UNSUPPORTED);
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}
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return manager->CalculateImageSizeAndAlignment(component, desc,
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image_data_layout, image_data_row_pitch, image_data_slice_pitch, image_info);
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return manager->CalculateImageSizeAndAlignment(
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component, desc, image_data_layout, SINGLE_MIP_LEVEL,
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image_data_row_pitch, image_data_slice_pitch, image_info);
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}
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hsa_status_t ImageRuntime::CreateImageHandle(
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@@ -421,7 +512,7 @@ hsa_status_t ImageRuntime::CreateImageHandleWithLayout(
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if(image_layout->version!=1)
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return (hsa_status_t)HSA_EXT_STATUS_ERROR_IMAGE_FORMAT_UNSUPPORTED;
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uint32_t id;
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HSA::hsa_agent_get_info(component, (hsa_agent_info_t)HSA_AMD_AGENT_INFO_CHIP_ID, &id);
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@@ -448,6 +539,64 @@ hsa_status_t ImageRuntime::CreateImageHandleWithLayout(
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return HSA_STATUS_SUCCESS;
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}
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hsa_status_t ImageRuntime::CreateMipmapArrayHandleWithLayout(
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hsa_agent_t component, const hsa_ext_image_descriptor_t& mipmap_descriptor,
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const hsa_amd_image_descriptor_t* image_layout,
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const void* image_data, const hsa_access_permission_t access_permission,
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uint32_t num_mipmap_levels,
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hsa_ext_image_t& image_handle) {
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image_handle.handle = 0;
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if (!IsMultipleOf(image_data, 256)) {
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return HSA_STATUS_ERROR_INVALID_ALLOCATION;
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}
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if (image_layout->version != 1) {
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return (hsa_status_t)HSA_EXT_STATUS_ERROR_IMAGE_FORMAT_UNSUPPORTED;
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}
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uint32_t id;
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HSA::hsa_agent_get_info(component, (hsa_agent_info_t)HSA_AMD_AGENT_INFO_CHIP_ID, &id);
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if (image_layout->deviceID != (0x1002 << 16 | id)) {
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return (hsa_status_t)HSA_EXT_STATUS_ERROR_IMAGE_FORMAT_UNSUPPORTED;
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}
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if (num_mipmap_levels == 0) {
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return HSA_STATUS_ERROR_INVALID_ARGUMENT;
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}
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const metadata_amd_t* desc = reinterpret_cast<const metadata_amd_t*>(image_layout);
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MipmappedArray* mipmap_array = MipmappedArray::Create(component);
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if (!mipmap_array) {
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return HSA_STATUS_ERROR_OUT_OF_RESOURCES;
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}
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mipmap_array->component = component;
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mipmap_array->desc = mipmap_descriptor;
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mipmap_array->permission = access_permission;
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mipmap_array->num_levels = num_mipmap_levels;
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mipmap_array->data = const_cast<void*>(image_data);
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mipmap_array->flags = 0;
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ImageManager* manager = image_manager(component);
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if (!manager) {
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MipmappedArray::Destroy(mipmap_array);
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return HSA_STATUS_ERROR_OUT_OF_RESOURCES;
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}
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hsa_status_t status = manager->PopulateMipmapSrd(*mipmap_array, desc);
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if (status != HSA_STATUS_SUCCESS) {
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MipmappedArray::Destroy(mipmap_array);
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return status;
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}
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image_handle.handle = mipmap_array->Convert();
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return HSA_STATUS_SUCCESS;
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}
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hsa_status_t ImageRuntime::DestroyImageHandle(
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const hsa_ext_image_t& image_handle) {
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const Image* image = Image::Convert(image_handle.handle);
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@@ -574,6 +723,154 @@ hsa_status_t ImageRuntime::DestroySamplerHandle(
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return HSA_STATUS_SUCCESS;
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}
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hsa_status_t ImageRuntime::CreateMipmapArrayHandle(
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hsa_agent_t component, const hsa_ext_image_descriptor_t& mipmap_descriptor,
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const void* image_data, const hsa_access_permission_t access_permission,
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uint32_t num_mipmap_levels,
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const hsa_ext_image_data_layout_t mipmap_layout,
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size_t image_data_row_pitch, size_t image_data_slice_pitch,
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hsa_ext_image_t& image_handle) {
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image_handle.handle = 0;
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if (mipmap_descriptor.width == 0 || num_mipmap_levels == 0) {
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return HSA_STATUS_ERROR_INVALID_ARGUMENT;
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}
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ImageManager* manager = image_manager(component);
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if (!manager) return HSA_STATUS_ERROR_INVALID_AGENT;
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// Validate mipmap array size and alignment requirements
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size_t required_size = 0;
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size_t required_alignment = 0;
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hsa_status_t status = GetMipmapArraySizeAndAlignment(
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component, mipmap_descriptor, num_mipmap_levels, mipmap_layout, image_data_row_pitch,
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image_data_slice_pitch, required_size, required_alignment);
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if (status != HSA_STATUS_SUCCESS) {
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return status;
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}
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// Verify image_data alignment
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assert(image_data != NULL);
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assert(IsMultipleOf(image_data, required_alignment));
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// Create a new mipmapped array object
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MipmappedArray* mipmap_array = MipmappedArray::Create(component);
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if (!mipmap_array) return HSA_STATUS_ERROR_OUT_OF_RESOURCES;
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// Determine the tile mode
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// 1DB (1D buffered) geometry MUST always be LINEAR per HSA spec
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// LINEAR layout forces linear swizzle mode (required by API)
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// TILED allows AddrLib to use internal heuristics to select optimal swizzle mode
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if (mipmap_descriptor.geometry == HSA_EXT_IMAGE_GEOMETRY_1DB) {
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// 1DB always uses linear addressing per HSA specification
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mipmap_array->tile_mode = Image::TileMode::LINEAR;
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} else if (mipmap_layout == HSA_EXT_IMAGE_DATA_LAYOUT_LINEAR) {
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// Explicit LINEAR layout forces linear swizzle mode
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mipmap_array->tile_mode = Image::TileMode::LINEAR;
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} else {
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// OPAQUE layout: Let AddrLib choose the best swizzle mode
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mipmap_array->tile_mode = Image::TileMode::TILED;
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}
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debug_print("Tile mode = %u (0: LINEAR, 1: TILED)", mipmap_array->tile_mode);
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// Initialize the mipmapped array object
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mipmap_array->component = component;
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mipmap_array->data = const_cast<void*>(image_data);
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mipmap_array->desc = mipmap_descriptor;
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mipmap_array->permission = access_permission;
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mipmap_array->num_levels = num_mipmap_levels;
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mipmap_array->flags = 0;
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manager->PopulateMipmapSrd(*mipmap_array);
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debug_print("Populating mipmapped array SRD...");
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if (core::Runtime::runtime_singleton_->flag().image_print_srd())
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mipmap_array->printSRD();
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manager->printSRDDetailed(mipmap_array->srd);
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// assert(mipmap_array->size == required_size);
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image_handle.handle = mipmap_array->Convert();
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debug_print("output handle = %lu", image_handle.handle);
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return HSA_STATUS_SUCCESS;
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}
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hsa_status_t ImageRuntime::DestroyMipmapArrayHandle(
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const hsa_ext_image_t& image_handle) {
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const MipmappedArray* mipmap_array = MipmappedArray::Convert(image_handle.handle);
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if (mipmap_array == NULL) {
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return HSA_STATUS_ERROR_INVALID_ARGUMENT;
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}
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MipmappedArray::Destroy(const_cast<MipmappedArray*>(mipmap_array));
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return HSA_STATUS_SUCCESS;
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}
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hsa_status_t ImageRuntime::GetMipmapArrayLevelHandle(
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hsa_agent_t component, const hsa_ext_image_t& mipmapped_array,
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uint32_t mip_level, hsa_ext_image_t& level_image_out) {
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level_image_out.handle = 0;
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// Get GPU architecture version
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uint32_t chip_id;
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hsa_status_t status = GetGPUAsicID(component, &chip_id);
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if (status != HSA_STATUS_SUCCESS) {
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return status;
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}
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uint32_t major_ver = MajorVerFromDevID(chip_id);
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if (major_ver < 9) {
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debug_print("ERROR: Mip level views not supported on GFX%u hardware\n", major_ver);
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return HSA_STATUS_ERROR_INVALID_ARGUMENT;
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}
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// Validate mip level
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if (mip_level < 0) {
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return HSA_STATUS_ERROR_INVALID_ARGUMENT;
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}
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// Convert handle to internal object and perform basic sanity.
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rocr::image::MipmappedArray* array =
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rocr::image::MipmappedArray::Convert(mipmapped_array.handle);
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if (!array || array->num_levels == 0 || mip_level >= array->num_levels) {
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return HSA_STATUS_ERROR_INVALID_ARGUMENT;
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}
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debug_print("Creating mip level %u view for %u level mipmap\n",
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mip_level, array->num_levels);
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// Create a view that references the parent mipmap array
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MipmappedArray* level_view = MipmappedArray::Create(component);
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if (!level_view) return HSA_STATUS_ERROR_OUT_OF_RESOURCES;
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// Copy entire parent structure (srd is a fixed array, so it's deep-copied automatically)
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*level_view = *array;
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// Modify SRD to select only the specific mip level
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ImageManager* manager = image_manager(component);
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if (!manager) {
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MipmappedArray::Destroy(level_view);
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return HSA_STATUS_ERROR_OUT_OF_RESOURCES;
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}
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status = manager->PopulateMipLevelSrd(*level_view, *array, mip_level);
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if (status != HSA_STATUS_SUCCESS) {
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MipmappedArray::Destroy(level_view);
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return status;
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}
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debug_print("Created mip level view using SRD fields");
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if (core::Runtime::runtime_singleton_->flag().image_print_srd())
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level_view->printSRD();
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manager->printSRDDetailed(level_view->srd);
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// Return handle
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level_image_out.handle = level_view->Convert();
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return HSA_STATUS_SUCCESS;
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}
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ImageRuntime::ImageRuntime()
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: cpu_l2_cache_size_(0), kernarg_pool_({0}) {}
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